diff --git a/cmse/cmse.md b/cmse/cmse.md
index d7e6a1bb..7d5a78fb 100644
--- a/cmse/cmse.md
+++ b/cmse/cmse.md
@@ -121,16 +121,6 @@ Copyright 2019, 2021-2023 Arm Limited and/or its affiliates <open-source-office@
 
 ## Change control
 
-### Current status and anticipated changes
-
-This document is a development version based on release 1.1.
-
-Anticipated changes to this document include:
-
-* Typographical corrections.
-* Clarifications.
-* Compatible extensions.
-
 ### Change history
 
 | Issue | Date          | By   | Change         |
@@ -162,6 +152,7 @@ Anticipated changes to this document include:
   [Arguments on the stack and floating point handling](#arguments-on-the-stack-and-floating-point-handling).
 * Corrected description and example in section
   [Non-secure function pointers](#non-secure-function-pointer).
+* Fixed typos.
 
 ## References
 
@@ -1376,14 +1367,14 @@ The global variable `fp` is of a non-secure function type but can hold the
 address of a secure or non-secure function. Arm recommends that you do not
 share this variable.
 
-Since `fp` can hold either type of function, the compiler may generate code
+Since `fp` can hold either type of function, the compiler might generate code
 to save and clear registers in preparation for a security state transition even
 if the function call nevers performs such transition at run-time.
 
 To mitigate this, an nsfptr provides a way to test at run-time the
 security state that will be targeted when performing a call through
 this pointer. By using the nsfptr related intrinsics, it is
-possible to check at run-time which function call to perform and thus
+possible to check at run-time which function call to perform and therefore
 avoid unnecessary register context saving and clearing.
 
 ``` c
diff --git a/main/acle.md b/main/acle.md
index c24b939f..42a14b2a 100644
--- a/main/acle.md
+++ b/main/acle.md
@@ -114,7 +114,7 @@ about Arm’s trademarks.
 
 ## Copyright
 
-* Copyright 2011-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>.
+* Copyright 2011-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>.
 * Copyright 2022 Google LLC.
 
 ## About this document
@@ -1550,13 +1550,13 @@ the usage of these instructions in inline assembly.
 
 If defined, the value of `__ARM_FEATURE_RCPC` remains consistent with the decimal
 value of `LRCPC` field (bits [23:20]) in the `ID_AA64ISAR1_EL1` register.
-For convenience these are reproduced here:
+For convenience these are shown below:
 
 | **Value** | **Feature** | **Instructions**                | **Availability**          |
 | --------- | ----------- | ------------------------------- | ------------------------- |
 | 1         | FEAT_LRCPC  | LDAPR* instructions             | Armv8.3, optional Armv8.2 |
 | 2         | FEAT_LRCPC2 | LDAPUR* and STLUR* instructions | Armv8.4, optional Armv8.2 |
-| 3         | FEAT_LRCPC3 | See FEAT_LRCPC3 documentation.  | Armv8.9, optional Armv8.2 |
+| 3         | FEAT_LRCPC3 | See FEAT_LRCPC3 documentation   | Armv8.9, optional Armv8.2 |
 
 The `__ARM_FEATURE_RCPC` macro can only be implemented in the AArch64
 execution state.
diff --git a/neon_intrinsics/advsimd.md b/neon_intrinsics/advsimd.md
index 48de46fd..ea272b55 100644
--- a/neon_intrinsics/advsimd.md
+++ b/neon_intrinsics/advsimd.md
@@ -1,7 +1,7 @@
 ---
 title: Arm Neon Intrinsics Reference
-version: 2021Q4
-date-of-issue: 11 January 2022
+version: 2023Q2
+date-of-issue: TBC
 # LaTeX specific variables
 landscape: true
 copyright-text: "Copyright: see section \\texorpdfstring{\\nameref{copyright}}{Copyright}."
@@ -124,6 +124,7 @@ for more information about Arm’s trademarks.
 | H     | 02 July 2021      | 2021Q2               |
 | I     | 30 September 2021 | 2021Q3               |
 | J     | 11 January 2022   | 2021Q4               |
+| K     | TBC               | 2023Q2               |
 
 ### Changes between 2021Q2 and 2021Q3
 
@@ -141,6 +142,10 @@ for more information about Arm’s trademarks.
 * Added missing item for release 2021Q3 in the table with the list of
   versions in section [Document history](#document-history).
 
+### Changes between 2021Q4 and 2023Q2
+
+* Added support for FEAT_LRCPC3 LDAP1/STL1 intrinsics.
+
 <!---
 **** Do not remove! ****
 The line following this comment is necessary to generate custom geometry settings