From 0c355bcffc5cf75dce46bd9ba9ac0c7eb01359d4 Mon Sep 17 00:00:00 2001 From: wanda-phi <145241585+wanda-phi@users.noreply.github.com> Date: Thu, 21 Nov 2024 18:34:19 +0000 Subject: [PATCH] =?UTF-8?q?Deploying=20to=20gh-pages=20from=20=20@=20cd315?= =?UTF-8?q?e03fa5b307a2731060493fd9efbf4a69e8c=20=F0=9F=9A=80?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- searchindex.js | 2 +- xilinx/spartanxl/io.html | 240 +++++++++--------- xilinx/xc4000e/corner.html | 10 +- xilinx/xc4000e/io.html | 224 ++++++++--------- xilinx/xc4000ex/corner.html | 10 +- xilinx/xc4000ex/io.html | 464 +++++++++++++++++------------------ xilinx/xc4000xla/corner.html | 10 +- xilinx/xc4000xla/io.html | 464 +++++++++++++++++------------------ xilinx/xc4000xv/corner.html | 10 +- xilinx/xc4000xv/io.html | 464 +++++++++++++++++------------------ 10 files changed, 949 insertions(+), 949 deletions(-) diff --git a/searchindex.js b/searchindex.js index dddd2220..d1ee5361 100644 --- a/searchindex.js +++ b/searchindex.js @@ -1 +1 @@ -Search.setIndex({"alltitles": {"AIM and FB inputs": [[14, "aim-and-fb-inputs"]], "BRAM.S3": [[45, "bram-s3"]], "BRAM.S3A": [[45, "bram-s3a"]], "BRAM.S3ADSP": [[45, "bram-s3adsp"]], "BRAM.S3E": [[45, "bram-s3e"]], "BSPI": [[152, "bspi"]], "Backbone": [[55, "backbone"], [97, "backbone"]], "Bank configuration": [[14, "bank-configuration"]], "Bitstream": [[37, "bitstream"], [45, "bitstream"], [46, "bitstream"], [53, "bitstream"], [59, "bitstream"], [64, "bitstream"], [65, "bitstream"], [66, "bitstream"], [70, "bitstream"], [71, "bitstream"], [72, "bitstream"], [79, "bitstream"], [87, "bitstream"], [88, "bitstream"], [94, "bitstream"], [95, "bitstream"], [102, "bitstream"], [103, "bitstream"], [104, "bitstream"], [105, "bitstream"], [108, "bitstream"], [109, "bitstream"], [111, "bitstream"], [113, "bitstream"], [114, "bitstream"], [115, "bitstream"], [116, "bitstream"], [117, "bitstream"], [122, "bitstream"], [123, "bitstream"], [125, "bitstream"], [126, "bitstream"], [128, "bitstream"], [129, "bitstream"], [130, "bitstream"], [131, "bitstream"], [132, "bitstream"], [133, "bitstream"], [138, "bitstream"], [139, "bitstream"], [141, "bitstream"], [142, "bitstream"], [144, "bitstream"], [146, "bitstream"], [147, "bitstream"], [148, "bitstream"], [153, "bitstream"], [159, "bitstream"], [161, "bitstream"], [162, "bitstream"], [183, "bitstream"]], "Bitstream geometry": [[58, "bitstream-geometry"], [93, "bitstream-geometry"], [110, "bitstream-geometry"], [124, "bitstream-geometry"], [140, "bitstream-geometry"], [154, "bitstream-geometry"]], "Bitstream structure": [[1, "bitstream-structure"], [188, "bitstream-structure"]], "Bitstream structure \u2014 XC9500": [[15, "bitstream-structure-xc9500"]], "Bitstream structure \u2014 XC9500XL/XV": [[16, "bitstream-structure-xc9500xl-xv"]], "Bitstream \u2014 CLBLL": [[118, "bitstream-clbll"], [134, "bitstream-clbll"], [149, "bitstream-clbll"]], "Bitstream \u2014 CLBLM": [[118, "bitstream-clblm"], [134, "bitstream-clblm"], [149, "bitstream-clblm"]], "Bitstream \u2014 CLEXL": [[60, "bitstream-clexl"]], "Bitstream \u2014 CLEXM": [[60, "bitstream-clexm"]], "Bitstream \u2014 CLKC": [[61, "bitstream-clkc"]], "Bitstream \u2014 DCM_BUFPLL": [[61, "bitstream-dcm-bufpll"]], "Bitstream \u2014 HCLK": [[61, "bitstream-hclk"]], "Bitstream \u2014 HCLK_CLEXL": [[61, "bitstream-hclk-clexl"]], "Bitstream \u2014 HCLK_CLEXM": [[61, "bitstream-hclk-clexm"]], "Bitstream \u2014 HCLK_GTP": [[61, "bitstream-hclk-gtp"]], "Bitstream \u2014 HCLK_IOI": [[61, "bitstream-hclk-ioi"], [145, "bitstream-hclk-ioi"]], "Bitstream \u2014 HCLK_IOI_HP": [[160, "bitstream-hclk-ioi-hp"]], "Bitstream \u2014 HCLK_IOI_HR": [[160, "bitstream-hclk-ioi-hr"]], "Bitstream \u2014 HCLK_ROW": [[61, "bitstream-hclk-row"]], "Bitstream \u2014 INTF": [[128, "bitstream-intf"], [144, "bitstream-intf"], [159, "bitstream-intf"]], "Bitstream \u2014 INTF.BRAM": [[159, "bitstream-intf-bram"]], "Bitstream \u2014 INTF.DELAY": [[128, "bitstream-intf-delay"], [144, "bitstream-intf-delay"], [159, "bitstream-intf-delay"]], "Bitstream \u2014 IO": [[145, "bitstream-io"]], "Bitstream \u2014 IOB": [[69, "bitstream-iob"]], "Bitstream \u2014 IOI tile": [[68, "bitstream-ioi-tile"]], "Bitstream \u2014 IOI.BT": [[69, "bitstream-ioi-bt"]], "Bitstream \u2014 IOI.LR": [[69, "bitstream-ioi-lr"]], "Bitstream \u2014 IO_HP_BOT": [[160, "bitstream-io-hp-bot"]], "Bitstream \u2014 IO_HP_PAIR": [[160, "bitstream-io-hp-pair"]], "Bitstream \u2014 IO_HP_TOP": [[160, "bitstream-io-hp-top"]], "Bitstream \u2014 IO_HR_BOT": [[160, "bitstream-io-hr-bot"]], "Bitstream \u2014 IO_HR_PAIR": [[160, "bitstream-io-hr-pair"]], "Bitstream \u2014 IO_HR_TOP": [[160, "bitstream-io-hr-top"]], "Bitstream \u2014 LLH tiles": [[55, "bitstream-llh-tiles"]], "Bitstream \u2014 LLV tiles": [[55, "bitstream-llv-tiles"]], "Bitstream \u2014 PCILOGICSE": [[61, "bitstream-pcilogicse"]], "Bitstream \u2014 PLL_BUFPLL_B": [[61, "bitstream-pll-bufpll-b"]], "Bitstream \u2014 PLL_BUFPLL_OUT0": [[61, "bitstream-pll-bufpll-out0"]], "Bitstream \u2014 PLL_BUFPLL_OUT1": [[61, "bitstream-pll-bufpll-out1"]], "Bitstream \u2014 PLL_BUFPLL_T": [[61, "bitstream-pll-bufpll-t"]], "Bitstream \u2014 PowerPC hole tiles": [[97, "bitstream-powerpc-hole-tiles"]], "Bitstream \u2014 bottom tile": [[61, "bitstream-bottom-tile"]], "Bitstream \u2014 bottom tiles": [[38, "bitstream-bottom-tiles"], [47, "bitstream-bottom-tiles"], [89, "bitstream-bottom-tiles"]], "Bitstream \u2014 column bottom": [[78, "bitstream-column-bottom"]], "Bitstream \u2014 column top": [[78, "bitstream-column-top"]], "Bitstream \u2014 interconnect tiles": [[42, "bitstream-interconnect-tiles"], [55, "bitstream-interconnect-tiles"], [97, "bitstream-interconnect-tiles"]], "Bitstream \u2014 interface tile": [[113, "bitstream-interface-tile"]], "Bitstream \u2014 interface tiles": [[55, "bitstream-interface-tiles"], [68, "bitstream-interface-tiles"], [97, "bitstream-interface-tiles"]], "Bitstream \u2014 left side": [[78, "bitstream-left-side"]], "Bitstream \u2014 left tile": [[61, "bitstream-left-tile"]], "Bitstream \u2014 left tiles": [[47, "bitstream-left-tiles"]], "Bitstream \u2014 middle": [[78, "bitstream-middle"]], "Bitstream \u2014 normal tile": [[68, "bitstream-normal-tile"]], "Bitstream \u2014 right side": [[78, "bitstream-right-side"]], "Bitstream \u2014 right tile": [[61, "bitstream-right-tile"]], "Bitstream \u2014 right tiles": [[47, "bitstream-right-tiles"]], "Bitstream \u2014 terminator tiles": [[97, "bitstream-terminator-tiles"]], "Bitstream \u2014 top tile": [[61, "bitstream-top-tile"]], "Bitstream \u2014 top tiles": [[38, "bitstream-top-tiles"], [47, "bitstream-top-tiles"], [89, "bitstream-top-tiles"]], "Blank check \u2014 XC9500XL/XV": [[35, "blank-check-xc9500xl-xv"]], "Block RAM": [[45, "block-ram"], [59, "block-ram"], [78, "block-ram"], [102, "block-ram"], [116, "block-ram"], [132, "block-ram"], [147, "block-ram"]], "Block RAM \u2014 Virtex 2, Spartan 3": [[87, "block-ram-virtex-2-spartan-3"]], "Bond": [[17, "bond"], [189, "bond"]], "Boundary scan register": [[13, "boundary-scan-register"], [35, "boundary-scan-register"], [199, "boundary-scan-register"]], "CCLK_FREQ": [[49, "cclk-freq"], [62, "cclk-freq"]], "CLB": [[73, "clb"], [163, "clb"], [168, "clb"], [173, "clb"], [178, "clb"]], "CLB.B": [[73, "clb-b"], [163, "clb-b"], [168, "clb-b"], [173, "clb-b"], [178, "clb-b"]], "CLB.L": [[73, "clb-l"], [163, "clb-l"], [168, "clb-l"], [173, "clb-l"], [178, "clb-l"]], "CLB.LB": [[73, "clb-lb"], [163, "clb-lb"], [168, "clb-lb"], [173, "clb-lb"], [178, "clb-lb"]], "CLB.LT": [[73, "clb-lt"], [163, "clb-lt"], [168, "clb-lt"], [173, "clb-lt"], [178, "clb-lt"]], "CLB.R": [[73, "clb-r"], [163, "clb-r"], [168, "clb-r"], [173, "clb-r"], [178, "clb-r"]], "CLB.RB": [[73, "clb-rb"], [163, "clb-rb"], [168, "clb-rb"], [173, "clb-rb"], [178, "clb-rb"]], "CLB.RT": [[73, "clb-rt"], [163, "clb-rt"], [168, "clb-rt"], [173, "clb-rt"], [178, "clb-rt"]], "CLB.T": [[73, "clb-t"], [163, "clb-t"], [168, "clb-t"], [173, "clb-t"], [178, "clb-t"]], "CLKB": [[80, "clkb"], [187, "clkb"]], "CLKB.FC": [[38, "clkb-fc"]], "CLKB.S3": [[47, "clkb-s3"]], "CLKB.S3A": [[47, "clkb-s3a"]], "CLKB.S3E": [[47, "clkb-s3e"]], "CLKB.V2": [[89, "clkb-v2"]], "CLKB.V2P": [[89, "clkb-v2p"]], "CLKB.V2PX": [[89, "clkb-v2px"]], "CLKB_2DLL": [[80, "clkb-2dll"]], "CLKB_4DLL": [[80, "clkb-4dll"]], "CLKH": [[187, "clkh"]], "CLKL": [[86, "clkl"], [187, "clkl"]], "CLKL.S3A": [[47, "clkl-s3a"]], "CLKL.S3E": [[47, "clkl-s3e"]], "CLKR": [[86, "clkr"], [187, "clkr"]], "CLKR.S3A": [[47, "clkr-s3a"]], "CLKR.S3E": [[47, "clkr-s3e"]], "CLKT": [[80, "clkt"], [187, "clkt"]], "CLKT.FC": [[38, "clkt-fc"]], "CLKT.S3": [[47, "clkt-s3"]], "CLKT.S3A": [[47, "clkt-s3a"]], "CLKT.S3E": [[47, "clkt-s3e"]], "CLKT.V2": [[89, "clkt-v2"]], "CLKT.V2P": [[89, "clkt-v2p"]], "CLKT.V2PX": [[89, "clkt-v2px"]], "CLKT_2DLL": [[80, "clkt-2dll"]], "CLKT_4DLL": [[80, "clkt-4dll"]], "CLKV": [[187, "clkv"]], "CLKV.CLKV": [[80, "clkv-clkv"]], "CLKV.GCLKV": [[80, "clkv-gclkv"]], "CLKV_BRAM_BOT": [[80, "clkv-bram-bot"]], "CLKV_BRAM_TOP": [[80, "clkv-bram-top"]], "CLK_BALI_REBUF": [[150, "clk-bali-rebuf"]], "CLK_BUFG": [[150, "clk-bufg"]], "CLK_BUFG_REBUF": [[150, "clk-bufg-rebuf"]], "CLK_CMT_B": [[119, "clk-cmt-b"]], "CLK_CMT_T": [[119, "clk-cmt-t"]], "CLK_DCM_B": [[106, "clk-dcm-b"]], "CLK_DCM_T": [[106, "clk-dcm-t"]], "CLK_HROW": [[106, "clk-hrow"], [119, "clk-hrow"], [150, "clk-hrow"]], "CLK_IOB_B": [[106, "clk-iob-b"], [119, "clk-iob-b"]], "CLK_IOB_T": [[106, "clk-iob-t"], [119, "clk-iob-t"]], "CLK_MGT_B": [[119, "clk-mgt-b"]], "CLK_MGT_T": [[119, "clk-mgt-t"]], "CLK_TERM_B": [[106, "clk-term-b"]], "CLK_TERM_T": [[106, "clk-term-t"]], "CMT": [[120, "cmt"], [136, "cmt"], [151, "cmt"]], "CMT_BUFG_BOT": [[135, "cmt-bufg-bot"]], "CMT_BUFG_TOP": [[135, "cmt-bufg-top"]], "CMT_FIFO": [[151, "cmt-fifo"]], "CNR.BL": [[74, "cnr-bl"], [82, "cnr-bl"], [164, "cnr-bl"], [169, "cnr-bl"], [174, "cnr-bl"], [179, "cnr-bl"], [184, "cnr-bl"]], "CNR.BR": [[74, "cnr-br"], [82, "cnr-br"], [164, "cnr-br"], [169, "cnr-br"], [174, "cnr-br"], [179, "cnr-br"], [184, "cnr-br"]], "CNR.TL": [[74, "cnr-tl"], [82, "cnr-tl"], [164, "cnr-tl"], [169, "cnr-tl"], [174, "cnr-tl"], [179, "cnr-tl"], [184, "cnr-tl"]], "CNR.TR": [[74, "cnr-tr"], [82, "cnr-tr"], [164, "cnr-tr"], [169, "cnr-tr"], [174, "cnr-tr"], [179, "cnr-tr"], [184, "cnr-tr"]], "COR": [[81, "cor"], [90, "cor"], [107, "cor"], [121, "cor"], [137, "cor"], [152, "cor"]], "COR.FC": [[39, "cor-fc"]], "COR.S3": [[48, "cor-s3"]], "COR.S3E": [[48, "cor-s3e"]], "COR1": [[62, "cor1"], [121, "cor1"], [137, "cor1"], [152, "cor1"]], "COR1.S3A": [[49, "cor1-s3a"]], "COR2": [[62, "cor2"]], "COR2.S3A": [[49, "cor2-s3a"]], "CTL": [[62, "ctl"], [81, "ctl"], [90, "ctl"], [107, "ctl"], [121, "ctl"], [137, "ctl"], [152, "ctl"]], "CTL.S3": [[39, "ctl-s3"], [48, "ctl-s3"]], "CTL.S3A": [[49, "ctl-s3a"]], "CTL1": [[137, "ctl1"], [152, "ctl1"]], "Carry logic": [[46, "carry-logic"], [88, "carry-logic"]], "Center column": [[110, "center-column"], [124, "center-column"], [140, "center-column"]], "Center column and configuration center": [[154, "center-column-and-configuration-center"]], "Clock Companion Modules": [[103, "clock-companion-modules"]], "Clock divider": [[14, "clock-divider"]], "Clock interconnect": [[38, "clock-interconnect"], [47, "clock-interconnect"], [61, "clock-interconnect"], [80, "clock-interconnect"], [89, "clock-interconnect"], [106, "clock-interconnect"], [119, "clock-interconnect"], [135, "clock-interconnect"], [150, "clock-interconnect"]], "Clock management tile": [[120, "clock-management-tile"], [136, "clock-management-tile"], [151, "clock-management-tile"]], "Clock rows": [[58, "clock-rows"], [93, "clock-rows"]], "Clock source \u2014 left and right": [[47, "clock-source-left-and-right"]], "Clock source \u2014 spine bottom and top": [[38, "clock-source-spine-bottom-and-top"], [47, "clock-source-spine-bottom-and-top"], [89, "clock-source-spine-bottom-and-top"]], "Clock spine": [[93, "clock-spine"]], "Clock spine top and bottom": [[97, "clock-spine-top-and-bottom"]], "Configurable Logic Block": [[37, "configurable-logic-block"], [46, "configurable-logic-block"], [60, "configurable-logic-block"], [73, "configurable-logic-block"], [79, "configurable-logic-block"], [88, "configurable-logic-block"], [105, "configurable-logic-block"], [118, "configurable-logic-block"], [134, "configurable-logic-block"], [149, "configurable-logic-block"], [163, "configurable-logic-block"], [168, "configurable-logic-block"], [173, "configurable-logic-block"], [178, "configurable-logic-block"], [183, "configurable-logic-block"]], "Configuration Center": [[104, "configuration-center"], [117, "configuration-center"], [133, "configuration-center"], [148, "configuration-center"]], "Configuration pull-ups": [[36, "configuration-pull-ups"]], "Configuration registers": [[39, "configuration-registers"], [62, "configuration-registers"], [81, "configuration-registers"], [90, "configuration-registers"], [107, "configuration-registers"], [121, "configuration-registers"], [137, "configuration-registers"], [152, "configuration-registers"]], "Configuration registers \u2014 Spartan 3, Spartan 3E": [[48, "configuration-registers-spartan-3-spartan-3e"]], "Configuration registers \u2014 Spartan 3A and 3A DSP": [[49, "configuration-registers-spartan-3a-and-3a-dsp"]], "Contents:": [[0, null], [10, null], [11, null], [32, null], [33, null], [41, null], [44, null], [54, null], [67, null], [75, null], [84, null], [96, null], [112, null], [127, null], [143, null], [158, null], [165, null], [170, null], [175, null], [180, null], [185, null], [196, null], [197, null]], "Corners": [[40, "corners"], [50, "corners"], [63, "corners"], [74, "corners"], [82, "corners"], [91, "corners"], [164, "corners"], [169, "corners"], [174, "corners"], [179, "corners"], [184, "corners"]], "DCM output bus": [[89, "dcm-output-bus"]], "DCM.S3": [[51, "dcm-s3"]], "DCM.S3E.BL": [[52, "dcm-s3e-bl"]], "DCM.S3E.BR": [[52, "dcm-s3e-br"]], "DCM.S3E.LB": [[52, "dcm-s3e-lb"]], "DCM.S3E.LT": [[52, "dcm-s3e-lt"]], "DCM.S3E.RB": [[52, "dcm-s3e-rb"]], "DCM.S3E.RT": [[52, "dcm-s3e-rt"]], "DCM.S3E.TL": [[52, "dcm-s3e-tl"]], "DCM.S3E.TR": [[52, "dcm-s3e-tr"]], "DCM.V2": [[92, "dcm-v2"]], "DCM.V2P": [[92, "dcm-v2p"]], "DCMCONN.BOT": [[89, "dcmconn-bot"]], "DCMCONN.TOP": [[89, "dcmconn-top"]], "DESKEW_ADJUST": [[51, "deskew-adjust"], [52, "deskew-adjust"], [92, "deskew-adjust"]], "DLL.BOT": [[83, "dll-bot"]], "DLL.TOP": [[83, "dll-top"]], "DLLP.BOT": [[83, "dllp-bot"]], "DLLP.TOP": [[83, "dllp-top"]], "DLLS.BOT": [[83, "dlls-bot"]], "DLLS.TOP": [[83, "dlls-top"]], "DSP": [[53, "dsp"], [65, "dsp"], [109, "dsp"], [122, "dsp"], [138, "dsp"], [153, "dsp"]], "Database schema": [[17, "database-schema"], [189, "database-schema"]], "Database \u2014 devices": [[10, "database-devices"], [32, "database-devices"], [196, "database-devices"]], "Default option attributes": [[47, "default-option-attributes"]], "Default option values": [[45, "default-option-values"]], "Delay Locked Loop": [[83, "delay-locked-loop"]], "Device": [[17, "device"], [189, "device"]], "Device geometry": [[58, "device-geometry"], [93, "device-geometry"], [110, "device-geometry"], [124, "device-geometry"], [140, "device-geometry"], [154, "device-geometry"]], "Device pins": [[12, "device-pins"], [34, "device-pins"], [198, "device-pins"]], "Device structure": [[14, "device-structure"], [36, "device-structure"], [200, "device-structure"]], "Device table": [[56, "device-table"], [98, "device-table"]], "Devices": [[12, "devices"], [34, "devices"], [198, "devices"]], "Digital Clock Managers": [[92, "digital-clock-managers"], [108, "digital-clock-managers"]], "Digital Clock Managers \u2014 Spartan 3": [[51, "digital-clock-managers-spartan-3"]], "Digital Clock Managers \u2014 Spartan 3E, 3A": [[52, "digital-clock-managers-spartan-3e-3a"]], "Digital clock manager": [[64, "digital-clock-manager"]], "Dual-port 16\u00d7X RAM": [[46, "dual-port-16x-ram"], [88, "dual-port-16x-ram"]], "Dual-port 32\u00d7X RAM": [[88, "dual-port-32x-ram"]], "Dual-port 64\u00d71 RAM": [[88, "dual-port-641-ram"]], "ECC": [[110, "ecc"], [124, "ecc"], [140, "ecc"], [154, "ecc"]], "ECC mode": [[102, "ecc-mode"]], "EYE_MASK": [[62, "eye-mask"]], "Entering and exiting ISP mode \u2014 XC9500": [[35, "entering-and-exiting-isp-mode-xc9500"]], "Entering and exiting ISP mode \u2014 XC9500XL/XV": [[35, "entering-and-exiting-isp-mode-xc9500xl-xv"]], "Erasing fuses \u2014 XC9500": [[35, "erasing-fuses-xc9500"]], "Erasing fuses \u2014 XC9500XL/XV": [[35, "erasing-fuses-xc9500xl-xv"]], "Ethernet MACs": [[123, "ethernet-macs"], [139, "ethernet-macs"]], "FB columns and rows": [[200, "fb-columns-and-rows"]], "FB global fuses": [[36, "fb-global-fuses"]], "FCLK networks": [[200, "fclk-networks"]], "FIFO mode": [[102, "fifo-mode"]], "FPGAcore": [[41, "fpgacore"]], "Flip-flop": [[36, "flip-flop"]], "Frequency": [[35, "frequency"]], "Fuses \u2014 FB inputs": [[15, "fuses-fb-inputs"], [16, "fuses-fb-inputs"]], "Fuses \u2014 FBs": [[188, "fuses-fbs"]], "Fuses \u2014 IMUX bits": [[188, "fuses-imux-bits"]], "Fuses \u2014 UIM wire-AND": [[15, "fuses-uim-wire-and"]], "Fuses \u2014 global bits": [[188, "fuses-global-bits"]], "Fuses \u2014 input buffer enable": [[15, "fuses-input-buffer-enable"]], "Fuses \u2014 macrocells": [[15, "fuses-macrocells"], [16, "fuses-macrocells"], [188, "fuses-macrocells"]], "Fuses \u2014 per-FB bits and globals": [[15, "fuses-per-fb-bits-and-globals"], [16, "fuses-per-fb-bits-and-globals"]], "Fuses \u2014 product and sum terms": [[188, "fuses-product-and-sum-terms"]], "Fuses \u2014 product terms": [[15, "fuses-product-terms"], [16, "fuses-product-terms"]], "GCLKC": [[89, "gclkc"]], "GCLKC.B": [[89, "gclkc-b"]], "GCLKC.T": [[89, "gclkc-t"]], "GCLKH": [[38, "gclkh"], [47, "gclkh"], [89, "gclkh"]], "GCLKH.N": [[47, "gclkh-n"]], "GCLKH.S": [[47, "gclkh-s"]], "GCLKH.UNI": [[47, "gclkh-uni"]], "GCLKH.UNI.N": [[47, "gclkh-uni-n"]], "GCLKH.UNI.S": [[47, "gclkh-uni-s"]], "GCLKVM.S3": [[38, "gclkvm-s3"], [47, "gclkvm-s3"]], "GCLKVM.S3E": [[47, "gclkvm-s3e"]], "GENERAL5": [[62, "general5"]], "GENERAL[12]": [[49, "general-12"], [62, "general-12"]], "GENERAL[34]": [[62, "general-34"]], "GIGABIT.B": [[94, "gigabit-b"]], "GIGABIT.T": [[94, "gigabit-t"]], "GIGABIT10.B": [[95, "gigabit10-b"]], "GIGABIT10.T": [[95, "gigabit10-t"]], "GTH transceivers": [[141, "gth-transceivers"], [155, "gth-transceivers"]], "GTH_CHANNEL": [[155, "gth-channel"]], "GTH_COMMON": [[155, "gth-common"]], "GTP and GTX right column holes": [[154, "gtp-and-gtx-right-column-holes"]], "GTP transceivers": [[125, "gtp-transceivers"], [156, "gtp-transceivers"]], "GTP_CHANNEL": [[156, "gtp-channel"]], "GTP_CHANNEL_MID": [[156, "gtp-channel-mid"]], "GTP_COMMON": [[156, "gtp-common"]], "GTP_COMMON_MID": [[156, "gtp-common-mid"]], "GTX transceivers": [[126, "gtx-transceivers"], [142, "gtx-transceivers"], [157, "gtx-transceivers"]], "GTX_CHANNEL": [[157, "gtx-channel"]], "GTX_COMMON": [[157, "gtx-common"]], "General Interconnect": [[113, "general-interconnect"]], "General interconnect": [[42, "general-interconnect"], [55, "general-interconnect"], [68, "general-interconnect"], [97, "general-interconnect"]], "General structure": [[58, "general-structure"], [93, "general-structure"], [110, "general-structure"], [124, "general-structure"], [140, "general-structure"], [154, "general-structure"]], "Global bits": [[2, "global-bits"], [3, "global-bits"], [4, "global-bits"], [5, "global-bits"], [6, "global-bits"], [7, "global-bits"], [8, "global-bits"], [9, "global-bits"], [190, "global-bits"], [191, "global-bits"], [192, "global-bits"], [193, "global-bits"], [194, "global-bits"], [195, "global-bits"]], "Global networks": [[14, "global-networks"]], "Global networks \u2014 XC9500": [[36, "global-networks-xc9500"]], "Global networks \u2014 XC9500XL/XV": [[36, "global-networks-xc9500xl-xv"]], "HCLK": [[106, "hclk"], [119, "hclk"], [135, "hclk"], [150, "hclk"]], "HCLK_CENTER": [[106, "hclk-center"]], "HCLK_CENTER_ABOVE_CFG": [[106, "hclk-center-above-cfg"]], "HCLK_CMT": [[119, "hclk-cmt"]], "HCLK_CMT_IOI": [[119, "hclk-cmt-ioi"]], "HCLK_DCM": [[106, "hclk-dcm"]], "HCLK_DCMIOB": [[106, "hclk-dcmiob"]], "HCLK_IOBDCM": [[106, "hclk-iobdcm"]], "HCLK_IOI": [[119, "hclk-ioi"]], "HCLK_IOIS_DCI": [[106, "hclk-iois-dci"]], "HCLK_IOIS_LVDS": [[106, "hclk-iois-lvds"]], "HCLK_IOI_BOTCEN": [[119, "hclk-ioi-botcen"]], "HCLK_IOI_CENTER": [[119, "hclk-ioi-center"]], "HCLK_IOI_CMT": [[119, "hclk-ioi-cmt"]], "HCLK_IOI_TOPCEN": [[119, "hclk-ioi-topcen"]], "HCLK_MGT": [[106, "hclk-mgt"]], "HCLK_TERM_L": [[106, "hclk-term-l"]], "HCLK_TERM_R": [[106, "hclk-term-r"]], "HC_OPT": [[49, "hc-opt"], [62, "hc-opt"]], "Hard PCI logic": [[100, "hard-pci-logic"]], "Hard PowerPC 405 cores": [[101, "hard-powerpc-405-cores"]], "Horizontal clock spine": [[58, "horizontal-clock-spine"]], "I/O banks and special functions": [[114, "i-o-banks-and-special-functions"], [129, "i-o-banks-and-special-functions"], [145, "i-o-banks-and-special-functions"], [160, "i-o-banks-and-special-functions"]], "I/O buffer tiles": [[43, "i-o-buffer-tiles"]], "I/O buffers \u2014 Spartan 3": [[57, "i-o-buffers-spartan-3"]], "I/O buffers \u2014 Spartan 3A": [[57, "i-o-buffers-spartan-3a"]], "I/O buffers \u2014 Spartan 3E": [[57, "i-o-buffers-spartan-3e"]], "I/O buffers \u2014 Virtex": [[85, "i-o-buffers-virtex"]], "I/O buffers \u2014 Virtex 2": [[99, "i-o-buffers-virtex-2"]], "I/O buffers \u2014 Virtex 2 Pro": [[99, "i-o-buffers-virtex-2-pro"]], "I/O buffers \u2014 Virtex E": [[85, "i-o-buffers-virtex-e"]], "I/O data \u2014 Spartan 3": [[50, "i-o-data-spartan-3"]], "I/O data \u2014 Spartan 3A": [[50, "i-o-data-spartan-3a"]], "I/O data \u2014 Spartan 3E": [[50, "i-o-data-spartan-3e"]], "I/O data \u2014 Virtex 2": [[91, "i-o-data-virtex-2"]], "I/O data \u2014 Virtex 2 Pro": [[91, "i-o-data-virtex-2-pro"]], "I/O interface": [[43, "i-o-interface"], [57, "i-o-interface"], [99, "i-o-interface"]], "I/O pins": [[2, "i-o-pins"], [3, "i-o-pins"], [4, "i-o-pins"], [5, "i-o-pins"], [6, "i-o-pins"], [7, "i-o-pins"], [8, "i-o-pins"], [9, "i-o-pins"], [18, "i-o-pins"], [19, "i-o-pins"], [20, "i-o-pins"], [21, "i-o-pins"], [22, "i-o-pins"], [23, "i-o-pins"], [24, "i-o-pins"], [25, "i-o-pins"], [26, "i-o-pins"], [27, "i-o-pins"], [28, "i-o-pins"], [29, "i-o-pins"], [30, "i-o-pins"], [31, "i-o-pins"], [190, "i-o-pins"], [191, "i-o-pins"], [192, "i-o-pins"], [193, "i-o-pins"], [194, "i-o-pins"], [195, "i-o-pins"]], "I/O standard data": [[106, "i-o-standard-data"], [119, "i-o-standard-data"]], "IDCODE": [[35, "idcode"], [199, "idcode"]], "IMUX bits": [[2, "imux-bits"], [3, "imux-bits"], [4, "imux-bits"], [5, "imux-bits"], [6, "imux-bits"], [7, "imux-bits"], [8, "imux-bits"], [9, "imux-bits"], [18, "imux-bits"], [19, "imux-bits"], [20, "imux-bits"], [21, "imux-bits"], [22, "imux-bits"], [23, "imux-bits"], [24, "imux-bits"], [25, "imux-bits"], [26, "imux-bits"], [27, "imux-bits"], [28, "imux-bits"], [29, "imux-bits"], [30, "imux-bits"], [31, "imux-bits"], [190, "imux-bits"], [191, "imux-bits"], [192, "imux-bits"], [193, "imux-bits"], [194, "imux-bits"], [195, "imux-bits"]], "INT.BRAM": [[97, "int-bram"]], "INT.BRAM.S3": [[55, "int-bram-s3"]], "INT.BRAM.S3A.03": [[55, "int-bram-s3a-03"]], "INT.BRAM.S3A.12": [[55, "int-bram-s3a-12"]], "INT.BRAM.S3ADSP": [[55, "int-bram-s3adsp"]], "INT.BRAM.S3E": [[55, "int-bram-s3e"]], "INT.CLB": [[42, "int-clb"], [55, "int-clb"], [97, "int-clb"]], "INT.CNR": [[97, "int-cnr"]], "INT.DCM": [[55, "int-dcm"]], "INT.DCM.S3E.DUMMY": [[55, "int-dcm-s3e-dummy"]], "INT.DCM.V2": [[97, "int-dcm-v2"]], "INT.DCM.V2P": [[97, "int-dcm-v2p"]], "INT.GT.CLKPAD": [[97, "int-gt-clkpad"]], "INT.IOI": [[97, "int-ioi"]], "INT.IOI.CLK_B": [[97, "int-ioi-clk-b"]], "INT.IOI.CLK_T": [[97, "int-ioi-clk-t"]], "INT.IOI.FC": [[42, "int-ioi-fc"]], "INT.IOI.S3": [[55, "int-ioi-s3"]], "INT.IOI.S3A.LR": [[55, "int-ioi-s3a-lr"]], "INT.IOI.S3A.TB": [[55, "int-ioi-s3a-tb"]], "INT.IOI.S3E": [[55, "int-ioi-s3e"]], "INT.PPC": [[97, "int-ppc"]], "INTF": [[68, "intf"]], "INTF.CMT": [[68, "intf-cmt"]], "INTF.CMT.IOI": [[68, "intf-cmt-ioi"]], "INTF.DSP": [[55, "intf-dsp"]], "INTF.GT.B0": [[97, "intf-gt-b0"]], "INTF.GT.B123": [[97, "intf-gt-b123"]], "INTF.GT.BCLKPAD": [[97, "intf-gt-bclkpad"]], "INTF.GT.T0": [[97, "intf-gt-t0"]], "INTF.GT.T123": [[97, "intf-gt-t123"]], "INTF.GT.TCLKPAD": [[97, "intf-gt-tclkpad"]], "INTF.IOI": [[68, "intf-ioi"]], "INTF.PPC": [[97, "intf-ppc"]], "IO and transceiver placement": [[154, "io-and-transceiver-placement"]], "IO banks and IO buffers": [[58, "io-banks-and-io-buffers"], [93, "io-banks-and-io-buffers"]], "IO clock nodes": [[106, "io-clock-nodes"], [119, "io-clock-nodes"]], "IO.B": [[76, "io-b"], [85, "io-b"], [166, "io-b"], [171, "io-b"], [176, "io-b"], [181, "io-b"], [186, "io-b"]], "IO.B.R": [[76, "io-b-r"], [166, "io-b-r"], [171, "io-b-r"], [176, "io-b-r"], [181, "io-b-r"]], "IO.BS": [[76, "io-bs"], [166, "io-bs"], [171, "io-bs"], [176, "io-bs"], [181, "io-bs"]], "IO.BS.L": [[76, "io-bs-l"], [166, "io-bs-l"], [171, "io-bs-l"], [176, "io-bs-l"], [181, "io-bs-l"]], "IO.L": [[76, "io-l"], [85, "io-l"], [166, "io-l"], [171, "io-l"], [176, "io-l"], [181, "io-l"], [186, "io-l"]], "IO.L.FB": [[171, "io-l-fb"], [176, "io-l-fb"], [181, "io-l-fb"]], "IO.L.FT": [[171, "io-l-ft"], [176, "io-l-ft"], [181, "io-l-ft"]], "IO.L.T": [[76, "io-l-t"], [166, "io-l-t"], [171, "io-l-t"], [176, "io-l-t"], [181, "io-l-t"]], "IO.LS": [[76, "io-ls"], [166, "io-ls"], [171, "io-ls"], [176, "io-ls"], [181, "io-ls"]], "IO.LS.B": [[76, "io-ls-b"], [166, "io-ls-b"], [171, "io-ls-b"], [176, "io-ls-b"], [181, "io-ls-b"]], "IO.LS.FB": [[171, "io-ls-fb"], [176, "io-ls-fb"], [181, "io-ls-fb"]], "IO.LS.FT": [[171, "io-ls-ft"], [176, "io-ls-ft"], [181, "io-ls-ft"]], "IO.R": [[76, "io-r"], [85, "io-r"], [166, "io-r"], [171, "io-r"], [176, "io-r"], [181, "io-r"], [186, "io-r"]], "IO.R.FB": [[171, "io-r-fb"], [176, "io-r-fb"], [181, "io-r-fb"]], "IO.R.FT": [[171, "io-r-ft"], [176, "io-r-ft"], [181, "io-r-ft"]], "IO.R.T": [[76, "io-r-t"], [166, "io-r-t"], [171, "io-r-t"], [176, "io-r-t"], [181, "io-r-t"]], "IO.RS": [[76, "io-rs"], [166, "io-rs"], [171, "io-rs"], [176, "io-rs"], [181, "io-rs"]], "IO.RS.B": [[76, "io-rs-b"], [166, "io-rs-b"], [171, "io-rs-b"], [176, "io-rs-b"], [181, "io-rs-b"]], "IO.RS.FB": [[171, "io-rs-fb"], [176, "io-rs-fb"], [181, "io-rs-fb"]], "IO.RS.FT": [[171, "io-rs-ft"], [176, "io-rs-ft"], [181, "io-rs-ft"]], "IO.T": [[76, "io-t"], [85, "io-t"], [166, "io-t"], [171, "io-t"], [176, "io-t"], [181, "io-t"], [186, "io-t"]], "IO.T.R": [[76, "io-t-r"], [166, "io-t-r"], [171, "io-t-r"], [176, "io-t-r"], [181, "io-t-r"]], "IO.TS": [[76, "io-ts"], [166, "io-ts"], [171, "io-ts"], [176, "io-ts"], [181, "io-ts"]], "IO.TS.L": [[76, "io-ts-l"], [166, "io-ts-l"], [171, "io-ts-l"], [176, "io-ts-l"], [181, "io-ts-l"]], "IOB.B.V": [[85, "iob-b-v"]], "IOB.B.VE": [[85, "iob-b-ve"]], "IOB.L.V": [[85, "iob-l-v"]], "IOB.L.VE": [[85, "iob-l-ve"]], "IOB.R.V": [[85, "iob-r-v"]], "IOB.R.VE": [[85, "iob-r-ve"]], "IOB.T.V": [[85, "iob-t-v"]], "IOB.T.VE": [[85, "iob-t-ve"]], "IOBS.FC.B": [[43, "iobs-fc-b"]], "IOBS.FC.L": [[43, "iobs-fc-l"]], "IOBS.FC.R": [[43, "iobs-fc-r"]], "IOBS.FC.T": [[43, "iobs-fc-t"]], "IOBS.S3.B2": [[57, "iobs-s3-b2"]], "IOBS.S3.L1": [[57, "iobs-s3-l1"]], "IOBS.S3.R1": [[57, "iobs-s3-r1"]], "IOBS.S3.T2": [[57, "iobs-s3-t2"]], "IOBS.S3A.B2": [[57, "iobs-s3a-b2"]], "IOBS.S3A.L4": [[57, "iobs-s3a-l4"]], "IOBS.S3A.R4": [[57, "iobs-s3a-r4"]], "IOBS.S3A.T2": [[57, "iobs-s3a-t2"]], "IOBS.S3E.B1": [[57, "iobs-s3e-b1"]], "IOBS.S3E.B2": [[57, "iobs-s3e-b2"]], "IOBS.S3E.B3": [[57, "iobs-s3e-b3"]], "IOBS.S3E.B4": [[57, "iobs-s3e-b4"]], "IOBS.S3E.L1": [[57, "iobs-s3e-l1"]], "IOBS.S3E.L2": [[57, "iobs-s3e-l2"]], "IOBS.S3E.L3": [[57, "iobs-s3e-l3"]], "IOBS.S3E.L4": [[57, "iobs-s3e-l4"]], "IOBS.S3E.R1": [[57, "iobs-s3e-r1"]], "IOBS.S3E.R2": [[57, "iobs-s3e-r2"]], "IOBS.S3E.R3": [[57, "iobs-s3e-r3"]], "IOBS.S3E.R4": [[57, "iobs-s3e-r4"]], "IOBS.S3E.T1": [[57, "iobs-s3e-t1"]], "IOBS.S3E.T2": [[57, "iobs-s3e-t2"]], "IOBS.S3E.T3": [[57, "iobs-s3e-t3"]], "IOBS.S3E.T4": [[57, "iobs-s3e-t4"]], "IOBS.V2.B.L2": [[99, "iobs-v2-b-l2"]], "IOBS.V2.B.R2": [[99, "iobs-v2-b-r2"]], "IOBS.V2.L.B2": [[99, "iobs-v2-l-b2"]], "IOBS.V2.L.T2": [[99, "iobs-v2-l-t2"]], "IOBS.V2.R.B2": [[99, "iobs-v2-r-b2"]], "IOBS.V2.R.T2": [[99, "iobs-v2-r-t2"]], "IOBS.V2.T.L2": [[99, "iobs-v2-t-l2"]], "IOBS.V2.T.R2": [[99, "iobs-v2-t-r2"]], "IOBS.V2P.B.L1": [[99, "iobs-v2p-b-l1"]], "IOBS.V2P.B.L1.ALT": [[99, "iobs-v2p-b-l1-alt"]], "IOBS.V2P.B.L2": [[99, "iobs-v2p-b-l2"]], "IOBS.V2P.B.R1": [[99, "iobs-v2p-b-r1"]], "IOBS.V2P.B.R1.ALT": [[99, "iobs-v2p-b-r1-alt"]], "IOBS.V2P.B.R2": [[99, "iobs-v2p-b-r2"]], "IOBS.V2P.B.R2.CLK": [[99, "iobs-v2p-b-r2-clk"]], "IOBS.V2P.L.B2": [[99, "iobs-v2p-l-b2"]], "IOBS.V2P.L.T2": [[99, "iobs-v2p-l-t2"]], "IOBS.V2P.R.B2": [[99, "iobs-v2p-r-b2"]], "IOBS.V2P.R.T2": [[99, "iobs-v2p-r-t2"]], "IOBS.V2P.T.L1": [[99, "iobs-v2p-t-l1"]], "IOBS.V2P.T.L1.ALT": [[99, "iobs-v2p-t-l1-alt"]], "IOBS.V2P.T.L2": [[99, "iobs-v2p-t-l2"]], "IOBS.V2P.T.R1": [[99, "iobs-v2p-t-r1"]], "IOBS.V2P.T.R1.ALT": [[99, "iobs-v2p-t-r1-alt"]], "IOBS.V2P.T.R2": [[99, "iobs-v2p-t-r2"]], "IOBS.V2P.T.R2.CLK": [[99, "iobs-v2p-t-r2-clk"]], "IOI": [[99, "ioi"]], "IOI.CLK_B": [[99, "ioi-clk-b"]], "IOI.CLK_T": [[99, "ioi-clk-t"]], "IOI.FC": [[43, "ioi-fc"]], "IOI.S3": [[57, "ioi-s3"]], "IOI.S3A.B": [[57, "ioi-s3a-b"]], "IOI.S3A.LR": [[57, "ioi-s3a-lr"]], "IOI.S3A.T": [[57, "ioi-s3a-t"]], "IOI.S3E": [[57, "ioi-s3e"]], "IR": [[13, "ir"], [35, "ir"], [199, "ir"]], "ISP DR registers \u2014 XC9500": [[35, "isp-dr-registers-xc9500"]], "ISP DR registers \u2014 XC9500XL/XV": [[35, "isp-dr-registers-xc9500xl-xv"]], "ISP instructions": [[13, "isp-instructions"], [199, "isp-instructions"]], "ISP instructions \u2014 XC9500": [[35, "isp-instructions-xc9500"]], "ISP instructions \u2014 XC9500XL/XV": [[35, "isp-instructions-xc9500xl-xv"]], "Input / Output": [[43, "input-output"], [57, "input-output"], [99, "input-output"]], "Input multiplexers": [[55, "input-multiplexers"], [97, "input-multiplexers"]], "Input/Output": [[69, "input-output"], [76, "input-output"], [85, "input-output"], [114, "input-output"], [129, "input-output"], [145, "input-output"], [160, "input-output"], [166, "input-output"], [171, "input-output"], [176, "input-output"], [181, "input-output"], [186, "input-output"]], "Input/output buffer": [[14, "input-output-buffer"], [36, "input-output-buffer"], [200, "input-output-buffer"]], "Interconnect": [[128, "interconnect"], [144, "interconnect"], [159, "interconnect"]], "Introduction": [[12, "introduction"], [34, "introduction"], [56, "introduction"], [98, "introduction"], [198, "introduction"]], "JED bits": [[189, "jed-bits"]], "JED format mapping": [[15, "jed-format-mapping"], [16, "jed-format-mapping"]], "JED mapping": [[2, "jed-mapping"], [3, "jed-mapping"], [4, "jed-mapping"], [4, "id1"], [5, "jed-mapping"], [5, "id1"], [6, "jed-mapping"], [7, "jed-mapping"], [8, "jed-mapping"], [8, "id1"], [9, "jed-mapping"], [9, "id1"], [188, "jed-mapping"], [190, "jed-mapping"], [191, "jed-mapping"], [192, "jed-mapping"], [193, "jed-mapping"], [194, "jed-mapping"], [195, "jed-mapping"]], "JED mapping \u2014 MCs with IOBs": [[2, "jed-mapping-mcs-with-iobs"], [3, "jed-mapping-mcs-with-iobs"], [6, "jed-mapping-mcs-with-iobs"], [7, "jed-mapping-mcs-with-iobs"]], "JED mapping \u2014 MCs without IOBs": [[2, "jed-mapping-mcs-without-iobs"], [3, "jed-mapping-mcs-without-iobs"], [6, "jed-mapping-mcs-without-iobs"], [7, "jed-mapping-mcs-without-iobs"]], "JED mapping \u2014 macrocells with IOB": [[188, "jed-mapping-macrocells-with-iob"]], "JED mapping \u2014 macrocells without IOB": [[188, "jed-mapping-macrocells-without-iob"]], "JED structure": [[188, "jed-structure"]], "JTAG interface": [[13, "jtag-interface"], [35, "jtag-interface"], [199, "jtag-interface"]], "LL.FC": [[40, "ll-fc"]], "LL.S3": [[50, "ll-s3"]], "LL.S3A": [[50, "ll-s3a"]], "LL.S3E": [[50, "ll-s3e"]], "LL.V2": [[91, "ll-v2"]], "LL.V2P": [[91, "ll-v2p"]], "LLH": [[55, "llh"]], "LLH.CLB": [[77, "llh-clb"], [167, "llh-clb"]], "LLH.CLB.B": [[77, "llh-clb-b"], [167, "llh-clb-b"]], "LLH.CLKB.S3A": [[55, "llh-clkb-s3a"]], "LLH.CLKT.S3A": [[55, "llh-clkt-s3a"]], "LLH.IO.B": [[77, "llh-io-b"], [167, "llh-io-b"]], "LLH.IO.T": [[77, "llh-io-t"], [167, "llh-io-t"]], "LLHC.CLB": [[172, "llhc-clb"], [177, "llhc-clb"], [182, "llhc-clb"]], "LLHC.CLB.B": [[172, "llhc-clb-b"], [177, "llhc-clb-b"], [182, "llhc-clb-b"]], "LLHC.IO.B": [[172, "llhc-io-b"], [177, "llhc-io-b"], [182, "llhc-io-b"]], "LLHC.IO.T": [[172, "llhc-io-t"], [177, "llhc-io-t"], [182, "llhc-io-t"]], "LLHQ.CLB": [[172, "llhq-clb"], [177, "llhq-clb"], [182, "llhq-clb"]], "LLHQ.CLB.B": [[172, "llhq-clb-b"], [177, "llhq-clb-b"], [182, "llhq-clb-b"]], "LLHQ.CLB.T": [[172, "llhq-clb-t"], [177, "llhq-clb-t"], [182, "llhq-clb-t"]], "LLHQ.IO.B": [[172, "llhq-io-b"], [177, "llhq-io-b"], [182, "llhq-io-b"]], "LLHQ.IO.T": [[172, "llhq-io-t"], [177, "llhq-io-t"], [182, "llhq-io-t"]], "LLV.CLB": [[77, "llv-clb"], [167, "llv-clb"]], "LLV.IO.L": [[77, "llv-io-l"], [167, "llv-io-l"]], "LLV.IO.R": [[77, "llv-io-r"], [167, "llv-io-r"]], "LLV.S3A": [[55, "llv-s3a"]], "LLV.S3E": [[55, "llv-s3e"]], "LLVC.CLB": [[172, "llvc-clb"], [177, "llvc-clb"], [182, "llvc-clb"]], "LLVC.IO.L": [[172, "llvc-io-l"], [177, "llvc-io-l"], [182, "llvc-io-l"]], "LLVC.IO.R": [[172, "llvc-io-r"], [177, "llvc-io-r"], [182, "llvc-io-r"]], "LLVQ.CLB": [[172, "llvq-clb"], [177, "llvq-clb"], [182, "llvq-clb"]], "LLVQ.IO.L.B": [[172, "llvq-io-l-b"], [177, "llvq-io-l-b"], [182, "llvq-io-l-b"]], "LLVQ.IO.L.T": [[172, "llvq-io-l-t"], [177, "llvq-io-l-t"], [182, "llvq-io-l-t"]], "LLVQ.IO.R.B": [[172, "llvq-io-r-b"], [177, "llvq-io-r-b"], [182, "llvq-io-r-b"]], "LLVQ.IO.R.T": [[172, "llvq-io-r-t"], [177, "llvq-io-r-t"], [182, "llvq-io-r-t"]], "LR.FC": [[40, "lr-fc"]], "LR.S3": [[50, "lr-s3"]], "LR.S3A": [[50, "lr-s3a"]], "LR.S3E": [[50, "lr-s3e"]], "LR.V2": [[91, "lr-v2"]], "LR.V2P": [[91, "lr-v2p"]], "LUT RAM": [[46, "lut-ram"], [88, "lut-ram"]], "LUTs": [[46, "luts"], [88, "luts"]], "Local control terms": [[200, "local-control-terms"]], "Long line splitters": [[55, "long-line-splitters"]], "Lower left": [[40, "lower-left"], [50, "lower-left"], [63, "lower-left"], [91, "lower-left"]], "Lower right": [[40, "lower-right"], [50, "lower-right"], [63, "lower-right"], [91, "lower-right"]], "MC bits": [[2, "mc-bits"], [3, "mc-bits"], [4, "mc-bits"], [5, "mc-bits"], [6, "mc-bits"], [7, "mc-bits"], [8, "mc-bits"], [9, "mc-bits"]], "MGT clock repeater": [[106, "mgt-clock-repeater"], [119, "mgt-clock-repeater"]], "MMCM Tables": [[151, "mmcm-tables"]], "MODE": [[49, "mode"], [62, "mode"]], "Macrocell and IOB outputs": [[14, "macrocell-and-iob-outputs"], [200, "macrocell-and-iob-outputs"]], "Macrocell output \u2014 XC9500": [[36, "macrocell-output-xc9500"]], "Macrocell output \u2014 XC9500XL/XV": [[36, "macrocell-output-xc9500xl-xv"]], "Memory Controller Block": [[70, "memory-controller-block"]], "Middle GTP holes": [[154, "middle-gtp-holes"]], "Misc configuration": [[14, "misc-configuration"], [36, "misc-configuration"], [200, "misc-configuration"]], "Multi-gigabit transceivers": [[66, "multi-gigabit-transceivers"], [111, "multi-gigabit-transceivers"]], "Multi-gigabit transceivers \u2014 Virtex 2 Pro": [[94, "multi-gigabit-transceivers-virtex-2-pro"]], "Multi-gigabit transceivers \u2014 Virtex 2 Pro X": [[95, "multi-gigabit-transceivers-virtex-2-pro-x"]], "Output multiplexers": [[88, "output-multiplexers"]], "Output multiplexers \u2014 Spartan 3": [[46, "output-multiplexers-spartan-3"]], "Output multiplexers \u2014 Virtex 4": [[46, "output-multiplexers-virtex-4"]], "Overview": [[14, "overview"], [36, "overview"], [200, "overview"]], "PCI Express": [[71, "pci-express"]], "PCI Express Gen2 cores": [[161, "pci-express-gen2-cores"]], "PCI Express Gen3 cores": [[162, "pci-express-gen3-cores"]], "PCI Express cores": [[130, "pci-express-cores"], [146, "pci-express-cores"]], "PCI Express holes": [[154, "pci-express-holes"]], "PCI Logic": [[86, "pci-logic"]], "PCI logic": [[93, "pci-logic"]], "PCI_CE_DELAY": [[61, "pci-ce-delay"]], "PLL Tables": [[151, "pll-tables"]], "PMA_SPEED values": [[95, "pma-speed-values"]], "PMVIOB": [[135, "pmviob"]], "POWERDOWN": [[49, "powerdown"], [62, "powerdown"]], "PPC.E": [[97, "ppc-e"]], "PPC.N": [[97, "ppc-n"]], "PPC.S": [[97, "ppc-s"]], "PPC.W": [[97, "ppc-w"]], "PT import/export": [[36, "pt-import-export"]], "PU_GTS": [[49, "pu-gts"], [62, "pu-gts"]], "PU_GWE": [[49, "pu-gwe"], [62, "pu-gwe"]], "Packages": [[12, "packages"], [34, "packages"], [198, "packages"]], "Part": [[17, "part"], [189, "part"]], "Phase-locked loop": [[72, "phase-locked-loop"]], "PowerPC cores": [[131, "powerpc-cores"]], "PowerPC holes": [[93, "powerpc-holes"], [97, "powerpc-holes"], [110, "powerpc-holes"], [124, "powerpc-holes"]], "Primary vertical clock spine": [[58, "primary-vertical-clock-spine"]], "Primitive outputs": [[55, "primitive-outputs"], [97, "primitive-outputs"]], "Processing system": [[154, "processing-system"]], "Product terms": [[14, "product-terms"], [36, "product-terms"], [200, "product-terms"]], "Programming fuses \u2014 XC9500": [[35, "programming-fuses-xc9500"]], "Programming fuses \u2014 XC9500XL/XV": [[35, "programming-fuses-xc9500xl-xv"]], "Programming sequence": [[13, "programming-sequence"], [35, "programming-sequence"], [199, "programming-sequence"]], "Project Combine": [[0, "project-combine"]], "RANDOR": [[37, "randor"], [46, "randor"]], "RANDOR_INIT": [[37, "randor-init"], [46, "randor-init"]], "RESERVED_ANDOR": [[37, "reserved-andor"], [46, "reserved-andor"]], "Reading fuses \u2014 XC9500": [[35, "reading-fuses-xc9500"]], "Reading fuses \u2014 XC9500XL/XV": [[35, "reading-fuses-xc9500xl-xv"]], "Register": [[14, "register"], [200, "register"]], "Registers": [[46, "registers"], [88, "registers"]], "Row clock terminators": [[106, "row-clock-terminators"]], "SEU_OPT": [[49, "seu-opt"], [62, "seu-opt"]], "Secondary vertical clock spines": [[58, "secondary-vertical-clock-spines"]], "Shift registers": [[46, "shift-registers"], [88, "shift-registers"]], "Single-port 128\u00d71 RAM": [[88, "single-port-1281-ram"]], "Single-port 16\u00d7X RAM": [[46, "single-port-16x-ram"], [88, "single-port-16x-ram"]], "Single-port 32\u00d7X RAM": [[46, "single-port-32x-ram"], [88, "single-port-32x-ram"]], "Single-port 64\u00d71 RAM": [[46, "single-port-641-ram"]], "Single-port 64\u00d7X RAM": [[88, "single-port-64x-ram"]], "Spartan 3": [[54, "spartan-3"]], "Spartan 3A DCMs": [[58, "spartan-3a-dcms"]], "Spartan 3A and 3A DSP BRAM columns": [[58, "spartan-3a-and-3a-dsp-bram-columns"]], "Spartan 3E BRAM columns": [[58, "spartan-3e-bram-columns"]], "Spartan 3E DCMs": [[58, "spartan-3e-dcms"]], "Spartan 6": [[67, "spartan-6"]], "Spartan XL": [[75, "spartan-xl"]], "Speed": [[17, "speed"], [189, "speed"]], "Speed data": [[2, "speed-data"], [3, "speed-data"], [4, "speed-data"], [5, "speed-data"], [6, "speed-data"], [7, "speed-data"], [8, "speed-data"], [9, "speed-data"], [18, "speed-data"], [19, "speed-data"], [20, "speed-data"], [21, "speed-data"], [22, "speed-data"], [23, "speed-data"], [24, "speed-data"], [25, "speed-data"], [26, "speed-data"], [27, "speed-data"], [28, "speed-data"], [29, "speed-data"], [30, "speed-data"], [31, "speed-data"], [190, "speed-data"], [191, "speed-data"], [192, "speed-data"], [193, "speed-data"], [194, "speed-data"], [195, "speed-data"]], "Spine clock terminators": [[106, "spine-clock-terminators"]], "Spine column": [[110, "spine-column"], [124, "spine-column"]], "Spine muxes \u2014 CMT": [[119, "spine-muxes-cmt"]], "Spine muxes \u2014 DCM": [[106, "spine-muxes-dcm"]], "Spine muxes \u2014 IOB": [[106, "spine-muxes-iob"], [119, "spine-muxes-iob"]], "Spine muxes \u2014 MGT": [[119, "spine-muxes-mgt"]], "Splitters": [[77, "splitters"], [167, "splitters"], [172, "splitters"], [177, "splitters"], [182, "splitters"], [187, "splitters"]], "Sum of products": [[88, "sum-of-products"]], "Sum term, LUT2": [[200, "sum-term-lut2"]], "Sum term, XOR gate": [[14, "sum-term-xor-gate"], [36, "sum-term-xor-gate"]], "System monitor": [[115, "system-monitor"]], "TERM.E": [[97, "term-e"]], "TERM.N": [[97, "term-n"]], "TERM.S": [[97, "term-s"]], "TERM.W": [[97, "term-w"]], "TESTMODE": [[62, "testmode"], [137, "testmode"], [152, "testmode"]], "TIMER": [[62, "timer"], [121, "timer"], [137, "timer"], [152, "timer"]], "TRIM": [[137, "trim"]], "TRIM0": [[152, "trim0"]], "TRIM1": [[152, "trim1"]], "TRIM2": [[152, "trim2"]], "Tables": [[69, "tables"], [72, "tables"], [114, "tables"], [120, "tables"], [129, "tables"], [136, "tables"], [145, "tables"]], "Tables \u2014 HP IO": [[160, "tables-hp-io"]], "Tables \u2014 HR IO": [[160, "tables-hr-io"]], "Terminators": [[55, "terminators"], [97, "terminators"]], "The BRAM bel": [[87, "the-bram-bel"]], "The CLKC clock center tile": [[38, "the-clkc-clock-center-tile"], [47, "the-clkc-clock-center-tile"]], "The CLKC_50A clock center tile": [[47, "the-clkc-50a-clock-center-tile"]], "The GCLKC clock spine distribution tiles": [[89, "the-gclkc-clock-spine-distribution-tiles"]], "The GCLKH clock row distribution tiles": [[38, "the-gclkh-clock-row-distribution-tiles"], [47, "the-gclkh-clock-row-distribution-tiles"]], "The GCLKVC clock spine distribution tiles": [[38, "the-gclkvc-clock-spine-distribution-tiles"], [47, "the-gclkvc-clock-spine-distribution-tiles"]], "The GCLKVM secondary clock center tiles": [[38, "the-gclkvm-secondary-clock-center-tiles"], [47, "the-gclkvm-secondary-clock-center-tiles"]], "The MULT bel \u2014 Spartan 3E and Spartan 3A": [[87, "the-mult-bel-spartan-3e-and-spartan-3a"]], "The MULT bel \u2014 Virtex 2 and Spartan 3": [[87, "the-mult-bel-virtex-2-and-spartan-3"]], "The clock row distribution tiles": [[89, "the-clock-row-distribution-tiles"]], "Tile": [[17, "tile"], [189, "tile"]], "Todo": [[1, "id1"], [12, "id1"], [13, "id1"], [13, "id2"], [13, "id3"], [13, "id4"], [14, "id1"], [14, "id2"], [14, "id3"], [14, "id4"], [14, "id5"], [14, "id6"], [14, "id7"], [14, "id8"], [14, "id9"], [14, "id10"], [35, "id1"], [35, "id2"], [36, "id1"], [36, "id2"], [38, "id1"], [38, "id2"], [38, "id3"], [38, "id4"], [38, "id5"], [38, "id6"], [38, "id7"], [38, "id8"], [39, "id1"], [40, "id1"], [40, "id2"], [40, "id3"], [40, "id4"], [40, "id5"], [41, "id1"], [43, "id1"], [43, "id2"], [43, "id3"], [46, "id1"], [47, "id1"], [47, "id2"], [47, "id3"], [47, "id4"], [47, "id5"], [47, "id6"], [47, "id7"], [47, "id8"], [47, "id9"], [47, "id10"], [48, "id1"], [49, "id1"], [50, "id1"], [50, "id2"], [50, "id3"], [50, "id4"], [50, "id5"], [51, "id1"], [52, "id1"], [53, "id1"], [54, "id1"], [56, "id1"], [57, "id1"], [57, "id2"], [57, "id3"], [57, "id4"], [57, "id5"], [58, "id1"], [60, "id1"], [62, "id1"], [63, "id1"], [64, "id1"], [65, "id1"], [66, "id1"], [67, "id1"], [70, "id1"], [72, "id1"], [75, "id1"], [81, "id1"], [84, "id1"], [87, "id1"], [87, "id2"], [87, "id3"], [87, "id4"], [88, "id1"], [88, "id2"], [88, "id3"], [89, "id1"], [89, "id2"], [89, "id3"], [89, "id4"], [89, "id5"], [90, "id1"], [91, "id1"], [91, "id2"], [91, "id3"], [91, "id4"], [91, "id5"], [92, "id1"], [93, "id1"], [94, "id1"], [95, "id1"], [96, "id1"], [97, "id1"], [98, "id1"], [99, "id1"], [99, "id2"], [99, "id3"], [99, "id4"], [100, "id1"], [101, "id1"], [102, "id1"], [102, "id2"], [102, "id3"], [104, "id1"], [106, "id1"], [107, "id1"], [110, "id1"], [111, "id1"], [112, "id1"], [113, "id1"], [117, "id1"], [118, "id1"], [119, "id1"], [120, "id1"], [121, "id1"], [124, "id1"], [125, "id1"], [126, "id1"], [127, "id1"], [128, "id1"], [133, "id1"], [134, "id1"], [135, "id1"], [136, "id1"], [137, "id1"], [140, "id1"], [141, "id1"], [142, "id1"], [143, "id1"], [144, "id1"], [148, "id1"], [149, "id1"], [150, "id1"], [151, "id1"], [152, "id1"], [154, "id1"], [155, "id1"], [156, "id1"], [157, "id1"], [158, "id1"], [159, "id1"], [160, "id1"], [165, "id1"], [170, "id1"], [175, "id1"], [180, "id1"], [185, "id1"], [199, "id1"], [199, "id2"], [199, "id3"], [200, "id1"], [200, "id2"]], "Top level": [[17, "top-level"], [189, "top-level"]], "Tristate buses and TBUFs": [[88, "tristate-buses-and-tbufs"]], "UIM IBUF bits": [[23, "uim-ibuf-bits"]], "UIM and FB inputs \u2014 XC9500": [[36, "uim-and-fb-inputs-xc9500"]], "UIM and FB inputs \u2014 XC9500XL/XV": [[36, "uim-and-fb-inputs-xc9500xl-xv"]], "UL.FC": [[40, "ul-fc"]], "UL.S3": [[50, "ul-s3"]], "UL.S3A": [[50, "ul-s3a"]], "UL.S3E": [[50, "ul-s3e"]], "UL.V2": [[91, "ul-v2"]], "UL.V2P": [[91, "ul-v2p"]], "UNK1C": [[137, "unk1c"]], "UR.FC": [[40, "ur-fc"]], "UR.S3": [[50, "ur-s3"]], "UR.S3A": [[50, "ur-s3a"]], "UR.S3E": [[50, "ur-s3e"]], "UR.V2": [[91, "ur-v2"]], "UR.V2P": [[91, "ur-v2p"]], "Universal control terms": [[200, "universal-control-terms"]], "Upper left": [[40, "upper-left"], [50, "upper-left"], [63, "upper-left"], [91, "upper-left"]], "Upper right": [[40, "upper-right"], [50, "upper-right"], [63, "upper-right"], [91, "upper-right"]], "Virtex": [[84, "virtex"]], "Virtex 2": [[96, "virtex-2"]], "Virtex 4": [[112, "virtex-4"]], "Virtex 5": [[127, "virtex-5"]], "Virtex 6": [[143, "virtex-6"]], "Virtex 7": [[158, "virtex-7"]], "WBSTAR": [[152, "wbstar"]], "Wide multiplexers": [[46, "wide-multiplexers"], [88, "wide-multiplexers"]], "Write protection \u2014 XC9500": [[35, "write-protection-xc9500"]], "Write protection \u2014 XC9500XL/XV": [[35, "write-protection-xc9500xl-xv"]], "XADC": [[148, "xadc"]], "XC2C128, XA2C128": [[2, "xc2c128-xa2c128"]], "XC2C256, XA2C256": [[3, "xc2c256-xa2c256"]], "XC2C32": [[4, "xc2c32"]], "XC2C32A, XA2C32A": [[5, "xc2c32a-xa2c32a"]], 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132, 147], "9929": [45, 59, 87, 102, 116, 132, 147], "993": [45, 59, 78, 87, 102, 116, 132, 147], "9930": [45, 59, 87, 102, 116, 132, 147], "9931": [45, 59, 87, 102, 116, 132, 147], "9932": [45, 59, 87, 102, 116, 132, 147], "9933": [45, 59, 87, 102, 116, 132, 147], "9934": [45, 59, 87, 102, 116, 132, 147], "9935": [45, 59, 87, 102, 116, 132, 147], "9936": [45, 59, 87, 102, 116, 132, 147], "9937": [45, 59, 87, 102, 116, 132, 147], "9938": [45, 59, 87, 102, 116, 132, 147], "9939": [45, 59, 87, 102, 116, 132, 147], "994": [45, 59, 78, 87, 102, 116, 132, 147], "9940": [45, 59, 87, 102, 116, 132, 147], "9941": [45, 59, 87, 102, 116, 132, 147], "9942": [45, 59, 87, 102, 116, 132, 147], "9943": [45, 59, 87, 102, 116, 132, 147], "9944": [45, 59, 87, 102, 116, 132, 147], "9945": [45, 59, 87, 102, 116, 132, 147], "9946": [45, 59, 87, 102, 116, 132, 147], "9947": [45, 59, 87, 102, 116, 132, 147], "9948": [45, 59, 87, 102, 116, 132, 147], "9949": [45, 59, 87, 102, 116, 132, 147], "995": [45, 59, 78, 87, 102, 116, 132, 147], "9950": [45, 59, 87, 102, 116, 132, 147], "9951": [45, 59, 87, 102, 116, 132, 147], "9952": [45, 59, 87, 102, 116, 132, 147], "9953": [45, 59, 87, 102, 116, 132, 147], "9954": [45, 59, 87, 102, 116, 132, 147], "9955": [45, 59, 87, 102, 116, 132, 147], "9956": [45, 59, 87, 102, 116, 132, 147], "9957": [45, 59, 87, 102, 116, 132, 147], "9958": [45, 59, 87, 102, 116, 132, 147], "9959": [45, 59, 87, 102, 116, 132, 147], "996": [45, 59, 78, 87, 102, 116, 132, 147], "9960": [45, 59, 87, 102, 116, 132, 147], "9961": [45, 59, 87, 102, 116, 132, 147], "9962": [45, 59, 87, 102, 116, 132, 147], "9963": [45, 59, 87, 102, 116, 132, 147], "9964": [45, 59, 87, 102, 116, 132, 147], "9965": [45, 59, 87, 102, 116, 132, 147], "9966": [45, 59, 87, 102, 116, 132, 147], "9967": [45, 59, 87, 102, 116, 132, 147], "9968": [45, 59, 87, 102, 116, 132, 147], "9969": [45, 59, 87, 102, 116, 132, 147], "997": [45, 59, 78, 87, 102, 116, 132, 147], "9970": [45, 59, 87, 102, 116, 132, 147], "9971": [45, 59, 87, 102, 116, 132, 147], "9972": [45, 59, 87, 102, 116, 132, 147], "9973": [45, 59, 87, 102, 116, 132, 147], "9974": [45, 59, 87, 102, 116, 132, 147], "9975": [45, 59, 87, 102, 116, 132, 147], "9976": [45, 59, 87, 102, 116, 132, 147], "9977": [45, 59, 87, 102, 116, 132, 147], "9978": [45, 59, 87, 102, 116, 132, 147], "9979": [45, 59, 87, 102, 116, 132, 147], "998": [45, 59, 78, 87, 102, 116, 132, 147], "9980": [45, 59, 87, 102, 116, 132, 147], "9981": [45, 59, 87, 102, 116, 132, 147], "9982": [45, 59, 87, 102, 116, 132, 147], "9983": [45, 59, 87, 102, 116, 132, 147], "9984": [45, 59, 87, 102, 116, 132, 147], "9985": [45, 59, 87, 102, 116, 132, 147], "9986": [45, 59, 87, 102, 116, 132, 147], "9987": [45, 59, 87, 102, 116, 132, 147], "9988": [45, 59, 87, 102, 116, 132, 147], "9989": [45, 59, 87, 102, 116, 132, 147], "999": [45, 59, 78, 87, 102, 116, 132, 147], "9990": [45, 59, 87, 102, 116, 132, 147], "9991": [45, 59, 87, 102, 116, 132, 147], "9992": [45, 59, 87, 102, 116, 132, 147], "9993": [45, 59, 87, 102, 116, 132, 147], "9994": [45, 59, 87, 102, 116, 132, 147], "9995": [45, 59, 87, 102, 116, 132, 147], "9996": [45, 59, 87, 102, 116, 132, 147], "9997": [45, 59, 87, 102, 116, 132, 147], "9998": [45, 59, 87, 102, 116, 132, 147], "9999": [45, 59, 87, 102, 116, 132, 147], "9_32000000001111111111001101010101001100101000010101000001001101010100000010000010001100100100000101000011010100010101101000": 95, "9_64000000001111111111001101010101001100101000010101000001001101010100000010000010001100100100000101000011010100010101101000": 95, "9ce_mux": 188, "9fb_group": [190, 191, 192, 193, 194, 195], "9foe2_mux": [4, 5, 8, 9], "9fsr_enabl": [2, 3, 6, 7], "9ibuf_mod": [2, 3, 6, 7], "9int": [55, 78, 85], "9lct5_inv": 188, "9reg_d_ireg": 188, "9reg_init": [2, 3, 6, 7], "9reg_mod": [4, 5, 8, 9], "9rowcolumn": [104, 106, 130, 133, 148], "9rowcolumn0123": 156, "9rowcolumn012345678910111213141516171819": 111, "9rowcolumn012345678910111213141516171819202122": [70, 71], "9rowcolumn012345678910111213141516171819202122232425": 66, "9rowcolumn0123456789101112131415161718192021222324252627": [117, 123, 131, 136, 139, 146, 150], "9rowcolumn01234567891011121314151617181920212223242526272829": [120, 141, 142, 151, 161, 162], "9rowcolumn0123456789101112131415161718192021222324252627282930": [64, 72], "9rowcolumn012345678910111213141516171819202122232425262728293031": [125, 126, 155, 156, 157], "A": [12, 14, 17, 35, 36, 46, 58, 87, 88, 93, 102, 110, 124, 129, 140, 145, 154, 160, 189, 200], "AED": [12, 198], "AND": [2, 6, 7, 16, 33, 34, 35, 36, 37, 88, 200], "As": [35, 140, 200], "BY": [37, 46, 55, 79, 88, 97, 105], "For": [34, 35, 36, 55, 58, 93, 97, 110, 124, 140, 154, 200], "ISE": [35, 200], "IT": 97, "If": [35, 36, 87, 88, 102, 110, 124, 140, 145, 154, 200], "In": [15, 16, 36, 46, 55, 88, 97, 110, 114, 124, 129, 140, 145, 154, 160, 200], "It": [12, 34, 35, 36, 46, 47, 55, 58, 87, 88, 93, 97, 102, 110, 124, 140, 145, 154, 160, 189, 198, 200], "Its": [35, 87], "No": 154, "Not": [15, 16, 36, 55, 97, 200], "OR": [2, 6, 7, 36, 37], "On": [12, 15, 16, 36, 46, 47, 55, 58, 87, 93, 154, 200], "Such": [35, 55, 58, 93], "The": [12, 13, 15, 16, 17, 34, 35, 36, 37, 41, 42, 45, 46, 53, 54, 55, 56, 58, 65, 88, 93, 96, 97, 98, 102, 105, 110, 114, 124, 129, 140, 145, 154, 160, 188, 189, 198, 199, 200], "Their": [46, 88], "There": [17, 35, 46, 55, 56, 87, 88, 97, 98, 110, 124, 140, 145, 154, 160], "These": [36, 97, 145, 154], "To": [35, 36, 102], "_": [17, 34, 36, 189, 200], "_chain_down": 36, "_chain_up": 36, "_enabl": [36, 188, 200], "_gclk": 200, "_init": [46, 88], "_inv": [36, 200], "_lct": 200, "_mc": [12, 198], "_mux": [36, 46, 88], "_none": 200, "_reg": [87, 102], "_srval": [46, 88], "_sum": 36, "a0": 45, "a0reg": [53, 65], "a1": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a10": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 45, 191, 192, 193, 194, 195], "a11": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 45, 192, 193, 194, 195], "a12": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 45, 192, 193, 194, 195], "a13": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 45, 192, 193, 194, 195], "a14": [2, 3, 6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a15": [3, 6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a16": [3, 6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a17": [6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a18": [6, 7, 22, 23, 24, 25, 193, 194, 195], "a19": [6, 7, 22, 23, 24, 25, 193, 194, 195], "a1reg": [53, 65], "a2": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a20": [6, 7, 22, 23, 24, 194, 195], "a21": [6, 7, 22, 23, 194, 195], "a22": [6, 7, 22, 23, 194, 195], "a23": [22, 23], "a24": [22, 23], "a25": [22, 23], "a26": [22, 23], "a3": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a4": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a5": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a5ffinit": [134, 149], "a5ffinitslice0": [134, 149], "a5ffmux": [134, 149], "a5ffsr": [134, 149], "a5ffsrinit": 60, "a5ffsrinitslice0": 60, "a5ffsrslice1": 134, "a5q0": 60, "a5q0100": [60, 134, 149], "a6": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a6lut": [60, 118, 134, 149], "a7": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a8": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 45, 191, 192, 193, 194, 195], "a9": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 45, 191, 192, 193, 194, 195], "a_bgmonitoren": [155, 156, 157], "a_bgmonitorength_common": 155, "a_bgmonitorengtp_common": 156, "a_bgmonitorengtx_common": 157, "a_bgpd": [155, 156, 157], "a_bgpdgth_common": 155, "a_bgpdgtp_common": 156, "a_bgpdgtx_common": 157, "a_cfgreset": [155, 156, 157], "a_cfgresetgth_channel": 155, "a_cfgresetgtp_channel": 156, "a_cfgresetgtx_channel": 157, "a_cplllocken": [155, 157], "a_cplllockength_channel": 155, "a_cplllockengtx_channel": 157, "a_cpllpd": [155, 157], "a_cpllpdgth_channel": 155, "a_cpllpdgtx_channel": 157, "a_cpllreset": [155, 157], "a_cpllresetgth_channel": 155, "a_cpllresetgtx_channel": 157, "a_dfeclkdlyadj": 142, "a_dfedlyovrd": 142, "a_dfedlyovrdgtx0": 142, "a_dfedlyovrdgtx1": 142, "a_dfedlyovrdgtx2": 142, "a_dfedlyovrdgtx3": 142, "a_dfetap1": 142, "a_dfetap2": 142, "a_dfetap3": 142, "a_dfetap4": 142, "a_dfetapovrd": 142, "a_dfetapovrdgtx0": 142, "a_dfetapovrdgtx1": 142, "a_dfetapovrdgtx2": 142, "a_dfetapovrdgtx3": 142, "a_eyescanmod": [155, 156, 157], "a_eyescanmodegth_channel": 155, "a_eyescanmodegtp_channel": 156, "a_eyescanmodegtx_channel": 157, "a_eyescanreset": [155, 156, 157], "a_eyescanresetgth_channel": 155, "a_eyescanresetgtp_channel": 156, "a_eyescanresetgtx_channel": 157, "a_fwdclk1001": 111, "a_fwdclk2001": 111, "a_fwdclk3001": 111, "a_fwdclk4001": 111, "a_gtpreset_0": 66, "a_gtpreset_0gtp": 66, "a_gtpreset_1": 66, "a_gtpreset_1gtp": 66, "a_gtrefclkpd0": [155, 156, 157], "a_gtrefclkpd0gth_common": 155, "a_gtrefclkpd0gtp_common": 156, "a_gtrefclkpd0gtx_common": 157, "a_gtrefclkpd1": [155, 156, 157], "a_gtrefclkpd1gth_common": 155, "a_gtrefclkpd1gtp_common": 156, "a_gtrefclkpd1gtx_common": 157, "a_gtresetsel": [155, 156, 157], "a_gtresetselgth_channel": 155, "a_gtresetselgtp_channel": 156, "a_gtresetselgtx_channel": 157, "a_gtrxreset": [155, 156, 157], "a_gtrxresetgth_channel": 155, "a_gtrxresetgtp_channel": 156, "a_gtrxresetgtx_channel": 157, "a_gttxreset": [155, 156, 157], "a_gttxresetgth_channel": 155, "a_gttxresetgtp_channel": 156, "a_gttxresetgtx_channel": 157, "a_gtxrxreset": 142, "a_gtxrxresetgtx0": 142, "a_gtxrxresetgtx1": 142, "a_gtxrxresetgtx2": 142, "a_gtxrxresetgtx3": 142, "a_gtxtxreset": 142, "a_gtxtxresetgtx0": 142, "a_gtxtxresetgtx1": 142, "a_gtxtxresetgtx2": 142, "a_gtxtxresetgtx3": 142, "a_input": [122, 138, 153], "a_loopback": [142, 155, 156, 157], "a_loopback_0": 66, "a_loopback_1": 66, "a_pll0locken": 156, "a_pll0lockengtp_common": 156, "a_pll0pd": 156, "a_pll0pdgtp_common": 156, "a_pll0reset": 156, "a_pll0resetgtp_common": 156, "a_pll1locken": 156, "a_pll1lockengtp_common": 156, "a_pll1pd": 156, "a_pll1pdgtp_common": 156, "a_pll1reset": 156, "a_pll1resetgtp_common": 156, "a_pllclkrxreset": 142, "a_pllclkrxresetgtx0": 142, "a_pllclkrxresetgtx1": 142, "a_pllclkrxresetgtx2": 142, "a_pllclkrxresetgtx3": 142, "a_pllclktxreset": 142, "a_pllclktxresetgtx0": 142, "a_pllclktxresetgtx1": 142, "a_pllclktxresetgtx2": 142, "a_pllclktxresetgtx3": 142, "a_plllkdeten_0": 66, "a_plllkdeten_0gtp": 66, "a_plllkdeten_1": 66, "a_plllkdeten_1gtp": 66, "a_pllpowerdown_0": 66, "a_pllpowerdown_0gtp": 66, "a_pllpowerdown_1": 66, "a_pllpowerdown_1gtp": 66, "a_pllrxreset": 142, "a_pllrxresetgtx0": 142, "a_pllrxresetgtx1": 142, "a_pllrxresetgtx2": 142, "a_pllrxresetgtx3": 142, "a_plltxreset": 142, "a_plltxresetgtx0": 142, "a_plltxresetgtx1": 142, "a_plltxresetgtx2": 142, "a_plltxresetgtx3": 142, "a_pmarsvdin3": 156, "a_pmarsvdin3gtp_channel": 156, "a_pmarsvdin4": 156, "a_pmarsvdin4gtp_channel": 156, "a_prbscntreset": 142, "a_prbscntreset_0": 66, "a_prbscntreset_0gtp": 66, "a_prbscntreset_1": 66, "a_prbscntreset_1gtp": 66, "a_prbscntresetgtx0": 142, "a_prbscntresetgtx1": 142, "a_prbscntresetgtx2": 142, "a_prbscntresetgtx3": 142, "a_q": 87, "a_qplllocken": [155, 157], "a_qplllockength_common": 155, "a_qplllockengtx_common": 157, "a_qplloutreset": [155, 157], "a_qplloutresetgth_common": 155, "a_qplloutresetgtx_common": 157, "a_qpllpd": [155, 157], "a_qpllpdgth_common": 155, "a_qpllpdgtx_common": 157, "a_qpllreset": [155, 157], "a_qpllresetgth_common": 155, "a_qpllresetgtx_common": 157, "a_rxadaptseltest": [155, 156], "a_rxbufreset": [142, 155, 156, 157], "a_rxbufreset_0": 66, "a_rxbufreset_0gtp": 66, "a_rxbufreset_1": 66, "a_rxbufreset_1gtp": 66, "a_rxbufresetgth_channel": 155, "a_rxbufresetgtp_channel": 156, "a_rxbufresetgtx0": 142, "a_rxbufresetgtx1": 142, "a_rxbufresetgtx2": 142, "a_rxbufresetgtx3": 142, "a_rxbufresetgtx_channel": 157, "a_rxcdrfreqreset": [142, 155, 156, 157], "a_rxcdrfreqreset_0": 66, "a_rxcdrfreqreset_0gtp": 66, "a_rxcdrfreqreset_1": 66, "a_rxcdrfreqreset_1gtp": 66, "a_rxcdrfreqresetgth_channel": 155, "a_rxcdrfreqresetgtp_channel": 156, "a_rxcdrfreqresetgtx0": 142, "a_rxcdrfreqresetgtx1": 142, "a_rxcdrfreqresetgtx2": 142, "a_rxcdrfreqresetgtx3": 142, "a_rxcdrfreqresetgtx_channel": 157, "a_rxcdrhold": [142, 155, 156, 157], "a_rxcdrhold_0": 66, "a_rxcdrhold_0gtp": 66, "a_rxcdrhold_1": 66, "a_rxcdrhold_1gtp": 66, "a_rxcdrholdgth_channel": 155, "a_rxcdrholdgtp_channel": 156, "a_rxcdrholdgtx0": 142, "a_rxcdrholdgtx1": 142, "a_rxcdrholdgtx2": 142, "a_rxcdrholdgtx3": 142, "a_rxcdrholdgtx_channel": 157, "a_rxcdrovrden": [155, 156, 157], "a_rxcdrovrdength_channel": 155, "a_rxcdrovrdengtp_channel": 156, "a_rxcdrovrdengtx_channel": 157, "a_rxcdrphasereset": 142, "a_rxcdrphasereset_0": 66, "a_rxcdrphasereset_0gtp": 66, "a_rxcdrphasereset_1": 66, "a_rxcdrphasereset_1gtp": 66, "a_rxcdrphaseresetgtx0": 142, "a_rxcdrphaseresetgtx1": 142, "a_rxcdrphaseresetgtx2": 142, "a_rxcdrphaseresetgtx3": 142, "a_rxcdrreset": [142, 155, 156, 157], "a_rxcdrreset_0": 66, "a_rxcdrreset_0gtp": 66, "a_rxcdrreset_1": 66, "a_rxcdrreset_1gtp": 66, "a_rxcdrresetgth_channel": 155, "a_rxcdrresetgtp_channel": 156, "a_rxcdrresetgtx0": 142, "a_rxcdrresetgtx1": 142, "a_rxcdrresetgtx2": 142, "a_rxcdrresetgtx3": 142, "a_rxcdrresetgtx_channel": 157, "a_rxcdrresetrsv": [155, 156, 157], "a_rxcdrresetrsvgth_channel": 155, "a_rxcdrresetrsvgtp_channel": 156, "a_rxcdrresetrsvgtx_channel": 157, "a_rxdfeagchold": [155, 157], "a_rxdfeagcholdgth_channel": 155, "a_rxdfeagcholdgtx_channel": 157, "a_rxdfeagcovrden": [155, 157], "a_rxdfeagcovrdength_channel": 155, "a_rxdfeagcovrdengtx_channel": 157, "a_rxdfeagctrl": 155, "a_rxdfecm1en": [155, 157], "a_rxdfecm1ength_channel": 155, "a_rxdfecm1engtx_channel": 157, "a_rxdfelfhold": [155, 157], "a_rxdfelfholdgth_channel": 155, "a_rxdfelfholdgtx_channel": 157, "a_rxdfelfovrden": [155, 157], "a_rxdfelfovrdength_channel": 155, "a_rxdfelfovrdengtx_channel": 157, "a_rxdfelpmreset": [155, 157], "a_rxdfelpmresetgth_channel": 155, "a_rxdfelpmresetgtx_channel": 157, "a_rxdfereset": 142, "a_rxdferesetgtx0": 142, "a_rxdferesetgtx1": 142, "a_rxdferesetgtx2": 142, "a_rxdferesetgtx3": 142, "a_rxdfeslidetap": 155, "a_rxdfeslidetapadapten": 155, "a_rxdfeslidetapadaptength_channel": 155, "a_rxdfeslidetaphold": 155, "a_rxdfeslidetapholdgth_channel": 155, "a_rxdfeslidetapid": 155, "a_rxdfeslidetapinitovrden": 155, "a_rxdfeslidetapinitovrdength_channel": 155, "a_rxdfeslidetaponlyadapten": 155, "a_rxdfeslidetaponlyadaptength_channel": 155, "a_rxdfeslidetapovrden": 155, "a_rxdfeslidetapovrdength_channel": 155, "a_rxdfeslidetapstrob": 155, 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156, "a_rxpcsresetgtx_channel": 157, "a_rxpd": [155, 156, 157], "a_rxphalign": [155, 156, 157], "a_rxphalignen": [155, 156, 157], "a_rxphalignength_channel": 155, "a_rxphalignengtp_channel": 156, "a_rxphalignengtx_channel": 157, "a_rxphaligngth_channel": 155, "a_rxphaligngtp_channel": 156, "a_rxphaligngtx_channel": 157, "a_rxphdlypd": [155, 156, 157], "a_rxphdlypdgth_channel": 155, "a_rxphdlypdgtp_channel": 156, "a_rxphdlypdgtx_channel": 157, "a_rxphdlyreset": [155, 156, 157], "a_rxphdlyresetgth_channel": 155, "a_rxphdlyresetgtp_channel": 156, "a_rxphdlyresetgtx_channel": 157, "a_rxphovrden": [155, 156, 157], "a_rxphovrdength_channel": 155, "a_rxphovrdengtp_channel": 156, "a_rxphovrdengtx_channel": 157, "a_rxplllkdeten": 142, "a_rxplllkdetengtx0": 142, "a_rxplllkdetengtx1": 142, "a_rxplllkdetengtx2": 142, "a_rxplllkdetengtx3": 142, "a_rxpllpowerdown": 142, "a_rxpllpowerdowngtx0": 142, "a_rxpllpowerdowngtx1": 142, "a_rxpllpowerdowngtx2": 142, "a_rxpllpowerdowngtx3": 142, "a_rxpmareset": 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66, "a_rxreset_1gtp": 66, "a_rxresetgtx0": 142, "a_rxresetgtx1": 142, "a_rxresetgtx2": 142, "a_rxresetgtx3": 142, "a_rxsysclksel": [155, 156, 157], "a_spar": [155, 156, 157], "a_sparegth_channel": 155, "a_sparegtp_channel": 156, "a_sparegtx_channel": 157, "a_txbufdiffctrl": [142, 155, 156, 157], "a_txbufdiffctrl_0": 66, "a_txbufdiffctrl_1": 66, "a_txdeemph": [142, 155, 156, 157], "a_txdeemphgth_channel": 155, "a_txdeemphgtp_channel": 156, "a_txdeemphgtx0": 142, "a_txdeemphgtx1": 142, "a_txdeemphgtx2": 142, "a_txdeemphgtx3": 142, "a_txdeemphgtx_channel": 157, "a_txdiffctrl": [142, 155, 156, 157], "a_txdiffctrl_0": 66, "a_txdiffctrl_1": 66, "a_txdlybypass": [155, 156, 157], "a_txdlybypassgth_channel": 155, "a_txdlybypassgtp_channel": 156, "a_txdlybypassgtx_channel": 157, "a_txdlyen": [155, 156, 157], "a_txdlyength_channel": 155, "a_txdlyengtp_channel": 156, "a_txdlyengtx_channel": 157, "a_txdlyovrden": [155, 156, 157], "a_txdlyovrdength_channel": 155, "a_txdlyovrdengtp_channel": 156, "a_txdlyovrdengtx_channel": 157, "a_txdlysreset": [155, 156, 157], "a_txdlysresetgth_channel": 155, "a_txdlysresetgtp_channel": 156, "a_txdlysresetgtx_channel": 157, "a_txelecidl": [142, 155, 156, 157], "a_txelecidle_0": 66, "a_txelecidle_0gtp": 66, "a_txelecidle_1": 66, "a_txelecidle_1gtp": 66, "a_txelecidlegth_channel": 155, "a_txelecidlegtp_channel": 156, "a_txelecidlegtx0": 142, "a_txelecidlegtx1": 142, "a_txelecidlegtx2": 142, "a_txelecidlegtx3": 142, "a_txelecidlegtx_channel": 157, "a_txenpmaphasealign": 142, "a_txenpmaphasealign_0": 66, "a_txenpmaphasealign_0gtp": 66, "a_txenpmaphasealign_1": 66, "a_txenpmaphasealign_1gtp": 66, "a_txenpmaphasealigngtx0": 142, "a_txenpmaphasealigngtx1": 142, "a_txenpmaphasealigngtx2": 142, "a_txenpmaphasealigngtx3": 142, "a_txenprbstst": 142, "a_txenprbstst_0": 66, "a_txenprbstst_1": 66, "a_txinhibit": [155, 156, 157], "a_txinhibitgth_channel": 155, "a_txinhibitgtp_channel": 156, "a_txinhibitgtx_channel": 157, "a_txmaincursor": [155, 156, 157], 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157, "aen_cpll": [155, 157], "aen_cpllgth_channel": 155, "aen_cpllgtx_channel": 157, "aen_loopback": [155, 156, 157], "aen_loopbackgth_channel": 155, "aen_loopbackgtp_channel": 156, "aen_loopbackgtx_channel": 157, "aen_mast": [155, 156, 157], "aen_mastergth_channel": 155, "aen_mastergth_common": 155, "aen_mastergtp_channel": 156, "aen_mastergtp_common": 156, "aen_mastergtx_channel": 157, "aen_mastergtx_common": 157, "aen_pd": [155, 156, 157], "aen_pd_and_eidl": [155, 156, 157], "aen_pd_and_eidlegth_channel": 155, "aen_pd_and_eidlegtp_channel": 156, "aen_pd_and_eidlegtx_channel": 157, "aen_pdgth_common": 155, "aen_pdgtp_common": 156, "aen_pdgtx_common": 157, "aen_pll": 156, "aen_pllgtp_channel": 156, "aen_pllgtp_common": 156, "aen_polar": [155, 156, 157], "aen_polaritygth_channel": 155, "aen_polaritygtp_channel": 156, "aen_polaritygtx_channel": 157, "aen_prb": [155, 156, 157], "aen_prbsgth_channel": 155, "aen_prbsgtp_channel": 156, "aen_prbsgtx_channel": 157, "aen_qpi": [155, 157], "aen_qpigth_channel": 155, "aen_qpigtx_channel": 157, "aen_qpll": [155, 157], "aen_qpllgth_common": 155, "aen_qpllgtx_common": 157, "aen_refclk": [155, 156, 157], "aen_refclkgth_common": 155, "aen_refclkgtp_common": 156, "aen_refclkgtx_common": 157, "aen_reset": [155, 156, 157], "aen_resetgth_channel": 155, "aen_resetgth_common": 155, "aen_resetgtp_channel": 156, "aen_resetgtp_common": 156, "aen_resetgtx_channel": 157, "aen_resetgtx_common": 157, "aen_rsv": 156, "aen_rsvgtp_channel": 156, "aen_rxcdr": [155, 156, 157], "aen_rxcdrgth_channel": 155, "aen_rxcdrgtp_channel": 156, "aen_rxcdrgtx_channel": 157, "aen_rxdf": [155, 156, 157], "aen_rxdfegth_channel": 155, "aen_rxdfegtp_channel": 156, "aen_rxdfegtx_channel": 157, "aen_rxdfelpm": [155, 157], "aen_rxdfelpmgth_channel": 155, "aen_rxdfelpmgtx_channel": 157, "aen_rxlpm": 156, "aen_rxlpmgtp_channel": 156, "aen_rxoutclk_sel": [155, 156, 157], "aen_rxoutclk_selgth_channel": 155, "aen_rxoutclk_selgtp_channel": 156, "aen_rxoutclk_selgtx_channel": 157, "aen_rxphdli": [155, 156, 157], "aen_rxphdlygth_channel": 155, "aen_rxphdlygtp_channel": 156, "aen_rxphdlygtx_channel": 157, "aen_rxsysclk_sel": [155, 156, 157], "aen_rxsysclk_selgth_channel": 155, "aen_rxsysclk_selgtp_channel": 156, "aen_rxsysclk_selgtx_channel": 157, "aen_tx_drive_mod": [155, 156, 157], "aen_tx_drive_modegth_channel": 155, "aen_tx_drive_modegtp_channel": 156, "aen_tx_drive_modegtx_channel": 157, "aen_txoutclk_sel": [155, 156, 157], "aen_txoutclk_selgth_channel": 155, "aen_txoutclk_selgtp_channel": 156, "aen_txoutclk_selgtx_channel": 157, "aen_txphdli": [155, 156, 157], "aen_txphdlygth_channel": 155, "aen_txphdlygtp_channel": 156, "aen_txphdlygtx_channel": 157, "aen_txpi_ppm": [155, 156], "aen_txpi_ppmgth_channel": 155, "aen_txpi_ppmgtp_channel": 156, "aen_txsysclk_sel": [155, 156, 157], "aen_txsysclk_selgth_channel": 155, "aen_txsysclk_selgtp_channel": 156, "aen_txsysclk_selgtx_channel": 157, "aer_base_ptr": [146, 161], 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151, "cmt_u01000": 61, "cmt_u101000": 61, "cmt_u11000": 61, "cmt_u111000": 61, "cmt_u121000": 61, "cmt_u131000": 61, "cmt_u141000": 61, "cmt_u151000": 61, "cmt_u21000": 61, "cmt_u31000": 61, "cmt_u41000": 61, "cmt_u51000": 61, "cmt_u61000": 61, "cmt_u71000": 61, "cmt_u81000": 61, "cmt_u91000": 61, "cmux": 184, "cmuxosc": 184, "cnr": [58, 75, 84, 93, 165, 170, 175, 180, 185], "co01": 183, "co1": 183, "co_dur": 151, "coarse_bypass": 151, "coarse_delai": 151, "code": 35, "coin_window": [51, 92], "col": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "col_hi": [15, 16], "col_lo": [15, 16], "coloc": [58, 87, 110, 124, 140, 154], "column": [2, 3, 4, 5, 6, 7, 8, 9, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 35, 46, 47, 55, 84, 87, 88, 89, 93, 97, 114, 129, 145, 160, 188, 189, 190, 191, 192, 193, 194, 195, 197, 199], "columnar": 110, "com": [51, 92], "com_burst_v": 142, "com_burst_val_0": [66, 125, 126], "com_burst_val_1": [66, 125, 126], "comb": 36, "comb0": 15, "comb1": 16, "combin": [36, 46, 55, 87, 88, 97, 110, 200], "combination": 87, "combinatori": [14, 36, 200], "come": [12, 34, 36, 46, 58, 87, 93, 110, 114, 124, 129, 140, 154, 198, 200], "comma32": 111, "comma32gt11a": 111, "comma32gt11b": 111, "comma_10b_en": 142, "comma_10b_enable_0": [66, 125, 126], "comma_10b_enable_1": [66, 125, 126], "comma_10b_mask": [94, 95, 111], "comma_doubl": 142, "comma_double_0": [125, 126], "comma_double_0gtp_du": 125, "comma_double_0gtx_du": 126, "comma_double_1": [125, 126], "comma_double_1gtp_du": 125, "comma_double_1gtx_du": 126, "comma_doublegtx0": 142, "comma_doublegtx1": 142, "comma_doublegtx2": 142, "comma_doublegtx3": 142, "commerci": [17, 189], "common": [106, 160], "common_amux_sel": [155, 156, 157], "common_cfg": [155, 156, 157], "common_hclk_giob": 106, "common_instanti": [155, 156, 157], "common_instantiatedgth_common": 155, "common_instantiatedgtp_common": 156, "common_instantiatedgtx_common": 157, "common_mgt": 106, "common_mgtioclk": 106, "commonhr_iostd": 160, "commonli": [154, 188], "companion": [44, 112], "compat": [12, 34, 198], "compens": 88, "complement": [114, 129, 145, 160], "complet": [12, 13, 16, 34, 35, 36, 110, 154, 188, 198], "complex": [15, 16, 154], "comput": [87, 188], "concaten": [15, 16, 87, 102], "conceptu": 58, "concur": [51, 52, 64, 92, 108, 120], "concur00100101": 108, "concur1001": [64, 120], "concurdcm": [51, 92, 108], "concurdcm0": 120, "concurdcm1": 120, "config": [15, 16, 74, 174, 179, 188], "config01": 120, "config10": 108, "config_fallback": [121, 137, 152], "config_r": [39, 48, 49, 74, 81, 90, 107, 121, 137, 152, 164, 169, 174, 179, 184], "configrout": 130, "configur": [11, 12, 15, 33, 34, 35, 41, 44, 47, 54, 55, 56, 67, 75, 84, 93, 96, 97, 98, 110, 112, 114, 124, 127, 129, 140, 143, 145, 158, 160, 165, 170, 175, 180, 185, 188, 197], "configuraton": [15, 16], "conjunct": 36, "connect": [35, 36, 46, 58, 87, 88, 97, 98, 102, 114, 129, 145, 154, 199, 200], "consecut": 140, "consid": [35, 110, 114, 124, 129, 140, 145, 154, 160], "consist": [35, 36, 87, 110, 124, 129, 140, 145, 154], "const": [13, 14, 35, 36, 46, 88, 199, 200], "const_010": [73, 168, 173, 178], "const_011": [73, 163, 168, 173, 178], "const_11": 163, "const_110": [73, 163, 168, 173, 178], "const_111": [73, 168, 173, 178], "const_op2_enable11": [73, 163, 168, 173, 178], "constant": [36, 46, 88, 114], "constraint": 12, "construct": 200, "consult": 15, "contain": [15, 17, 34, 42, 45, 46, 55, 56, 58, 87, 88, 93, 97, 98, 102, 110, 114, 124, 129, 140, 145, 154, 160, 199, 200], "content": [35, 46, 88, 140], "contigu": [15, 16], "continu": [35, 160], "control": [12, 14, 35, 36, 44, 46, 56, 67, 88, 98, 102, 114], "control_0": [136, 151], "control_1": [136, 151], "control_2": [136, 151], "control_3": [136, 151], "control_4": [136, 151], "control_5": [136, 151], "control_6": 151, "control_7": 151, "convert": [15, 16], "convst": 115, "convstclk": [117, 133, 148], "convstsysmon": 115, "coolrunn": [0, 12, 14], "coordin": [16, 17, 36, 58, 93, 188, 189, 200], "cor": [41, 54, 84, 96, 112, 127, 143, 158], "cor1": [54, 67, 127, 143, 158], "cor2": [54, 67], "core": [12, 34, 36, 44, 55, 93, 96, 97, 98, 110, 124, 127, 143, 158, 198, 200], "corner": [41, 44, 54, 55, 56, 58, 67, 75, 84, 93, 96, 97, 98, 154, 165, 170, 175, 180, 185], "correct": 102, "correspond": [12, 14, 15, 16, 17, 34, 35, 36, 46, 47, 53, 55, 58, 65, 87, 88, 89, 93, 97, 102, 110, 114, 124, 129, 140, 145, 154, 160, 189, 200], "could": 35, "count": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 46, 58, 87, 93, 110, 124, 140, 154, 190, 191, 192, 193, 194, 195], "counter_wraparound": 69, "counter_wraparoundiodelay0": 69, "counter_wraparoundiodelay1": 69, "cout": [46, 74, 76, 88, 169, 171, 174, 176, 179, 181, 186], "cout0010111110": [73, 76, 163, 166], "cout00101111111111110": [168, 171, 173, 176, 178, 181], "cout_b0": 163, "cout_t1": 163, "coutmux": [60, 118, 134, 149], "coutmuxslice1": 60, "cover": [110, 124, 140, 154, 160, 200], "cp": [136, 151], "cp132": [2, 3, 12], "cp56": [4, 5, 8, 9, 12, 191, 198], "cp_bias_trip_set": [136, 151], "cp_bias_trip_setmmcm": 151, "cp_bias_trip_setmmcm0": 136, "cp_bias_trip_setmmcm1": 136, "cp_bias_trip_setpl": 151, "cp_re": [136, 151], "cpl_timeout_disable_support": [146, 161], "cpl_timeout_disable_supportedpci": [146, 161], "cpl_timeout_ranges_support": [146, 161], "cpld": [0, 12, 34, 36, 198, 200], "cpll0": [155, 157], "cpll_cfg": [155, 157], "cpll_fbdiv": [155, 157], "cpll_fbdiv_45": [155, 157], "cpll_fbdiv_45gth_channel": 155, "cpll_fbdiv_45gtx_channel": 157, "cpll_init_cfg": [155, 157], "cpll_lock_cfg": [155, 157], "cpll_pcd_1ui_cfg": 157, "cpll_pcd_1ui_cfggtx_channel": 157, "cpll_pcd_2ui_cfg": [155, 157], "cpll_pcd_2ui_cfggth_channel": 155, "cpll_pcd_2ui_cfggtx_channel": 157, "cpll_refclk_div": [155, 157], "cplllockdetclk": [155, 157], "cpllrefclksel_mod": [155, 157], "cpllrefclksel_modegth_channel": 155, "cpllrefclksel_modegtx_channel": 157, "cpllrefclksel_stat": [155, 157], "cpmc440clk": 131, "cpmc440timerclock": 131, "cpmdcrclk": 131, "cpmdma0llclk": 131, "cpmdma1llclk": 131, "cpmdma2llclk": 131, "cpmdma3llclk": 131, "cpmfcmclk": 131, "cpminterconnectclk": 131, "cpmmcclk": 131, "cpmmcm": [136, 151], "cpmppcmplbclk": 131, "cpmppcs0plbclk": 131, "cpmppcs1plbclk": 131, "cppll": 151, "crammod": [60, 118, 134, 149], "crc": [39, 48, 49, 62, 74, 90, 107, 121, 164, 169, 174, 179, 184], "crc32_0": [125, 126], "crc32_1": [125, 126], "crc32_2": [125, 126], "crc32_3": [125, 126], "crc_end_of_pkt": [94, 95], "crc_format": [94, 95], "crc_init": [125, 126], "crc_start_of_pkt": [94, 95], "crcclk": [125, 126], "crcclkgtp_dual": 125, "crcclkgtx_dual": 126, "creat": [55, 93, 97, 110, 124], "create_edg": [104, 117, 135, 150], "create_edgebufgctrl0": 104, "create_edgebufgctrl1": 104, "create_edgebufgctrl10": 104, "create_edgebufgctrl11": 104, "create_edgebufgctrl12": 104, "create_edgebufgctrl13": 104, "create_edgebufgctrl14": 104, "create_edgebufgctrl15": 104, "create_edgebufgctrl16": 104, "create_edgebufgctrl17": 104, "create_edgebufgctrl18": 104, "create_edgebufgctrl19": 104, "create_edgebufgctrl2": 104, "create_edgebufgctrl20": 104, "create_edgebufgctrl21": 104, "create_edgebufgctrl22": 104, "create_edgebufgctrl23": 104, "create_edgebufgctrl24": 104, "create_edgebufgctrl25": 104, "create_edgebufgctrl26": 104, "create_edgebufgctrl27": 104, "create_edgebufgctrl28": 104, "create_edgebufgctrl29": 104, "create_edgebufgctrl3": 104, "create_edgebufgctrl30": 104, "create_edgebufgctrl31": 104, "create_edgebufgctrl4": 104, "create_edgebufgctrl5": 104, "create_edgebufgctrl6": 104, "create_edgebufgctrl7": 104, "create_edgebufgctrl8": 104, "create_edgebufgctrl9": 104, "creg": [53, 65, 109, 122, 138, 153], "cregdsp": [53, 65], "cregdsp0": [122, 138], "cregdsp1": 138, "crm_core_clk_freq_500": 162, "crm_core_clk_freq_500pcie3": 162, "crm_module_rst": [146, 161], "crm_user_clk_freq": 162, "crmcoreclk": 130, "crmcoreclkdlo": 130, "crmcoreclkpci": 130, "crmcoreclkrxo": 130, "crmcoreclkrxopci": 130, "crmcoreclktxo": 130, "crmcoreclktxopci": 130, "crmuserclk": 130, "crmuserclkrxo": 130, "crmuserclktxo": 130, "cross": [58, 97, 140, 154], "cs144": [20, 21, 34, 192, 198], "cs280": [24, 25, 34, 193, 198], "cs48": [26, 27, 28, 30, 31, 34, 190, 191, 198], "cs_b": [114, 129], "csi_b": [145, 160], "cso2pin": [50, 63], "cso_b": [129, 145, 160], "cspin": [104, 117, 133], "ct": 14, "ct4111": [2, 3, 4, 5, 6, 7, 8, 9], "ct501": [2, 3, 4, 5, 6, 7, 8, 9], "ct601": [2, 3, 4, 5, 6, 7, 8, 9], "ct70001": [2, 3, 4, 5, 6, 7, 8, 9], "ctc": 14, "cte": 14, "ctl": [41, 54, 67, 84, 96, 112, 127, 143, 158], "ctl1": [143, 158], "ctl_mode": 151, "ctl_modephaser_in0": 151, "ctl_modephaser_in1": 151, "ctl_modephaser_in2": 151, "ctl_modephaser_in3": 151, "ctlgo": [51, 52, 64, 92, 108], "ctlgo001": 55, "ctlgodcm": 92, "ctlmode": [51, 52, 64, 92], "ctlmode011": 55, "ctlmodedcm": 92, "ctlosc1": [51, 52, 64, 92, 108], "ctlosc1001": 55, "ctlosc1dcm": [92, 108], "ctlosc2": [51, 52, 64, 92, 108], "ctlosc2001": 55, "ctlosc2dcm": [92, 108], "ctlsel0": [51, 52, 64, 92, 108], "ctlsel0011": 55, "ctlsel0dcm": 92, "ctlsel1": [51, 52, 64, 92, 108], "ctlsel1101": 55, "ctlsel1dcm": [92, 108], "ctlsel2": [51, 52, 64, 92, 108], "ctlsel2100": 55, "ctlsel2dcm": [92, 108], "ctr": 14, "ctrl0": [128, 144, 159], "ctrl00001": [144, 159], "ctrl1": [128, 144, 159], "ctrl10010": [144, 159], "ctrl2": 128, "ctrl3": 128, "ctt": 85, "ctt001100010": 85, "ctt01011": 85, "ctt0111": 85, "curious": [12, 34], "current": [35, 46, 88], "cut": [56, 58, 124, 154], "cv100": [2, 12], "cv64": [5, 9, 12], "cx0": [60, 118, 134, 149], "cx0100": [118, 134, 149], "cx1": [60, 118], "cx10": [134, 149], "cx1010": 60, "cxt": 140, "cy0": 79, "cy0111": 60, "cy0f": [37, 46, 88, 105], "cy0g": [37, 46, 88, 105], "cy1010": [60, 118, 134, 149], "cy110": 118, "cycl": [35, 87, 102], "cycle_limit_sel": 111, "cyinit": [37, 46, 60, 79, 88, 105, 118, 134, 149], "cyinitslice0": [79, 105, 118, 134, 149], "cyinitslice1": [37, 46, 60, 79, 118, 134, 149], "cyinitslice2": 105, "cyinitslice3": [37, 46], "cyself": [37, 46, 79, 88], "cyselfslice0": 79, "cyselfslice1": [37, 46, 79], "cyselfslice3": [37, 46], "cyselg": [37, 46, 79, 88], "cyselgslice0": [79, 88], "cyselgslice1": [37, 46, 79, 88], "cyselgslice3": [37, 46], "d": [14, 36, 69, 87, 102, 114, 129, 145, 151, 160, 200], "d0": [138, 153], "d01": 114, "d1": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195, 200], "d10": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 138, 153, 191, 192, 193, 194, 195], "d100001": [129, 145, 160], "d1001": 114, "d11": [3, 6, 7, 20, 21, 22, 23, 24, 25, 69, 138, 153, 192, 193, 194, 195], "d12": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 138, 153, 192, 193, 194, 195], "d13": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 138, 153, 192, 193, 194, 195], "d14": [2, 3, 6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d15": [3, 6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d16": [3, 6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d17": [6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d18": [6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d19": [6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d1olog": 160, "d1ologic0": 145, "d1ologic1": [145, 160], "d2": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d20": [6, 7, 22, 23, 24, 138, 153, 194, 195], "d21": [6, 7, 22, 23, 138, 153, 194, 195], "d22": [6, 7, 22, 23, 138, 153, 194, 195], "d23": [22, 23, 138, 153], "d24": [22, 23, 138, 153], "d25": [22, 23], "d26": [22, 23], "d2ologic0": [114, 145], "d2ologic1": 114, "d3": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d3iob0": [114, 129], "d3iob1": [114, 129], "d3ologic0": 145, "d3ologic1": 145, "d4": [2, 3, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d4iob0": 114, "d4iob1": 114, "d4olog": 160, "d4ologic0": [129, 145, 160], "d4ologic1": [129, 160], "d5": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 114, 129, 138, 145, 153, 160, 192, 193, 194, 195], "d5ffinit": [134, 149], "d5ffinitslice0": [134, 149], "d5ffmux": [134, 149], "d5ffsr": [134, 149], "d5ffsrinit": 60, "d5ffsrinitslice0": 60, "d5ffsrslice1": 134, "d5ilogic1": 145, "d5olog": 160, "d5ologic0": [114, 129, 160], "d5ologic1": [114, 129], "d5q0": 60, "d5q0100": [60, 134, 149], "d6": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d6iob0": 129, "d6iob1": 129, "d6lut": [60, 118, 134, 149], "d6ologic1": 145, "d7": [2, 3, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 138, 153, 160, 190, 191, 192, 193, 194, 195], "d7olog": 160, "d7ologic0": 160, "d8": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 138, 153, 160, 191, 192, 193, 194, 195], "d8olog": 160, "d8ologic1": 160, "d9": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 138, 153, 192, 193, 194, 195], "d_emu": 145, "d_emu1": 160, "d_emu1ilog": 160, "d_emu1ilogic0": 160, "d_emu2": 160, "d_emu2ilog": 160, "d_emu2ilogic1": 160, "d_emu_opt": 145, "d_in": [114, 129], "d_out_busi": 129, "daddr0": 108, "daddr1": 108, "daddr1dcm": 108, "daddr2": 108, "daddr2dcm": 108, "daddr3": 108, "daddr4": 108, "daddr4dcm": 108, "daddr5": 108, "daddr5dcm": 108, "daddr6": 108, "daddr6dcm": 108, "data": [10, 12, 14, 17, 32, 35, 37, 42, 45, 46, 53, 54, 55, 58, 59, 65, 74, 78, 87, 88, 93, 96, 97, 102, 105, 110, 112, 114, 124, 127, 129, 140, 154, 164, 169, 174, 179, 184, 188, 189, 196, 200], "data0": [42, 55, 97], "data00001000001": 97, "data00001000100": 97, "data00mux": 55, "data011": 74, "data0111": [164, 169, 174, 179], "data1": [42, 55, 97], "data10": [42, 55], "data10001000010": 97, "data10001001000": 97, "data101mux": 55, "data10mux": 55, "data11": [42, 55], "data110mux": 55, "data11mux": 55, "data12": [42, 55], "data13": [42, 55], "data130mux": 55, "data131mux": 55, "data14": [42, 55], "data140mux": 55, "data15": [42, 55], "data16": [42, 55], "data160mux": 55, "data17": [42, 55], "data170mux": 55, "data171mux": 55, "data18": [42, 55], "data180mux": 55, "data181mux": 55, "data19": [42, 55], "data190mux": 55, "data2": [42, 55, 97], "data20": [42, 55], "data20001000100": 97, "data20001010000": 97, "data20mux": 55, "data21": [42, 55], "data210mux": 55, "data21mux": 55, "data22": [42, 55], "data220mux": 55, "data221mux": 55, "data23": [42, 55], "data24": [42, 55], "data240mux": 55, "data25": [42, 55], "data250mux": 55, "data251mux": 55, "data26": [42, 55], "data261mux": 55, "data27": [42, 55], "data270mux": 55, "data28": [42, 55], "data29": [42, 55], "data290mux": 55, "data3": [42, 55, 97], "data30": [42, 55], "data30001001000": 97, "data30001100000": 97, "data300mux": 55, "data301mux": 55, "data30mux": 55, "data31": [42, 55], "data4": [42, 55, 97], "data40001000001": 97, "data40001000010": 97, "data40001000100": 97, "data5": [42, 55, 97], "data50001000010": 97, "data50001000100": 97, "data50001001000": 97, "data50mux": 55, "data51mux": 55, "data6": [42, 55, 97], "data60001000100": 97, "data60001001000": 97, "data60001010000": 97, "data60mux": 55, "data7": [42, 55, 97], "data70001001000": 97, "data70001010000": 97, "data70001100000": 97, "data8": [42, 55], "data80mux": 55, "data9": [42, 55], "data90mux": 55, "data91mux": 55, "data_ctl_a_n": 151, "data_ctl_a_nphy_control": 151, "data_ctl_b_n": 151, "data_ctl_c_n": 151, "data_ctl_c_nphy_control": 151, "data_ctl_d_n": 151, "data_ctl_n": 151, "data_ctl_nphaser_out0": 151, "data_ctl_nphaser_out1": 151, "data_ctl_nphaser_out2": 151, "data_ctl_nphaser_out3": 151, "data_l": [116, 132, 147], "data_r": [61, 114, 129, 145, 160], "data_rd_cycl": 151, "data_u": [116, 132, 147], "data_width": [114, 129, 145, 160], "data_width_": 87, "data_width_a": [45, 59, 87], "data_width_b": [45, 59, 87], "data_width_reload": 69, "data_width_start": 69, "databas": [11, 15, 16, 33, 35, 36, 188, 197, 199, 200], "datain": [129, 145, 160], "datain0010": 160, "datain00100": 145, "datain1000": 129, "datainilogic0": 129, "datainilogic1": 129, "datainiob1": 145, "dataint": 184, "datap": [45, 59, 87, 102], "datap_l": [116, 132, 147], "datap_u": [116, 132, 147], "datareg": 13, "datastream": [17, 189], "dbl": [38, 42, 47, 55, 68, 89, 97, 113, 128, 144, 159, 183, 186], "dbl0001010000": 128, "dbl0001100000": 128, "dbl0010010000": 128, "dbl0010100000": 128, "dbl0100010000": 128, "dbl0100100000": 128, "dbl1000010000": 128, "dbl1000100000": 128, "dbuf": [74, 76, 164, 166, 169, 171, 174, 176, 179, 181], "dcdr_filter": 111, "dci": [56, 97, 98, 106, 114, 119, 129, 145, 160], "dci0": [50, 91], "dci00": 50, "dci1": [50, 91], "dci11": 50, "dci_altvr": 91, "dci_altvrmisc": 91, "dci_clk_en": [50, 91, 104, 117, 133, 148], "dci_clk_enablemisc": 91, "dci_misc": [114, 129, 145], "dci_mod": [57, 99, 114, 129, 145, 160], "dci_osc_sel": 50, "dci_t": [114, 129, 145, 160], "dci_test_mux": 50, "dcireset": [104, 117, 133, 148], "dcireset0": 50, "dcireset1": 50, "dcitermdisable_sel": 160, "dciupdatemode_asrequir": [57, 99, 114, 129, 145], "dciupdatemode_asrequirediob0": [57, 99], "dciupdatemode_asrequirediob1": [57, 99], "dciupdatemode_asrequirediob2": 99, "dciupdatemode_asrequirediob3": [57, 99], "dciupdatemode_asrequirediob4": [57, 99], "dciupdatemode_asrequirediob5": 99, "dciupdatemode_quiet": 160, "dclk": [66, 117, 125, 126, 133, 141, 142, 148], "dclk0": 108, "dclk_divid_2": 115, "dclk_miss": 115, "dclkgth": 141, "dclkgtp": 66, "dclkgtp_dual": 125, "dclkgtx_dual": 126, "dclksysmon": 117, "dclkxadc": 148, "dcm": [54, 56, 87, 93, 96, 108, 110, 112, 114], "dcm0": [64, 120], "dcm0000000000001": 64, "dcm000001000000111111": 106, "dcm0_clk00000000110": 64, "dcm0_clk1800000010110": 64, "dcm0_clk2700000011110": 64, "dcm0_clk2x0000100010": 64, "dcm0_clk2x1800000101010": 64, "dcm0_clk900000001110": 64, "dcm0_clkdv0000110010": 64, "dcm0_clkfb011": [72, 120], "dcm0_clkfx0000111010": 64, "dcm0_clkfx1800000100110": 64, "dcm0_clkin001": 120, "dcm0_clkin010": 72, "dcm0_concur0000101110": 64, "dcm1": [64, 120], "dcm100001000001011111": 106, "dcm1000010001000011111": 106, "dcm1100010010000011111": 106, "dcm1200100000000111111": 106, "dcm1300100000001011111": 106, "dcm1400100000010011111": 106, "dcm1500100000100011111": 106, "dcm1600100001000011111": 106, "dcm1700100010000011111": 106, "dcm1801000000000111111": 106, "dcm1901000000001011111": 106, "dcm1_clk00001000000": 64, "dcm1_clk1800101000000": 64, "dcm1_clk2700111000000": 64, "dcm1_clk2x1000000000": 64, "dcm1_clk2x1801010000000": 64, "dcm1_clk900011000000": 64, "dcm1_clkdv1100000000": 64, "dcm1_clkfb001": 72, "dcm1_clkfb010": 120, "dcm1_clkfx1110000000": 64, "dcm1_clkfx1801001000000": 64, "dcm1_clkin000": [72, 120], "dcm1_concur1011000000": 64, "dcm200001000010011111": 106, "dcm2001000000010011111": 106, "dcm2101000000100011111": 106, "dcm2201000001000011111": 106, "dcm2301000010000011111": 106, "dcm300001000100011111": 106, "dcm400001001000011111": 106, "dcm500001010000011111": 106, "dcm600010000000111111": 106, "dcm700010000001011111": 106, "dcm800010000010011111": 106, "dcm900010000100011111": 106, "dcm_bufpll": 67, "dcm_clkdv_clkfx_align": [108, 120], "dcm_clkdv_clkfx_alignmentdcm": 108, "dcm_clkdv_clkfx_alignmentdcm0": 120, "dcm_clkdv_clkfx_alignmentdcm1": 120, "dcm_clkfb_iodly_muxinsel": 120, "dcm_clkfb_iodly_muxinseldcm0": 120, "dcm_clkfb_iodly_muxinseldcm1": 120, "dcm_clkfb_iodly_muxout_sel": 120, "dcm_clkfb_iodly_muxout_seldcm0": 120, "dcm_clkfb_iodly_muxout_seldcm1": 120, "dcm_clkin_iodly_muxinsel": 120, "dcm_clkin_iodly_muxinseldcm0": 120, "dcm_clkin_iodly_muxinseldcm1": 120, "dcm_clkin_iodly_muxout_sel": 120, "dcm_clkin_iodly_muxout_seldcm0": 120, "dcm_clkin_iodly_muxout_seldcm1": 120, "dcm_clklost_en": 120, "dcm_clklost_endcm0": 120, "dcm_clklost_endcm1": 120, "dcm_com_pwc_fb_en": 120, "dcm_com_pwc_fb_endcm0": 120, "dcm_com_pwc_fb_endcm1": 120, "dcm_com_pwc_fb_tap": 120, "dcm_com_pwc_ref_en": 120, "dcm_com_pwc_ref_endcm0": 120, "dcm_com_pwc_ref_endcm1": 120, "dcm_com_pwc_ref_tap": 120, "dcm_common_msb_sel": 120, "dcm_enabl": 50, "dcm_ext_fb_en": [108, 120], "dcm_ext_fb_endcm": 108, "dcm_ext_fb_endcm0": 120, "dcm_ext_fb_endcm1": 120, "dcm_lock_high": 108, "dcm_lock_high_b": 120, "dcm_lock_high_bdcm0": 120, "dcm_lock_high_bdcm1": 120, "dcm_lock_highdcm": 108, "dcm_out100": 47, "dcm_out_l0100": [47, 89], "dcm_out_l01000": 47, "dcm_out_r1000": [47, 89], "dcm_out_r10000": 47, "dcm_performance_mod": 108, "dcm_performance_modedcm": 108, "dcm_pll_rst_dcm": 120, "dcm_pll_rst_dcmdcm0": 120, "dcm_pll_rst_dcmdcm1": 120, "dcm_powerdown_common_en_b": 120, "dcm_powerdown_common_en_bdcm0": 120, "dcm_powerdown_common_en_bdcm1": 120, "dcm_pulse_width_correction_high": 108, "dcm_pulse_width_correction_low": 108, "dcm_reg_pwrd_cfg": 120, "dcm_reg_pwrd_cfgdcm0": 120, "dcm_reg_pwrd_cfgdcm1": 120, "dcm_scanmod": 120, "dcm_scanmodedcm0": 120, "dcm_scanmodedcm1": 120, "dcm_shutdown": [48, 90, 107], "dcm_trim_cal": 120, "dcm_unused_taps_powerdown": [108, 120], "dcm_unused_taps_powerdowndcm": 108, "dcm_use_reg_readi": 120, "dcm_use_reg_readydcm0": 120, "dcm_use_reg_readydcm1": 120, "dcm_vbg_pd": [108, 120], "dcm_vbg_sel": [108, 120], "dcm_vref_sourc": 108, "dcm_vreg": 52, "dcm_vreg_en": [108, 120], "dcm_vreg_enabledcm": 108, "dcm_vreg_enabledcm0": 120, "dcm_vreg_enabledcm1": 120, "dcm_vreg_phase_margin": 108, "dcm_vsply_valid_acc": 120, "dcm_wait_pll": 120, "dcm_wait_plldcm0": 120, "dcm_wait_plldcm1": 120, "dcmclk": 97, "dcmclk0": 97, "dcmclk00001000001": 97, "dcmclk0int": 97, "dcmclk1": 97, "dcmclk10001000010": 97, "dcmclk1int": 97, "dcmclk2": 97, "dcmclk20001000001": 97, "dcmclk2int": 97, "dcmclk3": 97, "dcmclk30001000010": 97, "dcmclk3int": 97, "dcmt_bot": 151, "dcmt_top": 151, "dcr_autolock_en": 131, "dcr_test": 131, "dcremacclk": 123, "dcy0": [60, 118, 134, 149], "dcy0slice0": [118, 134, 149], "dcy0slice1": [60, 149], "dd1": 34, "ddel_a": [45, 59, 87], "ddel_a_default": 45, "ddel_b": [45, 59, 87], "ddel_b_default": 45, "ddr": [56, 69, 98], "ddr0": [114, 129, 145, 160], "ddr00100": [129, 160], "ddr01": 70, "ddr01100": [129, 145], "ddr1": 61, "ddr100": 69, "ddr1000": 69, "ddr210": 70, "ddr300": 70, "ddr3_bypass": 145, "ddr3_bypassologic0": 145, "ddr3_data": 145, "ddr3_dataologic1": 145, "ddr_align": 69, "ddr_clk_edg": [114, 129, 145, 160], "ddr_enabl": 69, "ddr_opposite_edg": 69, "ddr_opposite_edgeiodelay1": 69, "ddrioiclk0": 69, "deal": [58, 93, 97], "dec": [164, 166, 167, 169, 171, 172, 174, 176, 177, 179, 181, 182], "dec0": [166, 171, 176, 181], "dec1": [166, 171, 176, 181], "dec2": [166, 171, 176, 181], "dec_mcomma_detect": [94, 95, 111, 142, 155, 156, 157], "dec_mcomma_detect_0": [66, 125, 126], "dec_mcomma_detect_0gtp": 66, "dec_mcomma_detect_0gtp_du": 125, "dec_mcomma_detect_0gtx_du": 126, "dec_mcomma_detect_1": [66, 125, 126], "dec_mcomma_detect_1gtp": 66, "dec_mcomma_detect_1gtp_du": 125, "dec_mcomma_detect_1gtx_du": 126, "dec_mcomma_detectgt11a": 111, "dec_mcomma_detectgt11b": 111, "dec_mcomma_detectgth_channel": 155, "dec_mcomma_detectgtp_channel": 156, "dec_mcomma_detectgtx0": 142, "dec_mcomma_detectgtx1": 142, "dec_mcomma_detectgtx2": 142, "dec_mcomma_detectgtx3": 142, "dec_mcomma_detectgtx_channel": 157, "dec_pcomma_detect": [94, 95, 111, 142, 155, 156, 157], "dec_pcomma_detect_0": [66, 125, 126], "dec_pcomma_detect_0gtp": 66, "dec_pcomma_detect_0gtp_du": 125, "dec_pcomma_detect_0gtx_du": 126, "dec_pcomma_detect_1": [66, 125, 126], "dec_pcomma_detect_1gtp": 66, "dec_pcomma_detect_1gtp_du": 125, "dec_pcomma_detect_1gtx_du": 126, "dec_pcomma_detectgt11a": 111, "dec_pcomma_detectgt11b": 111, "dec_pcomma_detectgth_channel": 155, "dec_pcomma_detectgtp_channel": 156, "dec_pcomma_detectgtx0": 142, "dec_pcomma_detectgtx1": 142, "dec_pcomma_detectgtx2": 142, "dec_pcomma_detectgtx3": 142, "dec_pcomma_detectgtx_channel": 157, "dec_valid_comma_onli": [94, 95, 111, 142, 155, 156, 157], "dec_valid_comma_only_0": [66, 125, 126], "dec_valid_comma_only_0gtp": 66, "dec_valid_comma_only_0gtp_du": 125, "dec_valid_comma_only_0gtx_du": 126, "dec_valid_comma_only_1": [66, 125, 126], "dec_valid_comma_only_1gtp": 66, "dec_valid_comma_only_1gtp_du": 125, "dec_valid_comma_only_1gtx_du": 126, "dec_valid_comma_onlygt11a": 111, "dec_valid_comma_onlygt11b": 111, "dec_valid_comma_onlygth_channel": 155, "dec_valid_comma_onlygtp_channel": 156, "dec_valid_comma_onlygtx0": 142, "dec_valid_comma_onlygtx1": 142, "dec_valid_comma_onlygtx2": 142, "dec_valid_comma_onlygtx3": 142, "dec_valid_comma_onlygtx_channel": 157, "decod": 102, "decoded1": [155, 156, 157], "dedic": [12, 14, 34, 36, 45, 46, 56, 58, 87, 88, 93, 97, 98, 102, 110, 114, 124, 129, 145, 154, 160, 189, 198, 200], "def": [15, 16], "default": [17, 35, 54], "default0": 145, "default00": 114, "default001": 160, "default0011": 145, "default10": 129, "default_idelay_valu": [129, 145], "default_only1011": 119, "defin": 200, "definit": 160, "del_clk_q": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_d_q_comb": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_d_q_latch": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_exp_d": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_exp_exp": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_ibuf_d": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_ibuf_fclk": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_ibuf_fo": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_ibuf_fsr": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_ibuf_imux": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_ibuf_plain": [2, 3, 4, 5, 6, 7, 8, 9], "del_ibuf_schmitt": [2, 3, 4, 5, 6, 7, 8, 9], "del_imux_ct": [2, 3, 4, 5, 6, 7, 8, 9], "del_imux_d_hp": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_imux_d_lp": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_imux_fbn": [190, 191, 192, 193, 194, 195], "del_imux_or": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_imux_pt": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_imux_pt_c": [20, 21, 24, 25, 27, 28, 30, 31], "del_imux_pt_clk": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_imux_pt_o": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_imux_pt_sr": [20, 21, 24, 25, 27, 28, 30, 31], "del_mc_fo": [2, 3, 4, 5, 6, 7, 8, 9], "del_obuf_fast": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_obuf_o": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_obuf_slow": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_pt_ut": [190, 191, 192, 193, 194, 195], "del_sr_q": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_uim_imux": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "delai": [14, 44, 47, 80, 84, 124, 127, 140, 143, 145, 154, 158], "delay0": [76, 166, 171, 176, 181, 186], "delay00": [76, 171, 176, 181], "delay_bypass": 160, "delay_bypassbufio0": 160, "delay_bypassbufio1": 160, "delay_common": 57, "delay_commoniob0": 57, "delay_commoniob1": 57, "delay_commoniob2": 57, "delay_commoniob3": 57, "delay_commoniob4": 57, "delay_commoniob5": 57, "delay_commoniob6": 57, "delay_en": 43, "delay_line1": 120, "delay_src": [69, 129, 145, 160], "delay_typ": 145, "delay_vari": 57, "delay_variableiob0": 57, "delay_variableiob1": 57, "delay_variableiob3": 57, "delay_variableiob4": 57, "delaychain_osc": [69, 129], "delaychain_osc100": 160, "delaychain_osc1000": 160, "delaychain_osc10000": 145, "delaychain_osc_or_odatain_lp_or_idrp2_mcb": 69, "delaychain_osciodelay0": 69, "delaychain_osciodelay1": 69, "delayed_mem_ref0101": 151, "delayed_phase_ref11": 151, "delayed_phase_ref1100": 151, "delayed_ref01": 151, "delayed_ref0100": 151, "delayed_write0": 147, "delayed_write00": 132, "delaymux": 186, "delaymuxint": 186, "delaymuxiob2": 186, "delaymuxiob3": 186, "depend": [17, 35, 36, 55, 58, 87, 97, 110, 114, 124, 140, 154, 160, 189, 199, 200], "deriv": [12, 34, 56, 98, 198, 200], "describ": [17, 35, 46, 47, 58, 87, 88, 89, 106, 119, 120, 135, 136, 150, 151, 189], "descript": [45, 105], "design": [12, 36, 58, 198, 200], "deskew_adjust": [54, 64, 96, 108, 120], "despit": 154, "destin": 36, "detail": [35, 58, 93, 102, 199], "determin": [12, 34, 35, 46, 88, 200], "dev_cap2_ari_forwarding_support": 161, "dev_cap2_ari_forwarding_supportedpci": 161, "dev_cap2_atomicop32_completer_support": 161, "dev_cap2_atomicop32_completer_supportedpci": 161, "dev_cap2_atomicop64_completer_support": 161, "dev_cap2_atomicop64_completer_supportedpci": 161, "dev_cap2_atomicop_routing_support": 161, "dev_cap2_atomicop_routing_supportedpci": 161, "dev_cap2_cas128_completer_support": 161, "dev_cap2_cas128_completer_supportedpci": 161, "dev_cap2_endend_tlp_prefix_support": 161, "dev_cap2_endend_tlp_prefix_supportedpci": 161, "dev_cap2_extended_fmt_field_support": 161, "dev_cap2_extended_fmt_field_supportedpci": 161, "dev_cap2_ltr_mechanism_support": 161, "dev_cap2_ltr_mechanism_supportedpci": 161, "dev_cap2_max_endend_tlp_prefix": 161, "dev_cap2_no_ro_enabled_prpr_pass": 161, "dev_cap2_no_ro_enabled_prpr_passingpci": 161, "dev_cap2_tph_completer_support": 161, "dev_cap_enable_slot_pwr_limit_scal": [146, 161], "dev_cap_enable_slot_pwr_limit_scalepci": [146, 161], "dev_cap_enable_slot_pwr_limit_valu": [146, 161], "dev_cap_enable_slot_pwr_limit_valuepci": [146, 161], "dev_cap_endpoint_l0s_lat": [71, 146, 161], "dev_cap_endpoint_l1_lat": [71, 146, 161], "dev_cap_ext_tag_support": [71, 146, 161], "dev_cap_ext_tag_supportedpci": [146, 161], "dev_cap_function_level_reset_cap": [146, 161], "dev_cap_function_level_reset_capablepci": [146, 161], "dev_cap_max_payload_support": [71, 146, 161], "dev_cap_phantom_functions_support": [71, 146, 161], "dev_cap_role_based_error": [71, 146, 161], "dev_cap_role_based_errorpci": [146, 161], "dev_cap_rsvd_14_12": [146, 161], "dev_cap_rsvd_17_16": [146, 161], "dev_cap_rsvd_31_29": [146, 161], "dev_control_aux_power_support": [146, 161], "dev_control_aux_power_supportedpci": [146, 161], "dev_control_ext_tag_default": 161, "dev_control_ext_tag_defaultpci": 161, "devic": [11, 15, 16, 33, 35, 44, 45, 46, 47, 54, 55, 87, 88, 89, 96, 97, 112, 114, 127, 129, 143, 145, 158, 160, 188, 197, 199], "device_id": 146, "devicebram": 45, "devicecapabilityendpointl0slat": 130, "devicecapabilityendpointl1lat": 130, "devicedcm": [51, 52, 92], "deviceid": 130, "deviceiodelai": [129, 145], "devicemmcm": 136, "devicepl": 120, "deviceserialnumb": 130, "devicevalu": [47, 61], "devoid": 154, "df": [51, 92], "dfb001": 61, "dfb010": 61, "dfe_cal_tim": [126, 142], "dfe_cfg": 142, "dfe_cfg_0": 126, "dfe_cfg_1": 126, "dfe_drp_en": 142, "dfe_drp_engtx0": 142, "dfe_drp_engtx1": 142, "dfe_drp_engtx2": 142, "dfe_drp_engtx3": 142, "dfe_train_ctrl_lane0": 141, "dfe_train_ctrl_lane1": 141, "dfe_train_ctrl_lane2": 141, "dfe_train_ctrl_lane3": 141, "dff": [14, 36, 200], "dff0": 16, "dff00": [2, 3, 4, 5, 6, 7, 8, 9, 188], "dff1": 15, "dff_latch": 134, "dff_latchslice0": 134, "dffce": 200, "dffce11": [2, 3, 4, 5, 6, 7, 8, 9, 188], "dffinit": [118, 134, 149], "dffinitslice0": [118, 134, 149], "dffmux": [60, 118, 134, 149], "dffmuxslice1": 60, "dffsr": [118, 134, 149], "dffsrinit": 60, "dffsrinitslice1": 60, "dffsrslice0": 149, "dffsrslice1": 134, "dfs_": [52, 64], "dfs_ave_freq_adj_interv": 108, "dfs_ave_freq_gain": [108, 120], "dfs_ave_freq_sample_interv": [108, 120], "dfs_c": [52, 64], "dfs_cfg_bypass": 120, "dfs_cfg_bypassdcm0": 120, "dfs_cfg_bypassdcm1": 120, "dfs_coarse_sel": 108, "dfs_coarse_seldcm": 108, "dfs_coin_window": 108, "dfs_custom_fast_sync": 120, "dfs_early_lock": [108, 120], "dfs_early_lockdcm": 108, "dfs_early_lockdcm0": 120, "dfs_early_lockdcm1": 120, "dfs_en": 120, "dfs_en_relrst": 108, "dfs_en_relrst_b": 120, "dfs_en_relrst_bdcm0": 120, "dfs_en_relrst_bdcm1": 120, "dfs_en_relrstdcm": 108, "dfs_enabl": [51, 52, 64, 92, 108], "dfs_enabledcm": [51, 52, 92, 108], "dfs_enabledcm0": 64, "dfs_enabledcm1": 64, "dfs_endcm0": 120, "dfs_endcm1": 120, "dfs_extend_flush_tim": 108, "dfs_extend_flush_timedcm": 108, "dfs_extend_halt_tim": 108, "dfs_extend_halt_timedcm": 108, "dfs_extend_run_tim": 108, "dfs_extend_run_timedcm": 108, "dfs_fast_upd": 120, "dfs_fast_updatedcm0": 120, "dfs_fast_updatedcm1": 120, "dfs_feedback": [51, 52, 64, 92, 108], "dfs_feedbackdcm": [51, 52, 108], "dfs_feedbackdcm0": 64, "dfs_feedbackdcm1": 64, "dfs_fine_sel": 108, "dfs_fine_seldcm": 108, "dfs_frequency_mod": [51, 52, 64, 92, 108, 120], "dfs_frequency_modedcm": [51, 52, 108], "dfs_frequency_modedcm0": [64, 120], "dfs_frequency_modedcm1": [64, 120], "dfs_hardsync": 108, "dfs_hardsync_b": 120, "dfs_hf_trim_cal": 120, "dfs_jf_lower_limit": 120, "dfs_mpw_high": 120, "dfs_mpw_highdcm0": 120, "dfs_mpw_highdcm1": 120, "dfs_mpw_low": 120, "dfs_mpw_lowdcm0": 120, "dfs_mpw_lowdcm1": 120, "dfs_non_stop": 108, "dfs_non_stopdcm": 108, "dfs_osc_on_fx": 120, "dfs_osc_on_fxdcm0": 120, "dfs_osc_on_fxdcm1": 120, "dfs_oscillator_mod": [108, 120], "dfs_oscillator_modedcm0": 120, "dfs_oscillator_modedcm1": 120, "dfs_output_psdly_on_concur": 120, "dfs_output_psdly_on_concurdcm0": 120, "dfs_output_psdly_on_concurdcm1": 120, "dfs_pwrd_clkin_stop_b": 120, "dfs_pwrd_clkin_stop_bdcm0": 120, "dfs_pwrd_clkin_stop_bdcm1": 120, "dfs_pwrd_clkin_stop_sticky_b": 120, "dfs_pwrd_clkin_stop_sticky_bdcm0": 120, "dfs_pwrd_clkin_stop_sticky_bdcm1": 120, "dfs_pwrd_reply_times_out_b": 120, "dfs_pwrd_reply_times_out_bdcm0": 120, "dfs_pwrd_reply_times_out_bdcm1": 120, "dfs_ref_on_fx": 120, "dfs_ref_on_fxdcm0": 120, "dfs_ref_on_fxdcm1": 120, "dfs_skip_fin": 108, "dfs_skip_finedcm": 108, "dfs_spare": 108, "dfs_sync_to_dl": 120, "dfs_sync_to_dlldcm0": 120, "dfs_sync_to_dlldcm1": 120, "dfs_synth_clock_spe": 120, "dfs_synth_fast_synch": 120, "dfs_taptrim": 120, "dfs_tp_sel": 108, "dfs_tp_seldcm": 108, "dfs_trackmod": 108, "dfs_trackmodedcm": 108, "dfs_tweak": 120, "dge": [2, 3, 6, 7, 12, 14], "dge_en": [2, 3, 6, 7], "di": [12, 46, 87, 88, 102, 183], "di0": [108, 183], "di1": 108, "di10": 108, "di10dcm": 108, "di11": [108, 183], "di12": 108, "di126": [2, 12], "di12dcm": 108, "di13": 108, "di13dcm": 108, "di14": 108, "di14dcm": 108, "di15": 108, "di1dcm": 108, "di2": 108, "di222": [3, 12], "di288": [6, 12], "di2dcm": 108, "di3": 108, "di324": [7, 12], "di4": 108, "di44": [4, 5, 12], "di4dcm": 108, "di5": 108, "di5dcm": 108, "di6": 108, "di6dcm": 108, "di7": 108, "di8": 108, "di81": [8, 9, 12], "di9": 108, "di9dcm": 108, "di_dur": 151, "dia": 102, "dia0": 78, "dia1": 78, "dia10": 78, "dia11": 78, "dia12": 78, "dia13": 78, "dia14": 78, "dia15": 78, "dia2": 78, "dia3": 78, "dia4": 78, "dia5": 78, "dia6": 78, "dia7": 78, "dia8": 78, "dia9": 78, "diagon": [55, 97], "dib": 102, "dib0": 78, "dib1": 78, "dib10": 78, "dib11": 78, "dib12": 78, "dib13": 78, "dib14": 78, "dib15": 78, "dib16": 87, "dib2": 78, "dib3": 78, "dib31": 87, "dib4": 78, "dib5": 78, "dib6": 78, "dib7": 78, "dib8": 78, "dib9": 78, "die": [12, 17, 56, 154, 160, 189], "dif": [46, 88], "dif_mux": [37, 46, 88, 105], "dif_muxslice0": 105, "diff010": [114, 129], "diff10": [80, 85], "diff101": [57, 99], "diff110": [57, 69], "diff_hp100011": 160, "diff_hp10010": 145, "diff_hp1010": 160, "diff_lp000011": 160, "diff_lp00010": 145, "diff_lp0010": 160, "diff_mobile_ddr": 69, "diff_mobile_ddr10001000": 69, "diff_mod": 69, "diff_output_en": 69, "diff_phase_detector": 69, "diff_phase_detectorilogic1": 69, "diff_phase_detectoriodelay0": 69, "diff_phase_detectorologic1": 69, "diff_term": 69, "differ": [16, 35, 36, 46, 55, 88, 97, 160, 198, 200], "differenti": [14, 56, 114, 129, 145, 160], "differential1": 69, "dig": [46, 88], "dig_mux": [37, 46, 88, 105], "dig_muxslice0": 105, "dig_muxslice2": 105, "digit": [44, 54, 55, 56, 67, 96, 97, 98, 112], "digrx_fwdclk": 111, "digrx_sync_mod": 111, "digrx_sync_modegt11a": 111, "digrx_sync_modegt11b": 111, "dimens": 58, "dimension": 188, "din": [73, 145, 160, 163, 168, 173, 178], "din0": [73, 78, 163, 168, 173, 178], "din0000": 78, "din0001": 78, "din0110": [73, 163, 168, 173, 178], "din0int": 78, "din1": 78, "din10": 78, "din1000": 78, "din10000": 78, "din10001": 78, "din1001": 78, "din10int": 78, "din11": 78, "din11001": 78, "din11010": 78, "din11int": 78, "din12": 78, "din12010": 78, "din12011": 78, "din12int": 78, "din13": 78, "din13010": 78, "din13011": 78, "din13int": 78, "din14": 78, "din14010": 78, "din14011": 78, "din14int": 78, "din15": 78, "din15000": 78, "din15011": 78, "din15int": 78, "din16": 78, "din16110": 78, "din16111": 78, "din16int": 78, "din17": 78, "din17100": 78, "din17111": 78, "din17int": 78, "din18": 78, "din18100": 78, "din18101": 78, "din18int": 78, "din19": 78, "din19100": 78, "din19101": 78, "din19int": 78, "din1int": 78, "din2": 78, "din20": 78, "din2000": 78, "din2001": 78, "din20100": 78, "din20101": 78, "din20int": 78, "din21": 78, "din21101": 78, "din21110": 78, "din21int": 78, "din22": 78, "din22110": 78, "din22111": 78, "din22int": 78, "din23": 78, "din23110": 78, "din23111": 78, "din23int": 78, "din24": 78, "din24110": 78, "din24111": 78, "din24int": 78, "din25": 78, "din25100": 78, "din25111": 78, "din25int": 78, "din26": 78, "din26100": 78, "din26101": 78, "din26int": 78, "din27": 78, "din27100": 78, "din27101": 78, "din27int": 78, "din28": 78, "din28100": 78, "din28101": 78, "din28int": 78, "din29": 78, "din29101": 78, "din29110": 78, "din29int": 78, "din2int": 78, "din3": 78, "din30": 78, "din3001": 78, "din3010": 78, "din30110": 78, "din30111": 78, "din30int": 78, "din31": 78, "din31110": 78, "din31111": 78, "din31int": 78, "din3int": 78, "din4": 78, "din4010": 78, "din4011": 78, "din4int": 78, "din5": 78, "din5010": 78, "din5011": 78, "din5int": 78, "din6": 78, "din6010": 78, "din6011": 78, "din6int": 78, "din7": 78, "din7000": 78, "din7011": 78, "din7int": 78, "din8": 78, "din8000": 78, "din8001": 78, "din8int": 78, "din9": 78, "din9000": 78, "din9001": 78, "din9int": 78, "dinpin": [104, 117, 133], "diodelay1": 69, "dip": [87, 102], "dipa": 102, "dipb": 102, "direct": [36, 55, 87, 97], "direct0": [45, 53, 65, 109, 122, 138, 142, 153], "direct00": [155, 156, 157], "direct_path_cntrl": [136, 151], "direct_path_cntrlmmcm": 151, "direct_path_cntrlmmcm0": 136, "direct_path_cntrlmmcm1": 136, "direct_path_cntrlpl": 151, "directli": [14, 17, 35, 36, 46, 58, 87, 88, 97, 189, 200], "dis_tstblclamp": 147, "dis_tstfiforst": [132, 147], "dis_vgg_reg": [137, 152], "disabl": [36, 200], "disable00": 152, "disable111": 184, "disable_aspm_l1_tim": [146, 161], "disable_aspm_l1_timerpci": [146, 161], "disable_attr": [47, 61, 80, 89], "disable_attrbufg1": 80, "disable_attrbufgmux0": 47, "disable_attrbufgmux2": 47, "disable_attrbufgmux6": 47, "disable_attrbufgmux7": 47, "disable_attrint": 80, "disable_bar_filt": [71, 146, 161], "disable_bar_filteringpci": [146, 161], "disable_err_msg": 161, "disable_err_msgpci": 161, "disable_gt": [57, 99], "disable_gtsiob0": 57, "disable_gtsiob1": 99, "disable_gtsiob2": [57, 99], "disable_gtsiob3": 57, "disable_gtsiob4": [57, 99], "disable_id_check": [71, 146, 161], "disable_id_checkpci": [146, 161], "disable_jtag": [133, 148], "disable_lane_revers": [146, 161], "disable_lane_reversalpci": [146, 161], "disable_locked_filt": 161, "disable_locked_filterpci": 161, "disable_ppm_filt": 161, "disable_ppm_filterpci": 161, "disable_rx_poisoned_resp": 161, "disable_rx_poisoned_resppci": 161, "disable_rx_tc_filt": [146, 161], "disable_rx_tc_filterpci": [146, 161], "disable_scrambl": [71, 146, 161], "disable_scramblingpci": [146, 161], "disable_seq_match": 151, "disable_vrd_reg": 62, "disablebandgap": 91, "disablebandgapmisc": 91, "disablevgggener": 91, "disablevgggenerationmisc": 91, "disconnect": [55, 200], "displac": 58, "display_port": 69, "display_port10001000": 69, "dispmp1": 81, "dispmp2": 81, "distanc": [2, 3, 4, 5, 6, 7, 8, 9, 55, 58, 97], "distribut": [41, 54, 55, 58, 93, 96, 97, 140, 154], "distrubut": 140, "div12110": 70, "div2001": 70, "div201": [70, 151], "div4010": 70, "div410": [70, 151], "div60": 70, "div6011": 70, "div71": 70, "div8100": 70, "divclk11": 61, "divclk_edg": [136, 151], "divclk_edgemmcm": 151, "divclk_edgemmcm0": 136, "divclk_edgemmcm1": 136, "divclk_edgepl": 151, "divclk_ht": [136, 151], "divclk_lt": [136, 151], "divclk_nocount": [136, 151], "divclk_nocountmmcm": 151, "divclk_nocountmmcm0": 136, "divclk_nocountmmcm1": 136, "divclk_nocountpl": 151, "divid": [11, 12, 58, 61, 110, 124, 140, 154, 188, 200], "divide_100": 61, "divide_1000": 61, "divide_2001": 61, "divide_201": 61, "divide_300": 61, "divide_3010": 61, "divide_400": 61, "divide_4011": 61, "divide_501": 61, "divide_5100": 61, "divide_601": 61, "divide_6101": 61, "divide_710": 61, "divide_7110": 61, "divide_810": 61, "divide_8111": 61, "divide_bypass": 61, "divis": [102, 198], "dll": [51, 80, 84, 92, 98], "dll_": [52, 64], "dll_c": [52, 64], "dll_cfg0": 141, "dll_cfg1": 141, "dll_clkfb_stopped_pwrd_en_b": 120, "dll_clkfb_stopped_pwrd_en_bdcm0": 120, "dll_clkfb_stopped_pwrd_en_bdcm1": 120, "dll_clkin_stopped_pwrd_en_b": 120, "dll_clkin_stopped_pwrd_en_bdcm0": 120, "dll_clkin_stopped_pwrd_en_bdcm1": 120, "dll_control_clock_spe": 108, "dll_control_clock_speeddcm": 108, "dll_ctl_sel_clkin_div2": 108, "dll_ctl_sel_clkin_div2dcm": 108, "dll_dead_tim": [108, 120], "dll_deskew_lock_by1": [108, 120], "dll_deskew_lock_by1dcm": 108, "dll_deskew_lock_by1dcm0": 120, "dll_deskew_lock_by1dcm1": 120, "dll_deskew_maxtap": [108, 120], "dll_deskew_mintap": [108, 120], "dll_enabl": [51, 52, 64, 82, 92], "dll_enabledcm": [51, 52], "dll_enabledcm0": 64, "dll_enabledcm1": 64, "dll_enablemisc": 82, "dll_etpp_hold": 120, "dll_etpp_holddcm0": 120, "dll_etpp_holddcm1": 120, "dll_fdbklost_en": 120, "dll_fdbklost_endcm0": 120, "dll_fdbklost_endcm1": 120, "dll_frequency_mod": [51, 52, 64, 92, 108, 120], "dll_frequency_modedcm": 52, "dll_frequency_modedcm0": 64, "dll_frequency_modedcm1": 64, "dll_live_tim": [108, 120], "dll_pd_dly_sel": 108, "dll_period_lock_by1": [108, 120], "dll_period_lock_by1dcm": 108, "dll_period_lock_by1dcm0": 120, "dll_period_lock_by1dcm1": 120, "dll_phase_detector_auto_reset": 108, "dll_phase_detector_auto_resetdcm": 108, "dll_phase_detector_mod": 108, "dll_phase_detector_modedcm": 108, "dll_phase_shift_calibr": [108, 120], "dll_phase_shift_hfc": 108, "dll_phase_shift_lfc": [108, 120], "dll_phase_shift_lock_by1": [108, 120], "dll_phase_shift_lock_by1dcm": 108, "dll_phase_shift_lock_by1dcm0": 120, "dll_phase_shift_lock_by1dcm1": 120, "dll_pwrd_on_scanmode_b": 120, "dll_pwrd_on_scanmode_bdcm0": 120, "dll_pwrd_on_scanmode_bdcm1": 120, "dll_pwrd_sticky_b": 120, "dll_pwrd_sticky_bdcm0": 120, "dll_pwrd_sticky_bdcm1": 120, "dll_settle_tim": [108, 120], "dll_spare": 108, "dll_synth_clock_spe": 120, "dll_tapinit_ctl": 120, "dll_test_mux_sel": [108, 120], "dll_wait_bl": 81, "dll_wait_br": 81, "dll_wait_tl": 81, "dll_wait_tr": 81, "dll_zd1_en": 120, "dll_zd1_endcm0": 120, "dll_zd1_endcm1": 120, "dll_zd1_jf_overflow_hold": 120, "dll_zd1_jf_overflow_holddcm0": 120, "dll_zd1_jf_overflow_holddcm1": 120, "dll_zd1_phase_sel_init": 120, "dll_zd1_pwc_en": 120, "dll_zd1_pwc_endcm0": 120, "dll_zd1_pwc_endcm1": 120, "dll_zd1_pwc_tap": 120, "dll_zd1_tap_init": 120, "dll_zd2_en": [108, 120], "dll_zd2_endcm": 108, "dll_zd2_endcm0": 120, "dll_zd2_endcm1": 120, "dll_zd2_jf_overflow_hold": 120, "dll_zd2_jf_overflow_holddcm0": 120, "dll_zd2_jf_overflow_holddcm1": 120, "dll_zd2_pwc_en": 120, "dll_zd2_pwc_endcm0": 120, "dll_zd2_pwc_endcm1": 120, "dll_zd2_pwc_tap": 120, "dll_zd2_tap_init": 120, "dllc": [51, 92], "dllp": 84, "dly0001": 145, "dly1110": 145, "dly2010": 145, "dly3000": 145, "dma0_control": 131, "dma0_rxchannelctrl": 131, "dma0_rxirqtim": 131, "dma0_txchannelctrl": 131, "dma0_txirqtim": 131, "dma1_control": 131, "dma1_rxchannelctrl": 131, "dma1_rxirqtim": 131, "dma1_txchannelctrl": 131, "dma1_txirqtim": 131, "dma2_control": 131, "dma2_rxchannelctrl": 131, "dma2_rxirqtim": 131, "dma2_txchannelctrl": 131, "dma2_txirqtim": 131, "dma3_control": 131, "dma3_rxchannelctrl": 131, "dma3_rxirqtim": 131, "dma3_txchannelctrl": 131, "dma3_txirqtim": 131, "dma_test": 131, "dmonitor_cfg": [155, 156, 157], "dmonitorclk": [155, 156], "dmonitorclkgth_channel": 155, "dmonitorclkgtp_channel": 156, "dmux": 183, "dna_opt": 63, "dna_port": [56, 63, 133, 148], "dnstream_link_num": [146, 161, 162], "do": [35, 46, 87, 88, 97, 102, 160], "do1": 183, "do11000": 183, "do11001": 183, "do11010": 183, "do11011": 183, "do_dur": 151, "doa": [87, 102], "doa0": [78, 102], "doa0int": 78, "doa1": 78, "doa10": 78, "doa10int": 78, "doa11": 78, "doa11int": 78, "doa12": 78, "doa12int": 78, "doa13": 78, "doa13int": 78, "doa14": 78, "doa14int": 78, "doa15": 78, "doa15int": 78, "doa1int": 78, "doa2": 78, "doa3": 78, "doa31": 102, "doa4": 78, "doa4int": 78, "doa5": 78, "doa6": 78, "doa6int": 78, "doa7": 78, "doa8": 78, "doa8int": 78, "doa9": 78, "doa9int": 78, "doa_reg": [45, 59, 102], "doa_reg_l": [116, 132, 147], "doa_reg_u": [116, 132, 147], "dob": [87, 102], "dob0": 78, "dob0int": 78, "dob1": 78, "dob10": [78, 102], "dob10int": 78, "dob11": [78, 102], "dob11int": 78, "dob12": 78, "dob12int": 78, "dob13": 78, "dob13int": 78, "dob14": 78, "dob14int": 78, "dob15": 78, "dob15int": 78, "dob1int": 78, "dob2": 78, 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146, 151, 155, 156, 157, 161], "drp23": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp24": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp25": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp26": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp27": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp28": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp29": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp2a": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp2b": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp2c": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp2d": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp2e": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp2f": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp30": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp31": [66, 125, 126, 136, 142, 146, 151, 155, 156, 157, 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111], "drp48_maskdcm": 108, "drp49": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp49_mask": [108, 111], "drp49_maskdcm": 108, "drp4a": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4a_mask": [108, 111], "drp4b": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4b_mask": [108, 111], "drp4c": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4c_mask": [108, 111], "drp4c_maskdcm": 108, "drp4d": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4d_mask": [108, 111], "drp4d_maskdcm": 108, "drp4e": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4e_mask": [108, 111], "drp4f": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4f_mask": [108, 111], "drp50": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp50_mask": [108, 111], "drp50_maskdcm": 108, "drp51": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp51_mask": [108, 111], "drp51_maskdcm": 108, "drp52": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp52_mask": [108, 111], "drp52_maskdcm": 108, "drp53": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp53_mask": [108, 111], "drp53_maskdcm": 108, "drp54": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp54_mask": [108, 111], "drp54_maskdcm": 108, "drp55": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp55_mask": [108, 111], "drp55_maskdcm": 108, "drp56": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp56_mask": [108, 111], "drp56_maskdcm": 108, "drp57": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp57_mask": [108, 111], "drp57_maskdcm": 108, "drp58": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp58_mask": [108, 111], "drp58_maskdcm": 108, "drp59": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp59_mask": [108, 111], "drp59_maskdcm": 108, "drp5a": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5a_mask": [108, 111], "drp5a_maskdcm": 108, "drp5b": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5b_mask": [108, 111], "drp5b_maskdcm": 108, "drp5c": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5c_mask": [108, 111], "drp5c_maskdcm": 108, "drp5d": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5d_mask": [108, 111], "drp5d_maskdcm": 108, "drp5e": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5e_mask": [108, 111], "drp5e_maskdcm": 108, "drp5f": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5f_mask": [108, 111], "drp5f_maskdcm": 108, "drp60": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp60_mask": 111, "drp61": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp61_mask": 111, "drp62": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp62_mask": 111, "drp63": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp63_mask": 111, "drp64": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp64_mask": 111, "drp65": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp65_mask": 111, "drp66": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp66_mask": 111, "drp67": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp67_mask": 111, "drp68": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp68_mask": 111, "drp69": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp69_mask": 111, "drp6a": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6a_mask": 111, "drp6b": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6b_mask": 111, "drp6c": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6c_mask": 111, "drp6d": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6d_mask": 111, "drp6e": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6e_mask": 111, "drp6f": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6f_mask": 111, "drp70": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp70_mask": 111, "drp71": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp71_mask": 111, "drp72": [66, 111, 136, 146, 151, 155, 156, 157, 161], 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161], "drp82": [155, 156, 157, 161], "drp83": [155, 156, 157, 161], "drp84": [155, 156, 157, 161], "drp85": [155, 156, 157, 161], "drp86": [155, 156, 157, 161], "drp87": [155, 156, 157, 161], "drp88": [155, 156, 157, 161], "drp89": [155, 156, 157, 161], "drp8a": [155, 156, 157, 161], "drp8b": [155, 156, 157, 161], "drp8c": [155, 156, 157, 161], "drp8d": [155, 156, 157, 161], "drp8e": [155, 156, 157, 161], "drp8f": [155, 156, 157, 161], "drp90": [155, 156, 157, 161], "drp91": [155, 156, 157, 161], "drp92": [155, 156, 157, 161], "drp93": [155, 156, 157, 161], "drp94": [155, 156, 157, 161], "drp95": [155, 156, 157, 161], "drp96": [155, 156, 157], "drp97": [155, 156, 157], "drp98": [155, 156, 157], "drp99": [155, 156, 157], "drp9a": [155, 156, 157], "drp9b": [155, 156, 157], "drp9c": [155, 156, 157], "drp9d": [155, 156, 157], "drp9e": [155, 156, 157], "drp9f": [155, 156, 157], "drp_addr": 69, "drp_enabl": 69, "drp_enableologic0": 69, "drp_enableologic1": 69, "drp_from_mcb": 69, "drp_from_mcbilogic0": 69, "drp_from_mcbologic0": 69, "drp_mask": 119, "drp_mask_abov": [135, 156], "drp_mask_above_l": 150, "drp_mask_above_r": 150, "drp_mask_below": [135, 156], "drp_mask_below_l": 150, "drp_mask_below_lhclk": 150, "drp_mask_below_r": 150, "drp_mask_below_rhclk": 150, "drp_mask_belowhclk": 135, "drp_mask_belowhclk_gtp_mid": 156, "drp_mask_sysmon": 135, "drp_mask_sysmonhclk": 135, "drpa0": [155, 156, 157], "drpa1": [155, 156, 157], "drpa2": [155, 156, 157], "drpa3": [155, 156, 157], "drpa4": [155, 156, 157], "drpa5": [155, 156, 157], "drpa6": [155, 156, 157], "drpa7": [155, 156, 157], "drpa8": [155, 156, 157], "drpa9": [155, 156, 157], "drpaa": [155, 156, 157], "drpab": [155, 156, 157], "drpac": [155, 156, 157], "drpad": [155, 156, 157], "drpae": [155, 156, 157], "drpaf": [155, 156, 157], "drpclk": [155, 156, 157], "drpclkgtp_channel": 156, "drpclkgtp_common": 156, "dsn_base_ptr": [146, 161], "dsn_cap_id": [146, 161], "dsn_cap_nextptr": [146, 161], "dsn_cap_on": [146, 161], "dsn_cap_onpci": [146, 161], "dsn_cap_vers": [146, 161], "dsnbaseptr": 130, "dsncapabilitynextptr": 130, "dsp": [44, 45, 47, 54, 56, 67, 87, 110, 112, 124, 127, 140, 143, 154, 158], "dsp0": [109, 122, 138, 153], "dsp00": 109, "dsp1": [109, 122, 138, 153], "dsp11": 109, "dsp_common": 109, "dss_enabl": 92, "dss_mode": 92, "dssen": 92, "dssen001": 55, "dssendcm": 92, "dual": [14, 198], "dualcoreen": 130, "dualcoreslav": 130, "dualrolecfgcntrlrootepn": 130, "dualrolecfgcntrlrootepnpci": 130, "due": [35, 36, 46, 154], "dummi": [97, 154], "duplic": 15, "durat": 35, "dure": [87, 102], "duty_cycle_correct": [51, 52, 64, 83, 92, 108], "dvdd_comp_set": [136, 151], "dvdd_vbg_pd": [136, 151], "dvdd_vbg_sel": [136, 151], "dx": [73, 163, 168, 173, 178], "dx0": [60, 118, 134, 149], "dx0100": [118, 134, 149], "dx1": 60, "dx10": [134, 149], "dx1010": 60, "dxmux": [37, 46, 79, 88, 105], "dxmuxslice1": [37, 46, 79], "dxmuxslice3": [37, 46], "dy": [73, 163, 168, 173, 178], "dymux": [37, 46, 79, 88, 105], "dymuxslice0": 79, "dymuxslice1": [37, 46, 79], "dymuxslice3": [37, 46], "dyn_clk_inv_en": [145, 160], "dyn_clk_inv_enilogic1": 145, "dyn_clk_inv_enolog": 160, "dyn_clk_inv_enologic1": 160, "dyn_clkdiv_inv_en": [145, 160], "dyn_clkdiv_inv_enilog": 160, "dyn_clkdiv_inv_enilogic1": [145, 160], "dyn_clkdivp_inv_en": 160, "dyn_clkdivp_inv_enilog": 160, "dyn_clkdivp_inv_enilogic1": 160, "dyn_oclk_inv_en": 145, "dynamic1": [72, 120, 142, 155, 156, 157], "dynamic_en": [145, 160], "dynamic_enabledci": 145, "e": [55, 73, 74, 76, 84, 93, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 186], "e0": [38, 42, 47, 55, 78, 79, 85, 89, 97, 113, 164, 184, 186], "e000": 183, "e00000010001": 113, "e0000001010": 85, "e000001": [42, 55], "e0000010010": 85, "e00001": [42, 55], "e0000101": 97, "e0001": 78, "e00010": [42, 55], "e000100000001": 97, "e0001000000010": 97, "e000100000010": 97, "e000100000100": 97, "e000100001000": 97, "e0001000010000": 97, "e00010001": [97, 113], "e00011010": 55, "e001000000": 79, "e0010000000010": 113, "e001000000010": 97, "e0010000000100": [97, 113], "e0010000001000": 113, "e00100001": [97, 113], "e0010001": [97, 113], "e0010010": 113, "e0011": 78, "e00110000": 55, "e0011111111": 184, "e00111111111111101": [168, 171, 173, 176, 178, 181], "e00111111111111110": [168, 171, 173, 176, 178, 181], "e001111111111111101": [168, 173, 178], "e0011111111111111011": [168, 171, 173, 176, 178, 181], "e001111111111111110": [168, 173, 178], "e0011111111111111101": [168, 171, 173, 176, 178, 181], "e0100000000010": 113, "e0100000000100": 97, "e0100000001000": 113, "e0100000010": 85, "e010001": [42, 55], "e0100010": 97, "e01001": [42, 55], "e0101010": [169, 171, 174, 176, 179, 181], "e010111111111111101": [168, 171, 173, 176, 178, 181], "e010111111111111110": [168, 171, 173, 176, 178, 181], "e011": [74, 76], "e0110001": [169, 171, 174, 176, 179, 181], "e01101000": [42, 55], "e01101111111111101": [171, 176, 181], "e01101111111111110": [171, 176, 181], "e011011111111111101": [168, 173, 178], "e011011111111111110": [168, 173, 178], "e0111": [164, 166, 169, 171, 174, 176, 179, 181], "e01110001": 55, "e1": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 38, 42, 47, 55, 78, 79, 85, 89, 97, 113, 183, 184, 186, 190, 191, 192, 193, 194, 195], "e10": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 24, 25, 78, 79, 85, 183, 186, 191, 192, 193, 194, 195], "e100": 183, "e1000000000100": 113, "e1000000010": 85, "e10000010001": 113, "e10000100": [42, 55], "e1001": 78, "e101": 183, "e10100": 78, "e10110": 78, "e1011110": [74, 164, 169, 174, 179, 186], "e10gbasekr_ld_coeff_upd_lane0": 141, "e10gbasekr_ld_coeff_upd_lane1": 141, "e10gbasekr_ld_coeff_upd_lane2": 141, "e10gbasekr_ld_coeff_upd_lane3": 141, "e10gbasekr_lp_coeff_upd_lane0": 141, "e10gbasekr_lp_coeff_upd_lane1": 141, "e10gbasekr_lp_coeff_upd_lane2": 141, "e10gbasekr_lp_coeff_upd_lane3": 141, "e10gbasekr_pma_ctrl_lane0": 141, "e10gbasekr_pma_ctrl_lane1": 141, "e10gbasekr_pma_ctrl_lane2": 141, "e10gbasekr_pma_ctrl_lane3": 141, "e10gbasekx_ctrl_lane0": 141, "e10gbasekx_ctrl_lane1": 141, "e10gbasekx_ctrl_lane2": 141, "e10gbasekx_ctrl_lane3": 141, "e10gbaser_pcs_cfg_lane0": 141, "e10gbaser_pcs_cfg_lane1": 141, "e10gbaser_pcs_cfg_lane2": 141, "e10gbaser_pcs_cfg_lane3": 141, "e10gbaser_pcs_seeda0_lane0": 141, "e10gbaser_pcs_seeda0_lane1": 141, "e10gbaser_pcs_seeda0_lane2": 141, "e10gbaser_pcs_seeda0_lane3": 141, "e10gbaser_pcs_seeda1_lane0": 141, "e10gbaser_pcs_seeda1_lane1": 141, "e10gbaser_pcs_seeda1_lane2": 141, "e10gbaser_pcs_seeda1_lane3": 141, "e10gbaser_pcs_seeda2_lane0": 141, "e10gbaser_pcs_seeda2_lane1": 141, "e10gbaser_pcs_seeda2_lane2": 141, "e10gbaser_pcs_seeda2_lane3": 141, "e10gbaser_pcs_seeda3_lane0": 141, "e10gbaser_pcs_seeda3_lane1": 141, "e10gbaser_pcs_seeda3_lane2": 141, "e10gbaser_pcs_seeda3_lane3": 141, "e10gbaser_pcs_seedb0_lane0": 141, "e10gbaser_pcs_seedb0_lane1": 141, "e10gbaser_pcs_seedb0_lane2": 141, "e10gbaser_pcs_seedb0_lane3": 141, "e10gbaser_pcs_seedb1_lane0": 141, "e10gbaser_pcs_seedb1_lane1": 141, "e10gbaser_pcs_seedb1_lane2": 141, "e10gbaser_pcs_seedb1_lane3": 141, "e10gbaser_pcs_seedb2_lane0": 141, "e10gbaser_pcs_seedb2_lane1": 141, "e10gbaser_pcs_seedb2_lane2": 141, "e10gbaser_pcs_seedb2_lane3": 141, "e10gbaser_pcs_seedb3_lane0": 141, "e10gbaser_pcs_seedb3_lane1": 141, "e10gbaser_pcs_seedb3_lane2": 141, "e10gbaser_pcs_seedb3_lane3": 141, "e10gbaser_pcs_test_ctrl_lane0": 141, "e10gbaser_pcs_test_ctrl_lane1": 141, "e10gbaser_pcs_test_ctrl_lane2": 141, "e10gbaser_pcs_test_ctrl_lane3": 141, "e10gbasex_pcs_tstctrl_lane0": 141, "e10gbasex_pcs_tstctrl_lane1": 141, "e10gbasex_pcs_tstctrl_lane2": 141, "e10gbasex_pcs_tstctrl_lane3": 141, "e10int": 183, "e11": [3, 6, 7, 20, 21, 24, 25, 78, 79, 85, 183, 186, 192, 193, 194, 195], "e11000100": [42, 55], "e1101110": 186, "e1101111111": 184, "e11100": 78, "e11100100": [42, 55], "e11111110": 186, "e12": [2, 3, 6, 7, 20, 21, 24, 25, 78, 79, 85, 192, 193, 194, 195], "e12010": 78, "e12101": 78, "e13": [2, 3, 6, 7, 20, 21, 24, 25, 78, 79, 85, 192, 193, 194, 195], "e13010": 78, "e13101": 78, "e14": [2, 3, 6, 7, 24, 25, 78, 79, 85, 193, 194, 195], "e14010": 78, "e14101": 78, "e15": [3, 6, 7, 24, 25, 78, 79, 85, 193, 194, 195], "e15101": 78, "e16": [3, 6, 7, 24, 25, 78, 79, 85, 193, 194, 195], "e16100": 78, "e16111": 78, "e17": [24, 25, 78, 79, 85, 193], "e17110": 78, "e17111": 78, "e18": [24, 25, 78, 79, 85, 193], "e18000": 78, "e18111": 78, "e19": [6, 7, 24, 25, 78, 79, 85, 193, 194, 195], "e19111": 78, "e1int": 183, "e2": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 38, 42, 47, 55, 78, 79, 85, 89, 97, 113, 183, 184, 186, 190, 191, 192, 193, 194, 195], "e20": [6, 7, 24, 78, 79, 85, 194, 195], "e2001": 78, "e20101": 78, "e2011": 78, "e20110": 78, "e21": [6, 7, 78, 79, 85, 194, 195], "e21100": 78, "e2110111111": 184, "e21110": 78, "e22": [6, 7, 78, 79, 85, 194, 195], "e22100": 78, "e22110": 78, "e23": [22, 23, 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197, 198], "idcode_part": 189, "iddrin1010": 57, "iddrin2100": 57, "iddrin_mux": 57, "idelai": 160, "idelay0": 160, "idelay1": 160, "idelay_fix": 69, "idelay_fixedioiclk0": 69, "idelay_fixedioiclk1": 69, "idelay_from_half_max": 69, "idelay_from_half_maxilogic1": 69, "idelay_from_half_maxiodelay0": 69, "idelay_from_half_maxiodelay1": 69, "idelay_from_half_maxologic1": 69, "idelay_mod": 69, "idelay_typ": [129, 160], "idelay_valu": 160, "idelay_value_cur": [129, 145, 160], "idelay_value_init": [129, 145, 160], "idelay_value_n": 69, "idelay_value_p": 69, "idelayctrl": [106, 119, 145, 160], "idelaymux": 114, "ident": [12, 17, 34, 37, 42, 55, 56, 58, 87, 97, 124], "identifi": [17, 56, 58, 93, 110, 124, 140, 154], "idl": [35, 184], "ie": [35, 36, 46, 88, 110, 114, 124, 140, 154, 200], "iff": 85, "iff1_init": [57, 99, 114, 129, 145, 160], "iff1_initilogic0": [114, 129], "iff1_initilogic1": [114, 129], "iff1_initioi0": 57, "iff1_initioi1": 57, "iff1_initioi2": 57, "iff1_srval": [57, 99, 114, 129, 145, 160], "iff1_srvalioi0": [57, 99], "iff1_srvalioi1": [57, 99], "iff1_srvalioi2": [57, 99], "iff1_srvalioi3": 99, "iff2_init": [57, 99, 114, 129, 145, 160], "iff2_initilog": 160, "iff2_initilogic1": 160, "iff2_initioi0": 99, "iff2_initioi1": 99, "iff2_initioi2": 99, "iff2_initioi3": 99, "iff2_initologic0": 129, "iff2_initologic1": 129, "iff2_srval": [57, 99, 114, 129, 145, 160], "iff2_srvalilog": 160, "iff2_srvalilogic0": [114, 129, 160], "iff2_srvalilogic1": [114, 129, 145], "iff3_init": [114, 129, 145, 160], "iff3_srval": [114, 129, 145, 160], "iff3_srvalilogic0": 114, "iff3_srvalilogic1": 114, "iff3_srvalolog": 160, "iff3_srvalologic1": 160, "iff4_init": [114, 129, 145, 160], "iff4_initilogic0": [114, 129], "iff4_initilogic1": [114, 129], "iff4_initolog": 160, "iff4_initologic0": 160, "iff4_initologic1": 160, "iff4_srval": [114, 129, 145, 160], "iff4_srvalilogic0": [114, 145], "iff4_srvalilogic1": 114, "iff4_srvalolog": 160, "iff4_srvalologic0": 160, "iff_ce_en": [69, 76, 166, 171, 176, 181], "iff_ce_enable_no_iq": [76, 171, 176, 181], "iff_ce_enable_no_iqiob0": [76, 176, 181], "iff_ce_enable_no_iqiob1": [76, 176, 181], "iff_ce_enableint": [76, 166, 171, 176, 181], "iff_ce_enableiob0": [76, 166, 171, 176, 181], "iff_ce_enableiodelay0": 69, "iff_ce_enableioiclk1": 69, "iff_clk": [76, 166, 171, 176, 181], "iff_clkiob0": [76, 166, 171, 176, 181], "iff_clkiob1": [76, 166, 171, 176, 181], "iff_d": [76, 166, 171, 176, 181], "iff_delai": 57, "iff_delay_en": [43, 57, 69, 85, 99, 114, 129, 145, 160], "iff_delay_enableiob1": 85, "iff_delay_enableiob2": 85, "iff_delay_enableiob3": 85, "iff_delay_enableiodelay0": [69, 129], "iff_delay_enableiodelay1": [69, 129], "iff_delay_enableolog": 160, "iff_delay_enableologic0": [145, 160], "iff_dint": 166, "iff_diob0": 166, "iff_diob1": 166, "iff_en": 114, "iff_enableilogic0": 114, "iff_enableilogic1": 114, "iff_init": [69, 85], "iff_initiob1": 85, "iff_initiob2": 85, "iff_initiob3": 85, "iff_initiodelay0": 69, "iff_initioiclk0": 69, "iff_latch": [57, 69, 85, 99, 114, 129, 145, 160], "iff_latchiob1": 85, "iff_latchiob2": 85, "iff_latchiob3": 85, "iff_latchioiclk0": 69, "iff_rev_en": [57, 99], "iff_rev_enableioi1": 57, "iff_rev_us": [69, 129, 145], "iff_rev_usedilogic0": 129, "iff_rev_usedilogic1": [129, 145], "iff_rev_usediodelay0": 69, "iff_rev_usedioiclk0": 69, "iff_sr_en": [57, 85, 99], "iff_sr_enableiob1": 85, "iff_sr_enableiob2": 85, "iff_sr_enableiob3": 85, "iff_sr_enableioi0": 57, "iff_sr_enableioi1": 57, "iff_sr_enableioi2": 57, "iff_sr_sync": [57, 69, 85, 99, 114, 129, 145], "iff_sr_syncilogic0": 145, "iff_sr_synciob1": 85, "iff_sr_synciob2": 85, "iff_sr_synciob3": 85, "iff_sr_syncioi0": 57, "iff_sr_syncioi2": 57, "iff_sr_syncioiclk0": 69, "iff_sr_syncologic0": 129, "iff_sr_syncologic1": 129, "iff_sr_us": [69, 129, 145, 160], "iff_sr_usedilogic0": 69, "iff_sr_usedilogic1": 145, "iff_sr_usediodelay0": 69, "iff_sr_usedioiclk0": 69, "iff_sr_usedologic0": 129, "iff_sr_usedologic1": 129, "iff_srval": [69, 76, 166, 171, 176, 181], "iff_srvaldec0": [166, 171, 176, 181], "iff_srvaliob0": [76, 166, 171, 176, 181], "iff_srvaliodelay0": 69, "iff_srvalioiclk0": 69, "iff_tsbypass_en": [57, 99, 114, 129, 145, 160], "iff_tsbypass_enableilogic0": 129, "iff_tsbypass_enableilogic1": 129, "iff_tsbypass_enableolog": 160, "iff_tsbypass_enableologic0": 145, "iff_tsbypass_enableologic1": 160, "iff_zhold": 160, "iff_zholdolog": 160, "iff_zholdologic0": 160, "iff_zholdologic1": 160, "iffdelay_valu": 160, "iffdmux001": 57, "ignor": [35, 46, 88], "ignore0": [104, 117, 135, 150], "ignore1": [104, 117, 135, 150], "ii": [0, 12, 14], "iidelayctrl": [145, 160], "iint": [79, 85, 186], "iiob1": 186, "ik": [76, 164, 166, 169, 171, 174, 176, 179, 181], "ilog": 160, "ilogic0": [69, 114, 129, 145, 160], "ilogic1": [69, 114, 129, 145, 160], "ilogic_clk0": 69, "im": [2, 3, 4, 5, 6, 7, 8, 9, 15, 16, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 36, 188, 190, 191, 192, 193, 194, 195, 200], "immateri": 199, "immedi": [35, 55, 58, 87, 97, 102, 110, 124, 129], "imped": 98, "implement": [35, 36, 46, 58, 87, 88, 93, 102, 200], "import_": 36, "import_chain_down": 36, "import_chain_up": 36, "import_down_alloc": 36, "import_down_alloc24": [15, 16], "import_sum_down": 36, "import_sum_up": 36, "import_up_alloc": 36, "import_up_alloc23": [15, 16], "improv": [56, 102], "imux": [10, 17, 32, 38, 42, 47, 55, 61, 68, 73, 74, 76, 78, 79, 80, 82, 83, 85, 86, 89, 97, 113, 128, 144, 159, 163, 164, 166, 168, 169, 171, 173, 174, 176, 178, 179, 181, 183, 184, 186, 189, 196, 197], "imux0": [61, 113, 128, 144, 159], "imux001": [128, 144, 159], "imux1": [61, 113, 128, 144, 159], "imux10": [61, 113, 128, 144, 159], "imux100": 113, "imux101": [128, 144, 159], "imux1010": [128, 144, 159], "imux11": [61, 113, 128, 144, 159], "imux110": 113, "imux1110": [128, 144, 159], "imux12": [61, 113, 128, 144, 159], "imux121": 128, "imux1210": 159, "imux121000": 144, "imux13": [61, 113, 128, 144, 159], "imux131": 128, "imux1310": [144, 159], "imux14": [61, 113, 128, 144, 159], "imux140100": 144, "imux141": 128, "imux1410": 159, "imux15": [61, 113, 128, 144, 159], "imux150100": 144, "imux151": 128, "imux1510": 159, "imux16": [113, 128, 144, 159], "imux1601": [144, 159], "imux161": 128, "imux17": [113, 128, 144, 159], "imux1701": [144, 159], "imux171": 128, "imux18": [113, 128, 144, 159], "imux180": 128, "imux1801": [144, 159], "imux19": [113, 128, 144, 159], "imux190": 128, "imux1901": [144, 159], "imux19intf": 128, "imux2": [61, 113, 128, 144, 159], "imux20": [113, 128, 144, 159], "imux200": [113, 128], "imux2001": [144, 159], "imux201": [128, 144, 159], "imux21": [113, 128, 144, 159], "imux210": [113, 128], "imux2101": [144, 159], "imux22": [113, 128, 144, 159], "imux220": [113, 128], "imux2201": [144, 159], "imux23": [113, 128, 144, 159], "imux230": [113, 128], "imux2301": [144, 159], "imux24": [113, 128, 144, 159], "imux240": 113, "imux241": 128, "imux2410": [144, 159], "imux25": [113, 128, 144, 159], "imux250": 113, "imux251": 128, "imux2510": [144, 159], "imux26": [113, 128, 144, 159], "imux260": 113, "imux261": 128, "imux2610": [144, 159], "imux27": [113, 128, 144, 159], "imux270": 113, "imux271": 128, "imux2710": [144, 159], "imux28": [113, 128, 144, 159], "imux281": 128, "imux2810": [144, 159], "imux29": [113, 128, 144, 159], "imux291": 128, "imux2910": [144, 159], "imux3": [61, 113, 128, 144, 159], "imux30": [113, 128, 144, 159], "imux300": 128, "imux301": [128, 144, 159], "imux3010": [144, 159], "imux31": [113, 128, 144, 159], "imux310": 128, "imux3110": [144, 159], "imux32": [128, 144, 159], "imux320": 128, "imux320010": [144, 159], "imux32intf": 128, "imux33": [128, 144, 159], "imux330": 128, "imux330010": [144, 159], "imux33intf": 128, "imux34": [128, 144, 159], "imux340": 128, "imux3401": [144, 159], "imux34intf": 128, "imux35": [128, 144, 159], "imux350": 128, "imux350100": [144, 159], "imux36": [128, 144, 159], "imux3601": [144, 159], "imux361": 128, "imux37": [128, 144, 159], "imux3701": 144, "imux370100": 159, "imux371": 128, "imux38": [128, 144, 159], "imux380010": 159, "imux3801": 144, "imux381": 128, "imux39": [128, 144, 159], "imux390010": 159, "imux3901": 144, "imux391": 128, "imux4": [61, 113, 128, 144, 159], "imux40": [113, 128, 144, 159], "imux400100": [144, 159], "imux401": [128, 159], "imux40100": 144, "imux41": [128, 144, 159], "imux410100": [144, 159], "imux411": 128, "imux42": [128, 144, 159], "imux420": 128, "imux4210": [144, 159], "imux43": [128, 144, 159], "imux430": 128, "imux431000": [144, 159], "imux44": [128, 144, 159], "imux440": 128, "imux4410": [144, 159], "imux45": [128, 144, 159], "imux450": 128, "imux4510": 144, "imux451000": 159, "imux46": [128, 144, 159], "imux460": 128, "imux460100": 159, "imux4610": 144, "imux47": [128, 144, 159], "imux470": 128, "imux470100": 159, "imux4710": 144, "imux5": [61, 113, 128, 144, 159], "imux50": 113, "imux501": [128, 144, 159], "imux6": [61, 113, 128, 144, 159], "imux60": 113, "imux60010": 144, "imux601": 159, "imux610": 128, "imux7": [61, 113, 128, 144, 159], "imux70": 113, "imux70010": 144, "imux701": 159, "imux710": 128, "imux8": [61, 113, 128, 144, 159], "imux80": 113, "imux810": [128, 144, 159], "imux9": [61, 113, 128, 144, 159], "imux90": 113, "imux910": [128, 144, 159], "imux_bit": [17, 189], "imux_col": [188, 189], "imux_en": 104, "imux_width": [188, 189], "in_b00": [47, 89], "in_b10": [47, 89], "in_b20": [47, 89], "in_b30": [47, 89], "in_b40": 89, "in_b50": 89, "in_b60": 89, "in_b70": 89, "in_core010": 47, "in_core110": 47, "in_core210": 47, "in_core310": 47, "in_core410": 47, "in_core510": 47, "in_core610": 47, "in_core710": 47, "in_dly_en": [136, 151], "in_dly_enpl": 151, "in_dly_mx_cvdd": [136, 151], "in_dly_mx_dvdd": [136, 151], "in_dly_set": [136, 151], "in_fifo": 151, "in_l01": 47, "in_l11": 47, "in_l21": 47, "in_l31": 47, "in_l41": 47, "in_l51": 47, "in_l61": 47, "in_l71": 47, "in_lr001": 47, "in_lr101": 47, "in_lr201": 47, "in_lr301": 47, "in_lr401": 47, "in_lr501": 47, "in_lr601": 47, "in_lr701": 47, "in_r01": 47, "in_r11": 47, "in_r21": 47, "in_r31": 47, "in_r41": 47, "in_r51": 47, "in_r61": 47, "in_r71": 47, "in_t00": 47, "in_t01": 89, "in_t10": 47, "in_t11": 89, "in_t20": 47, "in_t21": 89, "in_t30": 47, "in_t31": 89, "in_t41": 89, "in_t51": 89, "in_t61": 89, "in_t71": 89, "in_term": 160, "in_term01000100": 69, "inapplic": 160, "includ": [12, 14, 15, 17, 35, 36, 55, 56, 58, 97, 110, 124, 188, 189, 198, 200], "incom": 97, "increas": [129, 200], "increment": 35, "independ": [14, 102, 110, 124, 140, 154, 200], "indetermin": [36, 46, 88], "index": [15, 16, 17, 35, 36, 97, 102, 189], "indic": [35, 189], "individu": [14, 36], "infer_ei": [146, 161], "infiniband10": 94, "infiniband11": 95, "infinitecomplet": 130, "infinitecompletionspci": 130, "inform": 199, "init": [114, 129], "init_": [87, 102], "init_4": [115, 117, 133, 148], "init_40": [115, 117, 133, 148], "init_41": [115, 117, 133, 148], "init_42": [115, 117, 133, 148], "init_43": [115, 117, 133, 148], "init_44": [115, 117, 133, 148], "init_45": [115, 117, 133, 148], "init_46": [115, 117, 133, 148], "init_47": [115, 117, 133, 148], "init_48": [115, 117, 133, 148], "init_49": [115, 117, 133, 148], "init_4a": [115, 117, 133, 148], "init_4b": [115, 117, 133, 148], "init_4c": [115, 117, 133, 148], "init_4d": [115, 117, 133, 148], "init_4f": [115, 117, 133, 148], "init_5": [115, 148], "init_50": [115, 117, 133, 148], "init_51": [115, 117, 133, 148], "init_52": [115, 117, 133, 148], "init_53": [115, 117, 133, 148], "init_54": [115, 117, 133, 148], "init_55": [115, 117, 133, 148], "init_56": [115, 117, 133, 148], "init_57": [115, 117, 133, 148], "init_58": [115, 148], "init_59": [115, 148], "init_5a": [115, 148], "init_5b": [115, 148], "init_5c": [115, 148], "init_5d": [115, 148], "init_5f": [115, 148], "init_6": 115, "init_60": 115, "init_61": 115, "init_62": 115, "init_63": 115, "init_64": 115, "init_65": 115, "init_66": 115, "init_67": 115, "init_68": 115, "init_69": 115, "init_6a": 115, "init_6b": 115, "init_6c": 115, "init_6d": 115, "init_6f": 115, "init_a": [45, 59, 87, 102], "init_a_l": [116, 132, 147], "init_a_u": [116, 132, 147], "init_b": [45, 59, 87, 102, 145, 160], "init_b_l": [116, 132, 147], "init_b_u": [116, 132, 147], "init_bitslip": 145, "init_bitslipcnt": [114, 129, 145], "init_c": [114, 129, 145], "init_dly_cnt": 145, "init_fifo_addr": 145, "init_fifo_reset": 145, "init_loadcnt": [114, 129, 145], "init_orank1": 145, "init_orank2_parti": 145, "init_out": [104, 117, 135, 136, 150, 151], "init_outbufgctrl0": 104, "init_outbufgctrl1": 104, "init_outbufgctrl10": 104, "init_outbufgctrl11": 104, "init_outbufgctrl12": 104, "init_outbufgctrl13": 104, "init_outbufgctrl14": 104, "init_outbufgctrl15": 104, "init_outbufgctrl16": 104, "init_outbufgctrl17": 104, "init_outbufgctrl18": 104, "init_outbufgctrl19": 104, "init_outbufgctrl2": 104, "init_outbufgctrl20": 104, "init_outbufgctrl21": 104, "init_outbufgctrl22": 104, "init_outbufgctrl23": 104, "init_outbufgctrl24": 104, "init_outbufgctrl25": 104, "init_outbufgctrl26": 104, "init_outbufgctrl27": 104, "init_outbufgctrl28": 104, "init_outbufgctrl29": 104, "init_outbufgctrl3": 104, "init_outbufgctrl30": 104, "init_outbufgctrl31": 104, "init_outbufgctrl4": 104, "init_outbufgctrl5": 104, "init_outbufgctrl6": 104, "init_outbufgctrl7": 104, "init_outbufgctrl8": 104, "init_outbufgctrl9": 104, "init_outbufhce_r0": 136, "init_outbufhce_r10": 136, "init_outbufhce_r2": 136, "init_outbufhce_r4": 136, "init_outbufhce_r6": 136, "init_outbufhce_r8": 136, "init_outbufmrce1": 151, "init_outmmcm0": 136, "init_outmmcm1": 136, "init_pipe_data0": 145, "init_pipe_data1": 145, "init_rank1_parti": [114, 129, 145], "init_rank2": [114, 129, 145], "init_rank3": [114, 129, 145], "init_signals_error": [137, 152], "init_skip": 62, "init_trank1": 145, "init_xx": [87, 102], "initi": [14, 35, 36, 46, 79, 87, 88, 102, 200], "initp_xx": [87, 102], "initpin": [104, 117, 133, 148], "initpinmisc": 117, "initx": 79, "initxint": 79, "initxslice1": 79, "inityint": 79, "inmode0": [138, 153], "inmode1": [138, 153], "inmode2": [138, 153], "inmode3": [138, 153], "inmode4": [138, 153], "inmodereg": [138, 153], "inner": [58, 93, 110, 124, 140, 145], "input": [2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 33, 34, 35, 41, 44, 46, 54, 56, 67, 74, 75, 84, 87, 88, 96, 98, 102, 110, 112, 124, 127, 140, 143, 154, 158, 164, 165, 169, 170, 174, 175, 179, 180, 184, 185, 188, 189, 197, 198, 199], "input_misc": 160, "inputtest": 55, "insan": 88, "insert": 154, "insid": [55, 97], "instanc": 93, "instanti": [55, 97], "instead": [12, 14, 16, 34, 35, 36, 42, 56, 58, 87, 97, 114, 154, 160, 198, 200], "instruct": [11, 33, 36, 56, 98, 197], "int": [17, 37, 38, 45, 46, 47, 53, 58, 61, 65, 68, 73, 74, 76, 77, 78, 79, 80, 82, 83, 85, 86, 87, 88, 89, 93, 102, 105, 110, 113, 124, 128, 140, 144, 154, 159, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 189], "int0": [45, 69, 151], "int00": [138, 153], "int000": 147, "int00001": 47, "int0001": [47, 89, 186], "int001": 47, "int01": [38, 69], "int1": [51, 52, 64, 69, 83, 92, 108, 120], "int_clk00001": 115, "int_imux00000": 115, "integ": [17, 189], "interconnect": [14, 36, 37, 41, 44, 45, 46, 54, 56, 58, 67, 84, 87, 88, 93, 96, 98, 102, 110, 112, 124, 127, 140, 143, 145, 154, 158, 200], "interconnect_imask": 131, "interconnect_tmpl_sel": 131, "intereconnect": 154, "interfac": [11, 33, 41, 52, 54, 58, 64, 67, 93, 96, 112, 197], "interface_typ": [114, 129, 145, 160], "interface_typeilogic0": 114, "interface_typeilogic1": 114, "interfer": [46, 88], "interleav": 16, "intermdisable_sel": 160, "intern": [36, 56, 98, 102, 154, 199], "internal1": [137, 152, 171], "internal_vref": [119, 145, 160], "internalclk0": [49, 62], "interp_en": [136, 151], "interp_test": 151, "interpos": 154, "interpret": 17, "interrupt": [35, 97], "interrupt_pin": [146, 161], "interrupt_stat_auto": 161, "interrupt_stat_autopci": 161, "interruptpin": 130, "intersect": [38, 47, 55, 58, 93, 110, 124, 140, 154], "intest": [13, 35, 199], "intf": [110, 113, 124, 127, 140, 143, 154, 158], "intosc00": 82, "intro": [41, 54, 67, 75, 84, 112, 127, 143, 158, 165, 170, 175, 180, 185], "introduc": [58, 102, 154], "introduct": [11, 33, 44, 54, 96, 197], "inv": [15, 36, 37, 42, 43, 46, 47, 51, 52, 55, 57, 59, 60, 61, 64, 65, 66, 69, 70, 72, 73, 74, 76, 78, 79, 80, 82, 83, 85, 86, 89, 92, 97, 99, 102, 103, 104, 105, 108, 109, 113, 114, 115, 116, 117, 118, 120, 122, 123, 125, 126, 129, 130, 131, 132, 133, 134, 135, 136, 138, 141, 142, 145, 147, 148, 149, 150, 151, 153, 155, 156, 157, 160, 163, 164, 166, 168, 169, 171, 173, 174, 176, 178, 179, 181, 183, 184, 186], "inv0001": [76, 171, 176, 181], "inv0010": 186, "inv0101": 166, "inv0110": 166, "inv1000": 186, "inv1111": [76, 171, 176, 181], "inv22": [15, 16], "invalid": [15, 16, 35], "invers": [17, 34, 36, 57, 59, 69, 85, 88, 99, 114, 129, 145, 160, 189, 200], "invert": [2, 3, 4, 5, 6, 7, 8, 9, 14, 15, 16, 17, 23, 36, 37, 38, 39, 40, 42, 43, 45, 46, 47, 48, 49, 50, 51, 52, 55, 57, 59, 60, 61, 62, 63, 64, 65, 66, 68, 69, 70, 71, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 85, 86, 87, 88, 89, 90, 91, 92, 94, 95, 97, 99, 102, 103, 104, 105, 106, 107, 108, 109, 111, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 141, 142, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 155, 156, 157, 159, 160, 161, 162, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 200], "invert_clk_do": 102, "invert_clk_doa_reg": 102, "invert_clk_dob_reg": 102, "invert_zd1_custom": 51, "invert_zd1_customdcm": 51, "inverted0": [69, 70], "involv": [15, 16, 36, 93, 110, 124, 200], "io": [17, 54, 55, 56, 74, 75, 84, 87, 96, 97, 98, 110, 112, 114, 124, 127, 129, 140, 143, 158, 164, 165, 169, 170, 174, 175, 179, 180, 184, 185], "io0": [85, 186], "io00": 69, "io00011": 145, "io0011": 129, "io1": [85, 186], "io2": [85, 186], "io3": [85, 186], "io_hp_bot": 158, "io_hp_pair": 158, "io_hp_top": 158, "io_hr_bot": 158, "io_hr_pair": 158, "io_hr_top": 158, "io_mc": [188, 189, 199], "io_speci": [17, 189], "io_special_overrid": 17, "io_var_loadable11111": 145, "iob": [10, 11, 17, 35, 36, 47, 58, 67, 74, 84, 89, 93, 97, 112, 114, 127, 129, 145, 160, 164, 169, 174, 179, 189, 197, 199], "iob0": [57, 69, 76, 99, 114, 129, 145, 160, 166, 171, 176, 181, 186], "iob1": [57, 69, 74, 76, 85, 99, 114, 129, 145, 160, 164, 166, 169, 171, 174, 176, 179, 181, 186], "iob2": [57, 85, 99, 186], "iob3": [57, 85, 99, 186], "iob4": [57, 99], "iob5": [57, 99], "iob6": 57, "iob7": 57, "iob_": [17, 34, 36, 189, 200], "iob_0_0": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "iob_0_00001": 18, "iob_0_000101": [20, 21], "iob_0_00011": [18, 19, 30, 31], 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36, 46, 55, 58, 88, 93, 97, 110, 114, 129, 140, 154], "limit": [46, 87, 97], "line": [42, 47, 54, 58, 93, 97, 110, 124, 140, 154, 199, 200], "link_cap_aspm_option": 161, "link_cap_aspm_optionalitypci": 161, "link_cap_aspm_support": [71, 146, 161], "link_cap_clock_power_manag": [146, 161], "link_cap_clock_power_managementpci": 161, "link_cap_dll_link_active_reporting_cap": [146, 161], "link_cap_dll_link_active_reporting_cappci": 146, "link_cap_l0s_exit_lat": 71, "link_cap_l0s_exit_latency_comclk_gen1": [146, 161], "link_cap_l0s_exit_latency_comclk_gen2": [146, 161], "link_cap_l0s_exit_latency_gen1": [146, 161], "link_cap_l0s_exit_latency_gen2": [146, 161], "link_cap_l1_exit_lat": 71, "link_cap_l1_exit_latency_comclk_gen1": [146, 161], "link_cap_l1_exit_latency_comclk_gen2": [146, 161], "link_cap_l1_exit_latency_gen1": [146, 161], "link_cap_l1_exit_latency_gen2": [146, 161], "link_cap_link_bandwidth_notification_cap": [146, 161], "link_cap_max_link_spe": [146, 161], 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195], "p17": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p170": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p171": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p172": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p173": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p174": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p175": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p176": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p177": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p178": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p179": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p18": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p180": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p181": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p182": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p183": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p184": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], 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21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 102, 190, 191, 192, 193, 194, 195], "p20": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p200": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p201": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p202": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p203": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p204": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p205": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p206": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p207": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p208": [3, 6, 7, 22, 23, 24, 25, 193, 194, 195], "p209": [3, 6, 7], "p21": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p210": [3, 6, 7], "p211": [3, 6, 7], "p212": [3, 6, 7], "p213": [3, 6, 7], "p214": [3, 6, 7], "p215": [3, 6, 7], "p216": [3, 6, 7], "p217": [3, 6, 7], "p218": [3, 6, 7], "p219": [3, 6, 7], "p22": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p220": [3, 6, 7], "p221": [3, 6, 7], "p222": [3, 6, 7], "p223": [6, 7], "p224": [6, 7], "p225": [6, 7], "p226": [6, 7], "p227": [6, 7], "p228": [6, 7], "p229": [6, 7], "p23": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p230": [6, 7], "p231": [6, 7], "p232": [6, 7], "p233": [6, 7], "p234": [6, 7], "p235": [6, 7], "p236": [6, 7], "p237": [6, 7], "p238": [6, 7], "p239": [6, 7], "p24": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p240": [6, 7], "p241": [6, 7], "p242": [6, 7], "p243": [6, 7], "p244": [6, 7], "p245": [6, 7], "p246": [6, 7], "p247": [6, 7], "p248": [6, 7], "p249": [6, 7], "p25": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p250": [6, 7], "p251": [6, 7], "p252": [6, 7], "p253": [6, 7], "p254": [6, 7], "p255": [6, 7], "p256": [6, 7], "p257": [6, 7], "p258": [6, 7], "p259": [6, 7], "p26": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p260": [6, 7], "p261": [6, 7], "p262": [6, 7], "p263": [6, 7], "p264": [6, 7], "p265": [6, 7], "p266": [6, 7], "p267": [6, 7], "p268": [6, 7], "p269": [6, 7], "p27": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p270": [6, 7], "p271": [6, 7], "p272": [6, 7], "p273": [6, 7], "p274": [6, 7], "p275": [6, 7], "p276": [6, 7], "p277": [6, 7], "p278": [6, 7], "p279": [6, 7], "p28": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p280": [6, 7], "p281": [6, 7], "p282": [6, 7], "p283": [6, 7], "p284": [6, 7], "p285": [6, 7], "p286": [6, 7], "p287": [6, 7], "p288": [6, 7], "p289": 7, "p29": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p290": 7, "p291": 7, "p292": 7, "p293": 7, "p294": 7, "p295": 7, "p296": 7, "p297": 7, "p298": 7, "p299": 7, "p2clk": 70, "p2cmdclk": 70, "p2cmden": 70, "p2en": 70, "p3": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 102, 190, 191, 192, 193, 194, 195], "p30": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p300": 7, "p301": 7, "p302": 7, "p303": 7, "p304": 7, "p305": 7, "p306": 7, "p307": 7, "p308": 7, "p309": 7, "p31": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p310": 7, "p311": 7, "p312": 7, "p313": 7, "p314": 7, "p315": 7, "p316": 7, "p317": 7, "p318": 7, "p319": 7, "p32": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p320": 7, "p321": 7, "p322": 7, "p323": 7, "p324": 7, "p33": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p34": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p35": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p36": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p37": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p38": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p39": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p3clk": 70, "p3cmdclk": 70, "p3cmden": 70, "p3en": 70, "p4": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p40": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p41": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p42": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p43": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p44": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p45": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p46": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p47": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p48": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p49": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p4clk": 70, "p4cmdclk": 70, "p4cmden": 70, "p4en": 70, "p5": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p50": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p51": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p52": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p53": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p54": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p55": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p56": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p57": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p58": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p59": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p5clk": 70, "p5cmdclk": 70, "p5cmden": 70, "p5en": 70, "p6": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p60": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p61": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p62": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p63": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p64": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p65": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p66": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p67": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p68": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p69": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p7": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p70": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p71": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p72": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p73": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p74": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p75": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p76": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p77": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p78": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p79": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p8": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p80": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p81": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p82": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p83": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p84": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p85": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p86": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p87": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p88": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p89": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p9": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p90": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p91": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p92": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p93": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p94": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p95": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p96": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p97": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p98": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p99": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p_d": 87, "packag": [11, 17, 33, 36, 56, 154, 160, 189, 197, 199], "pad": [2, 3, 4, 5, 6, 7, 8, 9, 12, 14, 15, 16, 17, 34, 36, 55, 97, 114, 129, 145, 160, 189, 198, 200], "pair": [17, 58, 88, 102, 110, 114, 129, 145, 154, 160, 189], "parallel": [16, 114, 129, 145, 160], "paramet": [2, 3, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 189, 190, 191, 192, 193, 194, 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"pf1_revision_id": 162, "pf1_sriov_bar0_aperture_s": 162, "pf1_sriov_bar0_control": 162, "pf1_sriov_bar1_aperture_s": 162, "pf1_sriov_bar1_control": 162, "pf1_sriov_bar2_aperture_s": 162, "pf1_sriov_bar2_control": 162, "pf1_sriov_bar3_aperture_s": 162, "pf1_sriov_bar3_control": 162, "pf1_sriov_bar4_aperture_s": 162, "pf1_sriov_bar4_control": 162, "pf1_sriov_bar5_aperture_s": 162, "pf1_sriov_bar5_control": 162, "pf1_sriov_cap_initial_vf": 162, "pf1_sriov_cap_nextptr": 162, "pf1_sriov_cap_total_vf": 162, "pf1_sriov_cap_v": 162, "pf1_sriov_first_vf_offset": 162, "pf1_sriov_func_dep_link": 162, "pf1_sriov_supported_page_s": 162, "pf1_sriov_vf_device_id": 162, "pf1_subsystem_id": 162, "pf1_tphr_cap_nextptr": 162, "pf1_tphr_cap_st_mode_sel": 162, "pf1_tphr_cap_st_table_loc": 162, "pf1_tphr_cap_st_table_s": 162, "pf1_tphr_cap_ver": 162, "pfd": [136, 151], "pgate011": 50, "pgate0111": 50, "pgl0_lane": 146, "pgl1_lane": 146, "pgl2_lane": 146, "pgl3_lane": 146, "pgl4_lane": 146, "pgl5_lane": 146, "pgl6_lane": 146, "pgl7_lane": 146, "phase": [44, 67], "phase_freq_lock0": 120, "phase_freq_lock00": 108, "phase_ref0": 151, "phase_ref00": 151, "phase_ref0000": 151, "phase_shift": [51, 52, 64, 92, 108, 120], "phase_shift_neg": [51, 52, 64, 92, 108, 120], "phase_shift_negativedcm": [51, 108], "phase_shift_negativedcm0": 120, "phase_shift_negativedcm1": 120, "phasealign_drp_en": 142, "phasealign_drp_en_0": 66, "phasealign_drp_en_1": 66, "phasealign_drp_en_1gtp": 66, "phaser1": 151, "phaser10": 160, "phaser_iclk00000000001": 160, "phaser_in0": 151, "phaser_in1": 151, "phaser_in2": 151, "phaser_in3": 151, "phaser_in_en": 151, "phaser_in_enphaser_in0": 151, "phaser_in_enphaser_in1": 151, "phaser_in_enphaser_in2": 151, "phaser_in_enphaser_in3": 151, "phaser_in_rclk001001": 151, "phaser_in_rclk101010": 151, "phaser_in_rclk201100": 151, "phaser_in_rclk310100": 151, "phaser_oclk00000000010": 160, "phaser_oclk9000000000100": 160, "phaser_oclkdiv10": 160, "phaser_out0": 151, "phaser_out1": 151, "phaser_out2": 151, "phaser_out3": 151, "phaser_out_en": 151, "phaser_ref": 151, "phaser_ref_bounce0": 151, "phaser_ref_bounce000100010000": 151, "phaser_ref_bounce001000000010000": 151, "phaser_ref_bounce1": 151, "phaser_ref_bounce100100100000": 151, "phaser_ref_bounce110000000010000": 151, "phaser_ref_bounce2": 151, "phaser_ref_bounce201000000000100": 151, "phaser_ref_bounce201000010000": 151, "phaser_ref_bounce3": 151, "phaser_ref_bounce301000100000": 151, "phaser_ref_bounce310000000000100": 151, "phaser_ref_en": 151, "phaser_ref_misc": 151, "phaserefclk": 151, "phi": 35, "philip": [198, 199], "phy_control": 151, "phy_count_en": 151, "phyemac0gtxclk": 123, "phyemac0mclkin": 123, "phyemac0miitxclk": 123, "phyemac0rxclk": 123, "phyemac0txgmiimiiclkin": 123, "phyemac1gtxclk": 123, "phyemac1mclkin": 123, "phyemac1miitxclk": 123, "phyemac1rxclk": 123, "phyemac1txgmiimiiclkin": 123, "physic": [55, 188], "pick": [46, 88, 102], "picosecond": [17, 189], "pin": [10, 11, 14, 17, 32, 33, 36, 46, 63, 87, 88, 97, 102, 114, 129, 145, 160, 189, 196, 197, 199, 200], "pipe01": [155, 156, 157], "pipe1": 142, "pipe_sel": 160, "pipegen310": [155, 156, 157], "pipelin": [56, 87, 102], "pitch": [12, 34, 198], "pl_auto_config": [146, 161], "pl_center": [51, 92], "pl_eq_adapt_iter_count": 162, "pl_eq_adapt_reject_retry_count": 162, "pl_fast_train": [146, 161], "pl_fast_trainpci": [146, 161], "pl_lane0_eq_control": 162, "pl_lane1_eq_control": 162, "pl_lane2_eq_control": 162, "pl_lane3_eq_control": 162, "pl_lane4_eq_control": 162, "pl_lane5_eq_control": 162, "pl_lane6_eq_control": 162, "pl_lane7_eq_control": 162, "pl_link_cap_max_link_spe": 162, "pl_link_cap_max_link_width": 162, "pl_n_fts_comclk_gen1": 162, "pl_n_fts_comclk_gen2": 162, "pl_n_fts_comclk_gen3": 162, "pl_n_fts_gen1": 162, "pl_n_fts_gen2": 162, "pl_n_fts_gen3": 162, "pla": [188, 200], "place": [12, 35, 36, 55, 58, 97, 110, 160], "placement": 58, "plain": [12, 17, 34, 58, 93, 98, 102, 154, 189, 198], "plain0": [4, 5, 8, 9], "plain00": [2, 3, 6, 7], "plane": [87, 102, 188, 189], "plastic": [12, 34, 198], "platic": 34, "plb_test": 131, "plcc": [12, 34, 198], "pll": [72, 120, 158], "pll00": 66, "pll0_cfg": 156, "pll0_clkout0": 61, "pll0_clkout0_d": 61, "pll0_clkout0_u": 61, "pll0_clkout1": 61, "pll0_clkout1_d": 61, "pll0_clkout1_u": 61, "pll0_dmon_cfg": 156, "pll0_dmon_cfggtp_common": 156, "pll0_fbdiv": 156, "pll0_fbdiv_45": 156, "pll0_fbdiv_45gtp_common": 156, "pll0_init_cfg": 156, "pll0_lock_cfg": 156, "pll0_refclk_div": 156, "pll0d_clkout000": 61, "pll0d_clkout0111": 61, "pll0d_clkout101": 61, "pll0d_clkout1110": 61, "pll0d_locked00": 61, "pll0d_locked1": 61, "pll0lockdetclk": 156, "pll0lockdetclkgtp_common": 156, "pll0refclksel_mod": 156, "pll0refclksel_modegtp_common": 156, "pll0refclksel_stat": 156, "pll0u_clkout0000": 61, "pll0u_clkout001": 61, "pll0u_clkout100": 61, "pll0u_clkout1001": 61, "pll0u_locked1": 61, "pll0u_locked11": 61, "pll11": 66, "pll1_cfg": 156, "pll1_clkout0": 61, "pll1_clkout0_d": 61, "pll1_clkout0_u": 61, "pll1_clkout1": 61, "pll1_clkout1_d": 61, "pll1_clkout1_u": 61, "pll1_dmon_cfg": 156, "pll1_dmon_cfggtp_common": 156, "pll1_fbdiv": 156, "pll1_fbdiv_45": 156, "pll1_fbdiv_45gtp_common": 156, "pll1_init_cfg": 156, "pll1_lock_cfg": 156, "pll1_refclk_div": 156, "pll1d_clkout010": 61, "pll1d_clkout0101": 61, "pll1d_clkout1100": 61, "pll1d_clkout111": 61, "pll1d_locked0": 61, "pll1d_locked01": 61, "pll1lockdetclk": 156, "pll1lockdetclkgtp_common": 156, "pll1refclksel_mod": 156, "pll1refclksel_modegtp_common": 156, "pll1refclksel_stat": 156, "pll1u_clkout0010": 61, "pll1u_clkout011": 61, "pll1u_clkout1011": 61, "pll1u_clkout110": 61, "pll1u_locked0": 61, "pll1u_locked10": 61, "pll_add_leakag": 72, "pll_avdd_comp_set": [72, 120], "pll_avdd_vbg_pd": 120, "pll_avdd_vbg_sel": 120, "pll_bufpll": 61, "pll_bufpll_b": 67, "pll_bufpll_out0": 67, "pll_bufpll_out1": 67, "pll_bufpll_t": 67, "pll_cfg0": 141, "pll_cfg1": 141, "pll_cfg2": 141, "pll_clamp_bypass": 72, "pll_clamp_ref_sel": 72, "pll_clk0mx": [72, 120], "pll_clk1mx": [72, 120], "pll_clk2mx": [72, 120], "pll_clk3mx": [72, 120], "pll_clk4mx": [72, 120], "pll_clk5mx": [72, 120], "pll_clk_lost_detect": 72, "pll_clkburst_cnt": [72, 120], "pll_clkburst_en": [72, 120], "pll_clkcntrl": 120, "pll_clkcntrlpll": 120, "pll_clkfbmx": [72, 120], "pll_clkfbout00000100100000": 151, "pll_clkfbout001010": 72, "pll_clkfbout2_dt": [72, 120], "pll_clkfbout2_edg": [72, 120], "pll_clkfbout2_ht": [72, 120], "pll_clkfbout2_lt": [72, 120], "pll_clkfbout2_nocount": [72, 120], "pll_clkfbout2_nocountpl": 120, "pll_clkfbout_dt": [72, 120], "pll_clkfbout_edg": [72, 120], "pll_clkfbout_en": [72, 120], "pll_clkfbout_ht": [72, 120], "pll_clkfbout_lt": [72, 120], "pll_clkfbout_nocount": [72, 120], "pll_clkfbout_nocountpl": 120, "pll_clkfbout_pm": [72, 120], "pll_clkin100": 120, "pll_clkinfb101": 120, "pll_clkout0000": 151, "pll_clkout000000110000000": 151, "pll_clkout0001": 151, "pll_clkout0010010": 72, "pll_clkout0_dt": [72, 120], "pll_clkout0_edg": [72, 120], "pll_clkout0_en": [72, 120], "pll_clkout0_ht": [72, 120], "pll_clkout0_lt": [72, 120], "pll_clkout0_nocount": [72, 120], "pll_clkout0_nocountpl": 120, "pll_clkout0_pm": [72, 120], "pll_clkout1000": 151, "pll_clkout100001010000000": 151, "pll_clkout1010100": 72, "pll_clkout1011": 151, "pll_clkout1_dt": [72, 120], "pll_clkout1_edg": [72, 120], "pll_clkout1_en": [72, 120], "pll_clkout1_ht": [72, 120], "pll_clkout1_lt": [72, 120], "pll_clkout1_nocount": [72, 120], "pll_clkout1_nocountpl": 120, "pll_clkout1_pm": [72, 120], "pll_clkout2000": 151, "pll_clkout200010010000000": 151, "pll_clkout2010001": 72, "pll_clkout2101": 151, "pll_clkout2_dt": [72, 120], "pll_clkout2_edg": [72, 120], "pll_clkout2_en": [72, 120], "pll_clkout2_ht": [72, 120], "pll_clkout2_lt": [72, 120], "pll_clkout2_nocount": [72, 120], "pll_clkout2_nocountpl": 120, "pll_clkout2_pm": [72, 120], "pll_clkout300100010000000": 151, "pll_clkout3100010": 72, "pll_clkout3111": 151, "pll_clkout3_dt": [72, 120], "pll_clkout3_edg": [72, 120], "pll_clkout3_en": [72, 120], "pll_clkout3_ht": [72, 120], "pll_clkout3_lt": [72, 120], "pll_clkout3_nocount": [72, 120], "pll_clkout3_nocountpl": 120, "pll_clkout3_pm": [72, 120], "pll_clkout401000010000000": 151, "pll_clkout4100100": 72, "pll_clkout4_dt": [72, 120], "pll_clkout4_edg": [72, 120], "pll_clkout4_en": [72, 120], "pll_clkout4_ht": [72, 120], "pll_clkout4_lt": [72, 120], "pll_clkout4_nocount": [72, 120], "pll_clkout4_nocountpl": 120, "pll_clkout4_pm": [72, 120], "pll_clkout510000010000000": 151, "pll_clkout5100001": 72, "pll_clkout5_dt": [72, 120], "pll_clkout5_edg": [72, 120], "pll_clkout5_en": [72, 120], "pll_clkout5_ht": [72, 120], "pll_clkout5_lt": [72, 120], "pll_clkout5_nocount": [72, 120], "pll_clkout5_nocountpl": 120, "pll_clkout5_pm": [72, 120], "pll_clkout_cfg": 156, "pll_com_cfg": 126, "pll_com_cfg_0": 66, "pll_com_cfg_1": 66, "pll_cp": [72, 120], "pll_cp_bias_trip_shift": [72, 120], "pll_cp_bias_trip_shiftpl": 120, "pll_cp_cfg": 126, "pll_cp_cfg_0": 66, "pll_cp_cfg_1": 66, "pll_cp_re": [72, 120], "pll_cp_repl": 72, "pll_cp_replpll": 72, "pll_cppll": [72, 120], "pll_direct_path_cntrl": [72, 120], "pll_divclk_dt": 120, "pll_divclk_edg": [72, 120], "pll_divclk_edgepl": 120, "pll_divclk_en": 72, "pll_divclk_ht": [72, 120], "pll_divclk_lt": [72, 120], "pll_divclk_nocount": [72, 120], "pll_divsel_fb": [125, 126], "pll_divsel_fb_0": 66, "pll_divsel_fb_1": 66, "pll_divsel_ref": [125, 126], "pll_divsel_ref_0": 66, "pll_divsel_ref_1": 66, "pll_drp_en": 142, "pll_drp_en_0": 66, "pll_drp_en_1": 66, "pll_drp_en_1gtp": 66, "pll_dvdd_comp_set": [72, 120], "pll_dvdd_vbg_pd": 120, "pll_dvdd_vbg_sel": 120, "pll_en": [72, 120, 151], "pll_en_cntrl": [72, 120], "pll_en_dli": [72, 120], "pll_en_dlypl": 120, "pll_en_leakag": 72, "pll_en_tclk0": [72, 120], "pll_en_tclk0pll": 120, "pll_en_tclk1": [72, 120], "pll_en_tclk2": [72, 120], "pll_en_tclk3": [72, 120], "pll_en_tclk3pll": 120, "pll_en_tclk4": 120, "pll_en_tclk4pll": 120, "pll_en_vco0": [72, 120], "pll_en_vco1": [72, 120], "pll_en_vco2": [72, 120], "pll_en_vco2pl": 120, "pll_en_vco3": [72, 120], "pll_en_vco3pl": 120, "pll_en_vco4": [72, 120], "pll_en_vco5": [72, 120], "pll_en_vco6": [72, 120], "pll_en_vco6pl": 120, "pll_en_vco7": [72, 120], "pll_en_vco7pl": 120, "pll_en_vco_div1": [72, 120], "pll_en_vco_div1pl": 120, "pll_en_vco_div6": [72, 120], "pll_en_vco_div6pl": 120, "pll_enpll": 151, "pll_fb_dccen": 126, "pll_fb_dccengtx_dual": 126, "pll_flock": 120, "pll_in_dly_mx_sel": [72, 120], "pll_in_dly_set": [72, 120], "pll_inc_flock": 120, "pll_inc_slock": 120, "pll_inc_slockpl": 120, "pll_intfb": [72, 120], "pll_lf_nen": 120, "pll_lf_pen": 120, "pll_lfhf": [72, 120], "pll_lkdet_cfg": 126, "pll_lock_cnt": [72, 120], "pll_lock_cnt_rst_fast": 120, "pll_lock_cntpll": 72, "pll_lock_fb_dli": 72, "pll_lock_fb_dlypl": 72, "pll_lock_fb_p1": 120, "pll_lock_fb_p2": 120, "pll_lock_ref_dli": 72, "pll_lock_ref_dlypl": 72, "pll_lock_ref_p1": 120, "pll_lock_ref_p2": 120, "pll_lock_sat_high": 72, "pll_lock_sat_highpl": 72, "pll_man_lf_en": [72, 120], "pll_misc": 120, "pll_nbti_en": [72, 120], "pll_nbti_enpl": 120, "pll_pfd_cntrl": [72, 120], "pll_pfd_dly": [72, 120], "pll_pmcd_mode": 120, "pll_pmcd_modepl": 120, "pll_pwrd_cfg": [72, 120], "pll_re": [72, 120], "pll_reg_input": 72, "pll_respll": [72, 120], "pll_rxdivsel_out_0": [66, 125, 126], "pll_rxdivsel_out_1": [66, 125, 126], "pll_sata_0": [66, 125, 126], "pll_sata_0gtp": 66, "pll_sata_0gtp_du": 125, "pll_sata_0gtx_du": 126, "pll_sata_1": [66, 125, 126], "pll_sata_1gtp": 66, "pll_sata_1gtp_du": 125, "pll_sata_1gtx_du": 126, "pll_sel_slipd": [72, 120], "pll_source_0": 66, "pll_source_0gtp": 66, "pll_source_1": 66, "pll_source_1gtp": 66, "pll_startup_en": [125, 126], "pll_startup_en_0": 66, "pll_startup_en_0gtp": 66, "pll_startup_en_1": 66, "pll_startup_en_1gtp": 66, "pll_startup_engtp_du": 125, "pll_startup_engtx_du": 126, "pll_tck4_sel": 120, "pll_tdcc_cfg": 126, "pll_test_clk_out001100": 72, "pll_test_in_window": 72, "pll_tmuxout00001000100000": 151, "pll_txdivsel_comm_out": 125, "pll_txdivsel_out_0": [66, 125, 126], "pll_txdivsel_out_1": [66, 125, 126], "pll_unlock_cnt": [72, 120], "pll_unlock_cnt_rst_fast": 120, "pll_unlock_cnt_rst_fastpl": 120, "pll_vdd_sel": 72, "pll_vlfhigh_di": [72, 120], "pll_vlfhigh_displ": 120, "pllce0100": 69, "pllce1100": 69, "pllclk000100": 69, "pllclk001": 69, "pllclk0010": 66, "pllclk100100": 69, "pllclk110": 69, "pllclk1110": 66, "pllclkspare": 156, "pllclksparegtp_common": 156, "pllin": 61, "pllin0000": 61, "pllin1001": 61, "pllin2010": 61, "pllin3011": 61, "pllin4100": 61, "pllin5101": 61, "plllkdet_cfg": 125, "plllkdet_cfg_0": 66, "plllkdet_cfg_1": 66, "plm_auto_config": 71, "plu": [110, 124, 140, 154], "plus1": 69, "plus1iodelay0": 69, "plus1ologic0": 69, "pm_aspm_fastexit": 161, "pm_aspm_fastexitpci": 161, "pm_aspml0s_timeout": [161, 162], "pm_aspml0s_timeout_en": 161, "pm_aspml0s_timeout_func": 161, "pm_aspml1_entry_delai": 162, "pm_base_ptr": [146, 161], "pm_cap_auxcurr": [71, 146, 161], "pm_cap_d1support": [71, 146, 161], "pm_cap_d2support": [71, 146, 161], "pm_cap_d2supportpci": [146, 161], "pm_cap_dsi": [71, 146, 161], "pm_cap_id": [146, 161], "pm_cap_nextptr": [146, 161], "pm_cap_on": [146, 161], "pm_cap_onpci": [146, 161], "pm_cap_pme_clock": [71, 146, 161], "pm_cap_pmesupport": [71, 146, 161], "pm_cap_rsvd_04": [146, 161], "pm_cap_vers": [71, 146, 161], "pm_csr_b2b3": [146, 161], "pm_csr_bpccen": [146, 161], "pm_csr_bpccenpci": [146, 161], "pm_csr_nosoftrst": [146, 161], "pm_data0": [71, 146, 161], "pm_data1": [71, 146, 161], "pm_data2": [71, 146, 161], "pm_data3": [71, 146, 161], "pm_data4": [71, 146, 161], "pm_data5": [71, 146, 161], "pm_data6": [71, 146, 161], "pm_data7": [71, 146, 161], "pm_data_scale0": [71, 146, 161], "pm_data_scale1": [71, 146, 161], "pm_data_scale2": [71, 146, 161], "pm_data_scale3": [71, 146, 161], "pm_data_scale4": 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"pma_rsv2": [155, 156, 157], "pma_rsv3": [155, 156, 157], "pma_rsv4": [155, 156, 157], "pma_rsv5": [155, 156], "pma_rsv6": 156, "pma_rsv6gtp_channel": 156, "pma_rsv7": 156, "pma_rx_cfg": 142, "pma_rx_cfg_0": [66, 125, 126], "pma_rx_cfg_1": [66, 125, 126], "pma_rxsync_cfg": 142, "pma_rxsync_cfg_0": [66, 126], "pma_rxsync_cfg_1": [66, 126], "pma_spe": 96, "pma_tx_cfg": 142, "pma_tx_cfg_0": [66, 126], "pma_tx_cfg_1": [66, 126], "pmabiaspd": 111, "pmacfg2spar": 111, "pmaclk": 111, "pmaclka01": 111, "pmaclkb10": 111, "pmacorepwren": 111, "pmactrl": 111, "pmaireftrim": 111, "pmascanclk0": [155, 156, 157], "pmascanclk0gth_channel": 155, "pmascanclk0gth_common": 155, "pmascanclk0gtp_common": 156, "pmascanclk0gtx_channel": 157, "pmascanclk0gtx_common": 157, "pmascanclk1": [155, 156, 157], "pmascanclk1gtp_channel": 156, "pmascanclk1gtp_common": 156, "pmascanclk2": [155, 156, 157], "pmascanclk2gth_channel": 155, "pmascanclk2gtx_channel": 157, "pmascanclk3": [155, 156, 157], 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176, 181], "v1011010011111111111": [168, 173, 178], "v10110111": [172, 177, 182], "v10111": [74, 164, 167, 171, 176, 181], "v1011101": 166, "v10111011": [172, 177, 182], "v101110111": [73, 76, 163, 166], "v1011101111": [73, 76, 163, 166], "v101110111111111111": [168, 171, 173, 176, 178, 181], "v1011101111111111111": [168, 171, 173, 176, 178, 181], "v101111": [73, 163, 168, 169, 171, 173, 174, 176, 178, 179, 181], "v1011110": 166, "v1011111": [169, 174, 179], "v1011111011111": [171, 176, 181], "v11": [24, 25, 193], "v110011": 77, "v110110": 77, "v110111011": [76, 166], "v1101110111": [73, 163], "v11011101111": [73, 76, 163, 166], "v110111011111111111": [171, 176, 181], "v1101110111111111111": [168, 173, 178], "v11011101111111111111": [168, 171, 173, 176, 178, 181], "v11100": [74, 164], "v11110": 167, "v111100111": [76, 166, 171, 176, 181], "v11110101": 76, "v1111100": [169, 174, 179], "v1111101": [74, 164], "v111111101": [169, 174, 179], "v12": [24, 25, 193], "v13": [24, 25, 193], "v14": [24, 25, 193], "v15": [24, 25, 193], "v16": [24, 25, 193], "v17": [24, 25, 193], "v18": [24, 25, 193], "v19": [6, 7, 24, 25, 193, 194, 195], "v1clkh": [77, 167], "v1int": [76, 164, 166, 169, 171, 172, 174, 176, 177, 179, 181, 182, 186], "v2": [6, 7, 22, 23, 24, 25, 73, 74, 76, 77, 79, 82, 85, 86, 96, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193, 194, 195], "v20": [6, 7, 24, 194, 195], "v200": [74, 164, 169, 174, 179], "v2000": [74, 76], "v200001111111111": [171, 176, 181], "v20001": [76, 164, 166, 169, 171, 174, 176, 179, 181], "v200010111": [73, 76, 163, 166], "v2000101111": [73, 163], "v20001011111": [73, 76, 163, 166], "v200010111111111111": [168, 171, 173, 176, 178, 181], "v2000101111111111111": [168, 173, 178], "v20001011111111111111": [168, 171, 173, 176, 178, 181], "v200011": [73, 163, 168, 173, 178], "v2000110111111": [171, 176, 181], "v2000111": [74, 164, 171, 176, 181], "v2000111101": [73, 76, 163, 166], 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171, 176, 181], "v201001": 76, "v201001011": [76, 166, 171, 176, 181], "v2010011": [166, 171, 176, 181], "v2010101": 166, "v201010101": [76, 166, 171, 176, 181], "v2010111": [74, 164, 169, 174, 179], "v20101111": [172, 177, 182], "v201100101": [166, 171, 176, 181], "v201101": 76, "v2011010": [164, 169, 174, 179], "v2011011": [166, 171, 176, 181], "v20111": [76, 166], "v2011101": 166, "v201110111": [73, 163, 166], "v201110111111111111": [168, 171, 173, 176, 178, 181], "v201111": [73, 163, 168, 173, 178], "v201111011": 166, "v2011110111": [73, 76, 163, 166], "v2011110111111": [171, 176, 181], "v2011110111111111111": [168, 171, 173, 176, 178, 181], "v2011111": [74, 164, 171, 176, 181], "v201111111": [169, 174, 179], "v201111111011111": [171, 176, 181], "v21": [6, 7, 194, 195], "v2100111": [164, 169, 174, 179], "v210101": 76, "v2101011": [166, 171, 176, 181], "v21011110": 76, "v21100": [74, 164], "v2110011": 76, "v211001111": [171, 176, 181], "v211011011": [76, 166, 171, 176, 181], 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[171, 176, 181], "v30010": [76, 164, 166, 169, 171, 174, 176, 179, 181], "v300100111": [76, 166], "v3001001111": [73, 163], "v300100111111111111": [171, 176, 181], "v3001001111111111111": [168, 173, 178], "v300101": 76, "v300101011": [73, 76, 163, 166, 171, 176, 181], "v300101011111111111": [168, 171, 173, 176, 178, 181], "v3001011": [74, 164, 166, 171, 176, 181], "v300101110": [76, 166], "v3001011101": [73, 163], "v300101110111111111": [171, 176, 181], "v3001011101111111111": [168, 173, 178], "v300101111": [169, 174, 179], "v30011": [74, 164, 169, 174, 179], "v300110011": [73, 76, 163, 166, 171, 176, 181], "v300110011111111111": [168, 171, 173, 176, 178, 181], "v3001110": 166, "v300111010": [73, 76, 163, 166], "v3001110111101": [171, 176, 181], "v300111011111111011": [168, 171, 173, 176, 178, 181], "v3001111": 76, "v300111100": [73, 163, 166], "v3001111011101": [171, 176, 181], "v300111101111111011": [168, 171, 173, 176, 178, 181], "v30011111": [169, 171, 174, 176, 179, 181], "v3001111100111": [171, 176, 181], "v300111111": [166, 171, 176, 181], "v3001111110011": [171, 176, 181], "v3001111111": [73, 76, 163, 166], "v3001111111111111111": [168, 171, 173, 176, 178, 181], "v301": [74, 164, 169, 174, 179], "v301000111": [76, 166], "v3010001111": [73, 163], "v301000111111111111": [171, 176, 181], "v3010001111111111111": [168, 173, 178], "v301001": 76, "v3010011": [166, 171, 176, 181], "v3010101": [166, 171, 176, 181], "v301010110": [166, 171, 176, 181], "v3010110": 166, "v3010111": [74, 164, 169, 174, 179], "v301011111": [73, 163], "v301011111111": [168, 173, 178], "v3011": 184, "v301101": 76, "v3011011": [74, 164, 166, 169, 171, 174, 176, 179, 181], "v30110111": [172, 177, 182], "v301101111": [76, 166], "v3011011111": [73, 163], "v301101111111111111": [171, 176, 181], "v3011011111111111111": [168, 173, 178], "v30111011": 76, "v301111": [73, 163, 168, 173, 178], "v3011110": [74, 164, 166, 169, 174, 179], "v301111101": 166, "v3011111011111": [171, 176, 181], "v301111111101111": [171, 176, 181], "v310101": 76, "v3101011": [74, 164, 166, 169, 171, 174, 176, 179, 181], "v3101101": [166, 171, 176, 181], "v31101": [74, 164], "v3110101": 76, "v311010111": [171, 176, 181], "v31110": 184, "v311101011": [76, 166, 171, 176, 181], "v311101101": [166, 171, 176, 181], "v3111100": [74, 164], "v3111101": [169, 174, 179], "v3111111": 76, "v311111100": [169, 174, 179], "v311111111": [166, 171, 176, 181], "v3111111111": [73, 163], "v31111111111": [73, 76, 163, 166], "v3111111111111111111": [168, 173, 178], "v31111111111111111111": [168, 171, 173, 176, 178, 181], "v3clkh": 167, "v3int": [74, 76, 164, 166, 169, 171, 172, 174, 176, 177, 179, 181, 182, 186], "v4": [6, 7, 22, 23, 24, 25, 73, 74, 76, 77, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193, 194, 195], "v400011": [73, 163, 168, 173, 178], "v400011011111111": [171, 176, 181], "v400011101": [76, 166], "v4000111011": [73, 163], "v40001110111": [73, 76, 163, 166], "v400011101111111111": [171, 176, 181], "v4000111011111111111": [168, 173, 178], "v40001110111111111111": [168, 171, 173, 176, 178, 181], "v40010": [76, 166], "v400101011": [76, 166], "v4001010111": [73, 163], "v40010101111": [73, 76, 163, 166], "v400101011111111111": [171, 176, 181], "v4001010111111111111": [168, 173, 178], "v40010101111111111111": [168, 171, 173, 176, 178, 181], "v4001011": [74, 164, 169, 171, 174, 176, 179, 181], "v400101111": [169, 174, 179], "v40011010": [172, 177, 182], "v4001110": [74, 164, 169, 174, 179], "v40100": 184, "v40101": [74, 164, 169, 174, 179], "v4010110011": [73, 76, 163, 166], "v4010110011111111111": [168, 171, 173, 176, 178, 181], "v4010110101": [73, 76, 163, 166], "v4010110101111111111": [168, 171, 173, 176, 178, 181], "v4010111": 76, "v40101111": [169, 171, 172, 174, 176, 177, 179, 181, 182], "v401011111": [166, 171, 176, 181], "v40101111111010111": [168, 171, 173, 176, 178, 181], "v4011011": [74, 164, 169, 174, 179], "v4011101": [74, 164, 166, 169, 174, 179], "v40111011": [172, 177, 182], "v40111101": 76, "v401111110": 166, "v401111111110111": [171, 176, 181], "v41": 145, "v4100": 184, "v4101101": [164, 169, 174, 179], "v410111": [169, 171, 174, 176, 179, 181], "v41011101": [172, 177, 182], "v411": 184, "v4110110": 76, "v411011011": [171, 176, 181], "v411101011": [76, 166], "v4111010111": [73, 163], "v411101011111111111": [171, 176, 181], "v4111010111111111111": [168, 173, 178], "v41111": [171, 176, 181], "v4111101111": 184, "v4111111": 76, "v411111111": [73, 76, 163, 166, 171, 176, 181], "v411111111111111111": [168, 171, 173, 176, 178, 181], "v4int": [73, 74, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 184, 186], "v4tbuf0": 183, "v5": [24, 25, 73, 74, 76, 77, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193], "v50": 145, "v500": [76, 166], "v500011101111111": [171, 176, 181], "v50011": [74, 164, 171, 176, 181], "v500110": [73, 163, 168, 173, 178], "v5001111": [169, 174, 179], "v5001111001": [73, 163], "v50011110011": [73, 76, 163, 166], "v5001111001111111111": [168, 173, 178], "v50011110011111111111": [168, 171, 173, 176, 178, 181], "v500111111011011": [171, 176, 181], "v50100110": 76, "v50101": 184, "v5010101101": [73, 76, 163, 166], "v5010101101111111111": [168, 171, 173, 176, 178, 181], "v5010110": 166, "v5010111": [74, 164, 169, 174, 179], "v50101111": [172, 177, 182], "v50101111110011101": [168, 171, 173, 176, 178, 181], "v50110": [74, 164, 169, 174, 179], "v501100101": [76, 166], "v5011001011": [73, 163], "v501100101111111111": [171, 176, 181], "v5011001011111111111": [168, 173, 178], "v5011011": 76, "v50110111": [169, 172, 174, 177, 179, 182], "v501101111": [166, 171, 176, 181], "v50111": [76, 166], "v5011101": [74, 164, 169, 174, 179], "v5011101111": [73, 163], "v50111011111": [73, 76, 163, 166], "v5011101111111111111": [168, 173, 178], "v50111011111111111111": [168, 171, 173, 176, 178, 181], "v5011110": [74, 164, 169, 174, 179], "v5011111": [74, 164, 171, 176, 181], "v501111110": 166, "v501111111": [169, 174, 179], "v510": 184, "v51001111": [172, 177, 182], "v5101": 184, "v5101101": [74, 164, 169, 174, 179], "v51011011": [172, 177, 182], "v510111": [169, 171, 174, 176, 179, 181], "v5101110": [164, 169, 174, 179], "v510111011": [73, 76, 163, 166], "v510111011111111111": [168, 171, 173, 176, 178, 181], "v510111110": [76, 166], "v5101111101": [73, 163], "v510111110111111111": [171, 176, 181], "v5101111101111111111": [168, 173, 178], "v510111111111011": [171, 176, 181], "v5110110": 76, "v511011011": [171, 176, 181], "v5110111101": [73, 76, 163, 166], "v5110111101111111111": [168, 171, 173, 176, 178, 181], "v51110011": [171, 176, 181], "v5111110111": 184, "v5111111": 76, "v511111111": [73, 163, 166, 171, 176, 181], "v511111111111": [168, 173, 178], "v5int": [73, 76, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 184, 186], "v6": [24, 25, 73, 74, 76, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193], "v600": [169, 171, 174, 176, 179, 181], "v600011": [73, 163, 168, 173, 178], "v60010110": [172, 177, 182], "v6001101101": [73, 163], "v60011011011": [73, 76, 163, 166], "v6001101101111111111": [168, 173, 178], "v60011011011111111111": [168, 171, 173, 176, 178, 181], "v6001111111011011": [168, 171, 173, 176, 178, 181], "v601": [76, 166], "v60101111110010111": [168, 171, 173, 176, 178, 181], "v6010111111011110": [168, 173, 178], "v60101111110111101": [168, 171, 173, 176, 178, 181], "v60110": 184, "v601101100": [76, 166], "v6011011001": [73, 163], "v601101100111111111": [171, 176, 181], "v6011011001111111111": [168, 173, 178], "v60110111": [172, 177, 182], "v601101111": [73, 163], "v601101111111": [168, 173, 178], "v60111": [74, 164, 171, 176, 181], "v60111101": [172, 177, 182], "v6011111": [169, 174, 179], "v610111101": [73, 76, 163, 166], "v610111101111111111": [168, 171, 173, 176, 178, 181], "v611": [169, 171, 174, 176, 179, 181, 184], "v6110": 184, "v61100": [171, 176, 181], "v6110011": [169, 174, 179], "v6110011111": [73, 76, 163, 166], "v6110011111111111111": [168, 171, 173, 176, 178, 181], "v611011": [169, 171, 174, 176, 179, 181], "v6111111011": 184, "v611111111": [76, 166], "v6111111111": [73, 163], "v611111111111111111": [171, 176, 181], "v6111111111111111111": [168, 173, 178], "v6int": [168, 169, 171, 173, 174, 176, 178, 179, 181, 184, 186], "v6tbuf3": 186, "v7": [24, 25, 73, 74, 76, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193], "v700": [169, 171, 172, 174, 176, 177, 179, 181, 182], "v700011": [73, 163, 168, 173, 178], "v700101101": [73, 76, 163, 166], "v700101101111111111": [168, 171, 173, 176, 178, 181], "v700101110": [76, 166], "v7001011101": [73, 163], "v700101110111111111": [171, 176, 181], "v7001011101111111111": [168, 173, 178], "v700110101": [73, 163, 166], "v700110101111111111": [168, 171, 173, 176, 178, 181], "v701": [169, 171, 174, 176, 179, 181], "v70101111": [172, 177, 182], "v7010111111011011": [171, 176, 181], "v70101111110110111": [168, 173, 178], "v70101111111111101": [168, 171, 173, 176, 178, 181], "v70111": 184, "v7011101111011110": [168, 171, 173, 176, 178, 181], "v701111": [73, 163, 168, 173, 178], "v701111101": [76, 166], "v7011111011": [73, 163], "v701111101111111111": [171, 176, 181], "v7011111011111111111": [168, 173, 178], "v710": 184, "v7101111101": [73, 163], "v71011111011": [73, 76, 163, 166], "v7101111101111111111": [168, 173, 178], "v71011111011111111111": [168, 171, 173, 176, 178, 181], "v711011": [169, 171, 174, 176, 179, 181], "v7111": 184, "v7111100": [171, 176, 181], "v711110011": [169, 174, 179], "v7111111101": 184, "v7111111111": [73, 76, 163, 166], "v7111111111111111111": [168, 171, 173, 176, 178, 181], "v7int": 184, "v7iob1": [176, 181], "v8": [24, 25, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 193], "v80010110": [172, 177, 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178, 181, 182], "valid": [15, 16, 35], "valu": [14, 15, 16, 17, 35, 36, 46, 54, 87, 88, 96, 97, 102, 189, 199, 200], "var_load11": 160, "var_loadable00011": 145, "vari": [34, 35, 36, 110, 114, 124, 140, 154, 200], "variabl": [129, 188], "variable00001": 145, "variable01": [129, 160], "variable11": 114, "variable110": 64, "variable_swapped00101": 145, "variant": [12, 34, 36, 55, 58, 93, 97, 110, 124, 140, 154, 160, 200], "variou": [46, 55, 56, 88, 97, 98, 200], "vbg_dll_sel": 121, "vbg_flat_sel": 152, "vbg_pd": [51, 92], "vbg_sel": [51, 52, 92, 121, 137], "vbg_slope_opt": 63, "vbg_vgg_flast_sel": 137, "vbg_vgg_neg_sel": 137, "vbrk": [110, 124], "vc0_cpl_infinit": [71, 146, 161], "vc0_rx_ram_limit": [71, 146, 161], "vc0_total_credits_cd": [71, 146, 161], "vc0_total_credits_ch": [71, 146, 161], "vc0_total_credits_npd": 161, "vc0_total_credits_nph": [71, 146, 161], "vc0_total_credits_pd": [71, 146, 161], "vc0_total_credits_ph": [71, 146, 161], "vc0_tx_lastpacket": [71, 146, 161], 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97, 128, 144, 159], "introduct": [12, 34, 56, 98, 198], "io": [58, 76, 77, 85, 93, 106, 119, 145, 154, 160, 166, 167, 171, 172, 176, 177, 181, 182, 186], "io_hp_bot": 160, "io_hp_pair": 160, "io_hp_top": 160, "io_hr_bot": 160, "io_hr_pair": 160, "io_hr_top": 160, "iob": [2, 3, 6, 7, 14, 43, 57, 69, 85, 99, 106, 119, 188, 200], "ioi": [42, 43, 55, 57, 68, 69, 97, 99], "ir": [13, 35, 199], "isp": [13, 35, 199], "jed": [2, 3, 4, 5, 6, 7, 8, 9, 15, 16, 188, 189, 190, 191, 192, 193, 194, 195], "jtag": [13, 35, 199], "keeper": 36, "l": [43, 73, 76, 77, 85, 99, 163, 166, 167, 168, 171, 172, 173, 176, 177, 178, 181, 182, 186], "l1": [57, 99], "l2": [57, 99], "l3": 57, "l4": 57, "lb": [52, 73, 163, 168, 173, 178], "left": [40, 47, 50, 61, 63, 78, 91], "level": [17, 189], "line": 55, "ll": [40, 50, 91], "llh": [55, 77, 167], "llhc": [172, 177, 182], "llhq": [172, 177, 182], "llv": [55, 77, 167], "llvc": [172, 177, 182], "llvq": [172, 177, 182], "local": 200, "lock": [72, 83], "logic": [37, 46, 60, 73, 79, 86, 88, 93, 100, 105, 118, 134, 149, 163, 168, 173, 178, 183], "long": 55, "loop": [72, 83], "lower": [40, 50, 63, 91], "lr": [40, 50, 55, 57, 69, 91], "lt": [52, 73, 163, 168, 173, 178], "lut": [46, 88], "lut2": 200, "mac": [123, 139], "macrocel": [14, 15, 16, 36, 188, 200], "manag": [51, 52, 64, 92, 108, 120, 136, 151], "map": [2, 3, 4, 5, 6, 7, 8, 9, 15, 16, 188, 190, 191, 192, 193, 194, 195], "mc": [2, 3, 4, 5, 6, 7, 8, 9], "memori": 70, "mgt": [106, 119], "middl": [78, 154], "misc": [14, 36, 200], "mmcm": 151, "mode": [35, 49, 62, 102], "modul": 103, "monitor": 115, "mult": 87, "multi": [66, 94, 95, 111], "multiplex": [46, 55, 88, 97], "mux": [106, 119], "n": [47, 97], "network": [14, 36, 200], "node": [106, 119], "normal": 68, "o": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 43, 50, 57, 85, 91, 99, 106, 114, 119, 129, 145, 160, 190, 191, 192, 193, 194, 195], "option": [45, 47], "output": [14, 36, 43, 46, 55, 57, 69, 76, 85, 88, 89, 97, 99, 114, 129, 145, 160, 166, 171, 176, 181, 186, 200], "overview": [14, 36, 200], "packag": [12, 34, 198], "part": [17, 189], "pci": [71, 86, 93, 100, 130, 146, 154, 161, 162], "pci_ce_delai": 61, "pcilogics": 61, "per": [15, 16], "phase": 72, "pin": [2, 3, 4, 5, 6, 7, 8, 9, 12, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 34, 190, 191, 192, 193, 194, 195, 198], "placement": 154, "pll": 151, "pll_bufpll_b": 61, "pll_bufpll_out0": 61, "pll_bufpll_out1": 61, "pll_bufpll_t": 61, "pma_spe": 95, "pmviob": 135, "port": [46, 88], "powerdown": [49, 62], "powerpc": [93, 97, 101, 110, 124, 131], "ppc": 97, "primari": 58, "primit": [55, 97], "pro": [91, 94, 95, 99], "process": 154, "product": [14, 15, 16, 36, 88, 188, 200], "program": [13, 35, 199], "project": 0, "protect": 35, "pt": 36, "pu_gt": [49, 62], "pu_gw": [49, 62], "pull": 36, "r": [43, 73, 76, 77, 85, 99, 163, 166, 167, 168, 171, 172, 173, 176, 177, 178, 181, 182, 186], "r1": [57, 99], "r2": [57, 99], "r3": 57, "r4": 57, "ram": [45, 46, 59, 78, 87, 88, 102, 116, 132, 147], "randor": [37, 46], "randor_init": [37, 46], "rb": [52, 73, 163, 168, 173, 178], "read": 35, "regist": [13, 14, 35, 39, 46, 48, 49, 62, 81, 88, 90, 107, 121, 137, 152, 199, 200], "repeat": [106, 119], "reserved_andor": [37, 46], "right": [40, 47, 50, 61, 63, 78, 91, 154], "row": [38, 47, 58, 89, 93, 106, 200], "rt": [52, 73, 163, 168, 173, 178], "s3": [38, 39, 45, 47, 48, 50, 51, 55, 57], "s3a": [45, 47, 49, 50, 55, 57], "s3adsp": [45, 55], "s3e": [45, 47, 48, 50, 52, 55, 57], "scan": [13, 35, 199], "schema": [17, 189], "secondari": [38, 47, 58], "sequenc": [13, 35, 199], "seu_opt": [49, 62], "shift": [46, 88], "side": 78, "singl": [46, 88], "sourc": [38, 47, 89], "spartan": [46, 48, 49, 50, 51, 52, 54, 57, 58, 67, 75, 87], "special": [114, 129, 145, 160], "speed": [2, 3, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 189, 190, 191, 192, 193, 194, 195], "spine": [38, 47, 58, 89, 93, 97, 106, 110, 119, 124], "splitter": [55, 77, 167, 172, 177, 182, 187], "standard": [106, 119], "structur": [1, 14, 15, 16, 36, 58, 93, 110, 124, 140, 154, 188, 200], "sum": [14, 36, 88, 188, 200], "system": [115, 154], "t": [43, 57, 73, 76, 77, 85, 89, 94, 95, 99, 163, 166, 167, 168, 171, 172, 173, 176, 177, 178, 181, 182, 186], "t0": 97, "t1": 57, "t123": 97, "t2": [57, 99], "t3": 57, "t4": 57, "tabl": [56, 69, 72, 98, 114, 120, 129, 136, 145, 151, 160], "tb": 55, "tbuf": 88, "tclkpad": 97, "term": [14, 15, 16, 36, 97, 188, 200], "termin": [55, 97, 106], "testmod": [62, 137, 152], "tile": [17, 38, 42, 43, 47, 55, 61, 68, 89, 97, 113, 120, 136, 151, 189], "timer": [62, 121, 137, 152], "tl": [52, 74, 82, 164, 169, 174, 179, 184], "todo": [1, 12, 13, 14, 35, 36, 38, 39, 40, 41, 43, 46, 47, 48, 49, 50, 51, 52, 53, 54, 56, 57, 58, 60, 62, 63, 64, 65, 66, 67, 70, 72, 75, 81, 84, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 104, 106, 107, 110, 111, 112, 113, 117, 118, 119, 120, 121, 124, 125, 126, 127, 128, 133, 134, 135, 136, 137, 140, 141, 142, 143, 144, 148, 149, 150, 151, 152, 154, 155, 156, 157, 158, 159, 160, 165, 170, 175, 180, 185, 199, 200], "top": [17, 38, 47, 61, 78, 83, 89, 97, 189], "tr": [52, 74, 82, 164, 169, 174, 179, 184], "transceiv": [66, 94, 95, 111, 125, 126, 141, 142, 154, 155, 156, 157], "trim": 137, "trim0": 152, "trim1": 152, "trim2": 152, "tristat": 88, "uim": [15, 23, 36], "ul": [40, 50, 91], "uni": 47, "univers": 200, "unk1c": 137, "up": 36, "upper": [40, 50, 63, 91], "ur": [40, 50, 91], "v": 85, "v2": [89, 91, 92, 97, 99], "v2p": [89, 91, 92, 97, 99], "v2px": 89, "valu": [45, 95], "ve": 85, "vertic": 58, "virtex": [46, 84, 85, 87, 91, 94, 95, 96, 99, 112, 127, 143, 158], "w": 97, "wbstar": 152, "wide": [46, 88], "wire": 15, "without": [2, 3, 6, 7, 188], "write": 35, "x": [46, 88, 95], "xa2c128": 2, "xa2c256": 3, "xa2c32a": 5, "xa2c384": 6, "xa2c64a": 9, "xa95144xl": 20, "xa9536xl": 27, "xa9572xl": 30, "xadc": 148, "xc2c128": 2, "xc2c256": 3, "xc2c32": 4, "xc2c32a": 5, "xc2c384": 6, "xc2c512": 7, "xc2c64": 8, "xc2c64a": 9, "xc4000e": 165, "xc4000ex": 170, "xc4000xla": 175, "xc4000xv": 180, "xc5200": 185, "xc9500": [15, 33, 35, 36], "xc9500xl": [16, 33, 35, 36], "xc9500xv": 33, "xc95108": 18, "xc95144": 19, "xc95144xl": 20, "xc95144xv": 21, "xc95216": 22, "xc95288": 23, "xc95288xl": 24, "xc95288xv": 25, "xc9536": 26, "xc9536xl": 27, "xc9536xv": 28, "xc9572": 29, "xc9572xl": 30, "xc9572xv": 31, "xcr3032xl": 190, "xcr3064xl": 191, "xcr3128xl": 192, "xcr3256xl": 193, "xcr3384xl": 194, "xcr3512xl": 195, "xilinx": [11, 33, 44, 197], "xl": 75, "xor": [14, 36], "xpla3": 197, "xv": [16, 35, 36], "zia": 200}}) \ No newline at end of file +Search.setIndex({"alltitles": {"AIM and FB inputs": [[14, "aim-and-fb-inputs"]], "BRAM.S3": [[45, "bram-s3"]], "BRAM.S3A": [[45, "bram-s3a"]], "BRAM.S3ADSP": [[45, "bram-s3adsp"]], "BRAM.S3E": [[45, "bram-s3e"]], "BSPI": [[152, "bspi"]], "Backbone": [[55, "backbone"], [97, "backbone"]], "Bank configuration": [[14, "bank-configuration"]], "Bitstream": [[37, "bitstream"], [45, "bitstream"], [46, "bitstream"], [53, "bitstream"], [59, "bitstream"], [64, "bitstream"], [65, "bitstream"], [66, "bitstream"], [70, "bitstream"], [71, "bitstream"], [72, "bitstream"], [79, "bitstream"], [87, "bitstream"], [88, "bitstream"], [94, "bitstream"], [95, "bitstream"], [102, "bitstream"], [103, "bitstream"], [104, "bitstream"], [105, "bitstream"], [108, "bitstream"], [109, "bitstream"], [111, "bitstream"], [113, "bitstream"], [114, "bitstream"], [115, "bitstream"], [116, "bitstream"], [117, "bitstream"], [122, "bitstream"], [123, "bitstream"], [125, "bitstream"], [126, "bitstream"], [128, "bitstream"], [129, "bitstream"], [130, "bitstream"], [131, "bitstream"], [132, "bitstream"], [133, "bitstream"], [138, "bitstream"], [139, "bitstream"], [141, "bitstream"], [142, "bitstream"], [144, "bitstream"], [146, "bitstream"], [147, "bitstream"], [148, "bitstream"], [153, "bitstream"], [159, "bitstream"], [161, "bitstream"], [162, "bitstream"], [183, "bitstream"]], "Bitstream geometry": [[58, "bitstream-geometry"], [93, "bitstream-geometry"], [110, "bitstream-geometry"], [124, "bitstream-geometry"], [140, "bitstream-geometry"], [154, "bitstream-geometry"]], "Bitstream structure": [[1, "bitstream-structure"], [188, "bitstream-structure"]], "Bitstream structure \u2014 XC9500": [[15, "bitstream-structure-xc9500"]], "Bitstream structure \u2014 XC9500XL/XV": [[16, "bitstream-structure-xc9500xl-xv"]], "Bitstream \u2014 CLBLL": [[118, "bitstream-clbll"], [134, "bitstream-clbll"], [149, "bitstream-clbll"]], "Bitstream \u2014 CLBLM": [[118, "bitstream-clblm"], [134, "bitstream-clblm"], [149, "bitstream-clblm"]], "Bitstream \u2014 CLEXL": [[60, "bitstream-clexl"]], "Bitstream \u2014 CLEXM": [[60, "bitstream-clexm"]], "Bitstream \u2014 CLKC": [[61, "bitstream-clkc"]], "Bitstream \u2014 DCM_BUFPLL": [[61, "bitstream-dcm-bufpll"]], "Bitstream \u2014 HCLK": [[61, "bitstream-hclk"]], "Bitstream \u2014 HCLK_CLEXL": [[61, "bitstream-hclk-clexl"]], "Bitstream \u2014 HCLK_CLEXM": [[61, "bitstream-hclk-clexm"]], "Bitstream \u2014 HCLK_GTP": [[61, "bitstream-hclk-gtp"]], "Bitstream \u2014 HCLK_IOI": [[61, "bitstream-hclk-ioi"], [145, "bitstream-hclk-ioi"]], "Bitstream \u2014 HCLK_IOI_HP": [[160, "bitstream-hclk-ioi-hp"]], "Bitstream \u2014 HCLK_IOI_HR": [[160, "bitstream-hclk-ioi-hr"]], "Bitstream \u2014 HCLK_ROW": [[61, "bitstream-hclk-row"]], "Bitstream \u2014 INTF": [[128, "bitstream-intf"], [144, "bitstream-intf"], [159, "bitstream-intf"]], "Bitstream \u2014 INTF.BRAM": [[159, "bitstream-intf-bram"]], "Bitstream \u2014 INTF.DELAY": [[128, "bitstream-intf-delay"], [144, "bitstream-intf-delay"], [159, "bitstream-intf-delay"]], "Bitstream \u2014 IO": [[145, "bitstream-io"]], "Bitstream \u2014 IOB": [[69, "bitstream-iob"]], "Bitstream \u2014 IOI tile": [[68, "bitstream-ioi-tile"]], "Bitstream \u2014 IOI.BT": [[69, "bitstream-ioi-bt"]], "Bitstream \u2014 IOI.LR": [[69, "bitstream-ioi-lr"]], "Bitstream \u2014 IO_HP_BOT": [[160, "bitstream-io-hp-bot"]], "Bitstream \u2014 IO_HP_PAIR": [[160, "bitstream-io-hp-pair"]], "Bitstream \u2014 IO_HP_TOP": [[160, "bitstream-io-hp-top"]], "Bitstream \u2014 IO_HR_BOT": [[160, "bitstream-io-hr-bot"]], "Bitstream \u2014 IO_HR_PAIR": [[160, "bitstream-io-hr-pair"]], "Bitstream \u2014 IO_HR_TOP": [[160, "bitstream-io-hr-top"]], "Bitstream \u2014 LLH tiles": [[55, "bitstream-llh-tiles"]], "Bitstream \u2014 LLV tiles": [[55, "bitstream-llv-tiles"]], "Bitstream \u2014 PCILOGICSE": [[61, "bitstream-pcilogicse"]], "Bitstream \u2014 PLL_BUFPLL_B": [[61, "bitstream-pll-bufpll-b"]], "Bitstream \u2014 PLL_BUFPLL_OUT0": [[61, "bitstream-pll-bufpll-out0"]], "Bitstream \u2014 PLL_BUFPLL_OUT1": [[61, "bitstream-pll-bufpll-out1"]], "Bitstream \u2014 PLL_BUFPLL_T": [[61, "bitstream-pll-bufpll-t"]], "Bitstream \u2014 PowerPC hole tiles": [[97, "bitstream-powerpc-hole-tiles"]], "Bitstream \u2014 bottom tile": [[61, "bitstream-bottom-tile"]], "Bitstream \u2014 bottom tiles": [[38, "bitstream-bottom-tiles"], [47, "bitstream-bottom-tiles"], [89, "bitstream-bottom-tiles"]], "Bitstream \u2014 column bottom": [[78, "bitstream-column-bottom"]], "Bitstream \u2014 column top": [[78, "bitstream-column-top"]], "Bitstream \u2014 interconnect tiles": [[42, "bitstream-interconnect-tiles"], [55, "bitstream-interconnect-tiles"], [97, "bitstream-interconnect-tiles"]], "Bitstream \u2014 interface tile": [[113, "bitstream-interface-tile"]], "Bitstream \u2014 interface tiles": [[55, "bitstream-interface-tiles"], [68, "bitstream-interface-tiles"], [97, "bitstream-interface-tiles"]], "Bitstream \u2014 left side": [[78, "bitstream-left-side"]], "Bitstream \u2014 left tile": [[61, "bitstream-left-tile"]], "Bitstream \u2014 left tiles": [[47, "bitstream-left-tiles"]], "Bitstream \u2014 middle": [[78, "bitstream-middle"]], "Bitstream \u2014 normal tile": [[68, "bitstream-normal-tile"]], "Bitstream \u2014 right side": [[78, "bitstream-right-side"]], "Bitstream \u2014 right tile": [[61, "bitstream-right-tile"]], "Bitstream \u2014 right tiles": [[47, "bitstream-right-tiles"]], "Bitstream \u2014 terminator tiles": [[97, "bitstream-terminator-tiles"]], "Bitstream \u2014 top tile": [[61, "bitstream-top-tile"]], "Bitstream \u2014 top tiles": [[38, "bitstream-top-tiles"], [47, "bitstream-top-tiles"], [89, "bitstream-top-tiles"]], "Blank check \u2014 XC9500XL/XV": [[35, "blank-check-xc9500xl-xv"]], "Block RAM": [[45, "block-ram"], [59, "block-ram"], [78, "block-ram"], [102, "block-ram"], [116, "block-ram"], [132, "block-ram"], [147, "block-ram"]], "Block RAM \u2014 Virtex 2, Spartan 3": [[87, "block-ram-virtex-2-spartan-3"]], "Bond": [[17, "bond"], [189, "bond"]], "Boundary scan register": [[13, "boundary-scan-register"], [35, "boundary-scan-register"], [199, "boundary-scan-register"]], "CCLK_FREQ": [[49, "cclk-freq"], [62, "cclk-freq"]], "CLB": [[73, "clb"], [163, "clb"], [168, "clb"], [173, "clb"], [178, "clb"]], "CLB.B": [[73, "clb-b"], [163, "clb-b"], [168, "clb-b"], [173, "clb-b"], [178, "clb-b"]], "CLB.L": [[73, "clb-l"], [163, "clb-l"], [168, "clb-l"], [173, "clb-l"], [178, "clb-l"]], "CLB.LB": [[73, "clb-lb"], [163, "clb-lb"], [168, "clb-lb"], [173, "clb-lb"], [178, "clb-lb"]], "CLB.LT": [[73, "clb-lt"], [163, "clb-lt"], [168, "clb-lt"], [173, "clb-lt"], [178, "clb-lt"]], "CLB.R": [[73, "clb-r"], [163, "clb-r"], [168, "clb-r"], [173, "clb-r"], [178, "clb-r"]], "CLB.RB": [[73, "clb-rb"], [163, "clb-rb"], [168, "clb-rb"], [173, "clb-rb"], [178, "clb-rb"]], "CLB.RT": [[73, "clb-rt"], [163, "clb-rt"], [168, "clb-rt"], [173, "clb-rt"], [178, "clb-rt"]], "CLB.T": [[73, "clb-t"], [163, "clb-t"], [168, "clb-t"], [173, "clb-t"], [178, "clb-t"]], "CLKB": [[80, "clkb"], [187, "clkb"]], "CLKB.FC": [[38, "clkb-fc"]], "CLKB.S3": [[47, "clkb-s3"]], "CLKB.S3A": [[47, "clkb-s3a"]], "CLKB.S3E": [[47, "clkb-s3e"]], "CLKB.V2": [[89, "clkb-v2"]], "CLKB.V2P": [[89, "clkb-v2p"]], "CLKB.V2PX": [[89, "clkb-v2px"]], "CLKB_2DLL": [[80, "clkb-2dll"]], "CLKB_4DLL": [[80, "clkb-4dll"]], "CLKH": [[187, "clkh"]], "CLKL": [[86, "clkl"], [187, "clkl"]], "CLKL.S3A": [[47, "clkl-s3a"]], "CLKL.S3E": [[47, "clkl-s3e"]], "CLKR": [[86, "clkr"], [187, "clkr"]], "CLKR.S3A": [[47, "clkr-s3a"]], "CLKR.S3E": [[47, "clkr-s3e"]], "CLKT": [[80, "clkt"], [187, "clkt"]], "CLKT.FC": [[38, "clkt-fc"]], "CLKT.S3": [[47, "clkt-s3"]], "CLKT.S3A": [[47, "clkt-s3a"]], "CLKT.S3E": [[47, "clkt-s3e"]], "CLKT.V2": [[89, "clkt-v2"]], "CLKT.V2P": [[89, "clkt-v2p"]], "CLKT.V2PX": [[89, "clkt-v2px"]], "CLKT_2DLL": [[80, "clkt-2dll"]], "CLKT_4DLL": [[80, "clkt-4dll"]], "CLKV": [[187, "clkv"]], "CLKV.CLKV": [[80, "clkv-clkv"]], "CLKV.GCLKV": [[80, "clkv-gclkv"]], "CLKV_BRAM_BOT": [[80, "clkv-bram-bot"]], "CLKV_BRAM_TOP": [[80, "clkv-bram-top"]], "CLK_BALI_REBUF": [[150, "clk-bali-rebuf"]], "CLK_BUFG": [[150, "clk-bufg"]], "CLK_BUFG_REBUF": [[150, "clk-bufg-rebuf"]], "CLK_CMT_B": [[119, "clk-cmt-b"]], "CLK_CMT_T": [[119, "clk-cmt-t"]], "CLK_DCM_B": [[106, "clk-dcm-b"]], "CLK_DCM_T": [[106, "clk-dcm-t"]], "CLK_HROW": [[106, "clk-hrow"], [119, "clk-hrow"], [150, "clk-hrow"]], "CLK_IOB_B": [[106, "clk-iob-b"], [119, "clk-iob-b"]], "CLK_IOB_T": [[106, "clk-iob-t"], [119, "clk-iob-t"]], "CLK_MGT_B": [[119, "clk-mgt-b"]], "CLK_MGT_T": [[119, "clk-mgt-t"]], "CLK_TERM_B": [[106, "clk-term-b"]], "CLK_TERM_T": [[106, "clk-term-t"]], "CMT": [[120, "cmt"], [136, "cmt"], [151, "cmt"]], "CMT_BUFG_BOT": [[135, "cmt-bufg-bot"]], "CMT_BUFG_TOP": [[135, "cmt-bufg-top"]], "CMT_FIFO": [[151, "cmt-fifo"]], "CNR.BL": [[74, "cnr-bl"], [82, "cnr-bl"], [164, "cnr-bl"], [169, "cnr-bl"], [174, "cnr-bl"], [179, "cnr-bl"], [184, "cnr-bl"]], "CNR.BR": [[74, "cnr-br"], [82, "cnr-br"], [164, "cnr-br"], [169, "cnr-br"], [174, "cnr-br"], [179, "cnr-br"], [184, "cnr-br"]], "CNR.TL": [[74, "cnr-tl"], [82, "cnr-tl"], [164, "cnr-tl"], [169, "cnr-tl"], [174, "cnr-tl"], [179, "cnr-tl"], [184, "cnr-tl"]], "CNR.TR": [[74, "cnr-tr"], [82, "cnr-tr"], [164, "cnr-tr"], [169, "cnr-tr"], [174, "cnr-tr"], [179, "cnr-tr"], [184, "cnr-tr"]], "COR": [[81, "cor"], [90, "cor"], [107, "cor"], [121, "cor"], [137, "cor"], [152, "cor"]], "COR.FC": [[39, "cor-fc"]], "COR.S3": [[48, "cor-s3"]], "COR.S3E": [[48, "cor-s3e"]], "COR1": [[62, "cor1"], [121, "cor1"], [137, "cor1"], [152, "cor1"]], "COR1.S3A": [[49, "cor1-s3a"]], "COR2": [[62, "cor2"]], "COR2.S3A": [[49, "cor2-s3a"]], "CTL": [[62, "ctl"], [81, "ctl"], [90, "ctl"], [107, "ctl"], [121, "ctl"], [137, "ctl"], [152, "ctl"]], "CTL.S3": [[39, "ctl-s3"], [48, "ctl-s3"]], "CTL.S3A": [[49, "ctl-s3a"]], "CTL1": [[137, "ctl1"], [152, "ctl1"]], "Carry logic": [[46, "carry-logic"], [88, "carry-logic"]], "Center column": [[110, "center-column"], [124, "center-column"], [140, "center-column"]], "Center column and configuration center": [[154, "center-column-and-configuration-center"]], "Clock Companion Modules": [[103, "clock-companion-modules"]], "Clock divider": [[14, "clock-divider"]], "Clock interconnect": [[38, "clock-interconnect"], [47, "clock-interconnect"], [61, "clock-interconnect"], [80, "clock-interconnect"], [89, "clock-interconnect"], [106, "clock-interconnect"], [119, "clock-interconnect"], [135, "clock-interconnect"], [150, "clock-interconnect"]], "Clock management tile": [[120, "clock-management-tile"], [136, "clock-management-tile"], [151, "clock-management-tile"]], "Clock rows": [[58, "clock-rows"], [93, "clock-rows"]], "Clock source \u2014 left and right": [[47, "clock-source-left-and-right"]], "Clock source \u2014 spine bottom and top": [[38, "clock-source-spine-bottom-and-top"], [47, "clock-source-spine-bottom-and-top"], [89, "clock-source-spine-bottom-and-top"]], "Clock spine": [[93, "clock-spine"]], "Clock spine top and bottom": [[97, "clock-spine-top-and-bottom"]], "Configurable Logic Block": [[37, "configurable-logic-block"], [46, "configurable-logic-block"], [60, "configurable-logic-block"], [73, "configurable-logic-block"], [79, "configurable-logic-block"], [88, "configurable-logic-block"], [105, "configurable-logic-block"], [118, "configurable-logic-block"], [134, "configurable-logic-block"], [149, "configurable-logic-block"], [163, "configurable-logic-block"], [168, "configurable-logic-block"], [173, "configurable-logic-block"], [178, "configurable-logic-block"], [183, "configurable-logic-block"]], "Configuration Center": [[104, "configuration-center"], [117, "configuration-center"], [133, "configuration-center"], [148, "configuration-center"]], "Configuration pull-ups": [[36, "configuration-pull-ups"]], "Configuration registers": [[39, "configuration-registers"], [62, "configuration-registers"], [81, "configuration-registers"], [90, "configuration-registers"], [107, "configuration-registers"], [121, "configuration-registers"], [137, "configuration-registers"], [152, "configuration-registers"]], "Configuration registers \u2014 Spartan 3, Spartan 3E": [[48, "configuration-registers-spartan-3-spartan-3e"]], "Configuration registers \u2014 Spartan 3A and 3A DSP": [[49, "configuration-registers-spartan-3a-and-3a-dsp"]], "Contents:": [[0, null], [10, null], [11, null], [32, null], [33, null], [41, null], [44, null], [54, null], [67, null], [75, null], [84, null], [96, null], [112, null], [127, null], [143, null], [158, null], [165, null], [170, null], [175, null], [180, null], [185, null], [196, null], [197, null]], "Corners": [[40, "corners"], [50, "corners"], [63, "corners"], [74, "corners"], [82, "corners"], [91, "corners"], [164, "corners"], [169, "corners"], [174, "corners"], [179, "corners"], [184, "corners"]], "DCM output bus": [[89, "dcm-output-bus"]], "DCM.S3": [[51, "dcm-s3"]], "DCM.S3E.BL": [[52, "dcm-s3e-bl"]], "DCM.S3E.BR": [[52, "dcm-s3e-br"]], "DCM.S3E.LB": [[52, "dcm-s3e-lb"]], "DCM.S3E.LT": [[52, "dcm-s3e-lt"]], "DCM.S3E.RB": [[52, "dcm-s3e-rb"]], "DCM.S3E.RT": [[52, "dcm-s3e-rt"]], "DCM.S3E.TL": [[52, "dcm-s3e-tl"]], "DCM.S3E.TR": [[52, "dcm-s3e-tr"]], "DCM.V2": [[92, "dcm-v2"]], "DCM.V2P": [[92, "dcm-v2p"]], "DCMCONN.BOT": [[89, "dcmconn-bot"]], "DCMCONN.TOP": [[89, "dcmconn-top"]], "DESKEW_ADJUST": [[51, "deskew-adjust"], [52, "deskew-adjust"], [92, "deskew-adjust"]], "DLL.BOT": [[83, "dll-bot"]], "DLL.TOP": [[83, "dll-top"]], "DLLP.BOT": [[83, "dllp-bot"]], "DLLP.TOP": [[83, "dllp-top"]], "DLLS.BOT": [[83, "dlls-bot"]], "DLLS.TOP": [[83, "dlls-top"]], "DSP": [[53, "dsp"], [65, "dsp"], [109, "dsp"], [122, "dsp"], [138, "dsp"], [153, "dsp"]], "Database schema": [[17, "database-schema"], [189, "database-schema"]], "Database \u2014 devices": [[10, "database-devices"], [32, "database-devices"], [196, "database-devices"]], "Default option attributes": [[47, "default-option-attributes"]], "Default option values": [[45, "default-option-values"]], "Delay Locked Loop": [[83, "delay-locked-loop"]], "Device": [[17, "device"], [189, "device"]], "Device geometry": [[58, "device-geometry"], [93, "device-geometry"], [110, "device-geometry"], [124, "device-geometry"], [140, "device-geometry"], [154, "device-geometry"]], "Device pins": [[12, "device-pins"], [34, "device-pins"], [198, "device-pins"]], "Device structure": [[14, "device-structure"], [36, "device-structure"], [200, "device-structure"]], "Device table": [[56, "device-table"], [98, "device-table"]], "Devices": [[12, "devices"], [34, "devices"], [198, "devices"]], "Digital Clock Managers": [[92, "digital-clock-managers"], [108, "digital-clock-managers"]], "Digital Clock Managers \u2014 Spartan 3": [[51, "digital-clock-managers-spartan-3"]], "Digital Clock Managers \u2014 Spartan 3E, 3A": [[52, "digital-clock-managers-spartan-3e-3a"]], "Digital clock manager": [[64, "digital-clock-manager"]], "Dual-port 16\u00d7X RAM": [[46, "dual-port-16x-ram"], [88, "dual-port-16x-ram"]], "Dual-port 32\u00d7X RAM": [[88, "dual-port-32x-ram"]], "Dual-port 64\u00d71 RAM": [[88, "dual-port-641-ram"]], "ECC": [[110, "ecc"], [124, "ecc"], [140, "ecc"], [154, "ecc"]], "ECC mode": [[102, "ecc-mode"]], "EYE_MASK": [[62, "eye-mask"]], "Entering and exiting ISP mode \u2014 XC9500": [[35, "entering-and-exiting-isp-mode-xc9500"]], "Entering and exiting ISP mode \u2014 XC9500XL/XV": [[35, "entering-and-exiting-isp-mode-xc9500xl-xv"]], "Erasing fuses \u2014 XC9500": [[35, "erasing-fuses-xc9500"]], "Erasing fuses \u2014 XC9500XL/XV": [[35, "erasing-fuses-xc9500xl-xv"]], "Ethernet MACs": [[123, "ethernet-macs"], [139, "ethernet-macs"]], "FB columns and rows": [[200, "fb-columns-and-rows"]], "FB global fuses": [[36, "fb-global-fuses"]], "FCLK networks": [[200, "fclk-networks"]], "FIFO mode": [[102, "fifo-mode"]], "FPGAcore": [[41, "fpgacore"]], "Flip-flop": [[36, "flip-flop"]], "Frequency": [[35, "frequency"]], "Fuses \u2014 FB inputs": [[15, "fuses-fb-inputs"], [16, "fuses-fb-inputs"]], "Fuses \u2014 FBs": [[188, "fuses-fbs"]], "Fuses \u2014 IMUX bits": [[188, "fuses-imux-bits"]], "Fuses \u2014 UIM wire-AND": [[15, "fuses-uim-wire-and"]], "Fuses \u2014 global bits": [[188, "fuses-global-bits"]], "Fuses \u2014 input buffer enable": [[15, "fuses-input-buffer-enable"]], "Fuses \u2014 macrocells": [[15, "fuses-macrocells"], [16, "fuses-macrocells"], [188, "fuses-macrocells"]], "Fuses \u2014 per-FB bits and globals": [[15, "fuses-per-fb-bits-and-globals"], [16, "fuses-per-fb-bits-and-globals"]], "Fuses \u2014 product and sum terms": [[188, "fuses-product-and-sum-terms"]], "Fuses \u2014 product terms": [[15, "fuses-product-terms"], [16, "fuses-product-terms"]], "GCLKC": [[89, "gclkc"]], "GCLKC.B": [[89, "gclkc-b"]], "GCLKC.T": [[89, "gclkc-t"]], "GCLKH": [[38, "gclkh"], [47, "gclkh"], [89, "gclkh"]], "GCLKH.N": [[47, "gclkh-n"]], "GCLKH.S": [[47, "gclkh-s"]], "GCLKH.UNI": [[47, "gclkh-uni"]], "GCLKH.UNI.N": [[47, "gclkh-uni-n"]], "GCLKH.UNI.S": [[47, "gclkh-uni-s"]], "GCLKVM.S3": [[38, "gclkvm-s3"], [47, "gclkvm-s3"]], "GCLKVM.S3E": [[47, "gclkvm-s3e"]], "GENERAL5": [[62, "general5"]], "GENERAL[12]": [[49, "general-12"], [62, "general-12"]], "GENERAL[34]": [[62, "general-34"]], "GIGABIT.B": [[94, "gigabit-b"]], "GIGABIT.T": [[94, "gigabit-t"]], "GIGABIT10.B": [[95, "gigabit10-b"]], "GIGABIT10.T": [[95, "gigabit10-t"]], "GTH transceivers": [[141, "gth-transceivers"], [155, "gth-transceivers"]], "GTH_CHANNEL": [[155, "gth-channel"]], "GTH_COMMON": [[155, "gth-common"]], "GTP and GTX right column holes": [[154, "gtp-and-gtx-right-column-holes"]], "GTP transceivers": [[125, "gtp-transceivers"], [156, "gtp-transceivers"]], "GTP_CHANNEL": [[156, "gtp-channel"]], "GTP_CHANNEL_MID": [[156, "gtp-channel-mid"]], "GTP_COMMON": [[156, "gtp-common"]], "GTP_COMMON_MID": [[156, "gtp-common-mid"]], "GTX transceivers": [[126, "gtx-transceivers"], [142, "gtx-transceivers"], [157, "gtx-transceivers"]], "GTX_CHANNEL": [[157, "gtx-channel"]], "GTX_COMMON": [[157, "gtx-common"]], "General Interconnect": [[113, "general-interconnect"]], "General interconnect": [[42, "general-interconnect"], [55, "general-interconnect"], [68, "general-interconnect"], [97, "general-interconnect"]], "General structure": [[58, "general-structure"], [93, "general-structure"], [110, "general-structure"], [124, "general-structure"], [140, "general-structure"], [154, "general-structure"]], "Global bits": [[2, "global-bits"], [3, "global-bits"], [4, "global-bits"], [5, "global-bits"], [6, "global-bits"], [7, "global-bits"], [8, "global-bits"], [9, "global-bits"], [190, "global-bits"], [191, "global-bits"], [192, "global-bits"], [193, "global-bits"], [194, "global-bits"], [195, "global-bits"]], "Global networks": [[14, "global-networks"]], "Global networks \u2014 XC9500": [[36, "global-networks-xc9500"]], "Global networks \u2014 XC9500XL/XV": [[36, "global-networks-xc9500xl-xv"]], "HCLK": [[106, "hclk"], [119, "hclk"], [135, "hclk"], [150, "hclk"]], "HCLK_CENTER": [[106, "hclk-center"]], "HCLK_CENTER_ABOVE_CFG": [[106, "hclk-center-above-cfg"]], "HCLK_CMT": [[119, "hclk-cmt"]], "HCLK_CMT_IOI": [[119, "hclk-cmt-ioi"]], "HCLK_DCM": [[106, "hclk-dcm"]], "HCLK_DCMIOB": [[106, "hclk-dcmiob"]], "HCLK_IOBDCM": [[106, "hclk-iobdcm"]], "HCLK_IOI": [[119, "hclk-ioi"]], "HCLK_IOIS_DCI": [[106, "hclk-iois-dci"]], "HCLK_IOIS_LVDS": [[106, "hclk-iois-lvds"]], "HCLK_IOI_BOTCEN": [[119, "hclk-ioi-botcen"]], "HCLK_IOI_CENTER": [[119, "hclk-ioi-center"]], "HCLK_IOI_CMT": [[119, "hclk-ioi-cmt"]], "HCLK_IOI_TOPCEN": [[119, "hclk-ioi-topcen"]], "HCLK_MGT": [[106, "hclk-mgt"]], "HCLK_TERM_L": [[106, "hclk-term-l"]], "HCLK_TERM_R": [[106, "hclk-term-r"]], "HC_OPT": [[49, "hc-opt"], [62, "hc-opt"]], "Hard PCI logic": [[100, "hard-pci-logic"]], "Hard PowerPC 405 cores": [[101, "hard-powerpc-405-cores"]], "Horizontal clock spine": [[58, "horizontal-clock-spine"]], "I/O banks and special functions": [[114, "i-o-banks-and-special-functions"], [129, "i-o-banks-and-special-functions"], [145, "i-o-banks-and-special-functions"], [160, "i-o-banks-and-special-functions"]], "I/O buffer tiles": [[43, "i-o-buffer-tiles"]], "I/O buffers \u2014 Spartan 3": [[57, "i-o-buffers-spartan-3"]], "I/O buffers \u2014 Spartan 3A": [[57, "i-o-buffers-spartan-3a"]], "I/O buffers \u2014 Spartan 3E": [[57, "i-o-buffers-spartan-3e"]], "I/O buffers \u2014 Virtex": [[85, "i-o-buffers-virtex"]], "I/O buffers \u2014 Virtex 2": [[99, "i-o-buffers-virtex-2"]], "I/O buffers \u2014 Virtex 2 Pro": [[99, "i-o-buffers-virtex-2-pro"]], "I/O buffers \u2014 Virtex E": [[85, "i-o-buffers-virtex-e"]], "I/O data \u2014 Spartan 3": [[50, "i-o-data-spartan-3"]], "I/O data \u2014 Spartan 3A": [[50, "i-o-data-spartan-3a"]], "I/O data \u2014 Spartan 3E": [[50, "i-o-data-spartan-3e"]], "I/O data \u2014 Virtex 2": [[91, "i-o-data-virtex-2"]], "I/O data \u2014 Virtex 2 Pro": [[91, "i-o-data-virtex-2-pro"]], "I/O interface": [[43, "i-o-interface"], [57, "i-o-interface"], [99, "i-o-interface"]], "I/O pins": [[2, "i-o-pins"], [3, "i-o-pins"], [4, "i-o-pins"], [5, "i-o-pins"], [6, "i-o-pins"], [7, "i-o-pins"], [8, "i-o-pins"], [9, "i-o-pins"], [18, "i-o-pins"], [19, "i-o-pins"], [20, "i-o-pins"], [21, "i-o-pins"], [22, "i-o-pins"], [23, "i-o-pins"], [24, "i-o-pins"], [25, "i-o-pins"], [26, "i-o-pins"], [27, "i-o-pins"], [28, "i-o-pins"], [29, "i-o-pins"], [30, "i-o-pins"], [31, "i-o-pins"], [190, "i-o-pins"], [191, "i-o-pins"], [192, "i-o-pins"], [193, "i-o-pins"], [194, "i-o-pins"], [195, "i-o-pins"]], "I/O standard data": [[106, "i-o-standard-data"], [119, "i-o-standard-data"]], "IDCODE": [[35, "idcode"], [199, "idcode"]], "IMUX bits": [[2, "imux-bits"], [3, "imux-bits"], [4, "imux-bits"], [5, "imux-bits"], [6, "imux-bits"], [7, "imux-bits"], [8, "imux-bits"], [9, "imux-bits"], [18, "imux-bits"], [19, "imux-bits"], [20, "imux-bits"], [21, "imux-bits"], [22, "imux-bits"], [23, "imux-bits"], [24, "imux-bits"], [25, "imux-bits"], [26, "imux-bits"], [27, "imux-bits"], [28, "imux-bits"], [29, "imux-bits"], [30, "imux-bits"], [31, "imux-bits"], [190, "imux-bits"], [191, "imux-bits"], [192, "imux-bits"], [193, "imux-bits"], [194, "imux-bits"], [195, "imux-bits"]], "INT.BRAM": [[97, "int-bram"]], "INT.BRAM.S3": [[55, "int-bram-s3"]], "INT.BRAM.S3A.03": [[55, "int-bram-s3a-03"]], "INT.BRAM.S3A.12": [[55, "int-bram-s3a-12"]], "INT.BRAM.S3ADSP": [[55, "int-bram-s3adsp"]], "INT.BRAM.S3E": [[55, "int-bram-s3e"]], "INT.CLB": [[42, "int-clb"], [55, "int-clb"], [97, "int-clb"]], "INT.CNR": [[97, "int-cnr"]], "INT.DCM": [[55, "int-dcm"]], "INT.DCM.S3E.DUMMY": [[55, "int-dcm-s3e-dummy"]], "INT.DCM.V2": [[97, "int-dcm-v2"]], "INT.DCM.V2P": [[97, "int-dcm-v2p"]], "INT.GT.CLKPAD": [[97, "int-gt-clkpad"]], "INT.IOI": [[97, "int-ioi"]], "INT.IOI.CLK_B": [[97, "int-ioi-clk-b"]], "INT.IOI.CLK_T": [[97, "int-ioi-clk-t"]], "INT.IOI.FC": [[42, "int-ioi-fc"]], "INT.IOI.S3": [[55, "int-ioi-s3"]], "INT.IOI.S3A.LR": [[55, "int-ioi-s3a-lr"]], "INT.IOI.S3A.TB": [[55, "int-ioi-s3a-tb"]], "INT.IOI.S3E": [[55, "int-ioi-s3e"]], "INT.PPC": [[97, "int-ppc"]], "INTF": [[68, "intf"]], "INTF.CMT": [[68, "intf-cmt"]], "INTF.CMT.IOI": [[68, "intf-cmt-ioi"]], "INTF.DSP": [[55, "intf-dsp"]], "INTF.GT.B0": [[97, "intf-gt-b0"]], "INTF.GT.B123": [[97, "intf-gt-b123"]], "INTF.GT.BCLKPAD": [[97, "intf-gt-bclkpad"]], "INTF.GT.T0": [[97, "intf-gt-t0"]], "INTF.GT.T123": [[97, "intf-gt-t123"]], "INTF.GT.TCLKPAD": [[97, "intf-gt-tclkpad"]], "INTF.IOI": [[68, "intf-ioi"]], "INTF.PPC": [[97, "intf-ppc"]], "IO and transceiver placement": [[154, "io-and-transceiver-placement"]], "IO banks and IO buffers": [[58, "io-banks-and-io-buffers"], [93, "io-banks-and-io-buffers"]], "IO clock nodes": [[106, "io-clock-nodes"], [119, "io-clock-nodes"]], "IO.B": [[76, "io-b"], [85, "io-b"], [166, "io-b"], [171, "io-b"], [176, "io-b"], [181, "io-b"], [186, "io-b"]], "IO.B.R": [[76, "io-b-r"], [166, "io-b-r"], [171, "io-b-r"], [176, "io-b-r"], [181, "io-b-r"]], "IO.BS": [[76, "io-bs"], [166, "io-bs"], [171, "io-bs"], [176, "io-bs"], [181, "io-bs"]], "IO.BS.L": [[76, "io-bs-l"], [166, "io-bs-l"], [171, "io-bs-l"], [176, "io-bs-l"], [181, "io-bs-l"]], "IO.L": [[76, "io-l"], [85, "io-l"], [166, "io-l"], [171, "io-l"], [176, "io-l"], [181, "io-l"], [186, "io-l"]], "IO.L.FB": [[171, "io-l-fb"], [176, "io-l-fb"], [181, "io-l-fb"]], "IO.L.FT": [[171, "io-l-ft"], [176, "io-l-ft"], [181, "io-l-ft"]], "IO.L.T": [[76, "io-l-t"], [166, "io-l-t"], [171, "io-l-t"], [176, "io-l-t"], [181, "io-l-t"]], "IO.LS": [[76, "io-ls"], [166, "io-ls"], [171, "io-ls"], [176, "io-ls"], [181, "io-ls"]], "IO.LS.B": [[76, "io-ls-b"], [166, "io-ls-b"], [171, "io-ls-b"], [176, "io-ls-b"], [181, "io-ls-b"]], "IO.LS.FB": [[171, "io-ls-fb"], [176, "io-ls-fb"], [181, "io-ls-fb"]], "IO.LS.FT": [[171, "io-ls-ft"], [176, "io-ls-ft"], [181, "io-ls-ft"]], "IO.R": [[76, "io-r"], [85, "io-r"], [166, "io-r"], [171, "io-r"], [176, "io-r"], [181, "io-r"], [186, "io-r"]], "IO.R.FB": [[171, "io-r-fb"], [176, "io-r-fb"], [181, "io-r-fb"]], "IO.R.FT": [[171, "io-r-ft"], [176, "io-r-ft"], [181, "io-r-ft"]], "IO.R.T": [[76, "io-r-t"], [166, "io-r-t"], [171, "io-r-t"], [176, "io-r-t"], [181, "io-r-t"]], "IO.RS": [[76, "io-rs"], [166, "io-rs"], [171, "io-rs"], [176, "io-rs"], [181, "io-rs"]], "IO.RS.B": [[76, "io-rs-b"], [166, "io-rs-b"], [171, "io-rs-b"], [176, "io-rs-b"], [181, "io-rs-b"]], "IO.RS.FB": [[171, "io-rs-fb"], [176, "io-rs-fb"], [181, "io-rs-fb"]], "IO.RS.FT": [[171, "io-rs-ft"], [176, "io-rs-ft"], [181, "io-rs-ft"]], "IO.T": [[76, "io-t"], [85, "io-t"], [166, "io-t"], [171, "io-t"], [176, "io-t"], [181, "io-t"], [186, "io-t"]], "IO.T.R": [[76, "io-t-r"], [166, "io-t-r"], [171, "io-t-r"], [176, "io-t-r"], [181, "io-t-r"]], "IO.TS": [[76, "io-ts"], [166, "io-ts"], [171, "io-ts"], [176, "io-ts"], [181, "io-ts"]], "IO.TS.L": [[76, "io-ts-l"], [166, "io-ts-l"], [171, "io-ts-l"], [176, "io-ts-l"], [181, "io-ts-l"]], "IOB.B.V": [[85, "iob-b-v"]], "IOB.B.VE": [[85, "iob-b-ve"]], "IOB.L.V": [[85, "iob-l-v"]], "IOB.L.VE": [[85, "iob-l-ve"]], "IOB.R.V": [[85, "iob-r-v"]], "IOB.R.VE": [[85, "iob-r-ve"]], "IOB.T.V": [[85, "iob-t-v"]], "IOB.T.VE": [[85, "iob-t-ve"]], "IOBS.FC.B": [[43, "iobs-fc-b"]], "IOBS.FC.L": [[43, "iobs-fc-l"]], "IOBS.FC.R": [[43, "iobs-fc-r"]], "IOBS.FC.T": [[43, "iobs-fc-t"]], "IOBS.S3.B2": [[57, "iobs-s3-b2"]], "IOBS.S3.L1": [[57, "iobs-s3-l1"]], "IOBS.S3.R1": [[57, "iobs-s3-r1"]], "IOBS.S3.T2": [[57, "iobs-s3-t2"]], "IOBS.S3A.B2": [[57, "iobs-s3a-b2"]], "IOBS.S3A.L4": [[57, "iobs-s3a-l4"]], "IOBS.S3A.R4": [[57, "iobs-s3a-r4"]], "IOBS.S3A.T2": [[57, "iobs-s3a-t2"]], "IOBS.S3E.B1": [[57, "iobs-s3e-b1"]], "IOBS.S3E.B2": [[57, "iobs-s3e-b2"]], "IOBS.S3E.B3": [[57, "iobs-s3e-b3"]], "IOBS.S3E.B4": [[57, "iobs-s3e-b4"]], "IOBS.S3E.L1": [[57, "iobs-s3e-l1"]], "IOBS.S3E.L2": [[57, "iobs-s3e-l2"]], "IOBS.S3E.L3": [[57, "iobs-s3e-l3"]], "IOBS.S3E.L4": [[57, "iobs-s3e-l4"]], "IOBS.S3E.R1": [[57, "iobs-s3e-r1"]], "IOBS.S3E.R2": [[57, "iobs-s3e-r2"]], "IOBS.S3E.R3": [[57, "iobs-s3e-r3"]], "IOBS.S3E.R4": [[57, "iobs-s3e-r4"]], "IOBS.S3E.T1": [[57, "iobs-s3e-t1"]], "IOBS.S3E.T2": [[57, "iobs-s3e-t2"]], "IOBS.S3E.T3": [[57, "iobs-s3e-t3"]], "IOBS.S3E.T4": [[57, "iobs-s3e-t4"]], "IOBS.V2.B.L2": [[99, "iobs-v2-b-l2"]], "IOBS.V2.B.R2": [[99, "iobs-v2-b-r2"]], "IOBS.V2.L.B2": [[99, "iobs-v2-l-b2"]], "IOBS.V2.L.T2": [[99, "iobs-v2-l-t2"]], "IOBS.V2.R.B2": [[99, "iobs-v2-r-b2"]], "IOBS.V2.R.T2": [[99, "iobs-v2-r-t2"]], "IOBS.V2.T.L2": [[99, "iobs-v2-t-l2"]], "IOBS.V2.T.R2": [[99, "iobs-v2-t-r2"]], "IOBS.V2P.B.L1": [[99, "iobs-v2p-b-l1"]], "IOBS.V2P.B.L1.ALT": [[99, "iobs-v2p-b-l1-alt"]], "IOBS.V2P.B.L2": [[99, "iobs-v2p-b-l2"]], "IOBS.V2P.B.R1": [[99, "iobs-v2p-b-r1"]], "IOBS.V2P.B.R1.ALT": [[99, "iobs-v2p-b-r1-alt"]], "IOBS.V2P.B.R2": [[99, "iobs-v2p-b-r2"]], "IOBS.V2P.B.R2.CLK": [[99, "iobs-v2p-b-r2-clk"]], "IOBS.V2P.L.B2": [[99, "iobs-v2p-l-b2"]], "IOBS.V2P.L.T2": [[99, "iobs-v2p-l-t2"]], "IOBS.V2P.R.B2": [[99, "iobs-v2p-r-b2"]], "IOBS.V2P.R.T2": [[99, "iobs-v2p-r-t2"]], "IOBS.V2P.T.L1": [[99, "iobs-v2p-t-l1"]], "IOBS.V2P.T.L1.ALT": [[99, "iobs-v2p-t-l1-alt"]], "IOBS.V2P.T.L2": [[99, "iobs-v2p-t-l2"]], "IOBS.V2P.T.R1": [[99, "iobs-v2p-t-r1"]], "IOBS.V2P.T.R1.ALT": [[99, "iobs-v2p-t-r1-alt"]], "IOBS.V2P.T.R2": [[99, "iobs-v2p-t-r2"]], "IOBS.V2P.T.R2.CLK": [[99, "iobs-v2p-t-r2-clk"]], "IOI": [[99, "ioi"]], "IOI.CLK_B": [[99, "ioi-clk-b"]], "IOI.CLK_T": [[99, "ioi-clk-t"]], "IOI.FC": [[43, "ioi-fc"]], "IOI.S3": [[57, "ioi-s3"]], "IOI.S3A.B": [[57, "ioi-s3a-b"]], "IOI.S3A.LR": [[57, "ioi-s3a-lr"]], "IOI.S3A.T": [[57, "ioi-s3a-t"]], "IOI.S3E": [[57, "ioi-s3e"]], "IR": [[13, "ir"], [35, "ir"], [199, "ir"]], "ISP DR registers \u2014 XC9500": [[35, "isp-dr-registers-xc9500"]], "ISP DR registers \u2014 XC9500XL/XV": [[35, "isp-dr-registers-xc9500xl-xv"]], "ISP instructions": [[13, "isp-instructions"], [199, "isp-instructions"]], "ISP instructions \u2014 XC9500": [[35, "isp-instructions-xc9500"]], "ISP instructions \u2014 XC9500XL/XV": [[35, "isp-instructions-xc9500xl-xv"]], "Input / Output": [[43, "input-output"], [57, "input-output"], [99, "input-output"]], "Input multiplexers": [[55, "input-multiplexers"], [97, "input-multiplexers"]], "Input/Output": [[69, "input-output"], [76, "input-output"], [85, "input-output"], [114, "input-output"], [129, "input-output"], [145, "input-output"], [160, "input-output"], [166, "input-output"], [171, "input-output"], [176, "input-output"], [181, "input-output"], [186, "input-output"]], "Input/output buffer": [[14, "input-output-buffer"], [36, "input-output-buffer"], [200, "input-output-buffer"]], "Interconnect": [[128, "interconnect"], [144, "interconnect"], [159, "interconnect"]], "Introduction": [[12, "introduction"], [34, "introduction"], [56, "introduction"], [98, "introduction"], [198, "introduction"]], "JED bits": [[189, "jed-bits"]], "JED format mapping": [[15, "jed-format-mapping"], [16, "jed-format-mapping"]], "JED mapping": [[2, "jed-mapping"], [3, "jed-mapping"], [4, "jed-mapping"], [4, "id1"], [5, "jed-mapping"], [5, "id1"], [6, "jed-mapping"], [7, "jed-mapping"], [8, "jed-mapping"], [8, "id1"], [9, "jed-mapping"], [9, "id1"], [188, "jed-mapping"], [190, "jed-mapping"], [191, "jed-mapping"], [192, "jed-mapping"], [193, "jed-mapping"], [194, "jed-mapping"], [195, "jed-mapping"]], "JED mapping \u2014 MCs with IOBs": [[2, "jed-mapping-mcs-with-iobs"], [3, "jed-mapping-mcs-with-iobs"], [6, "jed-mapping-mcs-with-iobs"], [7, "jed-mapping-mcs-with-iobs"]], "JED mapping \u2014 MCs without IOBs": [[2, "jed-mapping-mcs-without-iobs"], [3, "jed-mapping-mcs-without-iobs"], [6, "jed-mapping-mcs-without-iobs"], [7, "jed-mapping-mcs-without-iobs"]], "JED mapping \u2014 macrocells with IOB": [[188, "jed-mapping-macrocells-with-iob"]], "JED mapping \u2014 macrocells without IOB": [[188, "jed-mapping-macrocells-without-iob"]], "JED structure": [[188, "jed-structure"]], "JTAG interface": [[13, "jtag-interface"], [35, "jtag-interface"], [199, "jtag-interface"]], "LL.FC": [[40, "ll-fc"]], "LL.S3": [[50, "ll-s3"]], "LL.S3A": [[50, "ll-s3a"]], "LL.S3E": [[50, "ll-s3e"]], "LL.V2": [[91, "ll-v2"]], "LL.V2P": [[91, "ll-v2p"]], "LLH": [[55, "llh"]], "LLH.CLB": [[77, "llh-clb"], [167, "llh-clb"]], "LLH.CLB.B": [[77, "llh-clb-b"], [167, "llh-clb-b"]], "LLH.CLKB.S3A": [[55, "llh-clkb-s3a"]], "LLH.CLKT.S3A": [[55, "llh-clkt-s3a"]], "LLH.IO.B": [[77, "llh-io-b"], [167, "llh-io-b"]], "LLH.IO.T": [[77, "llh-io-t"], [167, "llh-io-t"]], "LLHC.CLB": [[172, "llhc-clb"], [177, "llhc-clb"], [182, "llhc-clb"]], "LLHC.CLB.B": [[172, "llhc-clb-b"], [177, "llhc-clb-b"], [182, "llhc-clb-b"]], "LLHC.IO.B": [[172, "llhc-io-b"], [177, "llhc-io-b"], [182, "llhc-io-b"]], "LLHC.IO.T": [[172, "llhc-io-t"], [177, "llhc-io-t"], [182, "llhc-io-t"]], "LLHQ.CLB": [[172, "llhq-clb"], [177, "llhq-clb"], [182, "llhq-clb"]], "LLHQ.CLB.B": [[172, "llhq-clb-b"], [177, "llhq-clb-b"], [182, "llhq-clb-b"]], "LLHQ.CLB.T": [[172, "llhq-clb-t"], [177, "llhq-clb-t"], [182, "llhq-clb-t"]], "LLHQ.IO.B": [[172, "llhq-io-b"], [177, "llhq-io-b"], [182, "llhq-io-b"]], "LLHQ.IO.T": [[172, "llhq-io-t"], [177, "llhq-io-t"], [182, "llhq-io-t"]], "LLV.CLB": [[77, "llv-clb"], [167, "llv-clb"]], "LLV.IO.L": [[77, "llv-io-l"], [167, "llv-io-l"]], "LLV.IO.R": [[77, "llv-io-r"], [167, "llv-io-r"]], "LLV.S3A": [[55, "llv-s3a"]], "LLV.S3E": [[55, "llv-s3e"]], "LLVC.CLB": [[172, "llvc-clb"], [177, "llvc-clb"], [182, "llvc-clb"]], "LLVC.IO.L": [[172, "llvc-io-l"], [177, "llvc-io-l"], [182, "llvc-io-l"]], "LLVC.IO.R": [[172, "llvc-io-r"], [177, "llvc-io-r"], [182, "llvc-io-r"]], "LLVQ.CLB": [[172, "llvq-clb"], [177, "llvq-clb"], [182, "llvq-clb"]], "LLVQ.IO.L.B": [[172, "llvq-io-l-b"], [177, "llvq-io-l-b"], [182, "llvq-io-l-b"]], "LLVQ.IO.L.T": [[172, "llvq-io-l-t"], [177, "llvq-io-l-t"], [182, "llvq-io-l-t"]], "LLVQ.IO.R.B": [[172, "llvq-io-r-b"], [177, "llvq-io-r-b"], [182, "llvq-io-r-b"]], "LLVQ.IO.R.T": [[172, "llvq-io-r-t"], [177, "llvq-io-r-t"], [182, "llvq-io-r-t"]], "LR.FC": [[40, "lr-fc"]], "LR.S3": [[50, "lr-s3"]], "LR.S3A": [[50, "lr-s3a"]], "LR.S3E": [[50, "lr-s3e"]], "LR.V2": [[91, "lr-v2"]], "LR.V2P": [[91, "lr-v2p"]], "LUT RAM": [[46, "lut-ram"], [88, "lut-ram"]], "LUTs": [[46, "luts"], [88, "luts"]], "Local control terms": [[200, "local-control-terms"]], "Long line splitters": [[55, "long-line-splitters"]], "Lower left": [[40, "lower-left"], [50, "lower-left"], [63, "lower-left"], [91, "lower-left"]], "Lower right": [[40, "lower-right"], [50, "lower-right"], [63, "lower-right"], [91, "lower-right"]], "MC bits": [[2, "mc-bits"], [3, "mc-bits"], [4, "mc-bits"], [5, "mc-bits"], [6, "mc-bits"], [7, "mc-bits"], [8, "mc-bits"], [9, "mc-bits"]], "MGT clock repeater": [[106, "mgt-clock-repeater"], [119, "mgt-clock-repeater"]], "MMCM Tables": [[151, "mmcm-tables"]], "MODE": [[49, "mode"], [62, "mode"]], "Macrocell and IOB outputs": [[14, "macrocell-and-iob-outputs"], [200, "macrocell-and-iob-outputs"]], "Macrocell output \u2014 XC9500": [[36, "macrocell-output-xc9500"]], "Macrocell output \u2014 XC9500XL/XV": [[36, "macrocell-output-xc9500xl-xv"]], "Memory Controller Block": [[70, "memory-controller-block"]], "Middle GTP holes": [[154, "middle-gtp-holes"]], "Misc configuration": [[14, "misc-configuration"], [36, "misc-configuration"], [200, "misc-configuration"]], "Multi-gigabit transceivers": [[66, "multi-gigabit-transceivers"], [111, "multi-gigabit-transceivers"]], "Multi-gigabit transceivers \u2014 Virtex 2 Pro": [[94, "multi-gigabit-transceivers-virtex-2-pro"]], "Multi-gigabit transceivers \u2014 Virtex 2 Pro X": [[95, "multi-gigabit-transceivers-virtex-2-pro-x"]], "Output multiplexers": [[88, "output-multiplexers"]], "Output multiplexers \u2014 Spartan 3": [[46, "output-multiplexers-spartan-3"]], "Output multiplexers \u2014 Virtex 4": [[46, "output-multiplexers-virtex-4"]], "Overview": [[14, "overview"], [36, "overview"], [200, "overview"]], "PCI Express": [[71, "pci-express"]], "PCI Express Gen2 cores": [[161, "pci-express-gen2-cores"]], "PCI Express Gen3 cores": [[162, "pci-express-gen3-cores"]], "PCI Express cores": [[130, "pci-express-cores"], [146, "pci-express-cores"]], "PCI Express holes": [[154, "pci-express-holes"]], "PCI Logic": [[86, "pci-logic"]], "PCI logic": [[93, "pci-logic"]], "PCI_CE_DELAY": [[61, "pci-ce-delay"]], "PLL Tables": [[151, "pll-tables"]], "PMA_SPEED values": [[95, "pma-speed-values"]], "PMVIOB": [[135, "pmviob"]], "POWERDOWN": [[49, "powerdown"], [62, "powerdown"]], "PPC.E": [[97, "ppc-e"]], "PPC.N": [[97, "ppc-n"]], "PPC.S": [[97, "ppc-s"]], "PPC.W": [[97, "ppc-w"]], "PT import/export": [[36, "pt-import-export"]], "PU_GTS": [[49, "pu-gts"], [62, "pu-gts"]], "PU_GWE": [[49, "pu-gwe"], [62, "pu-gwe"]], "Packages": [[12, "packages"], [34, "packages"], [198, "packages"]], "Part": [[17, "part"], [189, "part"]], "Phase-locked loop": [[72, "phase-locked-loop"]], "PowerPC cores": [[131, "powerpc-cores"]], "PowerPC holes": [[93, "powerpc-holes"], [97, "powerpc-holes"], [110, "powerpc-holes"], [124, "powerpc-holes"]], "Primary vertical clock spine": [[58, "primary-vertical-clock-spine"]], "Primitive outputs": [[55, "primitive-outputs"], [97, "primitive-outputs"]], "Processing system": [[154, "processing-system"]], "Product terms": [[14, "product-terms"], [36, "product-terms"], [200, "product-terms"]], "Programming fuses \u2014 XC9500": [[35, "programming-fuses-xc9500"]], "Programming fuses \u2014 XC9500XL/XV": [[35, "programming-fuses-xc9500xl-xv"]], "Programming sequence": [[13, "programming-sequence"], [35, "programming-sequence"], [199, "programming-sequence"]], "Project Combine": [[0, "project-combine"]], "RANDOR": [[37, "randor"], [46, "randor"]], "RANDOR_INIT": [[37, "randor-init"], [46, "randor-init"]], "RESERVED_ANDOR": [[37, "reserved-andor"], [46, "reserved-andor"]], "Reading fuses \u2014 XC9500": [[35, "reading-fuses-xc9500"]], "Reading fuses \u2014 XC9500XL/XV": [[35, "reading-fuses-xc9500xl-xv"]], "Register": [[14, "register"], [200, "register"]], "Registers": [[46, "registers"], [88, "registers"]], "Row clock terminators": [[106, "row-clock-terminators"]], "SEU_OPT": [[49, "seu-opt"], [62, "seu-opt"]], "Secondary vertical clock spines": [[58, "secondary-vertical-clock-spines"]], "Shift registers": [[46, "shift-registers"], [88, "shift-registers"]], "Single-port 128\u00d71 RAM": [[88, "single-port-1281-ram"]], "Single-port 16\u00d7X RAM": [[46, "single-port-16x-ram"], [88, "single-port-16x-ram"]], "Single-port 32\u00d7X RAM": [[46, "single-port-32x-ram"], [88, "single-port-32x-ram"]], "Single-port 64\u00d71 RAM": [[46, "single-port-641-ram"]], "Single-port 64\u00d7X RAM": [[88, "single-port-64x-ram"]], "Spartan 3": [[54, "spartan-3"]], "Spartan 3A DCMs": [[58, "spartan-3a-dcms"]], "Spartan 3A and 3A DSP BRAM columns": [[58, "spartan-3a-and-3a-dsp-bram-columns"]], "Spartan 3E BRAM columns": [[58, "spartan-3e-bram-columns"]], "Spartan 3E DCMs": [[58, "spartan-3e-dcms"]], "Spartan 6": [[67, "spartan-6"]], "Spartan XL": [[75, "spartan-xl"]], "Speed": [[17, "speed"], [189, "speed"]], "Speed data": [[2, "speed-data"], [3, "speed-data"], [4, "speed-data"], [5, "speed-data"], [6, "speed-data"], [7, "speed-data"], [8, "speed-data"], [9, "speed-data"], [18, "speed-data"], [19, "speed-data"], [20, "speed-data"], [21, "speed-data"], [22, "speed-data"], [23, "speed-data"], [24, "speed-data"], [25, "speed-data"], [26, "speed-data"], [27, "speed-data"], [28, "speed-data"], [29, "speed-data"], [30, "speed-data"], [31, "speed-data"], [190, "speed-data"], [191, "speed-data"], [192, "speed-data"], [193, "speed-data"], [194, "speed-data"], [195, "speed-data"]], "Spine clock terminators": [[106, "spine-clock-terminators"]], "Spine column": [[110, "spine-column"], [124, "spine-column"]], "Spine muxes \u2014 CMT": [[119, "spine-muxes-cmt"]], "Spine muxes \u2014 DCM": [[106, "spine-muxes-dcm"]], "Spine muxes \u2014 IOB": [[106, "spine-muxes-iob"], [119, "spine-muxes-iob"]], "Spine muxes \u2014 MGT": [[119, "spine-muxes-mgt"]], "Splitters": [[77, "splitters"], [167, "splitters"], [172, "splitters"], [177, "splitters"], [182, "splitters"], [187, "splitters"]], "Sum of products": [[88, "sum-of-products"]], "Sum term, LUT2": [[200, "sum-term-lut2"]], "Sum term, XOR gate": [[14, "sum-term-xor-gate"], [36, "sum-term-xor-gate"]], "System monitor": [[115, "system-monitor"]], "TERM.E": [[97, "term-e"]], "TERM.N": [[97, "term-n"]], "TERM.S": [[97, "term-s"]], "TERM.W": [[97, "term-w"]], "TESTMODE": [[62, "testmode"], [137, "testmode"], [152, "testmode"]], "TIMER": [[62, "timer"], [121, "timer"], [137, "timer"], [152, "timer"]], "TRIM": [[137, "trim"]], "TRIM0": [[152, "trim0"]], "TRIM1": [[152, "trim1"]], "TRIM2": [[152, "trim2"]], "Tables": [[69, "tables"], [72, "tables"], [114, "tables"], [120, "tables"], [129, "tables"], [136, "tables"], [145, "tables"]], "Tables \u2014 HP IO": [[160, "tables-hp-io"]], "Tables \u2014 HR IO": [[160, "tables-hr-io"]], "Terminators": [[55, "terminators"], [97, "terminators"]], "The BRAM bel": [[87, "the-bram-bel"]], "The CLKC clock center tile": [[38, "the-clkc-clock-center-tile"], [47, "the-clkc-clock-center-tile"]], "The CLKC_50A clock center tile": [[47, "the-clkc-50a-clock-center-tile"]], "The GCLKC clock spine distribution tiles": [[89, "the-gclkc-clock-spine-distribution-tiles"]], "The GCLKH clock row distribution tiles": [[38, "the-gclkh-clock-row-distribution-tiles"], [47, "the-gclkh-clock-row-distribution-tiles"]], "The GCLKVC clock spine distribution tiles": [[38, "the-gclkvc-clock-spine-distribution-tiles"], [47, "the-gclkvc-clock-spine-distribution-tiles"]], "The GCLKVM secondary clock center tiles": [[38, "the-gclkvm-secondary-clock-center-tiles"], [47, "the-gclkvm-secondary-clock-center-tiles"]], "The MULT bel \u2014 Spartan 3E and Spartan 3A": [[87, "the-mult-bel-spartan-3e-and-spartan-3a"]], "The MULT bel \u2014 Virtex 2 and Spartan 3": [[87, "the-mult-bel-virtex-2-and-spartan-3"]], "The clock row distribution tiles": [[89, "the-clock-row-distribution-tiles"]], "Tile": [[17, "tile"], [189, "tile"]], "Todo": [[1, "id1"], [12, "id1"], [13, "id1"], [13, "id2"], [13, "id3"], [13, "id4"], [14, "id1"], [14, "id2"], [14, "id3"], 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132, 147], "9815": [45, 59, 87, 102, 116, 132, 147], "9816": [45, 59, 87, 102, 116, 132, 147], "9817": [45, 59, 87, 102, 116, 132, 147], "9818": [45, 59, 87, 102, 116, 132, 147], "9819": [45, 59, 87, 102, 116, 132, 147], "982": [6, 7, 45, 59, 78, 87, 102, 116, 132, 147], "9820": [45, 59, 87, 102, 116, 132, 147], "9821": [45, 59, 87, 102, 116, 132, 147], "9822": [45, 59, 87, 102, 116, 132, 147], "9823": [45, 59, 87, 102, 116, 132, 147], "9824": [45, 59, 87, 102, 116, 132, 147], "9825": [45, 59, 87, 102, 116, 132, 147], "9826": [45, 59, 87, 102, 116, 132, 147], "9827": [45, 59, 87, 102, 116, 132, 147], "9828": [45, 59, 87, 102, 116, 132, 147], "9829": [45, 59, 87, 102, 116, 132, 147], "983": [7, 45, 59, 78, 87, 102, 116, 132, 147], "9830": [45, 59, 87, 102, 116, 132, 147], "9831": [45, 59, 87, 102, 116, 132, 147], "9832": [45, 59, 87, 102, 116, 132, 147], "9833": [45, 59, 87, 102, 116, 132, 147], "9834": [45, 59, 87, 102, 116, 132, 147], "9835": [45, 59, 87, 102, 116, 132, 147], "9836": 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132, 147], "9858": [45, 59, 87, 102, 116, 132, 147], "9859": [45, 59, 87, 102, 116, 132, 147], "986": [45, 59, 78, 87, 102, 116, 132, 147], "9860": [45, 59, 87, 102, 116, 132, 147], "9861": [45, 59, 87, 102, 116, 132, 147], "9862": [45, 59, 87, 102, 116, 132, 147], "9863": [45, 59, 87, 102, 116, 132, 147], "9864": [45, 59, 87, 102, 116, 132, 147], "9865": [45, 59, 87, 102, 116, 132, 147], "9866": [45, 59, 87, 102, 116, 132, 147], "9867": [45, 59, 87, 102, 116, 132, 147], "9868": [45, 59, 87, 102, 116, 132, 147], "9869": [45, 59, 87, 102, 116, 132, 147], "987": [45, 59, 78, 87, 102, 116, 132, 147], "9870": [45, 59, 87, 102, 116, 132, 147], "9871": [45, 59, 87, 102, 116, 132, 147], "9872": [45, 59, 87, 102, 116, 132, 147], "9873": [45, 59, 87, 102, 116, 132, 147], "9874": [45, 59, 87, 102, 116, 132, 147], "9875": [45, 59, 87, 102, 116, 132, 147], "9876": [45, 59, 87, 102, 116, 132, 147], "9877": [45, 59, 87, 102, 116, 132, 147], "9878": [45, 59, 87, 102, 116, 132, 147], "9879": [45, 59, 87, 102, 116, 132, 147], "988": [45, 59, 78, 87, 102, 116, 132, 147], "9880": [45, 59, 87, 102, 116, 132, 147], "9881": [45, 59, 87, 102, 116, 132, 147], "9882": [45, 59, 87, 102, 116, 132, 147], "9883": [45, 59, 87, 102, 116, 132, 147], "9884": [45, 59, 87, 102, 116, 132, 147], "9885": [45, 59, 87, 102, 116, 132, 147], "9886": [45, 59, 87, 102, 116, 132, 147], "9887": [45, 59, 87, 102, 116, 132, 147], "9888": [45, 59, 87, 102, 116, 132, 147], "9889": [45, 59, 87, 102, 116, 132, 147], "989": [7, 45, 59, 78, 87, 102, 116, 132, 147], "9890": [45, 59, 87, 102, 116, 132, 147], "9891": [45, 59, 87, 102, 116, 132, 147], "9892": [45, 59, 87, 102, 116, 132, 147], "9893": [45, 59, 87, 102, 116, 132, 147], "9894": [45, 59, 87, 102, 116, 132, 147], "9895": [45, 59, 87, 102, 116, 132, 147], "9896": [45, 59, 87, 102, 116, 132, 147], "9897": [45, 59, 87, 102, 116, 132, 147], "9898": [45, 59, 87, 102, 116, 132, 147], "9899": [45, 59, 87, 102, 116, 132, 147], "99": [2, 3, 7, 45, 59, 61, 69, 78, 87, 95, 102, 116, 132, 147, 190, 191, 192, 193, 194, 195], "990": [7, 45, 59, 78, 87, 102, 116, 132, 147], "9900": [7, 45, 59, 87, 102, 116, 132, 147], "9901": [45, 59, 87, 102, 116, 132, 147], "9902": [45, 59, 87, 102, 116, 132, 147], "9903": [45, 59, 87, 102, 116, 132, 147], "9904": [45, 59, 87, 102, 116, 132, 147], "9905": [45, 59, 87, 102, 116, 132, 147], "9906": [45, 59, 87, 102, 116, 132, 147], "9907": [45, 59, 87, 102, 116, 132, 147], "9908": [45, 59, 87, 102, 116, 132, 147], "9909": [45, 59, 87, 102, 116, 132, 147], "991": [7, 45, 59, 78, 87, 102, 116, 132, 147], "9910": [45, 59, 87, 102, 116, 132, 147], "9911": [45, 59, 87, 102, 116, 132, 147], "9912": [45, 59, 87, 102, 116, 132, 147], "9913": [45, 59, 87, 102, 116, 132, 147], "9914": [45, 59, 87, 102, 116, 132, 147], "9915": [45, 59, 87, 102, 116, 132, 147], "9916": [45, 59, 87, 102, 116, 132, 147], "9917": [45, 59, 87, 102, 116, 132, 147], "9918": [45, 59, 87, 102, 116, 132, 147], "9919": [45, 59, 87, 102, 116, 132, 147], "992": [7, 45, 59, 78, 87, 102, 116, 132, 147], "9920": [45, 59, 87, 102, 116, 132, 147], "9921": [45, 59, 87, 102, 116, 132, 147], "9922": [45, 59, 87, 102, 116, 132, 147], "9923": [45, 59, 87, 102, 116, 132, 147], "9924": [45, 59, 87, 102, 116, 132, 147], "9925": [45, 59, 87, 102, 116, 132, 147], "9926": [45, 59, 87, 102, 116, 132, 147], "9927": [45, 59, 87, 102, 116, 132, 147], "9928": [45, 59, 87, 102, 116, 132, 147], "9929": [45, 59, 87, 102, 116, 132, 147], "993": [45, 59, 78, 87, 102, 116, 132, 147], "9930": [45, 59, 87, 102, 116, 132, 147], "9931": [45, 59, 87, 102, 116, 132, 147], "9932": [45, 59, 87, 102, 116, 132, 147], "9933": [45, 59, 87, 102, 116, 132, 147], "9934": [45, 59, 87, 102, 116, 132, 147], "9935": [45, 59, 87, 102, 116, 132, 147], "9936": [45, 59, 87, 102, 116, 132, 147], "9937": [45, 59, 87, 102, 116, 132, 147], "9938": [45, 59, 87, 102, 116, 132, 147], "9939": [45, 59, 87, 102, 116, 132, 147], "994": [45, 59, 78, 87, 102, 116, 132, 147], "9940": [45, 59, 87, 102, 116, 132, 147], "9941": [45, 59, 87, 102, 116, 132, 147], "9942": [45, 59, 87, 102, 116, 132, 147], "9943": [45, 59, 87, 102, 116, 132, 147], "9944": [45, 59, 87, 102, 116, 132, 147], "9945": [45, 59, 87, 102, 116, 132, 147], "9946": [45, 59, 87, 102, 116, 132, 147], "9947": [45, 59, 87, 102, 116, 132, 147], "9948": [45, 59, 87, 102, 116, 132, 147], "9949": [45, 59, 87, 102, 116, 132, 147], "995": [45, 59, 78, 87, 102, 116, 132, 147], "9950": [45, 59, 87, 102, 116, 132, 147], "9951": [45, 59, 87, 102, 116, 132, 147], "9952": [45, 59, 87, 102, 116, 132, 147], "9953": [45, 59, 87, 102, 116, 132, 147], "9954": [45, 59, 87, 102, 116, 132, 147], "9955": [45, 59, 87, 102, 116, 132, 147], "9956": [45, 59, 87, 102, 116, 132, 147], "9957": [45, 59, 87, 102, 116, 132, 147], "9958": [45, 59, 87, 102, 116, 132, 147], "9959": [45, 59, 87, 102, 116, 132, 147], "996": [45, 59, 78, 87, 102, 116, 132, 147], "9960": [45, 59, 87, 102, 116, 132, 147], "9961": [45, 59, 87, 102, 116, 132, 147], "9962": [45, 59, 87, 102, 116, 132, 147], "9963": [45, 59, 87, 102, 116, 132, 147], "9964": [45, 59, 87, 102, 116, 132, 147], "9965": [45, 59, 87, 102, 116, 132, 147], "9966": [45, 59, 87, 102, 116, 132, 147], "9967": [45, 59, 87, 102, 116, 132, 147], "9968": [45, 59, 87, 102, 116, 132, 147], "9969": [45, 59, 87, 102, 116, 132, 147], "997": [45, 59, 78, 87, 102, 116, 132, 147], "9970": [45, 59, 87, 102, 116, 132, 147], "9971": [45, 59, 87, 102, 116, 132, 147], "9972": [45, 59, 87, 102, 116, 132, 147], "9973": [45, 59, 87, 102, 116, 132, 147], "9974": [45, 59, 87, 102, 116, 132, 147], "9975": [45, 59, 87, 102, 116, 132, 147], "9976": [45, 59, 87, 102, 116, 132, 147], "9977": [45, 59, 87, 102, 116, 132, 147], "9978": [45, 59, 87, 102, 116, 132, 147], "9979": [45, 59, 87, 102, 116, 132, 147], "998": [45, 59, 78, 87, 102, 116, 132, 147], "9980": [45, 59, 87, 102, 116, 132, 147], "9981": [45, 59, 87, 102, 116, 132, 147], "9982": [45, 59, 87, 102, 116, 132, 147], "9983": [45, 59, 87, 102, 116, 132, 147], "9984": [45, 59, 87, 102, 116, 132, 147], "9985": [45, 59, 87, 102, 116, 132, 147], "9986": [45, 59, 87, 102, 116, 132, 147], "9987": [45, 59, 87, 102, 116, 132, 147], "9988": [45, 59, 87, 102, 116, 132, 147], "9989": [45, 59, 87, 102, 116, 132, 147], "999": [45, 59, 78, 87, 102, 116, 132, 147], "9990": [45, 59, 87, 102, 116, 132, 147], "9991": [45, 59, 87, 102, 116, 132, 147], "9992": [45, 59, 87, 102, 116, 132, 147], "9993": [45, 59, 87, 102, 116, 132, 147], "9994": [45, 59, 87, 102, 116, 132, 147], "9995": [45, 59, 87, 102, 116, 132, 147], "9996": [45, 59, 87, 102, 116, 132, 147], "9997": [45, 59, 87, 102, 116, 132, 147], "9998": [45, 59, 87, 102, 116, 132, 147], "9999": [45, 59, 87, 102, 116, 132, 147], "9_32000000001111111111001101010101001100101000010101000001001101010100000010000010001100100100000101000011010100010101101000": 95, "9_64000000001111111111001101010101001100101000010101000001001101010100000010000010001100100100000101000011010100010101101000": 95, "9ce_mux": 188, "9fb_group": [190, 191, 192, 193, 194, 195], "9foe2_mux": [4, 5, 8, 9], "9fsr_enabl": [2, 3, 6, 7], "9ibuf_mod": [2, 3, 6, 7], "9int": [55, 78, 85], "9lct5_inv": 188, "9reg_d_ireg": 188, "9reg_init": [2, 3, 6, 7], "9reg_mod": [4, 5, 8, 9], "9rowcolumn": [104, 106, 130, 133, 148], "9rowcolumn0123": 156, "9rowcolumn012345678910111213141516171819": 111, "9rowcolumn012345678910111213141516171819202122": [70, 71], "9rowcolumn012345678910111213141516171819202122232425": 66, "9rowcolumn0123456789101112131415161718192021222324252627": [117, 123, 131, 136, 139, 146, 150], "9rowcolumn01234567891011121314151617181920212223242526272829": [120, 141, 142, 151, 161, 162], "9rowcolumn0123456789101112131415161718192021222324252627282930": [64, 72], "9rowcolumn012345678910111213141516171819202122232425262728293031": [125, 126, 155, 156, 157], "A": [12, 14, 17, 35, 36, 46, 58, 87, 88, 93, 102, 110, 124, 129, 140, 145, 154, 160, 189, 200], "AED": [12, 198], "AND": [2, 6, 7, 16, 33, 34, 35, 36, 37, 88, 200], "As": [35, 140, 200], "BY": [37, 46, 55, 79, 88, 97, 105], "For": [34, 35, 36, 55, 58, 93, 97, 110, 124, 140, 154, 200], "ISE": [35, 200], "IT": 97, "If": [35, 36, 87, 88, 102, 110, 124, 140, 145, 154, 200], "In": [15, 16, 36, 46, 55, 88, 97, 110, 114, 124, 129, 140, 145, 154, 160, 200], "It": [12, 34, 35, 36, 46, 47, 55, 58, 87, 88, 93, 97, 102, 110, 124, 140, 145, 154, 160, 189, 198, 200], "Its": [35, 87], "No": 154, "Not": [15, 16, 36, 55, 97, 200], "OR": [2, 6, 7, 36, 37], "On": [12, 15, 16, 36, 46, 47, 55, 58, 87, 93, 154, 200], "Such": [35, 55, 58, 93], "The": [12, 13, 15, 16, 17, 34, 35, 36, 37, 41, 42, 45, 46, 53, 54, 55, 56, 58, 65, 88, 93, 96, 97, 98, 102, 105, 110, 114, 124, 129, 140, 145, 154, 160, 188, 189, 198, 199, 200], "Their": [46, 88], "There": [17, 35, 46, 55, 56, 87, 88, 97, 98, 110, 124, 140, 145, 154, 160], "These": [36, 97, 145, 154], "To": [35, 36, 102], "_": [17, 34, 36, 189, 200], "_chain_down": 36, "_chain_up": 36, "_enabl": [36, 188, 200], "_gclk": 200, "_init": [46, 88], "_inv": [36, 200], "_lct": 200, "_mc": [12, 198], "_mux": [36, 46, 88], "_none": 200, "_reg": [87, 102], "_srval": [46, 88], "_sum": 36, "a0": 45, "a0reg": [53, 65], "a1": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a10": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 45, 191, 192, 193, 194, 195], "a11": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 45, 192, 193, 194, 195], "a12": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 45, 192, 193, 194, 195], "a13": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 45, 192, 193, 194, 195], "a14": [2, 3, 6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a15": [3, 6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a16": [3, 6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a17": [6, 7, 22, 23, 24, 25, 45, 193, 194, 195], "a18": [6, 7, 22, 23, 24, 25, 193, 194, 195], "a19": [6, 7, 22, 23, 24, 25, 193, 194, 195], "a1reg": [53, 65], "a2": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a20": [6, 7, 22, 23, 24, 194, 195], "a21": [6, 7, 22, 23, 194, 195], "a22": [6, 7, 22, 23, 194, 195], "a23": [22, 23], "a24": [22, 23], "a25": [22, 23], "a26": [22, 23], "a3": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a4": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a5": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a5ffinit": [134, 149], "a5ffinitslice0": [134, 149], "a5ffmux": [134, 149], "a5ffsr": [134, 149], "a5ffsrinit": 60, "a5ffsrinitslice0": 60, "a5ffsrslice1": 134, "a5q0": 60, "a5q0100": [60, 134, 149], "a6": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a6lut": [60, 118, 134, 149], "a7": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 45, 190, 191, 192, 193, 194, 195], "a8": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 45, 191, 192, 193, 194, 195], "a9": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 45, 191, 192, 193, 194, 195], "a_bgmonitoren": [155, 156, 157], "a_bgmonitorength_common": 155, "a_bgmonitorengtp_common": 156, "a_bgmonitorengtx_common": 157, "a_bgpd": [155, 156, 157], "a_bgpdgth_common": 155, "a_bgpdgtp_common": 156, "a_bgpdgtx_common": 157, "a_cfgreset": [155, 156, 157], "a_cfgresetgth_channel": 155, "a_cfgresetgtp_channel": 156, "a_cfgresetgtx_channel": 157, "a_cplllocken": [155, 157], "a_cplllockength_channel": 155, "a_cplllockengtx_channel": 157, "a_cpllpd": [155, 157], "a_cpllpdgth_channel": 155, "a_cpllpdgtx_channel": 157, "a_cpllreset": [155, 157], "a_cpllresetgth_channel": 155, "a_cpllresetgtx_channel": 157, "a_dfeclkdlyadj": 142, "a_dfedlyovrd": 142, "a_dfedlyovrdgtx0": 142, "a_dfedlyovrdgtx1": 142, "a_dfedlyovrdgtx2": 142, "a_dfedlyovrdgtx3": 142, "a_dfetap1": 142, "a_dfetap2": 142, "a_dfetap3": 142, "a_dfetap4": 142, "a_dfetapovrd": 142, "a_dfetapovrdgtx0": 142, "a_dfetapovrdgtx1": 142, "a_dfetapovrdgtx2": 142, "a_dfetapovrdgtx3": 142, "a_eyescanmod": [155, 156, 157], "a_eyescanmodegth_channel": 155, "a_eyescanmodegtp_channel": 156, "a_eyescanmodegtx_channel": 157, "a_eyescanreset": [155, 156, 157], "a_eyescanresetgth_channel": 155, "a_eyescanresetgtp_channel": 156, "a_eyescanresetgtx_channel": 157, "a_fwdclk1001": 111, "a_fwdclk2001": 111, "a_fwdclk3001": 111, "a_fwdclk4001": 111, "a_gtpreset_0": 66, "a_gtpreset_0gtp": 66, "a_gtpreset_1": 66, "a_gtpreset_1gtp": 66, "a_gtrefclkpd0": [155, 156, 157], "a_gtrefclkpd0gth_common": 155, "a_gtrefclkpd0gtp_common": 156, "a_gtrefclkpd0gtx_common": 157, "a_gtrefclkpd1": [155, 156, 157], "a_gtrefclkpd1gth_common": 155, "a_gtrefclkpd1gtp_common": 156, "a_gtrefclkpd1gtx_common": 157, "a_gtresetsel": [155, 156, 157], "a_gtresetselgth_channel": 155, "a_gtresetselgtp_channel": 156, "a_gtresetselgtx_channel": 157, "a_gtrxreset": [155, 156, 157], "a_gtrxresetgth_channel": 155, "a_gtrxresetgtp_channel": 156, "a_gtrxresetgtx_channel": 157, "a_gttxreset": [155, 156, 157], "a_gttxresetgth_channel": 155, "a_gttxresetgtp_channel": 156, "a_gttxresetgtx_channel": 157, "a_gtxrxreset": 142, "a_gtxrxresetgtx0": 142, "a_gtxrxresetgtx1": 142, "a_gtxrxresetgtx2": 142, "a_gtxrxresetgtx3": 142, "a_gtxtxreset": 142, "a_gtxtxresetgtx0": 142, "a_gtxtxresetgtx1": 142, "a_gtxtxresetgtx2": 142, "a_gtxtxresetgtx3": 142, "a_input": [122, 138, 153], "a_loopback": [142, 155, 156, 157], "a_loopback_0": 66, "a_loopback_1": 66, "a_pll0locken": 156, "a_pll0lockengtp_common": 156, "a_pll0pd": 156, "a_pll0pdgtp_common": 156, "a_pll0reset": 156, "a_pll0resetgtp_common": 156, "a_pll1locken": 156, "a_pll1lockengtp_common": 156, "a_pll1pd": 156, "a_pll1pdgtp_common": 156, "a_pll1reset": 156, "a_pll1resetgtp_common": 156, "a_pllclkrxreset": 142, "a_pllclkrxresetgtx0": 142, "a_pllclkrxresetgtx1": 142, "a_pllclkrxresetgtx2": 142, "a_pllclkrxresetgtx3": 142, "a_pllclktxreset": 142, "a_pllclktxresetgtx0": 142, "a_pllclktxresetgtx1": 142, "a_pllclktxresetgtx2": 142, "a_pllclktxresetgtx3": 142, "a_plllkdeten_0": 66, "a_plllkdeten_0gtp": 66, "a_plllkdeten_1": 66, "a_plllkdeten_1gtp": 66, "a_pllpowerdown_0": 66, "a_pllpowerdown_0gtp": 66, "a_pllpowerdown_1": 66, "a_pllpowerdown_1gtp": 66, "a_pllrxreset": 142, "a_pllrxresetgtx0": 142, "a_pllrxresetgtx1": 142, "a_pllrxresetgtx2": 142, "a_pllrxresetgtx3": 142, "a_plltxreset": 142, "a_plltxresetgtx0": 142, "a_plltxresetgtx1": 142, "a_plltxresetgtx2": 142, "a_plltxresetgtx3": 142, "a_pmarsvdin3": 156, "a_pmarsvdin3gtp_channel": 156, "a_pmarsvdin4": 156, "a_pmarsvdin4gtp_channel": 156, "a_prbscntreset": 142, "a_prbscntreset_0": 66, "a_prbscntreset_0gtp": 66, "a_prbscntreset_1": 66, "a_prbscntreset_1gtp": 66, "a_prbscntresetgtx0": 142, "a_prbscntresetgtx1": 142, "a_prbscntresetgtx2": 142, "a_prbscntresetgtx3": 142, "a_q": 87, "a_qplllocken": [155, 157], "a_qplllockength_common": 155, "a_qplllockengtx_common": 157, "a_qplloutreset": [155, 157], "a_qplloutresetgth_common": 155, "a_qplloutresetgtx_common": 157, "a_qpllpd": [155, 157], "a_qpllpdgth_common": 155, "a_qpllpdgtx_common": 157, "a_qpllreset": [155, 157], "a_qpllresetgth_common": 155, "a_qpllresetgtx_common": 157, "a_rxadaptseltest": [155, 156], "a_rxbufreset": [142, 155, 156, 157], "a_rxbufreset_0": 66, "a_rxbufreset_0gtp": 66, "a_rxbufreset_1": 66, "a_rxbufreset_1gtp": 66, "a_rxbufresetgth_channel": 155, "a_rxbufresetgtp_channel": 156, "a_rxbufresetgtx0": 142, "a_rxbufresetgtx1": 142, "a_rxbufresetgtx2": 142, "a_rxbufresetgtx3": 142, "a_rxbufresetgtx_channel": 157, "a_rxcdrfreqreset": [142, 155, 156, 157], "a_rxcdrfreqreset_0": 66, "a_rxcdrfreqreset_0gtp": 66, "a_rxcdrfreqreset_1": 66, "a_rxcdrfreqreset_1gtp": 66, "a_rxcdrfreqresetgth_channel": 155, "a_rxcdrfreqresetgtp_channel": 156, "a_rxcdrfreqresetgtx0": 142, "a_rxcdrfreqresetgtx1": 142, "a_rxcdrfreqresetgtx2": 142, "a_rxcdrfreqresetgtx3": 142, "a_rxcdrfreqresetgtx_channel": 157, "a_rxcdrhold": [142, 155, 156, 157], "a_rxcdrhold_0": 66, "a_rxcdrhold_0gtp": 66, "a_rxcdrhold_1": 66, "a_rxcdrhold_1gtp": 66, "a_rxcdrholdgth_channel": 155, "a_rxcdrholdgtp_channel": 156, "a_rxcdrholdgtx0": 142, "a_rxcdrholdgtx1": 142, "a_rxcdrholdgtx2": 142, "a_rxcdrholdgtx3": 142, "a_rxcdrholdgtx_channel": 157, "a_rxcdrovrden": [155, 156, 157], "a_rxcdrovrdength_channel": 155, "a_rxcdrovrdengtp_channel": 156, "a_rxcdrovrdengtx_channel": 157, "a_rxcdrphasereset": 142, "a_rxcdrphasereset_0": 66, "a_rxcdrphasereset_0gtp": 66, "a_rxcdrphasereset_1": 66, "a_rxcdrphasereset_1gtp": 66, "a_rxcdrphaseresetgtx0": 142, "a_rxcdrphaseresetgtx1": 142, "a_rxcdrphaseresetgtx2": 142, "a_rxcdrphaseresetgtx3": 142, "a_rxcdrreset": [142, 155, 156, 157], "a_rxcdrreset_0": 66, "a_rxcdrreset_0gtp": 66, "a_rxcdrreset_1": 66, "a_rxcdrreset_1gtp": 66, "a_rxcdrresetgth_channel": 155, "a_rxcdrresetgtp_channel": 156, "a_rxcdrresetgtx0": 142, "a_rxcdrresetgtx1": 142, "a_rxcdrresetgtx2": 142, "a_rxcdrresetgtx3": 142, "a_rxcdrresetgtx_channel": 157, "a_rxcdrresetrsv": [155, 156, 157], "a_rxcdrresetrsvgth_channel": 155, "a_rxcdrresetrsvgtp_channel": 156, "a_rxcdrresetrsvgtx_channel": 157, "a_rxdfeagchold": [155, 157], "a_rxdfeagcholdgth_channel": 155, "a_rxdfeagcholdgtx_channel": 157, "a_rxdfeagcovrden": [155, 157], "a_rxdfeagcovrdength_channel": 155, "a_rxdfeagcovrdengtx_channel": 157, "a_rxdfeagctrl": 155, "a_rxdfecm1en": [155, 157], "a_rxdfecm1ength_channel": 155, "a_rxdfecm1engtx_channel": 157, "a_rxdfelfhold": [155, 157], "a_rxdfelfholdgth_channel": 155, "a_rxdfelfholdgtx_channel": 157, "a_rxdfelfovrden": [155, 157], "a_rxdfelfovrdength_channel": 155, "a_rxdfelfovrdengtx_channel": 157, "a_rxdfelpmreset": [155, 157], "a_rxdfelpmresetgth_channel": 155, "a_rxdfelpmresetgtx_channel": 157, "a_rxdfereset": 142, "a_rxdferesetgtx0": 142, "a_rxdferesetgtx1": 142, "a_rxdferesetgtx2": 142, "a_rxdferesetgtx3": 142, "a_rxdfeslidetap": 155, "a_rxdfeslidetapadapten": 155, "a_rxdfeslidetapadaptength_channel": 155, "a_rxdfeslidetaphold": 155, "a_rxdfeslidetapholdgth_channel": 155, "a_rxdfeslidetapid": 155, "a_rxdfeslidetapinitovrden": 155, "a_rxdfeslidetapinitovrdength_channel": 155, "a_rxdfeslidetaponlyadapten": 155, "a_rxdfeslidetaponlyadaptength_channel": 155, "a_rxdfeslidetapovrden": 155, "a_rxdfeslidetapovrdength_channel": 155, "a_rxdfeslidetapstrob": 155, "a_rxdfeslidetapstrobegth_channel": 155, "a_rxdfetap2hold": [155, 157], "a_rxdfetap2holdgth_channel": 155, "a_rxdfetap2holdgtx_channel": 157, "a_rxdfetap2ovrden": [155, 157], "a_rxdfetap2ovrdength_channel": 155, "a_rxdfetap2ovrdengtx_channel": 157, "a_rxdfetap3hold": [155, 157], "a_rxdfetap3holdgth_channel": 155, "a_rxdfetap3holdgtx_channel": 157, "a_rxdfetap3ovrden": [155, 157], "a_rxdfetap3ovrdength_channel": 155, "a_rxdfetap3ovrdengtx_channel": 157, "a_rxdfetap4hold": [155, 157], "a_rxdfetap4holdgth_channel": 155, "a_rxdfetap4holdgtx_channel": 157, "a_rxdfetap4ovrden": [155, 157], "a_rxdfetap4ovrdength_channel": 155, "a_rxdfetap4ovrdengtx_channel": 157, "a_rxdfetap5hold": [155, 157], "a_rxdfetap5holdgth_channel": 155, "a_rxdfetap5holdgtx_channel": 157, "a_rxdfetap5ovrden": [155, 157], "a_rxdfetap5ovrdength_channel": 155, "a_rxdfetap5ovrdengtx_channel": 157, "a_rxdfetap6hold": 155, "a_rxdfetap6holdgth_channel": 155, "a_rxdfetap6ovrden": 155, "a_rxdfetap6ovrdength_channel": 155, "a_rxdfetap7hold": 155, "a_rxdfetap7holdgth_channel": 155, "a_rxdfetap7ovrden": 155, "a_rxdfetap7ovrdength_channel": 155, "a_rxdfeuthold": [155, 157], "a_rxdfeutholdgth_channel": 155, "a_rxdfeutholdgtx_channel": 157, "a_rxdfeutovrden": [155, 157], "a_rxdfeutovrdength_channel": 155, "a_rxdfeutovrdengtx_channel": 157, "a_rxdfevphold": [155, 157], "a_rxdfevpholdgth_channel": 155, "a_rxdfevpholdgtx_channel": 157, "a_rxdfevpovrden": [155, 157], "a_rxdfevpovrdength_channel": 155, "a_rxdfevpovrdengtx_channel": 157, "a_rxdfevsen": [155, 157], "a_rxdfevsength_channel": 155, "a_rxdfevsengtx_channel": 157, "a_rxdfexyden": [155, 156, 157], "a_rxdfexydength_channel": 155, "a_rxdfexydengtp_channel": 156, "a_rxdfexydengtx_channel": 157, "a_rxdfexydhold": 157, "a_rxdfexydholdgtx_channel": 157, "a_rxdfexydovrden": 157, "a_rxdfexydovrdengtx_channel": 157, "a_rxdlybypass": [155, 156, 157], "a_rxdlybypassgth_channel": 155, "a_rxdlybypassgtp_channel": 156, "a_rxdlybypassgtx_channel": 157, "a_rxdlyen": [155, 156, 157], "a_rxdlyength_channel": 155, "a_rxdlyengtp_channel": 156, "a_rxdlyengtx_channel": 157, "a_rxdlyovrden": [155, 156, 157], "a_rxdlyovrdength_channel": 155, "a_rxdlyovrdengtp_channel": 156, "a_rxdlyovrdengtx_channel": 157, "a_rxdlysreset": [155, 156, 157], "a_rxdlysresetgth_channel": 155, "a_rxdlysresetgtp_channel": 156, "a_rxdlysresetgtx_channel": 157, "a_rxenpmaphasealign": 142, "a_rxenpmaphasealign_0": 66, "a_rxenpmaphasealign_0gtp": 66, "a_rxenpmaphasealign_1": 66, "a_rxenpmaphasealign_1gtp": 66, "a_rxenpmaphasealigngtx0": 142, "a_rxenpmaphasealigngtx1": 142, "a_rxenpmaphasealigngtx2": 142, "a_rxenpmaphasealigngtx3": 142, "a_rxenprbstst": 142, "a_rxenprbstst_0": 66, "a_rxenprbstst_1": 66, "a_rxensamplealign": 142, "a_rxensamplealigngtx0": 142, "a_rxensamplealigngtx1": 142, "a_rxensamplealigngtx2": 142, "a_rxensamplealigngtx3": 142, "a_rxeqmix": 142, "a_rxeqmix_0": 66, "a_rxeqmix_1": 66, "a_rxlpmen": [155, 157], "a_rxlpmength_channel": 155, "a_rxlpmengtx_channel": 157, "a_rxlpmhfhold": [155, 156, 157], "a_rxlpmhfholdgth_channel": 155, "a_rxlpmhfholdgtp_channel": 156, "a_rxlpmhfholdgtx_channel": 157, "a_rxlpmhfovrden": [155, 156, 157], "a_rxlpmhfovrdength_channel": 155, "a_rxlpmhfovrdengtp_channel": 156, "a_rxlpmhfovrdengtx_channel": 157, "a_rxlpmlfhold": [155, 156, 157], "a_rxlpmlfholdgth_channel": 155, "a_rxlpmlfholdgtp_channel": 156, "a_rxlpmlfholdgtx_channel": 157, "a_rxlpmlfklovrden": [155, 157], "a_rxlpmlfklovrdength_channel": 155, "a_rxlpmlfklovrdengtx_channel": 157, "a_rxlpmlfovrden": 156, "a_rxlpmlfovrdengtp_channel": 156, "a_rxlpmosintntrlen": 156, "a_rxlpmosintntrlengtp_channel": 156, "a_rxlpmreset": 156, "a_rxlpmresetgtp_channel": 156, "a_rxmonitorsel": [155, 157], "a_rxoobreset": [155, 156, 157], "a_rxoobresetgth_channel": 155, "a_rxoobresetgtp_channel": 156, "a_rxoobresetgtx_channel": 157, "a_rxoscalreset": [155, 156], "a_rxoscalresetgth_channel": 155, "a_rxoscalresetgtp_channel": 156, "a_rxoshold": [155, 156, 157], "a_rxosholdgth_channel": 155, "a_rxosholdgtp_channel": 156, "a_rxosholdgtx_channel": 157, "a_rxosintcfg": [155, 156], "a_rxosinten": [155, 156], "a_rxosintength_channel": 155, "a_rxosintengtp_channel": 156, "a_rxosinthold": [155, 156], "a_rxosintholdgth_channel": 155, "a_rxosintholdgtp_channel": 156, "a_rxosintid0": [155, 156], "a_rxosintntrlen": [155, 156], "a_rxosintntrlength_channel": 155, "a_rxosintntrlengtp_channel": 156, "a_rxosintovrden": [155, 156], "a_rxosintovrdength_channel": 155, "a_rxosintovrdengtp_channel": 156, "a_rxosintstrob": [155, 156], "a_rxosintstrobegth_channel": 155, "a_rxosintstrobegtp_channel": 156, "a_rxosinttestovrden": [155, 156], "a_rxosinttestovrdength_channel": 155, "a_rxosinttestovrdengtp_channel": 156, "a_rxosovrden": [155, 156, 157], "a_rxosovrdength_channel": 155, "a_rxosovrdengtp_channel": 156, "a_rxosovrdengtx_channel": 157, "a_rxoutclksel": [155, 156, 157], "a_rxpcsreset": [155, 156, 157], "a_rxpcsresetgth_channel": 155, "a_rxpcsresetgtp_channel": 156, "a_rxpcsresetgtx_channel": 157, "a_rxpd": [155, 156, 157], "a_rxphalign": [155, 156, 157], "a_rxphalignen": [155, 156, 157], "a_rxphalignength_channel": 155, "a_rxphalignengtp_channel": 156, "a_rxphalignengtx_channel": 157, "a_rxphaligngth_channel": 155, "a_rxphaligngtp_channel": 156, "a_rxphaligngtx_channel": 157, "a_rxphdlypd": [155, 156, 157], "a_rxphdlypdgth_channel": 155, "a_rxphdlypdgtp_channel": 156, "a_rxphdlypdgtx_channel": 157, "a_rxphdlyreset": [155, 156, 157], "a_rxphdlyresetgth_channel": 155, "a_rxphdlyresetgtp_channel": 156, "a_rxphdlyresetgtx_channel": 157, "a_rxphovrden": [155, 156, 157], "a_rxphovrdength_channel": 155, "a_rxphovrdengtp_channel": 156, "a_rxphovrdengtx_channel": 157, "a_rxplllkdeten": 142, "a_rxplllkdetengtx0": 142, "a_rxplllkdetengtx1": 142, "a_rxplllkdetengtx2": 142, "a_rxplllkdetengtx3": 142, "a_rxpllpowerdown": 142, "a_rxpllpowerdowngtx0": 142, "a_rxpllpowerdowngtx1": 142, "a_rxpllpowerdowngtx2": 142, "a_rxpllpowerdowngtx3": 142, "a_rxpmareset": [155, 156, 157], "a_rxpmaresetgth_channel": 155, "a_rxpmaresetgtp_channel": 156, "a_rxpmaresetgtx_channel": 157, "a_rxpmasetphas": 142, "a_rxpmasetphase_0": 66, "a_rxpmasetphase_0gtp": 66, "a_rxpmasetphase_1": 66, "a_rxpmasetphase_1gtp": 66, "a_rxpmasetphasegtx0": 142, "a_rxpmasetphasegtx1": 142, "a_rxpmasetphasegtx2": 142, "a_rxpmasetphasegtx3": 142, "a_rxpolar": [142, 155, 156, 157], "a_rxpolarity_0": 66, "a_rxpolarity_0gtp": 66, "a_rxpolarity_1": 66, "a_rxpolarity_1gtp": 66, "a_rxpolaritygth_channel": 155, "a_rxpolaritygtp_channel": 156, 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"a_txdeemphgtx_channel": 157, "a_txdiffctrl": [142, 155, 156, 157], "a_txdiffctrl_0": 66, "a_txdiffctrl_1": 66, "a_txdlybypass": [155, 156, 157], "a_txdlybypassgth_channel": 155, "a_txdlybypassgtp_channel": 156, "a_txdlybypassgtx_channel": 157, "a_txdlyen": [155, 156, 157], "a_txdlyength_channel": 155, "a_txdlyengtp_channel": 156, "a_txdlyengtx_channel": 157, "a_txdlyovrden": [155, 156, 157], "a_txdlyovrdength_channel": 155, "a_txdlyovrdengtp_channel": 156, "a_txdlyovrdengtx_channel": 157, "a_txdlysreset": [155, 156, 157], "a_txdlysresetgth_channel": 155, "a_txdlysresetgtp_channel": 156, "a_txdlysresetgtx_channel": 157, "a_txelecidl": [142, 155, 156, 157], "a_txelecidle_0": 66, "a_txelecidle_0gtp": 66, "a_txelecidle_1": 66, "a_txelecidle_1gtp": 66, "a_txelecidlegth_channel": 155, "a_txelecidlegtp_channel": 156, "a_txelecidlegtx0": 142, "a_txelecidlegtx1": 142, "a_txelecidlegtx2": 142, "a_txelecidlegtx3": 142, "a_txelecidlegtx_channel": 157, "a_txenpmaphasealign": 142, "a_txenpmaphasealign_0": 66, "a_txenpmaphasealign_0gtp": 66, "a_txenpmaphasealign_1": 66, "a_txenpmaphasealign_1gtp": 66, "a_txenpmaphasealigngtx0": 142, "a_txenpmaphasealigngtx1": 142, "a_txenpmaphasealigngtx2": 142, "a_txenpmaphasealigngtx3": 142, "a_txenprbstst": 142, "a_txenprbstst_0": 66, "a_txenprbstst_1": 66, "a_txinhibit": [155, 156, 157], "a_txinhibitgth_channel": 155, "a_txinhibitgtp_channel": 156, "a_txinhibitgtx_channel": 157, "a_txmaincursor": [155, 156, 157], "a_txmargin": [142, 155, 156, 157], "a_txoutclksel": [155, 156, 157], "a_txpcsreset": [155, 156, 157], "a_txpcsresetgth_channel": 155, "a_txpcsresetgtp_channel": 156, "a_txpcsresetgtx_channel": 157, "a_txpd": [155, 156, 157], "a_txphalign": [155, 156, 157], "a_txphalignen": [155, 156, 157], "a_txphalignength_channel": 155, "a_txphalignengtp_channel": 156, "a_txphalignengtx_channel": 157, "a_txphaligngth_channel": 155, "a_txphaligngtp_channel": 156, "a_txphaligngtx_channel": 157, "a_txphdlypd": [155, 156, 157], "a_txphdlypdgth_channel": 155, "a_txphdlypdgtp_channel": 156, "a_txphdlypdgtx_channel": 157, "a_txphdlyreset": [155, 156, 157], "a_txphdlyresetgth_channel": 155, "a_txphdlyresetgtp_channel": 156, "a_txphdlyresetgtx_channel": 157, "a_txphinit": [155, 156, 157], "a_txphinitgth_channel": 155, "a_txphinitgtp_channel": 156, "a_txphinitgtx_channel": 157, "a_txphovrden": [155, 156, 157], "a_txphovrdength_channel": 155, "a_txphovrdengtp_channel": 156, "a_txphovrdengtx_channel": 157, "a_txpippmovrden": [155, 156], "a_txpippmovrdength_channel": 155, "a_txpippmovrdengtp_channel": 156, "a_txpippmpd": [155, 156], "a_txpippmpdgth_channel": 155, "a_txpippmpdgtp_channel": 156, "a_txpippmsel": [155, 156], "a_txpippmselgth_channel": 155, "a_txpippmselgtp_channel": 156, "a_txplllkdeten": 142, "a_txplllkdetengtx0": 142, "a_txplllkdetengtx1": 142, "a_txplllkdetengtx2": 142, "a_txplllkdetengtx3": 142, "a_txpllpowerdown": 142, "a_txpllpowerdowngtx0": 142, "a_txpllpowerdowngtx1": 142, "a_txpllpowerdowngtx2": 142, "a_txpllpowerdowngtx3": 142, "a_txpmareset": [155, 156, 157], "a_txpmaresetgth_channel": 155, "a_txpmaresetgtp_channel": 156, "a_txpmaresetgtx_channel": 157, "a_txpmasetphas": 142, "a_txpmasetphase_0": 66, "a_txpmasetphase_0gtp": 66, "a_txpmasetphase_1": 66, "a_txpmasetphase_1gtp": 66, "a_txpmasetphasegtx0": 142, "a_txpmasetphasegtx1": 142, "a_txpmasetphasegtx2": 142, "a_txpmasetphasegtx3": 142, "a_txpolar": [142, 155, 156, 157], "a_txpolarity_0": 66, "a_txpolarity_0gtp": 66, "a_txpolarity_1": 66, "a_txpolarity_1gtp": 66, "a_txpolaritygth_channel": 155, "a_txpolaritygtp_channel": 156, "a_txpolaritygtx0": 142, "a_txpolaritygtx1": 142, "a_txpolaritygtx2": 142, "a_txpolaritygtx3": 142, "a_txpolaritygtx_channel": 157, "a_txpostcursor": [155, 156, 157], "a_txpostcursorinv": [155, 156, 157], "a_txpostcursorinvgth_channel": 155, "a_txpostcursorinvgtp_channel": 156, "a_txpostcursorinvgtx_channel": 157, "a_txpostemphasi": 142, "a_txpowerdown": 142, "a_txpowerdown_0": 66, "a_txpowerdown_1": 66, "a_txprbsforceerr": [142, 155, 156, 157], "a_txprbsforceerr_0": 66, "a_txprbsforceerr_0gtp": 66, "a_txprbsforceerr_1": 66, "a_txprbsforceerr_1gtp": 66, "a_txprbsforceerrgth_channel": 155, "a_txprbsforceerrgtp_channel": 156, "a_txprbsforceerrgtx0": 142, "a_txprbsforceerrgtx1": 142, "a_txprbsforceerrgtx2": 142, "a_txprbsforceerrgtx3": 142, "a_txprbsforceerrgtx_channel": 157, "a_txprbssel": [155, 156, 157], "a_txprecursor": [155, 156, 157], "a_txprecursorinv": [155, 156, 157], "a_txprecursorinvgth_channel": 155, "a_txprecursorinvgtp_channel": 156, "a_txprecursorinvgtx_channel": 157, "a_txpreemphasi": 142, "a_txpreemphasis_0": 66, "a_txpreemphasis_1": 66, "a_txqpibiasen": 155, "a_txqpibiasength_channel": 155, "a_txreset": 142, "a_txreset_0": 66, "a_txreset_0gtp": 66, "a_txreset_1": 66, "a_txreset_1gtp": 66, "a_txresetgtx0": 142, "a_txresetgtx1": 142, "a_txresetgtx2": 142, "a_txresetgtx3": 142, "a_txsw": [142, 155, 156, 157], "a_txswinggth_channel": 155, "a_txswinggtp_channel": 156, "a_txswinggtx0": 142, "a_txswinggtx1": 142, "a_txswinggtx2": 142, "a_txswinggtx3": 142, "a_txswinggtx_channel": 157, "a_txsysclksel": [155, 156, 157], "aa1": [6, 7, 22, 23, 194, 195], "aa10": [6, 7, 194, 195], "aa11": [6, 7, 194, 195], "aa12": [6, 7, 194, 195], "aa13": [6, 7, 194, 195], "aa14": [6, 7, 194, 195], "aa15": [6, 7, 194, 195], "aa16": [6, 7, 194, 195], "aa17": [6, 7, 194, 195], "aa18": [6, 7, 194, 195], "aa19": [6, 7, 194, 195], "aa2": [6, 7, 22, 23, 194, 195], "aa20": [6, 7, 194, 195], "aa21": [6, 7, 194, 195], "aa22": [6, 7, 194, 195], "aa23": [22, 23], "aa24": [22, 23], "aa25": [22, 23], "aa26": [22, 23], "aa3": [6, 7, 22, 23, 194, 195], "aa4": [6, 7, 22, 23, 194, 195], "aa5": [6, 7, 194, 195], "aa6": [6, 7, 194, 195], "aa7": [6, 7, 194, 195], "aa8": [6, 7, 194, 195], "aa9": [6, 7, 194, 195], "ab": [87, 97, 102], "ab1": [6, 7, 22, 23, 194, 195], "ab10": [6, 7, 194, 195], "ab11": [6, 7, 194, 195], "ab12": [6, 7, 194, 195], "ab13": [6, 7, 194, 195], "ab14": [6, 7, 194, 195], "ab15": [6, 7, 194, 195], "ab16": [6, 7, 194, 195], "ab17": [6, 7, 194, 195], "ab18": [6, 7, 194, 195], "ab19": [6, 7, 194, 195], "ab2": [6, 7, 22, 23, 194, 195], "ab20": [6, 7, 194, 195], "ab21": [6, 7, 194, 195], "ab22": [6, 7, 194, 195], "ab23": [22, 23], "ab24": [22, 23], "ab25": [22, 23], "ab26": [22, 23], "ab3": [6, 7, 22, 23, 194, 195], "ab4": [6, 7, 22, 23, 194, 195], "ab5": [6, 7, 194, 195], "ab6": [6, 7, 194, 195], "ab7": [6, 7, 194, 195], "ab8": [6, 7, 194, 195], "ab9": [6, 7, 194, 195], "abort": 35, "about": 35, "abov": [35, 46, 55, 58, 87, 88, 93, 97, 110, 114, 124, 129, 140, 154, 160, 200], "abp": 87, "abs_freq_ref11": 108, "abs_freq_snapshot10": 108, "absolut": 189, "abuff": 40, "ac1": [22, 23], "ac10": [22, 23], "ac11": [22, 23], "ac12": [22, 23], "ac13": [22, 23], "ac14": [22, 23], "ac15": [22, 23], "ac16": [22, 23], "ac17": [22, 23], "ac18": [22, 23], "ac19": [22, 23], "ac2": [22, 23], "ac20": [22, 23], "ac21": [22, 23], "ac22": [22, 23], "ac23": [22, 23], "ac24": [22, 23], "ac25": [22, 23], "ac26": [22, 23], "ac3": [22, 23], "ac4": [22, 23], "ac5": [22, 23], "ac6": [22, 23], "ac7": [22, 23], "ac8": [22, 23], "ac9": [22, 23], "ac_cap_di": 142, "ac_cap_dis_0": [66, 125, 126], "ac_cap_dis_0gtp": 66, "ac_cap_dis_0gtp_du": 125, "ac_cap_dis_0gtx_du": 126, "ac_cap_dis_1": [66, 125, 126], "ac_cap_dis_1gtp": 66, "ac_cap_dis_1gtp_du": 125, "ac_cap_dis_1gtx_du": 126, "ac_cap_disgtx0": 142, "ac_cap_disgtx1": 142, "ac_cap_disgtx2": 142, "ac_cap_disgtx3": 142, "acb": [12, 34, 198], "accept": 97, "access": [35, 55, 56, 97, 98], "access_mod": 63, "accordingli": 36, "acd": 34, "acjtag_debug_mod": [155, 156], "acjtag_debug_modegth_channel": 155, "acjtag_debug_modegtp_channel": 156, "acjtag_mod": [155, 156], "acjtag_modegth_channel": 155, "acjtag_modegtp_channel": 156, "acjtag_reset": [155, 156], "acjtag_resetgth_channel": 155, "acjtag_resetgtp_channel": 156, "acquir": 198, "across": [12, 34, 36, 45, 46, 53, 58, 65, 87, 88, 93, 97, 102, 110, 124, 140, 154, 160, 189, 198, 200], "activ": [35, 36, 46, 88, 199], "activelanesin": 130, "actual": [15, 16, 35, 55, 58, 87, 97, 110, 124, 140, 154, 200], "acy0": [60, 118, 134, 149], "acy0slice0": [118, 134, 149], "acy0slice1": [60, 134], "ad": [55, 56, 58, 87, 97, 98], "ad1": [22, 23], "ad10": [22, 23], "ad11": [22, 23], "ad12": [22, 23], "ad13": [22, 23], "ad14": [22, 23], "ad15": [22, 23], "ad16": [22, 23], "ad17": [22, 23], "ad18": [22, 23], "ad19": [22, 23], "ad2": [22, 23], "ad20": [22, 23], "ad21": [22, 23], "ad22": [22, 23], "ad23": [22, 23], "ad24": [22, 23], "ad25": [22, 23], "ad26": [22, 23], "ad3": [22, 23], "ad4": [22, 23], "ad5": [22, 23], "ad6": [22, 23], "ad7": [22, 23], "ad8": [22, 23], "ad9": [22, 23], "adapt_cfg0": [155, 156], "adc10": 115, "add": 98, "add01": [73, 163, 168, 173, 178], "add_dly1": 160, "addit": [12, 14, 34, 36, 58, 87, 102, 110, 124, 140, 154, 200], "addition": [34, 35, 36, 46, 55, 88, 93, 97, 98, 110, 124, 140], "addr": [15, 16, 87, 102], "addr0": 78, "addr000000001": 78, "addr00000001": 78, "addr000001": 78, "addr000010000": 78, "addr0int": 78, "addr1": 78, "addr10": 78, "addr100000010": 78, "addr10000010": 78, "addr100010": 78, "addr1000100": 78, "addr100100000": 78, "addr10int": 78, "addr11": 78, "addr1101000": 78, "addr11int": 78, "addr12": 78, "addr1200001": 78, "addr1210001": 78, "addr12int": 78, "addr13": 78, "addr1300010": 78, "addr1310010": 78, "addr13int": 78, "addr14": 78, "addr1400100": 78, "addr1410100": 78, "addr14int": 78, "addr15": 78, "addr1501000": 78, "addr1511000": 78, "addr15int": 78, "addr16": 78, "addr1610001": 78, "addr16int": 78, "addr17": 78, "addr1710010": 78, "addr17int": 78, "addr18": 78, "addr1810100": 78, "addr18int": 78, "addr19": 78, "addr1911000": 78, "addr19int": 78, "addr1int": 78, "addr2": 78, "addr20": 78, "addr200000001": 78, "addr2000001": 78, "addr200000100": 78, "addr20000100": 78, "addr200100": 78, "addr20int": 78, "addr21": 78, "addr2100010": 78, "addr21int": 78, "addr22": 78, "addr2200100": 78, "addr22int": 78, "addr23": 78, "addr2301000": 78, "addr23int": 78, "addr24": 78, "addr240000001": 78, "addr2410001": 78, "addr24int": 78, "addr25": 78, "addr250000010": 78, "addr2510010": 78, "addr25int": 78, "addr26": 78, "addr260000100": 78, "addr2610100": 78, "addr26int": 78, "addr27": 78, "addr270001000": 78, "addr2711000": 78, "addr27int": 78, "addr28": 78, "addr2800000100": 78, "addr2800010000": 78, "addr280010000": 78, "addr28int": 78, "addr29": 78, "addr2900001000": 78, "addr2900100000": 78, "addr290100001": 78, "addr29int": 78, "addr2int": 78, "addr3": 78, "addr30": 78, "addr300000010": 78, "addr300001000": 78, "addr30001000": 78, "addr3001000001": 78, "addr300100010": 78, "addr3001010000": 78, "addr301000": 78, "addr30int": 78, "addr31": 78, "addr3101000010": 78, "addr310100100": 78, "addr3101100000": 78, "addr31int": 78, "addr3int": 78, "addr4": 78, "addr410001": 78, "addr4int": 78, "addr5": 78, "addr510010": 78, "addr5int": 78, "addr6": 78, "addr610100": 78, "addr6int": 78, "addr7": 78, "addr711000": 78, "addr7int": 78, "addr8": 78, "addr800001": 78, "addr8int": 78, "addr9": 78, "addr900010": 78, "addr9int": 78, "addr_cascade_out_a": 147, "addr_cascade_out_abram": 147, "addr_cascade_out_b": 147, "addr_cascade_out_bbram": 147, "addra0": 78, "addra1": 78, "addra10": 78, "addra11": 78, "addra2": 78, "addra3": 78, "addra4": 78, "addra5": 78, "addra6": 78, "addra7": 78, "addra8": 78, "addra9": 78, "addral0": 147, "addral1": 147, "addral10": 147, "addral11": 147, "addral12": 147, "addral13": 147, "addral14": 147, "addral2": 147, "addral3": 147, "addral4": 147, "addral5": 147, "addral6": 147, "addral7": 147, "addral8": 147, "addral9": 147, "addrau0": 147, "addrau1": 147, "addrau10": 147, "addrau11": 147, "addrau12": 147, "addrau13": 147, "addrau14": 147, "addrau2": 147, "addrau3": 147, "addrau4": 147, "addrau5": 147, "addrau6": 147, "addrau7": 147, "addrau8": 147, "addrau9": 147, "addrb0": 78, "addrb1": 78, "addrb10": 78, "addrb11": 78, "addrb2": 78, "addrb3": 78, "addrb4": 78, "addrb5": 78, "addrb6": 78, "addrb7": 78, "addrb8": 78, "addrb9": 78, "addrbl0": 147, "addrbl1": 147, "addrbl10": 147, "addrbl11": 147, "addrbl12": 147, "addrbl13": 147, "addrbl14": 147, "addrbl2": 147, "addrbl3": 147, "addrbl4": 147, "addrbl5": 147, "addrbl6": 147, "addrbl7": 147, "addrbl8": 147, "addrbl9": 147, "addrbu0": 147, "addrbu1": 147, "addrbu10": 147, "addrbu11": 147, "addrbu12": 147, "addrbu13": 147, "addrbu14": 147, "addrbu2": 147, "addrbu3": 147, "addrbu4": 147, "addrbu5": 147, "addrbu6": 147, "addrbu7": 147, "addrbu8": 147, "addrbu9": 147, "address": [15, 16, 35, 46, 87, 88, 97, 102], "address_lin": [74, 169, 174, 179], "addsub10": [73, 163, 168, 173, 178], "adi1mux": [60, 118, 134, 149], "adi1muxslice0": [60, 118, 134], "adjac": [55, 97, 102, 154, 160], "adreg": [138, 153], "adregdsp0": 138, "adregdsp1": 138, "adv_b": 160, "advanc": 14, "ae1": [22, 23], "ae10": [22, 23], "ae11": [22, 23], "ae12": [22, 23], "ae13": [22, 23], "ae14": [22, 23], "ae15": [22, 23], "ae16": [22, 23], "ae17": [22, 23], "ae18": [22, 23], "ae19": [22, 23], "ae2": [22, 23], "ae20": [22, 23], "ae21": [22, 23], "ae22": [22, 23], "ae23": [22, 23], "ae24": [22, 23], "ae25": [22, 23], "ae26": [22, 23], "ae3": [22, 23], "ae4": [22, 23], "ae5": [22, 23], "ae6": [22, 23], "ae7": [22, 23], "ae8": [22, 23], "ae9": [22, 23], "aen_bgb": [155, 156, 157], "aen_bgbsgth_common": 155, "aen_bgbsgtp_common": 156, "aen_bgbsgtx_common": 157, "aen_cpll": [155, 157], "aen_cpllgth_channel": 155, "aen_cpllgtx_channel": 157, "aen_loopback": [155, 156, 157], "aen_loopbackgth_channel": 155, "aen_loopbackgtp_channel": 156, "aen_loopbackgtx_channel": 157, "aen_mast": [155, 156, 157], "aen_mastergth_channel": 155, "aen_mastergth_common": 155, "aen_mastergtp_channel": 156, "aen_mastergtp_common": 156, "aen_mastergtx_channel": 157, "aen_mastergtx_common": 157, "aen_pd": [155, 156, 157], "aen_pd_and_eidl": [155, 156, 157], "aen_pd_and_eidlegth_channel": 155, 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"clkout_westgtp": 66, "clkoutdcm0000": 120, "clkoutdcm1100": 120, "clkoutdcm2001": 120, "clkoutdcm3101": 120, "clkoutdcm4010": 120, "clkoutdcm5110": 120, "clkpad": [55, 93], "clkpad00000000000": 80, "clkpad000000000000": 80, "clkpad000000000001": 80, "clkpad000000000001000": 83, "clkpad00000000001": 80, "clkpad0000000001000": 83, "clkpad0000011": 80, "clkpad0000100000100": 97, "clkpad0001000000010000": 55, "clkpad00100010": 80, "clkpad01100100": 80, "clkpad10000000000": 80, "clkpad100000000000": 80, "clkpad100000000001": 80, "clkpad10000000001": 80, "clkpad100000000010000": 83, "clkpad1000000010000": 83, "clkpad10000100": 80, "clkpad1000100001000": 97, "clkpad1001000000100000": 55, "clkpad1100101": 80, "clkpad2001000000100": 97, "clkpad2001000001000000": 55, "clkpad3001000001000": 97, "clkpad3001000010000000": 55, "clkpad4010000000100": 97, "clkpad5010000001000": 97, "clkpad6100000000100": 97, "clkpad7100000001000": 97, "clkperf": 145, "clkperfiodelay0": 145, "clkperfologic1": 145, "clkpin000": 61, "clkpin0000": 61, "clkpin01": 61, "clkpin1001": 61, "clkpin4100": 61, "clkpin5101": 61, "clkpn011": [125, 126], "clkpn1": [125, 126], "clkr": [58, 84, 185], "clkrcv_trst": [126, 142, 155, 156, 157], "clkrcv_trst_0": 66, "clkrcv_trst_0gtp": 66, "clkrcv_trst_1": 66, "clkrcv_trst_1gtp": 66, "clkrcv_trstgth_common": 155, "clkrcv_trstgtp_common": 156, "clkrcv_trstgtx1": 142, "clkrcv_trstgtx_common": 157, "clkrcv_trstgtx_dual": 126, "clkrsvd0": [155, 156], "clkrsvd0gth_channel": 155, "clkrsvd0gtp_channel": 156, "clkrsvd1": [155, 156], "clkslice0": 118, "clkslice1": [60, 134], "clkswing_cfg": [155, 156, 157], "clkt": [58, 84, 93, 185], "clkt_2dll": 84, "clkt_4dll": 84, "clktestsig": [155, 156, 157], "clktestsig0111": 142, "clktestsig1": 141, "clktestsig11": [142, 155, 156, 157], "clktestsig1111": 142, "clktestsig_sel": 141, "clktestsig_selgth": 141, "clktestsiggth_common": 155, "clktestsiggtp_common": 156, "clktestsiggtx_common": 157, "clkv": [84, 185], "clkv_bram": 78, "clkv_bram_bot": 84, "clkv_bram_top": 84, "clock": [11, 12, 34, 35, 36, 41, 44, 46, 54, 55, 56, 67, 84, 87, 88, 96, 98, 102, 110, 112, 114, 124, 127, 129, 140, 143, 145, 154, 158, 160, 189, 198, 200], "clock_delai": 131, "clock_hold": 136, "clock_holdmmcm0": 136, "clock_holdmmcm1": 136, "clock_invert_m": 122, "clock_invert_p": 122, "clock_invert_pdsp1": 122, "clockwis": [58, 93], "close": [58, 87, 140, 154], "closest": 58, "clr0": 183, "clrmux": 183, "clrmuxlc0": 183, "clrmuxlc1": 183, "clrmuxlc2": 183, "clrmuxlc3": 183, "cm_trim": 142, "cm_trim_0": [66, 126], "cm_trim_1": [66, 126], "cmd_intx_impl": [146, 161], "cmd_intx_implementedpci": [146, 161], "cmd_offset": 151, "cmo": 14, "cmos0": [74, 164, 169, 174, 179, 184], "cmos00": [80, 85], "cmos0011": 160, "cmos00111": 145, "cmos01": 80, "cmos011": 160, "cmos111": [57, 99, 114, 129], "cmos1200011": 145, "cmos_hv000111": 160, "cmos_hv00111": 160, "cmos_hv111": 57, "cmos_lv000110": 160, "cmos_lv001": 57, "cmos_lv00110": 160, "cmos_vccaux111": [57, 69], "cmos_vccint011": [57, 69], "cmos_vcco100": [57, 69], "cmt": [64, 72, 124, 127, 129, 140, 143, 154, 158], "cmt0": 61, "cmt10": 61, "cmt_bot": 151, "cmt_bufg_": 140, "cmt_bufg_bot": [140, 143], "cmt_bufg_top": [140, 143], "cmt_clk010000000001000": 119, "cmt_clk100000010001000": 119, "cmt_clk1000001000010000": 119, "cmt_clk1100100000010000": 119, "cmt_clk1200000001010000": 119, "cmt_clk1300000100010000": 119, "cmt_clk1400010000010000": 119, "cmt_clk1501000000010000": 119, "cmt_clk1610000000100000": 119, "cmt_clk1700000010100000": 119, "cmt_clk1800001000100000": 119, "cmt_clk1900100000100000": 119, "cmt_clk2000000001100000": 119, "cmt_clk200001000001000": 119, "cmt_clk2100000100100000": 119, "cmt_clk2200010000100000": 119, "cmt_clk2301000000100000": 119, "cmt_clk2410000000000010": 119, "cmt_clk2500000010000010": 119, "cmt_clk2600001000000010": 119, "cmt_clk2700100000000010": 119, "cmt_clk300100000001000": 119, "cmt_clk400000001001000": 119, "cmt_clk500000100001000": 119, "cmt_clk600010000001000": 119, "cmt_clk701000000001000": 119, "cmt_clk810000000010000": 119, "cmt_clk900000010010000": 119, "cmt_d00100": 61, "cmt_d100100": 61, "cmt_d10100": 61, "cmt_d110100": 61, "cmt_d120100": 61, "cmt_d130100": 61, "cmt_d140100": 61, "cmt_d150100": 61, "cmt_d20100": 61, "cmt_d30100": 61, "cmt_d40100": 61, "cmt_d50100": 61, "cmt_d60100": 61, "cmt_d70100": 61, "cmt_d80100": 61, "cmt_d90100": 61, "cmt_dcm": 64, "cmt_enabl": 61, "cmt_fifo": 158, "cmt_pll": 72, "cmt_top": 151, "cmt_u01000": 61, "cmt_u101000": 61, "cmt_u11000": 61, "cmt_u111000": 61, "cmt_u121000": 61, "cmt_u131000": 61, "cmt_u141000": 61, "cmt_u151000": 61, "cmt_u21000": 61, "cmt_u31000": 61, "cmt_u41000": 61, "cmt_u51000": 61, "cmt_u61000": 61, "cmt_u71000": 61, "cmt_u81000": 61, "cmt_u91000": 61, "cmux": 184, "cmuxosc": 184, "cnr": [58, 75, 84, 93, 165, 170, 175, 180, 185], "co01": 183, "co1": 183, "co_dur": 151, "coarse_bypass": 151, "coarse_delai": 151, "code": 35, "coin_window": [51, 92], "col": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "col_hi": [15, 16], "col_lo": [15, 16], "coloc": [58, 87, 110, 124, 140, 154], "column": [2, 3, 4, 5, 6, 7, 8, 9, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 35, 46, 47, 55, 84, 87, 88, 89, 93, 97, 114, 129, 145, 160, 188, 189, 190, 191, 192, 193, 194, 195, 197, 199], "columnar": 110, "com": [51, 92], "com_burst_v": 142, "com_burst_val_0": [66, 125, 126], "com_burst_val_1": [66, 125, 126], "comb": 36, "comb0": 15, "comb1": 16, "combin": [36, 46, 55, 87, 88, 97, 110, 200], "combination": 87, "combinatori": [14, 36, 200], "come": [12, 34, 36, 46, 58, 87, 93, 110, 114, 124, 129, 140, 154, 198, 200], "comma32": 111, "comma32gt11a": 111, "comma32gt11b": 111, "comma_10b_en": 142, "comma_10b_enable_0": [66, 125, 126], "comma_10b_enable_1": [66, 125, 126], "comma_10b_mask": [94, 95, 111], "comma_doubl": 142, "comma_double_0": [125, 126], "comma_double_0gtp_du": 125, "comma_double_0gtx_du": 126, "comma_double_1": [125, 126], "comma_double_1gtp_du": 125, "comma_double_1gtx_du": 126, "comma_doublegtx0": 142, "comma_doublegtx1": 142, "comma_doublegtx2": 142, "comma_doublegtx3": 142, "commerci": [17, 189], "common": [106, 160], "common_amux_sel": [155, 156, 157], "common_cfg": [155, 156, 157], "common_hclk_giob": 106, "common_instanti": [155, 156, 157], "common_instantiatedgth_common": 155, "common_instantiatedgtp_common": 156, "common_instantiatedgtx_common": 157, "common_mgt": 106, "common_mgtioclk": 106, "commonhr_iostd": 160, "commonli": [154, 188], "companion": [44, 112], "compat": [12, 34, 198], "compens": 88, "complement": [114, 129, 145, 160], "complet": [12, 13, 16, 34, 35, 36, 110, 154, 188, 198], "complex": [15, 16, 154], "comput": [87, 188], "concaten": [15, 16, 87, 102], "conceptu": 58, "concur": [51, 52, 64, 92, 108, 120], "concur00100101": 108, "concur1001": [64, 120], "concurdcm": [51, 92, 108], "concurdcm0": 120, "concurdcm1": 120, "config": [15, 16, 74, 174, 179, 188], "config01": 120, "config10": 108, "config_fallback": [121, 137, 152], "config_r": [39, 48, 49, 74, 81, 90, 107, 121, 137, 152, 164, 169, 174, 179, 184], "configrout": 130, "configur": [11, 12, 15, 33, 34, 35, 41, 44, 47, 54, 55, 56, 67, 75, 84, 93, 96, 97, 98, 110, 112, 114, 124, 127, 129, 140, 143, 145, 158, 160, 165, 170, 175, 180, 185, 188, 197], "configuraton": [15, 16], "conjunct": 36, "connect": [35, 36, 46, 58, 87, 88, 97, 98, 102, 114, 129, 145, 154, 199, 200], "consecut": 140, "consid": [35, 110, 114, 124, 129, 140, 145, 154, 160], "consist": [35, 36, 87, 110, 124, 129, 140, 145, 154], "const": [13, 14, 35, 36, 46, 88, 199, 200], "const_010": [73, 168, 173, 178], "const_011": [73, 163, 168, 173, 178], "const_11": 163, "const_110": [73, 163, 168, 173, 178], "const_111": [73, 168, 173, 178], "const_op2_enable11": [73, 163, 168, 173, 178], "constant": [36, 46, 88, 114], "constraint": 12, "construct": 200, "consult": 15, "contain": [15, 17, 34, 42, 45, 46, 55, 56, 58, 87, 88, 93, 97, 98, 102, 110, 114, 124, 129, 140, 145, 154, 160, 199, 200], "content": [35, 46, 88, 140], "contigu": [15, 16], "continu": [35, 160], "control": [12, 14, 35, 36, 44, 46, 56, 67, 88, 98, 102, 114], "control_0": [136, 151], "control_1": [136, 151], "control_2": [136, 151], "control_3": [136, 151], "control_4": [136, 151], "control_5": [136, 151], "control_6": 151, "control_7": 151, "convert": [15, 16], "convst": 115, "convstclk": [117, 133, 148], "convstsysmon": 115, "coolrunn": [0, 12, 14], "coordin": [16, 17, 36, 58, 93, 188, 189, 200], "cor": [41, 54, 84, 96, 112, 127, 143, 158], "cor1": [54, 67, 127, 143, 158], "cor2": [54, 67], "core": [12, 34, 36, 44, 55, 93, 96, 97, 98, 110, 124, 127, 143, 158, 198, 200], "corner": [41, 44, 54, 55, 56, 58, 67, 75, 84, 93, 96, 97, 98, 154, 165, 170, 175, 180, 185], "correct": 102, "correspond": [12, 14, 15, 16, 17, 34, 35, 36, 46, 47, 53, 55, 58, 65, 87, 88, 89, 93, 97, 102, 110, 114, 124, 129, 140, 145, 154, 160, 189, 200], "could": 35, "count": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 46, 58, 87, 93, 110, 124, 140, 154, 190, 191, 192, 193, 194, 195], "counter_wraparound": 69, "counter_wraparoundiodelay0": 69, "counter_wraparoundiodelay1": 69, "cout": [46, 74, 76, 88, 169, 171, 174, 176, 179, 181, 186], "cout0010111110": [73, 76, 163, 166], "cout00101111111111110": [168, 171, 173, 176, 178, 181], "cout_b0": 163, "cout_t1": 163, "coutmux": [60, 118, 134, 149], "coutmuxslice1": 60, "cover": [110, 124, 140, 154, 160, 200], "cp": [136, 151], "cp132": [2, 3, 12], "cp56": [4, 5, 8, 9, 12, 191, 198], "cp_bias_trip_set": [136, 151], "cp_bias_trip_setmmcm": 151, "cp_bias_trip_setmmcm0": 136, "cp_bias_trip_setmmcm1": 136, "cp_bias_trip_setpl": 151, "cp_re": [136, 151], "cpl_timeout_disable_support": [146, 161], "cpl_timeout_disable_supportedpci": [146, 161], "cpl_timeout_ranges_support": [146, 161], "cpld": [0, 12, 34, 36, 198, 200], "cpll0": [155, 157], "cpll_cfg": [155, 157], "cpll_fbdiv": [155, 157], "cpll_fbdiv_45": [155, 157], "cpll_fbdiv_45gth_channel": 155, "cpll_fbdiv_45gtx_channel": 157, "cpll_init_cfg": [155, 157], "cpll_lock_cfg": [155, 157], "cpll_pcd_1ui_cfg": 157, "cpll_pcd_1ui_cfggtx_channel": 157, "cpll_pcd_2ui_cfg": [155, 157], "cpll_pcd_2ui_cfggth_channel": 155, "cpll_pcd_2ui_cfggtx_channel": 157, "cpll_refclk_div": [155, 157], "cplllockdetclk": [155, 157], "cpllrefclksel_mod": [155, 157], "cpllrefclksel_modegth_channel": 155, "cpllrefclksel_modegtx_channel": 157, "cpllrefclksel_stat": [155, 157], "cpmc440clk": 131, "cpmc440timerclock": 131, "cpmdcrclk": 131, "cpmdma0llclk": 131, "cpmdma1llclk": 131, "cpmdma2llclk": 131, "cpmdma3llclk": 131, "cpmfcmclk": 131, "cpminterconnectclk": 131, "cpmmcclk": 131, "cpmmcm": [136, 151], "cpmppcmplbclk": 131, "cpmppcs0plbclk": 131, "cpmppcs1plbclk": 131, "cppll": 151, "crammod": [60, 118, 134, 149], "crc": [39, 48, 49, 62, 74, 90, 107, 121, 164, 169, 174, 179, 184], "crc32_0": [125, 126], "crc32_1": [125, 126], "crc32_2": [125, 126], "crc32_3": [125, 126], "crc_end_of_pkt": [94, 95], "crc_format": [94, 95], "crc_init": [125, 126], "crc_start_of_pkt": [94, 95], "crcclk": [125, 126], "crcclkgtp_dual": 125, "crcclkgtx_dual": 126, "creat": [55, 93, 97, 110, 124], "create_edg": [104, 117, 135, 150], "create_edgebufgctrl0": 104, "create_edgebufgctrl1": 104, "create_edgebufgctrl10": 104, "create_edgebufgctrl11": 104, "create_edgebufgctrl12": 104, "create_edgebufgctrl13": 104, "create_edgebufgctrl14": 104, "create_edgebufgctrl15": 104, "create_edgebufgctrl16": 104, "create_edgebufgctrl17": 104, "create_edgebufgctrl18": 104, "create_edgebufgctrl19": 104, "create_edgebufgctrl2": 104, "create_edgebufgctrl20": 104, "create_edgebufgctrl21": 104, "create_edgebufgctrl22": 104, "create_edgebufgctrl23": 104, "create_edgebufgctrl24": 104, "create_edgebufgctrl25": 104, "create_edgebufgctrl26": 104, "create_edgebufgctrl27": 104, "create_edgebufgctrl28": 104, "create_edgebufgctrl29": 104, "create_edgebufgctrl3": 104, "create_edgebufgctrl30": 104, "create_edgebufgctrl31": 104, "create_edgebufgctrl4": 104, "create_edgebufgctrl5": 104, "create_edgebufgctrl6": 104, "create_edgebufgctrl7": 104, "create_edgebufgctrl8": 104, "create_edgebufgctrl9": 104, "creg": [53, 65, 109, 122, 138, 153], "cregdsp": [53, 65], "cregdsp0": [122, 138], "cregdsp1": 138, "crm_core_clk_freq_500": 162, "crm_core_clk_freq_500pcie3": 162, "crm_module_rst": [146, 161], "crm_user_clk_freq": 162, "crmcoreclk": 130, "crmcoreclkdlo": 130, "crmcoreclkpci": 130, "crmcoreclkrxo": 130, "crmcoreclkrxopci": 130, "crmcoreclktxo": 130, "crmcoreclktxopci": 130, "crmuserclk": 130, "crmuserclkrxo": 130, "crmuserclktxo": 130, "cross": [58, 97, 140, 154], "cs144": [20, 21, 34, 192, 198], "cs280": [24, 25, 34, 193, 198], "cs48": [26, 27, 28, 30, 31, 34, 190, 191, 198], "cs_b": [114, 129], "csi_b": [145, 160], "cso2pin": [50, 63], "cso_b": [129, 145, 160], "cspin": [104, 117, 133], "ct": 14, "ct4111": [2, 3, 4, 5, 6, 7, 8, 9], "ct501": [2, 3, 4, 5, 6, 7, 8, 9], "ct601": [2, 3, 4, 5, 6, 7, 8, 9], "ct70001": [2, 3, 4, 5, 6, 7, 8, 9], "ctc": 14, "cte": 14, "ctl": [41, 54, 67, 84, 96, 112, 127, 143, 158], "ctl1": [143, 158], "ctl_mode": 151, "ctl_modephaser_in0": 151, "ctl_modephaser_in1": 151, "ctl_modephaser_in2": 151, "ctl_modephaser_in3": 151, "ctlgo": [51, 52, 64, 92, 108], "ctlgo001": 55, "ctlgodcm": 92, "ctlmode": [51, 52, 64, 92], "ctlmode011": 55, "ctlmodedcm": 92, "ctlosc1": [51, 52, 64, 92, 108], "ctlosc1001": 55, "ctlosc1dcm": [92, 108], "ctlosc2": [51, 52, 64, 92, 108], "ctlosc2001": 55, "ctlosc2dcm": [92, 108], "ctlsel0": [51, 52, 64, 92, 108], "ctlsel0011": 55, "ctlsel0dcm": 92, "ctlsel1": [51, 52, 64, 92, 108], "ctlsel1101": 55, "ctlsel1dcm": [92, 108], "ctlsel2": [51, 52, 64, 92, 108], "ctlsel2100": 55, "ctlsel2dcm": [92, 108], "ctr": 14, "ctrl0": [128, 144, 159], "ctrl00001": [144, 159], "ctrl1": [128, 144, 159], "ctrl10010": [144, 159], "ctrl2": 128, "ctrl3": 128, "ctt": 85, "ctt001100010": 85, "ctt01011": 85, "ctt0111": 85, "curious": [12, 34], "current": [35, 46, 88], "cut": [56, 58, 124, 154], "cv100": [2, 12], "cv64": [5, 9, 12], "cx0": [60, 118, 134, 149], "cx0100": [118, 134, 149], "cx1": [60, 118], "cx10": [134, 149], "cx1010": 60, "cxt": 140, "cy0": 79, "cy0111": 60, "cy0f": [37, 46, 88, 105], "cy0g": [37, 46, 88, 105], "cy1010": [60, 118, 134, 149], "cy110": 118, "cycl": [35, 87, 102], "cycle_limit_sel": 111, "cyinit": [37, 46, 60, 79, 88, 105, 118, 134, 149], "cyinitslice0": [79, 105, 118, 134, 149], "cyinitslice1": [37, 46, 60, 79, 118, 134, 149], "cyinitslice2": 105, "cyinitslice3": [37, 46], "cyself": [37, 46, 79, 88], "cyselfslice0": 79, "cyselfslice1": [37, 46, 79], "cyselfslice3": [37, 46], "cyselg": [37, 46, 79, 88], "cyselgslice0": [79, 88], "cyselgslice1": [37, 46, 79, 88], "cyselgslice3": [37, 46], "d": [14, 36, 69, 87, 102, 114, 129, 145, 151, 160, 200], "d0": [138, 153], "d01": 114, "d1": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195, 200], "d10": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 138, 153, 191, 192, 193, 194, 195], "d100001": [129, 145, 160], "d1001": 114, "d11": [3, 6, 7, 20, 21, 22, 23, 24, 25, 69, 138, 153, 192, 193, 194, 195], "d12": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 138, 153, 192, 193, 194, 195], "d13": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 138, 153, 192, 193, 194, 195], "d14": [2, 3, 6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d15": [3, 6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d16": [3, 6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d17": [6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d18": [6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d19": [6, 7, 22, 23, 24, 25, 138, 153, 193, 194, 195], "d1olog": 160, "d1ologic0": 145, "d1ologic1": [145, 160], "d2": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d20": [6, 7, 22, 23, 24, 138, 153, 194, 195], "d21": [6, 7, 22, 23, 138, 153, 194, 195], "d22": [6, 7, 22, 23, 138, 153, 194, 195], "d23": [22, 23, 138, 153], "d24": [22, 23, 138, 153], "d25": [22, 23], "d26": [22, 23], "d2ologic0": [114, 145], "d2ologic1": 114, "d3": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d3iob0": [114, 129], "d3iob1": [114, 129], "d3ologic0": 145, "d3ologic1": 145, "d4": [2, 3, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d4iob0": 114, "d4iob1": 114, "d4olog": 160, "d4ologic0": [129, 145, 160], "d4ologic1": [129, 160], "d5": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 114, 129, 138, 145, 153, 160, 192, 193, 194, 195], "d5ffinit": [134, 149], "d5ffinitslice0": [134, 149], "d5ffmux": [134, 149], "d5ffsr": [134, 149], "d5ffsrinit": 60, "d5ffsrinitslice0": 60, "d5ffsrslice1": 134, "d5ilogic1": 145, "d5olog": 160, "d5ologic0": [114, 129, 160], "d5ologic1": [114, 129], "d5q0": 60, "d5q0100": [60, 134, 149], "d6": [2, 3, 5, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 114, 129, 138, 145, 153, 160, 190, 191, 192, 193, 194, 195], "d6iob0": 129, "d6iob1": 129, "d6lut": [60, 118, 134, 149], "d6ologic1": 145, "d7": [2, 3, 6, 7, 9, 20, 21, 22, 23, 24, 25, 26, 27, 28, 30, 31, 138, 153, 160, 190, 191, 192, 193, 194, 195], "d7olog": 160, "d7ologic0": 160, "d8": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 22, 23, 24, 25, 138, 153, 160, 191, 192, 193, 194, 195], "d8olog": 160, "d8ologic1": 160, "d9": [2, 3, 6, 7, 20, 21, 22, 23, 24, 25, 138, 153, 192, 193, 194, 195], "d_emu": 145, "d_emu1": 160, "d_emu1ilog": 160, "d_emu1ilogic0": 160, "d_emu2": 160, "d_emu2ilog": 160, "d_emu2ilogic1": 160, "d_emu_opt": 145, "d_in": [114, 129], "d_out_busi": 129, "daddr0": 108, "daddr1": 108, "daddr1dcm": 108, "daddr2": 108, "daddr2dcm": 108, "daddr3": 108, "daddr4": 108, "daddr4dcm": 108, "daddr5": 108, "daddr5dcm": 108, "daddr6": 108, "daddr6dcm": 108, "data": [10, 12, 14, 17, 32, 35, 37, 42, 45, 46, 53, 54, 55, 58, 59, 65, 74, 78, 87, 88, 93, 96, 97, 102, 105, 110, 112, 114, 124, 127, 129, 140, 154, 164, 169, 174, 179, 184, 188, 189, 196, 200], "data0": [42, 55, 97], "data00001000001": 97, "data00001000100": 97, "data00mux": 55, "data011": 74, "data0111": [164, 169, 174, 179], "data1": [42, 55, 97], "data10": [42, 55], "data10001000010": 97, "data10001001000": 97, "data101mux": 55, "data10mux": 55, "data11": [42, 55], "data110mux": 55, "data11mux": 55, "data12": [42, 55], "data13": [42, 55], "data130mux": 55, "data131mux": 55, "data14": [42, 55], "data140mux": 55, "data15": [42, 55], "data16": [42, 55], "data160mux": 55, "data17": [42, 55], "data170mux": 55, "data171mux": 55, "data18": [42, 55], "data180mux": 55, "data181mux": 55, "data19": [42, 55], "data190mux": 55, "data2": [42, 55, 97], "data20": [42, 55], "data20001000100": 97, "data20001010000": 97, "data20mux": 55, "data21": [42, 55], "data210mux": 55, "data21mux": 55, "data22": [42, 55], "data220mux": 55, "data221mux": 55, "data23": [42, 55], "data24": [42, 55], "data240mux": 55, "data25": [42, 55], "data250mux": 55, "data251mux": 55, "data26": [42, 55], "data261mux": 55, "data27": [42, 55], "data270mux": 55, "data28": [42, 55], "data29": [42, 55], "data290mux": 55, "data3": [42, 55, 97], "data30": [42, 55], "data30001001000": 97, "data30001100000": 97, "data300mux": 55, "data301mux": 55, "data30mux": 55, "data31": [42, 55], "data4": [42, 55, 97], "data40001000001": 97, "data40001000010": 97, "data40001000100": 97, "data5": [42, 55, 97], "data50001000010": 97, "data50001000100": 97, "data50001001000": 97, "data50mux": 55, "data51mux": 55, "data6": [42, 55, 97], "data60001000100": 97, "data60001001000": 97, "data60001010000": 97, "data60mux": 55, "data7": [42, 55, 97], "data70001001000": 97, "data70001010000": 97, "data70001100000": 97, "data8": [42, 55], "data80mux": 55, "data9": [42, 55], "data90mux": 55, "data91mux": 55, "data_ctl_a_n": 151, "data_ctl_a_nphy_control": 151, "data_ctl_b_n": 151, "data_ctl_c_n": 151, "data_ctl_c_nphy_control": 151, "data_ctl_d_n": 151, "data_ctl_n": 151, "data_ctl_nphaser_out0": 151, "data_ctl_nphaser_out1": 151, "data_ctl_nphaser_out2": 151, "data_ctl_nphaser_out3": 151, "data_l": [116, 132, 147], "data_r": [61, 114, 129, 145, 160], "data_rd_cycl": 151, "data_u": [116, 132, 147], "data_width": [114, 129, 145, 160], "data_width_": 87, "data_width_a": [45, 59, 87], "data_width_b": [45, 59, 87], "data_width_reload": 69, "data_width_start": 69, "databas": [11, 15, 16, 33, 35, 36, 188, 197, 199, 200], "datain": [129, 145, 160], "datain0010": 160, "datain00100": 145, "datain1000": 129, "datainilogic0": 129, "datainilogic1": 129, "datainiob1": 145, "dataint": 184, "datap": [45, 59, 87, 102], "datap_l": [116, 132, 147], "datap_u": [116, 132, 147], "datareg": 13, "datastream": [17, 189], "dbl": [38, 42, 47, 55, 68, 89, 97, 113, 128, 144, 159, 183, 186], "dbl0001010000": 128, "dbl0001100000": 128, "dbl0010010000": 128, "dbl0010100000": 128, "dbl0100010000": 128, "dbl0100100000": 128, "dbl1000010000": 128, "dbl1000100000": 128, "dbuf": [74, 76, 164, 166, 169, 171, 174, 176, 179, 181], "dcdr_filter": 111, "dci": [56, 97, 98, 106, 114, 119, 129, 145, 160], "dci0": [50, 91], "dci00": 50, "dci1": [50, 91], "dci11": 50, "dci_altvr": 91, "dci_altvrmisc": 91, "dci_clk_en": [50, 91, 104, 117, 133, 148], "dci_clk_enablemisc": 91, "dci_misc": [114, 129, 145], "dci_mod": [57, 99, 114, 129, 145, 160], "dci_osc_sel": 50, "dci_t": [114, 129, 145, 160], "dci_test_mux": 50, "dcireset": [104, 117, 133, 148], "dcireset0": 50, "dcireset1": 50, "dcitermdisable_sel": 160, "dciupdatemode_asrequir": [57, 99, 114, 129, 145], "dciupdatemode_asrequirediob0": [57, 99], "dciupdatemode_asrequirediob1": [57, 99], "dciupdatemode_asrequirediob2": 99, "dciupdatemode_asrequirediob3": [57, 99], "dciupdatemode_asrequirediob4": [57, 99], "dciupdatemode_asrequirediob5": 99, "dciupdatemode_quiet": 160, "dclk": [66, 117, 125, 126, 133, 141, 142, 148], "dclk0": 108, "dclk_divid_2": 115, "dclk_miss": 115, "dclkgth": 141, "dclkgtp": 66, "dclkgtp_dual": 125, "dclkgtx_dual": 126, "dclksysmon": 117, "dclkxadc": 148, "dcm": [54, 56, 87, 93, 96, 108, 110, 112, 114], "dcm0": [64, 120], "dcm0000000000001": 64, "dcm000001000000111111": 106, "dcm0_clk00000000110": 64, "dcm0_clk1800000010110": 64, "dcm0_clk2700000011110": 64, "dcm0_clk2x0000100010": 64, "dcm0_clk2x1800000101010": 64, "dcm0_clk900000001110": 64, "dcm0_clkdv0000110010": 64, "dcm0_clkfb011": [72, 120], "dcm0_clkfx0000111010": 64, "dcm0_clkfx1800000100110": 64, "dcm0_clkin001": 120, "dcm0_clkin010": 72, "dcm0_concur0000101110": 64, "dcm1": [64, 120], "dcm100001000001011111": 106, "dcm1000010001000011111": 106, "dcm1100010010000011111": 106, "dcm1200100000000111111": 106, "dcm1300100000001011111": 106, "dcm1400100000010011111": 106, "dcm1500100000100011111": 106, "dcm1600100001000011111": 106, "dcm1700100010000011111": 106, "dcm1801000000000111111": 106, "dcm1901000000001011111": 106, "dcm1_clk00001000000": 64, "dcm1_clk1800101000000": 64, "dcm1_clk2700111000000": 64, "dcm1_clk2x1000000000": 64, "dcm1_clk2x1801010000000": 64, "dcm1_clk900011000000": 64, "dcm1_clkdv1100000000": 64, "dcm1_clkfb001": 72, "dcm1_clkfb010": 120, "dcm1_clkfx1110000000": 64, "dcm1_clkfx1801001000000": 64, "dcm1_clkin000": [72, 120], "dcm1_concur1011000000": 64, "dcm200001000010011111": 106, "dcm2001000000010011111": 106, "dcm2101000000100011111": 106, "dcm2201000001000011111": 106, "dcm2301000010000011111": 106, "dcm300001000100011111": 106, "dcm400001001000011111": 106, "dcm500001010000011111": 106, "dcm600010000000111111": 106, "dcm700010000001011111": 106, "dcm800010000010011111": 106, "dcm900010000100011111": 106, "dcm_bufpll": 67, "dcm_clkdv_clkfx_align": [108, 120], "dcm_clkdv_clkfx_alignmentdcm": 108, "dcm_clkdv_clkfx_alignmentdcm0": 120, "dcm_clkdv_clkfx_alignmentdcm1": 120, "dcm_clkfb_iodly_muxinsel": 120, "dcm_clkfb_iodly_muxinseldcm0": 120, "dcm_clkfb_iodly_muxinseldcm1": 120, "dcm_clkfb_iodly_muxout_sel": 120, "dcm_clkfb_iodly_muxout_seldcm0": 120, "dcm_clkfb_iodly_muxout_seldcm1": 120, "dcm_clkin_iodly_muxinsel": 120, "dcm_clkin_iodly_muxinseldcm0": 120, "dcm_clkin_iodly_muxinseldcm1": 120, "dcm_clkin_iodly_muxout_sel": 120, "dcm_clkin_iodly_muxout_seldcm0": 120, "dcm_clkin_iodly_muxout_seldcm1": 120, "dcm_clklost_en": 120, "dcm_clklost_endcm0": 120, "dcm_clklost_endcm1": 120, "dcm_com_pwc_fb_en": 120, "dcm_com_pwc_fb_endcm0": 120, "dcm_com_pwc_fb_endcm1": 120, "dcm_com_pwc_fb_tap": 120, "dcm_com_pwc_ref_en": 120, "dcm_com_pwc_ref_endcm0": 120, "dcm_com_pwc_ref_endcm1": 120, "dcm_com_pwc_ref_tap": 120, "dcm_common_msb_sel": 120, "dcm_enabl": 50, "dcm_ext_fb_en": [108, 120], "dcm_ext_fb_endcm": 108, "dcm_ext_fb_endcm0": 120, "dcm_ext_fb_endcm1": 120, "dcm_lock_high": 108, "dcm_lock_high_b": 120, "dcm_lock_high_bdcm0": 120, "dcm_lock_high_bdcm1": 120, "dcm_lock_highdcm": 108, "dcm_out100": 47, "dcm_out_l0100": [47, 89], "dcm_out_l01000": 47, "dcm_out_r1000": [47, 89], "dcm_out_r10000": 47, "dcm_performance_mod": 108, "dcm_performance_modedcm": 108, "dcm_pll_rst_dcm": 120, "dcm_pll_rst_dcmdcm0": 120, "dcm_pll_rst_dcmdcm1": 120, "dcm_powerdown_common_en_b": 120, "dcm_powerdown_common_en_bdcm0": 120, "dcm_powerdown_common_en_bdcm1": 120, "dcm_pulse_width_correction_high": 108, "dcm_pulse_width_correction_low": 108, "dcm_reg_pwrd_cfg": 120, "dcm_reg_pwrd_cfgdcm0": 120, "dcm_reg_pwrd_cfgdcm1": 120, "dcm_scanmod": 120, "dcm_scanmodedcm0": 120, "dcm_scanmodedcm1": 120, "dcm_shutdown": [48, 90, 107], "dcm_trim_cal": 120, "dcm_unused_taps_powerdown": [108, 120], "dcm_unused_taps_powerdowndcm": 108, "dcm_use_reg_readi": 120, "dcm_use_reg_readydcm0": 120, "dcm_use_reg_readydcm1": 120, "dcm_vbg_pd": [108, 120], "dcm_vbg_sel": [108, 120], "dcm_vref_sourc": 108, "dcm_vreg": 52, "dcm_vreg_en": [108, 120], "dcm_vreg_enabledcm": 108, "dcm_vreg_enabledcm0": 120, "dcm_vreg_enabledcm1": 120, "dcm_vreg_phase_margin": 108, "dcm_vsply_valid_acc": 120, "dcm_wait_pll": 120, "dcm_wait_plldcm0": 120, "dcm_wait_plldcm1": 120, "dcmclk": 97, "dcmclk0": 97, "dcmclk00001000001": 97, "dcmclk0int": 97, "dcmclk1": 97, "dcmclk10001000010": 97, "dcmclk1int": 97, "dcmclk2": 97, "dcmclk20001000001": 97, "dcmclk2int": 97, "dcmclk3": 97, "dcmclk30001000010": 97, "dcmclk3int": 97, "dcmt_bot": 151, "dcmt_top": 151, "dcr_autolock_en": 131, "dcr_test": 131, "dcremacclk": 123, "dcy0": [60, 118, 134, 149], "dcy0slice0": [118, 134, 149], "dcy0slice1": [60, 149], "dd1": 34, "ddel_a": [45, 59, 87], "ddel_a_default": 45, "ddel_b": [45, 59, 87], "ddel_b_default": 45, "ddr": [56, 69, 98], "ddr0": [114, 129, 145, 160], "ddr00100": [129, 160], "ddr01": 70, "ddr01100": [129, 145], "ddr1": 61, "ddr100": 69, "ddr1000": 69, "ddr210": 70, "ddr300": 70, "ddr3_bypass": 145, "ddr3_bypassologic0": 145, "ddr3_data": 145, "ddr3_dataologic1": 145, "ddr_align": 69, "ddr_clk_edg": [114, 129, 145, 160], "ddr_enabl": 69, "ddr_opposite_edg": 69, "ddr_opposite_edgeiodelay1": 69, "ddrioiclk0": 69, "deal": [58, 93, 97], "dec": [164, 166, 167, 169, 171, 172, 174, 176, 177, 179, 181, 182], "dec0": [166, 171, 176, 181], "dec1": [166, 171, 176, 181], "dec2": [166, 171, 176, 181], "dec_mcomma_detect": [94, 95, 111, 142, 155, 156, 157], "dec_mcomma_detect_0": [66, 125, 126], "dec_mcomma_detect_0gtp": 66, "dec_mcomma_detect_0gtp_du": 125, "dec_mcomma_detect_0gtx_du": 126, "dec_mcomma_detect_1": [66, 125, 126], "dec_mcomma_detect_1gtp": 66, "dec_mcomma_detect_1gtp_du": 125, "dec_mcomma_detect_1gtx_du": 126, "dec_mcomma_detectgt11a": 111, "dec_mcomma_detectgt11b": 111, "dec_mcomma_detectgth_channel": 155, "dec_mcomma_detectgtp_channel": 156, "dec_mcomma_detectgtx0": 142, "dec_mcomma_detectgtx1": 142, "dec_mcomma_detectgtx2": 142, "dec_mcomma_detectgtx3": 142, "dec_mcomma_detectgtx_channel": 157, "dec_pcomma_detect": [94, 95, 111, 142, 155, 156, 157], "dec_pcomma_detect_0": [66, 125, 126], "dec_pcomma_detect_0gtp": 66, "dec_pcomma_detect_0gtp_du": 125, "dec_pcomma_detect_0gtx_du": 126, "dec_pcomma_detect_1": [66, 125, 126], "dec_pcomma_detect_1gtp": 66, "dec_pcomma_detect_1gtp_du": 125, "dec_pcomma_detect_1gtx_du": 126, "dec_pcomma_detectgt11a": 111, "dec_pcomma_detectgt11b": 111, "dec_pcomma_detectgth_channel": 155, "dec_pcomma_detectgtp_channel": 156, "dec_pcomma_detectgtx0": 142, "dec_pcomma_detectgtx1": 142, "dec_pcomma_detectgtx2": 142, "dec_pcomma_detectgtx3": 142, "dec_pcomma_detectgtx_channel": 157, "dec_valid_comma_onli": [94, 95, 111, 142, 155, 156, 157], "dec_valid_comma_only_0": [66, 125, 126], "dec_valid_comma_only_0gtp": 66, "dec_valid_comma_only_0gtp_du": 125, "dec_valid_comma_only_0gtx_du": 126, "dec_valid_comma_only_1": [66, 125, 126], "dec_valid_comma_only_1gtp": 66, "dec_valid_comma_only_1gtp_du": 125, "dec_valid_comma_only_1gtx_du": 126, "dec_valid_comma_onlygt11a": 111, "dec_valid_comma_onlygt11b": 111, "dec_valid_comma_onlygth_channel": 155, "dec_valid_comma_onlygtp_channel": 156, "dec_valid_comma_onlygtx0": 142, "dec_valid_comma_onlygtx1": 142, "dec_valid_comma_onlygtx2": 142, "dec_valid_comma_onlygtx3": 142, "dec_valid_comma_onlygtx_channel": 157, "decod": 102, "decoded1": [155, 156, 157], "dedic": [12, 14, 34, 36, 45, 46, 56, 58, 87, 88, 93, 97, 98, 102, 110, 114, 124, 129, 145, 154, 160, 189, 198, 200], "def": [15, 16], "default": [17, 35, 54], "default0": 145, "default00": 114, "default001": 160, "default0011": 145, "default10": 129, "default_idelay_valu": [129, 145], "default_only1011": 119, "defin": 200, "definit": 160, "del_clk_q": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_d_q_comb": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_d_q_latch": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_exp_d": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_exp_exp": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_ibuf_d": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_ibuf_fclk": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_ibuf_fo": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_ibuf_fsr": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_ibuf_imux": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_ibuf_plain": [2, 3, 4, 5, 6, 7, 8, 9], "del_ibuf_schmitt": [2, 3, 4, 5, 6, 7, 8, 9], "del_imux_ct": [2, 3, 4, 5, 6, 7, 8, 9], "del_imux_d_hp": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_imux_d_lp": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_imux_fbn": [190, 191, 192, 193, 194, 195], "del_imux_or": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_imux_pt": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_imux_pt_c": [20, 21, 24, 25, 27, 28, 30, 31], "del_imux_pt_clk": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_imux_pt_o": [18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "del_imux_pt_sr": [20, 21, 24, 25, 27, 28, 30, 31], "del_mc_fo": [2, 3, 4, 5, 6, 7, 8, 9], "del_obuf_fast": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_obuf_o": [2, 3, 4, 5, 6, 7, 8, 9, 190, 191, 192, 193, 194, 195], "del_obuf_slow": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_pt_ut": [190, 191, 192, 193, 194, 195], "del_sr_q": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "del_uim_imux": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "delai": [14, 44, 47, 80, 84, 124, 127, 140, 143, 145, 154, 158], "delay0": [76, 166, 171, 176, 181, 186], "delay00": [76, 171, 176, 181], "delay_bypass": 160, "delay_bypassbufio0": 160, "delay_bypassbufio1": 160, "delay_common": 57, "delay_commoniob0": 57, "delay_commoniob1": 57, "delay_commoniob2": 57, "delay_commoniob3": 57, "delay_commoniob4": 57, "delay_commoniob5": 57, "delay_commoniob6": 57, "delay_en": 43, "delay_line1": 120, "delay_src": [69, 129, 145, 160], "delay_typ": 145, "delay_vari": 57, "delay_variableiob0": 57, "delay_variableiob1": 57, "delay_variableiob3": 57, "delay_variableiob4": 57, "delaychain_osc": [69, 129], "delaychain_osc100": 160, "delaychain_osc1000": 160, "delaychain_osc10000": 145, "delaychain_osc_or_odatain_lp_or_idrp2_mcb": 69, "delaychain_osciodelay0": 69, "delaychain_osciodelay1": 69, "delayed_mem_ref0101": 151, "delayed_phase_ref11": 151, "delayed_phase_ref1100": 151, "delayed_ref01": 151, "delayed_ref0100": 151, "delayed_write0": 147, "delayed_write00": 132, "delaymux": 186, "delaymuxint": 186, "delaymuxiob2": 186, "delaymuxiob3": 186, "depend": [17, 35, 36, 55, 58, 87, 97, 110, 114, 124, 140, 154, 160, 189, 199, 200], "deriv": [12, 34, 56, 98, 198, 200], "describ": [17, 35, 46, 47, 58, 87, 88, 89, 106, 119, 120, 135, 136, 150, 151, 189], "descript": [45, 105], "design": [12, 36, 58, 198, 200], "deskew_adjust": [54, 64, 96, 108, 120], "despit": 154, "destin": 36, "detail": [35, 58, 93, 102, 199], "determin": [12, 34, 35, 46, 88, 200], "dev_cap2_ari_forwarding_support": 161, "dev_cap2_ari_forwarding_supportedpci": 161, "dev_cap2_atomicop32_completer_support": 161, "dev_cap2_atomicop32_completer_supportedpci": 161, "dev_cap2_atomicop64_completer_support": 161, "dev_cap2_atomicop64_completer_supportedpci": 161, "dev_cap2_atomicop_routing_support": 161, "dev_cap2_atomicop_routing_supportedpci": 161, "dev_cap2_cas128_completer_support": 161, "dev_cap2_cas128_completer_supportedpci": 161, "dev_cap2_endend_tlp_prefix_support": 161, "dev_cap2_endend_tlp_prefix_supportedpci": 161, "dev_cap2_extended_fmt_field_support": 161, "dev_cap2_extended_fmt_field_supportedpci": 161, "dev_cap2_ltr_mechanism_support": 161, "dev_cap2_ltr_mechanism_supportedpci": 161, "dev_cap2_max_endend_tlp_prefix": 161, "dev_cap2_no_ro_enabled_prpr_pass": 161, "dev_cap2_no_ro_enabled_prpr_passingpci": 161, "dev_cap2_tph_completer_support": 161, "dev_cap_enable_slot_pwr_limit_scal": [146, 161], "dev_cap_enable_slot_pwr_limit_scalepci": [146, 161], "dev_cap_enable_slot_pwr_limit_valu": [146, 161], "dev_cap_enable_slot_pwr_limit_valuepci": [146, 161], "dev_cap_endpoint_l0s_lat": [71, 146, 161], "dev_cap_endpoint_l1_lat": [71, 146, 161], "dev_cap_ext_tag_support": [71, 146, 161], "dev_cap_ext_tag_supportedpci": [146, 161], "dev_cap_function_level_reset_cap": [146, 161], "dev_cap_function_level_reset_capablepci": [146, 161], "dev_cap_max_payload_support": [71, 146, 161], "dev_cap_phantom_functions_support": [71, 146, 161], "dev_cap_role_based_error": [71, 146, 161], "dev_cap_role_based_errorpci": [146, 161], "dev_cap_rsvd_14_12": [146, 161], "dev_cap_rsvd_17_16": [146, 161], "dev_cap_rsvd_31_29": [146, 161], "dev_control_aux_power_support": [146, 161], "dev_control_aux_power_supportedpci": [146, 161], "dev_control_ext_tag_default": 161, "dev_control_ext_tag_defaultpci": 161, "devic": [11, 15, 16, 33, 35, 44, 45, 46, 47, 54, 55, 87, 88, 89, 96, 97, 112, 114, 127, 129, 143, 145, 158, 160, 188, 197, 199], "device_id": 146, "devicebram": 45, "devicecapabilityendpointl0slat": 130, "devicecapabilityendpointl1lat": 130, "devicedcm": [51, 52, 92], "deviceid": 130, "deviceiodelai": [129, 145], "devicemmcm": 136, "devicepl": 120, "deviceserialnumb": 130, "devicevalu": [47, 61], "devoid": 154, "df": [51, 92], "dfb001": 61, "dfb010": 61, "dfe_cal_tim": [126, 142], "dfe_cfg": 142, "dfe_cfg_0": 126, "dfe_cfg_1": 126, "dfe_drp_en": 142, "dfe_drp_engtx0": 142, "dfe_drp_engtx1": 142, "dfe_drp_engtx2": 142, "dfe_drp_engtx3": 142, "dfe_train_ctrl_lane0": 141, "dfe_train_ctrl_lane1": 141, "dfe_train_ctrl_lane2": 141, "dfe_train_ctrl_lane3": 141, "dff": [14, 36, 200], "dff0": 16, "dff00": [2, 3, 4, 5, 6, 7, 8, 9, 188], "dff1": 15, "dff_latch": 134, "dff_latchslice0": 134, "dffce": 200, "dffce11": [2, 3, 4, 5, 6, 7, 8, 9, 188], "dffinit": [118, 134, 149], "dffinitslice0": [118, 134, 149], "dffmux": [60, 118, 134, 149], "dffmuxslice1": 60, "dffsr": [118, 134, 149], "dffsrinit": 60, "dffsrinitslice1": 60, "dffsrslice0": 149, "dffsrslice1": 134, "dfs_": [52, 64], "dfs_ave_freq_adj_interv": 108, "dfs_ave_freq_gain": [108, 120], "dfs_ave_freq_sample_interv": [108, 120], "dfs_c": [52, 64], "dfs_cfg_bypass": 120, "dfs_cfg_bypassdcm0": 120, "dfs_cfg_bypassdcm1": 120, "dfs_coarse_sel": 108, "dfs_coarse_seldcm": 108, "dfs_coin_window": 108, "dfs_custom_fast_sync": 120, "dfs_early_lock": [108, 120], "dfs_early_lockdcm": 108, "dfs_early_lockdcm0": 120, "dfs_early_lockdcm1": 120, "dfs_en": 120, "dfs_en_relrst": 108, "dfs_en_relrst_b": 120, "dfs_en_relrst_bdcm0": 120, "dfs_en_relrst_bdcm1": 120, "dfs_en_relrstdcm": 108, "dfs_enabl": [51, 52, 64, 92, 108], "dfs_enabledcm": [51, 52, 92, 108], "dfs_enabledcm0": 64, "dfs_enabledcm1": 64, "dfs_endcm0": 120, "dfs_endcm1": 120, "dfs_extend_flush_tim": 108, "dfs_extend_flush_timedcm": 108, "dfs_extend_halt_tim": 108, "dfs_extend_halt_timedcm": 108, "dfs_extend_run_tim": 108, "dfs_extend_run_timedcm": 108, "dfs_fast_upd": 120, "dfs_fast_updatedcm0": 120, "dfs_fast_updatedcm1": 120, "dfs_feedback": [51, 52, 64, 92, 108], "dfs_feedbackdcm": [51, 52, 108], "dfs_feedbackdcm0": 64, "dfs_feedbackdcm1": 64, "dfs_fine_sel": 108, "dfs_fine_seldcm": 108, "dfs_frequency_mod": [51, 52, 64, 92, 108, 120], "dfs_frequency_modedcm": [51, 52, 108], "dfs_frequency_modedcm0": [64, 120], "dfs_frequency_modedcm1": [64, 120], "dfs_hardsync": 108, "dfs_hardsync_b": 120, "dfs_hf_trim_cal": 120, "dfs_jf_lower_limit": 120, "dfs_mpw_high": 120, "dfs_mpw_highdcm0": 120, "dfs_mpw_highdcm1": 120, "dfs_mpw_low": 120, "dfs_mpw_lowdcm0": 120, "dfs_mpw_lowdcm1": 120, "dfs_non_stop": 108, "dfs_non_stopdcm": 108, "dfs_osc_on_fx": 120, "dfs_osc_on_fxdcm0": 120, "dfs_osc_on_fxdcm1": 120, "dfs_oscillator_mod": [108, 120], "dfs_oscillator_modedcm0": 120, "dfs_oscillator_modedcm1": 120, "dfs_output_psdly_on_concur": 120, "dfs_output_psdly_on_concurdcm0": 120, "dfs_output_psdly_on_concurdcm1": 120, "dfs_pwrd_clkin_stop_b": 120, "dfs_pwrd_clkin_stop_bdcm0": 120, "dfs_pwrd_clkin_stop_bdcm1": 120, "dfs_pwrd_clkin_stop_sticky_b": 120, "dfs_pwrd_clkin_stop_sticky_bdcm0": 120, "dfs_pwrd_clkin_stop_sticky_bdcm1": 120, "dfs_pwrd_reply_times_out_b": 120, "dfs_pwrd_reply_times_out_bdcm0": 120, "dfs_pwrd_reply_times_out_bdcm1": 120, "dfs_ref_on_fx": 120, "dfs_ref_on_fxdcm0": 120, "dfs_ref_on_fxdcm1": 120, "dfs_skip_fin": 108, "dfs_skip_finedcm": 108, "dfs_spare": 108, "dfs_sync_to_dl": 120, "dfs_sync_to_dlldcm0": 120, "dfs_sync_to_dlldcm1": 120, "dfs_synth_clock_spe": 120, "dfs_synth_fast_synch": 120, "dfs_taptrim": 120, "dfs_tp_sel": 108, "dfs_tp_seldcm": 108, "dfs_trackmod": 108, "dfs_trackmodedcm": 108, "dfs_tweak": 120, "dge": [2, 3, 6, 7, 12, 14], "dge_en": [2, 3, 6, 7], "di": [12, 46, 87, 88, 102, 183], "di0": [108, 183], "di1": 108, "di10": 108, "di10dcm": 108, "di11": [108, 183], "di12": 108, "di126": [2, 12], "di12dcm": 108, "di13": 108, "di13dcm": 108, "di14": 108, "di14dcm": 108, "di15": 108, "di1dcm": 108, "di2": 108, "di222": [3, 12], "di288": [6, 12], "di2dcm": 108, "di3": 108, "di324": [7, 12], "di4": 108, "di44": [4, 5, 12], "di4dcm": 108, "di5": 108, "di5dcm": 108, "di6": 108, "di6dcm": 108, "di7": 108, "di8": 108, "di81": [8, 9, 12], "di9": 108, "di9dcm": 108, "di_dur": 151, "dia": 102, "dia0": 78, "dia1": 78, "dia10": 78, "dia11": 78, "dia12": 78, "dia13": 78, "dia14": 78, "dia15": 78, "dia2": 78, "dia3": 78, "dia4": 78, "dia5": 78, "dia6": 78, "dia7": 78, "dia8": 78, "dia9": 78, "diagon": [55, 97], "dib": 102, "dib0": 78, "dib1": 78, "dib10": 78, "dib11": 78, "dib12": 78, "dib13": 78, "dib14": 78, "dib15": 78, "dib16": 87, "dib2": 78, "dib3": 78, "dib31": 87, "dib4": 78, "dib5": 78, "dib6": 78, "dib7": 78, "dib8": 78, "dib9": 78, "die": [12, 17, 56, 154, 160, 189], "dif": [46, 88], "dif_mux": [37, 46, 88, 105], "dif_muxslice0": 105, "diff010": [114, 129], "diff10": [80, 85], "diff101": [57, 99], "diff110": [57, 69], "diff_hp100011": 160, "diff_hp10010": 145, "diff_hp1010": 160, "diff_lp000011": 160, "diff_lp00010": 145, "diff_lp0010": 160, "diff_mobile_ddr": 69, "diff_mobile_ddr10001000": 69, "diff_mod": 69, "diff_output_en": 69, "diff_phase_detector": 69, "diff_phase_detectorilogic1": 69, "diff_phase_detectoriodelay0": 69, "diff_phase_detectorologic1": 69, "diff_term": 69, "differ": [16, 35, 36, 46, 55, 88, 97, 160, 198, 200], "differenti": [14, 56, 114, 129, 145, 160], "differential1": 69, "dig": [46, 88], "dig_mux": [37, 46, 88, 105], "dig_muxslice0": 105, "dig_muxslice2": 105, "digit": [44, 54, 55, 56, 67, 96, 97, 98, 112], "digrx_fwdclk": 111, "digrx_sync_mod": 111, "digrx_sync_modegt11a": 111, "digrx_sync_modegt11b": 111, "dimens": 58, "dimension": 188, "din": [73, 145, 160, 163, 168, 173, 178], "din0": [73, 78, 163, 168, 173, 178], "din0000": 78, "din0001": 78, "din0110": [73, 163, 168, 173, 178], "din0int": 78, "din1": 78, "din10": 78, "din1000": 78, "din10000": 78, "din10001": 78, "din1001": 78, "din10int": 78, "din11": 78, "din11001": 78, "din11010": 78, "din11int": 78, "din12": 78, "din12010": 78, "din12011": 78, "din12int": 78, "din13": 78, "din13010": 78, "din13011": 78, "din13int": 78, "din14": 78, "din14010": 78, "din14011": 78, "din14int": 78, "din15": 78, "din15000": 78, "din15011": 78, "din15int": 78, "din16": 78, "din16110": 78, "din16111": 78, "din16int": 78, "din17": 78, "din17100": 78, "din17111": 78, "din17int": 78, "din18": 78, "din18100": 78, "din18101": 78, "din18int": 78, "din19": 78, "din19100": 78, "din19101": 78, "din19int": 78, "din1int": 78, "din2": 78, "din20": 78, "din2000": 78, "din2001": 78, "din20100": 78, "din20101": 78, "din20int": 78, "din21": 78, "din21101": 78, "din21110": 78, "din21int": 78, "din22": 78, "din22110": 78, "din22111": 78, "din22int": 78, "din23": 78, "din23110": 78, "din23111": 78, "din23int": 78, "din24": 78, "din24110": 78, "din24111": 78, "din24int": 78, "din25": 78, "din25100": 78, "din25111": 78, "din25int": 78, "din26": 78, "din26100": 78, "din26101": 78, "din26int": 78, "din27": 78, "din27100": 78, "din27101": 78, "din27int": 78, "din28": 78, "din28100": 78, "din28101": 78, "din28int": 78, "din29": 78, "din29101": 78, "din29110": 78, "din29int": 78, "din2int": 78, "din3": 78, "din30": 78, "din3001": 78, "din3010": 78, "din30110": 78, "din30111": 78, "din30int": 78, "din31": 78, "din31110": 78, "din31111": 78, "din31int": 78, "din3int": 78, "din4": 78, "din4010": 78, "din4011": 78, "din4int": 78, "din5": 78, "din5010": 78, "din5011": 78, "din5int": 78, "din6": 78, "din6010": 78, "din6011": 78, "din6int": 78, "din7": 78, "din7000": 78, "din7011": 78, "din7int": 78, "din8": 78, "din8000": 78, "din8001": 78, "din8int": 78, "din9": 78, "din9000": 78, "din9001": 78, "din9int": 78, "dinpin": [104, 117, 133], "diodelay1": 69, "dip": [87, 102], "dipa": 102, "dipb": 102, "direct": [36, 55, 87, 97], "direct0": [45, 53, 65, 109, 122, 138, 142, 153], "direct00": [155, 156, 157], "direct_path_cntrl": [136, 151], "direct_path_cntrlmmcm": 151, "direct_path_cntrlmmcm0": 136, "direct_path_cntrlmmcm1": 136, "direct_path_cntrlpl": 151, "directli": [14, 17, 35, 36, 46, 58, 87, 88, 97, 189, 200], "dis_tstblclamp": 147, "dis_tstfiforst": [132, 147], "dis_vgg_reg": [137, 152], "disabl": [36, 200], "disable00": 152, "disable111": 184, "disable_aspm_l1_tim": [146, 161], "disable_aspm_l1_timerpci": [146, 161], "disable_attr": [47, 61, 80, 89], "disable_attrbufg1": 80, "disable_attrbufgmux0": 47, "disable_attrbufgmux2": 47, "disable_attrbufgmux6": 47, "disable_attrbufgmux7": 47, "disable_attrint": 80, "disable_bar_filt": [71, 146, 161], "disable_bar_filteringpci": [146, 161], "disable_err_msg": 161, "disable_err_msgpci": 161, "disable_gt": [57, 99], "disable_gtsiob0": 57, "disable_gtsiob1": 99, "disable_gtsiob2": [57, 99], "disable_gtsiob3": 57, "disable_gtsiob4": [57, 99], "disable_id_check": [71, 146, 161], "disable_id_checkpci": [146, 161], "disable_jtag": [133, 148], "disable_lane_revers": [146, 161], "disable_lane_reversalpci": [146, 161], "disable_locked_filt": 161, "disable_locked_filterpci": 161, "disable_ppm_filt": 161, "disable_ppm_filterpci": 161, "disable_rx_poisoned_resp": 161, "disable_rx_poisoned_resppci": 161, "disable_rx_tc_filt": [146, 161], "disable_rx_tc_filterpci": [146, 161], "disable_scrambl": [71, 146, 161], "disable_scramblingpci": [146, 161], "disable_seq_match": 151, "disable_vrd_reg": 62, "disablebandgap": 91, "disablebandgapmisc": 91, "disablevgggener": 91, "disablevgggenerationmisc": 91, "disconnect": [55, 200], "displac": 58, "display_port": 69, "display_port10001000": 69, "dispmp1": 81, "dispmp2": 81, "distanc": [2, 3, 4, 5, 6, 7, 8, 9, 55, 58, 97], "distribut": [41, 54, 55, 58, 93, 96, 97, 140, 154], "distrubut": 140, "div12110": 70, "div2001": 70, "div201": [70, 151], "div4010": 70, "div410": [70, 151], "div60": 70, "div6011": 70, "div71": 70, "div8100": 70, "divclk11": 61, "divclk_edg": [136, 151], "divclk_edgemmcm": 151, "divclk_edgemmcm0": 136, "divclk_edgemmcm1": 136, "divclk_edgepl": 151, "divclk_ht": [136, 151], "divclk_lt": [136, 151], "divclk_nocount": [136, 151], "divclk_nocountmmcm": 151, "divclk_nocountmmcm0": 136, "divclk_nocountmmcm1": 136, "divclk_nocountpl": 151, "divid": [11, 12, 58, 61, 110, 124, 140, 154, 188, 200], "divide_100": 61, "divide_1000": 61, "divide_2001": 61, "divide_201": 61, "divide_300": 61, "divide_3010": 61, "divide_400": 61, "divide_4011": 61, "divide_501": 61, "divide_5100": 61, "divide_601": 61, "divide_6101": 61, "divide_710": 61, "divide_7110": 61, "divide_810": 61, "divide_8111": 61, "divide_bypass": 61, "divis": [102, 198], "dll": [51, 80, 84, 92, 98], "dll_": [52, 64], "dll_c": [52, 64], "dll_cfg0": 141, "dll_cfg1": 141, "dll_clkfb_stopped_pwrd_en_b": 120, "dll_clkfb_stopped_pwrd_en_bdcm0": 120, "dll_clkfb_stopped_pwrd_en_bdcm1": 120, "dll_clkin_stopped_pwrd_en_b": 120, "dll_clkin_stopped_pwrd_en_bdcm0": 120, "dll_clkin_stopped_pwrd_en_bdcm1": 120, "dll_control_clock_spe": 108, "dll_control_clock_speeddcm": 108, "dll_ctl_sel_clkin_div2": 108, "dll_ctl_sel_clkin_div2dcm": 108, "dll_dead_tim": [108, 120], "dll_deskew_lock_by1": [108, 120], "dll_deskew_lock_by1dcm": 108, "dll_deskew_lock_by1dcm0": 120, "dll_deskew_lock_by1dcm1": 120, "dll_deskew_maxtap": [108, 120], "dll_deskew_mintap": [108, 120], "dll_enabl": [51, 52, 64, 82, 92], "dll_enabledcm": [51, 52], "dll_enabledcm0": 64, "dll_enabledcm1": 64, "dll_enablemisc": 82, "dll_etpp_hold": 120, "dll_etpp_holddcm0": 120, "dll_etpp_holddcm1": 120, "dll_fdbklost_en": 120, "dll_fdbklost_endcm0": 120, "dll_fdbklost_endcm1": 120, "dll_frequency_mod": [51, 52, 64, 92, 108, 120], "dll_frequency_modedcm": 52, "dll_frequency_modedcm0": 64, "dll_frequency_modedcm1": 64, "dll_live_tim": [108, 120], "dll_pd_dly_sel": 108, "dll_period_lock_by1": [108, 120], "dll_period_lock_by1dcm": 108, "dll_period_lock_by1dcm0": 120, "dll_period_lock_by1dcm1": 120, "dll_phase_detector_auto_reset": 108, "dll_phase_detector_auto_resetdcm": 108, "dll_phase_detector_mod": 108, "dll_phase_detector_modedcm": 108, "dll_phase_shift_calibr": [108, 120], "dll_phase_shift_hfc": 108, "dll_phase_shift_lfc": [108, 120], "dll_phase_shift_lock_by1": [108, 120], "dll_phase_shift_lock_by1dcm": 108, "dll_phase_shift_lock_by1dcm0": 120, "dll_phase_shift_lock_by1dcm1": 120, "dll_pwrd_on_scanmode_b": 120, "dll_pwrd_on_scanmode_bdcm0": 120, "dll_pwrd_on_scanmode_bdcm1": 120, "dll_pwrd_sticky_b": 120, "dll_pwrd_sticky_bdcm0": 120, "dll_pwrd_sticky_bdcm1": 120, "dll_settle_tim": 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"dma0_rxirqtim": 131, "dma0_txchannelctrl": 131, "dma0_txirqtim": 131, "dma1_control": 131, "dma1_rxchannelctrl": 131, "dma1_rxirqtim": 131, "dma1_txchannelctrl": 131, "dma1_txirqtim": 131, "dma2_control": 131, "dma2_rxchannelctrl": 131, "dma2_rxirqtim": 131, "dma2_txchannelctrl": 131, "dma2_txirqtim": 131, "dma3_control": 131, "dma3_rxchannelctrl": 131, "dma3_rxirqtim": 131, "dma3_txchannelctrl": 131, "dma3_txirqtim": 131, "dma_test": 131, "dmonitor_cfg": [155, 156, 157], "dmonitorclk": [155, 156], "dmonitorclkgth_channel": 155, "dmonitorclkgtp_channel": 156, "dmux": 183, "dna_opt": 63, "dna_port": [56, 63, 133, 148], "dnstream_link_num": [146, 161, 162], "do": [35, 46, 87, 88, 97, 102, 160], "do1": 183, "do11000": 183, "do11001": 183, "do11010": 183, "do11011": 183, "do_dur": 151, "doa": [87, 102], "doa0": [78, 102], "doa0int": 78, "doa1": 78, "doa10": 78, "doa10int": 78, "doa11": 78, "doa11int": 78, "doa12": 78, "doa12int": 78, "doa13": 78, "doa13int": 78, "doa14": 78, "doa14int": 78, "doa15": 78, "doa15int": 78, "doa1int": 78, "doa2": 78, "doa3": 78, "doa31": 102, "doa4": 78, "doa4int": 78, "doa5": 78, "doa6": 78, "doa6int": 78, "doa7": 78, "doa8": 78, "doa8int": 78, "doa9": 78, "doa9int": 78, "doa_reg": [45, 59, 102], "doa_reg_l": [116, 132, 147], "doa_reg_u": [116, 132, 147], "dob": [87, 102], "dob0": 78, "dob0int": 78, "dob1": 78, "dob10": [78, 102], "dob10int": 78, "dob11": [78, 102], "dob11int": 78, "dob12": 78, "dob12int": 78, "dob13": 78, "dob13int": 78, "dob14": 78, "dob14int": 78, "dob15": 78, "dob15int": 78, "dob1int": 78, "dob2": 78, "dob3": 78, "dob4": [78, 102], "dob4int": 78, "dob5": [78, 102], "dob6": [78, 102], "dob6int": 78, "dob7": [78, 102], "dob8": [78, 102], "dob8int": 78, "dob9": [78, 102], "dob9int": 78, "dob_reg": [45, 59, 102], "dob_reg_l": [116, 132, 147], "dob_reg_u": [116, 132, 147], "document": [15, 16, 38, 39, 40, 41, 43, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 57, 60, 62, 63, 64, 65, 66, 67, 70, 72, 75, 81, 84, 87, 88, 89, 90, 91, 92, 94, 95, 99, 100, 101, 104, 105, 107, 110, 111, 112, 113, 114, 117, 118, 121, 124, 125, 126, 127, 128, 129, 133, 134, 137, 140, 141, 142, 143, 144, 145, 148, 149, 152, 154, 155, 156, 157, 158, 159, 165, 170, 175, 180, 185], "doe": [34, 154], "doesn": [16, 36, 46, 55, 58, 87, 97, 154, 200], "dologic0": 145, "domux": 183, "domuxlc2": 183, "don": [35, 36, 46, 55, 58, 154, 200], "done": [2, 3, 4, 5, 6, 7, 8, 9, 14, 16, 34, 35, 36, 74, 102, 114, 129, 145, 160, 164, 169, 174, 179], "done110": [39, 48, 81, 90, 107, 121, 137, 152], "done111": [49, 62], "done_act": [74, 164, 169, 174, 179, 184], "done_cycl": [39, 48, 49, 62, 81, 90, 107, 121, 137, 152], "done_in00": [74, 164, 169, 174, 179, 184], "done_in01": [74, 164, 169, 174, 179], "done_pip": [39, 48, 49, 62, 81, 90, 107, 121, 137, 152], "done_signals_powerdown": [137, 152], "donein": [74, 164, 169, 174, 179, 184], "donein011": 74, "donein0111": [164, 169, 174, 179], "doneinint": [74, 164, 169, 174, 179], "donepin": [50, 63, 82, 91, 104, 117, 133, 148, 184], "donepinint": 184, "donepinmisc": 82, "dont_set1": 122, "dop": [87, 102], "dopa": 102, "doubl": [55, 73, 74, 76, 97, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182], "dout": 160, "dout0": 78, "dout000": 78, "dout0000": 78, "dout001": 78, "dout0int": 78, "dout1": 78, "dout10": 78, "dout100": 78, "dout1000": 78, "dout1001": 78, "dout10010": 78, "dout101": 78, "dout10int": 78, "dout11": 78, "dout1100": 78, "dout1101": 78, "dout11010": 78, "dout11int": 78, "dout12": 78, "dout1200": 78, "dout1201": 78, "dout12011": 78, "dout12int": 78, "dout13": 78, "dout1300": 78, "dout1301": 78, "dout13011": 78, "dout13int": 78, "dout14": 78, "dout1400": 78, "dout1401": 78, "dout14011": 78, "dout14int": 78, "dout15": 78, "dout1500": 78, "dout1501": 78, "dout15011": 78, "dout15int": 78, "dout16": 78, "dout1610": 78, "dout16100": 78, "dout1611": 78, "dout16int": 78, "dout17": 78, "dout1710": 78, "dout17100": 78, "dout1711": 78, "dout17int": 78, "dout18": 78, "dout1810": 78, "dout18100": 78, "dout1811": 78, "dout18int": 78, "dout19": 78, "dout1910": 78, "dout19100": 78, "dout1911": 78, "dout19int": 78, "dout1int": 78, "dout2": 78, "dout20": 78, "dout200": 78, "dout2000": 78, "dout201": 78, "dout2010": 78, "dout20101": 78, "dout2011": 78, "dout20int": 78, "dout21": 78, "dout2110": 78, "dout21101": 78, "dout2111": 78, "dout21int": 78, "dout22": 78, "dout2210": 78, "dout22101": 78, "dout2211": 78, "dout22int": 78, "dout23": 78, "dout2310": 78, "dout23101": 78, "dout2311": 78, "dout23int": 78, "dout24": 78, "dout2410": 78, "dout2411": 78, "dout24110": 78, "dout24int": 78, "dout25": 78, "dout2510": 78, "dout2511": 78, "dout25110": 78, "dout25int": 78, "dout26": 78, "dout2610": 78, "dout2611": 78, "dout26110": 78, "dout26int": 78, "dout27": 78, "dout2710": 78, "dout2711": 78, "dout27110": 78, "dout27int": 78, "dout28": 78, "dout2810": 78, "dout2811": 78, "dout28111": 78, "dout28int": 78, "dout29": 78, "dout2910": 78, "dout2911": 78, "dout29111": 78, "dout29int": 78, "dout2int": 78, "dout3": 78, "dout30": 78, "dout300": 78, "dout3000": 78, "dout301": 78, "dout3010": 78, "dout3011": 78, "dout30111": 78, "dout30int": 78, "dout31": 78, "dout3110": 78, "dout3111": 78, "dout31111": 78, "dout31int": 78, "dout3int": 78, "dout4": 78, "dout400": 78, "dout4001": 78, "dout401": 78, "dout4int": 78, "dout5": 78, "dout500": 78, "dout5001": 78, "dout501": 78, "dout5int": 78, "dout6": 78, "dout600": 78, "dout6001": 78, "dout601": 78, "dout6int": 78, "dout7": 78, "dout700": 78, "dout7001": 78, "dout701": 78, "dout7int": 78, "dout8": 78, "dout800": 78, "dout801": 78, "dout8010": 78, "dout8int": 78, "dout9": 78, "dout900": 78, "dout901": 78, "dout9010": 78, "dout9int": 78, "dout_busi": [114, 145], "doutmux": [60, 118, 134, 149], "doutmuxslice1": 60, "down": [36, 55, 56, 58, 110, 200], "down0": 15, "down1": [16, 188], "downward": [36, 129], "dpm": 103, "dpm_oscout10001000100": 103, "dpm_oscout20001000010": 103, "dpm_refclkout0001010000": 103, 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126, 136, 142, 146, 151, 155, 156, 157, 161], "drp44_mask": [108, 111], "drp44_maskdcm": 108, "drp45": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp45_mask": [108, 111], "drp45_maskdcm": 108, "drp46": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp46_mask": [108, 111], "drp46_maskdcm": 108, "drp47": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp47_mask": [108, 111], "drp48": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp48_mask": [108, 111], "drp48_maskdcm": 108, "drp49": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp49_mask": [108, 111], "drp49_maskdcm": 108, "drp4a": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4a_mask": [108, 111], "drp4b": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4b_mask": [108, 111], "drp4c": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4c_mask": [108, 111], "drp4c_maskdcm": 108, "drp4d": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4d_mask": [108, 111], "drp4d_maskdcm": 108, "drp4e": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4e_mask": [108, 111], "drp4f": [66, 108, 111, 120, 125, 126, 136, 142, 146, 151, 155, 156, 157, 161], "drp4f_mask": [108, 111], "drp50": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp50_mask": [108, 111], "drp50_maskdcm": 108, "drp51": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp51_mask": [108, 111], "drp51_maskdcm": 108, "drp52": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp52_mask": [108, 111], "drp52_maskdcm": 108, "drp53": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp53_mask": [108, 111], "drp53_maskdcm": 108, "drp54": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp54_mask": [108, 111], "drp54_maskdcm": 108, "drp55": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp55_mask": [108, 111], "drp55_maskdcm": 108, "drp56": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp56_mask": [108, 111], "drp56_maskdcm": 108, "drp57": [66, 108, 111, 120, 136, 146, 151, 155, 156, 157, 161], "drp57_mask": [108, 111], "drp57_maskdcm": 108, "drp58": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp58_mask": [108, 111], "drp58_maskdcm": 108, "drp59": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp59_mask": [108, 111], "drp59_maskdcm": 108, "drp5a": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5a_mask": [108, 111], "drp5a_maskdcm": 108, "drp5b": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5b_mask": [108, 111], "drp5b_maskdcm": 108, "drp5c": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5c_mask": [108, 111], "drp5c_maskdcm": 108, "drp5d": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5d_mask": [108, 111], "drp5d_maskdcm": 108, "drp5e": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5e_mask": [108, 111], "drp5e_maskdcm": 108, "drp5f": [66, 108, 111, 136, 146, 151, 155, 156, 157, 161], "drp5f_mask": [108, 111], "drp5f_maskdcm": 108, "drp60": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp60_mask": 111, "drp61": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp61_mask": 111, "drp62": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp62_mask": 111, "drp63": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp63_mask": 111, "drp64": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp64_mask": 111, "drp65": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp65_mask": 111, "drp66": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp66_mask": 111, "drp67": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp67_mask": 111, "drp68": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp68_mask": 111, "drp69": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp69_mask": 111, "drp6a": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6a_mask": 111, "drp6b": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6b_mask": 111, "drp6c": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6c_mask": 111, "drp6d": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6d_mask": 111, "drp6e": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6e_mask": 111, "drp6f": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp6f_mask": 111, "drp70": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp70_mask": 111, "drp71": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp71_mask": 111, "drp72": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp72_mask": 111, "drp73": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp73_mask": 111, "drp74": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp74_mask": 111, "drp75": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp75_mask": 111, "drp76": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp76_mask": 111, "drp77": [66, 111, 136, 146, 151, 155, 156, 157, 161], "drp77_mask": 111, "drp78": [66, 111, 136, 151, 155, 156, 157, 161], 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193, 194, 195], "e4000": 78, "e401": 184, "e4010": 78, "e5": [2, 3, 5, 6, 7, 9, 24, 25, 26, 27, 28, 30, 31, 38, 42, 47, 55, 78, 79, 85, 89, 97, 113, 183, 184, 186, 190, 191, 193, 194, 195], "e500": 184, "e5011": 78, "e6": [2, 3, 6, 7, 9, 24, 25, 26, 27, 28, 30, 31, 38, 42, 47, 55, 78, 79, 85, 89, 97, 113, 184, 186, 190, 191, 193, 194, 195], "e6001": 78, "e601": 184, "e6011": 78, "e6int": 186, "e7": [2, 3, 5, 6, 7, 9, 24, 25, 26, 27, 28, 30, 31, 38, 42, 47, 55, 78, 79, 85, 89, 97, 113, 183, 184, 186, 190, 191, 193, 194, 195], "e700": 184, "e7011": 78, "e7int": 183, "e8": [2, 3, 4, 5, 6, 7, 8, 9, 24, 25, 78, 79, 85, 89, 97, 113, 183, 186, 191, 193, 194, 195], "e8001": 78, "e8011": 78, "e8int": 183, "e9": [2, 3, 6, 7, 24, 25, 78, 79, 85, 89, 97, 113, 183, 186, 193, 194, 195], "e9100": 78, "e9111": 78, "each": [14, 15, 16, 34, 35, 36, 42, 46, 55, 58, 87, 88, 93, 97, 110, 114, 124, 129, 140, 145, 154, 160, 188, 189, 200], "earlier": [34, 110, 198], "easi": [55, 97], "east_refclk0_sel": 156, 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163, 164, 166, 168, 169, 171, 173, 174, 176, 178, 179, 181, 183, 184, 186, 189, 196, 197], "imux0": [61, 113, 128, 144, 159], "imux001": [128, 144, 159], "imux1": [61, 113, 128, 144, 159], "imux10": [61, 113, 128, 144, 159], "imux100": 113, "imux101": [128, 144, 159], "imux1010": [128, 144, 159], "imux11": [61, 113, 128, 144, 159], "imux110": 113, "imux1110": [128, 144, 159], "imux12": [61, 113, 128, 144, 159], "imux121": 128, "imux1210": 159, "imux121000": 144, "imux13": [61, 113, 128, 144, 159], "imux131": 128, "imux1310": [144, 159], "imux14": [61, 113, 128, 144, 159], "imux140100": 144, "imux141": 128, "imux1410": 159, "imux15": [61, 113, 128, 144, 159], "imux150100": 144, "imux151": 128, "imux1510": 159, "imux16": [113, 128, 144, 159], "imux1601": [144, 159], "imux161": 128, "imux17": [113, 128, 144, 159], "imux1701": [144, 159], "imux171": 128, "imux18": [113, 128, 144, 159], "imux180": 128, "imux1801": [144, 159], "imux19": [113, 128, 144, 159], "imux190": 128, "imux1901": [144, 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144, 159], "imux3010": [144, 159], "imux31": [113, 128, 144, 159], "imux310": 128, "imux3110": [144, 159], "imux32": [128, 144, 159], "imux320": 128, "imux320010": [144, 159], "imux32intf": 128, "imux33": [128, 144, 159], "imux330": 128, "imux330010": [144, 159], "imux33intf": 128, "imux34": [128, 144, 159], "imux340": 128, "imux3401": [144, 159], "imux34intf": 128, "imux35": [128, 144, 159], "imux350": 128, "imux350100": [144, 159], "imux36": [128, 144, 159], "imux3601": [144, 159], "imux361": 128, "imux37": [128, 144, 159], "imux3701": 144, "imux370100": 159, "imux371": 128, "imux38": [128, 144, 159], "imux380010": 159, "imux3801": 144, "imux381": 128, "imux39": [128, 144, 159], "imux390010": 159, "imux3901": 144, "imux391": 128, "imux4": [61, 113, 128, 144, 159], "imux40": [113, 128, 144, 159], "imux400100": [144, 159], "imux401": [128, 159], "imux40100": 144, "imux41": [128, 144, 159], "imux410100": [144, 159], "imux411": 128, "imux42": [128, 144, 159], "imux420": 128, "imux4210": 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89, "in_b50": 89, "in_b60": 89, "in_b70": 89, "in_core010": 47, "in_core110": 47, "in_core210": 47, "in_core310": 47, "in_core410": 47, "in_core510": 47, "in_core610": 47, "in_core710": 47, "in_dly_en": [136, 151], "in_dly_enpl": 151, "in_dly_mx_cvdd": [136, 151], "in_dly_mx_dvdd": [136, 151], "in_dly_set": [136, 151], "in_fifo": 151, "in_l01": 47, "in_l11": 47, "in_l21": 47, "in_l31": 47, "in_l41": 47, "in_l51": 47, "in_l61": 47, "in_l71": 47, "in_lr001": 47, "in_lr101": 47, "in_lr201": 47, "in_lr301": 47, "in_lr401": 47, "in_lr501": 47, "in_lr601": 47, "in_lr701": 47, "in_r01": 47, "in_r11": 47, "in_r21": 47, "in_r31": 47, "in_r41": 47, "in_r51": 47, "in_r61": 47, "in_r71": 47, "in_t00": 47, "in_t01": 89, "in_t10": 47, "in_t11": 89, "in_t20": 47, "in_t21": 89, "in_t30": 47, "in_t31": 89, "in_t41": 89, "in_t51": 89, "in_t61": 89, "in_t71": 89, "in_term": 160, "in_term01000100": 69, "inapplic": 160, "includ": [12, 14, 15, 17, 35, 36, 55, 56, 58, 97, 110, 124, 188, 189, 198, 200], "incom": 97, "increas": [129, 200], "increment": 35, "independ": [14, 102, 110, 124, 140, 154, 200], "indetermin": [36, 46, 88], "index": [15, 16, 17, 35, 36, 97, 102, 189], "indic": [35, 189], "individu": [14, 36], "infer_ei": [146, 161], "infiniband10": 94, "infiniband11": 95, "infinitecomplet": 130, "infinitecompletionspci": 130, "inform": 199, "init": [114, 129], "init_": [87, 102], "init_4": [115, 117, 133, 148], "init_40": [115, 117, 133, 148], "init_41": [115, 117, 133, 148], "init_42": [115, 117, 133, 148], "init_43": [115, 117, 133, 148], "init_44": [115, 117, 133, 148], "init_45": [115, 117, 133, 148], "init_46": [115, 117, 133, 148], "init_47": [115, 117, 133, 148], "init_48": [115, 117, 133, 148], "init_49": [115, 117, 133, 148], "init_4a": [115, 117, 133, 148], "init_4b": [115, 117, 133, 148], "init_4c": [115, 117, 133, 148], "init_4d": [115, 117, 133, 148], "init_4f": [115, 117, 133, 148], "init_5": [115, 148], "init_50": [115, 117, 133, 148], "init_51": [115, 117, 133, 148], "init_52": [115, 117, 133, 148], "init_53": [115, 117, 133, 148], "init_54": [115, 117, 133, 148], "init_55": [115, 117, 133, 148], "init_56": [115, 117, 133, 148], "init_57": [115, 117, 133, 148], "init_58": [115, 148], "init_59": [115, 148], "init_5a": [115, 148], "init_5b": [115, 148], "init_5c": [115, 148], "init_5d": [115, 148], "init_5f": [115, 148], "init_6": 115, "init_60": 115, "init_61": 115, "init_62": 115, "init_63": 115, "init_64": 115, "init_65": 115, "init_66": 115, "init_67": 115, "init_68": 115, "init_69": 115, "init_6a": 115, "init_6b": 115, "init_6c": 115, "init_6d": 115, "init_6f": 115, "init_a": [45, 59, 87, 102], "init_a_l": [116, 132, 147], "init_a_u": [116, 132, 147], "init_b": [45, 59, 87, 102, 145, 160], "init_b_l": [116, 132, 147], "init_b_u": [116, 132, 147], "init_bitslip": 145, "init_bitslipcnt": [114, 129, 145], "init_c": [114, 129, 145], "init_dly_cnt": 145, "init_fifo_addr": 145, "init_fifo_reset": 145, "init_loadcnt": [114, 129, 145], "init_orank1": 145, "init_orank2_parti": 145, "init_out": [104, 117, 135, 136, 150, 151], "init_outbufgctrl0": 104, "init_outbufgctrl1": 104, "init_outbufgctrl10": 104, "init_outbufgctrl11": 104, "init_outbufgctrl12": 104, "init_outbufgctrl13": 104, "init_outbufgctrl14": 104, "init_outbufgctrl15": 104, "init_outbufgctrl16": 104, "init_outbufgctrl17": 104, "init_outbufgctrl18": 104, "init_outbufgctrl19": 104, "init_outbufgctrl2": 104, "init_outbufgctrl20": 104, "init_outbufgctrl21": 104, "init_outbufgctrl22": 104, "init_outbufgctrl23": 104, "init_outbufgctrl24": 104, "init_outbufgctrl25": 104, "init_outbufgctrl26": 104, "init_outbufgctrl27": 104, "init_outbufgctrl28": 104, "init_outbufgctrl29": 104, "init_outbufgctrl3": 104, "init_outbufgctrl30": 104, "init_outbufgctrl31": 104, "init_outbufgctrl4": 104, "init_outbufgctrl5": 104, "init_outbufgctrl6": 104, "init_outbufgctrl7": 104, "init_outbufgctrl8": 104, "init_outbufgctrl9": 104, "init_outbufhce_r0": 136, "init_outbufhce_r10": 136, "init_outbufhce_r2": 136, "init_outbufhce_r4": 136, "init_outbufhce_r6": 136, "init_outbufhce_r8": 136, "init_outbufmrce1": 151, "init_outmmcm0": 136, "init_outmmcm1": 136, "init_pipe_data0": 145, "init_pipe_data1": 145, "init_rank1_parti": [114, 129, 145], "init_rank2": [114, 129, 145], "init_rank3": [114, 129, 145], "init_signals_error": [137, 152], "init_skip": 62, "init_trank1": 145, "init_xx": [87, 102], "initi": [14, 35, 36, 46, 79, 87, 88, 102, 200], "initp_xx": [87, 102], "initpin": [104, 117, 133, 148], "initpinmisc": 117, "initx": 79, "initxint": 79, "initxslice1": 79, "inityint": 79, "inmode0": [138, 153], "inmode1": [138, 153], "inmode2": [138, 153], "inmode3": [138, 153], "inmode4": [138, 153], "inmodereg": [138, 153], "inner": [58, 93, 110, 124, 140, 145], "input": [2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 33, 34, 35, 41, 44, 46, 54, 56, 67, 74, 75, 84, 87, 88, 96, 98, 102, 110, 112, 124, 127, 140, 143, 154, 158, 164, 165, 169, 170, 174, 175, 179, 180, 184, 185, 188, 189, 197, 198, 199], "input_misc": 160, "inputtest": 55, "insan": 88, "insert": 154, "insid": [55, 97], "instanc": 93, "instanti": [55, 97], "instead": [12, 14, 16, 34, 35, 36, 42, 56, 58, 87, 97, 114, 154, 160, 198, 200], "instruct": [11, 33, 36, 56, 98, 197], "int": [17, 37, 38, 45, 46, 47, 53, 58, 61, 65, 68, 73, 74, 76, 77, 78, 79, 80, 82, 83, 85, 86, 87, 88, 89, 93, 102, 105, 110, 113, 124, 128, 140, 144, 154, 159, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 189], "int0": [45, 69, 151], "int00": [138, 153], "int000": 147, "int00001": 47, "int0001": [47, 89, 186], "int001": 47, "int01": [38, 69], "int1": [51, 52, 64, 69, 83, 92, 108, 120], "int_clk00001": 115, "int_imux00000": 115, "integ": [17, 189], "interconnect": [14, 36, 37, 41, 44, 45, 46, 54, 56, 58, 67, 84, 87, 88, 93, 96, 98, 102, 110, 112, 124, 127, 140, 143, 145, 154, 158, 200], "interconnect_imask": 131, "interconnect_tmpl_sel": 131, "intereconnect": 154, "interfac": [11, 33, 41, 52, 54, 58, 64, 67, 93, 96, 112, 197], "interface_typ": [114, 129, 145, 160], "interface_typeilogic0": 114, "interface_typeilogic1": 114, "interfer": [46, 88], "interleav": 16, "intermdisable_sel": 160, "intern": [36, 56, 98, 102, 154, 199], "internal1": [137, 152, 171], "internal_vref": [119, 145, 160], "internalclk0": [49, 62], "interp_en": [136, 151], "interp_test": 151, "interpos": 154, "interpret": 17, "interrupt": [35, 97], "interrupt_pin": [146, 161], "interrupt_stat_auto": 161, "interrupt_stat_autopci": 161, "interruptpin": 130, "intersect": [38, 47, 55, 58, 93, 110, 124, 140, 154], "intest": [13, 35, 199], "intf": [110, 113, 124, 127, 140, 143, 154, 158], "intosc00": 82, "intro": [41, 54, 67, 75, 84, 112, 127, 143, 158, 165, 170, 175, 180, 185], "introduc": [58, 102, 154], "introduct": [11, 33, 44, 54, 96, 197], "inv": [15, 36, 37, 42, 43, 46, 47, 51, 52, 55, 57, 59, 60, 61, 64, 65, 66, 69, 70, 72, 73, 74, 76, 78, 79, 80, 82, 83, 85, 86, 89, 92, 97, 99, 102, 103, 104, 105, 108, 109, 113, 114, 115, 116, 117, 118, 120, 122, 123, 125, 126, 129, 130, 131, 132, 133, 134, 135, 136, 138, 141, 142, 145, 147, 148, 149, 150, 151, 153, 155, 156, 157, 160, 163, 164, 166, 168, 169, 171, 173, 174, 176, 178, 179, 181, 183, 184, 186], "inv0001": [76, 171, 176, 181], "inv0010": 186, "inv0101": 166, "inv0110": 166, "inv1000": 186, "inv1111": [76, 171, 176, 181], "inv22": [15, 16], "invalid": [15, 16, 35], "invers": [17, 34, 36, 57, 59, 69, 85, 88, 99, 114, 129, 145, 160, 189, 200], "invert": [2, 3, 4, 5, 6, 7, 8, 9, 14, 15, 16, 17, 23, 36, 37, 38, 39, 40, 42, 43, 45, 46, 47, 48, 49, 50, 51, 52, 55, 57, 59, 60, 61, 62, 63, 64, 65, 66, 68, 69, 70, 71, 72, 73, 74, 76, 77, 78, 79, 80, 81, 82, 83, 85, 86, 87, 88, 89, 90, 91, 92, 94, 95, 97, 99, 102, 103, 104, 105, 106, 107, 108, 109, 111, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 125, 126, 128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 141, 142, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 155, 156, 157, 159, 160, 161, 162, 163, 164, 166, 167, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 200], "invert_clk_do": 102, "invert_clk_doa_reg": 102, "invert_clk_dob_reg": 102, "invert_zd1_custom": 51, "invert_zd1_customdcm": 51, "inverted0": [69, 70], "involv": [15, 16, 36, 93, 110, 124, 200], "io": [17, 54, 55, 56, 74, 75, 84, 87, 96, 97, 98, 110, 112, 114, 124, 127, 129, 140, 143, 158, 164, 165, 169, 170, 174, 175, 179, 180, 184, 185], "io0": [85, 186], "io00": 69, "io00011": 145, "io0011": 129, "io1": [85, 186], "io2": [85, 186], "io3": [85, 186], "io_hp_bot": 158, "io_hp_pair": 158, "io_hp_top": 158, "io_hr_bot": 158, "io_hr_pair": 158, "io_hr_top": 158, "io_mc": [188, 189, 199], "io_speci": [17, 189], "io_special_overrid": 17, "io_var_loadable11111": 145, "iob": [10, 11, 17, 35, 36, 47, 58, 67, 74, 84, 89, 93, 97, 112, 114, 127, 129, 145, 160, 164, 169, 174, 179, 189, 197, 199], "iob0": [57, 69, 76, 99, 114, 129, 145, 160, 166, 171, 176, 181, 186], "iob1": [57, 69, 74, 76, 85, 99, 114, 129, 145, 160, 164, 166, 169, 171, 174, 176, 179, 181, 186], "iob2": [57, 85, 99, 186], "iob3": [57, 85, 99, 186], "iob4": [57, 99], "iob5": [57, 99], "iob6": 57, "iob7": 57, "iob_": [17, 34, 36, 189, 200], "iob_0_0": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "iob_0_00001": 18, "iob_0_000101": [20, 21], "iob_0_00011": [18, 19, 30, 31], "iob_0_00011111111111111111111111111111111111111111011111111111111111111111111111111111111111111": 7, "iob_0_001": 26, "iob_0_0010": [27, 28, 29], "iob_0_00101": [20, 21], "iob_0_0011011101111111111111111111111111111111111111111": 3, "iob_0_00110111101111111": [8, 9], "iob_0_00110111111111111110111111111": 2, "iob_0_001101111111111111111111111111111111111111111111111111111111111111111111100": 6, "iob_0_00111": 29, "iob_0_001110111111111110": 191, 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191, 192, 193, 194, 195], "k6": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 24, 25, 191, 192, 193, 194, 195], "k7": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 24, 25, 191, 192, 193, 194, 195], "k8": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 24, 25, 191, 192, 193, 194, 195], "k9": [2, 3, 4, 5, 6, 7, 8, 9, 20, 21, 24, 25, 191, 192, 193, 194, 195], "kbit": [56, 87, 98], "keep000": [49, 62], "keep111": [39, 48, 81, 90, 107, 121, 137, 152], "keeper": [33, 34], "keeper0": [2, 3, 4, 5, 6, 7, 8, 9, 16], "keeper100": 85, "keeper101": [57, 69, 99, 114, 129, 145, 160], "kei": [17, 189], "key_clear_en": [133, 148], "keyclearb": 63, "kind": [15, 17, 35, 46, 55, 56, 58, 93, 97, 98, 110, 124, 140, 154], "known": [14, 154], "l": [15, 16, 36, 75, 84, 160, 165, 170, 175, 180, 183, 184, 185, 200], "l0": [85, 172, 177, 182], "l00000010010": 85, "l00100000010": 85, "l01100": 183, "l0int": 85, "l0sexitlat": 130, "l0sexitlatencycomclk": 130, "l1": [3, 6, 7, 20, 21, 22, 23, 24, 25, 85, 172, 177, 182, 192, 193, 194, 195], "l10": [3, 6, 7, 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36, 46, 55, 58, 88, 93, 97, 110, 114, 129, 140, 154], "limit": [46, 87, 97], "line": [42, 47, 54, 58, 93, 97, 110, 124, 140, 154, 199, 200], "link_cap_aspm_option": 161, "link_cap_aspm_optionalitypci": 161, "link_cap_aspm_support": [71, 146, 161], "link_cap_clock_power_manag": [146, 161], "link_cap_clock_power_managementpci": 161, "link_cap_dll_link_active_reporting_cap": [146, 161], "link_cap_dll_link_active_reporting_cappci": 146, "link_cap_l0s_exit_lat": 71, "link_cap_l0s_exit_latency_comclk_gen1": [146, 161], "link_cap_l0s_exit_latency_comclk_gen2": [146, 161], "link_cap_l0s_exit_latency_gen1": [146, 161], "link_cap_l0s_exit_latency_gen2": [146, 161], "link_cap_l1_exit_lat": 71, "link_cap_l1_exit_latency_comclk_gen1": [146, 161], "link_cap_l1_exit_latency_comclk_gen2": [146, 161], "link_cap_l1_exit_latency_gen1": [146, 161], "link_cap_l1_exit_latency_gen2": [146, 161], "link_cap_link_bandwidth_notification_cap": [146, 161], "link_cap_max_link_spe": [146, 161], "link_cap_max_link_width": [146, 161], "link_cap_rsvd_23": 161, "link_cap_rsvd_23_22": 146, "link_cap_surprise_down_error_cap": [146, 161], "link_cap_surprise_down_error_capablepci": [146, 161], "link_control_rcb": [146, 161], "link_ctrl2_deemphasi": [146, 161], "link_ctrl2_deemphasispci": [146, 161], "link_ctrl2_hw_autonomous_speed_dis": [146, 161], "link_ctrl2_target_link_spe": [146, 161], "link_status_slot_clock_config": [71, 146, 161], "link_status_slot_clock_configpci": [146, 161], "linkcapabilityaspmsupport": 130, "linkcapabilitymaxlinkwidth": 130, "linkstatusslotclockconfig": 130, "lint": 183, "list": [17, 35, 160, 188, 189], "liter": 56, "live": [55, 58, 93, 97], "ll": [58, 63, 77, 93, 167], "ll_ack_timeout": [71, 146, 161, 162], "ll_ack_timeout_en": [71, 146, 161, 162], "ll_ack_timeout_func": [146, 161, 162], "ll_cpl_fc_update_tim": 162, "ll_cpl_fc_update_timer_overrid": 162, "ll_fc_update_tim": 162, "ll_fc_update_timer_overrid": 162, "ll_np_fc_update_tim": 162, "ll_np_fc_update_timer_overrid": 162, "ll_p_fc_update_tim": 162, "ll_p_fc_update_timer_overrid": 162, "ll_replay_timeout": [71, 146, 161, 162], "ll_replay_timeout_en": [71, 146, 161, 162], "ll_replay_timeout_func": [146, 161, 162], "llh": [47, 54, 58, 75, 165], "llhc": [170, 175, 180], "llhq": [170, 175, 180], "llkbypass": 130, "llv": [54, 58, 75, 165], "llvc": [170, 175, 180], "llvq": [170, 175, 180], "lnk_trn_cfg_lane0": 141, "lnk_trn_cfg_lane1": 141, "lnk_trn_cfg_lane2": 141, "lnk_trn_cfg_lane3": 141, "lnk_trn_coeff_req_lane0": 141, "lnk_trn_coeff_req_lane1": 141, "lnk_trn_coeff_req_lane2": 141, "lnk_trn_coeff_req_lane3": 141, "load": [16, 35], "locat": [37, 38, 45, 46, 47, 55, 58, 87, 88, 89, 93, 97, 102, 105, 110, 114, 124, 129, 140, 145, 154, 160], "lock": [44, 61, 67, 84], "lock_cnt": [136, 151], "lock_cntmmcm": [136, 151], "lock_cntpll": 151, "lock_fb_dli": [136, 151], "lock_fb_dlymmcm": [136, 151], "lock_fb_dlypl": 151, "lock_ref_dli": [136, 151], "lock_ref_dlymmcm": [136, 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184, 186, 187, 199], "longer": [34, 46, 58, 140], "look": 35, "loop": [36, 44, 67, 84], "loopback_cfg": [155, 156], "loopback_cfggth_channel": 155, "loopback_cfggtp_channel": 156, "loopback_drp_en": 142, "loopback_drp_en_0": 66, "loopback_drp_en_1": 66, "loopback_drp_en_1gtp": 66, "loopback_drp_engtx0": 142, "loopback_drp_engtx1": 142, "loopback_drp_engtx2": 142, "loopback_drp_engtx3": 142, "loopcal_wait": 111, "low": [14, 15, 16, 35, 36, 46, 47, 58, 72, 87, 88, 89, 102, 120, 136, 151, 189, 199], "low0": [7, 47, 51, 52, 64, 89, 92, 108, 120], "low00": [108, 120], "low1": [2, 3, 4, 5, 6, 8, 9], "low11": 47, "low_voltag": 160, "lower": [36, 41, 46, 54, 58, 67, 87, 88, 93, 96, 102, 110, 114, 124, 129, 140], "lower1": [102, 116, 132, 147], "lowercas": [17, 189], "lowpriorityvccount": 130, "lpon_b_df": 51, "lr": [58, 63, 67, 74, 76, 77, 93, 160, 164, 166, 167, 169, 171, 174, 176, 179, 181], "lrtb": 58, "lsb": [46, 88], "lt": [54, 75, 165, 170, 175, 180], "ltr_tx_message_minimum_interv": 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"out_r5gclkc": 89, "out_r6": [47, 89], "out_r6gclkc": 89, "out_r7": [47, 89], "out_r7gclkc": 89, "out_t0": [38, 47, 89], "out_t1": [38, 47, 89], "out_t1gclkh": [38, 47, 89], "out_t2": [38, 47, 89], "out_t2gclkh": [38, 47, 89], "out_t3": [38, 47, 89], "out_t3gclkh": [38, 47, 89], "out_t4": [38, 47, 89], "out_t4gclkh": [38, 47, 89], "out_t5": [38, 47, 89], "out_t5gclkh": [38, 47, 89], "out_t6": [38, 47, 89], "out_t6gclkh": [38, 47, 89], "out_t7": [38, 47, 89], "out_t7gclkh": [38, 47, 89], "out_uim": 36, "outbus0": 89, "outbus1": 89, "outbus2": 89, "outbus3": 89, "outbus4": 89, "outbus4dcmconn": 89, "outbus5": 89, "outbus5dcmconn": 89, "outbus6": 89, "outbus7": 89, "outd_clkout0": 61, "outd_clkout1": 61, "outd_lock": 61, "outer": [140, 145], "outff0": 69, "outgo": 97, "outl_clkout0": 61, "outl_clkout1": 61, "outl_locked0": 61, "outl_locked1": 61, "output": [11, 12, 33, 34, 35, 41, 44, 54, 56, 67, 74, 75, 84, 87, 96, 98, 102, 110, 112, 124, 127, 140, 143, 154, 158, 164, 165, 169, 170, 174, 175, 179, 180, 185, 197, 199], "output0001": [57, 99], "output001": [114, 129, 145], "output01": 160, "output_clk_src": 151, "output_delai": [129, 145, 160], "output_delayiob0": 129, "output_delayiob1": 129, "output_diff": [57, 99], "output_diff_group": 57, "output_dis": 151, "output_disableout_fifo": 151, "output_en": [57, 69, 99, 114, 129, 145, 160], "output_half0010": [57, 99], "output_half010": [114, 129, 145], "output_half10": 160, "output_ht_25101000000001100011": 129, "output_ht_25101100000011001110": 145, "output_ldt_2501100110": 114, "output_low_voltag": 69, "output_lvds110000000001110111": 160, "output_lvds_2501101010": 114, "output_lvds_25100000000001100011": 129, "output_lvds_25100100000000011110": 145, "output_lvds_2510101100001110000000000000": 160, "output_lvds_25_dci01000000": 114, "output_lvdsext_25110000000001000101": 129, "output_lvdsext_25110100000000011110": 145, "output_lvdsext_2511100010": 114, "output_lvdsext_25_dci11000000": 114, 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21, 22, 23, 24, 25, 192, 193, 194, 195], "p105": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p106": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p107": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p108": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p109": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p11": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p110": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p111": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p112": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p113": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p114": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p115": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 192, 193, 194, 195], "p116": [2, 3, 6, 7, 18, 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[3, 6, 7], "p218": [3, 6, 7], "p219": [3, 6, 7], "p22": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p220": [3, 6, 7], "p221": [3, 6, 7], "p222": [3, 6, 7], "p223": [6, 7], "p224": [6, 7], "p225": [6, 7], "p226": [6, 7], "p227": [6, 7], "p228": [6, 7], "p229": [6, 7], "p23": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p230": [6, 7], "p231": [6, 7], "p232": [6, 7], "p233": [6, 7], "p234": [6, 7], "p235": [6, 7], "p236": [6, 7], "p237": [6, 7], "p238": [6, 7], "p239": [6, 7], "p24": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p240": [6, 7], "p241": [6, 7], "p242": [6, 7], "p243": [6, 7], "p244": [6, 7], "p245": [6, 7], "p246": [6, 7], "p247": [6, 7], "p248": [6, 7], "p249": [6, 7], "p25": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p250": [6, 7], "p251": [6, 7], "p252": [6, 7], "p253": [6, 7], "p254": [6, 7], "p255": [6, 7], "p256": [6, 7], "p257": [6, 7], "p258": [6, 7], "p259": [6, 7], "p26": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p260": [6, 7], "p261": [6, 7], "p262": [6, 7], "p263": [6, 7], "p264": [6, 7], "p265": [6, 7], "p266": [6, 7], "p267": [6, 7], "p268": [6, 7], "p269": [6, 7], "p27": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p270": [6, 7], "p271": [6, 7], "p272": [6, 7], "p273": [6, 7], "p274": [6, 7], "p275": [6, 7], "p276": [6, 7], "p277": [6, 7], "p278": [6, 7], "p279": [6, 7], "p28": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p280": [6, 7], "p281": [6, 7], "p282": [6, 7], "p283": [6, 7], "p284": [6, 7], "p285": [6, 7], "p286": [6, 7], "p287": [6, 7], "p288": [6, 7], "p289": 7, "p29": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p290": 7, "p291": 7, "p292": 7, "p293": 7, "p294": 7, "p295": 7, "p296": 7, "p297": 7, "p298": 7, "p299": 7, "p2clk": 70, "p2cmdclk": 70, "p2cmden": 70, "p2en": 70, "p3": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 102, 190, 191, 192, 193, 194, 195], "p30": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p300": 7, "p301": 7, "p302": 7, "p303": 7, "p304": 7, "p305": 7, "p306": 7, "p307": 7, "p308": 7, "p309": 7, "p31": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p310": 7, "p311": 7, "p312": 7, "p313": 7, "p314": 7, "p315": 7, "p316": 7, "p317": 7, "p318": 7, "p319": 7, "p32": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p320": 7, "p321": 7, "p322": 7, "p323": 7, "p324": 7, "p33": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p34": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p35": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p36": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p37": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p38": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p39": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p3clk": 70, "p3cmdclk": 70, "p3cmden": 70, "p3en": 70, "p4": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p40": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p41": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p42": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p43": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p44": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p45": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p46": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p47": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p48": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p49": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p4clk": 70, "p4cmdclk": 70, "p4cmden": 70, "p4en": 70, "p5": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p50": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p51": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p52": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p53": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p54": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p55": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p56": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p57": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p58": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p59": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p5clk": 70, "p5cmdclk": 70, "p5cmden": 70, "p5en": 70, "p6": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p60": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p61": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p62": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p63": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p64": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 27, 29, 30, 31, 191, 192, 193, 194, 195], "p65": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p66": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p67": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p68": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p69": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p7": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p70": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p71": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p72": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p73": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p74": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p75": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p76": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p77": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p78": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p79": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p8": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p80": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p81": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p82": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p83": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p84": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p85": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p86": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p87": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p88": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p89": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p9": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 190, 191, 192, 193, 194, 195], "p90": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p91": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p92": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p93": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p94": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p95": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p96": [2, 3, 6, 7, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p97": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p98": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p99": [2, 3, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 29, 30, 31, 191, 192, 193, 194, 195], "p_d": 87, "packag": [11, 17, 33, 36, 56, 154, 160, 189, 197, 199], "pad": [2, 3, 4, 5, 6, 7, 8, 9, 12, 14, 15, 16, 17, 34, 36, 55, 97, 114, 129, 145, 160, 189, 198, 200], "pair": [17, 58, 88, 102, 110, 114, 129, 145, 154, 160, 189], "parallel": [16, 114, 129, 145, 160], "paramet": [2, 3, 4, 5, 6, 7, 8, 9, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 189, 190, 191, 192, 193, 194, 195], "pariti": [87, 102], "part": [2, 3, 4, 5, 6, 7, 8, 9, 12, 33, 34, 46, 58, 88, 102, 114, 129, 154, 190, 191, 192, 193, 194, 195, 197, 199], "partial": [34, 87, 102, 199], "particip": 36, "particular": [17, 189], "particularli": 46, "pass": [35, 55, 58, 73, 74, 76, 77, 78, 79, 85, 97, 140, 154, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186], "pass0": [64, 72, 120], "pass00000000": 108, "pass00000000000001": 119, "pass00000000001": 119, "pass00000001": 119, "pass10000100000011111": 106, "pass100001000011111": 106, "passthrough": 97, "patdet1": 122, "path": [36, 87], "pattern": [93, 122, 138, 153], "pattern0": [122, 138, 153], "pbbaseptr": 130, "pbcapabilitydw0basepow": 130, "pbcapabilitydw0datascal": 130, "pbcapabilitydw0pmst": 130, "pbcapabilitydw0pmsubst": 130, "pbcapabilitydw0powerrail": 130, "pbcapabilitydw0typ": 130, "pbcapabilitydw1basepow": 130, "pbcapabilitydw1datascal": 130, "pbcapabilitydw1pmst": 130, "pbcapabilitydw1pmsubst": 130, "pbcapabilitydw1powerrail": 130, "pbcapabilitydw1typ": 130, "pbcapabilitydw2basepow": 130, "pbcapabilitydw2datascal": 130, "pbcapabilitydw2pmst": 130, "pbcapabilitydw2pmsubst": 130, "pbcapabilitydw2powerrail": 130, "pbcapabilitydw2typ": 130, "pbcapabilitydw3basepow": 130, "pbcapabilitydw3datascal": 130, "pbcapabilitydw3pmst": 130, "pbcapabilitydw3pmsubst": 130, "pbcapabilitydw3powerrail": 130, "pbcapabilitydw3typ": 130, "pbcapabilitynextptr": 130, "pbcapabilitysystemalloc": 130, "pc44": [4, 5, 8, 9, 12, 26, 27, 28, 29, 30, 31, 34, 190, 191, 198], "pc84": [18, 29, 34], "pcd_2ui_cfg": 156, "pci": [44, 56, 58, 67, 84, 96, 97, 98, 127, 143, 158], "pci000": 97, "pci001111": 160, "pci01111": 160, "pci100": 97, "pci11": 69, "pci33_3": [57, 69, 85], "pci33_30": [57, 99], "pci33_300": [57, 99], "pci33_30000": 99, "pci33_300000": [57, 99], "pci33_3000000": 129, "pci33_3000000000000": 129, "pci33_3000001": 57, "pci33_300010001": 69, "pci33_300010011": 114, "pci33_3001": 160, "pci33_30011001111": 160, "pci33_300111": 85, "pci33_30100101011": 99, "pci33_30100101101": 114, "pci33_30101001101": 129, "pci33_3010101110": 99, "pci33_30111": 85, "pci33_301111100": 57, "pci33_310": 114, "pci33_3100001101": 85, "pci33_3100010010": 85, "pci33_3100110": 57, "pci33_311001001": 57, "pci33_31110111": 160, "pci33_3111110": 57, "pci33_5": 85, "pci33_501111": 85, "pci33_5101011001": 85, "pci66_3": [57, 69, 85], "pci66_30": [57, 99], "pci66_300": [57, 99], "pci66_300000": [57, 99], "pci66_3000000": 129, "pci66_3000000000000": 129, "pci66_3000001": 57, "pci66_300010001": 69, "pci66_300010011": 114, "pci66_30011": 99, "pci66_300111": 85, "pci66_30100101011": 99, "pci66_30100101101": 114, "pci66_30101001101": 129, "pci66_3010101110": 99, "pci66_30111": 85, "pci66_301111100": 57, "pci66_310": 114, "pci66_3100001101": 85, "pci66_3100001110": 85, "pci66_3100110": 57, "pci66_311001001": 57, "pci66_3111110": 57, "pci_c": 82, "pci_ce010001": 85, "pci_ce1": 69, "pci_ce_delai": 67, "pci_cemisc": 82, "pci_clamp": [57, 69], "pci_clampiob0": 57, "pci_clampiob1": 57, "pci_clampiob3": 57, "pci_clampiob4": 57, "pci_delai": 86, "pci_express_mod": 142, "pci_express_mode_0": [66, 125, 126], "pci_express_mode_1": [66, 125, 126], "pci_express_mode_1gtp": 66, "pci_input": [57, 69], "pci_inputiob1": 57, "pci_inputiob2": 57, "pci_inputiob3": 57, "pci_inputiob4": 57, "pci_inputiob5": 57, "pcice10": 57, "pcice_mux": 57, "pcie": [71, 124, 130, 140, 146, 154, 161], "pcie0": [66, 125, 126], "pcie2": 154, "pcie3": [154, 162], "pcie_base_ptr": [146, 161], "pcie_cap_capability_id": [146, 161], "pcie_cap_capability_vers": [71, 146, 161], "pcie_cap_device_port_typ": [71, 146, 161], "pcie_cap_int_msg_num": [71, 146], "pcie_cap_nextptr": [146, 161], "pcie_cap_on": [146, 161], "pcie_cap_onpci": [146, 161], "pcie_cap_rsvd_15_14": [146, 161], "pcie_cap_slot_impl": [71, 146, 161], "pcie_gener": 71, "pcie_l": 154, "pcie_r": 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91, 104, 117, 133, 148, 184], "progpinint": 184, "program": [11, 14, 15, 16, 17, 33, 36, 188, 197, 198, 200], "program011": 63, "program_b": [114, 129, 145, 160], "program_tim": 17, "programm": [35, 36, 55, 97, 200], "progress": 35, "prom_data": 115, "propag": [36, 46, 88], "properti": 154, "proport": [110, 124, 140, 154], "protect": [14, 36, 188, 200], "provid": [17, 58, 93, 110, 124, 154, 188, 189], "ps_center": [51, 92, 108, 120], "ps_centereddcm": 108, "ps_centereddcm0": 120, "ps_centereddcm1": 120, "ps_direct": [108, 120], "ps_directdcm": 108, "ps_enabl": [51, 52, 92, 108, 120], "ps_enabledcm": [51, 108], "ps_mode": [51, 92, 108, 120], "ps_modedcm": 108, "ps_variabl": 52, "psclk101": 55, "psen": [51, 52, 64, 92, 108, 120, 136, 151], "psen010": 55, "psendcm": [92, 108], "psenmmcm": 151, "psincdec": [51, 52, 64, 92, 108, 120, 136, 151], "psincdec100": 55, "psincdecdcm": 92, "psincdecdcm0": 120, "psincdecdcm1": 120, "psincdecmmcm0": 136, "psincdecmmcm1": 136, "pslew": [57, 63, 69, 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"rx_cfg1_lane3": 141, "rx_cfg2_lane0": 141, "rx_cfg2_lane1": 141, "rx_cfg2_lane2": 141, "rx_cfg2_lane3": 141, "rx_clk25_div": [155, 156, 157], "rx_clk25_divid": 142, "rx_clkmux_en": 156, "rx_clkmux_engtp_channel": 156, "rx_clkmux_pd": [155, 157], "rx_clkmux_pdgth_channel": 155, "rx_clkmux_pdgtx_channel": 157, "rx_clock_divid": 111, "rx_cm_sel": [155, 156, 157], "rx_cm_trim": [155, 156, 157], "rx_crc_use": [94, 95], "rx_ctle_ctrl_lane0": 141, "rx_ctle_ctrl_lane1": 141, "rx_ctle_ctrl_lane2": 141, "rx_ctle_ctrl_lane3": 141, "rx_ctrl_ovrd_lane0": 141, "rx_ctrl_ovrd_lane1": 141, "rx_ctrl_ovrd_lane2": 141, "rx_ctrl_ovrd_lane3": 141, "rx_data_width": [94, 142, 155, 156, 157], "rx_ddi_sel": [155, 156, 157], "rx_debug_cfg": [155, 156, 157], "rx_decode_seq_match": 142, "rx_decode_seq_match_0": [66, 125, 126], "rx_decode_seq_match_0gtp_du": 125, "rx_decode_seq_match_0gtx_du": 126, "rx_decode_seq_match_1": [66, 125, 126], "rx_decode_seq_match_1gtp": 66, "rx_decode_seq_match_1gtp_du": 125, "rx_decode_seq_match_1gtx_du": 126, "rx_decode_us": 94, "rx_defer_reset_buf_en": [155, 156, 157], "rx_defer_reset_buf_ength_channel": 155, "rx_defer_reset_buf_engtp_channel": 156, "rx_defer_reset_buf_engtx_channel": 157, "rx_dfe_agc_cfg0": 155, "rx_dfe_agc_cfg1": 155, "rx_dfe_agc_cfg2": 155, "rx_dfe_agc_ovrden": 155, "rx_dfe_gain_cfg": [155, 157], "rx_dfe_h2_cfg": [155, 157], "rx_dfe_h3_cfg": [155, 157], "rx_dfe_h4_cfg": [155, 157], "rx_dfe_h5_cfg": [155, 157], "rx_dfe_h6_cfg": 155, "rx_dfe_h7_cfg": 155, "rx_dfe_kl_cfg": [155, 157], "rx_dfe_kl_cfg2": 157, "rx_dfe_kl_lpm_kh_cfg0": 155, "rx_dfe_kl_lpm_kh_cfg1": 155, "rx_dfe_kl_lpm_kh_cfg2": 155, "rx_dfe_kl_lpm_kh_ovrden": 155, "rx_dfe_kl_lpm_kl_cfg0": 155, "rx_dfe_kl_lpm_kl_cfg1": 155, "rx_dfe_kl_lpm_kl_cfg2": 155, "rx_dfe_kl_lpm_kl_ovrden": 155, "rx_dfe_kl_lpm_kl_ovrdength_channel": 155, "rx_dfe_lpm_cfg": [155, 157], "rx_dfe_lpm_hold_during_eidl": [155, 157], "rx_dfe_lpm_hold_during_eidlegth_channel": 155, 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"rx_status_fmt_0gtp": 66, "rx_status_fmt_0gtp_du": 125, "rx_status_fmt_0gtx_du": 126, "rx_status_fmt_1": [66, 125, 126], "rx_status_fmt_1gtp": 66, "rx_status_fmt_1gtp_du": 125, "rx_status_fmt_1gtx_du": 126, "rx_xclk_sel": [142, 155, 156, 157], "rx_xclk_sel_0": [66, 125, 126], "rx_xclk_sel_1": [66, 125, 126], "rx_xclk_sel_1gtp": 66, "rx_xclk_selgth_channel": 155, "rx_xclk_selgtp_channel": 156, "rx_xclk_selgtx_channel": 157, "rxactst": 111, "rxadcadjpd": 111, "rxafeeq": 111, "rxafepd": 111, "rxafetst": 111, "rxapd": 111, "rxaptst": 111, "rxaregctrl": 111, "rxasyncdivid": 111, "rxauto_c": 111, "rxbclk0010": 111, "rxbiaspd": 111, "rxbuf_addr_mod": [155, 156, 157], "rxbuf_eidle_hi_cnt": [155, 156, 157], "rxbuf_eidle_lo_cnt": [155, 156, 157], "rxbuf_en": [155, 156, 157], "rxbuf_engtp_channel": 156, "rxbuf_ovfl_thresh": 142, "rxbuf_ovrd_thresh": 142, "rxbuf_ovrd_threshgtx0": 142, "rxbuf_ovrd_threshgtx1": 142, "rxbuf_ovrd_threshgtx2": 142, "rxbuf_ovrd_threshgtx3": 142, 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"rxcdr_fr_reset_on_eidlegtx_channel": 157, "rxcdr_hold_during_eidl": [155, 156, 157], "rxcdr_lock_cfg": [155, 156, 157], "rxcdr_pciereset_wait_tim": [155, 156, 157], "rxcdr_ph_reset_on_eidl": [155, 156, 157], "rxcdrfreqreset_tim": [155, 156, 157], "rxcdrlo": 111, "rxcdrphreset_tim": [155, 156, 157], "rxcdrreset_tim": [155, 156, 157], "rxclk0_force_pmaclk": 111, "rxclk0_invert_pmaleaf": 111, "rxclkmode": 111, "rxclmode": 111, "rxcmadj": 111, "rxcmfpd": 111, "rxcmftst": 111, "rxcpsel": 111, "rxcptst": 111, "rxcrcclockdoubl": 111, "rxcrcenabl": 111, "rxcrcinitv": 111, "rxcrcinvertgen": 111, "rxcrcsameclock": 111, "rxctrl1": 111, "rxcycle_limit_sel": 111, "rxdacsel": 111, "rxdactst": 111, "rxdata_sel": 111, "rxdccoupl": 111, "rxdfelpmreset_tim": [155, 157], "rxdigreset": 111, "rxdigrx": 111, "rxdivbufpd": 111, "rxdivbuftst": 111, "rxdivpd": 111, "rxdivtst": 111, "rxdly_cfg": [155, 156, 157], "rxdly_lcfg": [155, 156, 157], "rxdly_tap_cfg": [155, 156, 157], "rxeq": 111, "rxeq_cfg_0": 66, "rxeq_cfg_1": 66, "rxeq_drp_en_0": 66, "rxeq_drp_en_1": 66, "rxeq_drp_en_1gtp": 66, "rxfdcal_clock_divid": 111, "rxfdet_hys_c": 111, "rxfdet_hys_sel": 111, "rxfdet_lck_cal": 111, "rxfdet_lck_sel": 111, "rxfecontrol1": 111, "rxfecontrol2": 111, "rxfetun": 111, "rxfilttst": 111, "rxgearbox_en": [155, 156, 157], "rxgearbox_ength_channel": 155, "rxgearbox_engtp_channel": 156, "rxgearbox_engtx_channel": 157, "rxgearbox_us": 142, "rxgearbox_use_0": 126, "rxgearbox_use_1": 126, "rxiscanreset_tim": [155, 156, 157], "rxlb": 111, "rxlkadj": 111, "rxlkapd": 111, "rxloopcal_wait": 111, "rxloopfilt": 111, "rxlpm_bias_startup_dis": 156, "rxlpm_cfg": 156, "rxlpm_cfg1": 156, "rxlpm_cfg1gtp_channel": 156, "rxlpm_cm_cfg": 156, "rxlpm_cm_cfggtp_channel": 156, "rxlpm_gc_cfg": 156, "rxlpm_gc_cfg2": 156, "rxlpm_hf_cfg": [155, 156, 157], "rxlpm_hf_cfg2": 156, "rxlpm_hf_cfg3": 156, "rxlpm_hold_during_eidl": 156, "rxlpm_hold_during_eidlegtp_channel": 156, "rxlpm_incm_cfg": 156, "rxlpm_incm_cfggtp_channel": 156, "rxlpm_ipcm_cfg": 156, "rxlpm_lf_cfg": [155, 156, 157], "rxlpm_lf_cfg2": 156, "rxlpm_osint_cfg": 156, "rxlpmreset_tim": 156, "rxmode": 111, "rxoob_cfg": [155, 156, 157], "rxoob_clk_cfg": [155, 156], "rxoscalreset_tim": [155, 156], "rxoscalreset_timeout": [155, 156], "rxout_div": [155, 156, 157], "rxoutclk0": 156, "rxoutclk001000001": 156, "rxoutclk0hclk_gtp_mid": 156, "rxoutclk1": 156, "rxoutclk101000010": 156, "rxoutclk2": 156, "rxoutclk210000001": 156, "rxoutclk3": 156, "rxoutclk310000010": 156, "rxoutclk3hclk_gtp_mid": 156, "rxoutdiv2sel": 111, "rxpcshclkouta100": 111, "rxpcshclkoutb110": 111, "rxpcsreset_tim": [155, 156, 157], "rxpd": 111, "rxpddtst": 111, "rxpfdtst": 111, "rxpfdtx": 111, "rxph_cfg": [155, 156, 157], "rxph_monitor_sel": [155, 156, 157], "rxphdly_cfg": [155, 156, 157], "rxpi_cfg0": [155, 156], "rxpi_cfg1": [155, 156], "rxpi_cfg1gtp_channel": 156, "rxpi_cfg2": [155, 156], "rxpi_cfg3": 155, "rxpi_cfg4": 155, "rxpi_cfg4gth_channel": 155, "rxpi_cfg5": 155, "rxpi_cfg6": 155, "rxpll1": 142, "rxpll_com_cfg": 142, "rxpll_cp_cfg": 142, "rxpll_divsel45_fb": 142, "rxpll_divsel45_fbgtx0": 142, "rxpll_divsel45_fbgtx1": 142, "rxpll_divsel45_fbgtx2": 142, "rxpll_divsel45_fbgtx3": 142, "rxpll_divsel_fb": 142, "rxpll_divsel_out": 142, "rxpll_divsel_ref": 142, "rxpll_lkdet_cfg": 142, "rxpll_sel": [155, 156, 157], "rxpll_selgth_channel": 155, "rxpll_selgtp_channel": 156, "rxpll_selgtx_channel": 157, "rxpll_startup_en": 142, "rxpllndivsel": 111, "rxpllrefclk_div1110": 142, "rxpllrefclk_div2001": 142, "rxpllrefsel_mod": 142, "rxpllrefsel_modegtx0": 142, "rxpllrefsel_modegtx1": 142, "rxpllrefsel_modegtx2": 142, "rxpllrefsel_modegtx3": 142, "rxpllrefsel_stat": 142, "rxpllrefsel_testclk": 142, "rxpllrefsel_testclkgtx0": 142, "rxpllrefsel_testclkgtx1": 142, "rxpllrefsel_testclkgtx2": 142, "rxpllrefsel_testclkgtx3": 142, "rxpmaclksel": 111, "rxpmareset_tim": [155, 156, 157], "rxprbs_err_loopback": [155, 156, 157], "rxprbs_err_loopbackgth_channel": 155, "rxprbs_err_loopbackgtp_channel": 156, "rxprbs_err_loopbackgtx_channel": 157, "rxprbserr_loopback": 142, "rxprbserr_loopback_0": 66, "rxprbserr_loopback_0gtp": 66, "rxprbserr_loopback_1": 66, "rxprbserr_loopback_1gtp": 66, "rxprbserr_loopbackgtx0": 142, "rxprbserr_loopbackgtx1": 142, "rxprbserr_loopbackgtx2": 142, "rxprbserr_loopbackgtx3": 142, "rxqppd": 111, "rxrcpadj": 111, "rxrcppd": 111, "rxreadaddrpip": 130, "rxreadaddrpipepci": 130, "rxreaddatapip": 130, "rxrec0": [66, 125, 126, 142, 155, 156, 157], "rxrecclk1_use_sync": 111, "rxrecclk_ctrl": 142, "rxrecclk_dli": 142, "rxrecclkpcs000": 142, "rxrecclkpma_div1100": 142, "rxrecclkpma_div2010": 142, "rxribadj": 111, "rxrpdpd": 111, "rxrsdpd": 111, "rxsipo_div_45": [155, 156, 157], "rxslide_auto_wait": [155, 156, 157], "rxslide_mod": [155, 156, 157], "rxslosel": 111, "rxslowdown_c": 111, "rxsync_multilan": [155, 156], "rxsync_multilanegth_channel": 155, "rxsync_multilanegtp_channel": 156, "rxsync_ovrd": [155, 156], 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23, 24, 25, 26, 27, 28, 29, 30, 31, 34, 114, 129, 145, 160, 189, 190, 191, 192, 193, 194, 195, 198], "tm_bot": [74, 164, 169, 174, 179], "tm_botint": [74, 169, 174, 179], "tm_left": [74, 164, 169, 174, 179], "tm_leftint": [74, 164, 169, 174, 179], "tm_osc": [74, 174, 179], "tm_oscosc": [74, 174, 179], "tm_right": [74, 164, 169, 174, 179], "tm_rightint": [74, 164, 169, 174, 179], "tm_top": [74, 164, 169, 174, 179], "tmds10": 69, "tmds_330110101011110100100000000": 160, "tmds_33101001001010": 50, "tmds_33101001100101": 69, "tmds_331110": 57, "tmds_hp100010": 160, "tmds_lp000010": 160, "tml": 69, "tml_33": 69, "tml_3301000100": 69, "tml_33101001111111": 69, "tmspin": [50, 63, 82, 91, 104, 117, 133, 148], "tmux": [57, 69, 76, 85, 99, 114, 129, 145, 160, 176, 181, 183, 186], "tmux0": [57, 99], "tmux001": 57, "tmux_mux_sel": [136, 151], "tmuxilogic0": 69, "tmuxint": [76, 176, 181, 186], "tmuxiob0": 76, "tmuxiob1": [76, 85], "tmuxiob2": 85, "tmuxiob3": 85, "tmuxioiclk0": 69, "tmuxioiclk1": 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24, 25, 34, 192, 193, 194, 198], "tr": [54, 75, 84, 165, 170, 175, 180, 185], "tr11111": 186, "train": 69, "train_pattern": 69, "trans_time_from_p2": 142, "trans_time_from_p2_0": [66, 125, 126], "trans_time_from_p2_1": [66, 125, 126], "trans_time_non_p2": 142, "trans_time_non_p2_0": [66, 125, 126], "trans_time_non_p2_1": [66, 125, 126], "trans_time_r": [142, 155, 156, 157], "trans_time_to_p2": 142, "trans_time_to_p2_0": [66, 125, 126], "trans_time_to_p2_1": [66, 125, 126], "transceiv": [44, 67, 96, 97, 98, 110, 112, 114, 127, 129, 143, 158], "transfer": [2, 3, 4, 5, 6, 7], "translat": 188, "transmit": [15, 16], "trd_dly_l": [116, 132, 147], "trd_dly_u": [116, 132, 147], "treat": 154, "trenchcoat": 56, "tri": 36, "trig": [74, 164, 169, 174, 179, 184], "trigger": [14, 35, 46, 56, 88, 98], "trim": [124, 143], "trim0": 158, "trim1": 158, "trim2": 158, "trim_bitstream": 152, "trim_lp_b": 51, "trim_lp_bdcm": 51, "trim_reg": 152, "trim_spar": 152, "tripl": 140, "tristat": [36, 96, 97], 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141, "tx_pwr_rate_ovrd_lane1": 141, "tx_pwr_rate_ovrd_lane2": 141, "tx_pwr_rate_ovrd_lane3": 141, "tx_qpi_status_en": [155, 157], "tx_rxdetect_cfg": [155, 156, 157], "tx_rxdetect_precharge_tim": 155, "tx_rxdetect_ref": [155, 156, 157], "tx_sync_filterb": 125, "tx_sync_filterbgtp_du": 125, "tx_tdcc_cfg": 142, "tx_tdcc_cfg_0": 66, "tx_tdcc_cfg_1": 66, "tx_usrclk_cfg": 142, "tx_xclk_sel": [142, 155, 156, 157], "tx_xclk_sel_0": [66, 125, 126], "tx_xclk_sel_1": [66, 125, 126], "tx_xclk_sel_1gtp": 66, "tx_xclk_selgtx0": 142, "tx_xclk_selgtx1": 142, "tx_xclk_selgtx2": 142, "tx_xclk_selgtx3": 142, "txabpmaclksel": 111, "txadcadjpd": 111, "txapd": 111, "txaptst": 111, "txarefbiassel": 111, "txasyncdivid": 111, "txbiaspd": 111, "txbuf_en": [155, 156, 157], "txbuf_ength_channel": 155, "txbuf_engtp_channel": 156, "txbuf_engtx_channel": 157, "txbuf_reset_on_rate_chang": [155, 156, 157], "txbuf_reset_on_rate_changegth_channel": 155, "txbuf_reset_on_rate_changegtp_channel": 156, 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163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193], "v600": [169, 171, 174, 176, 179, 181], "v600011": [73, 163, 168, 173, 178], "v60010110": [172, 177, 182], "v6001101101": [73, 163], "v60011011011": [73, 76, 163, 166], "v6001101101111111111": [168, 173, 178], "v60011011011111111111": [168, 171, 173, 176, 178, 181], "v6001111111011011": [168, 171, 173, 176, 178, 181], "v601": [76, 166], "v60101111110010111": [168, 171, 173, 176, 178, 181], "v6010111111011110": [168, 173, 178], "v60101111110111101": [168, 171, 173, 176, 178, 181], "v60110": 184, "v601101100": [76, 166], "v6011011001": [73, 163], "v601101100111111111": [171, 176, 181], "v6011011001111111111": [168, 173, 178], "v60110111": [172, 177, 182], "v601101111": [73, 163], "v601101111111": [168, 173, 178], "v60111": [74, 164, 171, 176, 181], "v60111101": [172, 177, 182], "v6011111": [169, 174, 179], "v610111101": [73, 76, 163, 166], "v610111101111111111": [168, 171, 173, 176, 178, 181], "v611": [169, 171, 174, 176, 179, 181, 184], "v6110": 184, "v61100": [171, 176, 181], "v6110011": [169, 174, 179], "v6110011111": [73, 76, 163, 166], "v6110011111111111111": [168, 171, 173, 176, 178, 181], "v611011": [169, 171, 174, 176, 179, 181], "v6111111011": 184, "v611111111": [76, 166], "v6111111111": [73, 163], "v611111111111111111": [171, 176, 181], "v6111111111111111111": [168, 173, 178], "v6int": [168, 169, 171, 173, 174, 176, 178, 179, 181, 184, 186], "v6tbuf3": 186, "v7": [24, 25, 73, 74, 76, 163, 164, 166, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 183, 184, 186, 187, 193], "v700": [169, 171, 172, 174, 176, 177, 179, 181, 182], "v700011": [73, 163, 168, 173, 178], "v700101101": [73, 76, 163, 166], "v700101101111111111": [168, 171, 173, 176, 178, 181], "v700101110": [76, 166], "v7001011101": [73, 163], "v700101110111111111": [171, 176, 181], "v7001011101111111111": [168, 173, 178], "v700110101": [73, 163, 166], "v700110101111111111": [168, 171, 173, 176, 178, 181], "v701": [169, 171, 174, 176, 179, 181], "v70101111": [172, 177, 182], "v7010111111011011": [171, 176, 181], "v70101111110110111": [168, 173, 178], "v70101111111111101": [168, 171, 173, 176, 178, 181], "v70111": 184, "v7011101111011110": [168, 171, 173, 176, 178, 181], "v701111": [73, 163, 168, 173, 178], "v701111101": [76, 166], "v7011111011": [73, 163], "v701111101111111111": [171, 176, 181], "v7011111011111111111": [168, 173, 178], "v710": 184, "v7101111101": [73, 163], "v71011111011": [73, 76, 163, 166], "v7101111101111111111": [168, 173, 178], "v71011111011111111111": [168, 171, 173, 176, 178, 181], "v711011": [169, 171, 174, 176, 179, 181], "v7111": 184, "v7111100": [171, 176, 181], "v711110011": [169, 174, 179], "v7111111101": 184, "v7111111111": [73, 76, 163, 166], "v7111111111111111111": [168, 171, 173, 176, 178, 181], "v7int": 184, "v7iob1": [176, 181], "v8": [24, 25, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 193], "v80010110": [172, 177, 182], "v801": [169, 171, 174, 176, 179, 181], "v8010111111101110": [168, 173, 178], "v80101111111011101": [168, 171, 173, 176, 178, 181], "v80101111111110111": [168, 171, 173, 176, 178, 181], "v8011101111111110": [168, 171, 173, 176, 178, 181], "v811101": [169, 171, 174, 176, 179, 181], "v8111100": [171, 176, 181], "v811110011": [169, 174, 179], "v8int": [172, 177, 182], "v9": [24, 25, 168, 169, 171, 172, 173, 174, 176, 177, 178, 179, 181, 182, 193], "v900": [172, 177, 182], "v9001111111101011": [168, 171, 173, 176, 178, 181], "v901": [169, 171, 174, 176, 179, 181], "v90101": [171, 176, 181], "v9010111111001110": [168, 173, 178], "v90101111110011101": [168, 171, 173, 176, 178, 181], "v9010111111101011": [171, 176, 181], "v90101111111010111": [168, 173, 178], "v9011101111001110": [168, 171, 173, 176, 178, 181], "v910": [169, 171, 174, 176, 179, 181], "v911": [169, 171, 174, 176, 179, 181], "v91100": [171, 176, 181], "v9110011": [169, 174, 179], "v9int": [168, 171, 172, 173, 176, 177, 178, 181, 182], "valid": [15, 16, 35], "valu": [14, 15, 16, 17, 35, 36, 46, 54, 87, 88, 96, 97, 102, 189, 199, 200], "var_load11": 160, "var_loadable00011": 145, "vari": [34, 35, 36, 110, 114, 124, 140, 154, 200], "variabl": [129, 188], "variable00001": 145, "variable01": [129, 160], "variable11": 114, "variable110": 64, "variable_swapped00101": 145, "variant": [12, 34, 36, 55, 58, 93, 97, 110, 124, 140, 154, 160, 200], "variou": [46, 55, 56, 88, 97, 98, 200], "vbg_dll_sel": 121, "vbg_flat_sel": 152, "vbg_pd": [51, 92], "vbg_sel": [51, 52, 92, 121, 137], "vbg_slope_opt": 63, "vbg_vgg_flast_sel": 137, "vbg_vgg_neg_sel": 137, "vbrk": [110, 124], "vc0_cpl_infinit": [71, 146, 161], "vc0_rx_ram_limit": [71, 146, 161], "vc0_total_credits_cd": [71, 146, 161], "vc0_total_credits_ch": [71, 146, 161], "vc0_total_credits_npd": 161, "vc0_total_credits_nph": [71, 146, 161], "vc0_total_credits_pd": [71, 146, 161], "vc0_total_credits_ph": [71, 146, 161], "vc0_tx_lastpacket": [71, 146, 161], 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"vcc11111111111111111111111111111111111111111111111111111111111111111111111111": 6, "vcc11111111111111111111111111111111111111111111111111111111111111111111111111111111111": 195, "vcc1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111": 7, "vcc_gnd": 183, "vccapabilitynextptr": 130, "vccaux": [2, 3, 4, 5, 6, 7, 8, 9, 12], "vccint": [2, 3, 4, 5, 6, 7, 8, 9, 12, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 34], "vccio": [12, 17, 34], "vccio0": [2, 3, 4, 5, 6, 7, 8, 9, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31], "vccio1": [2, 3, 5, 6, 7, 9, 21, 25], "vccio2": [6, 7, 25], "vccio3": [6, 7, 25], "vccosens": 160, "vclk": [169, 171, 172, 174, 176, 177, 179, 181, 182], "vclk0011111": [172, 177, 182], "vclk01": [172, 177, 182], "vclk0101111": [172, 177, 182], "vclk0111011": [172, 177, 182], "vclkh": 77, "vclkint": [172, 177, 182], "vco_1500mhz01": [155, 156, 157], "vco_3000mhz00": [155, 156, 157], "vco_750mhz10": [155, 156, 157], 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125, 126, 127, 128, 133, 134, 135, 136, 137, 140, 141, 142, 143, 144, 148, 149, 150, 151, 152, 154, 155, 156, 157, 158, 159, 160, 165, 170, 175, 180, 185, 199, 200], "top": [17, 38, 47, 61, 78, 83, 89, 97, 189], "tr": [52, 74, 82, 164, 169, 174, 179, 184], "transceiv": [66, 94, 95, 111, 125, 126, 141, 142, 154, 155, 156, 157], "trim": 137, "trim0": 152, "trim1": 152, "trim2": 152, "tristat": 88, "uim": [15, 23, 36], "ul": [40, 50, 91], "uni": 47, "univers": 200, "unk1c": 137, "up": 36, "upper": [40, 50, 63, 91], "ur": [40, 50, 91], "v": 85, "v2": [89, 91, 92, 97, 99], "v2p": [89, 91, 92, 97, 99], "v2px": 89, "valu": [45, 95], "ve": 85, "vertic": 58, "virtex": [46, 84, 85, 87, 91, 94, 95, 96, 99, 112, 127, 143, 158], "w": 97, "wbstar": 152, "wide": [46, 88], "wire": 15, "without": [2, 3, 6, 7, 188], "write": 35, "x": [46, 88, 95], "xa2c128": 2, "xa2c256": 3, "xa2c32a": 5, "xa2c384": 6, "xa2c64a": 9, "xa95144xl": 20, "xa9536xl": 27, "xa9572xl": 30, "xadc": 148, "xc2c128": 2, "xc2c256": 3, "xc2c32": 4, "xc2c32a": 5, "xc2c384": 6, "xc2c512": 7, "xc2c64": 8, "xc2c64a": 9, "xc4000e": 165, "xc4000ex": 170, "xc4000xla": 175, "xc4000xv": 180, "xc5200": 185, "xc9500": [15, 33, 35, 36], "xc9500xl": [16, 33, 35, 36], "xc9500xv": 33, "xc95108": 18, "xc95144": 19, "xc95144xl": 20, "xc95144xv": 21, "xc95216": 22, "xc95288": 23, "xc95288xl": 24, "xc95288xv": 25, "xc9536": 26, "xc9536xl": 27, "xc9536xv": 28, "xc9572": 29, "xc9572xl": 30, "xc9572xv": 31, "xcr3032xl": 190, "xcr3064xl": 191, "xcr3128xl": 192, "xcr3256xl": 193, "xcr3384xl": 194, "xcr3512xl": 195, "xilinx": [11, 33, 44, 197], "xl": 75, "xor": [14, 36], "xpla3": 197, "xv": [16, 35, 36], "zia": 200}}) \ No newline at end of file diff --git a/xilinx/spartanxl/io.html b/xilinx/spartanxl/io.html index c7c48a24..93b7cbc7 100644 --- a/xilinx/spartanxl/io.html +++ b/xilinx/spartanxl/io.html @@ -124,9 +124,9 @@

IO.L IO.L bittile 0RowColumn012345678910111213141516171819202122232425 0 -INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW +INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW 1 -INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1] +INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1] 2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D 3 @@ -140,9 +140,9 @@

IO.L7 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D 8 -~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1 +~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1 9 -~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T +~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T @@ -500,9 +500,9 @@

IO.L

IO.L bittile 1
RowColumn
0
0.SINGLE.H20111
NONE1111
-
+
- + @@ -561,9 +561,9 @@

IO.L

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -645,9 +645,9 @@

IO.L.T

- + - + @@ -661,9 +661,9 @@

IO.L.T

 - + - +
INT:MUX.IMUX.IOB0.CE[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
IO.L.T bittile 0
RowColumn
012345678910111213141516171819202122232425
0INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -1021,9 +1021,9 @@

IO.L.T

IO.L.T bittile 1
RowColumn
0
0.SINGLE.H20111
NONE1111
-
+
- + @@ -1082,9 +1082,9 @@

IO.L.T

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -1166,9 +1166,9 @@

IO.LS

- + - + @@ -1182,9 +1182,9 @@

IO.LS

 - + - +
INT:MUX.IMUX.IOB0.CE[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
IO.LS bittile 0
RowColumn
012345678910111213141516171819202122232425
0INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -1542,9 +1542,9 @@

IO.LS

IO.LS bittile 1
RowColumn
0
0.SINGLE.H20111
NONE1111
-
+
- + @@ -1603,9 +1603,9 @@

IO.LS

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -1687,9 +1687,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB0.CE[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
- + - + @@ -1703,9 +1703,9 @@

IO.LS.B<

- + - +
IO.LS.B bittile 0
RowColumn
012345678910111213141516171819202122232425
0INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
INT:MUX.LONG.H0[0]-INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[0]-INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]-INT:MUX.LONG.H1[1]--INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[2]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[2]INT:MUX.IMUX.TBUF0.I[4]-INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[0]-INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 --~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[2]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0-INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -2069,9 +2069,9 @@

IO.LS.B<

IO.LS.B bittile 1
RowColumn
0
0.SINGLE.H20111
NONE1111
-
+
- + @@ -2130,9 +2130,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.00101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -2214,9 +2214,9 @@

IO.R

- + - + @@ -2230,9 +2230,9 @@

IO.R

 - + - +
INT:MUX.IMUX.IOB0.CE[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 16, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DOUBLE.H0.0001111
0.LONG.H3.BUF011011
0.LONG.H4011101
IO.R bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -2715,9 +2715,9 @@

IO.R

IO.R bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -2725,9 +2725,9 @@

IO.R

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -3037,9 +3037,9 @@

IO.R.T

- + - + @@ -3053,9 +3053,9 @@

IO.R.T

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
IO.R.T bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -3538,9 +3538,9 @@

IO.R.T

IO.R.T bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -3548,9 +3548,9 @@

IO.R.T

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -3860,9 +3860,9 @@

IO.RS

- + - + @@ -3876,9 +3876,9 @@

IO.RS

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
IO.RS bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -4361,9 +4361,9 @@

IO.RS

IO.RS bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -4371,9 +4371,9 @@

IO.RS

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -4683,9 +4683,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
- + - + @@ -4699,9 +4699,9 @@

IO.RS.B<

- + - +
IO.RS.B bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[0]--INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF0.TS[4]-INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]--INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.LONG.H1[2]-INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[4]-INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[1]-INT:MUX.IMUX.TBUF0.I[4]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]--INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]----INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[2]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]-~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0-~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -5190,9 +5190,9 @@

IO.RS.B<

IO.RS.B bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -5200,9 +5200,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DOUBLE.H0.1001111
0.LONG.H3.BUF011011
0.LONG.H4011101
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -5518,11 +5518,11 @@

IO.B

- + - + - + @@ -5920,9 +5920,9 @@

IO.B

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0]
0.LONG.H00001
0.LONG.H10010
1.DOUBLE.H1.10101
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
70.DOUBLE.H1.011011110
0.SINGLE.H111111111
-
+
- + @@ -6227,9 +6227,9 @@

IO.B

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
0.GCLK0111100
0.SINGLE.V2111111
-
+
- + @@ -6278,11 +6278,11 @@

IO.B.R

- + - + - + @@ -6680,9 +6680,9 @@

IO.B.R

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
70.DOUBLE.H1.011011110
0.SINGLE.H111111111
-
+
- + @@ -6987,9 +6987,9 @@

IO.B.R

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
0.GCLK0111100
0.SINGLE.V2111111
-
+
- + @@ -7038,11 +7038,11 @@

IO.BS

- + - + - + @@ -7440,9 +7440,9 @@

IO.BS

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
70.DOUBLE.H1.011011110
0.SINGLE.H111111111
-
+
- + @@ -7747,9 +7747,9 @@

IO.BS

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
0.GCLK0111100
0.SINGLE.V2111111
-
+
- + @@ -7798,11 +7798,11 @@

IO.BS.L<

- + - + - + @@ -8194,9 +8194,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1-INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1-INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]----~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]----~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
5---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
6 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
7
0.DOUBLE.H1.011011110
0.SINGLE.H111111111
-
+
- + @@ -8501,9 +8501,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 4][0, 2, 4][0, 3, 5]
0.LONG.IO.H20111101
2.DOUBLE.V1.00111110
2.DOUBLE.V0.11011101
0.GCLK0111100
0.SINGLE.V2111111
-
+
- + @@ -8548,11 +8548,11 @@

IO.T

- + - + - + @@ -8775,9 +8775,9 @@

IO.T

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 29, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5FAST0
SLOW1
-
+
- + @@ -9008,9 +9008,9 @@

IO.T

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
0.OUT.BT.IOB1.I2.E011
NONE111
-
+
- + @@ -9048,11 +9048,11 @@

IO.T.R

- + - + - + @@ -9275,9 +9275,9 @@

IO.T.R

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5FAST0
SLOW1
-
+
- + @@ -9508,9 +9508,9 @@

IO.T.R

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
0.OUT.BT.IOB1.I2.E011
NONE111
-
+
- + @@ -9548,11 +9548,11 @@

IO.TS

- + - + - + @@ -9775,9 +9775,9 @@

IO.TS

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
0 -INT:MUX.LONG.V4[0]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[1]-INT:MUX.LONG.V3[0]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[0]-INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[5]--INT:MUX.IMUX.IOB1.IK[4]-INT:MUX.IMUX.IOB1.IK[5]-INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]--~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[0]-INT:MUX.IMUX.IOB0.OK[1]-~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2-INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.E
1---INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
---INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[2]INT:MUX.LONG.V3[2]-INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[5]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]-INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[0]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[0]-INT:MUX.LONG.V1[2]
2INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[2]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5FAST0
SLOW1
-
+
- + @@ -10008,9 +10008,9 @@

IO.TS

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
0.OUT.BT.IOB1.I2.E011
NONE111
-
+
- + @@ -10048,11 +10048,11 @@

IO.TS.L<

- + - + - + @@ -10265,9 +10265,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
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INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]-----~IOB0:IFF_CE_ENABLE_NO_IQ---IOB1:5V_TOLERANT_IOIOB0:5V_TOLERANT_IOIOB0:DRIVE~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E--~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3-
3INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]-----~IOB1:IFF_CE_ENABLE_NO_IQ-IOB1:TMUX-IOB1:DRIVEIOB0:TMUX--~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[4]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
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5
FAST0
SLOW1
-
+
- + @@ -10498,9 +10498,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 0, 3][0, 1, 3][0, 2, 3][0, 1, 2][0, 2, 2][0, 3, 1]
0.LONG.IO.H20111101
1.DOUBLE.V1.00111110
1.DOUBLE.V0.11011101
0.OUT.BT.IOB1.I2.E011
NONE111
-
+
- + diff --git a/xilinx/xc4000e/corner.html b/xilinx/xc4000e/corner.html index e5eb8d13..1a2ec574 100644 --- a/xilinx/xc4000e/corner.html +++ b/xilinx/xc4000e/corner.html @@ -116,11 +116,11 @@

CNR.BL

- + - + - + @@ -336,9 +336,9 @@

CNR.BL

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 29, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DOUBLE.V0.00011111
0.LONG.V50100110
0.LONG.V30111011
1 INT:MUX.IMUX.BUFG.V[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.IMUX.BUFG.V[5]MD2:PULL[0]MD2:PULL[1]---------------------
2INT:MUX.IMUX.BUFG.V[4]INT:MUX.IMUX.BUFG.V[3]INT:MUX.IMUX.BUFG.V[6]INT:MUX.IMUX.BUFG.V[0]INT:MUX.IMUX.IOB1.CE[4]---------------------
INT:MUX.IMUX.BUFG.V[4]INT:MUX.IMUX.BUFG.V[3]INT:MUX.IMUX.BUFG.V[6]INT:MUX.IMUX.BUFG.V[0]INT:MUX.IMUX.IOB1.O1[4]---------------------
3~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOT-INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]-INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]-INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.HMD0:PULL[0]MD0:PULL[1]-
~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOT-INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]-INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]-INT:MUX.LONG.IO.H1[1]-INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.HMD0:PULL[0]MD0:PULL[1]-
4INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
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5 -INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.LONG.IO.V2[4]INT:MUX.LONG.IO.V3[4]--------------------
61.SINGLE.V5101110
0.DOUBLE.H1.1111111
-
+
- + diff --git a/xilinx/xc4000e/io.html b/xilinx/xc4000e/io.html index 450c39e1..59de7492 100644 --- a/xilinx/xc4000e/io.html +++ b/xilinx/xc4000e/io.html @@ -124,9 +124,9 @@

IO.L

- + - + @@ -140,9 +140,9 @@

IO.L

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 4, 4][0, 4, 2][0, 5, 4][0, 4, 3][0, 6, 4][0, 7, 4]
INT:MUX.IMUX.IOB1.O1[0, 4, 4][0, 4, 2][0, 5, 4][0, 4, 3][0, 6, 4][0, 7, 4]
1.LONG.V0001110
0.SINGLE.H2001111
1.LONG.V1010110
IO.L bittile 0
RowColumn
012345678910111213141516171819202122232425
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INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:IFF_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 -INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -565,9 +565,9 @@

IO.L

IO.L bittile 1
RowColumn
0
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -611,9 +611,9 @@

IO.L

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V0001101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -688,9 +688,9 @@

IO.L.T

- + - + @@ -704,9 +704,9 @@

IO.L.T

 - + - +
INT:MUX.IMUX.IOB0.CE[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DEC.V0000111
0.DOUBLE.H0.0001111
0.DEC.V1010011
IO.L.T bittile 0
RowColumn
012345678910111213141516171819202122232425
0INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[4]IOB1:OMUX[1]IOB1:OMUX[2]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[4]IOB1:OMUX[1]IOB1:OMUX[2]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:IFF_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 -INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -1129,9 +1129,9 @@

IO.L.T

IO.L.T bittile 1
RowColumn
0
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -1175,9 +1175,9 @@

IO.L.T

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V0001101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -1252,9 +1252,9 @@

IO.LS

- + - + @@ -1268,9 +1268,9 @@

IO.LS

 - + - +
INT:MUX.IMUX.IOB0.CE[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DEC.V0000111
0.DOUBLE.H0.0001111
0.DEC.V1010011
IO.LS bittile 0
RowColumn
012345678910111213141516171819202122232425
0INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[4]IOB1:OMUX[1]IOB1:OMUX[2]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[4]IOB1:OMUX[1]IOB1:OMUX[2]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:IFF_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 -INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -1693,9 +1693,9 @@

IO.LS

IO.LS bittile 1
RowColumn
0
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -1739,9 +1739,9 @@

IO.LS

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V0001101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -1816,9 +1816,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB0.CE[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DEC.V0000111
0.DOUBLE.H0.0001111
0.DEC.V1010011
- + - + @@ -1832,9 +1832,9 @@

IO.LS.B<

- + - +
IO.LS.B bittile 0
RowColumn
012345678910111213141516171819202122232425
0INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[4]IOB1:OMUX[1]IOB1:OMUX[2]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
INT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[4]IOB1:OMUX[1]IOB1:OMUX[2]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[1]IOB1:OMUX[3]IOB1:OMUX[0]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[0]IOB1:IFF_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 -INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[6]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.IO.DBUF.V1[2]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[0]IOB0:OMUX[3]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[0]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]IOB0:OMUX[1]IOB0:OMUX[2]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
@@ -2263,9 +2263,9 @@

IO.LS.B<

IO.LS.B bittile 1
RowColumn
0
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -2309,9 +2309,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB1.CE[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
INT:MUX.IMUX.IOB1.O1[0, 16, 1][0, 20, 0][0, 19, 0][0, 18, 0][0, 16, 0][0, 17, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V0001101
1.SINGLE.H501111110
1.SINGLE.H311111111
-
+
- + @@ -2386,9 +2386,9 @@

IO.R

- + - + @@ -2402,9 +2402,9 @@

IO.R

 - + - +
INT:MUX.IMUX.IOB0.CE[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
INT:MUX.IMUX.IOB0.O1[0, 18, 8][0, 19, 8][0, 20, 9][0, 18, 9][0, 19, 9][0, 20, 8]
0.DEC.V0000111
0.DOUBLE.H0.0001111
0.DEC.V1010011
IO.R bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:IFF_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]-INT:MUX.IMUX.CLB.C1[6]INT:MUX.IMUX.CLB.C1[1]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -2923,9 +2923,9 @@

IO.R

IO.R bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -2937,9 +2937,9 @@

IO.R

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DEC.V3000111
0.DOUBLE.H0.1001111
0.DEC.V2010011
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -3277,9 +3277,9 @@

IO.R.T

- + - + @@ -3293,9 +3293,9 @@

IO.R.T

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V2001101
IO.R.T bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:IFF_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]-INT:MUX.IMUX.CLB.C1[6]INT:MUX.IMUX.CLB.C1[1]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -3814,9 +3814,9 @@

IO.R.T

IO.R.T bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -3828,9 +3828,9 @@

IO.R.T

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DEC.V3000111
0.DOUBLE.H0.1001111
0.DEC.V2010011
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -4168,9 +4168,9 @@

IO.RS

- + - + @@ -4184,9 +4184,9 @@

IO.RS

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V2001101
IO.RS bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:IFF_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]-INT:MUX.IMUX.CLB.C1[6]INT:MUX.IMUX.CLB.C1[1]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -4705,9 +4705,9 @@

IO.RS

IO.RS bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -4719,9 +4719,9 @@

IO.RS

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DEC.V3000111
0.DOUBLE.H0.1001111
0.DEC.V2010011
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -5059,9 +5059,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V2001101
- + - + @@ -5075,9 +5075,9 @@

IO.RS.B<

- + - +
IO.RS.B bittile 0
RowColumn
012345678910111213141516171819202122232425262728293031323334353637383940
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[2]IOB1:OMUX[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]INT:MUX.IMUX.CLB.G1[7]INT:MUX.IMUX.CLB.G1[1]INT:MUX.IMUX.CLB.G1[5]INT:MUX.IMUX.CLB.C1[4]INT:MUX.IMUX.CLB.C1[0]INT:MUX.IMUX.CLB.F1[4]INT:MUX.IMUX.CLB.F1[1]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[1]INT:MUX.IMUX.CLB.F3[7]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[3]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]INT:MUX.IMUX.CLB.G1[2]INT:MUX.IMUX.CLB.G1[3]INT:MUX.IMUX.CLB.G1[4]INT:MUX.IMUX.CLB.C1[3]INT:MUX.IMUX.CLB.C1[5]INT:MUX.IMUX.CLB.F1[2]INT:MUX.IMUX.CLB.F1[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.C3[0]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[5]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:IFF_DINT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.CLB.G1[0]-INT:MUX.IMUX.CLB.C1[6]INT:MUX.IMUX.CLB.C1[1]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.F1[0]INT:MUX.IMUX.CLB.G3[8]INT:MUX.IMUX.CLB.G3[6]INT:MUX.IMUX.CLB.G3[3]INT:MUX.IMUX.CLB.C3[3]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.F3[2]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5
8~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
~IOB0:READBACK_I1IOB0:OMUX[3]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[2]IOB0:OMUX[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1
@@ -5602,9 +5602,9 @@

IO.RS.B<

IO.RS.B bittile 1
RowColumn
012345678910111213141516171819202122232425262728293031323334
0.GCLK301111110
0.SINGLE.H211111111
-
+
- + @@ -5616,9 +5616,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 7, 8][0, 5, 9][0, 7, 9][0, 6, 9][0, 6, 8]
0.DEC.V3000111
0.DOUBLE.H0.1001111
0.DEC.V2010011
0.DOUBLE.H1.0110111
GND111111
-
+
- + @@ -5962,9 +5962,9 @@

IO.B

- + - + @@ -6357,9 +6357,9 @@

IO.B

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0]
0.LONG.H0000111
0.LONG.H1001011
0.DEC.V2001101
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
5 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
6IOB1:READBACK_OFF[0, 15, 2]
Inverted~[0]
-
+
- + @@ -6722,9 +6722,9 @@

IO.B

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H2001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -6780,9 +6780,9 @@

IO.B.R

- + - + @@ -7175,9 +7175,9 @@

IO.B.R

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DEC.H2000111
0.DOUBLE.V0.0001111
0.DEC.H0010011
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
5 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
6IOB1:READBACK_OFF[0, 15, 2]
Inverted~[0]
-
+
- + @@ -7540,9 +7540,9 @@

IO.B.R

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H2001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -7598,9 +7598,9 @@

IO.BS

- + - + @@ -7993,9 +7993,9 @@

IO.BS

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DEC.H2000111
0.DOUBLE.V0.0001111
0.DEC.H0010011
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
5 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
6IOB1:READBACK_OFF[0, 15, 2]
Inverted~[0]
-
+
- + @@ -8358,9 +8358,9 @@

IO.BS

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H2001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -8416,9 +8416,9 @@

IO.BS.L<

- + - + @@ -8811,9 +8811,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DEC.H2000111
0.DOUBLE.V0.0001111
0.DEC.H0010011
2 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[3]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1
5 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
6
IOB1:READBACK_OFF[0, 15, 2]
Inverted~[0]
-
+
- + @@ -9176,9 +9176,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB1.CE[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 4][0, 2, 4][0, 2, 3][0, 1, 4][0, 1, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H2001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -9232,9 +9232,9 @@

IO.T

- + - + @@ -9265,9 +9265,9 @@

IO.T

INT:MUX.IMUX.IOB0.CE[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
INT:MUX.IMUX.IOB0.O1[0, 26, 4][0, 26, 3][0, 28, 4][0, 27, 3][0, 28, 3][0, 27, 4]
0.DEC.H2000111
0.DOUBLE.V0.0001111
0.DEC.H0010011
1 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
2INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
59 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
-
+
- + @@ -9704,9 +9704,9 @@

IO.T

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H1001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -9760,9 +9760,9 @@

IO.T.R

- + - + @@ -9793,9 +9793,9 @@

IO.T.R

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DEC.H1000111
0.DOUBLE.V0.0001111
0.DEC.H3010011
1 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
2INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
59 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
-
+
- + @@ -10232,9 +10232,9 @@

IO.T.R

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H1001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -10288,9 +10288,9 @@

IO.TS

- + - + @@ -10321,9 +10321,9 @@

IO.TS

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DEC.H1000111
0.DOUBLE.V0.0001111
0.DEC.H3010011
1 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
2INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
59 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
-
+
- + @@ -10760,9 +10760,9 @@

IO.TS

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H1001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + @@ -10816,9 +10816,9 @@

IO.TS.L<

- + - + @@ -10849,9 +10849,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DEC.H1000111
0.DOUBLE.V0.0001111
0.DEC.H3010011
1 --INT:MUX.LONG.V4[0]-INT:MUX.LONG.IO.H3[1]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]
2INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[4]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[0]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[1]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H3[0]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[3]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2
3INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_PINT:MUX.LONG.IO.H1[2]INT:MUX.LONG.IO.H1[0]~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H1[3]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[1]-~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]
4 INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLE~IOB0:READBACK_OFF~IOB1:READBACK_OFF~IOB1:READBACK_I1-~IOB0:READBACK_I2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0
5
9 ----------------------------~INT:PASS.SINGLE.V3.0.LONG.H2-
-
+
- + @@ -11288,9 +11288,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB1.CE[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
INT:MUX.IMUX.IOB1.O1[0, 0, 2][0, 2, 2][0, 1, 3][0, 1, 2][0, 2, 3][0, 0, 3]
0.DEC.H0000111
0.DEC.H1001011
0.DEC.H3001101
0.GCLK301111110
0.SINGLE.V211111111
-
+
- + diff --git a/xilinx/xc4000ex/corner.html b/xilinx/xc4000ex/corner.html index 56d1cb33..a864383b 100644 --- a/xilinx/xc4000ex/corner.html +++ b/xilinx/xc4000ex/corner.html @@ -118,11 +118,11 @@

CNR.BL

- + - + - + @@ -378,9 +378,9 @@

CNR.BL

INT:MUX.IMUX.IOB0.CE[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
INT:MUX.IMUX.IOB0.O1[0, 26, 2][0, 26, 3][0, 28, 2][0, 27, 3][0, 28, 3][0, 27, 2]
0.DEC.H1000111
0.DOUBLE.V0.0001111
0.DEC.H3010011
2 -INT:MUX.IMUX.BUFG.H[1]INT:MUX.IMUX.BUFG.H[2]INT:MUX.IMUX.BUFG.H[5]MD2:PULL[0]MD2:PULL[1]---------------------
3-INT:MUX.IMUX.BUFG.H[4]INT:MUX.IMUX.BUFG.H[3]INT:MUX.IMUX.BUFG.H[6]INT:MUX.IMUX.BUFG.H[0]INT:MUX.IMUX.IOB1.CE[4]-INT:MUX.IMUX.BUFG.V[4]-------------------
-INT:MUX.IMUX.BUFG.H[4]INT:MUX.IMUX.BUFG.H[3]INT:MUX.IMUX.BUFG.H[6]INT:MUX.IMUX.BUFG.H[0]INT:MUX.IMUX.IOB1.O1[4]-INT:MUX.IMUX.BUFG.V[4]-------------------
4-~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOTINT:MUX.IMUX.BUFG.V[3]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]INT:MUX.IMUX.BUFG.V[1]INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.LONG.IO.H1[1]INT:MUX.IMUX.BUFG.V[5]INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.V[0]MD0:PULL[0]MD0:PULL[1]-
-~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOTINT:MUX.IMUX.BUFG.V[3]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]INT:MUX.IMUX.BUFG.V[1]INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.LONG.IO.H1[1]INT:MUX.IMUX.BUFG.V[5]INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.V[0]MD0:PULL[0]MD0:PULL[1]-
5-INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
-INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
6 --INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.LONG.IO.V2[4]INT:MUX.LONG.IO.V3[4]--------------------
71.SINGLE.V5101110
0.DOUBLE.H1.1111111
-
+
- + diff --git a/xilinx/xc4000ex/io.html b/xilinx/xc4000ex/io.html index 352e5b93..4a27f90a 100644 --- a/xilinx/xc4000ex/io.html +++ b/xilinx/xc4000ex/io.html @@ -132,9 +132,9 @@

IO.L

- + - + @@ -148,11 +148,11 @@

IO.L

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 5, 5][0, 5, 3][0, 6, 5][0, 5, 4][0, 7, 5][0, 8, 5]
INT:MUX.IMUX.IOB1.O1[0, 5, 5][0, 5, 3][0, 6, 5][0, 5, 4][0, 7, 5][0, 8, 5]
1.LONG.V0001110
0.SINGLE.H2001111
1.LONG.V1010110
IO.L bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -181,7 +181,7 @@

IO.L10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -745,9 +745,9 @@

IO.L

FAST0
SLOW1
-
+
- + @@ -812,9 +812,9 @@

IO.L

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -841,9 +841,9 @@

IO.L.T

- + - + @@ -857,11 +857,11 @@

IO.L.T

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.L.T bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2-INT:MUX.ECLK.V[2]INT:MUX.IMUX.CLB.G2[1]INT:MUX.ECLK.V[6]INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]INT:MUX.ECLK.V[3]INT:MUX.ECLK.V[4]INT:MUX.ECLK.V[5]INT:MUX.ECLK.V[1]INT:MUX.ECLK.V[0]--~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -890,7 +890,7 @@

IO.L.T10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -1467,9 +1467,9 @@

IO.L.T

FAST0
SLOW1
-
+
- + @@ -1534,9 +1534,9 @@

IO.L.T

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -1563,9 +1563,9 @@

IO.L.FB<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -1579,11 +1579,11 @@

IO.L.FB<

- + - + - +
IO.L.FB bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -1612,7 +1612,7 @@

IO.L.FB< 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -2176,9 +2176,9 @@

IO.L.FB<

FAST0
SLOW1
-
+
- + @@ -2243,9 +2243,9 @@

IO.L.FB<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -2272,9 +2272,9 @@

IO.L.FT<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -2288,11 +2288,11 @@

IO.L.FT<

- + - + - +
IO.L.FT bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -2321,7 +2321,7 @@

IO.L.FT< 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -2885,9 +2885,9 @@

IO.L.FT<

FAST0
SLOW1
-
+
- + @@ -2952,9 +2952,9 @@

IO.L.FT<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -2981,9 +2981,9 @@

IO.LS

- + - + @@ -2997,11 +2997,11 @@

IO.LS

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.LS bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -3030,7 +3030,7 @@

IO.LS10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -3594,9 +3594,9 @@

IO.LS

FAST0
SLOW1
-
+
- + @@ -3661,9 +3661,9 @@

IO.LS

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -3690,9 +3690,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -3706,11 +3706,11 @@

IO.LS.B<

- + - + - +
IO.LS.B bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -3747,7 +3747,7 @@

IO.LS.B< 14 ------------------------- 15 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -4311,9 +4311,9 @@

IO.LS.B<

FAST0
SLOW1
-
+
- + @@ -4378,9 +4378,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -4407,9 +4407,9 @@

IO.LS.FB

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 15][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 15][1, 19, 15][1, 20, 15][1, 21, 15][1, 23, 15]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 15][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 15][1, 19, 15][1, 20, 15][1, 21, 15][1, 23, 15]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -4423,11 +4423,11 @@

IO.LS.FB

- + - + - +
IO.LS.FB bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -4456,7 +4456,7 @@

IO.LS.FB 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -5020,9 +5020,9 @@

IO.LS.FB

FAST0
SLOW1
-
+
- + @@ -5087,9 +5087,9 @@

IO.LS.FB

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -5116,9 +5116,9 @@

IO.LS.FT

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -5132,11 +5132,11 @@

IO.LS.FT

- + - + - +
IO.LS.FT bittile 0
RowColumn
01234567891011121314151617181920212223242526
0MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
MISC:PUMPINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
-INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2--INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]-------~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -5165,7 +5165,7 @@

IO.LS.FT 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -5729,9 +5729,9 @@

IO.LS.FT

FAST0
SLOW1
-
+
- + @@ -5796,9 +5796,9 @@

IO.LS.FT

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -5825,9 +5825,9 @@

IO.R

- + - + @@ -5841,11 +5841,11 @@

IO.R

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.R bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -5874,7 +5874,7 @@

IO.R10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -6583,9 +6583,9 @@

IO.R

IO.R bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -7039,9 +7039,9 @@

IO.R

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -7094,9 +7094,9 @@

IO.R.T

- + - + @@ -7110,11 +7110,11 @@

IO.R.T

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
IO.R.T bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2INT:MUX.ECLK.V[2]INT:MUX.ECLK.V[6]INT:MUX.ECLK.V[5]INT:MUX.ECLK.V[1]-INT:MUX.ECLK.V[0]INT:MUX.ECLK.V[4]INT:MUX.IMUX.CLB.G4[1]INT:MUX.ECLK.V[3]INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -7143,7 +7143,7 @@

IO.R.T10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -7852,9 +7852,9 @@

IO.R.T

IO.R.T bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -8321,9 +8321,9 @@

IO.R.T

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -8376,9 +8376,9 @@

IO.R.FB<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -8392,11 +8392,11 @@

IO.R.FB<

- + - + - +
IO.R.FB bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -8425,7 +8425,7 @@

IO.R.FB< 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -9134,9 +9134,9 @@

IO.R.FB<

IO.R.FB bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -9590,9 +9590,9 @@

IO.R.FB<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -9645,9 +9645,9 @@

IO.R.FT<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -9661,11 +9661,11 @@

IO.R.FT<

- + - + - +
IO.R.FT bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -9694,7 +9694,7 @@

IO.R.FT< 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -10403,9 +10403,9 @@

IO.R.FT<

IO.R.FT bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -10859,9 +10859,9 @@

IO.R.FT<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -10914,9 +10914,9 @@

IO.RS

- + - + @@ -10930,11 +10930,11 @@

IO.RS

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
IO.RS bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -10963,7 +10963,7 @@

IO.RS10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -11672,9 +11672,9 @@

IO.RS

IO.RS bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -12128,9 +12128,9 @@

IO.RS

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -12183,9 +12183,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -12199,11 +12199,11 @@

IO.RS.B<

- + - + - +
IO.RS.B bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -12240,7 +12240,7 @@

IO.RS.B< 14 ------------------------------------ 15 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -12949,9 +12949,9 @@

IO.RS.B<

IO.RS.B bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -13405,9 +13405,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -13460,9 +13460,9 @@

IO.RS.FB

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 15][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 15][1, 6, 15][1, 8, 15][1, 9, 15][1, 11, 15]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 15][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 15][1, 6, 15][1, 8, 15][1, 9, 15][1, 11, 15]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -13476,11 +13476,11 @@

IO.RS.FB

- + - + - +
IO.RS.FB bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -13509,7 +13509,7 @@

IO.RS.FB 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -14218,9 +14218,9 @@

IO.RS.FB

IO.RS.FB bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -14674,9 +14674,9 @@

IO.RS.FB

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -14729,9 +14729,9 @@

IO.RS.FT

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -14745,11 +14745,11 @@

IO.RS.FT

- + - + - +
IO.RS.FT bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]-INT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQ-~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -14778,7 +14778,7 @@

IO.RS.FT 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -15487,9 +15487,9 @@

IO.RS.FT

IO.RS.FT bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -15943,9 +15943,9 @@

IO.RS.FT

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -16004,11 +16004,11 @@

IO.B

- + - + - + @@ -16039,9 +16039,9 @@

IO.B

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -17150,9 +17150,9 @@

IO.B0.GCLK71101 NONE1111 -
+
- + @@ -17245,9 +17245,9 @@

IO.B

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -17283,11 +17283,11 @@

IO.B.R

- + - + - + @@ -17318,9 +17318,9 @@

IO.B.R

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 -------------------------------------------------
3---------------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
---------------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4----------------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
----------------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -18429,9 +18429,9 @@

IO.B.R0.GCLK71101 NONE1111 -
+
- + @@ -18524,9 +18524,9 @@

IO.B.R

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -18562,11 +18562,11 @@

IO.BS

- + - + - + @@ -18597,9 +18597,9 @@

IO.BS

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 45, 3][1, 46, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 46, 3][1, 47, 3][1, 48, 3][1, 48, 4][0, 1, 3][1, 47, 4]
INT:MUX.IMUX.IOB1.O1[1, 45, 3][1, 46, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 46, 3][1, 47, 3][1, 48, 3][1, 48, 4][0, 1, 3][1, 47, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -19708,9 +19708,9 @@

IO.BS0.GCLK71101 NONE1111 -
+
- + @@ -19803,9 +19803,9 @@

IO.BS

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -19841,11 +19841,11 @@

IO.BS.L<

- + - + - + @@ -19876,9 +19876,9 @@

IO.BS.L<

- + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
7
2 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -20987,9 +20987,9 @@

IO.BS.L< 0.GCLK71101 NONE1111 -
+
- + @@ -21098,9 +21098,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -21134,11 +21134,11 @@

IO.T

- + - + - + @@ -21178,9 +21178,9 @@

IO.T

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
62 --------------------------------------------
3-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -21753,9 +21753,9 @@

IO.T0.GCLK5111101 NONE111111 -
+
- + @@ -21814,9 +21814,9 @@

IO.T

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -21850,11 +21850,11 @@

IO.T.R

- + - + - + @@ -21894,9 +21894,9 @@

IO.T.R

 - + - +
INT:MUX.IMUX.IOB1.CE[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
INT:MUX.IMUX.IOB1.O1[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
62 -------------------------------------------------
3----------------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
----------------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4---------------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
---------------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -22469,9 +22469,9 @@

IO.T.R0.GCLK5111101 NONE111111 -
+
- + @@ -22530,9 +22530,9 @@

IO.T.R

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -22566,11 +22566,11 @@

IO.TS

- + - + - + @@ -22610,9 +22610,9 @@

IO.TS

 - + - +
INT:MUX.IMUX.IOB1.CE[2, 45, 4][2, 46, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 46, 4][2, 47, 4][2, 48, 4][2, 48, 3][0, 1, 4][2, 47, 3]
INT:MUX.IMUX.IOB1.O1[2, 45, 4][2, 46, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 46, 4][2, 47, 4][2, 48, 4][2, 48, 3][0, 1, 4][2, 47, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
62 --------------------------------------------
3-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -23185,9 +23185,9 @@

IO.TS0.GCLK5111101 NONE111111 -
+
- + @@ -23246,9 +23246,9 @@

IO.TS

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -23282,11 +23282,11 @@

IO.TS.L<

- + - + - + @@ -23326,9 +23326,9 @@

IO.TS.L<

- + - +
INT:MUX.IMUX.IOB1.CE[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
INT:MUX.IMUX.IOB1.O1[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]-~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]-~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
6
2 --------------------------------------------
3-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -23899,9 +23899,9 @@

IO.TS.L< 0.GCLK5111101 NONE111111 -
+
- + @@ -23975,9 +23975,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + diff --git a/xilinx/xc4000xla/corner.html b/xilinx/xc4000xla/corner.html index d91db5ad..c50d1d30 100644 --- a/xilinx/xc4000xla/corner.html +++ b/xilinx/xc4000xla/corner.html @@ -118,11 +118,11 @@

CNR.BL

- + - + - + @@ -391,9 +391,9 @@

CNR.BL

INT:MUX.IMUX.IOB1.CE[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
INT:MUX.IMUX.IOB1.O1[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
2 -INT:MUX.IMUX.BUFG.H[1]INT:MUX.IMUX.BUFG.H[2]INT:MUX.IMUX.BUFG.H[5]MD2:PULL[0]MD2:PULL[1]~BUFG.H:ALT_PAD~BUFG.H:CLK_EN~BUFG.V:ALT_PAD------------------
3-INT:MUX.IMUX.BUFG.H[4]INT:MUX.IMUX.BUFG.H[3]INT:MUX.IMUX.BUFG.H[6]INT:MUX.IMUX.BUFG.H[0]INT:MUX.IMUX.IOB1.CE[4]MISC:5V_TOLERANT_IOINT:MUX.IMUX.BUFG.V[4]~BUFG.V:CLK_EN------------------
-INT:MUX.IMUX.BUFG.H[4]INT:MUX.IMUX.BUFG.H[3]INT:MUX.IMUX.BUFG.H[6]INT:MUX.IMUX.BUFG.H[0]INT:MUX.IMUX.IOB1.O1[4]MISC:5V_TOLERANT_IOINT:MUX.IMUX.BUFG.V[4]~BUFG.V:CLK_EN------------------
4-~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOTINT:MUX.IMUX.BUFG.V[3]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]INT:MUX.IMUX.BUFG.V[1]INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.LONG.IO.H1[1]INT:MUX.IMUX.BUFG.V[5]INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.V[0]MD0:PULL[0]MD0:PULL[1]-
-~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOTINT:MUX.IMUX.BUFG.V[3]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]INT:MUX.IMUX.BUFG.V[1]INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.LONG.IO.H1[1]INT:MUX.IMUX.BUFG.V[5]INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.V[0]MD0:PULL[0]MD0:PULL[1]-
5-INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
-INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
6 --INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.LONG.IO.V2[4]INT:MUX.LONG.IO.V3[4]--------------------
7MISC:5V_TOLERANT_IO[0, 6, 3]
Non-inverted[0]
-
+
- + diff --git a/xilinx/xc4000xla/io.html b/xilinx/xc4000xla/io.html index dfa95586..6f14d7d8 100644 --- a/xilinx/xc4000xla/io.html +++ b/xilinx/xc4000xla/io.html @@ -132,9 +132,9 @@

IO.L

- + - + @@ -148,11 +148,11 @@

IO.L

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 5, 5][0, 5, 3][0, 6, 5][0, 5, 4][0, 7, 5][0, 8, 5]
INT:MUX.IMUX.IOB1.O1[0, 5, 5][0, 5, 3][0, 6, 5][0, 5, 4][0, 7, 5][0, 8, 5]
1.LONG.V0001110
0.SINGLE.H2001111
1.LONG.V1010110
IO.L bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -181,7 +181,7 @@

IO.L10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -755,9 +755,9 @@

IO.LFAST0 SLOW1 -
+
- + @@ -822,9 +822,9 @@

IO.L

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -851,9 +851,9 @@

IO.L.T

- + - + @@ -867,11 +867,11 @@

IO.L.T

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.L.T bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUXINT:MUX.ECLK.V[2]INT:MUX.IMUX.CLB.G2[1]INT:MUX.ECLK.V[6]INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]INT:MUX.ECLK.V[3]INT:MUX.ECLK.V[4]INT:MUX.ECLK.V[5]INT:MUX.ECLK.V[1]INT:MUX.ECLK.V[0]-IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -900,7 +900,7 @@

IO.L.T10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -1487,9 +1487,9 @@

IO.L.TFAST0 SLOW1 -
+
- + @@ -1554,9 +1554,9 @@

IO.L.T

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -1583,9 +1583,9 @@

IO.L.FB<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -1599,11 +1599,11 @@

IO.L.FB<

- + - + - +
IO.L.FB bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -1632,7 +1632,7 @@

IO.L.FB< 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -2206,9 +2206,9 @@

IO.L.FB< FAST0 SLOW1 -
+
- + @@ -2273,9 +2273,9 @@

IO.L.FB<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -2302,9 +2302,9 @@

IO.L.FT<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -2318,11 +2318,11 @@

IO.L.FT<

- + - + - +
IO.L.FT bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -2351,7 +2351,7 @@

IO.L.FT< 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -2925,9 +2925,9 @@

IO.L.FT< FAST0 SLOW1 -
+
- + @@ -2992,9 +2992,9 @@

IO.L.FT<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -3021,9 +3021,9 @@

IO.LS

- + - + @@ -3037,11 +3037,11 @@

IO.LS

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.LS bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -3070,7 +3070,7 @@

IO.LS10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -3644,9 +3644,9 @@

IO.LSFAST0 SLOW1 -
+
- + @@ -3711,9 +3711,9 @@

IO.LS

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -3740,9 +3740,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -3756,11 +3756,11 @@

IO.LS.B<

- + - + - +
IO.LS.B bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -3797,7 +3797,7 @@

IO.LS.B< 14 ------------------------- 15 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -4371,9 +4371,9 @@

IO.LS.B< FAST0 SLOW1 -
+
- + @@ -4438,9 +4438,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -4467,9 +4467,9 @@

IO.LS.FB

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 15][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 15][1, 19, 15][1, 20, 15][1, 21, 15][1, 23, 15]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 15][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 15][1, 19, 15][1, 20, 15][1, 21, 15][1, 23, 15]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -4483,11 +4483,11 @@

IO.LS.FB

- + - + - +
IO.LS.FB bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -4516,7 +4516,7 @@

IO.LS.FB 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -5090,9 +5090,9 @@

IO.LS.FB FAST0 SLOW1 -
+
- + @@ -5157,9 +5157,9 @@

IO.LS.FB

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -5186,9 +5186,9 @@

IO.LS.FT

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -5202,11 +5202,11 @@

IO.LS.FT

- + - + - +
IO.LS.FT bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
~INT:BUF.IO.OCTAL.W.8.0.IO.OCTAL.W.0~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 ~INT:BUF.IO.OCTAL.W.0.0.IO.OCTAL.W.8~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
@@ -5235,7 +5235,7 @@

IO.LS.FT 10 ------------------------- 11 --------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9] +-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -5809,9 +5809,9 @@

IO.LS.FT FAST0 SLOW1 -
+
- + @@ -5876,9 +5876,9 @@

IO.LS.FT

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -5905,9 +5905,9 @@

IO.R

- + - + @@ -5921,11 +5921,11 @@

IO.R

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.R bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -5954,7 +5954,7 @@

IO.R10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -6671,9 +6671,9 @@

IO.R

IO.R bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -7135,9 +7135,9 @@

IO.R

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -7190,9 +7190,9 @@

IO.R.T

- + - + @@ -7206,11 +7206,11 @@

IO.R.T

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
IO.R.T bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2INT:MUX.ECLK.V[2]INT:MUX.ECLK.V[6]INT:MUX.ECLK.V[5]INT:MUX.ECLK.V[1]-INT:MUX.ECLK.V[0]INT:MUX.ECLK.V[4]INT:MUX.IMUX.CLB.G4[1]INT:MUX.ECLK.V[3]INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -7239,7 +7239,7 @@

IO.R.T10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -7956,9 +7956,9 @@

IO.R.T

IO.R.T bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -8433,9 +8433,9 @@

IO.R.T

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -8488,9 +8488,9 @@

IO.R.FB<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -8504,11 +8504,11 @@

IO.R.FB<

- + - + - +
IO.R.FB bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -8537,7 +8537,7 @@

IO.R.FB< 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -9254,9 +9254,9 @@

IO.R.FB<

IO.R.FB bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -9718,9 +9718,9 @@

IO.R.FB<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -9773,9 +9773,9 @@

IO.R.FT<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -9789,11 +9789,11 @@

IO.R.FT<

- + - + - +
IO.R.FT bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -9822,7 +9822,7 @@

IO.R.FT< 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -10539,9 +10539,9 @@

IO.R.FT<

IO.R.FT bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -11003,9 +11003,9 @@

IO.R.FT<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -11058,9 +11058,9 @@

IO.RS

- + - + @@ -11074,11 +11074,11 @@

IO.RS

 - + - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
IO.RS bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -11107,7 +11107,7 @@

IO.RS10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -11824,9 +11824,9 @@

IO.RS

IO.RS bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -12288,9 +12288,9 @@

IO.RS

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -12343,9 +12343,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -12359,11 +12359,11 @@

IO.RS.B<

- + - + - +
IO.RS.B bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -12400,7 +12400,7 @@

IO.RS.B< 14 ------------------------------------ 15 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -13117,9 +13117,9 @@

IO.RS.B<

IO.RS.B bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -13581,9 +13581,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -13636,9 +13636,9 @@

IO.RS.FB

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 15][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 15][1, 6, 15][1, 8, 15][1, 9, 15][1, 11, 15]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 15][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 15][1, 6, 15][1, 8, 15][1, 9, 15][1, 11, 15]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -13652,11 +13652,11 @@

IO.RS.FB

- + - + - +
IO.RS.FB bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -13685,7 +13685,7 @@

IO.RS.FB 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -14402,9 +14402,9 @@

IO.RS.FB

IO.RS.FB bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -14866,9 +14866,9 @@

IO.RS.FB

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -14921,9 +14921,9 @@

IO.RS.FT

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -14937,11 +14937,11 @@

IO.RS.FT

- + - + - +
IO.RS.FT bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]~INT:BUF.IO.OCTAL.E.0.0.IO.OCTAL.E.8-------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]~INT:BUF.IO.OCTAL.E.8.0.IO.OCTAL.E.0-------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
@@ -14970,7 +14970,7 @@

IO.RS.FT 10 ------------------------------------ 11 -------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- +------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]--------------- @@ -15687,9 +15687,9 @@

IO.RS.FT

IO.RS.FT bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -16151,9 +16151,9 @@

IO.RS.FT

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -16212,11 +16212,11 @@

IO.B

- + - + - + @@ -16247,9 +16247,9 @@

IO.B

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -17366,9 +17366,9 @@

IO.B0.GCLK71101 NONE1111 -
+
- + @@ -17469,9 +17469,9 @@

IO.B

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -17507,11 +17507,11 @@

IO.B.R

- + - + - + @@ -17542,9 +17542,9 @@

IO.B.R

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 -------------------------------------------------
3---------------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
---------------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4----------------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
----------------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -18661,9 +18661,9 @@

IO.B.R0.GCLK71101 NONE1111 -
+
- + @@ -18764,9 +18764,9 @@

IO.B.R

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -18802,11 +18802,11 @@

IO.BS

- + - + - + @@ -18837,9 +18837,9 @@

IO.BS

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 45, 3][1, 46, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 46, 3][1, 47, 3][1, 48, 3][1, 48, 4][0, 1, 3][1, 47, 4]
INT:MUX.IMUX.IOB1.O1[1, 45, 3][1, 46, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 46, 3][1, 47, 3][1, 48, 3][1, 48, 4][0, 1, 3][1, 47, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -19956,9 +19956,9 @@

IO.BS0.GCLK71101 NONE1111 -
+
- + @@ -20059,9 +20059,9 @@

IO.BS

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -20097,11 +20097,11 @@

IO.BS.L<

- + - + - + @@ -20132,9 +20132,9 @@

IO.BS.L<

- + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
-~INT:BUF.IO.OCTAL.S.8.0.IO.OCTAL.S.0~INT:BUF.IO.OCTAL.S.0.0.IO.OCTAL.S.8INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
7
2 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -21251,9 +21251,9 @@

IO.BS.L< 0.GCLK71101 NONE1111 -
+
- + @@ -21370,9 +21370,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -21406,11 +21406,11 @@

IO.T

- + - + - + @@ -21450,9 +21450,9 @@

IO.T

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
62 --------------------------------------------
3-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -22033,9 +22033,9 @@

IO.T0.GCLK5111101 NONE111111 -
+
- + @@ -22102,9 +22102,9 @@

IO.T

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -22138,11 +22138,11 @@

IO.T.R

- + - + - + @@ -22182,9 +22182,9 @@

IO.T.R

 - + - +
INT:MUX.IMUX.IOB1.CE[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
INT:MUX.IMUX.IOB1.O1[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
62 -------------------------------------------------
3----------------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
----------------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4---------------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
---------------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -22765,9 +22765,9 @@

IO.T.R0.GCLK5111101 NONE111111 -
+
- + @@ -22834,9 +22834,9 @@

IO.T.R

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -22870,11 +22870,11 @@

IO.TS

- + - + - + @@ -22914,9 +22914,9 @@

IO.TS

 - + - +
INT:MUX.IMUX.IOB1.CE[2, 45, 4][2, 46, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 46, 4][2, 47, 4][2, 48, 4][2, 48, 3][0, 1, 4][2, 47, 3]
INT:MUX.IMUX.IOB1.O1[2, 45, 4][2, 46, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 46, 4][2, 47, 4][2, 48, 4][2, 48, 3][0, 1, 4][2, 47, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
62 --------------------------------------------
3-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -23497,9 +23497,9 @@

IO.TS0.GCLK5111101 NONE111111 -
+
- + @@ -23566,9 +23566,9 @@

IO.TS

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -23602,11 +23602,11 @@

IO.TS.L<

- + - + - + @@ -23646,9 +23646,9 @@

IO.TS.L<

- + - +
INT:MUX.IMUX.IOB1.CE[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
INT:MUX.IMUX.IOB1.O1[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
1 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
2-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]-~INT:PASS.QUAD.V2.2.0.DEC.H3
-~INT:BUF.IO.OCTAL.N.0.0.IO.OCTAL.N.8~INT:BUF.IO.OCTAL.N.8.0.IO.OCTAL.N.0INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]-~INT:PASS.QUAD.V2.2.0.DEC.H3
3-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
4-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
5 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
6
2 --------------------------------------------
3-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
4----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -24227,9 +24227,9 @@

IO.TS.L< 0.GCLK5111101 NONE111111 -
+
- + @@ -24311,9 +24311,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB0.CE[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
INT:MUX.IMUX.IOB0.O1[0, 27, 3][0, 29, 3][0, 37, 3][0, 39, 4][0, 38, 4][0, 37, 4][0, 40, 3][0, 27, 4][0, 30, 4][0, 28, 4][0, 29, 4][0, 28, 3][0, 39, 3][0, 38, 3]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + diff --git a/xilinx/xc4000xv/corner.html b/xilinx/xc4000xv/corner.html index b1d7a684..1a094326 100644 --- a/xilinx/xc4000xv/corner.html +++ b/xilinx/xc4000xv/corner.html @@ -118,11 +118,11 @@

CNR.BL

- + - + - + @@ -391,9 +391,9 @@

CNR.BL

INT:MUX.IMUX.IOB1.CE[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
INT:MUX.IMUX.IOB1.O1[2, 40, 4][2, 41, 3][0, 3, 3][0, 1, 3][0, 4, 2][0, 2, 4][0, 2, 3][0, 3, 4][2, 41, 4][2, 42, 4][2, 43, 4][2, 43, 3][0, 1, 4][2, 42, 3]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
2 -INT:MUX.IMUX.BUFG.H[1]INT:MUX.IMUX.BUFG.H[2]INT:MUX.IMUX.BUFG.H[5]MD2:PULL[0]MD2:PULL[1]~BUFG.H:ALT_PAD~BUFG.H:CLK_EN~BUFG.V:ALT_PAD------------------
3-INT:MUX.IMUX.BUFG.H[4]INT:MUX.IMUX.BUFG.H[3]INT:MUX.IMUX.BUFG.H[6]INT:MUX.IMUX.BUFG.H[0]INT:MUX.IMUX.IOB1.CE[4]MISC:5V_TOLERANT_IOINT:MUX.IMUX.BUFG.V[4]~BUFG.V:CLK_EN------------------
-INT:MUX.IMUX.BUFG.H[4]INT:MUX.IMUX.BUFG.H[3]INT:MUX.IMUX.BUFG.H[6]INT:MUX.IMUX.BUFG.H[0]INT:MUX.IMUX.IOB1.O1[4]MISC:5V_TOLERANT_IOINT:MUX.IMUX.BUFG.V[4]~BUFG.V:CLK_EN------------------
4-~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOTINT:MUX.IMUX.BUFG.V[3]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]INT:MUX.IMUX.BUFG.V[1]INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.LONG.IO.H1[1]INT:MUX.IMUX.BUFG.V[5]INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.V[0]MD0:PULL[0]MD0:PULL[1]-
-~PULLUP.DEC.H0:ENABLE~PULLUP.DEC.H1:ENABLE~PULLUP.DEC.H2:ENABLE~PULLUP.DEC.H3:ENABLEINT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.RDBK.TRIG[3]INT:MUX.IMUX.RDBK.TRIG[2]~MISC:TM_BOTINT:MUX.IMUX.BUFG.V[3]INT:MUX.LONG.IO.H2[0]INT:MUX.LONG.IO.H2[1]INT:MUX.IMUX.BUFG.V[1]INT:MUX.LONG.IO.H0[1]~MISC:READ_CAPTUREINT:MUX.LONG.IO.H0[0]~MISC:READ_ABORTINT:MUX.LONG.IO.H3[0]INT:MUX.LONG.IO.H3[1]INT:MUX.IMUX.BUFG.V[2]INT:MUX.LONG.IO.H1[1]INT:MUX.IMUX.BUFG.V[5]INT:MUX.LONG.IO.H1[0]INT:MUX.IMUX.BUFG.V[0]MD0:PULL[0]MD0:PULL[1]-
5-INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
-INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.LONG.IO.V3[3]INT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V3[2]INT:MUX.LONG.IO.V3[0]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[4]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.RDBK.TRIG[1]INT:MUX.IMUX.RDBK.TRIG[0]INT:MUX.LONG.IO.V0[2]INT:MUX.LONG.IO.V0[0]INT:MUX.LONG.IO.V0[1]INT:MUX.LONG.IO.V0[3]~RDBK:ENABLE--
6 --INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.LONG.IO.V2[4]INT:MUX.LONG.IO.V3[4]--------------------
7MISC:5V_TOLERANT_IO[0, 6, 3]
Non-inverted[0]
-
+
- + diff --git a/xilinx/xc4000xv/io.html b/xilinx/xc4000xv/io.html index 108fe7f4..07c04c9d 100644 --- a/xilinx/xc4000xv/io.html +++ b/xilinx/xc4000xv/io.html @@ -132,9 +132,9 @@

IO.L

- + - + @@ -148,11 +148,11 @@

IO.L

 - + - + - + @@ -183,7 +183,7 @@

IO.L

 - +
INT:MUX.IMUX.IOB1.CE[0, 5, 5][0, 5, 3][0, 6, 5][0, 5, 4][0, 7, 5][0, 8, 5]
INT:MUX.IMUX.IOB1.O1[0, 5, 5][0, 5, 3][0, 6, 5][0, 5, 4][0, 7, 5][0, 8, 5]
1.LONG.V0001110
0.SINGLE.H2001111
1.LONG.V1010110
IO.L bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
1210 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -797,9 +797,9 @@

IO.LFAST0 SLOW1 -
+
- + @@ -864,9 +864,9 @@

IO.L

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -893,9 +893,9 @@

IO.L.T

- + - + @@ -909,11 +909,11 @@

IO.L.T

 - + - + - + @@ -944,7 +944,7 @@

IO.L.T

 - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.L.T bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUXINT:MUX.ECLK.V[2]INT:MUX.IMUX.CLB.G2[1]INT:MUX.ECLK.V[6]INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]INT:MUX.ECLK.V[3]INT:MUX.ECLK.V[4]INT:MUX.ECLK.V[5]INT:MUX.ECLK.V[1]INT:MUX.ECLK.V[0]-IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
1210 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -1571,9 +1571,9 @@

IO.L.TFAST0 SLOW1 -
+
- + @@ -1638,9 +1638,9 @@

IO.L.T

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -1667,9 +1667,9 @@

IO.L.FB<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -1683,11 +1683,11 @@

IO.L.FB<

- + - + - + @@ -1718,7 +1718,7 @@

IO.L.FB<

- +
IO.L.FB bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
12
10 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -2332,9 +2332,9 @@

IO.L.FB< FAST0 SLOW1 -
+
- + @@ -2399,9 +2399,9 @@

IO.L.FB<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -2428,9 +2428,9 @@

IO.L.FT<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -2444,11 +2444,11 @@

IO.L.FT<

- + - + - + @@ -2479,7 +2479,7 @@

IO.L.FT<

- +
IO.L.FT bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
12
10 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -3093,9 +3093,9 @@

IO.L.FT< FAST0 SLOW1 -
+
- + @@ -3160,9 +3160,9 @@

IO.L.FT<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -3189,9 +3189,9 @@

IO.LS

- + - + @@ -3205,11 +3205,11 @@

IO.LS

 - + - + - + @@ -3240,7 +3240,7 @@

IO.LS

 - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.LS bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
37 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
1210 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -3854,9 +3854,9 @@

IO.LSFAST0 SLOW1 -
+
- + @@ -3921,9 +3921,9 @@

IO.LS

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -3950,9 +3950,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -3966,11 +3966,11 @@

IO.LS.B<

- + - + - + @@ -4009,7 +4009,7 @@

IO.LS.B<

- +
IO.LS.B bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
12
14 -------------------------
15-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -4623,9 +4623,9 @@

IO.LS.B< FAST0 SLOW1 -
+
- + @@ -4690,9 +4690,9 @@

IO.LS.B<

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -4719,9 +4719,9 @@

IO.LS.FB

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 15][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 15][1, 19, 15][1, 20, 15][1, 21, 15][1, 23, 15]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 15][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 15][1, 19, 15][1, 20, 15][1, 21, 15][1, 23, 15]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -4735,11 +4735,11 @@

IO.LS.FB

- + - + - + @@ -4770,7 +4770,7 @@

IO.LS.FB

- +
IO.LS.FB bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
12
10 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -5384,9 +5384,9 @@

IO.LS.FB FAST0 SLOW1 -
+
- + @@ -5451,9 +5451,9 @@

IO.LS.FB

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -5480,9 +5480,9 @@

IO.LS.FT

INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
- + - + @@ -5496,11 +5496,11 @@

IO.LS.FT

- + - + - + @@ -5531,7 +5531,7 @@

IO.LS.FT

- +
IO.LS.FT bittile 0
RowColumn
01234567891011121314151617181920212223242526
0IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
IOB1:DRIVEINT:MUX.LONG.H0[1]INT:MUX.LONG.H0[0]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.LONG.H1[0]INT:MUX.LONG.H1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[10]IOB1:OMUX[0]IOB1:OMUX[1]~IOB1:INV.OFF_CLK~IOB1:INV.TIOB1:SLEW
1IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
IOB0:DRIVEINT:MUX.LONG.H0[2]INT:MUX.LONG.H0[3]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[3]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[2]IOB1:OMUX[2]IOB1:OMUX[3]IOB1:PULL[0]~IOB1:OFF_SRVALIOB1:PULL[1]
2 ~INT:BIPASS.SINGLE.H4.IO.OCTAL.W.5INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IO.DBUF.V0[3]INT:MUX.IMUX.IOB1.TS[7]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[2]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB1.TS[0]-INT:MUX.IMUX.IOB1.TS[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[1]IOB1:SYNC_DIOB1:OFF_USED~IOB1:READBACK_OFF~IOB1:INV.OFF_DIOB1:MUX.OFF_D
3
7 ~INT:BIPASS.SINGLE.H3.IO.OCTAL.W.4-INT:MUX.LONG.H4[0]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB0.I1INT:MUX.LONG.H5[1]~IOB1:IFF_CE_ENABLE~INT:PASS.IO.DOUBLE.3.W.2.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.1.W.2.0.IO.DBUF.V0INT:MUX.LONG.H5[3]~PULLUP.TBUF1:ENABLE~INT:PASS.SINGLE.H2.0.LONG.IO.V1INT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[7]IOB0:OFF_USED~IOB0:INV.OFF_DIOB0:PULL[0]~IOB0:OFF_SRVALIOB0:MUX.OFF_D
8~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
~INT:BIPASS.SINGLE.H2.IO.OCTAL.W.3~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V3[1]~IOB0:IFF_CE_ENABLE~INT:PASS.SINGLE.H6.0.LONG.IO.V3INT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V1[2]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[0]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[1]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[2]IOB0:OMUX[2]~IOB0:READBACK_OFF~IOB0:READBACK_I2IOB0:OMUX[3]~IOB0:READBACK_I1
9~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
~INT:BIPASS.SINGLE.H7.IO.OCTAL.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.2~INT:BIPASS.IO.DOUBLE.3.W.0.IO.DOUBLE.3.W.2~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.1~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.W.1~INT:BIPASS.DOUBLE.H1.0.IO.DOUBLE.3.W.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.W.0~IOB0:OFF_CE_ENABLE~INT:PASS.SINGLE.H7.0.DEC.V0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.2~INT:BIPASS.IO.DOUBLE.1.W.0.IO.DOUBLE.1.W.2~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.W.1~INT:BIPASS.DOUBLE.H0.1.IO.DOUBLE.1.W.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.W.0~INT:PASS.SINGLE.H3.0.DEC.V2INT:MUX.LONG.IO.V1[0]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[10]IOB0:OMUX[0]IOB0:OMUX[1]IOB0:SLEW~IOB0:INV.OFF_CLK~IOB0:INV.T
10-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]~IOB1:IFF_CE_ENABLE_NO_IQ
-~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:BIPASS.IO.DOUBLE.3.W.1.QUAD.H2.0~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H0.3.LONG.IO.V3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.W.2.QUAD.H0.0~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H2.3.LONG.IO.V1~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S-INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G2[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F2[1]INT:MUX.IMUX.CLB.C2[3]INT:MUX.IMUX.CLB.C2[4]INT:MUX.IMUX.CLB.C2[1]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]~IOB1:IFF_CE_ENABLE_NO_IQ
11 -~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.QUAD.H1.3.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.0.W.1.QUAD.H0.1~INT:BIPASS.IO.DOUBLE.3.W.2.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.2.W.2.QUAD.H1.1~INT:PASS.QUAD.H1.2.0.DEC.V1~INT:BIPASS.IO.DOUBLE.1.W.1.QUAD.H1.2~INT:PASS.QUAD.H0.2.0.DEC.V0~INT:BIPASS.IO.DOUBLE.0.W.2.QUAD.H0.2~INT:PASS.QUAD.H2.2.0.DEC.V2~INT:BIPASS.IO.DOUBLE.2.W.1.QUAD.H2.2IOB1:TMUX-INT:MUX.IMUX.CLB.G2[1]-INT:MUX.IMUX.CLB.F2[0]INT:MUX.IMUX.CLB.C2[0]INT:MUX.IMUX.CLB.C2[2]------IOB0:TMUX~IOB0:IFF_CE_ENABLE_NO_IQ
12
10 -------------------------
11-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[9]
-------------INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]---INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[9]
@@ -6145,9 +6145,9 @@

IO.LS.FT FAST0 SLOW1 -
+
- + @@ -6212,9 +6212,9 @@

IO.LS.FT

INT:MUX.IMUX.IOB0.CE[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
INT:MUX.IMUX.IOB0.O1[0, 17, 8][0, 21, 9][0, 24, 10][0, 19, 9][0, 20, 9][0, 21, 10][0, 20, 10][0, 20, 8][0, 23, 10][0, 21, 8][0, 22, 10][0, 25, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
1.IMUX.CLB.F2011111110
1.SINGLE.H5111111111
-
+
- + @@ -6241,9 +6241,9 @@

IO.R

- + - + @@ -6257,11 +6257,11 @@

IO.R

 - + - + - + @@ -6292,7 +6292,7 @@

IO.R

 - +
INT:MUX.IMUX.IOB1.CE[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
INT:MUX.IMUX.IOB1.O1[0, 17, 1][0, 21, 0][1, 24, 11][0, 20, 0][0, 19, 0][0, 17, 0][0, 18, 0][1, 22, 11][1, 19, 11][1, 20, 11][1, 21, 11][1, 23, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V0000110111111
IO.R bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
1210 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -7081,9 +7081,9 @@

IO.R

IO.R bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -7545,9 +7545,9 @@

IO.R

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -7600,9 +7600,9 @@

IO.R.T

- + - + @@ -7616,11 +7616,11 @@

IO.R.T

 - + - + - + @@ -7651,7 +7651,7 @@

IO.R.T

 - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
IO.R.T bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2INT:MUX.ECLK.V[2]INT:MUX.ECLK.V[6]INT:MUX.ECLK.V[5]INT:MUX.ECLK.V[1]-INT:MUX.ECLK.V[0]INT:MUX.ECLK.V[4]INT:MUX.IMUX.CLB.G4[1]INT:MUX.ECLK.V[3]INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
1210 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -8440,9 +8440,9 @@

IO.R.T

IO.R.T bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -8917,9 +8917,9 @@

IO.R.T

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -8972,9 +8972,9 @@

IO.R.FB<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -8988,11 +8988,11 @@

IO.R.FB<

- + - + - + @@ -9023,7 +9023,7 @@

IO.R.FB<

- +
IO.R.FB bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
12
10 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -9812,9 +9812,9 @@

IO.R.FB<

IO.R.FB bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -10276,9 +10276,9 @@

IO.R.FB<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -10331,9 +10331,9 @@

IO.R.FT<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -10347,11 +10347,11 @@

IO.R.FT<

- + - + - + @@ -10382,7 +10382,7 @@

IO.R.FT<

- +
IO.R.FT bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
12
10 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -11171,9 +11171,9 @@

IO.R.FT<

IO.R.FT bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -11635,9 +11635,9 @@

IO.R.FT<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -11690,9 +11690,9 @@

IO.RS

- + - + @@ -11706,11 +11706,11 @@

IO.RS

 - + - + - + @@ -11741,7 +11741,7 @@

IO.RS

 - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
IO.RS bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
37 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
1210 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -12530,9 +12530,9 @@

IO.RS

IO.RS bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -12994,9 +12994,9 @@

IO.RS

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -13049,9 +13049,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -13065,11 +13065,11 @@

IO.RS.B<

- + - + - + @@ -13108,7 +13108,7 @@

IO.RS.B<

- +
IO.RS.B bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
12
14 ------------------------------------
15------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -13897,9 +13897,9 @@

IO.RS.B<

IO.RS.B bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -14361,9 +14361,9 @@

IO.RS.B<

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -14416,9 +14416,9 @@

IO.RS.FB

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 15][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 15][1, 6, 15][1, 8, 15][1, 9, 15][1, 11, 15]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 15][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 15][1, 6, 15][1, 8, 15][1, 9, 15][1, 11, 15]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -14432,11 +14432,11 @@

IO.RS.FB

- + - + - + @@ -14467,7 +14467,7 @@

IO.RS.FB

- +
IO.RS.FB bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
12
10 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -15256,9 +15256,9 @@

IO.RS.FB

IO.RS.FB bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -15720,9 +15720,9 @@

IO.RS.FB

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -15775,9 +15775,9 @@

IO.RS.FT

INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
- + - + @@ -15791,11 +15791,11 @@

IO.RS.FT

- + - + - + @@ -15826,7 +15826,7 @@

IO.RS.FT

- +
IO.RS.FT bittile 0
RowColumn
0123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
0IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[11]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
IOB1:SLEW~IOB1:INV.T~IOB1:INV.OFF_CLKIOB1:OMUX[1]IOB1:OMUX[0]INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[11]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.LONG.H1[2]INT:MUX.LONG.H1[1]INT:MUX.IMUX.TBUF1.I[5]INT:MUX.IMUX.TBUF1.I[1]INT:MUX.IMUX.TBUF1.I[2]INT:MUX.IMUX.TBUF1.TS[4]INT:MUX.IMUX.TBUF1.TS[2]INT:MUX.IMUX.TBUF0.TS[5]INT:MUX.IMUX.TBUF0.TS[1]INT:MUX.IMUX.TBUF0.TS[0]INT:MUX.IMUX.TBUF0.TS[3]INT:MUX.IMUX.TBUF0.I[4]INT:MUX.IMUX.TBUF0.I[1]INT:MUX.IMUX.TBUF0.I[3]INT:MUX.LONG.H0[2]INT:MUX.LONG.H0[0]-INT:MUX.IMUX.CLB.G1[16]INT:MUX.IMUX.CLB.G1[10]INT:MUX.IMUX.CLB.G1[14]INT:MUX.IMUX.CLB.C1[13]INT:MUX.IMUX.CLB.C1[2]INT:MUX.IMUX.CLB.F1[13]INT:MUX.IMUX.CLB.F1[10]INT:MUX.IMUX.CLB.F1[15]INT:MUX.IMUX.CLB.G3[18]INT:MUX.IMUX.CLB.G3[14]INT:MUX.IMUX.CLB.C3[16]INT:MUX.IMUX.CLB.C3[13]INT:MUX.IMUX.CLB.F3[13]INT:MUX.IMUX.CLB.F3[10]INT:MUX.IMUX.CLB.F3[16]~INT:PASS.QUAD.V2.0.0.OUT.LR.IOB0.I2~INT:PASS.QUAD.V0.3.0.OUT.LR.IOB0.I2INT:MUX.IMUX.CLB.F3[9]INT:MUX.IMUX.CLB.F3[7]INT:MUX.IMUX.CLB.C3[6]INT:MUX.IMUX.CLB.C3[5]INT:MUX.IMUX.CLB.F3[5]INT:MUX.IMUX.CLB.C3[9]INT:MUX.IMUX.CLB.C3[4]INT:MUX.IMUX.CLB.F1[8]
1IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
IOB1:PULL[1]~IOB1:OFF_SRVALIOB1:PULL[0]IOB1:OMUX[2]IOB1:OMUX[3]INT:MUX.IMUX.IOB1.IK[8]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.LONG.H1[3]INT:MUX.LONG.H1[0]INT:MUX.IMUX.TBUF1.I[4]INT:MUX.IMUX.TBUF1.I[0]INT:MUX.IMUX.TBUF1.I[3]INT:MUX.IMUX.TBUF1.TS[5]INT:MUX.IMUX.TBUF1.TS[1]INT:MUX.IMUX.TBUF1.TS[0]INT:MUX.IMUX.TBUF1.TS[3]INT:MUX.IMUX.TBUF0.TS[2]INT:MUX.IMUX.TBUF0.TS[4]INT:MUX.IMUX.TBUF0.I[2]INT:MUX.IMUX.TBUF0.I[0]INT:MUX.IMUX.TBUF0.I[5]INT:MUX.LONG.H0[3]INT:MUX.LONG.H0[1]-INT:MUX.IMUX.CLB.G1[11]INT:MUX.IMUX.CLB.G1[12]INT:MUX.IMUX.CLB.G1[13]INT:MUX.IMUX.CLB.C1[12]INT:MUX.IMUX.CLB.C1[14]INT:MUX.IMUX.CLB.F1[11]INT:MUX.IMUX.CLB.F1[14]INT:MUX.IMUX.CLB.G3[16]INT:MUX.IMUX.CLB.G3[13]INT:MUX.IMUX.CLB.G3[0]INT:MUX.IMUX.CLB.C3[15]INT:MUX.IMUX.CLB.C3[14]INT:MUX.IMUX.CLB.C3[2]INT:MUX.IMUX.CLB.F3[12]INT:MUX.IMUX.CLB.F3[14]INT:MUX.IMUX.CLB.F1[3]INT:MUX.IMUX.CLB.F3[3]INT:MUX.IMUX.CLB.F3[4]INT:MUX.IMUX.CLB.F3[6]INT:MUX.IMUX.CLB.C3[7]INT:MUX.IMUX.CLB.C3[8]INT:MUX.IMUX.CLB.F3[8]INT:MUX.IMUX.CLB.C3[3]-INT:MUX.IMUX.CLB.G3[6]
2 IOB1:MUX.OFF_D~IOB1:INV.OFF_D~IOB1:READBACK_OFFIOB1:OFF_USEDIOB1:SYNC_DINT:MUX.IMUX.IOB1.OK[8]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[2]IOB0:TMUXINT:MUX.IMUX.IOB1.TS[0]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IMUX.IOB0.TS[1]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IO.DBUF.V0[1]INT:MUX.IMUX.IOB1.TS[6]INT:MUX.IO.DBUF.V0[2]INT:MUX.IMUX.IOB1.TS[3]~INT:BIPASS.SINGLE.H4.IO.OCTAL.E.3INT:MUX.IMUX.CLB.G1[9]-INT:MUX.IMUX.CLB.C1[15]INT:MUX.IMUX.CLB.C1[10]INT:MUX.IMUX.CLB.C1[11]INT:MUX.IMUX.CLB.F1[16]INT:MUX.IMUX.CLB.F1[9]INT:MUX.IMUX.CLB.G3[17]INT:MUX.IMUX.CLB.G3[15]INT:MUX.IMUX.CLB.G3[12]INT:MUX.IMUX.CLB.C3[12]INT:MUX.IMUX.CLB.C3[11]INT:MUX.IMUX.CLB.F3[17]INT:MUX.IMUX.CLB.F3[15]INT:MUX.IMUX.CLB.F3[11]INT:MUX.IMUX.CLB.G3[10]INT:MUX.IMUX.CLB.G3[4]INT:MUX.IMUX.CLB.G3[5]INT:MUX.IMUX.CLB.G3[7]INT:MUX.IMUX.CLB.F1[6]INT:MUX.IMUX.CLB.F1[7]INT:MUX.IMUX.CLB.G3[9]INT:MUX.IMUX.CLB.F1[2]-INT:MUX.IMUX.CLB.C1[3]
3
7 IOB0:MUX.OFF_D~IOB0:OFF_SRVALIOB0:PULL[0]~IOB0:INV.OFF_DIOB0:OFF_USEDINT:MUX.IMUX.IOB0.IK[8]INT:MUX.IMUX.IOB0.IK[1]INT:MUX.IMUX.IOB0.IK[4]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]~INT:PASS.SINGLE.H2.0.LONG.IO.V1~PULLUP.TBUF1:ENABLEINT:MUX.LONG.H5[3]~INT:PASS.IO.DOUBLE.1.E.0.0.IO.DBUF.V0~INT:PASS.IO.DOUBLE.3.E.0.0.IO.DBUF.V0~IOB1:IFF_CE_ENABLEINT:MUX.LONG.H5[2]~INT:PASS.DOUBLE.H0.0.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H2.0.OUT.LR.IOB0.I1INT:MUX.LONG.H4[2]~INT:PASS.DOUBLE.H0.1.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.H4[1]-~INT:BIPASS.SINGLE.H3.IO.OCTAL.E.4~INT:PASS.SINGLE.V4.0.LONG.H3.BUF~INT:BIPASS.SINGLE.V3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.V3~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.0~INT:BIPASS.SINGLE.H3.SINGLE.V3.S~INT:BIPASS.SINGLE.H3.SINGLE.H3.E~INT:BIPASS.SINGLE.H3.E.SINGLE.V3~INT:BIPASS.SINGLE.H3.E.SINGLE.V3.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6~INT:BIPASS.SINGLE.H6.SINGLE.H6.E~INT:BIPASS.SINGLE.H6.SINGLE.V6.S~INT:BIPASS.SINGLE.H6.E.SINGLE.V6.S~INT:BIPASS.SINGLE.V6.SINGLE.V6.S~INT:PASS.SINGLE.H3.E.0.LONG.V2~INT:PASS.SINGLE.V6.0.LONG.H5~INT:PASS.SINGLE.H3.E.0.LONG.V7~INT:BUF.LONG.V7.0.SINGLE.H3.E~INT:BUF.LONG.V6.0.SINGLE.H0.E~INT:BIPASS.SINGLE.H4.E.QUAD.V2.0~INT:BIPASS.SINGLE.H1.E.QUAD.V0.3~INT:PASS.SINGLE.H0.E.0.LONG.V6~INT:BIPASS.SINGLE.H0.E.QUAD.V0.1~INT:BUF.LONG.V8.0.SINGLE.H4.E~INT:BUF.LONG.V9.0.SINGLE.H7.E-
8~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
~IOB0:READBACK_I1IOB0:OMUX[2]~IOB0:READBACK_I2~IOB0:READBACK_OFFIOB0:OMUX[3]INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IO.DBUF.V1[3]INT:MUX.IO.DBUF.V1[2]INT:MUX.IO.DBUF.V1[0]INT:MUX.IO.DBUF.V1[1]INT:MUX.LONG.IO.V1[3]INT:MUX.LONG.IO.V1[1]INT:MUX.LONG.IO.V1[0]~INT:PASS.SINGLE.H3.0.OUT.LR.IOB1.I1.SINT:MUX.LONG.IO.V3[0]~INT:PASS.SINGLE.H6.0.LONG.IO.V3~IOB0:IFF_CE_ENABLEINT:MUX.LONG.IO.V3[1]INT:MUX.LONG.IO.V2[3]INT:MUX.LONG.IO.V2[2]INT:MUX.LONG.IO.V2[0]INT:MUX.LONG.IO.V2[1]~INT:PASS.SINGLE.H6.0.OUT.LR.IOB0.I1~INT:PASS.SINGLE.H7.0.OUT.LR.IOB1.I1.S~INT:BIPASS.SINGLE.H2.IO.OCTAL.E.5-~INT:BIPASS.DOUBLE.V0.0.DOUBLE.V0.2-~INT:BIPASS.DOUBLE.H0.2.DOUBLE.V0.2-~INT:BIPASS.SINGLE.H2.SINGLE.V2~INT:BIPASS.SINGLE.H2.SINGLE.H2.E~INT:BIPASS.SINGLE.H2.SINGLE.V2.S-~INT:BUF.LONG.V5.0.SINGLE.H6~INT:BIPASS.SINGLE.H6.SINGLE.V6~INT:BIPASS.SINGLE.H7.SINGLE.V7.S~INT:BUF.LONG.V1.0.SINGLE.H2.E~INT:BIPASS.SINGLE.H4.E.SINGLE.V4-~INT:BIPASS.SINGLE.H2.E.QUAD.V0.2~INT:BIPASS.SINGLE.H7.E.QUAD.V2.2~INT:BIPASS.DOUBLE.H0.2.QUAD.V0.0~INT:BIPASS.DOUBLE.H1.1.QUAD.V1.3-~INT:BIPASS.SINGLE.H5.E.QUAD.V1.1~INT:BIPASS.SINGLE.H6.E.QUAD.V2.3~INT:BIPASS.QUAD.H1.0.QUAD.H1.4~INT:BIPASS.SINGLE.H3.E.QUAD.V1.0-
9~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
~IOB0:INV.T~IOB0:INV.OFF_CLKIOB0:SLEWIOB0:OMUX[1]IOB0:OMUX[0]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.LONG.IO.V1[2]~INT:PASS.SINGLE.H3.0.DEC.V1~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.2~INT:BIPASS.SINGLE.H2.IO.DOUBLE.1.E.1~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.1~INT:BIPASS.IO.DOUBLE.1.E.0.IO.DOUBLE.1.E.2~INT:BIPASS.DOUBLE.H0.0.IO.DOUBLE.1.E.0~INT:BIPASS.SINGLE.H3.IO.DOUBLE.1.E.0~INT:PASS.SINGLE.H7.0.DEC.V3~IOB0:OFF_CE_ENABLE~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.2~INT:BIPASS.SINGLE.H6.IO.DOUBLE.3.E.1~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.1~INT:BIPASS.IO.DOUBLE.3.E.0.IO.DOUBLE.3.E.2~INT:BIPASS.DOUBLE.H1.1.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.DOUBLE.3.E.0~INT:BIPASS.SINGLE.H7.IO.OCTAL.E.8~INT:PASS.SINGLE.V7.0.GND~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.0~INT:BIPASS.DOUBLE.H0.0.DOUBLE.V0.2~INT:BIPASS.DOUBLE.H0.0.DOUBLE.H0.2~INT:BIPASS.SINGLE.V2.SINGLE.V2.S~INT:BIPASS.SINGLE.H2.E.SINGLE.V2~INT:BIPASS.SINGLE.H2.E.SINGLE.V2.S-~INT:PASS.SINGLE.H6.0.LONG.V5~INT:BIPASS.SINGLE.H7.SINGLE.V7~INT:BIPASS.SINGLE.V7.SINGLE.V7.S~INT:BIPASS.SINGLE.H7.E.SINGLE.V7~INT:BIPASS.SINGLE.H7.SINGLE.H7.E~INT:BIPASS.SINGLE.H7.E.SINGLE.V7.S~INT:PASS.SINGLE.H2.E.0.LONG.V1~INT:PASS.QUAD.H1.0.0.QBUF.1~INT:PASS.QUAD.V1.4.0.QBUF.1~INT:PASS.QUAD.H1.4.0.QBUF.1INT:MUX.QBUF.1[0]INT:MUX.QBUF.1[1]~INT:BIPASS.QUAD.H1.0.QUAD.V1.0~INT:BIPASS.QUAD.H1.0.QUAD.V1.4~INT:BIPASS.QUAD.V1.0.QUAD.V1.4~INT:BIPASS.QUAD.H1.4.QUAD.V1.0~INT:BIPASS.QUAD.H1.4.QUAD.V1.4
10~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
~IOB1:IFF_CE_ENABLE_NO_IQIOB1:DRIVE~INT:BIPASS.QUAD.H0.0.LONG.IO.V3~INT:PASS.QUAD.H0.0.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.1.E.0.QUAD.H0.1~INT:PASS.QUAD.H0.1.0.DEC.V3INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.CLB.G4[0]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.CLB.F4[1]~INT:PASS.QUAD.H2.1.0.DEC.V1~INT:BIPASS.IO.DOUBLE.3.E.1.QUAD.H2.1~INT:BIPASS.IO.DOUBLE.0.E.0.QUAD.H0.3~INT:PASS.QUAD.H0.3.0.OUT.LR.IOB1.I2.S~INT:BIPASS.QUAD.H2.0.LONG.IO.V1~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB1.I2.S~INT:PASS.QUAD.H2.0.0.OUT.LR.IOB0.I1INT:MUX.IMUX.CLB.C4[1]INT:MUX.IMUX.CLB.C4[3]INT:MUX.IMUX.CLB.C4[4]--------~INT:BIPASS.DOUBLE.V0.2.QUAD.H0.3~INT:BIPASS.SINGLE.V1.S.QUAD.H0.0~INT:BIPASS.SINGLE.V3.S.QUAD.H1.1~INT:BIPASS.SINGLE.V7.S.QUAD.H2.1~INT:BIPASS.DOUBLE.V1.1.QUAD.H2.0~INT:BIPASS.SINGLE.V5.S.QUAD.H2.3INT:MUX.QBUF.0[0]INT:MUX.QBUF.0[1]~INT:PASS.QUAD.V1.0.0.QBUF.1~INT:PASS.QUAD.V0.4.0.QBUF.0~INT:PASS.QUAD.H0.4.0.QBUF.0~INT:PASS.QUAD.H0.0.0.QBUF.0~INT:PASS.QUAD.V0.0.0.QBUF.0INT:MUX.QBUF.2[0]INT:MUX.QBUF.2[1]~INT:PASS.QUAD.V2.4.0.QBUF.2~INT:PASS.QUAD.H2.4.0.QBUF.2~INT:PASS.QUAD.H2.0.0.QBUF.2
11 ~IOB0:IFF_CE_ENABLE_NO_IQIOB0:DRIVE~INT:BIPASS.IO.DOUBLE.2.E.1.QUAD.H2.3~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB0.I2~INT:BIPASS.IO.DOUBLE.2.E.0.QUAD.H1.1~INT:PASS.QUAD.H1.1.0.DEC.V2-------INT:MUX.IMUX.CLB.G4[1]-INT:MUX.IMUX.CLB.F4[0]~INT:PASS.QUAD.H2.3.0.OUT.LR.IOB1.I1.S~INT:PASS.QUAD.H1.0.0.OUT.LR.IOB1.I1.S~INT:BIPASS.QUAD.H1.0.LONG.IO.V2~INT:BIPASS.IO.DOUBLE.3.E.0.QUAD.H2.2-~INT:BIPASS.IO.DOUBLE.1.E.1.QUAD.H1.2~INT:PASS.QUAD.H1.3.0.OUT.LR.IOB0.I1~INT:BIPASS.IO.DOUBLE.0.E.1.QUAD.H0.2INT:MUX.IMUX.CLB.C4[0]INT:MUX.IMUX.CLB.C4[2]--------~INT:BIPASS.SINGLE.V0.S.QUAD.H0.2~INT:BIPASS.SINGLE.V2.S.QUAD.H1.2~TBUF1:DRIVE1[1]~INT:BIPASS.SINGLE.V6.S.QUAD.H2.2~INT:BIPASS.SINGLE.V4.S.QUAD.H1.0~INT:BIPASS.QUAD.V0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.4~INT:BIPASS.QUAD.H0.4.QUAD.V0.0~INT:BIPASS.QUAD.H0.0.QUAD.H0.4~INT:BIPASS.QUAD.H0.0.QUAD.V0.0~INT:BIPASS.QUAD.V2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.4~INT:BIPASS.QUAD.H2.4.QUAD.V2.0~INT:BIPASS.QUAD.H2.0.QUAD.H2.4~INT:BIPASS.QUAD.H2.0.QUAD.V2.0~INT:PASS.QUAD.V2.0.0.QBUF.2
12
10 ------------------------------------
11------INT:MUX.IMUX.IOB1.CE[3]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.IMUX.IOB1.CE[2]INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
------INT:MUX.IMUX.IOB1.O1[3]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.IMUX.IOB1.O1[2]INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.OK[0]-INT:MUX.IMUX.IOB1.IK[0]-----~TBUF0:DRIVE1[1]---------------
@@ -16615,9 +16615,9 @@

IO.RS.FT

IO.RS.FT bittile 2
RowColumn
01
0.OUT.LR.IOB1.I20111
NONE1111
-
+
- + @@ -17079,9 +17079,9 @@

IO.RS.FT

INT:MUX.IMUX.IOB0.CE[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
INT:MUX.IMUX.IOB0.O1[0, 5, 8][0, 5, 9][0, 10, 10][0, 7, 9][0, 6, 9][0, 8, 10][0, 7, 10][0, 7, 8][0, 6, 10][0, 6, 8][0, 9, 10][0, 11, 10]
0.SINGLE.H2000011111111
0.SINGLE.H3000101111111
0.SINGLE.H4000110111111
0.QUAD.V2.010
0.QUAD.H2.411
-
+
- + @@ -17140,11 +17140,11 @@

IO.B

- + - + - + @@ -17177,9 +17177,9 @@

IO.B

 - + - +
INT:MUX.IMUX.IOB1.CE[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
INT:MUX.IMUX.IOB1.O1[0, 6, 0][0, 5, 0][1, 7, 11][0, 9, 1][0, 7, 0][0, 8, 0][0, 9, 0][1, 10, 11][1, 6, 11][1, 8, 11][1, 9, 11][1, 11, 11]
0.LONG.H0000011111111
0.LONG.H1000101111111
0.DEC.V2000110111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -18368,9 +18368,9 @@

IO.B0.GCLK71101 NONE1111 -
+
- + @@ -18471,9 +18471,9 @@

IO.B

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -18509,11 +18509,11 @@

IO.B.R

- + - + - + @@ -18546,9 +18546,9 @@

IO.B.R

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 -------------------------------------------------
3---------------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
---------------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4----------------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
----------------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -19737,9 +19737,9 @@

IO.B.R0.GCLK71101 NONE1111 -
+
- + @@ -19840,9 +19840,9 @@

IO.B.R

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -19878,11 +19878,11 @@

IO.BS

- + - + - + @@ -19915,9 +19915,9 @@

IO.BS

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 45, 3][1, 46, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 46, 3][1, 47, 3][1, 48, 3][1, 48, 4][0, 1, 3][1, 47, 4]
INT:MUX.IMUX.IOB1.O1[1, 45, 3][1, 46, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 46, 3][1, 47, 3][1, 48, 3][1, 48, 4][0, 1, 3][1, 47, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
72 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -21106,9 +21106,9 @@

IO.BS0.GCLK71101 NONE1111 -
+
- + @@ -21209,9 +21209,9 @@

IO.BS

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -21247,11 +21247,11 @@

IO.BS.L<

- + - + - + @@ -21284,9 +21284,9 @@

IO.BS.L<

- + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[4]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[3]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.S.0.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.S.0.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.0~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.0~INT:BIPASS.IO.DOUBLE.0.S.0.IO.DOUBLE.0.S.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.S.2~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.S.0~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.S.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.S.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.S.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.0~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.S.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.S.2~INT:PASS.IO.DOUBLE.1.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.S.2.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.S.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.S.2.0.GCLK5~INT:PASS.IO.DOUBLE.0.S.1.0.GCLK4~INT:PASS.QUAD.V1.3.0.DEC.H1~INT:BIPASS.IO.DOUBLE.0.S.2.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.S.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.S.2.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.S.2.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.S.2.QUAD.V0.3
3-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[6]INT:MUX.IMUX.IOB1.CE[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[6]INT:MUX.IMUX.IOB1.O1[8]~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.S.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.S.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.S.0.IO.DOUBLE.2.S.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.S.1~INT:BIPASS.IO.DOUBLE.3.S.0.IO.DOUBLE.3.S.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.S.1.0.LONG.V8~INT:BIPASS.QUAD.V0.0.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_NDEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H3INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H2~INT:PASS.SINGLE.V7.0.DEC.H0~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H1INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.0.LONG.IO.H3~INT:BIPASS.QUAD.V1.0.LONG.IO.H1
5---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H3.0.SINGLE.V4~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V2.3.0.DEC.H0-
6 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
7
2 --------------------------------------------
3----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
@@ -22475,9 +22475,9 @@

IO.BS.L< 0.GCLK71101 NONE1111 -
+
- + @@ -22594,9 +22594,9 @@

IO.BS.L<

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 3][0, 38, 3][0, 37, 3][0, 40, 4][0, 27, 3][0, 30, 3][0, 28, 3][0, 29, 3][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.S.21111111
-
+
- + @@ -22632,11 +22632,11 @@

IO.T

- + - + - + @@ -22678,9 +22678,9 @@

IO.T

 - + - +
INT:MUX.IMUX.IOB1.CE[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
INT:MUX.IMUX.IOB1.O1[1, 40, 3][1, 41, 4][0, 3, 4][0, 1, 4][0, 4, 5][0, 3, 3][0, 2, 4][0, 2, 3][1, 41, 3][1, 42, 3][1, 43, 3][1, 43, 4][0, 1, 3][1, 42, 4]
0.LONG.IO.H200001111111111
2.LONG.V100011011111111
0.DEC.H100011101111111
2 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
3---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
5-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
6 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
73 --------------------------------------------
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
5----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -23301,9 +23301,9 @@

IO.T0.GCLK5111101 NONE111111 -
+
- + @@ -23370,9 +23370,9 @@

IO.T

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -23408,11 +23408,11 @@

IO.T.R

- + - + - + @@ -23454,9 +23454,9 @@

IO.T.R

 - + - +
INT:MUX.IMUX.IOB1.CE[2, 40, 5][2, 41, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 41, 5][2, 42, 5][2, 43, 5][2, 43, 4][0, 1, 5][2, 42, 4]
INT:MUX.IMUX.IOB1.O1[2, 40, 5][2, 41, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 41, 5][2, 42, 5][2, 43, 5][2, 43, 4][0, 1, 5][2, 42, 4]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
2 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
3---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
5-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
6 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V0.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
73 -------------------------------------------------
4----------------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
----------------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
5---------------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
---------------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -24077,9 +24077,9 @@

IO.T.R0.GCLK5111101 NONE111111 -
+
- + @@ -24146,9 +24146,9 @@

IO.T.R

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -24184,11 +24184,11 @@

IO.TS

- + - + - + @@ -24230,9 +24230,9 @@

IO.TS

 - + - +
INT:MUX.IMUX.IOB1.CE[2, 45, 5][2, 46, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 46, 5][2, 47, 5][2, 48, 5][2, 48, 4][0, 1, 5][2, 47, 4]
INT:MUX.IMUX.IOB1.O1[2, 45, 5][2, 46, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 46, 5][2, 47, 5][2, 48, 5][2, 48, 4][0, 1, 5][2, 47, 4]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
2 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
3---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]~INT:PASS.QUAD.V0.2.0.OUT.TOP.COUT.E~INT:PASS.QUAD.V2.2.0.DEC.H3
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]---~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
5-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]----~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
6 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
73 --------------------------------------------
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
5----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -24853,9 +24853,9 @@

IO.TS0.GCLK5111101 NONE111111 -
+
- + @@ -24922,9 +24922,9 @@

IO.TS

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- + @@ -24960,11 +24960,11 @@

IO.TS.L<

- + - + - + @@ -25006,9 +25006,9 @@

IO.TS.L<

- + - +
INT:MUX.IMUX.IOB1.CE[2, 40, 5][2, 41, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 41, 5][2, 42, 5][2, 43, 5][2, 43, 4][0, 1, 5][2, 42, 4]
INT:MUX.IMUX.IOB1.O1[2, 40, 5][2, 41, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 41, 5][2, 42, 5][2, 43, 5][2, 43, 4][0, 1, 5][2, 42, 4]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111
2 --INT:MUX.LONG.V4[2]INT:MUX.LONG.V4[1]-INT:MUX.LONG.IO.H0[3]-INT:MUX.LONG.V3[2]INT:MUX.LONG.V3[1]INT:MUX.LONG.V5[2]INT:MUX.LONG.V5[0]INT:MUX.IMUX.IOB1.OK[7]INT:MUX.IMUX.IOB1.OK[6]INT:MUX.IMUX.IOB1.OK[0]INT:MUX.IMUX.IOB1.OK[1]INT:MUX.IMUX.IOB1.IK[7]INT:MUX.IMUX.IOB1.IK[0]INT:MUX.IMUX.IOB1.IK[6]INT:MUX.IMUX.IOB1.IK[1]INT:MUX.IMUX.IOB0.IK[3]INT:MUX.IMUX.IOB0.IK[2]INT:MUX.IMUX.IOB0.IK[0]INT:MUX.IMUX.IOB0.IK[1]~INT:PASS.SINGLE.V1.0.OUT.BT.IOB0.I2INT:MUX.IMUX.IOB0.OK[6]INT:MUX.IMUX.IOB0.OK[5]INT:MUX.IMUX.IOB0.OK[4]INT:MUX.IMUX.IOB0.OK[3]INT:MUX.IMUX.IOB0.OK[0]INT:MUX.IMUX.IOB0.OK[2]INT:MUX.IMUX.IOB0.OK[1]~INT:PASS.DOUBLE.V1.1.0.OUT.BT.IOB1.I2.E~INT:PASS.DOUBLE.V1.0.0.OUT.BT.IOB0.I2~INT:PASS.SINGLE.V5.0.OUT.BT.IOB0.I2INT:MUX.LONG.V2[0]INT:MUX.LONG.V1[1]~INT:PASS.SINGLE.V4.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H3[0]~INT:BUF.LONG.V9.0.LONG.IO.H3INT:MUX.LONG.IO.H3[1]--~INT:BUF.LONG.V8.0.LONG.IO.H2INT:MUX.LONG.IO.H2[1]INT:MUX.LONG.IO.H2[0]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB0.I2~INT:PASS.QUAD.V0.0.0.OUT.BT.IOB0.I2
3---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.CE[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]-~INT:PASS.QUAD.V2.2.0.DEC.H3
---INT:MUX.LONG.V4[0]INT:MUX.IMUX.IOB1.O1[9]INT:MUX.LONG.IO.H3[3]INT:MUX.LONG.V4[3]INT:MUX.LONG.V3[3]INT:MUX.LONG.V3[0]INT:MUX.LONG.V5[3]INT:MUX.LONG.V5[1]INT:MUX.IMUX.IOB1.OK[5]INT:MUX.IMUX.IOB1.OK[3]INT:MUX.IMUX.IOB1.OK[4]INT:MUX.IMUX.IOB1.OK[2]INT:MUX.IMUX.IOB1.IK[5]INT:MUX.IMUX.IOB1.IK[4]INT:MUX.IMUX.IOB1.IK[3]INT:MUX.IMUX.IOB1.IK[2]INT:MUX.IMUX.IOB0.IK[7]INT:MUX.IMUX.IOB0.IK[6]INT:MUX.IMUX.IOB0.IK[5]INT:MUX.IMUX.IOB0.IK[4]~INT:PASS.SINGLE.V0.0.OUT.BT.IOB1.I2.EINT:MUX.IMUX.IOB0.OK[7]~INT:BUF.LONG.H2.0.SINGLE.V3~INT:PASS.SINGLE.V6.0.OUT.BT.IOB0.I1INT:MUX.LONG.V0[3]INT:MUX.LONG.V0[2]INT:MUX.LONG.V0[0]INT:MUX.LONG.V0[1]INT:MUX.LONG.V2[2]INT:MUX.LONG.V2[3]INT:MUX.LONG.V2[1]INT:MUX.LONG.V1[2]INT:MUX.LONG.V1[0]INT:MUX.LONG.V1[3]~INT:PASS.QUAD.V2.0.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[0]~INT:PASS.QUAD.V0.3.0.OUT.BT.IOB1.I2.EINT:MUX.LONG.IO.H1[1]~INT:BUF.LONG.V7.0.LONG.IO.H1~INT:BUF.LONG.V6.0.LONG.IO.H0INT:MUX.LONG.IO.H0[1]INT:MUX.LONG.IO.H0[0]-~INT:PASS.QUAD.V2.2.0.DEC.H3
4-INT:MUX.IMUX.IOB1.CE[10]INT:MUX.IMUX.IOB1.CE[7]INT:MUX.IMUX.IOB1.CE[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.CE[13]INT:MUX.IMUX.IOB0.CE[2]INT:MUX.IMUX.IOB0.CE[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.CE[11]INT:MUX.IMUX.IOB0.CE[0]INT:MUX.IMUX.IOB0.CE[1]INT:MUX.IMUX.IOB0.CE[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
-INT:MUX.IMUX.IOB1.O1[10]INT:MUX.IMUX.IOB1.O1[7]INT:MUX.IMUX.IOB1.O1[11]DEC0:O2_N~DEC2:O2_N~DEC1:O2_P~DEC1:O1_P~DEC2:O1_NDEC0:O1_NDEC0:O3_N~DEC2:O3_N~DEC1:O3_P~DEC1:O4_P~DEC2:O4_NDEC0:O4_N~INT:PASS.SINGLE.V1.0.LONG.IO.H0INT:MUX.LONG.IO.H0[2]~INT:PASS.SINGLE.V2.0.LONG.IO.H1INT:MUX.LONG.IO.H1[3]~INT:PASS.SINGLE.V0.0.DEC.H0INT:MUX.LONG.IO.H2[4]INT:MUX.LONG.IO.H2[3]INT:MUX.LONG.IO.H2[2]INT:MUX.LONG.IO.H3[2]-~INT:PASS.SINGLE.V2.0.OUT.BT.IOB0.I1INT:MUX.IMUX.IOB0.O1[13]INT:MUX.IMUX.IOB0.O1[2]INT:MUX.IMUX.IOB0.O1[12]~INT:PASS.SINGLE.V3.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V3.0.DEC.H1~INT:PASS.SINGLE.V7.0.DEC.H3~INT:PASS.SINGLE.V7.0.OUT.BT.IOB1.I1.E~INT:PASS.SINGLE.V5.0.LONG.IO.H2~INT:PASS.SINGLE.V6.0.LONG.IO.H3~INT:PASS.SINGLE.V4.0.DEC.H2INT:MUX.IMUX.IOB0.O1[11]INT:MUX.IMUX.IOB0.O1[0]INT:MUX.IMUX.IOB0.O1[1]INT:MUX.IMUX.IOB0.O1[7]INT:MUX.ECLK.H[3]INT:MUX.ECLK.H[1]INT:MUX.ECLK.H[2]~INT:PASS.QUAD.V2.3.0.OUT.BT.IOB1.I1.E~INT:BIPASS.QUAD.V2.3.LONG.IO.H3~INT:BIPASS.QUAD.V1.3.LONG.IO.H1
5-INT:MUX.IMUX.IOB1.CE[1]INT:MUX.IMUX.IOB1.CE[8]INT:MUX.IMUX.IOB1.CE[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.CE[6]INT:MUX.IMUX.IOB0.CE[4]INT:MUX.IMUX.IOB0.CE[3]INT:MUX.IMUX.IOB0.CE[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.CE[8]INT:MUX.IMUX.IOB0.CE[9]INT:MUX.IMUX.IOB0.CE[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
-INT:MUX.IMUX.IOB1.O1[1]INT:MUX.IMUX.IOB1.O1[8]INT:MUX.IMUX.IOB1.O1[6]~DEC0:O2_PDEC2:O2_PDEC1:O2_NDEC1:O1_NDEC2:O1_P~DEC0:O1_P~DEC0:O3_PDEC2:O3_PDEC1:O3_NDEC1:O4_NDEC2:O4_P~DEC0:O4_P-~IOB0:READBACK_OFF~IOB1:READBACK_I2~IOB0:READBACK_I1-~INT:PASS.DOUBLE.V0.1.0.OUT.BT.IOB0.I1~INT:PASS.DOUBLE.V0.0.0.OUT.BT.IOB1.I1.EINT:MUX.LONG.IO.H2[5]INT:MUX.LONG.IO.H1[5]~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.1~INT:BIPASS.SINGLE.V2.IO.DOUBLE.1.N.1INT:MUX.IMUX.IOB0.O1[6]INT:MUX.IMUX.IOB0.O1[4]INT:MUX.IMUX.IOB0.O1[3]INT:MUX.IMUX.IOB0.O1[5]~INT:BIPASS.IO.DOUBLE.2.N.0.IO.DOUBLE.2.N.2~INT:BIPASS.SINGLE.V6.IO.DOUBLE.3.N.1~INT:BIPASS.IO.DOUBLE.3.N.0.IO.DOUBLE.3.N.2INT:MUX.IO.DBUF.H1[3]INT:MUX.IO.DBUF.H1[2]INT:MUX.IO.DBUF.H1[1]INT:MUX.IMUX.IOB0.O1[8]INT:MUX.IMUX.IOB0.O1[9]INT:MUX.IMUX.IOB0.O1[10]INT:MUX.ECLK.H[6]INT:MUX.ECLK.H[0]INT:MUX.ECLK.H[5]INT:MUX.ECLK.H[4]~INT:PASS.IO.DOUBLE.1.N.1.0.LONG.V8~INT:BIPASS.QUAD.V0.3.LONG.IO.H0~INT:PASS.QUAD.V1.3.0.OUT.BT.IOB0.I1
6 -INT:MUX.IMUX.IOB1.TS[1]INT:MUX.IMUX.IOB1.TS[5]INT:MUX.IMUX.IOB1.TS[3]INT:MUX.IMUX.IOB0.TS[5]INT:MUX.IMUX.IOB0.TS[4]INT:MUX.IMUX.IOB0.TS[7]INT:MUX.IMUX.IOB0.TS[6]INT:MUX.IO.DBUF.H0[3]INT:MUX.IO.DBUF.H0[2]~INT:PASS.IO.DOUBLE.1.N.2.0.IO.DBUF.H1~INT:PASS.IO.DOUBLE.0.N.2.0.IO.DBUF.H1INT:MUX.IMUX.IOB1.TS[0]~IOB1:OFF_CE_ENABLE~IOB1:IFF_CE_ENABLEINT:MUX.LONG.IO.H1[4]-~IOB1:READBACK_OFF~IOB1:READBACK_I1~IOB0:READBACK_I2-~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.1~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.2~INT:BIPASS.IO.DOUBLE.0.N.0.IO.DOUBLE.0.N.2~INT:BIPASS.SINGLE.V1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.1.IO.DOUBLE.0.N.0~INT:BIPASS.DOUBLE.V0.0.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V3.IO.DOUBLE.1.N.2~INT:BIPASS.SINGLE.V4.IO.DOUBLE.2.N.1~INT:BIPASS.DOUBLE.V1.0.IO.DOUBLE.2.N.1~INT:BIPASS.SINGLE.V5.IO.DOUBLE.2.N.2~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.2~INT:BIPASS.SINGLE.V7.IO.DOUBLE.3.N.0~INT:BIPASS.DOUBLE.V1.1.IO.DOUBLE.3.N.0~INT:PASS.IO.DOUBLE.1.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.0.N.0.0.IO.DBUF.H0~INT:PASS.IO.DOUBLE.3.N.1.0.GCLK7~INT:PASS.IO.DOUBLE.1.N.0.0.GCLK5~INT:PASS.IO.DOUBLE.0.N.1.0.GCLK4~INT:PASS.QUAD.V1.2.0.DEC.H2~INT:BIPASS.IO.DOUBLE.0.N.0.QUAD.V0.1~INT:BIPASS.IO.DOUBLE.1.N.1.QUAD.V1.1~INT:PASS.IO.DOUBLE.3.N.0.0.LONG.V6INT:MUX.VCLK[5]~INT:PASS.IO.DOUBLE.0.N.0.0.LONG.V9~INT:BIPASS.IO.DOUBLE.1.N.0.QUAD.V0.0
7
3 --------------------------------------------
4-----------------------------------------INT:MUX.IMUX.IOB1.CE[12]INT:MUX.IMUX.IOB1.CE[0]INT:MUX.IMUX.IOB1.CE[2]
-----------------------------------------INT:MUX.IMUX.IOB1.O1[12]INT:MUX.IMUX.IOB1.O1[0]INT:MUX.IMUX.IOB1.O1[2]
5----------------------------------------INT:MUX.IMUX.IOB1.CE[13]INT:MUX.IMUX.IOB1.CE[5]INT:MUX.IMUX.IOB1.CE[4]INT:MUX.IMUX.IOB1.CE[3]
----------------------------------------INT:MUX.IMUX.IOB1.O1[13]INT:MUX.IMUX.IOB1.O1[5]INT:MUX.IMUX.IOB1.O1[4]INT:MUX.IMUX.IOB1.O1[3]
@@ -25627,9 +25627,9 @@

IO.TS.L< 0.GCLK5111101 NONE111111 -
+
- + @@ -25711,9 +25711,9 @@

IO.TS.L<

INT:MUX.IMUX.IOB0.CE[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
INT:MUX.IMUX.IOB0.O1[0, 27, 4][0, 29, 4][0, 37, 4][0, 39, 5][0, 38, 5][0, 37, 5][0, 40, 4][0, 27, 5][0, 30, 5][0, 28, 5][0, 29, 5][0, 28, 4][0, 39, 4][0, 38, 4]
0.SINGLE.V200001111111111
0.SINGLE.V300010111111111
0.SINGLE.V400011011111111
0.BUFGE.H1111010
0.IO.DOUBLE.3.N.01111111
-
+
- +
INT:MUX.IMUX.IOB1.CE[2, 40, 5][2, 41, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 41, 5][2, 42, 5][2, 43, 5][2, 43, 4][0, 1, 5][2, 42, 4]
INT:MUX.IMUX.IOB1.O1[2, 40, 5][2, 41, 4][0, 3, 4][0, 1, 4][0, 4, 3][0, 2, 5][0, 2, 4][0, 3, 5][2, 41, 5][2, 42, 5][2, 43, 5][2, 43, 4][0, 1, 5][2, 42, 4]
0.LONG.IO.H200001111111111
1.LONG.V000011011111111
0.DEC.H200011101111111