diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle index 02f0b190..47dc2ad9 100644 Binary files a/.doctrees/environment.pickle and b/.doctrees/environment.pickle differ diff --git a/.doctrees/xc9500/jtag.doctree b/.doctrees/xc9500/jtag.doctree index ce1790e0..b8f1dc84 100644 Binary files a/.doctrees/xc9500/jtag.doctree and b/.doctrees/xc9500/jtag.doctree differ diff --git a/_sources/xc9500/jtag.rst.txt b/_sources/xc9500/jtag.rst.txt index 1dd8e822..b8ef7d9f 100644 --- a/_sources/xc9500/jtag.rst.txt +++ b/_sources/xc9500/jtag.rst.txt @@ -23,7 +23,7 @@ IR Instruction Register Notes ``11101001`` ``ISPENC`` ``ISPENABLE`` XC9500XL/XV only ``11101010`` ``FPGM`` ``ISPCONFIGURATION`` ``11101011`` ``FPGMI`` ``ISPDATA`` -``11101100`` ``FERASE`` ``ISPCONFIGURATION`` XC9500 only +``11101100`` ``FERASE`` ``ISPCONFIGURATION`` XC9500 revision 2 and up only ``11101100`` ``FERASE`` ``ISPADDRESS`` XC9500XL/XV only ``11101101`` ``FBULK`` ``ISPCONFIGURATION`` XC9500 only ``11101101`` ``FBULK`` ``ISPADDRESS`` XC9500XL/XV only @@ -58,7 +58,7 @@ IDCODE The IDCODE for XC9500* devices can be determined as follows: - bits 0-11: vendor code, ``0x093`` -- bits 12-19: number of FBs in the device +- bits 12-19: number of FBs in the device encoded as BCD - bits 20-27: device kind - ``0x95``: XC9500 @@ -67,6 +67,9 @@ The IDCODE for XC9500* devices can be determined as follows: - bits 28-31: device revision (varies) +For XC9500, device revisions older than 2 do not support the ``FBULK`` instruction and +require using ``FERASE``. + Boundary scan register ====================== @@ -184,6 +187,9 @@ There are two instructions that erase fuses: - ``FBULK``: erases either all main areas on the device at once, or all UIM wire-AND areas at once +Note that the ``FBULK`` instruction is not supported on (rarely seen) XC9500 devices with +revision older than 2. + An erase operation is triggered by the following sequence: 1. The DR is written in one of the above opcodes with strobe set to 1 and valid set to 0 diff --git a/searchindex.js b/searchindex.js index 91f2370a..e0838aa2 100644 --- a/searchindex.js +++ b/searchindex.js @@ -1 +1 @@ -Search.setIndex({"docnames": ["index", "xc2c/bitstream", "xc2c/index", "xc2c/intro", "xc2c/jtag", "xc2c/structure", "xc9500/bitstream-xc9500", "xc9500/bitstream-xc9500xl", "xc9500/database", "xc9500/index", "xc9500/intro", "xc9500/jtag", "xc9500/structure", "xpla3/bitstream", "xpla3/index", "xpla3/intro", "xpla3/jtag", "xpla3/structure"], "filenames": ["index.rst", "xc2c/bitstream.rst", "xc2c/index.rst", "xc2c/intro.rst", "xc2c/jtag.rst", "xc2c/structure.rst", "xc9500/bitstream-xc9500.rst", "xc9500/bitstream-xc9500xl.rst", "xc9500/database.rst", "xc9500/index.rst", "xc9500/intro.rst", "xc9500/jtag.rst", "xc9500/structure.rst", "xpla3/bitstream.rst", "xpla3/index.rst", "xpla3/intro.rst", "xpla3/jtag.rst", "xpla3/structure.rst"], "titles": ["Project Combine", "Bitstream structure", "Xilinx Coolrunner II CPLDs", "Introduction", "JTAG interface", "Device structure", "Bitstream structure \u2014 XC9500", "Bitstream structure \u2014 XC9500XL/XV", "Database schema", "Xilinx XC9500, XC9500XL, XC9500XV CPLDs", "Introduction", "JTAG interface", "Device structure", "Bitstream structure", "Xilinx XPLA3 CPLDs", "Introduction", "JTAG interface", "Device structure"], "terms": {"xilinx": [0, 3, 10, 15], "xc9500": [0, 3, 7, 8, 10], "xc9500xl": [0, 8, 10], "xc9500xv": [0, 8, 10, 11, 12], "cpld": [0, 3, 10, 12, 15], "xpla3": [0, 3, 15, 17], "coolrunn": [0, 3, 5], "ii": [0, 3, 5], "write": [1, 4, 5, 12, 13, 16, 17], "me": [1, 4, 5, 11, 13, 16, 17], "introduct": [2, 9, 14], "devic": [2, 6, 7, 9, 11, 14], "packag": [2, 8, 9, 12, 14], "pin": [2, 5, 8, 9, 12, 14, 17], "structur": [2, 8, 9, 14], "overview": [2, 9, 14], "aim": 2, "fb": [2, 3, 8, 9, 10, 11, 14, 15], "input": [2, 3, 9, 10, 11, 14, 15], "product": [2, 9, 14], "term": [2, 9, 14], "sum": [2, 6, 7, 9, 14], "xor": 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XC9500XL/XV": [[11, "programming-fuses-xc9500xl-xv"]], "Reading fuses \u2014 XC9500XL/XV": [[11, "reading-fuses-xc9500xl-xv"]], "Blank check \u2014 XC9500XL/XV": [[11, "blank-check-xc9500xl-xv"]], "UIM and FB inputs \u2014 XC9500": [[12, "uim-and-fb-inputs-xc9500"]], "UIM and FB inputs \u2014 XC9500XL/XV": [[12, "uim-and-fb-inputs-xc9500xl-xv"]], "FB global fuses": [[12, "fb-global-fuses"]], "PT import/export": [[12, "pt-import-export"]], "Flip-flop": [[12, "flip-flop"]], "Macrocell output \u2014 XC9500": [[12, "macrocell-output-xc9500"]], "Macrocell output \u2014 XC9500XL/XV": [[12, "macrocell-output-xc9500xl-xv"]], "Configuration pull-ups": [[12, "configuration-pull-ups"]], "XC9500XL/XV bus keeper": [[12, "xc9500xl-xv-bus-keeper"]], "Global networks \u2014 XC9500": [[12, "global-networks-xc9500"]], "Global networks \u2014 XC9500XL/XV": [[12, "global-networks-xc9500xl-xv"]], "Xilinx XPLA3 CPLDs": [[14, "xilinx-xpla3-cplds"]], "ZIA and FB inputs": [[17, "zia-and-fb-inputs"]], "FCLK networks": [[17, "fclk-networks"]], "Local control terms": [[17, "local-control-terms"]], "Universal control terms": [[17, "universal-control-terms"]], "Sum term, LUT2": [[17, "sum-term-lut2"]]}, "indexentries": {}}) \ No newline at end of file diff --git a/xc9500/jtag.html b/xc9500/jtag.html index 47eca057..2c68ce78 100644 --- a/xc9500/jtag.html +++ b/xc9500/jtag.html @@ -168,7 +168,7 @@

IR

11101100

FERASE

ISPCONFIGURATION

-

XC9500 only

+

XC9500 revision 2 and up only

11101100

FERASE

@@ -246,7 +246,7 @@

IDCODE<

The IDCODE for XC9500* devices can be determined as follows:

+

Note that the FBULK instruction is not supported on (rarely seen) XC9500 devices with +revision older than 2.

An erase operation is triggered by the following sequence:

  1. The DR is written in one of the above opcodes with strobe set to 1 and valid set to 0