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wanda-phi committed May 18, 2024
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1 change: 1 addition & 0 deletions _sources/index.rst.txt
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xc9500/index
xpla3/index
xc2c/index
xc2v/index



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38 changes: 38 additions & 0 deletions _sources/xc2v/bram.rst.txt
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Block RAM — Virtex 2, Spartan 3
###############################


Bitstream — Virtex 2
====================

.. raw:: html
:file: ../gen-xilinx-tile-xc2v-BRAM.html


Bitstream — Spartan 3
=====================

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-BRAM.S3.html



Bitstream — Spartan 3E
======================

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-BRAM.S3E.html


Bitstream — Spartan 3A
======================

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-BRAM.S3A.html


Bitstream — Spartan 3A DSP
==========================

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-BRAM.S3ADSP.html
9 changes: 9 additions & 0 deletions _sources/xc2v/clb-xc2v.rst.txt
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Configurable Logic Block — Virtex 2
###################################


Bitstream
=========

.. raw:: html
:file: ../gen-xilinx-tile-xc2v-CLB.html
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Configurable Logic Block — Spartan 3, Virtex 4
##############################################


Bitstream — Spartan 3
=====================

.. raw:: html
:file: ../gen-xilinx-tile-xc3s-CLB.html
12 changes: 12 additions & 0 deletions _sources/xc2v/index.rst.txt
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Xilinx Virtex 2 and Spartan 3 FPGAs
###################################

.. todo:: intro document, bitstream format, other tiles, jtag, ...

.. toctree::
:maxdepth: 2
:caption: Contents:

clb-xc2v
clb-xc3s
bram
1 change: 1 addition & 0 deletions genindex.html
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<li class="toctree-l1"><a class="reference internal" href="xc9500/index.html">Xilinx XC9500, XC9500XL, XC9500XV CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xpla3/index.html">Xilinx XPLA3 CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2c/index.html">Xilinx Coolrunner II CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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<li class="toctree-l1"><a class="reference internal" href="xc9500/index.html">Xilinx XC9500, XC9500XL, XC9500XV CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xpla3/index.html">Xilinx XPLA3 CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2c/index.html">Xilinx Coolrunner II CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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<li class="toctree-l1"><a class="reference internal" href="xc9500/index.html">Xilinx XC9500, XC9500XL, XC9500XV CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xpla3/index.html">Xilinx XPLA3 CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2c/index.html">Xilinx Coolrunner II CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>
</div>
</section>
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<li class="toctree-l1"><a class="reference internal" href="xc9500/index.html">Xilinx XC9500, XC9500XL, XC9500XV CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xpla3/index.html">Xilinx XPLA3 CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2c/index.html">Xilinx Coolrunner II CPLDs</a></li>
<li class="toctree-l1"><a class="reference internal" href="xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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1 change: 1 addition & 0 deletions xc2c/bitstream.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c128.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c32.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c32a.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c384.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c512.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c64.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
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1 change: 1 addition & 0 deletions xc2c/db-device-xc2c64a.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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1 change: 1 addition & 0 deletions xc2c/db-devices.html
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

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<script src="../_static/js/theme.js"></script>
<link rel="index" title="Index" href="../genindex.html" />
<link rel="search" title="Search" href="../search.html" />
<link rel="next" title="Xilinx Virtex 2 and Spartan 3 FPGAs" href="../xc2v/index.html" />
<link rel="prev" title="XC2C512" href="db-device-xc2c512.html" />
</head>

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</li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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</div>
<footer><div class="rst-footer-buttons" role="navigation" aria-label="Footer">
<a href="db-device-xc2c512.html" class="btn btn-neutral float-left" title="XC2C512" accesskey="p" rel="prev"><span class="fa fa-arrow-circle-left" aria-hidden="true"></span> Previous</a>
<a href="../xc2v/index.html" class="btn btn-neutral float-right" title="Xilinx Virtex 2 and Spartan 3 FPGAs" accesskey="n" rel="next">Next <span class="fa fa-arrow-circle-right" aria-hidden="true"></span></a>
</div>

<hr/>
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<li class="toctree-l2"><a class="reference internal" href="jtag.html">JTAG interface</a></li>
</ul>
</li>
<li class="toctree-l1"><a class="reference internal" href="../xc2v/index.html">Xilinx Virtex 2 and Spartan 3 FPGAs</a></li>
</ul>

</div>
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