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prjunnamed · Oct 16, 2024 · a63cb67 · a63cb67
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diff --git a/_sources/xilinx/virtex7/pcie.rst.txt b/_sources/xilinx/virtex7/pcie.rst.txt
@@ -2,15 +2,8 @@ PCI Express Gen2 cores
 ######################
 
 
-``PCIE_L``
-==========
+Bitstream
+=========
 
 .. raw:: html
-   :file: ../gen/tile-xc7v-PCIE_L.html
-
-
-``PCIE_R``
-==========
-
-.. raw:: html
-   :file: ../gen/tile-xc7v-PCIE_R.html
+   :file: ../gen/tile-xc7v-PCIE.html
diff --git a/searchindex.js b/searchindex.js
diff --git a/xilinx/virtex6/pcie.html b/xilinx/virtex6/pcie.html
diff --git a/xilinx/virtex7/index.html b/xilinx/virtex7/index.html
@@ -173,8 +173,7 @@ <h1>Virtex 7<a class="headerlink" href="#virtex-7" title="Link to this heading">
 </ul>
 </li>
 <li class="toctree-l1"><a class="reference internal" href="pcie.html">PCI Express Gen2 cores</a><ul>
-<li class="toctree-l2"><a class="reference internal" href="pcie.html#pcie-l"><code class="docutils literal notranslate"><span class="pre">PCIE_L</span></code></a></li>
-<li class="toctree-l2"><a class="reference internal" href="pcie.html#pcie-r"><code class="docutils literal notranslate"><span class="pre">PCIE_R</span></code></a></li>
+<li class="toctree-l2"><a class="reference internal" href="pcie.html#bitstream">Bitstream</a></li>
 </ul>
 </li>
 <li class="toctree-l1"><a class="reference internal" href="pcie3.html">PCI Express Gen3 cores</a><ul>