diff --git a/_i2_s_e_s_p32_v1_8h_source.html b/_i2_s_e_s_p32_v1_8h_source.html index 3dea25c01..a6743c341 100644 --- a/_i2_s_e_s_p32_v1_8h_source.html +++ b/_i2_s_e_s_p32_v1_8h_source.html @@ -82,122 +82,122 @@
11 #include "driver/i2s_tdm.h"
12 #include "esp_system.h"
13 
-
14 #define IS_I2S_IMPLEMENTED
+
14 #define IS_I2S_IMPLEMENTED
15 
-
16 
-
17 namespace audio_tools {
-
18 
-
26 class I2SDriverESP32V1 {
-
27  public:
-
29  I2SConfigESP32V1 defaultConfig(RxTxMode mode) {
-
30  I2SConfigESP32V1 c(mode);
-
31  return c;
-
32  }
-
34  bool setAudioInfo(AudioInfo info) {
-
35  // nothing to do
-
36  if (is_started) {
-
37  if (info.equals(cfg)) return true;
-
38  if (info.equalsExSampleRate(cfg)) {
-
39  cfg.sample_rate = info.sample_rate;
-
40  LOGI("i2s_set_sample_rates: %d", (int)info.sample_rate);
-
41  return getDriver(cfg).changeSampleRate(cfg, rx_chan, tx_chan);
-
42  }
-
43  } else {
-
44  LOGE("not started");
-
45  }
-
46  return false;
-
47  }
-
48 
-
50  bool begin(RxTxMode mode) { return begin(defaultConfig(mode)); }
-
51 
-
54  bool begin() { return (!is_started) ? begin(cfg) : true; }
-
55 
-
57  bool begin(I2SConfigESP32V1 cfg) {
-
58  TRACED();
-
59  this->cfg = cfg;
-
60 
-
61  // stop if it is already open
-
62  if (is_started) end();
-
63 
-
64  switch (cfg.rx_tx_mode) {
-
65  case TX_MODE:
-
66  return begin(cfg, cfg.pin_data, I2S_GPIO_UNUSED);
-
67  case RX_MODE:
-
68  // usually we expet cfg.pin_data but if the used assinged rx we might
-
69  // consider this one
-
70  return begin(cfg, I2S_GPIO_UNUSED,
-
71  cfg.pin_data_rx != I2S_GPIO_UNUSED ? cfg.pin_data_rx
-
72  : cfg.pin_data);
-
73  default:
-
74  return begin(cfg, cfg.pin_data, cfg.pin_data_rx);
-
75  }
-
76  LOGE("Did not expect go get here");
-
77  }
-
78 
-
80  int available() { return I2S_BUFFER_COUNT * I2S_BUFFER_SIZE; }
-
81 
-
83  int availableForWrite() { return I2S_BUFFER_COUNT * I2S_BUFFER_SIZE; }
-
84 
-
86  void end() {
-
87  TRACED();
-
88  if (rx_chan != nullptr) {
-
89  i2s_channel_disable(rx_chan);
-
90  i2s_del_channel(rx_chan);
-
91  rx_chan = nullptr;
-
92  }
-
93  if (tx_chan != nullptr) {
-
94  i2s_channel_disable(tx_chan);
-
95  i2s_del_channel(tx_chan);
-
96  tx_chan = nullptr;
-
97  }
-
98 
-
99  is_started = false;
-
100  }
-
101 
-
103  I2SConfigESP32V1 config() { return cfg; }
-
104 
-
106  size_t writeBytes(const void *src, size_t size_bytes) {
-
107  TRACED();
-
108  size_t result;
-
109  assert(tx_chan !=nullptr);
-
110  if (i2s_channel_write(tx_chan, src, size_bytes, &result,
-
111  ticks_to_wait_write) != ESP_OK) {
-
112  TRACEE();
-
113  }
-
114  return result;
-
115  }
-
116 
-
117  size_t readBytes(void *dest, size_t size_bytes) {
-
118  size_t result = 0;
-
119  if (i2s_channel_read(rx_chan, dest, size_bytes, &result,
-
120  ticks_to_wait_read) != ESP_OK) {
-
121  TRACEE();
-
122  }
-
123  return result;
-
124  }
-
125 
-
126  void setWaitTimeReadMs(TickType_t ms) {
-
127  ticks_to_wait_read = pdMS_TO_TICKS(ms);
-
128  }
-
129  void setWaitTimeWriteMs(TickType_t ms) {
-
130  ticks_to_wait_write = pdMS_TO_TICKS(ms);
-
131  }
-
132 
-
133  protected:
-
134  I2SConfigESP32V1 cfg = defaultConfig(RXTX_MODE);
-
135  i2s_std_config_t i2s_config;
-
136  i2s_chan_handle_t tx_chan = nullptr; // I2S tx channel handler
-
137  i2s_chan_handle_t rx_chan = nullptr; // I2S rx channel handler
-
138  bool is_started = false;
-
139  TickType_t ticks_to_wait_read = portMAX_DELAY;
-
140  TickType_t ticks_to_wait_write = portMAX_DELAY;
-
141 
-
142  struct DriverCommon {
-
143  virtual i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) = 0;
-
144  virtual bool startChannels(I2SConfigESP32V1 &cfg,
-
145  i2s_chan_handle_t &tx_chan,
-
146  i2s_chan_handle_t &rx_chan, int txPin,
-
147  int rxPin) = 0;
+
16 namespace audio_tools {
+
17 
+
25 class I2SDriverESP32V1 {
+
26  public:
+
28  I2SConfigESP32V1 defaultConfig(RxTxMode mode) {
+
29  I2SConfigESP32V1 c(mode);
+
30  return c;
+
31  }
+
33  bool setAudioInfo(AudioInfo info) {
+
34  // nothing to do
+
35  if (is_started) {
+
36  if (info.equals(cfg)) return true;
+
37  if (info.equalsExSampleRate(cfg)) {
+
38  cfg.sample_rate = info.sample_rate;
+
39  LOGI("i2s_set_sample_rates: %d", (int)info.sample_rate);
+
40  return getDriver(cfg).changeSampleRate(cfg, rx_chan, tx_chan);
+
41  }
+
42  } else {
+
43  LOGE("not started");
+
44  }
+
45  return false;
+
46  }
+
47 
+
49  bool begin(RxTxMode mode) { return begin(defaultConfig(mode)); }
+
50 
+
53  bool begin() { return (!is_started) ? begin(cfg) : true; }
+
54 
+
56  bool begin(I2SConfigESP32V1 cfg) {
+
57  TRACED();
+
58  this->cfg = cfg;
+
59 
+
60  // stop if it is already open
+
61  if (is_started) end();
+
62 
+
63  switch (cfg.rx_tx_mode) {
+
64  case TX_MODE:
+
65  return begin(cfg, cfg.pin_data, I2S_GPIO_UNUSED);
+
66  case RX_MODE:
+
67  // usually we expet cfg.pin_data but if the used assinged rx we might
+
68  // consider this one
+
69  return begin(cfg, I2S_GPIO_UNUSED,
+
70  cfg.pin_data_rx != I2S_GPIO_UNUSED ? cfg.pin_data_rx
+
71  : cfg.pin_data);
+
72  default:
+
73  return begin(cfg, cfg.pin_data, cfg.pin_data_rx);
+
74  }
+
75  LOGE("Did not expect go get here");
+
76  }
+
77 
+
79  int available() { return I2S_BUFFER_COUNT * I2S_BUFFER_SIZE; }
+
80 
+
82  int availableForWrite() { return I2S_BUFFER_COUNT * I2S_BUFFER_SIZE; }
+
83 
+
85  void end() {
+
86  TRACED();
+
87  if (rx_chan != nullptr) {
+
88  i2s_channel_disable(rx_chan);
+
89  i2s_del_channel(rx_chan);
+
90  rx_chan = nullptr;
+
91  }
+
92  if (tx_chan != nullptr) {
+
93  i2s_channel_disable(tx_chan);
+
94  i2s_del_channel(tx_chan);
+
95  tx_chan = nullptr;
+
96  }
+
97 
+
98  is_started = false;
+
99  }
+
100 
+
102  I2SConfigESP32V1 config() { return cfg; }
+
103 
+
105  size_t writeBytes(const void *src, size_t size_bytes) {
+
106  TRACED();
+
107  size_t result;
+
108  assert(tx_chan != nullptr);
+
109  if (i2s_channel_write(tx_chan, src, size_bytes, &result,
+
110  ticks_to_wait_write) != ESP_OK) {
+
111  TRACEE();
+
112  }
+
113  return result;
+
114  }
+
115 
+
116  size_t readBytes(void *dest, size_t size_bytes) {
+
117  size_t result = 0;
+
118  if (i2s_channel_read(rx_chan, dest, size_bytes, &result,
+
119  ticks_to_wait_read) != ESP_OK) {
+
120  TRACEE();
+
121  }
+
122  return result;
+
123  }
+
124 
+
125  void setWaitTimeReadMs(TickType_t ms) {
+
126  ticks_to_wait_read = pdMS_TO_TICKS(ms);
+
127  }
+
128  void setWaitTimeWriteMs(TickType_t ms) {
+
129  ticks_to_wait_write = pdMS_TO_TICKS(ms);
+
130  }
+
131 
+
132  protected:
+
133  I2SConfigESP32V1 cfg = defaultConfig(RXTX_MODE);
+
134  i2s_std_config_t i2s_config;
+
135  i2s_chan_handle_t tx_chan = nullptr; // I2S tx channel handler
+
136  i2s_chan_handle_t rx_chan = nullptr; // I2S rx channel handler
+
137  bool is_started = false;
+
138  TickType_t ticks_to_wait_read = portMAX_DELAY;
+
139  TickType_t ticks_to_wait_write = portMAX_DELAY;
+
140 
+
141  struct DriverCommon {
+
142  virtual bool startChannels(I2SConfigESP32V1 &cfg,
+
143  i2s_chan_handle_t &tx_chan,
+
144  i2s_chan_handle_t &rx_chan, int txPin,
+
145  int rxPin) = 0;
+
146 
+
147  virtual i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) = 0;
148  // changes the sample rate
149  virtual bool changeSampleRate(I2SConfigESP32V1 &cfg,
150  i2s_chan_handle_t &tx_chan,
@@ -207,381 +207,428 @@
154  };
155 
156  struct DriverI2S : public DriverCommon {
-
157  i2s_std_slot_config_t getSlotConfig(I2SConfigESP32V1 &cfg) {
-
158  TRACED();
-
159  i2s_std_slot_config_t result;
-
160  switch (cfg.i2s_format) {
-
161  case I2S_LEFT_JUSTIFIED_FORMAT:
-
162  case I2S_MSB_FORMAT:
-
163  result = I2S_STD_MSB_SLOT_DEFAULT_CONFIG(
-
164  (i2s_data_bit_width_t)cfg.bits_per_sample,
-
165  (i2s_slot_mode_t)cfg.channels);
-
166  break;
-
167  case I2S_PCM:
-
168  result = I2S_STD_PCM_SLOT_DEFAULT_CONFIG(
-
169  (i2s_data_bit_width_t)cfg.bits_per_sample,
-
170  (i2s_slot_mode_t)cfg.channels);
-
171  break;
-
172  default:
-
173  result = I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(
-
174  (i2s_data_bit_width_t)cfg.bits_per_sample,
-
175  (i2s_slot_mode_t)cfg.channels);
-
176  }
-
177 
-
178  // Update slot_mask if only one channel
-
179  if (cfg.channels == 1) {
-
180  switch (cfg.channel_format) {
-
181  case I2SChannelSelect::Left:
-
182  result.slot_mask = I2S_STD_SLOT_LEFT;
-
183  break;
-
184  case I2SChannelSelect::Right:
-
185  result.slot_mask = I2S_STD_SLOT_RIGHT;
-
186  break;
-
187  default:
-
188  LOGW("Using channel_format: I2SChannelSelect::Left for mono");
-
189  result.slot_mask = I2S_STD_SLOT_LEFT;
-
190  break;
-
191  }
-
192  }
-
193 
-
194  return result;
-
195  }
-
196 
-
197  i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
-
198  TRACED();
-
199  i2s_chan_config_t result = I2S_CHANNEL_DEFAULT_CONFIG(
-
200  (i2s_port_t)cfg.port_no,
-
201  cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
-
202  // use the legicy size parameters for frame num
-
203  int size = cfg.buffer_size * cfg.buffer_count;
-
204  int frame_size = cfg.bits_per_sample * cfg.channels / 8;
-
205  if (size > 0) result.dma_frame_num = size / frame_size;
-
206  LOGI("dma_frame_num: %d", (int)result.dma_frame_num);
-
207  result.auto_clear = cfg.auto_clear;
-
208  return result;
-
209  }
-
210 
-
211  i2s_std_clk_config_t getClockConfig(I2SConfigESP32V1 &cfg) {
-
212  TRACED();
-
213  i2s_std_clk_config_t clk_cfg =
-
214  I2S_STD_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
-
215  if (cfg.mclk_multiple > 0){
-
216  clk_cfg.mclk_multiple = (i2s_mclk_multiple_t) cfg.mclk_multiple;
-
217  } else {
-
218  if (cfg.pin_mck !=-1 && cfg.bits_per_sample == 24) {
-
219  // mclk_multiple' should be the multiple of 3 while using 24-bit
-
220  clk_cfg.mclk_multiple = I2S_MCLK_MULTIPLE_384;
-
221  LOGI("mclk_multiple=384");
-
222  }
-
223  }
-
224  return clk_cfg;
-
225  }
-
226 
-
227  bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
-
228  i2s_chan_handle_t &rx_chan, int txPin, int rxPin) {
-
229  TRACED();
-
230  LOGI("tx: %d, rx: %d", txPin, rxPin);
-
231  i2s_std_config_t std_cfg = {
-
232  .clk_cfg = getClockConfig(cfg),
-
233  .slot_cfg = getSlotConfig(cfg),
-
234  .gpio_cfg =
-
235  {
-
236  .mclk = (gpio_num_t)cfg.pin_mck,
-
237  .bclk = (gpio_num_t)cfg.pin_bck,
-
238  .ws = (gpio_num_t)cfg.pin_ws,
-
239  .dout = (gpio_num_t)txPin,
-
240  .din = (gpio_num_t)rxPin,
-
241  .invert_flags =
-
242  {
-
243  .mclk_inv = false,
-
244  .bclk_inv = false,
-
245  .ws_inv = false,
-
246  },
-
247  },
-
248  };
-
249 
-
250  if (cfg.rx_tx_mode == RXTX_MODE || cfg.rx_tx_mode == TX_MODE) {
-
251  if (i2s_channel_init_std_mode(tx_chan, &std_cfg) != ESP_OK) {
-
252  LOGE("i2s_channel_init_std_mode %s", "tx");
-
253  return false;
-
254  }
-
255  if (i2s_channel_enable(tx_chan) != ESP_OK) {
-
256  LOGE("i2s_channel_enable %s", "tx");
-
257  return false;
-
258  }
-
259  }
+
157  bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
+
158  i2s_chan_handle_t &rx_chan, int txPin, int rxPin) {
+
159  TRACED();
+
160  LOGI("tx: %d, rx: %d", txPin, rxPin);
+
161  i2s_std_config_t std_cfg = {
+
162  .clk_cfg = getClockConfig(cfg),
+
163  .slot_cfg = getSlotConfig(cfg),
+
164  .gpio_cfg =
+
165  {
+
166  .mclk = (gpio_num_t)cfg.pin_mck,
+
167  .bclk = (gpio_num_t)cfg.pin_bck,
+
168  .ws = (gpio_num_t)cfg.pin_ws,
+
169  .dout = (gpio_num_t)txPin,
+
170  .din = (gpio_num_t)rxPin,
+
171  .invert_flags =
+
172  {
+
173  .mclk_inv = false,
+
174  .bclk_inv = false,
+
175  .ws_inv = false,
+
176  },
+
177  },
+
178  };
+
179 
+
180  if (cfg.rx_tx_mode == RXTX_MODE || cfg.rx_tx_mode == TX_MODE) {
+
181  if (i2s_channel_init_std_mode(tx_chan, &std_cfg) != ESP_OK) {
+
182  LOGE("i2s_channel_init_std_mode %s", "tx");
+
183  return false;
+
184  }
+
185  if (i2s_channel_enable(tx_chan) != ESP_OK) {
+
186  LOGE("i2s_channel_enable %s", "tx");
+
187  return false;
+
188  }
+
189  }
+
190 
+
191  if (cfg.rx_tx_mode == RXTX_MODE || cfg.rx_tx_mode == RX_MODE) {
+
192  if (i2s_channel_init_std_mode(rx_chan, &std_cfg) != ESP_OK) {
+
193  LOGE("i2s_channel_init_std_mode %s", "rx");
+
194  return false;
+
195  }
+
196  if (i2s_channel_enable(rx_chan) != ESP_OK) {
+
197  LOGE("i2s_channel_enable %s", "rx");
+
198  return false;
+
199  }
+
200  }
+
201 
+
202  LOGD("%s - %s", __func__, "started");
+
203  return true;
+
204  }
+
205 
+
206  protected:
+
207  i2s_std_slot_config_t getSlotConfig(I2SConfigESP32V1 &cfg) {
+
208  TRACED();
+
209  i2s_std_slot_config_t result;
+
210  switch (cfg.i2s_format) {
+
211  case I2S_LEFT_JUSTIFIED_FORMAT:
+
212  case I2S_MSB_FORMAT:
+
213  result = I2S_STD_MSB_SLOT_DEFAULT_CONFIG(
+
214  (i2s_data_bit_width_t)cfg.bits_per_sample,
+
215  (i2s_slot_mode_t)cfg.channels);
+
216  break;
+
217  case I2S_PCM:
+
218  result = I2S_STD_PCM_SLOT_DEFAULT_CONFIG(
+
219  (i2s_data_bit_width_t)cfg.bits_per_sample,
+
220  (i2s_slot_mode_t)cfg.channels);
+
221  break;
+
222  default:
+
223  result = I2S_STD_PHILIPS_SLOT_DEFAULT_CONFIG(
+
224  (i2s_data_bit_width_t)cfg.bits_per_sample,
+
225  (i2s_slot_mode_t)cfg.channels);
+
226  }
+
227 
+
228  // Update slot_mask if only one channel
+
229  if (cfg.channels == 1) {
+
230  switch (cfg.channel_format) {
+
231  case I2SChannelSelect::Left:
+
232  result.slot_mask = I2S_STD_SLOT_LEFT;
+
233  break;
+
234  case I2SChannelSelect::Right:
+
235  result.slot_mask = I2S_STD_SLOT_RIGHT;
+
236  break;
+
237  default:
+
238  LOGW("Using channel_format: I2SChannelSelect::Left for mono");
+
239  result.slot_mask = I2S_STD_SLOT_LEFT;
+
240  break;
+
241  }
+
242  }
+
243 
+
244  return result;
+
245  }
+
246 
+
247  i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
+
248  TRACED();
+
249  i2s_chan_config_t result = I2S_CHANNEL_DEFAULT_CONFIG(
+
250  (i2s_port_t)cfg.port_no,
+
251  cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
+
252  // use the legicy size parameters for frame num
+
253  int size = cfg.buffer_size * cfg.buffer_count;
+
254  int frame_size = cfg.bits_per_sample * cfg.channels / 8;
+
255  if (size > 0) result.dma_frame_num = size / frame_size;
+
256  LOGI("dma_frame_num: %d", (int)result.dma_frame_num);
+
257  result.auto_clear = cfg.auto_clear;
+
258  return result;
+
259  }
260 
-
261  if (cfg.rx_tx_mode == RXTX_MODE || cfg.rx_tx_mode == RX_MODE) {
-
262  if (i2s_channel_init_std_mode(rx_chan, &std_cfg) != ESP_OK) {
-
263  LOGE("i2s_channel_init_std_mode %s", "rx");
-
264  return false;
-
265  }
-
266  if (i2s_channel_enable(rx_chan) != ESP_OK) {
-
267  LOGE("i2s_channel_enable %s", "rx");
-
268  return false;
-
269  }
-
270  }
-
271 
-
272  LOGD("%s - %s", __func__, "started");
-
273  return true;
-
274  }
-
275 
-
276  bool changeSampleRate(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
-
277  i2s_chan_handle_t &rx_chan) override {
-
278  bool rc = false;
-
279  auto clock_cfg = getClockConfig(cfg);
-
280  if (tx_chan != nullptr) {
-
281  i2s_channel_disable(tx_chan);
-
282  rc = i2s_channel_reconfig_std_clock(tx_chan, &clock_cfg) == ESP_OK;
-
283  i2s_channel_enable(tx_chan);
-
284  }
-
285  if (rx_chan != nullptr) {
-
286  i2s_channel_disable(rx_chan);
-
287  rc = i2s_channel_reconfig_std_clock(rx_chan, &clock_cfg) == ESP_OK;
-
288  i2s_channel_enable(rx_chan);
-
289  }
-
290  return rc;
-
291  }
-
292 
-
293  } i2s;
-
294 
-
295 #ifdef USE_PDM
-
296 
-
297  struct DriverPDM : public DriverCommon {
-
298  i2s_pdm_tx_slot_config_t getTxSlotConfig(I2SConfigESP32V1 &cfg) {
-
299  return I2S_PDM_TX_SLOT_DEFAULT_CONFIG(
-
300  (i2s_data_bit_width_t)cfg.bits_per_sample,
-
301  (i2s_slot_mode_t)cfg.channels);
-
302  }
-
303 
-
304  i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
-
305  return I2S_CHANNEL_DEFAULT_CONFIG(
-
306  (i2s_port_t)cfg.port_no,
-
307  cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
+
261  i2s_std_clk_config_t getClockConfig(I2SConfigESP32V1 &cfg) {
+
262  TRACED();
+
263  i2s_std_clk_config_t clk_cfg =
+
264  I2S_STD_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
+
265  if (cfg.mclk_multiple > 0) {
+
266  clk_cfg.mclk_multiple = (i2s_mclk_multiple_t)cfg.mclk_multiple;
+
267  } else {
+
268  if (cfg.pin_mck != -1 && cfg.bits_per_sample == 24) {
+
269  // mclk_multiple' should be the multiple of 3 while using 24-bit
+
270  clk_cfg.mclk_multiple = I2S_MCLK_MULTIPLE_384;
+
271  LOGI("mclk_multiple=384");
+
272  }
+
273  }
+
274  return clk_cfg;
+
275  }
+
276 
+
277  bool changeSampleRate(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
+
278  i2s_chan_handle_t &rx_chan) override {
+
279  bool rc = false;
+
280  auto clock_cfg = getClockConfig(cfg);
+
281  if (tx_chan != nullptr) {
+
282  i2s_channel_disable(tx_chan);
+
283  rc = i2s_channel_reconfig_std_clock(tx_chan, &clock_cfg) == ESP_OK;
+
284  i2s_channel_enable(tx_chan);
+
285  }
+
286  if (rx_chan != nullptr) {
+
287  i2s_channel_disable(rx_chan);
+
288  rc = i2s_channel_reconfig_std_clock(rx_chan, &clock_cfg) == ESP_OK;
+
289  i2s_channel_enable(rx_chan);
+
290  }
+
291  return rc;
+
292  }
+
293 
+
294  } i2s;
+
295 
+
296 #ifdef USE_PDM
+
297 
+
298  struct DriverPDM : public DriverCommon {
+
299  bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
+
300  i2s_chan_handle_t &rx_chan, int txPin, int rxPin) {
+
301  if (cfg.rx_tx_mode == TX_MODE) {
+
302  return startTX(cfg, tx_chan, txPin);
+
303  } else if (cfg.rx_tx_mode == RX_MODE) {
+
304  return startRX(cfg, tx_chan, txPin);
+
305  }
+
306  LOGE("Only RX and TX is supported for PDM")
+
307  return false;
308  }
309 
-
310  i2s_pdm_tx_clk_config_t getTxClockConfig(I2SConfigESP32V1 &cfg) {
-
311  return I2S_PDM_TX_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
-
312  }
-
313 
-
314  bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
-
315  i2s_chan_handle_t &rx_chan, int txPin, int rxPin) {
-
316  if (cfg.rx_tx_mode == TX_MODE) {
-
317  i2s_pdm_tx_config_t pdm_tx_cfg = {
-
318  .clk_cfg = getTxClockConfig(cfg),
-
319  .slot_cfg = getTxSlotConfig(cfg),
-
320  .gpio_cfg =
-
321  {
-
322  .clk = (gpio_num_t)cfg.pin_bck,
-
323  .dout = (gpio_num_t)txPin,
-
324  .invert_flags =
-
325  {
-
326  .clk_inv = false,
-
327  },
-
328  },
-
329  };
-
330 
-
331  if (i2s_channel_init_pdm_tx_mode(tx_chan, &pdm_tx_cfg) != ESP_OK) {
-
332  LOGE("i2s_channel_init_pdm_tx_mode %s", "tx");
-
333  return false;
-
334  }
-
335  if (i2s_channel_enable(tx_chan) != ESP_OK) {
-
336  LOGE("i2s_channel_enable %s", "tx");
-
337  return false;
-
338  }
-
339  } else {
-
340  LOGE("Only TX supported for PDM");
-
341  return false;
-
342  }
-
343  return true;
-
344  }
-
345  } pdm;
-
346 
-
347 #endif
-
348 
-
349 #ifdef USE_TDM
-
350  // example at
-
351  // https://github.com/espressif/esp-idf/blob/v5.3-dev/examples/peripherals/i2s/i2s_basic/i2s_tdm/main/i2s_tdm_example_main.c
-
352  struct DriverTDM : public DriverCommon {
-
353  i2s_tdm_slot_config_t getSlotConfig(I2SConfigESP32V1 &cfg) {
-
354  int slots = 0;
-
355  for (int j = 0; j < cfg.channels; j++) {
-
356  slots |= 1 << j;
-
357  }
-
358  // setup default format
-
359  i2s_tdm_slot_config_t slot_cfg = I2S_TDM_PHILIPS_SLOT_DEFAULT_CONFIG(
-
360  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
-
361  (i2s_tdm_slot_mask_t)slots);
+
310  protected:
+
311  i2s_pdm_tx_slot_config_t getTxSlotConfig(I2SConfigESP32V1 &cfg) {
+
312  return I2S_PDM_TX_SLOT_DEFAULT_CONFIG(
+
313  (i2s_data_bit_width_t)cfg.bits_per_sample,
+
314  (i2s_slot_mode_t)cfg.channels);
+
315  }
+
316 
+
317  i2s_pdm_rx_slot_config_t getRxSlotConfig(I2SConfigESP32V1 &cfg) {
+
318  return I2S_PDM_RX_SLOT_DEFAULT_CONFIG(
+
319  (i2s_data_bit_width_t)cfg.bits_per_sample,
+
320  (i2s_slot_mode_t)cfg.channels);
+
321  }
+
322 
+
323  i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
+
324  return I2S_CHANNEL_DEFAULT_CONFIG(
+
325  (i2s_port_t)cfg.port_no,
+
326  cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
+
327  }
+
328 
+
329  i2s_pdm_tx_clk_config_t getTxClockConfig(I2SConfigESP32V1 &cfg) {
+
330  return I2S_PDM_TX_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
+
331  }
+
332 
+
333  i2s_pdm_rx_clk_config_t getRxClockConfig(I2SConfigESP32V1 &cfg) {
+
334  return I2S_PDM_RX_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
+
335  }
+
336 
+
337  bool startTX(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, int txPin) {
+
338  i2s_pdm_tx_config_t pdm_tx_cfg = {
+
339  .clk_cfg = getTxClockConfig(cfg),
+
340  .slot_cfg = getTxSlotConfig(cfg),
+
341  .gpio_cfg =
+
342  {
+
343  .clk = (gpio_num_t)cfg.pin_bck,
+
344  .dout = (gpio_num_t)txPin,
+
345  .invert_flags =
+
346  {
+
347  .clk_inv = false,
+
348  },
+
349  },
+
350  };
+
351 
+
352  if (i2s_channel_init_pdm_tx_mode(tx_chan, &pdm_tx_cfg) != ESP_OK) {
+
353  LOGE("i2s_channel_init_pdm_tx_mode %s", "tx");
+
354  return false;
+
355  }
+
356  if (i2s_channel_enable(tx_chan) != ESP_OK) {
+
357  LOGE("i2s_channel_enable %s", "tx");
+
358  return false;
+
359  }
+
360  return true;
+
361  }
362 
-
363  switch(cfg.i2s_format){
-
364  case I2S_RIGHT_JUSTIFIED_FORMAT:
-
365  case I2S_LSB_FORMAT:
-
366  case I2S_PHILIPS_FORMAT:
-
367  case I2S_STD_FORMAT:
-
368  slot_cfg = I2S_TDM_PHILIPS_SLOT_DEFAULT_CONFIG(
-
369  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
-
370  (i2s_tdm_slot_mask_t)slots);
-
371  break;
-
372  case I2S_LEFT_JUSTIFIED_FORMAT:
-
373  case I2S_MSB_FORMAT:
-
374  slot_cfg = I2S_TDM_MSB_SLOT_DEFAULT_CONFIG(
-
375  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
-
376  (i2s_tdm_slot_mask_t)slots);
-
377  break;
-
378  case I2S_PCM:
-
379  slot_cfg = I2S_TDM_PCM_LONG_SLOT_DEFAULT_CONFIG(
-
380  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
-
381  (i2s_tdm_slot_mask_t)slots);
-
382  break;
-
383  default:
-
384  LOGE("TDM: Unsupported format");
+
363  bool startRX(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &rx_chan, int rxPin) {
+
364  i2s_pdm_rx_config_t pdm_rx_cfg = {
+
365  .clk_cfg = getRxClockConfig(cfg),
+
366  .slot_cfg = getRxSlotConfig(cfg),
+
367  .gpio_cfg =
+
368  {
+
369  .clk = (gpio_num_t)cfg.pin_bck,
+
370  .din = (gpio_num_t)rxPin,
+
371  .invert_flags =
+
372  {
+
373  .clk_inv = false,
+
374  },
+
375  },
+
376  };
+
377 
+
378  if (i2s_channel_init_pdm_rx_mode(rx_chan, &pdm_rx_cfg) != ESP_OK) {
+
379  LOGE("i2s_channel_init_pdm_rx_mode %s", "rx");
+
380  return false;
+
381  }
+
382  if (i2s_channel_enable(rx_chan) != ESP_OK) {
+
383  LOGE("i2s_channel_enable %s", "tx");
+
384  return false;
385  }
-
386 
-
387  return slot_cfg;
-
388  }
-
389 
-
390  i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
-
391  return I2S_CHANNEL_DEFAULT_CONFIG(
-
392  (i2s_port_t)cfg.port_no,
-
393  cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
-
394  }
-
395 
-
396  i2s_tdm_clk_config_t getClockConfig(I2SConfigESP32V1 &cfg) {
-
397  return I2S_TDM_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
-
398  }
-
399 
-
400  bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
-
401  i2s_chan_handle_t &rx_chan, int txPin, int rxPin) {
-
402  i2s_tdm_config_t tdm_cfg = {
-
403  .clk_cfg = getClockConfig(cfg),
-
404  .slot_cfg = getSlotConfig(cfg),
-
405  .gpio_cfg =
-
406  {
-
407  .mclk = (gpio_num_t)cfg.pin_mck,
-
408  .bclk = (gpio_num_t)cfg.pin_bck,
-
409  .ws = (gpio_num_t)cfg.pin_ws,
-
410  .dout = (gpio_num_t)txPin,
-
411  .din = (gpio_num_t)rxPin,
-
412  .invert_flags =
-
413  {
-
414  .mclk_inv = false,
-
415  .bclk_inv = false,
-
416  .ws_inv = false,
-
417  },
-
418  },
-
419  };
-
420 
-
421  if (cfg.rx_tx_mode == TX_MODE) {
-
422  if (i2s_channel_init_tdm_mode(tx_chan, &tdm_cfg) != ESP_OK) {
-
423  LOGE("i2s_channel_init_tdm_tx_mode %s", "tx");
-
424  return false;
-
425  }
-
426  }
-
427  if (cfg.rx_tx_mode == RX_MODE) {
-
428  if (i2s_channel_init_tdm_mode(rx_chan, &tdm_cfg) != ESP_OK) {
-
429  LOGE("i2s_channel_init_tdm_tx_mode %s", "rx");
-
430  return false;
-
431  }
-
432  return true;
-
433  }
-
434  return false;
-
435  }
-
436  } tdm;
-
437 
-
438 #endif
-
439 
-
441 
-
443  bool begin(I2SConfigESP32V1 cfg, int txPin, int rxPin) {
-
444  TRACED();
-
445  cfg.logInfo();
-
446  this->cfg = cfg;
-
447  if (cfg.channels <= 0 || cfg.channels > 2) {
-
448  LOGE("invalid channels: %d", cfg.channels);
-
449  return false;
-
450  }
-
451 
-
452  DriverCommon &driver = getDriver(cfg);
-
453  if (!newChannels(cfg, driver)) {
-
454  end();
-
455  return false;
-
456  }
-
457 
-
458  is_started = driver.startChannels(cfg, tx_chan, rx_chan, txPin, rxPin);
-
459  if (!is_started) {
-
460  end();
-
461  LOGE("Channels not started");
-
462  }
-
463  return is_started;
-
464  }
-
465 
-
466  bool newChannels(I2SConfigESP32V1 &cfg, DriverCommon &driver) {
-
467  i2s_chan_config_t chan_cfg = driver.getChannelConfig(cfg);
-
468  switch (cfg.rx_tx_mode) {
-
469  case RX_MODE:
-
470  if (i2s_new_channel(&chan_cfg, NULL, &rx_chan) != ESP_OK) {
-
471  LOGE("i2s_channel");
-
472  return false;
-
473  }
-
474  break;
-
475  case TX_MODE:
-
476  if (i2s_new_channel(&chan_cfg, &tx_chan, NULL) != ESP_OK) {
-
477  LOGE("i2s_channel");
-
478  return false;
-
479  }
-
480  break;
-
481  default:
-
482  if (i2s_new_channel(&chan_cfg, &tx_chan, &rx_chan) != ESP_OK) {
-
483  LOGE("i2s_channel");
-
484  return false;
-
485  }
-
486  }
-
487  return true;
-
488  }
-
489 
-
490  DriverCommon &getDriver(I2SConfigESP32V1 &cfg) {
-
491  switch (cfg.signal_type) {
-
492  case Digital:
-
493  return i2s;
-
494 #ifdef USE_PDM
-
495  case Analog:
-
496  case PDM:
-
497  return pdm;
-
498 #endif
-
499 #ifdef USE_TDM
-
500  case TDM:
-
501  return tdm;
-
502 #endif
-
503  default:
-
504  break;
-
505  }
-
506  LOGE("Unsupported singal_type");
-
507  return i2s;
-
508  }
-
509 };
-
510 
-
511 using I2SDriver = I2SDriverESP32V1;
+
386  return true;
+
387  }
+
388 
+
389  } pdm;
+
390 
+
391 #endif
+
392 
+
393 #ifdef USE_TDM
+
394  // example at
+
395  // https://github.com/espressif/esp-idf/blob/v5.3-dev/examples/peripherals/i2s/i2s_basic/i2s_tdm/main/i2s_tdm_example_main.c
+
396  struct DriverTDM : public DriverCommon {
+
397  bool startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan,
+
398  i2s_chan_handle_t &rx_chan, int txPin, int rxPin) {
+
399  i2s_tdm_config_t tdm_cfg = {
+
400  .clk_cfg = getClockConfig(cfg),
+
401  .slot_cfg = getSlotConfig(cfg),
+
402  .gpio_cfg =
+
403  {
+
404  .mclk = (gpio_num_t)cfg.pin_mck,
+
405  .bclk = (gpio_num_t)cfg.pin_bck,
+
406  .ws = (gpio_num_t)cfg.pin_ws,
+
407  .dout = (gpio_num_t)txPin,
+
408  .din = (gpio_num_t)rxPin,
+
409  .invert_flags =
+
410  {
+
411  .mclk_inv = false,
+
412  .bclk_inv = false,
+
413  .ws_inv = false,
+
414  },
+
415  },
+
416  };
+
417 
+
418  if (cfg.rx_tx_mode == TX_MODE) {
+
419  if (i2s_channel_init_tdm_mode(tx_chan, &tdm_cfg) != ESP_OK) {
+
420  LOGE("i2s_channel_init_tdm_tx_mode %s", "tx");
+
421  return false;
+
422  }
+
423  }
+
424  if (cfg.rx_tx_mode == RX_MODE) {
+
425  if (i2s_channel_init_tdm_mode(rx_chan, &tdm_cfg) != ESP_OK) {
+
426  LOGE("i2s_channel_init_tdm_tx_mode %s", "rx");
+
427  return false;
+
428  }
+
429  return true;
+
430  }
+
431  LOGE("Only RX and TX is supported for TDM")
+
432  return false;
+
433  }
+
434 
+
435  protected:
+
436  i2s_tdm_slot_config_t getSlotConfig(I2SConfigESP32V1 &cfg) {
+
437  int slots = 0;
+
438  for (int j = 0; j < cfg.channels; j++) {
+
439  slots |= 1 << j;
+
440  }
+
441  // setup default format
+
442  i2s_tdm_slot_config_t slot_cfg = I2S_TDM_PHILIPS_SLOT_DEFAULT_CONFIG(
+
443  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
+
444  (i2s_tdm_slot_mask_t)slots);
+
445 
+
446  switch (cfg.i2s_format) {
+
447  case I2S_RIGHT_JUSTIFIED_FORMAT:
+
448  case I2S_LSB_FORMAT:
+
449  case I2S_PHILIPS_FORMAT:
+
450  case I2S_STD_FORMAT:
+
451  slot_cfg = I2S_TDM_PHILIPS_SLOT_DEFAULT_CONFIG(
+
452  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
+
453  (i2s_tdm_slot_mask_t)slots);
+
454  break;
+
455  case I2S_LEFT_JUSTIFIED_FORMAT:
+
456  case I2S_MSB_FORMAT:
+
457  slot_cfg = I2S_TDM_MSB_SLOT_DEFAULT_CONFIG(
+
458  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
+
459  (i2s_tdm_slot_mask_t)slots);
+
460  break;
+
461  case I2S_PCM:
+
462  slot_cfg = I2S_TDM_PCM_LONG_SLOT_DEFAULT_CONFIG(
+
463  (i2s_data_bit_width_t)cfg.bits_per_sample, I2S_SLOT_MODE_STEREO,
+
464  (i2s_tdm_slot_mask_t)slots);
+
465  break;
+
466  default:
+
467  LOGE("TDM: Unsupported format");
+
468  }
+
469 
+
470  return slot_cfg;
+
471  }
+
472 
+
473  i2s_chan_config_t getChannelConfig(I2SConfigESP32V1 &cfg) {
+
474  return I2S_CHANNEL_DEFAULT_CONFIG(
+
475  (i2s_port_t)cfg.port_no,
+
476  cfg.is_master ? I2S_ROLE_MASTER : I2S_ROLE_SLAVE);
+
477  }
+
478 
+
479  i2s_tdm_clk_config_t getClockConfig(I2SConfigESP32V1 &cfg) {
+
480  return I2S_TDM_CLK_DEFAULT_CONFIG((uint32_t)cfg.sample_rate);
+
481  }
+
482 
+
483  } tdm;
+
484 
+
485 #endif
+
486 
+
488 
+
490  bool begin(I2SConfigESP32V1 cfg, int txPin, int rxPin) {
+
491  TRACED();
+
492  cfg.logInfo();
+
493  this->cfg = cfg;
+
494  if (cfg.channels <= 0 || cfg.channels > 2) {
+
495  LOGE("invalid channels: %d", cfg.channels);
+
496  return false;
+
497  }
+
498 
+
499  DriverCommon &driver = getDriver(cfg);
+
500  if (!newChannels(cfg, driver)) {
+
501  end();
+
502  return false;
+
503  }
+
504 
+
505  is_started = driver.startChannels(cfg, tx_chan, rx_chan, txPin, rxPin);
+
506  if (!is_started) {
+
507  end();
+
508  LOGE("Channels not started");
+
509  }
+
510  return is_started;
+
511  }
512 
-
513 } // namespace audio_tools
-
514 
-
515 #endif
+
513  bool newChannels(I2SConfigESP32V1 &cfg, DriverCommon &driver) {
+
514  i2s_chan_config_t chan_cfg = driver.getChannelConfig(cfg);
+
515  switch (cfg.rx_tx_mode) {
+
516  case RX_MODE:
+
517  if (i2s_new_channel(&chan_cfg, NULL, &rx_chan) != ESP_OK) {
+
518  LOGE("i2s_channel");
+
519  return false;
+
520  }
+
521  break;
+
522  case TX_MODE:
+
523  if (i2s_new_channel(&chan_cfg, &tx_chan, NULL) != ESP_OK) {
+
524  LOGE("i2s_channel");
+
525  return false;
+
526  }
+
527  break;
+
528  default:
+
529  if (i2s_new_channel(&chan_cfg, &tx_chan, &rx_chan) != ESP_OK) {
+
530  LOGE("i2s_channel");
+
531  return false;
+
532  }
+
533  }
+
534  return true;
+
535  }
+
536 
+
537  DriverCommon &getDriver(I2SConfigESP32V1 &cfg) {
+
538  switch (cfg.signal_type) {
+
539  case Digital:
+
540  return i2s;
+
541 #ifdef USE_PDM
+
542  case Analog:
+
543  case PDM:
+
544  return pdm;
+
545 #endif
+
546 #ifdef USE_TDM
+
547  case TDM:
+
548  return tdm;
+
549 #endif
+
550  default:
+
551  break;
+
552  }
+
553  LOGE("Unsupported singal_type");
+
554  return i2s;
+
555  }
+
556 };
+
557 
+
558 using I2SDriver = I2SDriverESP32V1;
+
559 
+
560 } // namespace audio_tools
+
561 
+
562 #endif
audio_tools::I2SConfigESP32V1
Configuration for ESP32 i2s for IDF > 5.0.
Definition: I2SConfigESP32V1.h:22
audio_tools::I2SConfigESP32V1::buffer_count
int buffer_count
not used any more
Definition: I2SConfigESP32V1.h:66
audio_tools::I2SConfigESP32V1::rx_tx_mode
RxTxMode rx_tx_mode
public settings
Definition: I2SConfigESP32V1.h:55
audio_tools::I2SConfigESP32V1::mclk_multiple
int mclk_multiple
masterclock multiple (-1 = use default)
Definition: I2SConfigESP32V1.h:74
audio_tools::I2SConfigESP32V1::channel_format
I2SChannelSelect channel_format
Select left or right channel when channels == 1.
Definition: I2SConfigESP32V1.h:72
audio_tools::I2SConfigESP32V1::buffer_size
int buffer_size
not used any more
Definition: I2SConfigESP32V1.h:68
-
audio_tools::I2SDriverESP32V1
Basic I2S API for the ESP32 (using the new API). https://docs.espressif.com/projects/esp-idf/en/v5....
Definition: I2SESP32V1.h:26
-
audio_tools::I2SDriverESP32V1::defaultConfig
I2SConfigESP32V1 defaultConfig(RxTxMode mode)
Provides the default configuration.
Definition: I2SESP32V1.h:29
-
audio_tools::I2SDriverESP32V1::begin
bool begin(I2SConfigESP32V1 cfg)
starts the DAC
Definition: I2SESP32V1.h:57
-
audio_tools::I2SDriverESP32V1::available
int available()
we assume the data is already available in the buffer
Definition: I2SESP32V1.h:80
-
audio_tools::I2SDriverESP32V1::begin
bool begin()
Definition: I2SESP32V1.h:54
-
audio_tools::I2SDriverESP32V1::setAudioInfo
bool setAudioInfo(AudioInfo info)
Potentially updates the sample rate (if supported)
Definition: I2SESP32V1.h:34
-
audio_tools::I2SDriverESP32V1::availableForWrite
int availableForWrite()
We limit the write size to the buffer size.
Definition: I2SESP32V1.h:83
-
audio_tools::I2SDriverESP32V1::config
I2SConfigESP32V1 config()
provides the actual configuration
Definition: I2SESP32V1.h:103
-
audio_tools::I2SDriverESP32V1::end
void end()
stops the I2C and unistalls the driver
Definition: I2SESP32V1.h:86
-
audio_tools::I2SDriverESP32V1::begin
bool begin(RxTxMode mode)
starts the DAC with the default config
Definition: I2SESP32V1.h:50
-
audio_tools::I2SDriverESP32V1::begin
bool begin(I2SConfigESP32V1 cfg, int txPin, int rxPin)
-> protected methods from I2SDriverESP32V1
Definition: I2SESP32V1.h:443
-
audio_tools::I2SDriverESP32V1::writeBytes
size_t writeBytes(const void *src, size_t size_bytes)
writes the data to the I2S interface
Definition: I2SESP32V1.h:106
+
audio_tools::I2SDriverESP32V1
Basic I2S API for the ESP32 (using the new API). https://docs.espressif.com/projects/esp-idf/en/v5....
Definition: I2SESP32V1.h:25
+
audio_tools::I2SDriverESP32V1::defaultConfig
I2SConfigESP32V1 defaultConfig(RxTxMode mode)
Provides the default configuration.
Definition: I2SESP32V1.h:28
+
audio_tools::I2SDriverESP32V1::begin
bool begin(I2SConfigESP32V1 cfg)
starts the DAC
Definition: I2SESP32V1.h:56
+
audio_tools::I2SDriverESP32V1::available
int available()
we assume the data is already available in the buffer
Definition: I2SESP32V1.h:79
+
audio_tools::I2SDriverESP32V1::begin
bool begin()
Definition: I2SESP32V1.h:53
+
audio_tools::I2SDriverESP32V1::setAudioInfo
bool setAudioInfo(AudioInfo info)
Potentially updates the sample rate (if supported)
Definition: I2SESP32V1.h:33
+
audio_tools::I2SDriverESP32V1::availableForWrite
int availableForWrite()
We limit the write size to the buffer size.
Definition: I2SESP32V1.h:82
+
audio_tools::I2SDriverESP32V1::config
I2SConfigESP32V1 config()
provides the actual configuration
Definition: I2SESP32V1.h:102
+
audio_tools::I2SDriverESP32V1::end
void end()
stops the I2C and unistalls the driver
Definition: I2SESP32V1.h:85
+
audio_tools::I2SDriverESP32V1::begin
bool begin(RxTxMode mode)
starts the DAC with the default config
Definition: I2SESP32V1.h:49
+
audio_tools::I2SDriverESP32V1::begin
bool begin(I2SConfigESP32V1 cfg, int txPin, int rxPin)
-> protected methods from I2SDriverESP32V1
Definition: I2SESP32V1.h:490
+
audio_tools::I2SDriverESP32V1::writeBytes
size_t writeBytes(const void *src, size_t size_bytes)
writes the data to the I2S interface
Definition: I2SESP32V1.h:105
audio_tools::RxTxMode
RxTxMode
The Microcontroller is the Audio Source (TX_MODE) or Audio Sink (RX_MODE). RXTX_MODE is Source and Si...
Definition: AudioTypes.h:26
audio_tools
Generic Implementation of sound input and output for desktop environments using portaudio.
Definition: AudioConfig.h:821
audio_tools::AudioInfo
Basic Audio information which drives e.g. I2S.
Definition: AudioTypes.h:50
@@ -590,7 +637,7 @@
audio_tools::AudioInfo::channels
uint16_t channels
Number of channels: 2=stereo, 1=mono.
Definition: AudioTypes.h:55
audio_tools::AudioInfo::equalsExSampleRate
bool equalsExSampleRate(AudioInfo alt)
Checks if only the sample rate is different.
Definition: AudioTypes.h:88
audio_tools::AudioInfo::bits_per_sample
uint8_t bits_per_sample
Number of bits per sample (int16_t = 16 bits)
Definition: AudioTypes.h:57
-
audio_tools::I2SDriverESP32V1::DriverCommon
Definition: I2SESP32V1.h:142
+
audio_tools::I2SDriverESP32V1::DriverCommon
Definition: I2SESP32V1.h:141
audio_tools::I2SDriverESP32V1::DriverI2S
Definition: I2SESP32V1.h:156
diff --git a/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s-members.html b/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s-members.html index 6e89eba91..99d8a4b29 100644 --- a/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s-members.html +++ b/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s-members.html @@ -72,10 +72,10 @@

This is the complete list of members for I2SDriverESP32V1::DriverI2S, including all inherited members.

- - - - + + + +
changeSampleRate(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, i2s_chan_handle_t &rx_chan) override (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlinevirtual
getChannelConfig(I2SConfigESP32V1 &cfg) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlinevirtual
getClockConfig(I2SConfigESP32V1 &cfg) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinline
getSlotConfig(I2SConfigESP32V1 &cfg) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinline
changeSampleRate(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, i2s_chan_handle_t &rx_chan) override (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlineprotectedvirtual
getChannelConfig(I2SConfigESP32V1 &cfg) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlineprotectedvirtual
getClockConfig(I2SConfigESP32V1 &cfg) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlineprotected
getSlotConfig(I2SConfigESP32V1 &cfg) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlineprotected
startChannels(I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, i2s_chan_handle_t &rx_chan, int txPin, int rxPin) (defined in I2SDriverESP32V1::DriverI2S)I2SDriverESP32V1::DriverI2Sinlinevirtual
diff --git a/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s.html b/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s.html index acb0a5d36..d38ea7a1c 100644 --- a/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s.html +++ b/structaudio__tools_1_1_i2_s_driver_e_s_p32_v1_1_1_driver_i2_s.html @@ -67,6 +67,7 @@
Public Member Functions | +Protected Member Functions | List of all members
I2SDriverESP32V1::DriverI2S Struct Reference
@@ -84,6 +85,12 @@ + + +

Public Member Functions

+bool startChannels (I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, i2s_chan_handle_t &rx_chan, int txPin, int rxPin)
 
+ @@ -96,9 +103,6 @@ - -

+Protected Member Functions

bool changeSampleRate (I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, i2s_chan_handle_t &rx_chan) override
 
i2s_std_slot_config_t getSlotConfig (I2SConfigESP32V1 &cfg)
 
-bool startChannels (I2SConfigESP32V1 &cfg, i2s_chan_handle_t &tx_chan, i2s_chan_handle_t &rx_chan, int txPin, int rxPin)
 
The documentation for this struct was generated from the following file: