rvdebug.cfg

#defn rvdebug.cfg 2023-06-10  ;# cant be here, yet, chicken-egg thing
#====================== rvdebug.cfg ===================
# 
#  2023-06-13  pds   initial cut

#  2021-11-22  pds   initial cut
#  2022-03-24  pds   mod asic_ram_load and asic_rom_load for deprecations: brace args of expr; replace mem2array with read_memory
#  2022-06-15  pds   create unbrick.cfg
#  2023-06-10  pds   evolve to rvdebug.cfg

#============
proc ndef {pkg} { return [expr { [llength [lsearch -all -exact [package names] $pkg]] == 0 }] }
proc defn {pkg {ver ""}} { if [ndef $pkg] { package provide ${pkg} ${ver} } }
proc incl {pkg {ver ""}} { if [ndef $pkg] { source $pkg ; package require $pkg $ver } }
#============

gdb_port disabled     ;# 3333 or 'disabled'
tcl_port disabled     ;# 6666 or 'disabled'
telnet_port disabled  ;# 4444 or 'disabled'


lappend tcl_pkgPath {D:\aaWork\prj\SiFive\aa HOW\Room A-4\rvdebug}


#-------------- debugger tool ------------------------- (hardware-connections.cfg)
#
# ADAPTER DRIVER (aka, INTERFACE)
#
#   pick one of openocd -c "echo [adapter driver list]"
#

adapter driver ftdi

#-----
#ftdi device_desc "Olimex OpenOCD JTAG ARM-USB-TINY-H"
#ftdi vid_pid 0x15ba 0x002a
#-----

#-----
#ftdi device_desc "UM232H-B"
#ftdi vid_pid 0x0403 0x6014
#-----

#-----
ftdi device_desc "C232HD-DDHSP-0"
ftdi vid_pid 0x0403 0x6014
#-----

# BUG!!! tiny 10us glitch on nTRST at startup
# BUG FIX: make rst lines (out) and (push-pull)
ftdi layout_init 0x0b08 0x0b1b  ;# BUG FIX: rst lines (out) and (push-pull)
#ftdi layout_signal TCK       -data 0x0001 -oe 0x0001
#ftdi layout_signal TDI       -data 0x0002 -oe 0x0002
#ftdi layout_signal TDO       -data 0x0004 -oe 0x0004
#ftdi layout_signal TMS       -data 0x0008 -oe 0x0008

#ftdi layout_init 0xfff8 0xfffb
#ftdi layout_init 0x4008 0x400b


###???
#ftdi tdo_sample_edge rising
#ftdi tdo_sample_edge falling
###???


#
#-------------- debugger tool ------------------------- (hardware-connections.cfg)


#------------------------------------------------------ 
#
# ADAPTER
#

adapter speed 500  ;# max 1/6 core speed, please

reset_config none  ;# IMPORTANT: dont use nSRST or nTRST

#------------------------------------------------------
#
# TRANSPORT
#
#   pick a transport from openocd -c "echo [transport list]"
#   pick one or more target types from openocd -c "echo [target types]"
#

transport select jtag

jtag newtap riscv cpu -irlen 5 -ircapture 0x1 -irmask 0xf -ignore-version -ignore-bypass

target create riscv.cpu.0 riscv -chain-position riscv.cpu -coreid 0

riscv set_reset_timeout_sec 120  ;# IMPORTANT: time for hart to come out of reset -- 1.5 min, min
riscv set_command_timeout_sec 2  ;# num seconds for hart to process command -- default 2 sec

#riscv.cpu.0 configure -work-area-phys 0x80000000 -work-area-size 0x400   -work-area-backup 0
 riscv.cpu.0 configure -work-area-phys 0x80000000 -work-area-size 0x10000 -work-area-backup 0
#riscv.cpu.0 configure -work-area-phys 0x80000000 -work-area-size 0x10000 -work-area-backup 1
#riscv.cpu.0 configure -work-area-virt 0x80000000 -work-area-size 0x10000 -work-area-backup 1


#------------- target device ----------------------
#
# MEMORY MAP AND EXTERNAL PERIPHERALS
#

set SPI_QSPI0_ADDR  0x10014000
set ROM_BASE        0x20000000
set DTIM_RAM_BASE   0x80000000

riscv.cpu.0 configure -work-area-phys 0x80000000 -work-area-size 0x10000 -work-area-backup 0

flash bank spi0 fespi 0x20000000 0 0 0 riscv.cpu.0 0x10014000



#------------- rvdebug.cfg ----------------------
#

incl rvdebug-handler.tcl    ;# messages and how to handle them
incl rvdebug.tcl            ;# the riscv debug project
incl rvdebug-utils.tcl      ;# high level i/o ... asic_ram/rom_load, etc


proc jtag_init { } {  ;# overrides openocd/src/jtag/startup.tcl
  echo "proc jtag_init"
  return [rvdebug]  ;# invoke top-level and pass thru its result
}


#----- main program
#
  # before it runs
  rvdebug_handler_init

  # as it runs
  # invokes jtag_init ... does a first arp_examine there unless (target) examine_deferred
  set retval [catch { init } ocdResult ocdErrorOptions]

  # after it runs
  if [rvdebug_handler_is_fail $retval $ocdResult $ocdErrorOptions] {
      echo "***FAIL***"
  } else {
      echo "---PASS---"
  }

  # at end of day
  #adapter deassert srst ; release nSRST to hi-z state (ignore if being used)
  shutdown               ;# optional, comment/remove if gdb desired
  exit                   ;# optional, comment/remove if gdb desired
#
#----- main program

#
# EXAMPLE RAM LOADING PROCESS
#
#   invoke on cmd line openocd -c "load_ram main-ram.bin 0x81230000 0x81230500"
#

proc load_ram {filename {addr 0x80000000} {exec -1}}  {  ;# default FE310 DTIM
  echo "performing target RAM load process"

  # just like the makefile
  #asic_ram_load $filename $addr 0x0000

  # three simple steps alternative
  echo [load_image $filename $addr bin]
  echo [verify_image $filename $addr bin]
  if {$exec gt 0} echo [resume $exec]
}

#
# EXAMPLE ROM LOADING PROCESS
#
#   invoke on cmd line openocd -c "load_rom main-rom.bin 0x20000000 0x20001200"
#

proc load_rom {filename  {addr 0x20000000} {exec -1}} {  ;# default FE310 QSPI0 FLASH
  echo "performing target ROM load process"

  # just like the makefile
  #asic_ram_load $filename $addr 0x3200

  # a few simple steps alternative
  set begsec 0
  set endsec 2
  echo [flash protect 0 $begsec $endsec off]
  #echo [flash erase_sector 0 $begsec $endsec]
  #echo [flash write_bank 0 filename]
  #echo [flash verify_bank 0 filename]
  echo [flash protect 0 $begsec $endsec on]
  if {$exec gt 0} echo [resume $exec]
}