From fba2cf0418ac5133a64d07441d42ffca645a5a7f Mon Sep 17 00:00:00 2001
From: radityankn <115343392+radityankn@users.noreply.github.com>
Date: Fri, 31 May 2024 22:37:17 +0700
Subject: [PATCH] Update info.yaml

---
 info.yaml | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/info.yaml b/info.yaml
index 79f5dd5..9b5c98b 100644
--- a/info.yaml
+++ b/info.yaml
@@ -1,9 +1,9 @@
 # Tiny Tapeout project information
 project:
-  title:        ""      # Project title
-  author:       ""      # Your name
-  discord:      ""      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
-  description:  ""      # One line description of what your project does
+  title:        "Voltage-Controlled Oscillator with Capacitor"      # Project title
+  author:       "Raditya"      # Your name
+  discord:      "UwURacoon223"      # Your discord username, for communication and automatically assigning you a Tapeout role (optional)
+  description:  "VCO with capacitor for linearity"      # One line description of what your project does
   language:     "Analog" # other examples include Verilog, Amaranth, VHDL, etc
   clock_hz:     0       # Clock frequency in Hz (or 0 if not applicable)
 
@@ -11,10 +11,10 @@ project:
   tiles: "1x2"          # Valid values: 1x1 (digital only), 1x2, 2x2, 3x2, 4x2, 6x2 or 8x2
 
   # How many analog pins does your project use?
-  analog_pins: 2        # Valid values: 0 to 6
+  analog_pins: 3        # Valid values: 0 to 6
 
   # Your top module name must start with "tt_um_". Make it unique by including your github username:
-  top_module:  "tt_um_example"
+  top_module:  "tt_um_radityankn_capacitor_VCO"
 
   # List your project's source files here. Source files must be in ./src and you must list each source file separately, one per line:
   source_files:        
@@ -53,9 +53,9 @@ pinout:
   uio[7]: ""
 
   # Analog pins - make sure to also set "analog_pins" above, else the pins won't be connected
-  ua[0]: ""
-  ua[1]: ""
-  ua[2]: ""
+  ua[0]: "OUT"
+  ua[1]: "VCON+"
+  ua[2]: "VCON-"
   ua[3]: ""
   ua[4]: ""
   ua[5]: ""