feat: add rk3576 overlay

arch/arm64/boot/dts/rockchip/overlays/Makefile

@@ -340,10 +340,33 @@ dtb-$(CONFIG_CPU_RK3568) += \
 	rock-3c-radxa-display-10hd.dtbo
 
 dtb-$(CONFIG_CLK_RK3576) += \
-
+	rk3576-i2c5-m1.dtbo \
+	rk3576-i2c6-m3.dtbo \
+	rk3576-i2c8-m1.dtbo \
+	rk3576-i2c8-m2.dtbo \
+	rk3576-i2c9-m1.dtbo \
+	rk3576-pwm0-ch0-m1.dtbo \
+	rk3576-pwm1-ch0-m1.dtbo \
+	rk3576-pwm1-ch0-m2.dtbo \
+	rk3576-pwm1-ch1-m1.dtbo \
+	rk3576-pwm1-ch2-m1.dtbo \
+	rk3576-pwm1-ch3-m1.dtbo \
+	rk3576-pwm1-ch4-m1.dtbo \
+	rk3576-pwm2-ch2-m1.dtbo \
+	rk3576-pwm2-ch3-m1.dtbo \
+	rk3576-pwm2-ch7-m2.dtbo \
+	rk3576-spi1-m0-cs0-spidev.dtbo \
+	rk3576-spi1-m0-cs1-spidev.dtbo \
+	rk3576-spi2-m1-cs0-spidev.dtbo \
+	rk3576-spi2-m1-cs1-spidev.dtbo \
+	rk3576-uart2-m0.dtbo \
+	rk3576-uart3-m2.dtbo \
+	rk3576-uart4-m1.dtbo \
+	rk3576-uart7-m0.dtbo
 
 dtb-$(CONFIG_CPU_RK3576) += \
-
+	rk3576-can1-m1.dtbo \
+	rk3576-can1-m3.dtbo
 
 dtb-$(CONFIG_CLK_RK3588) += \
 	radxa-nx5-io-okdo-camera-5mp-cam0.dtbo \

arch/arm64/boot/dts/rockchip/overlays/rk3576-can1-m1.dts

@@ -0,0 +1,23 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rockchip,rk3576-cru.h>
+
+/ {
+	metadata {
+		title = "Enable CAN1-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO4_C6", "GPIO4_C7", "can1";
+		description = "Enable CAN1-M1.
+On Radxa CM4-RPI-CM4-IO this is TX pin 28 and Rx pin 27.";
+	};
+};
+
+&can1 {
+	assigned-clocks = <&cru CLK_CAN1>;
+	assigned-clock-rates = <200000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&can1m1_pins>;
+	status = "okay";
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-can1-m3.dts

@@ -0,0 +1,23 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/rockchip,rk3576-cru.h>
+
+/ {
+	metadata {
+		title = "Enable CAN1-M3";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO3_A2", "GPIO3_A3", "can1";
+		description = "Enable CAN1-M3.
+On Radxa CM4-RPI-CM4-IO this is TX pin 29 and Rx pin 37.";
+	};
+};
+
+&can1 {
+	assigned-clocks = <&cru CLK_CAN1>;
+	assigned-clock-rates = <200000000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&can1m3_pins>;
+	status = "okay";
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-i2c5-m1.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable I2C5-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_D5", "GPIO1_D4";
+		description = "Enable I2C5-M1.
+On Radxa CM4-RPI-CM4-IO this is SDA pin 11 and SCL pin 12.
+";
+	};
+};
+
+&i2c5 {
+	status = "okay";
+	pinctrl-0 = <&i2c5m1_xfer>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-i2c6-m3.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable I2C6-M3";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO4_C7", "GPIO4_C6";
+		description = "Enable I2C6-M3.
+On Radxa CM4-RPI-CM4-IO this is SDA pin 27 and SCL pin 28.
+";
+	};
+};
+
+&i2c6 {
+	status = "okay";
+	pinctrl-0 = <&i2c6m3_xfer>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-i2c8-m1.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable I2C8-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_C7", "GPIO1_C6";
+		description = "Enable I2C8-M1.
+On Radxa CM4-RPI-CM4-IO this is SDA pin 3 and SCL pin 5.
+";
+	};
+};
+
+&i2c8 {
+	status = "okay";
+	pinctrl-0 = <&i2c8m1_xfer>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-i2c8-m2.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable I2C8-M2";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO2_B7", "GPIO2_B6";
+		description = "Enable I2C8-M2.
+On Radxa CM4-RPI-CM4-IO this is SDA pin 18 and SCL pin 16.
+";
+	};
+};
+
+&i2c8 {
+	status = "okay";
+	pinctrl-0 = <&i2c8m2_xfer>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-i2c9-m1.dts

@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable I2C9-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_B4", "GPIO1_B5";
+		description = "Enable I2C9-M1.
+On Radxa CM4-RPI-CM4-IO this is SDA pin 23 and SCL pin 19.
+";
+	};
+};
+
+&i2c9 {
+	status = "okay";
+	pinctrl-0 = <&i2c9m1_xfer>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm0-ch0-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM0-CH0-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_C0";
+		description = "Enable PWM0-CH0-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 26.";
+	};
+};
+
+&pwm0_2ch_0 {
+	status = "okay";
+	pinctrl-0 = <&pwm0m1_ch0>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm1-ch0-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM1-CH0-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_B4";
+		description = "Enable PWM1-CH0-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 23.";
+	};
+};
+
+&pwm1_6ch_0 {
+	status = "okay";
+	pinctrl-0 = <&pwm1m1_ch0>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm1-ch0-m2.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM1-CH0-M2";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO2_C0";
+		description = "Enable PWM1-CH0-M2.
+On Radxa CM4-RPI-CM4-IO this is pin 33.";
+	};
+};
+
+&pwm1_6ch_0 {
+	status = "okay";
+	pinctrl-0 = <&pwm1m2_ch0>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm1-ch1-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM1-CH1-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_B5";
+		description = "Enable PWM1-CH1-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 19.";
+	};
+};
+
+&pwm1_6ch_1 {
+	status = "okay";
+	pinctrl-0 = <&pwm1m1_ch1>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm1-ch2-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM1-CH2-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_C2";
+		description = "Enable PWM1-CH2-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 32.";
+	};
+};
+
+&pwm1_6ch_2 {
+	status = "okay";
+	pinctrl-0 = <&pwm1m1_ch2>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm1-ch3-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM1-CH3-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_D2";
+		description = "Enable PWM1-CH3-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 36.";
+	};
+};
+
+&pwm1_6ch_3 {
+	status = "okay";
+	pinctrl-0 = <&pwm1m1_ch3>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm1-ch4-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM1-CH4-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO1_D3";
+		description = "Enable PWM1-CH4-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 38.";
+	};
+};
+
+&pwm1_6ch_4 {
+	status = "okay";
+	pinctrl-0 = <&pwm1m1_ch4>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm2-ch2-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM2-CH2-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO4_C6";
+		description = "Enable PWM2-CH2-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 28.";
+	};
+};
+
+&pwm2_8ch_2 {
+	status = "okay";
+	pinctrl-0 = <&pwm2m1_ch2>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm2-ch3-m1.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM2-CH3-M1";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO4_C7";
+		description = "Enable PWM2-CH3-M1.
+On Radxa CM4-RPI-CM4-IO this is pin 27.";
+	};
+};
+
+&pwm2_8ch_3 {
+	status = "okay";
+	pinctrl-0 = <&pwm2m1_ch3>;
+};

arch/arm64/boot/dts/rockchip/overlays/rk3576-pwm2-ch7-m2.dts

@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	metadata {
+		title = "Enable PWM2-CH7-M2";
+		compatible = "radxa,cm4-rpi-cm4-io";
+		category = "misc";
+		exclusive = "GPIO2_D7";
+		description = "Enable PWM2-CH7-M2.
+On Radxa CM4-RPI-CM4-IO this is pin 22.";
+	};
+};
+
+&pwm2_8ch_7 {
+	status = "okay";
+	pinctrl-0 = <&pwm2m2_ch7>;
+};