From 00882a514833b942067b84ec9732247ec045fce0 Mon Sep 17 00:00:00 2001 From: Stephen Date: Fri, 31 May 2019 22:00:10 +0800 Subject: [PATCH] add rockpis board Signed-off-by: Stephen --- arch/arm64/boot/dts/.gitignore | 1 + arch/arm64/boot/dts/rockchip/Makefile | 14 +- .../dts/rockchip/overlays-rockpis/Makefile | 10 + .../boot/dts/rockchip/overlays-rockpis/README | 141 ++++++ .../console-on-ttyS2-overlay.dts | 16 + .../rockchip/overlays-rockpis/hw_intfc.conf | 25 + .../boot/dts/rockchip/rockpi-s-linux.dts | 435 ++++++++++++++++++ arch/arm64/configs/rk3308_linux_defconfig | 144 +++++- scripts/Makefile.lib | 11 + 9 files changed, 777 insertions(+), 20 deletions(-) create mode 100644 arch/arm64/boot/dts/rockchip/overlays-rockpis/Makefile create mode 100644 arch/arm64/boot/dts/rockchip/overlays-rockpis/README create mode 100644 arch/arm64/boot/dts/rockchip/overlays-rockpis/console-on-ttyS2-overlay.dts create mode 100644 arch/arm64/boot/dts/rockchip/overlays-rockpis/hw_intfc.conf create mode 100644 arch/arm64/boot/dts/rockchip/rockpi-s-linux.dts diff --git a/arch/arm64/boot/dts/.gitignore b/arch/arm64/boot/dts/.gitignore index b60ed208c779e..77ed402cbbc89 100644 --- a/arch/arm64/boot/dts/.gitignore +++ b/arch/arm64/boot/dts/.gitignore @@ -1 +1,2 @@ *.dtb +*.dtbo diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index ae241916d363a..a602abf48924a 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -79,7 +79,19 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-tve1030g.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-tve1205g.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-videostrong-linux.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vr-android.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rockpi-s-linux.dtb + +targets += dtbs dtbs_instal +targets += $(dtb-y) +dtstree := $(srctree)/$(src) +dtb-$(CONFIG_OF_ALL_DTBS) := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) always := $(dtb-y) -subdir-y := $(dts-dirs) +subdir-y := $(dts-dirs) overlays-rockpis clean-files := *.dtb + +# Enable fixups to support overlays on ROCK Pi platforms +ifeq ($(CONFIG_ARCH_ROCKCHIP),y) + DTC_FLAGS ?= -@ -H epapr + dts-dirs += overlays-rockpis +endif diff --git a/arch/arm64/boot/dts/rockchip/overlays-rockpis/Makefile b/arch/arm64/boot/dts/rockchip/overlays-rockpis/Makefile new file mode 100644 index 0000000000000..01c8334e8da1c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays-rockpis/Makefile @@ -0,0 +1,10 @@ +# Overlays for the ROCK PI S platform + +dtbo-$(CONFIG_ARCH_ROCKCHIP) += \ + console-on-ttyS2.dtbo + +targets += dtbs dtbs_install +targets += $(dtbo-y) + +always := $(dtbo-y) +clean-files := *.dtbo diff --git a/arch/arm64/boot/dts/rockchip/overlays-rockpis/README b/arch/arm64/boot/dts/rockchip/overlays-rockpis/README new file mode 100644 index 0000000000000..bca602f6363a1 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays-rockpis/README @@ -0,0 +1,141 @@ +Introduction +============= + +This directory contains Device Tree overlays. Device Tree makes it possible +to support many hardware configurations with a single kernel and without the +need to explicitly load or blacklisr kernel modules. + +On Rock Pi S, you will find a .dtb for each base platform in /boot. This +describes the hardware that is part of the Rock Pi S board. The loader selects +the .dtb file appropriate for the platform by name and pass it to the kernel. + +Device Tree Overlays usage is controlled from /boot/hw_intfc.conf. You can do +the settings for Rock Pi S in your hw_intfc.conf, which should cause your +Rock Pi S to do your wanted things after a reboot. + +In /boot/overlays you will find many .dtbo files. The loader will merge the +selected .dtbo files by reading file /boot/hw_intfc.conf. + + +Using Overlays +=============== + +Overlays are loaded using "intfc:" directive. Take disable-console as an example. +Add one line in hw_intfc.conf: + + intfc:dtoverlay=console-on-ttyS2 + +This causes the file /boot/overlays/disable-console.dtbo to be loaded. + + +The Overlay and Parameter Reference +===================================== + +N.B. When editing this file, please preserve the indentation levels to make it +simple to parse programmatically. NO HARD TABS. + +Name: i2c1 +Info: Overlay for BUS I2C1 +Load: intfc:i2c1= +Value: + on Set to "on" to enable the i2c1 interface (default "off") + off Set to "off" to disable the i2c1 interface + + +Name: i2c2 +Info: Overlay for BUS I2C2 +Load: intfc:i2c2= +Value: + on Set to "on" to enable the i2c2 interface (default "off") + off Set to "off" to disable the i2c2 interface + + +Name: i2c3 +Info: Overlay for BUS I2C3 +Load: intfc:i2c3= +Value: + on Set to "on" to enable the i2c3 interface (default "off") + off Set to "off" to disable the i2c3 interface + + +Name: i2c4 +Info: Overlay for BUS I2C4 +Load: intfc:i2c4= +Value: + on Set to "on" to enable the i2c4 interface (default "off") + off Set to "off" to disable the i2c4 interface + + +Name: pwm1 +Info: Overlay for BUS PWM1 +Load: intfc:pwm1= +Value: + on Set to "on" to enable the pwm1 interface (default "off") + off Set to "off" to disable the pwm1 interface + + +Name: pwm2 +Info: Overlay for BUS PWM2 +Load: intfc:pwm2= +Value: + on Set to "on" to enable the pwm2 interface (default "off") + off Set to "off" to disable the pwm2 interface + + +Name: pwm3 +Info: Overlay for BUS PWM3 +Load: intfc:pwm3= +Value: + on Set to "on" to enable the pwm3 interface (default "off") + off Set to "off" to disable the pwm3 interface + + +Name: spi0 +Info: Overlay for BUS SPI0 +Load: intfc:spi0= +Value: + on Set to "on" to enable the spi0 interface (default "off") + off Set to "off" to disable the spi0 interface + + +Name: spi2 +Info: Overlay for BUS SPI2 +Load: intfc:spi2= +Value: + on Set to "on" to enable the spi2 interface (default "off") + off Set to "off" to disable the spi2 interface + + +Name: uart0 +Info: Overlay for BUS UART0 +Load: intfc:uart0= +Value: + on Set to "on" to enable the uart0 interface (default "off") + off Set to "off" to disable the uart0 interface + + +Name: uart1 +Info: Overlay for BUS UART1 +Load: intfc:uart1= +Value: + on Set to "on" to enable the uart1 interface (default "off") + off Set to "off" to disable the uart1 interface + + +Name: uart2 +Info: Overlay for BUS UART2 +Load: intfc:uart2= +Value: + on Set to "on" to enable the uart2 interface (default "off") + off Set to "off" to disable the uart2 interface + + +N.B. It is recommended to only ebable those bus interfaces that are needed. +Leaving all interfaces enabled can lead to unwanted behaviour. + + +Name: console-on-ttyS2.dtbo +Info: By default, fiq debugger console is disabled. + When this dtbo file is loaded, Rock Pi S enables fiq debugger console. + ttyS2 Pins will output console information. +Load: intfc:dtoverlay=console-on-ttyS2 diff --git a/arch/arm64/boot/dts/rockchip/overlays-rockpis/console-on-ttyS2-overlay.dts b/arch/arm64/boot/dts/rockchip/overlays-rockpis/console-on-ttyS2-overlay.dts new file mode 100644 index 0000000000000..c1556f412d058 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays-rockpis/console-on-ttyS2-overlay.dts @@ -0,0 +1,16 @@ +// Definitions for setting uart4 pins as ttyFIQ0 console pins +/dts-v1/; +/plugin/; + +/ { + model = "ROCK PI S"; + compatible = "rockchip,rockpis-rk3308", "rockchip,rk3308"; + + fragment@0 { + target = <&fiq_debugger>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/overlays-rockpis/hw_intfc.conf b/arch/arm64/boot/dts/rockchip/overlays-rockpis/hw_intfc.conf new file mode 100644 index 0000000000000..8a033b84d9030 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/overlays-rockpis/hw_intfc.conf @@ -0,0 +1,25 @@ + +# Hardware Interface Config + +# Set "on" to enable the optional hardware interfaces while set "off" to disable. + +intfc:i2c1=off +intfc:i2c2=off +intfc:i2c3=off +intfc:i2c4=off + +intfc:pwm1=off +intfc:pwm2=off +intfc:pwm3=off + +intfc:spi0=off +intfc:spi2=off + +intfc:uart0=off +intfc:uart1=off +intfc:uart2=off + +# Devicetree Overlay Enable, uncomment to enable .dtbo under /boot/overlays/. + +# Disable ttyFIQ0 console +intfc:dtoverlay=console-on-ttyS2 diff --git a/arch/arm64/boot/dts/rockchip/rockpi-s-linux.dts b/arch/arm64/boot/dts/rockchip/rockpi-s-linux.dts new file mode 100644 index 0000000000000..64d2d0a138598 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rockpi-s-linux.dts @@ -0,0 +1,435 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; + +#include +/* #include "rk3308.dtsi" */ +#include "rk3308k.dtsi" + +/ { + model = "ROCK PI S"; + compatible = "rockchip,rockpis-rk3308", "rockchip,rk3308"; + + adc-keys1 { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + poll-interval = <100>; + keyup-threshold-microvolt = <1800000>; + + play-key { + linux,code = ; + label = "play"; + press-threshold-microvolt = <625000>; + }; + }; + + rotary { + compatible = "rotary-encoder"; + pinctrl-names = "default"; + pinctrl-0 = <&rotary_gpio>; + gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>, + <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>; + linux,axis = <0>; /* REL_X */ + rotary-encoder,relative-axis; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + sound { + status = "disabled"; + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,name = "i2s_8ch_0"; + + simple-audio-card,dai-link@0 { + format = "i2s"; + cpu { + sound-dai = <&i2s_8ch_0>; + }; + + codec { + sound-dai = <&dummy_codec>; + }; + }; + + simple-audio-card,dai-link@1 { + format = "i2s"; + cpu { + sound-dai = <&i2s_8ch_0>; + }; + + codec { + sound-dai = <&tas5711>; + }; + }; + }; + + dummy_codec: dummy-codec { + compatible = "rockchip,dummy-codec"; + #sound-dai-cells = <0>; + }; + + vdd_core: vdd-core { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + regulator-name = "vdd_core"; + regulator-min-microvolt = <827000>; + regulator-max-microvolt = <1340000>; + regulator-init-microvolt = <1015000>; + regulator-always-on; + regulator-boot-on; + regulator-settling-time-up-us = <250>; + status = "okay"; + }; + + vdd_log: vdd-log { + compatible = "regulator-fixed"; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + vdd_1v0: vdd-1v0 { + compatible = "regulator-fixed"; + regulator-name = "vdd_1v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + vccio_sdio: vcc_1v8: vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vccio_sd: vccio-sd { + compatible = "regulator-gpio"; + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0 + 3300000 0x1>; + }; + + vcc_sd: vcc-sd { + compatible = "regulator-fixed"; + gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_LOW>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_1v8_codec: vcc-1v8-codec { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vcc_ddr: vcc-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + }; + + vcc_3v3_codec: vcc_io: vcc-io { + compatible = "regulator-fixed"; + regulator-name = "vcc_io"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vccio_flash: vccio-flash { + compatible = "regulator-fixed"; + regulator-name = "vccio_flash"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc_otg_vbus: otg-vbus-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&otg_vbus_drv>; + regulator-name = "vcc_otg_vbus"; + }; + + wireless-bluetooth { + compatible = "bluetooth-platdata"; + uart_rts_gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart4_rts>; + pinctrl-1 = <&uart4_rts_gpio>; + BT,power_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + BT,wake_host_irq = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + clocks = <&cru SCLK_WIFI>; + clock-names = "clk_wifi"; + ref-clock-frequency = <24000000>; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_wake_host>; + wifi_chip_type = "rtl8723ds"; + WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + gpio-leds { + compatible = "gpio-leds"; + status = "okay"; + + green-led { + label = "rockpis:green:power"; + gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "default-on"; + default-state = "on"; + }; + + blue-led { + label = "rockpis:blue:user"; + gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + default-state = "on"; + }; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_core>; +}; + +&dmc { + center-supply = <&vdd_log>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + supports-emmc; + disable-wp; + non-removable; + num-slots = <1>; + status = "okay"; +}; + +&sdmmc { + max-frequeency = <150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; + ard-detect-delay = <800>; + status = "okay"; +}; + +&mac { + phy-supply = <&vcc_phy>; + clock_in_out = "output"; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&cru SCLK_MAC_SRC>; + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 50000 50000>; + status = "okay"; +}; + +&io_domains { + status = "okay"; + + vccio0-supply = <&vcc_io>; + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc_1v8>; + vccio3-supply = <&vccio_flash>; + vccio4-supply = <&vccio_sdio>; + vccio5-supply = <&vcc_io>; +}; + +&i2c1 { + status = "okay"; + clock-frequency = <400000>; +// i2c-scl-rising-time-ns = <300>; +// i2c-scl-falling-time-ns = <15>; + + tas5711: tas5711@1b { + #sound-dai-cells = <0>; + compatible = "ti,tas5711"; + reg = <0x1b>; + clocks = <&cru SCLK_I2S0_8CH_TX_OUT>; + clock-names = "mclk"; + pinctrl-names = "default"; + pinctrl-0 = <&i2s_8ch_0_mclk>; + pdn-gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; + }; +}; + +&i2s_8ch_0 { + status = "okay"; + assigned-clocks = <&cru SCLK_I2S0_8CH_RX>; + assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_MUX>; + rockchip,clk-trcm = <1>; + #sound-dai-cells = <0>; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&rtc_32k>; + + buttons { + mic_mute: mic-mute { + rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + usb { + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + rotary { + rotary_gpio: rotary-gpio { + rockchip,pins = + <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, + <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-wlan { + wifi_wake_host: wifi-wake-host { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm0 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm0_pin_pull_down>; +}; + +&rockchip_suspend { + rockchip,pwm-regulator-config = < + (0 + | RKPM_PWM_REGULATOR + ) + >; + + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; + +&sdio { + max-frequency = <110000000>; + bus-width = <4>; + cap-sd-highspeed; + supports-sdio; + ignore-pm-notify; + keep-power-in-suspend; + non-removable; + mmc-pwrseq = <&sdio_pwrseq>; + sd-uhs-sdr104; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + phy-supply = <&vcc_otg_vbus>; + status = "okay"; + }; + + u2phy_otg: otg-port { + vbus-supply = <&vcc_otg_vbus>; + status = "okay"; + }; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_xfer &uart4_cts>; + status = "okay"; +}; + +&usb20_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci{ + status = "okay"; +}; diff --git a/arch/arm64/configs/rk3308_linux_defconfig b/arch/arm64/configs/rk3308_linux_defconfig index c4c717aa4f8dc..490cadb8d9c3f 100644 --- a/arch/arm64/configs/rk3308_linux_defconfig +++ b/arch/arm64/configs/rk3308_linux_defconfig @@ -6,12 +6,20 @@ CONFIG_FHANDLE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_MEMCG=y +CONFIG_MEMCG_KMEM=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_CGROUP=y CONFIG_BLK_DEV_INITRD=y -# CONFIG_RD_BZIP2 is not set -# CONFIG_RD_LZMA is not set -# CONFIG_RD_XZ is not set -# CONFIG_RD_LZO is not set -# CONFIG_RD_LZ4 is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_EMBEDDED=y # CONFIG_SLUB_DEBUG is not set @@ -82,31 +90,40 @@ CONFIG_BT=y CONFIG_BT_RFCOMM=y CONFIG_BT_RFCOMM_TTY=y CONFIG_BT_HIDP=y -CONFIG_BT_HCIUART=y -CONFIG_BT_HCIUART_H4=y -CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIVHCI=y +CONFIG_BT_MRVL=y +CONFIG_BT_MRVL_SDIO=y CONFIG_RFKILL=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y # CONFIG_ALLOW_DEV_COREDUMP is not set # CONFIG_BLK_DEV is not set +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +CONFIG_CHR_DEV_SG=y +CONFIG_CHR_DEV_SCH=y +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y CONFIG_NETDEVICES=y # CONFIG_NET_CORE is not set -# CONFIG_ETHERNET is not set +CONFIG_STMMAC_ETH=y CONFIG_WL_ROCKCHIP=y CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y -CONFIG_AP6XXX=y -# CONFIG_RTL_WIRELESS_SOLUTION is not set +CONFIG_RTL8723DS=y # CONFIG_INPUT_MOUSEDEV is not set CONFIG_INPUT_EVDEV=y CONFIG_KEYBOARD_ADC=y # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ADS7846=m CONFIG_INPUT_MISC=y CONFIG_INPUT_GPIO_ROTARY_ENCODER=y # CONFIG_SERIO is not set -# CONFIG_VT is not set +CONFIG_VT_HW_CONSOLE_BINDING=y # CONFIG_LEGACY_PTYS is not set # CONFIG_DEVKMEM is not set CONFIG_SERIAL_8250=y @@ -146,9 +163,7 @@ CONFIG_DRM=y CONFIG_DRM_ROCKCHIP=y CONFIG_ROCKCHIP_RGB=y CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y # CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_GENERIC is not set CONFIG_BACKLIGHT_PWM=y CONFIG_SOUND=y @@ -172,11 +187,39 @@ CONFIG_SND_SOC_RK3308=y CONFIG_SND_SOC_TAS571X=y CONFIG_SND_SIMPLE_CARD=y # CONFIG_HID_GENERIC is not set +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OTG=y +CONFIG_USB_MON=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_ROOT_HUB_TT=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_STORAGE_REALTEK=y +CONFIG_USB_STORAGE_DATAFAB=y +CONFIG_USB_STORAGE_FREECOM=y +CONFIG_USB_STORAGE_ISD200=y +CONFIG_USB_STORAGE_USBAT=y +CONFIG_USB_STORAGE_SDDR09=y +CONFIG_USB_STORAGE_SDDR55=y +CONFIG_USB_STORAGE_JUMPSHOT=y +CONFIG_USB_STORAGE_ALAUDA=y +CONFIG_USB_STORAGE_ONETOUCH=y +CONFIG_USB_STORAGE_KARMA=y +CONFIG_USB_STORAGE_CYPRESS_ATACB=y +CONFIG_USB_STORAGE_ENE_UB6250=y +CONFIG_USB_UAS=y CONFIG_USB_DWC2=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_DEBUG_FILES=y CONFIG_USB_GADGET_VBUS_DRAW=500 CONFIG_USB_CONFIGFS=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y CONFIG_USB_CONFIGFS_F_FS=y CONFIG_USB_CONFIGFS_UEVENT=y CONFIG_MMC=y @@ -205,6 +248,36 @@ CONFIG_FIQ_DEBUGGER_CONSOLE=y CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y CONFIG_FIQ_DEBUGGER_TRUST_ZONE=y CONFIG_RK_CONSOLE_THREAD=y +CONFIG_FB_TFT=m +CONFIG_FB_TFT_AGM1264K_FL=m +CONFIG_FB_TFT_BD663474=m +CONFIG_FB_TFT_HX8340BN=m +CONFIG_FB_TFT_HX8347D=m +CONFIG_FB_TFT_HX8353D=m +CONFIG_FB_TFT_HX8357D=m +CONFIG_FB_TFT_ILI9163=m +CONFIG_FB_TFT_ILI9320=m +CONFIG_FB_TFT_ILI9325=m +CONFIG_FB_TFT_ILI9340=m +CONFIG_FB_TFT_ILI9341=m +CONFIG_FB_TFT_ILI9481=m +CONFIG_FB_TFT_ILI9486=m +CONFIG_FB_TFT_PCD8544=m +CONFIG_FB_TFT_RA8875=m +CONFIG_FB_TFT_S6D02A1=m +CONFIG_FB_TFT_S6D1121=m +CONFIG_FB_TFT_SSD1289=m +CONFIG_FB_TFT_SSD1306=m +CONFIG_FB_TFT_SSD1331=m +CONFIG_FB_TFT_SSD1351=m +CONFIG_FB_TFT_ST7735R=m +CONFIG_FB_TFT_ST7789V=m +CONFIG_FB_TFT_TINYLCD=m +CONFIG_FB_TFT_TLS8204=m +CONFIG_FB_TFT_UC1611=m +CONFIG_FB_TFT_UC1701=m +CONFIG_FB_TFT_UPD161704=m +CONFIG_FB_TFT_WATTEROTT=m # CONFIG_COMMON_CLK_XGENE is not set # CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set # CONFIG_IOMMU_SUPPORT is not set @@ -237,10 +310,15 @@ CONFIG_RK_NANDC_NAND=y CONFIG_RK_SFC_NAND=y CONFIG_RK_SFC_NOR=y CONFIG_ROCKCHIP_SIP=y -CONFIG_EXT2_FS=y -CONFIG_EXT4_FS=m +CONFIG_EXT3_FS=y +CONFIG_EXT3_FS_POSIX_ACL=y +CONFIG_EXT3_FS_SECURITY=y # CONFIG_DNOTIFY is not set -CONFIG_VFAT_FS=m +CONFIG_AUTOFS4_FS=y +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=936 +CONFIG_FAT_DEFAULT_IOCHARSET="utf8" CONFIG_NTFS_FS=m CONFIG_TMPFS=y CONFIG_SQUASHFS=y @@ -249,7 +327,36 @@ CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y CONFIG_PSTORE=y CONFIG_PSTORE_CONSOLE=y CONFIG_PSTORE_RAM=y -# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_NFS_FS=m +CONFIG_NFS_V3_ACL=y +CONFIG_NFS_V4=m +CONFIG_NFS_SWAP=y +CONFIG_NFS_V4_1=y +CONFIG_NFS_V4_2=y +CONFIG_NFS_V4_1_MIGRATION=y +CONFIG_NFS_FSCACHE=y +CONFIG_NFSD=m +CONFIG_NFSD_V3_ACL=y +CONFIG_NFSD_V4=y +CONFIG_NFSD_PNFS=y +CONFIG_CIFS=m +CONFIG_CIFS_STATS=y +CONFIG_CIFS_STATS2=y +CONFIG_CIFS_WEAK_PW_HASH=y +CONFIG_CIFS_UPCALL=y +CONFIG_CIFS_XATTR=y +CONFIG_CIFS_POSIX=y +CONFIG_CIFS_ACL=y +# CONFIG_CIFS_DEBUG is not set +CONFIG_CIFS_DFS_UPCALL=y +CONFIG_CIFS_SMB2=y +CONFIG_CIFS_SMB311=y +CONFIG_NLS_DEFAULT="uft8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_936=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y CONFIG_PRINTK_TIME=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_FS=y @@ -268,7 +375,6 @@ CONFIG_RCU_CPU_STALL_TIMEOUT=60 CONFIG_STRICT_DEVMEM=y CONFIG_DEBUG_SET_MODULE_RONX=y # CONFIG_CRYPTO_ECHAINIV is not set -CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_HW is not set CONFIG_ARM64_CRYPTO=y CONFIG_CRYPTO_SHA1_ARM64_CE=y diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index d697b0e16d021..d35a3bfe4e182 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib @@ -319,6 +319,17 @@ cmd_dtc = mkdir -p $(dir ${dtc-tmp}) ; \ $(obj)/%.dtb: $(src)/%.dts FORCE $(call if_changed_dep,dtc) +quiet_cmd_dtco = DTCO $@ +cmd_dtco = mkdir -p $(dir ${dtc-tmp}) ; \ + $(CPP) $(dtc_cpp_flags) -x assembler-with-cpp -o $(dtc-tmp) $< ; \ + $(DTC) -@ -H epapr -O dtb -o $@ -b 0 \ + -i $(dir $<) $(DTC_FLAGS) \ + -d $(depfile).dtc.tmp $(dtc-tmp) ; \ + cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) + +$(obj)/%.dtbo: $(src)/%-overlay.dts FORCE + $(call if_changed_dep,dtco) + dtc-tmp = $(subst $(comma),_,$(dot-target).dts.tmp) # cat