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12 | 12 | compatible = "openembed,som7981", "mediatek,mt7981";
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13 | 13 |
|
14 | 14 | aliases {
|
15 |
| - led-boot = &wlan2g_led; |
16 |
| - led-failsafe = &wlan2g_led; |
17 |
| - led-upgrade = &wlan2g_led; |
| 15 | + led-boot = &act_led; |
| 16 | + led-failsafe = &act_led; |
| 17 | + led-running = &act_led; |
| 18 | + led-upgrade = &act_led; |
18 | 19 | serial0 = &uart0;
|
19 | 20 | };
|
20 | 21 |
|
|
26 | 27 | reg = <0 0x40000000 0 0x40000000>;
|
27 | 28 | };
|
28 | 29 |
|
| 30 | + beeper { |
| 31 | + compatible = "gpio-beeper"; |
| 32 | + gpios = <&pio 2 GPIO_ACTIVE_HIGH>; |
| 33 | + }; |
| 34 | + |
29 | 35 | gpio-keys {
|
30 | 36 | compatible = "gpio-keys";
|
31 | 37 |
|
|
34 | 40 | linux,code = <KEY_RESTART>;
|
35 | 41 | gpios = <&pio 1 GPIO_ACTIVE_LOW>;
|
36 | 42 | };
|
37 |
| - |
38 |
| - button-wps { |
39 |
| - label = "wps"; |
40 |
| - linux,code = <KEY_WPS_BUTTON>; |
41 |
| - gpios = <&pio 0 GPIO_ACTIVE_LOW>; |
42 |
| - }; |
43 | 43 | };
|
44 | 44 |
|
45 | 45 | gpio-leds {
|
46 | 46 | compatible = "gpio-leds";
|
47 | 47 |
|
48 | 48 | led-0 {
|
49 | 49 | function = LED_FUNCTION_LAN;
|
50 |
| - color = <LED_COLOR_ID_AMBER>; |
| 50 | + color = <LED_COLOR_ID_GREEN>; |
51 | 51 | gpios = <&pio 8 GPIO_ACTIVE_LOW>;
|
52 | 52 | };
|
53 | 53 |
|
54 | 54 | led-1 {
|
55 | 55 | function = LED_FUNCTION_LAN;
|
56 |
| - color = <LED_COLOR_ID_GREEN>; |
| 56 | + color = <LED_COLOR_ID_AMBER>; |
57 | 57 | gpios = <&pio 13 GPIO_ACTIVE_LOW>;
|
58 | 58 | };
|
59 | 59 |
|
60 |
| - wlan2g_led: led-2 { |
61 |
| - function = LED_FUNCTION_WLAN_2GHZ; |
62 |
| - color = <LED_COLOR_ID_RED>; |
| 60 | + led-2 { |
| 61 | + function = LED_FUNCTION_PANIC; |
| 62 | + color = <LED_COLOR_ID_GREEN>; |
63 | 63 | gpios = <&pio 34 GPIO_ACTIVE_LOW>;
|
64 |
| - linux,default-trigger = "phy0tpt"; |
| 64 | + panic-indicator; |
65 | 65 | };
|
66 | 66 |
|
67 |
| - led-3 { |
68 |
| - function = LED_FUNCTION_WLAN_5GHZ; |
| 67 | + act_led: led-3 { |
| 68 | + function = LED_FUNCTION_ACTIVITY; |
69 | 69 | color = <LED_COLOR_ID_RED>;
|
70 | 70 | gpios = <&pio 35 GPIO_ACTIVE_LOW>;
|
71 |
| - linux,default-trigger = "phy1tpt"; |
72 | 71 | };
|
73 | 72 | };
|
74 | 73 | };
|
|
97 | 96 | };
|
98 | 97 | };
|
99 | 98 |
|
| 99 | +&i2c0 { |
| 100 | + clock-frequency = <400000>; |
| 101 | + pinctrl-names = "default"; |
| 102 | + pinctrl-0 = <&i2c0_pins>; |
| 103 | + status = "okay"; |
| 104 | + |
| 105 | + eeprom@50 { |
| 106 | + compatible = "atmel,24c64"; |
| 107 | + reg = <0x50>; |
| 108 | + page-size = <32>; |
| 109 | + }; |
| 110 | + |
| 111 | + rtc@51 { |
| 112 | + compatible = "nxp,pcf8563"; |
| 113 | + reg = <0x51>; |
| 114 | + #clock-cells = <0>; |
| 115 | + }; |
| 116 | + |
| 117 | + crypto@60 { |
| 118 | + compatible = "atmel,atecc508a"; |
| 119 | + reg = <0x60>; |
| 120 | + }; |
| 121 | +}; |
| 122 | + |
100 | 123 | &mdio_bus {
|
101 | 124 | phy0: ethernet-phy@5 {
|
102 | 125 | reg = <5>;
|
103 | 126 | compatible = "ethernet-phy-ieee802.3-c45";
|
104 | 127 | phy-mode = "2500base-x";
|
105 | 128 | reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
|
106 |
| - reset-assert-us = <10000>; |
107 |
| - reset-deassert-us = <50000>; |
| 129 | + reset-assert-us = <15000>; |
| 130 | + reset-deassert-us = <68000>; |
108 | 131 | realtek,aldps-enable;
|
109 | 132 | };
|
110 | 133 | };
|
|
184 | 207 | };
|
185 | 208 |
|
186 | 209 | &pio {
|
| 210 | + i2c0_pins: i2c0-pins { |
| 211 | + mux { |
| 212 | + function = "i2c"; |
| 213 | + groups = "i2c0_1"; |
| 214 | + }; |
| 215 | + }; |
| 216 | + |
187 | 217 | spi0_flash_pins: spi0-pins {
|
188 | 218 | mux {
|
189 | 219 | function = "spi";
|
|
202 | 232 | mediatek,pull-down-adv = <0>;
|
203 | 233 | };
|
204 | 234 | };
|
| 235 | + |
| 236 | + uart1_pins: uart1-pins { |
| 237 | + mux { |
| 238 | + function = "uart"; |
| 239 | + groups = "uart1_3"; |
| 240 | + }; |
| 241 | + }; |
| 242 | + |
| 243 | + uart2_pins: uart2-pins { |
| 244 | + mux { |
| 245 | + function = "uart"; |
| 246 | + groups = "uart2_0_tx_rx"; |
| 247 | + }; |
| 248 | + }; |
| 249 | + |
| 250 | + wwan_rst_h: wwan-rst-h { |
| 251 | + pins = "GPIO_WPS"; |
| 252 | + drive-strength = <8>; |
| 253 | + mediatek,pull-down-adv = <0>; |
| 254 | + output-low; |
| 255 | + }; |
205 | 256 | };
|
206 | 257 |
|
207 | 258 | &uart0 {
|
208 | 259 | status = "okay";
|
209 | 260 | };
|
210 | 261 |
|
| 262 | +&uart1 { |
| 263 | + pinctrl-names = "default"; |
| 264 | + pinctrl-0 = <&uart1_pins>; |
| 265 | + status = "okay"; |
| 266 | +}; |
| 267 | + |
| 268 | +&uart2 { |
| 269 | + pinctrl-names = "default"; |
| 270 | + pinctrl-0 = <&uart2_pins>; |
| 271 | + status = "okay"; |
| 272 | +}; |
| 273 | + |
211 | 274 | &usb_phy {
|
212 | 275 | status = "okay";
|
213 | 276 | };
|
|
220 | 283 | nvmem-cells = <&eeprom_factory_0>;
|
221 | 284 | nvmem-cell-names = "eeprom";
|
222 | 285 | status = "okay";
|
| 286 | + |
| 287 | + band@1 { |
| 288 | + reg = <1>; |
| 289 | + nvmem-cells = <&macaddr_factory_a 0>; |
| 290 | + nvmem-cell-names = "mac-address"; |
| 291 | + }; |
223 | 292 | };
|
224 | 293 |
|
225 | 294 | &xhci {
|
| 295 | + pinctrl-names = "default"; |
| 296 | + pinctrl-0 = <&wwan_rst_h>; |
226 | 297 | status = "okay";
|
227 | 298 | };
|
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