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@@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
RZV Flexible Software Package Documentation +  Release v2.0.0
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+ - - - - -
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Copyright

Copyright [2020-2023] Renesas Electronics Corporation and/or its affiliates. All Rights Reserved.

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This software and documentation are supplied by Renesas Electronics Corporation and/or its affiliates. and may only be used with products of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.

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This software and documentation are supplied by Renesas Electronics America Inc. and may only be used with products of Renesas Electronics Corp. and its affiliates ("Renesas"). No other uses are authorized. Renesas products are sold pursuant to Renesas terms and conditions of sale. Purchasers are solely responsible for the selection and use of Renesas products and Renesas assumes no liability. No license, express or implied, to any intellectual property right is granted by Renesas. This software is protected under all applicable laws, including copyright laws. Renesas reserves the right to change or discontinue this software and/or this documentation. THE SOFTWARE AND DOCUMENTATION IS DELIVERED TO YOU "AS IS," AND RENESAS MAKES NO REPRESENTATIONS OR WARRANTIES, AND TO THE FULLEST EXTENT PERMISSIBLE UNDER APPLICABLE LAW, DISCLAIMS ALL WARRANTIES, WHETHER EXPLICITLY OR IMPLICITLY, INCLUDING WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT, WITH RESPECT TO THE SOFTWARE OR DOCUMENTATION. RENESAS SHALL HAVE NO LIABILITY ARISING OUT OF ANY SECURITY VULNERABILITY OR BREACH. TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT WILL RENESAS BE LIABLE TO YOU IN CONNECTION WITH THE SOFTWARE OR DOCUMENTATION (OR ANY PERSON OR ENTITY CLAIMING RIGHTS DERIVED FROM YOU) FOR ANY LOSS, DAMAGES, OR CLAIMS WHATSOEVER, INCLUDING, WITHOUT LIMITATION, ANY DIRECT, CONSEQUENTIAL, SPECIAL, INDIRECT, PUNITIVE, OR INCIDENTAL DAMAGES; ANY LOST PROFITS, OTHER ECONOMIC DAMAGE, PROPERTY DAMAGE, OR PERSONAL INJURY; AND EVEN IF RENESAS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH LOSS, DAMAGES, CLAIMS OR COSTS.

diff --git a/_f_s_p__a_r_c_h_i_t_e_c_t_u_r_e.html b/_f_s_p__a_r_c_h_i_t_e_c_t_u_r_e.html index 6abdd38..acda389 100644 --- a/_f_s_p__a_r_c_h_i_t_e_c_t_u_r_e.html +++ b/_f_s_p__a_r_c_h_i_t_e_c_t_u_r_e.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: FSP Architecture +RZV Flexible Software Package Documentation: FSP Architecture @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
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FSP Architecture
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  • Doxygen
  • Weak Symbols
  • Memory Allocation
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  • FSP Terms
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  • FSP Modules
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  • FSP Stacks
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  • FSP Instances -
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    Weak symbols are used occasionally in the FSP. They are used to ensure that a project builds even when the user has not defined an optional function.

    Memory Allocation

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    Dynamic memory allocation through use of the malloc() and free() functions are not used in FSP modules; all memory required by FSP modules is allocated in the application and passed to the module in a pointer. Exceptions are considered only for ports of 3rd party code that require dynamic memory.

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    -FSP Terms

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    Term Description Reference
    BSP Short for Board Support Package. In the FSP the BSP provides just enough foundation to allow other FSP modules to work together without issue. MPU Board Support Package
    Module Modules can be peripheral drivers, purely software, or anything in between. Each module consists of a folder with source code, documentation, and anything else that the customer needs to use the code effectively. Modules are independent units, but they may depend on other modules. Applications can be built by combining multiple modules to provide the user with the features they need. FSP Modules
    Driver A driver is a specific kind of module that directly modifies registers on the MPU. -
    Interface An interface contains API definitions that can be shared by modules with similar features. Interfaces are definitions only and do not add to code size. FSP Interfaces
    Stacks The FSP architecture is designed such that modules work together to form a stack. A stack consists of a top level module and all its dependencies. FSP Stacks
    Module Instance Single and independent instantiation of a module. An application may require two GPT timers. Each of these timers is a module instance of the r_gpt module. -
    Application Code that is owned and maintained by the user. Application code may be based on sample application code provided by Renesas, but it is the responsibility of the user to maintain as necessary. -
    Callback Function This term refers to a function that is called when an event occurs. As an example, suppose the user would like to be notified every second based on the RTC. As part of the RTC configuration, a callback function can be supplied that will be jumped to during each RTC interrupt. When a single callback services multiple events, the arguments contain the triggering event. Callback functions for interrupts should be kept short and handled carefully because when they are called the MPU is still inside of an interrupt, delaying any pending interrupts. -
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    -FSP Modules

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    Modules are the core building block of FSP. Modules can do many different things, but all modules share the basic concept of providing functionality upwards and requiring functionality from below.

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    -figure-fsp-module.svg -
    -Modules
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    The amount of functionality provided by a module is determined based on functional use cases. Common functionality required by multiple modules is often placed into a self-contained submodule so it can be reused. Code size, speed and complexity are also considered when defining a module.

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    The simplest FSP application consists of one module with the Board Support Package (BSP) and the user application on top.

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    -figure-fsp-application-single-module.svg -
    -Module with application
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    The Board Support Package (BSP) is the foundation for FSP modules, providing functionality to determine the MPU used as well as configuring clocks, interrupts and pins. For the sake of clarity, the BSP will be omitted from further diagrams.

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    -FSP Stacks

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    When modules are layered atop one another, an FSP stack is formed. The stacking process is performed by matching what one module provides with what another module requires.

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    -FSP Interfaces

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    At the architecture level, interfaces are the way that modules provide common features. This commonality allows modules that adhere to the same interface to be used interchangeably. Interfaces can be thought of as a contract between two modules - the modules agree to work together using the information that was established in the contract.

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    Interfaces aim to provide support for the common features that most users would expect. This means that some of the advanced features of a peripheral (such as IIC) might not be available in the interface. In most cases these features are still available through interface extensions.

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    In FSP design, interfaces are defined in header files. All interface header files are located in the folder rzv/fsp/inc/api and end with *_api.h. Interface extensions are defined in header files in the folder rzv/fsp/inc/instances. The following sections detail what makes up an interface.

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    -FSP Interface Enumerations

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    Whenever possible, interfaces use typed enumerations for function parameters and structure members.

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    typedef enum e_i2c_master_addr_mode
    {
    I2C_MASTER_ADDR_MODE_7BIT = 1, ///< Use 7-bit addressing mode
    I2C_MASTER_ADDR_MODE_10BIT = 2, ///< Use 10-bit addressing mode
    } i2c_master_addr_mode_t;

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    Enumerations remove uncertainty when deciding what values are available for a parameter. FSP enumeration options follow a strict naming convention where the name of the type is prefixed on the available options. Combining the naming convention with the autocomplete feature available in e2 studio (Ctrl + Space) provides the benefits of rapid coding while maintaining high readability.

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    -FSP Interface Callback Functions

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    Callback functions allow modules to asynchronously alert the user application when an event has occurred, such as when a byte has been received over a UART channel or an IRQ pin is toggled. FSP driver modules define and handle the interrupt service routines for RZ MPU peripherals to ensure any required hardware procedures are implemented. The interrupt service routines in FSP modules then call the user-defined callbacks to allow the application to respond.

    -

    Callback functions must be defined in the user application. They always return void and take a structure for their one parameter. The structure is defined in the interface for the module and is named <interface>_callback_args_t. The contents of the structure may vary depending on the interface, but two members are common: event and p_context.

    -

    The event member is an enumeration defined in the interface used by the application to determine why the callback was called. Using the UART example, the callback could be triggered for many different reasons, including when a byte is received, all bytes have been transmitted, or a framing error has occurred. The event member allows the application to determine which of these three events has occurred and handle it appropriately.

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    The p_context member is used for providing user-specified data to the callback function. In many cases a callback function is shared between multiple channels or module instances; when the callback occurs, the code handling the callback needs context information so that it can determine which module instance the callback is for. For example, if the callback wanted to make an FSP API call in the callback, then at a minimum the callback will need a reference to the relevant control structure. To make this easy, the user can provide a pointer to the control structure as the p_context. When the callback occurs, the control structure is passed in the p_context element of the callback structure.

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    When a module is not directly used in the user application (that is, it is not the top layer of the stack), its callback function will be handled by the module above. For example, if a module requires a UART interface module the upper layer module will control and use the UART's callback function. In this case the user would not need to create a callback function for the UART module in their application code.

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    -FSP Interface Data Structures

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    At a minimum, all FSP interfaces include three data structures: a configuration structure, an API structure, and an instance structure.

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    -FSP Interface Configuration Structure

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    The configuration structure is used for the initial configuration of a module during the <MODULE>_Open() call. The structure consists of members such as channel number, bitrate, and operating mode.

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    The configuration structure is used purely as an input into the module. It may be stored and referenced by the module, so the configuration structure and anything it references must persist as long as the module is open.

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    The configuration structure is allocated for each module instance in files generated by the RZ Configuration editor.

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    When FSP stacks are used, it is also important to understand that configuration structures only have members that apply to the current interface. If multiple layers in the same stack define the same configuration parameters then it becomes difficult to know where to modify the option. For example, the baud rate for a UART is only defined in the UART module instance. Any modules that use the UART interface rely on the baud rate being provided in the UART module instance and do not offer it in their own configuration structures.

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    -FSP Interface API Structure

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    All interfaces include an API structure which contains function pointers for all the supported interface functions.

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    -FSP Interface Instance Structure

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    Every FSP interface also has an instance structure. The instance structure encapsulates everything required to use the module:

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    • A pointer to the instance API structure (FSP Instance API)
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    • A pointer to the configuration structure
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    • A pointer to the control structure
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    The instance structure is not required at the application layer. It is used to connect modules to their dependencies (other than the BSP).

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    Instance structures have a standardized name of <interface>_instance_t.

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    An example from the Transfer Interface is shown below.

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    typedef struct st_transfer_instance
    {
    transfer_ctrl_t * p_ctrl; ///< Pointer to the control structure for this instance
    transfer_cfg_t const * p_cfg; ///< Pointer to the configuration structure for this instance
    transfer_api_t const * p_api; ///< Pointer to the API structure for this instance
    } transfer_instance_t;

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    Note that when an instance structure variable is declared, the API is the only thing that is instance specific, not module instance specific. This is because all module instances of the same module share the same underlying module source code.

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    -FSP Instances

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    While interfaces dictate the features that are provided, instances actually implement those features. Each instance is tied to a specific interface. Instances use the enumerations, data structures, and API prototypes from the interface. This allows an application that uses an interface to swap out the instance when needed.

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    In FSP design, instances consist of the interface extension and API defined in the instance header file located in the folder rzv/fsp/inc/instances and the module source rzv/fsp/src/<module>.

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    -FSP Instance Control Structure

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    The control structure is used as a unique identifier for the module instance and contains memory required by the module. Elements in the control structure are owned by the module and must not be modified by the application. The user allocates storage for a control structure, often as a global variable, then sends a pointer to it into the <MODULE>_Open() call for a module. At this point, the module initializes the structure as needed. The user must then send in a pointer to the control structure for all subsequent module calls.

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    -FSP Interface Extensions

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    In some cases, instances require more information than is provided in the interface. This situation can occur in the following cases:

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    • An instance offers extra features that are not common to most instances of the interface. An example of this is the start source selection of the GPT (General PWM Timer (r_gpt)). The GPT can be configured to start based on hardware events such as a falling edge on a trigger pin. This feature is not common to all timers, so it is included in the GPT instance.
      • -
    • An interface must be very generic out of necessity. As an interface becomes more generic, the number of possible instances increases. An example of an interface that must be generic is a block media interface that abstracts functions required by a file system. Possible instances include SD card, SPI Flash, SDRAM, USB, and many more.
      • -
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    The p_extend member provides this extension function.

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    Use of interface extensions is not always necessary. Some instances do not offer an extension since all functionality is provided in the interface. In these cases the p_extend member can be set to NULL. The documentation for each instance indicates whether an interface extension is available and whether it is mandatory or optional.

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    -FSP Extended Configuration Structure

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    When extended configuration is required it can be supplied through the p_extend parameter of the interface configuration structure.

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    The extended configuration structure is part of the instance, but it is also still considered to be part of the configuration structure. All usage notes about the configuration structure described in FSP Interface Configuration Structure apply to the extended configuration structure as well.

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    The extended configuration structure and all typed structures and enumerations required to define it make up the interface extension.

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    -FSP Instance API

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    Each instance includes a constant global variable tying the interface API functions to the functions provided by the module. The name of this structure is standardized as g_<interface>_on_<instance>.

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    Examples include g_spi_on_rspi. This structure is available to be used through an extern in the instance header file (r_rspi.h respectively).

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    -FSP API Standards

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    -FSP Function Names

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    FSP functions start with the uppercase module name (<MODULE>). All modules have <MODULE>_Open() and <MODULE>_Close() functions. The <MODULE>_Open() function must be called before any of the other functions. The only exception is the <MODULE>_VersionGet() function which is not dependent upon any user provided information.

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    Other functions that will commonly be found are <MODULE>_Read(), <MODULE>_Write(), <MODULE>_InfoGet(), and <MODULE>_StatusGet(). The <MODULE>_StatusGet() function provides a status that could change asynchronously, while <MODULE>_InfoGet() provides information that cannot change after open or can only be updated by API calls. Example function names include:

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    -Use of const in API parameters

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    The const qualifier is used with API parameters whenever possible.

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    The const qualifier after the pointer star for both p_ctrl and p_cfg ensures the FSP function does not modify the input pointer addresses. While not fool-proof by any means this does provide some extra checking inside the FSP code to ensure that arguments that should not be altered are treated as such.

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    -FSP Version Information

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    All instances supply a <MODULE>_VersionGet() function which fills in a structure of type fsp_version_t. This structure is made up of two version numbers: one for the interface (the API) and one for the underlying instance that is currently being used.

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    typedef union st_fsp_version
    {
    /** Version id */
    uint32_t version_id;
    /** Code version parameters */
    struct
    {
    uint8_t code_version_minor; ///< Code minor version
    uint8_t code_version_major; ///< Code major version
    uint8_t api_version_minor; ///< API minor version
    uint8_t api_version_major; ///< API major version
    };
    } fsp_version_t;

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    The API version ideally never changes, and only rarely if it does. A change to the API may require users to go back and modify their code. The code version (the version of the current instance) may be updated more frequently due to bug fixes, enhancements, and additional features. Changes to the code version typically do not require changes to user code.

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    -FSP Build Time Configurations

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    All modules have a build-time configuration header file. Most configuration options are supplied at run time, though options that are rarely used or apply to all instances of a module may be moved to build time. The advantage of using a build-time configuration option is to potentially reduce code size reduction by removing an unused feature.

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    All modules have a build time option to enable or disable parameter checking for the module. FSP modules check function arguments for validity when possible, though this feature is disabled by default to reduce code size. Enabling it can help catch parameter errors during development and debugging. By default, each module's parameter checking configuration inherits the BSP parameter checking setting (set on the BSP tab of the RZ Configuration editor). Leaving each module's parameter checking configuration set to Default (BSP) allows parameter checking to be enabled or disabled globally in all FSP code through the parameter checking setting on the BSP tab.

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    If an error condition can reasonably be avoided it is only checked in a section of code that can be disabled by disabling parameter checking. Most FSP APIs can only return FSP_SUCCESS if parameter checking is disabled. An example of an error that cannot be reasonably avoided is the "bus busy" error that occurs when another master is using an I2C bus. This type of error can be returned even if parameter checking is disabled.

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    -FSP File Structure

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    The high-level file structure of an FSP project is shown below.

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    rzv_gen
    rzv
    +---fsp
    +---inc
    | +---api
    | \---instances
    \---src
    +---bsp
    \---r_module
    rzv_cfg
    +---fsp_cfg
    +---bsp
    +---driver

    Directly underneath the base rzv folder the folders are split into the source and include folders. Include folders are kept separate from the source for easy browsing and easy setup of include paths.

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    The rzv_gen folder contains code generated by the RZ Configuration editor. This includes global variables for the control structure and configuration structure for each module.

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    The rzv_cfg folder is where configuration header files are stored for each module. See FSP Build Time Configurations for information on what is provided in these header files.

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    -FSP Architecture in Practice

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    -FSP Connecting Layers

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    FSP modules are meant to be both reusable and stackable. It is important to remember that modules are not dependent upon other modules, but upon other interfaces. The user is then free to fulfill the interface using the instance that best fits their needs.

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    -figure-fsp-interface-dependency-connection.svg -
    -Connecting layers
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    In the image above interface Y is a dependency of interface X and has its own dependency on interface Z. Interface X only has a dependency on interface Y. Interface X has no knowledge of interface Z. This is a requirement for ensuring that layers can easily be swapped out.

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    -Using FSP Modules in an Application

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    The typical use of an FSP module involves generating required module data then using the API in the application.

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    -Create a Module Instance in the RZ Configuration Editor

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    The RZ Configuration editor (available both in the Renesas e2 studio IDE as well as through the standalone RZ Smart Configurator) provides a graphical user interface for setting the parameters of the interface and instance configuration structures. It also automatically includes those structures (once they are configured in the GUI) in application-specific header files that can be included in application code.

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    The RZ Configuration editor allocates storage for the control structures, all required configuration structures, and the instance structure in generated files in the rzv_gen folder. Use the Properties window to set the values for the members of the configuration structures as needed. Refer to the Configuration section of the module usage notes for documentation about the configuration options.

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    If the interface has a callback function option then the application must declare and define the function. The return value is always of type void and the parameter to the function is a typed structure of name <interface>_callback_args_t. Once the function has been defined, assign its name to the p_callback member of the configuration structure. Callback function names can be assigned through the Properties window for the selected module.

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    -Use the Instance API in the Application

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    Call the module's <MODULE>_Open() function. Pass pointers to the generated control structure and configuration structure. The names of these structures are based on the 'Name' field provided in the configuration editor. The control structure is <Name>_ctrl and the configuration structure is <Name>_cfg. An example <MODULE>_Open() call for an r_gtm module instance named g_timer is:

    -
    R_GTM_Open(&g_timer_ctrl, &g_timer_cfg);

    Refer to the module usage notes for example code to help get started with any particular module.

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    Dynamic memory allocation through use of the malloc() and free() functions are not used in FSP modules; all memory required by FSP modules is allocated in the application and passed to the module in a pointer. Exceptions are considered only for ports of 3rd party code that require dynamic memory.

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    For details on Starting Development Introduction, please refer to Getting Started with RZ/V Flexible Software Package.

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    For details on Starting Development Introduction, please refer to Getting Started with RZ/V Flexible Software Package.

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    FSP Module
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    +Data Structures | +Typedefs | +Enumerations
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    ADC Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for A/D Converters.

    +

    +Summary

    +

    The ADC interface provides standard ADC functionality including one-shot mode (single scan), continuous scan and group scan. It also allows configuration of hardware and software triggers for starting scans. After each conversion an interrupt can be triggered, and if a callback function is provided, the call back is invoked with the appropriate event information.

    +

    Implemented by:

    +

    Analog to Digital Converter (r_adc_c) Analog to Digital Converter (r_adc_e) Temperature Sensor Unit (r_tsu_b)

    + + + + + + + + + + + + + + +

    +Data Structures

    struct  adc_status_t
     
    struct  adc_callback_args_t
     
    struct  adc_info_t
     
    struct  adc_cfg_t
     
    struct  adc_api_t
     
    struct  adc_instance_t
     
    + + + +

    +Typedefs

    typedef void adc_ctrl_t
     
    + + + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  adc_mode_t
     
    enum  adc_resolution_t
     
    enum  adc_alignment_t
     
    enum  adc_trigger_t
     
    enum  adc_event_t
     
    enum  adc_channel_t
     
    enum  adc_group_id_t
     
    enum  adc_group_mask_t
     
    enum  adc_state_t
     
    +

    Data Structure Documentation

    + +

    ◆ adc_status_t

    + +
    +
    + + + + +
    struct adc_status_t
    +
    +

    ADC status.

    +
    + + + + +
    Data Fields
    +adc_state_t +state +Current state.
    + +
    +
    + +

    ◆ adc_callback_args_t

    + +
    +
    + + + + +
    struct adc_callback_args_t
    +
    +

    ADC callback arguments definitions

    +
    + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint16_t +unit +ADC device in use.
    +adc_event_t +event +ADC callback event.
    +void const * +p_context +Placeholder for user data.
    +adc_channel_t +channel +Channel of conversion result. Only valid for r_adc ADC_EVENT_CONVERSION_COMPLETE.
    +uint64_t +channel_mask +Channel mask for conversion result. Only valid for r_adc_b.
    +adc_group_mask_t +group_mask +Group Mask.
    + +
    +
    + +

    ◆ adc_info_t

    + +
    +
    + + + + +
    struct adc_info_t
    +
    +

    ADC Information Structure for Transfer Interface

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +__I void * +p_address +The address to start reading the data from.
    +uint32_t +length +The total number of transfers to read.
    +transfer_size_t +transfer_size +The size of each transfer.
    +elc_peripheral_t +elc_peripheral +Name of the peripheral in the ELC list.
    +elc_event_t +elc_event +Name of the ELC event for the peripheral.
    +uint32_t +calibration_data +Temperature sensor calibration data (0xFFFFFFFF if unsupported) for reference voltage.
    +int16_t +slope_microvolts +Temperature sensor slope in microvolts/degrees C.
    +bool +calibration_ongoing +Calibration is in progress.
    +volatile const void * +p_address +The address to start reading the data from.
    +uint32_t +calibration_data1 +Temperature sensor calibration data1.
    +uint32_t +calibration_data2 +Temperature sensor calibration data2.
    + +
    +
    + +

    ◆ adc_cfg_t

    + +
    +
    + + + + +
    struct adc_cfg_t
    +
    +

    ADC general configuration

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +uint16_t unit
     ADC unit to be used.
     
    +adc_mode_t mode
     ADC operation mode.
     
    +adc_resolution_t resolution
     ADC resolution.
     
    +adc_alignment_t alignment
     Specify left or right alignment; ignored if addition used.
     
    +adc_trigger_t trigger
     Default and Group A trigger source.
     
    +IRQn_Type scan_end_irq
     Scan end IRQ number.
     
    +IRQn_Type scan_end_b_irq
     Scan end group B IRQ number.
     
    +IRQn_Type scan_end_c_irq
     Scan end group C IRQ number.
     
    +uint8_t scan_end_ipl
     Scan end interrupt priority.
     
    +uint8_t scan_end_b_ipl
     Scan end group B interrupt priority.
     
    +uint8_t scan_end_c_ipl
     Scan end group C interrupt priority.
     
    +void(* p_callback )(adc_callback_args_t *p_args)
     Callback function; set to NULL for none.
     
    +void const * p_context
     Placeholder for user data. Passed to the user callback in adc_callback_args_t.
     
    +void const * p_extend
     Extension parameter for hardware specific settings.
     
    + +
    +
    + +

    ◆ adc_api_t

    + +
    +
    + + + + +
    struct adc_api_t
    +
    +

    ADC functions implemented at the HAL layer will follow this API.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(adc_ctrl_t *const p_ctrl, adc_cfg_t const *const p_cfg)
     
    fsp_err_t(* scanCfg )(adc_ctrl_t *const p_ctrl, void const *const p_extend)
     
    fsp_err_t(* scanStart )(adc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* scanGroupStart )(adc_ctrl_t *p_ctrl, adc_group_mask_t group_mask)
     
    fsp_err_t(* scanStop )(adc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* scanStatusGet )(adc_ctrl_t *const p_ctrl, adc_status_t *p_status)
     
    fsp_err_t(* read )(adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, uint16_t *const p_data)
     
    fsp_err_t(* read32 )(adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, uint32_t *const p_data)
     
    fsp_err_t(* calibrate )(adc_ctrl_t *const p_ctrl, void const *p_extend)
     
    fsp_err_t(* offsetSet )(adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t const offset)
     
    fsp_err_t(* callbackSet )(adc_ctrl_t *const p_api_ctrl, void(*p_callback)(adc_callback_args_t *), void const *const p_context, adc_callback_args_t *const p_callback_memory)
     
    fsp_err_t(* close )(adc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* infoGet )(adc_ctrl_t *const p_ctrl, adc_info_t *const p_adc_info)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::open) (adc_ctrl_t *const p_ctrl, adc_cfg_t const *const p_cfg)
    +
    +

    Initialize ADC Unit; apply power, set the operational mode, trigger sources, interrupt priority, and configurations common to all channels and sensors.

    Implemented as
    +
    +
    Precondition
    Configure peripheral clocks, ADC pins and IRQs prior to calling this function.
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [in]p_cfgPointer to configuration structure
    +
    +
    + +
    +
    + +

    ◆ scanCfg

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::scanCfg) (adc_ctrl_t *const p_ctrl, void const *const p_extend)
    +
    +

    Configure the scan including the channels, groups, and scan triggers to be used for the unit that was initialized in the open call. Some configurations are not supported for all implementations. See implementation for details.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [in]p_extendSee implementation for details
    +
    +
    + +
    +
    + +

    ◆ scanStart

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::scanStart) (adc_ctrl_t *const p_ctrl)
    +
    +

    Start the scan (in case of a software trigger), or enable the hardware trigger.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control handle structure
    +
    +
    + +
    +
    + +

    ◆ scanGroupStart

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::scanGroupStart) (adc_ctrl_t *p_ctrl, adc_group_mask_t group_mask)
    +
    +

    Start the scan group (in case of a software trigger), or enable the hardware trigger.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [in]group_maskMask of groups to start
    +
    +
    + +
    +
    + +

    ◆ scanStop

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::scanStop) (adc_ctrl_t *const p_ctrl)
    +
    +

    Stop the ADC scan (in case of a software trigger), or disable the hardware trigger.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control handle structure
    +
    +
    + +
    +
    + +

    ◆ scanStatusGet

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::scanStatusGet) (adc_ctrl_t *const p_ctrl, adc_status_t *p_status)
    +
    +

    Check scan status.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [out]p_statusPointer to store current status in
    +
    +
    + +
    +
    + +

    ◆ read

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::read) (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, uint16_t *const p_data)
    +
    +

    Read ADC conversion result.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to control handle structure
    [in]reg_idADC channel to read (see enumeration adc_channel_t)
    [in]p_dataPointer to variable to load value into.
    +
    +
    + +
    +
    + +

    ◆ read32

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::read32) (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, uint32_t *const p_data)
    +
    +

    Read ADC conversion result into a 32-bit word.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to control handle structure
    [in]reg_idADC channel to read (see enumeration adc_channel_t)
    [in]p_dataPointer to variable to load value into.
    +
    +
    + +
    +
    + +

    ◆ calibrate

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::calibrate) (adc_ctrl_t *const p_ctrl, void const *p_extend)
    +
    +

    Calibrate ADC or associated PGA (programmable gain amplifier). The driver may require implementation specific arguments to the p_extend input. Not supported for all implementations. See implementation for details.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [in]p_extendPointer to implementation specific arguments
    +
    +
    + +
    +
    + +

    ◆ offsetSet

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::offsetSet) (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t const offset)
    +
    +

    Set offset for input PGA configured for differential input. Not supported for all implementations. See implementation for details.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to control handle structure
    [in]reg_idADC channel to read (see enumeration adc_channel_t)
    [in]offsetSee implementation for details.
    +
    +
    + +
    +
    + +

    ◆ callbackSet

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::callbackSet) (adc_ctrl_t *const p_api_ctrl, void(*p_callback)(adc_callback_args_t *), void const *const p_context, adc_callback_args_t *const p_callback_memory)
    +
    +

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to the ADC control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_working_memoryPointer to volatile memory where callback structure can be allocated. Callback arguments allocated here are only valid during the callback.
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::close) (adc_ctrl_t *const p_ctrl)
    +
    +

    Close the specified ADC unit by ending any scan in progress, disabling interrupts, and removing power to the specified A/D unit.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control handle structure
    +
    +
    + +
    +
    + +

    ◆ infoGet

    + +
    +
    + + + + +
    fsp_err_t(* adc_api_t::infoGet) (adc_ctrl_t *const p_ctrl, adc_info_t *const p_adc_info)
    +
    +

    Return the ADC data register address of the first (lowest number) channel and the total number of bytes to be read in order for the DTC/DMAC to read the conversion results of all configured channels. Return the temperature sensor calibration and slope data.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [out]p_adc_infoPointer to ADC information structure
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ adc_instance_t

    + +
    +
    + + + + +
    struct adc_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + + + + +
    Data Fields
    +adc_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +adc_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +void const * +p_channel_cfg +Pointer to the channel configuration structure for this instance.
    +adc_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ adc_ctrl_t

    + +
    +
    + + + + +
    typedef void adc_ctrl_t
    +
    +

    ADC control block. Allocate using driver instance control structure from driver instance header file.

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ adc_mode_t

    + +
    +
    + + + + +
    enum adc_mode_t
    +
    +

    ADC operation mode definitions

    + + + + +
    Enumerator
    ADC_MODE_SINGLE_SCAN 

    Single scan - one or more channels.

    +
    ADC_MODE_GROUP_SCAN 

    Two trigger sources to trigger scan for two groups which contain one or more channels.

    +
    ADC_MODE_CONTINUOUS_SCAN 

    Continuous scan - one or more channels.

    +
    + +
    +
    + +

    ◆ adc_resolution_t

    + +
    +
    + + + + +
    enum adc_resolution_t
    +
    +

    ADC data resolution definitions

    + + + + + + + +
    Enumerator
    ADC_RESOLUTION_12_BIT 

    12 bit resolution

    +
    ADC_RESOLUTION_10_BIT 

    10 bit resolution

    +
    ADC_RESOLUTION_8_BIT 

    8 bit resolution

    +
    ADC_RESOLUTION_14_BIT 

    14 bit resolution

    +
    ADC_RESOLUTION_16_BIT 

    16 bit resolution

    +
    ADC_RESOLUTION_24_BIT 

    24 bit resolution

    +
    + +
    +
    + +

    ◆ adc_alignment_t

    + +
    +
    + + + + +
    enum adc_alignment_t
    +
    +

    ADC data alignment definitions

    + + + +
    Enumerator
    ADC_ALIGNMENT_RIGHT 

    Data alignment right.

    +
    ADC_ALIGNMENT_LEFT 

    Data alignment left.

    +
    + +
    +
    + +

    ◆ adc_trigger_t

    + +
    +
    + + + + +
    enum adc_trigger_t
    +
    +

    ADC trigger mode definitions

    + + + + +
    Enumerator
    ADC_TRIGGER_SOFTWARE 

    Software trigger; not for group modes.

    +
    ADC_TRIGGER_SYNC_ELC 

    Synchronous trigger via ELC.

    +
    ADC_TRIGGER_ASYNC_EXTERNAL 

    External asynchronous trigger; not for group modes.

    +
    + +
    +
    + +

    ◆ adc_event_t

    + +
    +
    + + + + +
    enum adc_event_t
    +
    +

    ADC callback event definitions

    + + + + + + + + + + + + + + +
    Enumerator
    ADC_EVENT_SCAN_COMPLETE 

    Normal/Group A scan complete.

    +
    ADC_EVENT_SCAN_COMPLETE_GROUP_B 

    Group B scan complete.

    +
    ADC_EVENT_SCAN_COMPLETE_GROUP_C 

    Group C scan complete.

    +
    ADC_EVENT_CALIBRATION_COMPLETE 

    Calibration complete.

    +
    ADC_EVENT_CONVERSION_COMPLETE 

    Conversion complete.

    +
    ADC_EVENT_CALIBRATION_REQUEST 

    Calibration requested.

    +
    ADC_EVENT_CONVERSION_ERROR 

    Scan error.

    +
    ADC_EVENT_OVERFLOW 

    Overflow occurred.

    +
    ADC_EVENT_LIMIT_CLIP 

    Limiter clipping occurred.

    +
    ADC_EVENT_FIFO_READ_REQUEST 

    FIFO read requested.

    +
    ADC_EVENT_FIFO_OVERFLOW 

    FIFO overflow occurred.

    +
    ADC_EVENT_WINDOW_COMPARE_A 

    Window A comparison condition met.

    +
    ADC_EVENT_WINDOW_COMPARE_B 

    Window B comparison condition met.

    +
    + +
    +
    + +

    ◆ adc_channel_t

    + +
    +
    + + + + +
    enum adc_channel_t
    +
    +

    ADC channels

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    ADC_CHANNEL_0 

    ADC channel 0.

    +
    ADC_CHANNEL_1 

    ADC channel 1.

    +
    ADC_CHANNEL_2 

    ADC channel 2.

    +
    ADC_CHANNEL_3 

    ADC channel 3.

    +
    ADC_CHANNEL_4 

    ADC channel 4.

    +
    ADC_CHANNEL_5 

    ADC channel 5.

    +
    ADC_CHANNEL_6 

    ADC channel 6.

    +
    ADC_CHANNEL_7 

    ADC channel 7.

    +
    ADC_CHANNEL_8 

    ADC channel 8.

    +
    ADC_CHANNEL_9 

    ADC channel 9.

    +
    ADC_CHANNEL_10 

    ADC channel 10.

    +
    ADC_CHANNEL_11 

    ADC channel 11.

    +
    ADC_CHANNEL_12 

    ADC channel 12.

    +
    ADC_CHANNEL_13 

    ADC channel 13.

    +
    ADC_CHANNEL_14 

    ADC channel 14.

    +
    ADC_CHANNEL_15 

    ADC channel 15.

    +
    ADC_CHANNEL_16 

    ADC channel 16.

    +
    ADC_CHANNEL_17 

    ADC channel 17.

    +
    ADC_CHANNEL_18 

    ADC channel 18.

    +
    ADC_CHANNEL_19 

    ADC channel 19.

    +
    ADC_CHANNEL_20 

    ADC channel 20.

    +
    ADC_CHANNEL_21 

    ADC channel 21.

    +
    ADC_CHANNEL_22 

    ADC channel 22.

    +
    ADC_CHANNEL_23 

    ADC channel 23.

    +
    ADC_CHANNEL_24 

    ADC channel 24.

    +
    ADC_CHANNEL_25 

    ADC channel 25.

    +
    ADC_CHANNEL_26 

    ADC channel 26.

    +
    ADC_CHANNEL_27 

    ADC channel 27.

    +
    ADC_CHANNEL_28 

    ADC channel 28.

    +
    ADC_CHANNEL_DUPLEX_A 

    Data duplexing register A.

    +
    ADC_CHANNEL_DUPLEX_B 

    Data duplexing register B.

    +
    ADC_CHANNEL_DUPLEX 

    Data duplexing register.

    +
    ADC_CHANNEL_TEMPERATURE 

    Temperature sensor output.

    +
    ADC_CHANNEL_VOLT 

    Internal reference voltage.

    +
    + +
    +
    + +

    ◆ adc_group_id_t

    + +
    +
    + + + + +
    enum adc_group_id_t
    +
    + + + + + + + + + + +
    Enumerator
    ADC_GROUP_ID_0 

    Group ID 0.

    +
    ADC_GROUP_ID_1 

    Group ID 1.

    +
    ADC_GROUP_ID_2 

    Group ID 2.

    +
    ADC_GROUP_ID_3 

    Group ID 3.

    +
    ADC_GROUP_ID_4 

    Group ID 4.

    +
    ADC_GROUP_ID_5 

    Group ID 5.

    +
    ADC_GROUP_ID_6 

    Group ID 6.

    +
    ADC_GROUP_ID_7 

    Group ID 7.

    +
    ADC_GROUP_ID_8 

    Group ID 8.

    +
    + +
    +
    + +

    ◆ adc_group_mask_t

    + +
    +
    + + + + +
    enum adc_group_mask_t
    +
    + + + + + + + + + + + + +
    Enumerator
    ADC_GROUP_MASK_NONE 

    Group Mask Unknown or None.

    +
    ADC_GROUP_MASK_0 

    Group Mask 0.

    +
    ADC_GROUP_MASK_1 

    Group Mask 1.

    +
    ADC_GROUP_MASK_2 

    Group Mask 2.

    +
    ADC_GROUP_MASK_3 

    Group Mask 3.

    +
    ADC_GROUP_MASK_4 

    Group Mask 4.

    +
    ADC_GROUP_MASK_5 

    Group Mask 5.

    +
    ADC_GROUP_MASK_6 

    Group Mask 6.

    +
    ADC_GROUP_MASK_7 

    Group Mask 7.

    +
    ADC_GROUP_MASK_8 

    Group Mask 8.

    +
    ADC_GROUP_MASK_ALL 

    All Groups.

    +
    + +
    +
    + +

    ◆ adc_state_t

    + +
    +
    + + + + +
    enum adc_state_t
    +
    +

    ADC states.

    + + + + +
    Enumerator
    ADC_STATE_IDLE 

    ADC is idle.

    +
    ADC_STATE_SCAN_IN_PROGRESS 

    ADC scan in progress.

    +
    ADC_STATE_CALIBRATION_IN_PROGRESS 

    ADC calibration in progress - Not used by all ADC instances.

    +
    + +
    +
    +
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Documentation: Analog to Digital Converter (r_adc_c) + + + + + + + + + + + + + + + + + + + +
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    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Functions | +Data Structures | +Enumerations
    +
    +
    Analog to Digital Converter (r_adc_c)
    Modules » Analog
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_ADC_C_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)
     
    fsp_err_t R_ADC_C_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_channel_cfg)
     
    fsp_err_t R_ADC_C_InfoGet (adc_ctrl_t *p_ctrl, adc_info_t *p_adc_info)
     
    fsp_err_t R_ADC_C_ScanStart (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_ADC_C_ScanGroupStart (adc_ctrl_t *p_ctrl, adc_group_mask_t group_id)
     
    fsp_err_t R_ADC_C_ScanStop (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_ADC_C_StatusGet (adc_ctrl_t *p_ctrl, adc_status_t *p_status)
     
    fsp_err_t R_ADC_C_Read (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint16_t *const p_data)
     
    fsp_err_t R_ADC_C_Read32 (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint32_t *const p_data)
     
    fsp_err_t R_ADC_C_SampleStateCountSet (adc_ctrl_t *p_ctrl, uint16_t num_states)
     
    fsp_err_t R_ADC_C_Close (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_ADC_C_OffsetSet (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t offset)
     
    fsp_err_t R_ADC_C_Calibrate (adc_ctrl_t *const p_ctrl, void const *p_extend)
     
    fsp_err_t R_ADC_C_CallbackSet (adc_ctrl_t *const p_api_ctrl, void(*p_callback)(adc_callback_args_t *), void const *const p_context, adc_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the ADC peripheral on RZ MPUs. This module implements the ADC Interface.

    +

    +Overview

    +

    +Features

    +

    The ADC_C module supports the following features:

    +
      +
    • 12 bit resolution depending on the MPU
      • +
    • Supports selection of multiple analog input channels *1
      • +
    • Configurable scan start trigger:
        +
      • Software scan triggers
        • +
      • Hardware scan triggers
          +
        • Asynchronous trigger using an external pin (ADC_TRG)
          • +
        • Synchronous trigger using the multi-function timer pulse unit 3 (MTU3a)
          • +
        • PWM timer (GPT) as the activation source
          • +
        • In hardware trigger mode, the available trigger input modes are auto mode and step mode
          • +
        +
        • +
      • External scan triggers from the ADTRGn port pins
        • +
      +
      • +
    • Configurable operating mode:
        +
      • Select mode to convert the specified single analog input channel
        • +
      • Scan mode to convert the analog inputs of arbitrarily selected channels in ascending order of channel number
        • +
      • 1-buffer mode or 4-buffer mode can be specified for storing the A/D conversion result
        • +
      +
      • +
    • Configurable conversion mode:
        +
      • Single mode to proceed A/D conversion only once
        • +
      • Repeat mode to repeatedly proceed A/D conversion *2
        • +
      +
      • +
    • Optional callback when scan completes
      • +
    • An A/D conversion end interrupt (INTAD) can be generated on completion of A/D conversion
      • +
    +

    *1 The channel configuration of module is shown below.

    + + + + +
    RZ/V2L
    Channels 0 to 7
    +

    *2 Repeat mode is valid only in hardware trigger mode and step mode.

    +

    +Configuration

    +

    Build Time Configurations for r_adc_c

    +The following build time configurations are defined in fsp_cfg/r_adc_c_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Analog > ADC (r_adc_c)

    +This module can be added to the Stacks tab via New Stack > Analog > ADC (r_adc_c).
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_adc0 Module name
    General > Trigger mode
      +
    • +Software trigger mode
      • +
    • +Hardware trigger mode
      • +
    +    		Software trigger mode Select trigger mode.
    General > Operating mode
      +
    • +Scan mode
      • +
    • +Select mode
      • +
    +    		Scan mode Select the operating mode.
    General > Conversion mode
      +
    • +Single mode
      • +
    • +Repeat mode
      • +
    +    		Single mode Select the conversion mode.
    General > Buffer mode
      +
    • +1-buffer mode
      • +
    • +4-buffer mode
      • +
    +    		1-buffer mode Select the buffer mode.4-buffer mode is prohibited in scan mode.
    General > Analog input channelMCU Specific OptionsSpecify the analog input channel.Multiple selection is prohibited in select mode.
    General > Sampling timeManual Entry100 Set the sampling time.(unit:ADIVCLK cycle)
    General > Number of stages of the AD external trigger pin filter
      +
    • +Disabled
      • +
    • +4 stages
      • +
    • +8 stages
      • +
    • +12 stages
      • +
    • +16 stages
      • +
    +    		Disabled Select the number of stages of the AD external trigger pin filter.The signal to be filtered is ADC_ADCLK(TSUϕ) (80 MHz).
    Hardware trigger mode > Hardware trigger sourceMCU Specific OptionsSelect hardware trigger source.
    Hardware trigger mode > Valid edge of the trigger source (Only when ADC_TRG is selected)
      +
    • +Falling edge
      • +
    • +Rising edge
      • +
    • +Both edges
      • +
    +    		Falling edge Select the valid edge of the trigger.
    Hardware trigger mode > Trigger input mode
      +
    • +Auto mode
      • +
    • +Step mode
      • +
    +    		Auto mode Selects the trigger input mode.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be provided here. If this callback function is provided, it is called from the interrupt service routine (ISR)
    Interrupts > Conversion end interrupt Enable
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Enable or disable the conversion end interrupt.
    Interrupts > Conversion end Interrupt PriorityValue must be between 0 and 25512 Select the interrupt priority for Conversion end.
    +

    +

    +Clock Configuration

    +

    The ADC_C peripheral uses the clocks(ADC_ADCLK) shown in the table below as its clock sources.

    + + + + +
    RZ/V2L
    Clock Source 80MHz
    +

    +Pin Configuration

    +

    The ADC_CHx pins are analog input channels that can be used with the ADC.

    +

    ADC_TRG can be used to start scans with an external trigger. When external triggers are used, ADC scans begin on the falling edge of the ADTRG pin.

    +

    +Usage Notes

    +

    ADC Conversion Modes

    +

    Single mode and repeat mode are available.

    +

    Single-scan Mode

    +

    In single scan mode, one or more specified channels are scanned once per trigger.

    +

    Repeat-scan Mode

    +

    In repeat scan mode, a single trigger is required to start the scan. Scans continue until R_ADC_C_ScanStop() is called.

    Note
    To help ensure a responsive system, developers should consider system clock speed, ADCLK speed, and callback processing time. In particular, using a scan-end callback with a high scan rate relative to core clocks (for example, in continuous scan mode) result in constant or high-frequency interrupts and cannot recommended. Therefore, repeat mode is valid only in hardware trigger mode and step mode. For the hardware trigger source, set a timer with a cycle that takes the above into consideration.
    +

    ADC Trigger Modes

    +

    Software trigger mode and hardware trigger mode are the two types of trigger modes in which the trigger is the timing for starting the A/D conversion processing.

    +

    Software-trigger Mode

    +

    In software trigger mode, A/D conversion is started for the input of the analog input pins. The hardware trigger is invalid when software trigger mode is set.

    +

    Hardware-trigger Mode

    +

    There are two triggers in hardware trigger mode: asynchronous trigger using the ADC_TRG pin as the activation source and synchronous trigger using the multi-function timer pulse unit 3 (MTU3a) or general purpose PWM timer (GPT) as the activation source. In hardware trigger mode, the available trigger input modes are auto mode and step mode. In auto mode, when a hardware trigger is input once, A/D conversion is repeated automatically for the conversion count in accordance with the specified conversion settings. In step mode, A/D conversion proceeds every time a hardware trigger is input. For example, if select mode, single mode, and 4- buffer mode are selected, conversion finishes when a hardware trigger has been input four times.

    +

    ADC Operating Modes

    +

    There are two operating modes: select mode and scan mode. The select mode has 1-buffer mode and 4-buffer mode as sub-modes.

    +

    Select Mode

    +

    A/D conversion proceeds for the analog input specified. The A/D conversion results are stored in the A/D conversion result registers corresponding to the analog inputs. In select mode, 1-buffer mode or 4-buffer mode can be used as the method for storing the A/D conversion results. Only one channel is selectable for A/D conversion in select mode.

    +

    In 1-buffer mode, A/D conversion proceeds only once for the analog input specified. This mode is usable for reading the result of a single conversion.

    +

    In 4-buffer mode, A/D conversion proceeds four times for the analog input specified and the conversion results are stored A/D conversion result registers. For the correspondence between the analog inputs and A/D conversion result registers in 4-Buffer mode, refer to the reference section "Table Correspondence between Analog Inputs and A/D Conversion Result Registers in 4-Buffer Mode" of the user's manual. This mode is usable for obtaining the average of the A/D conversion results.

    +

    Scan Mode

    +

    A/D conversion proceeds for the analog inputs of channels selected, in ascending order of channel number. The A/D conversion results are stored in the A/D conversion result registers corresponding to the analog inputs. This mode is usable for constantly monitoring multiple analog signals. In scan mode, only 1-buffer mode can be specified.

    +

    When Interrupts Are Not Enabled

    +

    If interrupts are not enabled, the R_ADC_C_StatusGet API can be used to poll the ADC to determine when the scan has completed. The read API function is used to access the converted ADC result.

    +

    Sample-State Count Setting

    +

    The application program can modify the setting of the sample-state count for analog channels by calling the R_ADC_C_SampleStateCountSet() API function. To modify the sample-state count, set the number of states when calling the R_ADC_C_SampleStateCountSet() API function. The valid sample states for module are shown below.

    + + + + +
    RZ/V2L
    Sample State 6 to 2800
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the ADC in an application.

    +
    /* A channel configuration is generated by the Configuration editor based on the options selected. If additional
    * configurations are desired additional adc_c_channel_cfg_t elements can be defined and passed to R_ADC_C_ScanCfg. */
    const adc_c_channel_cfg_t g_adc0_channel_cfg =
    {
    .scan_mask = ADC_C_MASK_CHANNEL_1 | 0,
    .interrupt_setting = ADC_C_INTERRUPT_CHANNEL_SETTING_DISABLE,
    };
    void adc_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_ADC_C_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Enable channels. */
    err = R_ADC_C_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);
    assert(FSP_SUCCESS == err);
    /* In software trigger mode, start a scan by calling R_ADC_C_ScanStart(). In other modes, enable external
    * triggers by calling R_ADC_C_ScanStart(). */
    (void) R_ADC_C_ScanStart(&g_adc0_ctrl);
    /* Wait for conversion to complete. */
    adc_status_t status;
    status.state = ADC_STATE_SCAN_IN_PROGRESS;
    while (ADC_STATE_SCAN_IN_PROGRESS == status.state)
    {
    (void) R_ADC_C_StatusGet(&g_adc0_ctrl, &status);
    }
    /* Read converted data. */
    uint16_t channel1_conversion_result;
    err = R_ADC_C_Read(&g_adc0_ctrl, ADC_CHANNEL_1, &channel1_conversion_result);
    assert(FSP_SUCCESS == err);
    }

    Repeat Mode Example

    +

    This example shows how to perform repeated AD conversions using GPT.

    +
    const adc_c_extended_cfg_t g_adc0_cfg_extend =
    {
    .trigger_mode = ADC_C_TRIGGER_MODE_HARDWARE,
    .trigger_source = ADC_C_ACTIVE_TRIGGER_ADTRGA0,
    .trigger_edge = ADC_C_TRIGGER_EDGE_FALLING,
    .input_mode = ADC_C_INPUT_MODE_STEP,
    .operating_mode = ADC_C_OPERATING_MODE_SELECT,
    .buffer_mode = ADC_C_BUFFER_MODE_1,
    .sampling_time = 100,
    .external_trigger_filter = ADC_C_FILTER_STAGE_SETTING_DISABLE,
    };
    const adc_cfg_t g_adc0_cfg =
    {
    .mode = ADC_MODE_CONTINUOUS_SCAN,
    .p_callback = adc_callback,
    .p_context = NULL,
    .p_extend = &g_adc0_cfg_extend,
    .scan_end_irq = ADC_INTAD_IRQn,
    .scan_end_ipl = 12,
    };
    const adc_c_channel_cfg_t g_adc0_channel_cfg =
    {
    .scan_mask = ADC_C_MASK_CHANNEL_1 | 0,
    .interrupt_setting = ADC_C_INTERRUPT_CHANNEL_SETTING_ENABLE,
    };
    /* Instance structure to use this module. */
    const adc_instance_t g_adc1 =
    {
    .p_ctrl = &g_adc0_ctrl,
    .p_cfg = &g_adc0_cfg,
    .p_channel_cfg = &g_adc0_channel_cfg,
    .p_api = &g_adc_on_adc_c
    };
    void adc_callback (adc_callback_args_t * const p_unused)
    {
    (void) p_unused;
    uint16_t channel1_conversion_result;
    /* Read converted data. */
    R_ADC_C_Read(&g_adc0_ctrl, ADC_CHANNEL_1, &channel_conversion_result);
    assert(FSP_SUCCESS == err);
    }
    void adc_repeatmode_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_ADC_C_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Enable channels. */
    err = R_ADC_C_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);
    assert(FSP_SUCCESS == err);
    /* Set the user callback. */
    R_ADC_C_CallbackSet(g_adc0.p_ctrl, adc_callback, NULL, NULL);
    assert(FSP_SUCCESS == err);
    /* Open GPT timer with following configurations
    * (1) Set the mode to "Periodic".
    * (2) Determine the period of the timer considering the system clock speed, ADCLK speed, and callback processing time.
    * (3) Enable A/D Converter Start Request A during up-counting.
    * (4) Set the compare match value that generates a A/D Converter Start Request A.
    * (5) Enable extra features.
    */
    R_GPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
    assert(FSP_SUCCESS == err);
    R_GPT_Start(&g_timer0_ctrl);
    assert(FSP_SUCCESS == err);
    /* Scan the data with ADC channels*/
    err = R_ADC_C_ScanStart(&g_adc0_ctrl);
    assert(FSP_SUCCESS == err);
    while (1)
    ;
    }

    This example shows how to perform repeated AD conversions using MTU3a.

    +
    const adc_c_extended_cfg_t g_adc0_cfg_extend =
    {
    .trigger_mode = ADC_C_TRIGGER_MODE_HARDWARE,
    .trigger_source = ADC_C_ACTIVE_TRIGGER_TRGA0N,
    .trigger_edge = ADC_C_TRIGGER_EDGE_FALLING,
    .input_mode = ADC_C_INPUT_MODE_STEP,
    .operating_mode = ADC_C_OPERATING_MODE_SELECT,
    .buffer_mode = ADC_C_BUFFER_MODE_1,
    .sampling_time = 100,
    .external_trigger_filter = ADC_C_FILTER_STAGE_SETTING_DISABLE,
    };
    const adc_cfg_t g_adc0_cfg =
    {
    .mode = ADC_MODE_CONTINUOUS_SCAN,
    .p_callback = adc_callback,
    .p_context = NULL,
    .p_extend = &g_adc0_cfg_extend,
    .scan_end_irq = ADC_INTAD_IRQn,
    .scan_end_ipl = 12,
    };
    const adc_c_channel_cfg_t g_adc0_channel_cfg =
    {
    .scan_mask = ADC_C_MASK_CHANNEL_1 | 0,
    .interrupt_setting = ADC_C_INTERRUPT_CHANNEL_SETTING_ENABLE,
    };
    /* Instance structure to use this module. */
    const adc_instance_t g_adc1 =
    {
    .p_ctrl = &g_adc0_ctrl,
    .p_cfg = &g_adc0_cfg,
    .p_channel_cfg = &g_adc0_channel_cfg,
    .p_api = &g_adc_on_adc_c
    };
    void adc_callback (adc_callback_args_t * const p_unused)
    {
    (void) p_unused;
    uint16_t channel1_conversion_result;
    /* Read converted data. */
    R_ADC_C_Read(&g_adc0_ctrl, ADC_CHANNEL_1, &channel_conversion_result);
    assert(FSP_SUCCESS == err);
    }
    void adc_repeatmode_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_ADC_C_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Enable channels. */
    err = R_ADC_C_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);
    assert(FSP_SUCCESS == err);
    /* Set the user callback. */
    R_ADC_C_CallbackSet(g_adc0.p_ctrl, adc_callback, NULL, NULL);
    assert(FSP_SUCCESS == err);
    /* Open MTU3a timer with following configurations
    * (1) Set the mode to "Periodic".
    * (2) Determine the period of the timer considering the system clock speed, ADCLK speed, and callback processing time.
    * (3) Enable A/D Converter Activation by TGRA Input Capture/Compare Match Enable.
    */
    R_MTU3_Open(&g_timer0_ctrl, &g_timer0_cfg);
    assert(FSP_SUCCESS == err);
    R_MTU3_Start(&g_timer0_ctrl);
    assert(FSP_SUCCESS == err);
    /* Scan the data with ADC channels*/
    err = R_ADC_C_ScanStart(&g_adc0_ctrl);
    assert(FSP_SUCCESS == err);
    while (1)
    ;
    }
    + + + + + + + +

    +Data Structures

    struct  adc_c_extended_cfg_t
     
    struct  adc_c_channel_cfg_t
     
    struct  adc_c_instance_ctrl_t
     
    + + + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  adc_c_mask_t
     
    enum  adc_c_trigger_mode_t
     
    enum  adc_c_active_trigger_t
     
    enum  adc_c_trigger_edge_t
     
    enum  adc_c_input_mode_t
     
    enum  adc_c_operating_mode_t
     
    enum  adc_c_buffer_mode_t
     
    enum  adc_c_filter_stage_setting_t
     
    enum  adc_c_interrupt_channel_setting_t
     
    +

    Data Structure Documentation

    + +

    ◆ adc_c_extended_cfg_t

    + +
    +
    + + + + +
    struct adc_c_extended_cfg_t
    +
    +

    Extended configuration structure for ADC.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +adc_c_trigger_mode_t +trigger_mode +Trigger mode.
    +adc_c_active_trigger_t +trigger_source +Hardware trigger source.
    +adc_c_trigger_edge_t +trigger_edge +Valid edge of the trigger source.
    +adc_c_input_mode_t +input_mode +Trigger input mode.
    +adc_c_operating_mode_t +operating_mode +Operating mode.
    +adc_c_buffer_mode_t +buffer_mode +Buffer mode.
    +uint16_t +sampling_time +Sampling period. (6~2800)
    +adc_c_filter_stage_setting_t +external_trigger_filter +AD external trigger pin filter.
    + +
    +
    + +

    ◆ adc_c_channel_cfg_t

    + +
    +
    + + + + +
    struct adc_c_channel_cfg_t
    +
    +

    ADC channel(s) configuration

    +
    + + + + + + + +
    Data Fields
    +uint32_t +scan_mask +Channels/bits: bit 0 is ch0; bit 1 is ch1.
    +adc_c_interrupt_channel_setting_t +interrupt_setting +Interrupt setting.
    + +
    +
    + +

    ◆ adc_c_instance_ctrl_t

    + +
    +
    + + + + +
    struct adc_c_instance_ctrl_t
    +
    +

    ADC instance control block. DO NOT INITIALIZE. Initialized in adc_api_t::open().

    +
    +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ adc_c_mask_t

    + +
    +
    + + + + +
    enum adc_c_mask_t
    +
    +

    For ADC Scan configuration adc_channel_cfg_t::scan_mask. Use bitwise OR to combine these masks for desired channels.

    + + + + + + + + + + + +
    Enumerator
    ADC_C_MASK_OFF 

    No channels selected.

    +
    ADC_C_MASK_CHANNEL_0 

    Channel 0 mask.

    +
    ADC_C_MASK_CHANNEL_1 

    Channel 1 mask.

    +
    ADC_C_MASK_CHANNEL_2 

    Channel 2 mask.

    +
    ADC_C_MASK_CHANNEL_3 

    Channel 3 mask.

    +
    ADC_C_MASK_CHANNEL_4 

    Channel 4 mask.

    +
    ADC_C_MASK_CHANNEL_5 

    Channel 5 mask.

    +
    ADC_C_MASK_CHANNEL_6 

    Channel 6 mask.

    +
    ADC_C_MASK_CHANNEL_7 

    Channel 7 mask.

    +
    ADC_C_MASK_CHANNEL_8 

    Channel 8 mask (Temperature sensor channel mask)

    +
    + +
    +
    + +

    ◆ adc_c_trigger_mode_t

    + +
    +
    + + + + +
    enum adc_c_trigger_mode_t
    +
    +

    ADC trigger mode select

    + + + +
    Enumerator
    ADC_C_TRIGGER_MODE_SOFTWARE 

    Software trigger mode.

    +
    ADC_C_TRIGGER_MODE_HARDWARE 

    Hardware trigger mode.

    +
    + +
    +
    + +

    ◆ adc_c_active_trigger_t

    + +
    +
    + + + + +
    enum adc_c_active_trigger_t
    +
    +

    ADC hardware trigger source select

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    ADC_C_ACTIVE_TRIGGER_EXTERNAL 

    External trigger input.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA0N 

    Compare match with or input capture to MTU0.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA1N 

    Compare match with or input capture to MTU1.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA2N 

    Compare match with or input capture to MTU2.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA3N 

    Compare match with or input capture to MTU3.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA4N 

    Compare match with or input capture to MTU4.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA6N 

    Compare match with or input capture to MTU6.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRGA7N 

    Compare match with or input capture to MTU7.TGRA.

    +
    ADC_C_ACTIVE_TRIGGER_TRG0N 

    Compare match with MTU0.TGRE.

    +
    ADC_C_ACTIVE_TRIGGER_TRG4AN 

    Compare match between MTU4.TADCORA and MTU4.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_TRG4BN 

    Compare match between MTU4.TADCORB and MTU4.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_TRG4AN_BN 

    Compare match between MTU4.TADCORA and MTU4.TCNT, or between MTU4.TADCORB and MTU4.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_TRG4ABN 

    Compare match between MTU4.TADCORA and MTU4.TCNT, and between MTU4.TADCORB and MTU4.TCNT (when interrupt skipping function 2 is in use)

    +
    ADC_C_ACTIVE_TRIGGER_TRG7AN 

    Compare match between MTU7.TADCORA and MTU7.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_TRG7BN 

    Compare match between MTU7.TADCORB and MTU7.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_TRG7AN_BN 

    Compare match between MTU7.TADCORA and MTU7.TCNT, or between MTU7.TADCORB and MTU7.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_TRG7ABN 

    Compare match between MTU7.TADCORA and MTU7.TCNT, and between MTU7.TADCORB and MTU7.TCNT.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA0 

    Compare match with GPT0.GTADTRA.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGB0 

    Compare match with GPT0.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA1 

    Compare match with GPT1.GTADTRA.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGB1 

    Compare match with GPT1.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA2 

    Compare match with GPT2.GTADTRA.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGB2 

    Compare match with GPT2.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA3 

    Compare match with GPT3.GTADTRA.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGB3 

    Compare match with GPT3.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA0_B0 

    Compare match with GPT0.GTADTRA or GPT0.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA1_B1 

    Compare match with GPT1.GTADTRA or GPT1.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA2_B2 

    Compare match with GPT2.GTADTRA or GPT2.GTADTRB.

    +
    ADC_C_ACTIVE_TRIGGER_ADTRGA3_B3 

    Compare match with GPT3.GTADTRA or GPT3.GTADTRB.

    +
    + +
    +
    + +

    ◆ adc_c_trigger_edge_t

    + +
    +
    + + + + +
    enum adc_c_trigger_edge_t
    +
    +

    valid edge of the trigger select

    + + + + +
    Enumerator
    ADC_C_TRIGGER_EDGE_FALLING 

    Falling edge.

    +
    ADC_C_TRIGGER_EDGE_RISING 

    Rising edge.

    +
    ADC_C_TRIGGER_EDGE_BOTH 

    Both edges.

    +
    + +
    +
    + +

    ◆ adc_c_input_mode_t

    + +
    +
    + + + + +
    enum adc_c_input_mode_t
    +
    +

    ADC trigger input mode select

    + + + +
    Enumerator
    ADC_C_INPUT_MODE_AUTO 

    Auto mode.

    +
    ADC_C_INPUT_MODE_STEP 

    Step mode.

    +
    + +
    +
    + +

    ◆ adc_c_operating_mode_t

    + +
    +
    + + + + +
    enum adc_c_operating_mode_t
    +
    +

    ADC operating mode select

    + + + +
    Enumerator
    ADC_C_OPERATING_MODE_SCAN 

    Scan mode.

    +
    ADC_C_OPERATING_MODE_SELECT 

    Select mode.

    +
    + +
    +
    + +

    ◆ adc_c_buffer_mode_t

    + +
    +
    + + + + +
    enum adc_c_buffer_mode_t
    +
    +

    ADC buffer mode select

    + + + +
    Enumerator
    ADC_C_BUFFER_MODE_1 

    1-buffer mode

    +
    ADC_C_BUFFER_MODE_4 

    4-buffer mode

    +
    + +
    +
    + +

    ◆ adc_c_filter_stage_setting_t

    + +
    +
    + + + + +
    enum adc_c_filter_stage_setting_t
    +
    +

    Select the number of stages of the AD external trigger pin filter.

    + + + + + + +
    Enumerator
    ADC_C_FILTER_STAGE_SETTING_DISABLE 

    Filter is disabled.

    +
    ADC_C_FILTER_STAGE_SETTING_4 

    12.5 ns (80 MHz) x 4 stages

    +
    ADC_C_FILTER_STAGE_SETTING_8 

    12.5 ns (80 MHz) x 8 stages

    +
    ADC_C_FILTER_STAGE_SETTING_12 

    12.5 ns (80 MHz) x 12 stages

    +
    ADC_C_FILTER_STAGE_SETTING_16 

    12.5 ns (80 MHz) x 16 stages

    +
    + +
    +
    + +

    ◆ adc_c_interrupt_channel_setting_t

    + +
    +
    + + + + +
    enum adc_c_interrupt_channel_setting_t
    +
    +

    Enable or disable the conversion end interrupt of channel

    + + + +
    Enumerator
    ADC_C_INTERRUPT_CHANNEL_SETTING_DISABLE 

    Interrupt output is disabled.

    +
    ADC_C_INTERRUPT_CHANNEL_SETTING_ENABLE 

    Interrupt output is enabled.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_ADC_C_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_Open (adc_ctrl_t * p_ctrl,
    adc_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the ADC module and applies configurations.

    +
    Return values
    + + + + + +
    FSP_SUCCESSModule is ready for use.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_ALREADY_OPENThe instance control structure has already been opened.
    FSP_ERR_IRQ_BSP_DISABLEDA callback is provided, but the interrupt is not enabled.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_ScanCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_ScanCfg (adc_ctrl_t * p_ctrl,
    void const *const p_channel_cfg 
    )
    +
    +

    Configures the ADC_C scan parameters. Channel specific settings are set in this function. Pass a pointer to adc_c_channel_cfg_t to p_channel_cfg.

    +
    Return values
    + + + + +
    FSP_SUCCESSChannel specific settings applied.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_InfoGet (adc_ctrl_t * p_ctrl,
    adc_info_t * p_adc_info 
    )
    +
    +

    Returns the address of the lowest number configured channel and the total number of bytes to be read in order to read the results of the configured channels. If no channels are configured, then a length of 0 is returned.

    +
    Return values
    + + + + +
    FSP_SUCCESSInformation stored in p_adc_info.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_ScanStart()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ADC_C_ScanStart (adc_ctrl_t * p_ctrl)
    +
    +

    Start A/D conversion.

    +
    Precondition
    Call R_ADC_C_ScanCfg after R_ADC_C_Open before starting a scan.
    +
    Return values
    + + + + + + +
    FSP_SUCCESSScan started (software trigger) or hardware triggers enabled.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    FSP_ERR_IN_USEAnother scan is still in progress (software trigger).
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_ScanGroupStart()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_ScanGroupStart (adc_ctrl_t * p_ctrl,
    adc_group_mask_t group_id 
    )
    +
    +

    adc_api_t::scanGroupStart is not supported. Use scanStart instead.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_ScanStop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ADC_C_ScanStop (adc_ctrl_t * p_ctrl)
    +
    +

    Stop A/D conversion.

    +
    Return values
    + + + + + +
    FSP_SUCCESSScan stopped (software trigger) or hardware triggers disabled.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_StatusGet (adc_ctrl_t * p_ctrl,
    adc_status_t * p_status 
    )
    +
    +

    Get current ADC_C status and store it in provided pointer p_status.

    +
    Return values
    + + + + +
    FSP_SUCCESSModule status stored in the provided pointer p_status
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_Read (adc_ctrl_t * p_ctrl,
    adc_channel_t const reg_id,
    uint16_t *const p_data 
    )
    +
    +

    Reads conversion results from a single channel or sensor.

    +
    Return values
    + + + + + +
    FSP_SUCCESSData read into provided p_data.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_Read32()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_Read32 (adc_ctrl_t * p_ctrl,
    adc_channel_t const reg_id,
    uint32_t *const p_data 
    )
    +
    +

    Reads conversion results from a single channel or sensor register into a 32-bit result.

    +
    Return values
    + + + + + +
    FSP_SUCCESSData read into provided p_data.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_SampleStateCountSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_SampleStateCountSet (adc_ctrl_t * p_ctrl,
    uint16_t num_states 
    )
    +
    +

    Sets the sample state count for individual channels. This only needs to be set for special use cases. Normally, use the default values out of reset.

    +
    Note
    The sample states for the temperature and voltage sensor are set in R_ADC_C_ScanCfg.
    +
    Return values
    + + + + + + +
    FSP_SUCCESSSample state count updated.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_IN_USEA/D conversion ongoing.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ADC_C_Close (adc_ctrl_t * p_ctrl)
    +
    +

    This function ends any scan in progress, disables interrupts, and removes power to the A/D peripheral.

    +
    Return values
    + + + + +
    FSP_SUCCESSModule closed.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_OffsetSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_OffsetSet (adc_ctrl_t *const p_ctrl,
    adc_channel_t const reg_id,
    int32_t offset 
    )
    +
    +

    adc_api_t::offsetSet is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_Calibrate()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_Calibrate (adc_ctrl_t *const p_ctrl,
    void const * p_extend 
    )
    +
    +

    adc_api_t::calibrate is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDCalibration not supported on this MCU.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_C_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_C_CallbackSet (adc_ctrl_t *const p_api_ctrl,
    void(*)(adc_callback_args_t *) p_callback,
    void const *const p_context,
    adc_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements adc_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    +
    +
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b/group___a_d_c___e.html @@ -0,0 +1,1707 @@ + + + + + + + +RZV Flexible Software Package Documentation: Analog to Digital Converter (r_adc_e) + + + + + + + + + + + + + + + + + + + +
    +
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    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +
    +
    +Functions | +Data Structures | +Enumerations
    +
    +
    Analog to Digital Converter (r_adc_e)
    Modules » Analog
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_ADC_E_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)
     
    fsp_err_t R_ADC_E_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_channel_cfg)
     
    fsp_err_t R_ADC_E_InfoGet (adc_ctrl_t *p_ctrl, adc_info_t *p_adc_info)
     
    fsp_err_t R_ADC_E_ScanStart (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_ADC_E_ScanGroupStart (adc_ctrl_t *p_ctrl, adc_group_mask_t group_id)
     
    fsp_err_t R_ADC_E_ScanStop (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_ADC_E_StatusGet (adc_ctrl_t *p_ctrl, adc_status_t *p_status)
     
    fsp_err_t R_ADC_E_Read (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint16_t *const p_data)
     
    fsp_err_t R_ADC_E_Read32 (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint32_t *const p_data)
     
    fsp_err_t R_ADC_E_Close (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_ADC_E_OffsetSet (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t offset)
     
    fsp_err_t R_ADC_E_Calibrate (adc_ctrl_t *const p_ctrl, void const *p_extend)
     
    fsp_err_t R_ADC_E_CallbackSet (adc_ctrl_t *const p_api_ctrl, void(*p_callback)(adc_callback_args_t *), void const *const p_context, adc_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the and ADC12 peripherals on RZ microprocessor. This module implements the ADC Interface.

    +

    +Overview

    +

    +Features

    +

    The ADC_E module supports the following features:

    +
      +
    • 8 or 12 bit maximum resolution depending on the RZ MPUs
      • +
    • Configure scans to include:
        +
      • Multiple analog channels
        • +
      +
      • +
    • Configurable scan start trigger:
        +
      • Software scan triggers
        • +
      • Hardware scan triggers (Trigger by the General-Purpose Timer (GPT) and event link controller (ELC))
        • +
      • External scan triggers from the ADTRGn port pins
        • +
      +
      • +
    • Configurable scan mode:
        +
      • Single scan mode, where each trigger starts a single scan
        • +
      • Continuous scan mode, where all channels are scanned continuously
        • +
      • Group scan mode, where channels are grouped into group A and group B and group C.
        • +
      +
      • +
    • Supports adding and averaging converted samples
      • +
    • Optional callback when scan completes
      • +
    • Supports reading converted data
      • +
    • Double-trigger support
      • +
    • Compare function support
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_adc_e

    +The following build time configurations are defined in fsp_cfg/r_adc_e_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Analog > ADC Driver on r_adc_e

    +This module can be added to the Stacks tab via New Stack > Analog > ADC Driver on r_adc_e.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_adc0 Module name
    General > UnitUnit must be a non-negative integer0 Specifies the ADC Unit to be used.
    General > Resolution
      +
    • +12-Bit
      • +
    • +8-Bit
      • +
    +    		12-Bit Specifies the conversion resolution for this unit.
    General > Clear after read
      +
    • +Off
      • +
    • +On
      • +
    +    		On Specifies if the result register will be automatically cleared after the conversion result is read.
    General > Mode
      +
    • +Single Scan
      • +
    • +Continuous Scan
      • +
    • +Group Scan
      • +
    +    		Single Scan Specifies the mode that this ADC unit is used in.
    General > Double-trigger
      +
    • +Disabled
      • +
    • +Enabled
      • +
    • +Enabled (extended mode)
      • +
    +    		Disabled When enabled, the scan-end interrupt for Group A is only thrown on every second scan. Extended double-trigger mode (single-scan only) triggers on both ELC events, allowing (for example) a scan on two different timer compare match values.
    +
    +In group mode Group B is unaffected.
    +
    +
    Input > Start Trigger > Group ARefer to the RZV Configuration tool for available options.software A/D Conversion Start Trigger Select for Group A.
    Input > Start Trigger > Group BRefer to the RZV Configuration tool for available options.Disabled A/D Conversion Start Trigger Select for Group B.
    Input > Start Trigger > Group C Enabled
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Set to true to enable Group C, false to disable Group C.
    Input > Start Trigger > Group CRefer to the RZV Configuration tool for available options.Disabled A/D Conversion Start Trigger Select for Group C.
    Input > Start Trigger > ELC EventMCU Specific OptionsSelect ELC event.
    Input > Window Compare > Window A > Enable
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Enable or disable comparison with Window A.
    Input > Window Compare > Window A > Channels to compare
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		Select channels to be compared to Window A.
    Input > Window Compare > Window A > Channel comparison mode (channel availability varies by MCU and unit)
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		Checking a box sets the comparison mode for that channel to Greater Than or Inside Window depending on whether Window Mode is disabled or enabled (respectively). If left unchecked the comparison mode will likewise be Less Than or Outside Window (respectively).
    Input > Window Compare > Window A > Lower ReferenceMust be a positive 16-bit integer.0 Set the lower comparison value.
    Input > Window Compare > Window A > Upper ReferenceMust be a positive 16-bit integer.0 Set the upper comparison value.
    Input > Window Compare > Window B > Enable
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Enable or disable comparison with Window B.
    Input > Window Compare > Window B > Channel to compare (channel availability varies by MCU and unit)
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		Channel 0 Select a channel to be compared to Window B.
    Input > Window Compare > Window B > Comparison mode
      +
    • +Less Than or Outside Window
      • +
    • +Greater Than or Inside Window
      • +
    +    		module.driver.adc_e.compare.window_b.mode Select the comparison mode for Window B. For each option, the first condition applies when Window Mode is disabled and the second option applies when Window Mode is enabled.
    Input > Window Compare > Window B > Lower ReferenceMust be a positive 16-bit integer.0 Set the lower comparison value.
    Input > Window Compare > Window B > Upper ReferenceMust be a positive 16-bit integer.0 Set the upper comparison value.
    Input > Window Compare > Window Mode
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled When disabled, ADC values will be compared only with the lower reference on each comparator. When enabled, both the lower and upper reference values will be used to create a comparison window.
    Input > Window Compare > Event Output
      +
    • +OR
      • +
    • +XOR
      • +
    • +AND
      • +
    +    		OR Select how comparison results should be composited for event output.
    Input > Channel Scan Mask
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		In Normal mode of operation, this bitmask field specifies the channels that are enabled in that ADC unit. In group mode, this field specifies which channels belong to group A.
    Input > Group B Scan Mask
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		In group mode, this field specifies which channels belong to group B.
    Input > Group C Scan Mask
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		In group mode, this field specifies which channels belong to group C.
    Input > Addition/Averaging Mask (channel availability varies by MCU and unit)
      +
    • +Channel 0
      • +
    • +Channel 1
      • +
    • +Channel 2
      • +
    • +Channel 3
      • +
    • +Channel 4
      • +
    • +Channel 5
      • +
    • +Channel 6
      • +
    • +Channel 7
      • +
    +    		Select channels to include in the Addition/Averaging Mask
    Input > Add/Average Count
      +
    • +Disabled
      • +
    • +Add 2 samples
      • +
    • +Add 3 samples
      • +
    • +Add 4 samples
      • +
    • +Add 16 samples
      • +
    • +Average 2 samples
      • +
    • +Average 4 samples
      • +
    +    		Disabled Specifies if addition or averaging needs to be done for any of the channels in this unit.
    Input > Group Priority (Valid only in Group Scan Mode)
      +
    • +Group A ignored and does not interrupt Group B and Group C
      • +
    • +Group B and Group C restart at next trigger
      • +
    • +Group B and Group C restart immediately and scans from the head of the channel
      • +
    • +Group B and Group C restart immediately and scans
      • +
    • +Group B and Group C restart and scans continuously from the head of the channel
      • +
    • +Group B and Group C restart immediately and scans continuously from the head of the channel
      • +
    • +Group B and Group C restart immediately and scans continuously
      • +
    +    		Group A ignored and does not interrupt Group B and Group C Determines whether an ongoing group B scan can be interrupted by a group A trigger, whether it should abort on a group A trigger, or if it should pause to allow group A scan and restart immediately after group A scan is complete.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the ADC scan completes.
    Interrupts > Scan End Interrupt EnableMCU Specific OptionsEnable or disable Scan End interrupt.
    Interrupts > Scan End Interrupt PriorityValue must be an integer between 0 and 25512 Select scan end interrupt priority.
    Interrupts > Scan End Group B Interrupt EnableMCU Specific OptionsEnable or disable Scan End Group B interrupt.
    Interrupts > Scan End Group B Interrupt PriorityValue must be an integer between 0 and 25512 Select group B scan end interrupt priority.
    Interrupts > Scan End Group C Interrupt EnableMCU Specific OptionsEnable or disable Scan End Group C interrupt.
    Interrupts > Scan End Group C Interrupt PriorityValue must be an integer between 0 and 25512 Select group C scan end interrupt priority.
    Interrupts > Window Compare A Interrupt EnableMCU Specific OptionsEnable or disable Window Compare A interrupt.
    Interrupts > Window Compare A Interrupt PriorityValue must be an integer between 0 and 25512 Select group C scan end interrupt priority.
    Interrupts > Window Compare B Interrupt EnableMCU Specific OptionsEnable or disable Window Compare B interrupt.
    Interrupts > Window Compare B Interrupt PriorityValue must be an integer between 0 and 25512 Select group C scan end interrupt priority.
    ELC > Output Event Signal
      +
    • +Group A
      • +
    • +Group B
      • +
    • +Group A or B or C
      • +
    • +Group C
      • +
    +    		Group A A/D Event Link Control.
    +

    +

    +Clock Configuration

    +

    A/D conversion clock ADC_0_ADCLK is 50MHz, 40MHz, 20MHz, 10MHz or 5MHz.

    Note
    Though the GPT or ELC can be selected as an internal trigger generation module to start A/D conversion, set the ELC as a trigger module when ADC_m_PCLK (m = 0 to 2) = 40 MHz.
    +

    +Pin Configuration

    +

    The ANxxx pins are analog input channels that can be used with the ADC.

    +

    +Usage Notes

    +

    +ADC Operational Modes

    +

    The driver supports three operation modes: single-scan, continuous-scan, and group-scan modes. In each mode, analog channels are converted in ascending order of channel number, followed by scans of the voltage sensor if they are included in the mask of channels to scan.

    +

    Single-scan Mode

    +

    In single scan mode, one or more specified channels are scanned once per trigger.

    +

    Continuous-scan Mode

    +

    In continuous scan mode, a single trigger is required to start the scan. Scans continue until R_ADC_E_ScanStop() is called.

    +
    Note
    On RZ MPUs, the AD conversion sampling time is not long enough to meet the ADC interrupt processing time. Particularly in continuous scan mode, it is not possible to obtain the results of the ADC conversion at the time of each scan is complete, so it is advisable to configure the system considering that only the conversion results available at the time of the scan end callback can be retrieved. To maintain system responsiveness and effectiveness, avoiding high-frequency scan settings relative to core clocks is recommended to prevent excessive interrupts.
    +

    Group-scan Mode

    +

    Group-scan mode allows the application to allocate channels to one of two groups (A and B and C). Conversion begins when the specified ELC start trigger for that group is received.

    +

    The priority of group priority operations is group A > group B > group C. In group priority operation, if the scan start of group B is accepted during the scan of group C, the scan of group C is interrupted and the scan of group B is started. If the scan start of group A is accepted during the scan of group C, the scan of group A is started. The scan of Group C is interrupted and the scan of Group A is started. Similarly, if the scan start of Group A is accepted during the scan of Group B, the scan of Group B is interrupted and the scan of Group A is started.

    +

    Double-triggering

    +

    When double-triggering is enabled a single channel is selected to be scanned twice before an interrupt is thrown. The first scan result when using double-triggering is always saved to the selected channel's data register. The second result is saved to the data duplexing register (ADC_CHANNEL_DUPLEX).

    +

    Double-triggering uses Group A; only one channel can be selected when enabled. No other scanning is possible on Group A while double-trigger mode is selected.

    +

    When extended double-triggering is enabled both ADC input events are routed to Group A. The interrupt is still thrown after every two scans regardless of the triggering event(s). While the first and second scan are saved to the selected ADC data register and the ADC duplexing register as before, scans associated with event A and B are additionally copied into duplexing register A and B, respectively (ADC_CHANNEL_DUPLEX_A and ADC_CHANNEL_DUPLEX_B).

    +

    Usage Notes for ADC12

    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the ADC in an application.

    +
    /* A channel configuration is generated by the FSP Configuration editor based on the options selected. If additional
    * configurations are desired additional adc_channel_cfg_t elements can be defined and passed to R_ADC_E_ScanCfg. */
    const adc_channel_cfg_t g_adc0_channel_cfg =
    {
    .scan_mask = ADC_E_MASK_CHANNEL_0 | ADC_E_MASK_CHANNEL_1,
    .scan_mask_group_b = 0,
    .priority_group_a = (adc_e_group_a_t) 0,
    .add_mask = 0,
    .sample_hold_mask = 0,
    .sample_hold_states = 0,
    };
    void adc_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_ADC_E_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Enable channels. */
    err = R_ADC_E_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);
    handle_error(err);
    /* In software trigger mode, start a scan by calling R_ADC_E_ScanStart(). In other modes, enable external
    * triggers by calling R_ADC_E_ScanStart(). */
    (void) R_ADC_E_ScanStart(&g_adc0_ctrl);
    /* Wait for conversion to complete. */
    adc_status_t status;
    status.state = ADC_STATE_SCAN_IN_PROGRESS;
    while (ADC_STATE_SCAN_IN_PROGRESS == status.state)
    {
    (void) R_ADC_E_StatusGet(&g_adc0_ctrl, &status);
    }
    /* Read converted data. */
    uint16_t channel1_conversion_result;
    err = R_ADC_E_Read(&g_adc0_ctrl, ADC_CHANNEL_1, &channel1_conversion_result);
    handle_error(err);
    }

    Double-Trigger Example

    +

    This example demonstrates reading data from a double-trigger scan. A flag is used to wait for a callback event. Two scans must occur before the callback is called. These results are read via R_ADC_E_Read using the selected channel enum value as well as ADC_CHANNEL_DUPLEX.

    +
    volatile bool scan_complete_flag = false;
    void adc_e_callback (adc_callback_args_t * p_args)
    {
    FSP_PARAMETER_NOT_USED(p_args);
    scan_complete_flag = true;
    }
    void adc_e_double_trigger_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initialize the module. */
    err = R_ADC_E_Open(&g_adc0_ctrl, &g_adc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Enable double-trigger channel. */
    err = R_ADC_E_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);
    handle_error(err);
    /* Enable scan triggering from ELC events. */
    (void) R_ADC_E_ScanStart(&g_adc0_ctrl);
    /* Wait for conversion to complete. Two scans must be triggered before a callback occurs. */
    scan_complete_flag = false;
    while (!scan_complete_flag)
    {
    /* Wait for callback to set flag. */
    }
    /* Read converted data from both scans. */
    uint16_t channel1_conversion_result_0;
    uint16_t channel1_conversion_result_1;
    err = R_ADC_E_Read(&g_adc0_ctrl, ADC_CHANNEL_1, &channel1_conversion_result_0);
    handle_error(err);
    err = R_ADC_E_Read(&g_adc0_ctrl, ADC_CHANNEL_DUPLEX, &channel1_conversion_result_1);
    handle_error(err);
    }

    Window Compare Example

    +

    This example shows how to configure the window compare function at runtime as well as how to handle events and obtain comparison results through a callback.

    +
    adc_e_window_cfg_t g_adc0_window_cfg =
    {
    /* Enable Window A and Window B; enable Window mode */
    .compare_cfg =
    (adc_e_compare_cfg_t) (ADC_E_COMPARE_CFG_A_ENABLE | ADC_E_COMPARE_CFG_B_ENABLE | ADC_E_COMPARE_CFG_WINDOW_ENABLE),
    /* Compare scan values from Channels 0 and 1 */
    .compare_mask = ADC_E_MASK_CHANNEL_0 | ADC_E_MASK_CHANNEL_1,
    /* Set Channel 1 condition to be inside the window instead of outside */
    .compare_mode_mask = ADC_E_MASK_CHANNEL_1,
    /* Set reference voltage levels for Window A */
    .compare_ref_low = ADC_SCAN_MAX / 3,
    .compare_ref_high = ADC_SCAN_MAX * 2 / 3,
    /* Configure Window B to compare Channel 2 (inside window) */
    .compare_b_channel = ADC_E_WINDOW_B_CHANNEL_2,
    .compare_b_mode = ADC_E_WINDOW_B_MODE_GREATER_THAN_OR_INSIDE,
    /* Set reference voltage levels for Window B */
    .compare_b_ref_low = ADC_SCAN_MAX / 4,
    .compare_b_ref_high = ADC_SCAN_MAX * 3 / 4,
    };
    void adc_e_window_callback (adc_callback_args_t * p_args)
    {
    if (ADC_EVENT_WINDOW_COMPARE_A == p_args->event)
    {
    /* Get channel that met the comparison criteria */
    adc_channel_t channel = p_args->channel;
    /* Process event here */
    FSP_PARAMETER_NOT_USED(channel);
    }
    else if (ADC_EVENT_WINDOW_COMPARE_B == p_args->event)
    {
    /* Process Window B events here */
    }
    else
    {
    /* ... */
    }
    }
    void adc_e_window_compare_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Open the ADC module */
    err = R_ADC_E_Open(&g_adc0_ctrl, &g_adc0_cfg);
    assert(FSP_SUCCESS == err);
    /* Set the window compare configuration in the channel config */
    g_adc0_channel_runtime_cfg.p_window_cfg = &g_adc0_window_cfg;
    /* The window compare function is configured as part of the scan configuration */
    err = R_ADC_E_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_runtime_cfg);
    assert(FSP_SUCCESS == err);
    /* Main program loop - scan the ADC every second */
    while (1)
    {
    /* Start a scan */
    err = R_ADC_E_ScanStart(&g_adc0_ctrl);
    assert(FSP_SUCCESS == err);
    /* Delay; any compare events will be handled by the callback */
    R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_SECONDS);
    }
    }
    + + + + + + + + + +

    +Data Structures

    struct  adc_e_extended_cfg_t
     
    struct  adc_e_window_cfg_t
     
    struct  adc_e_channel_cfg_t
     
    struct  adc_e_instance_ctrl_t
     
    + + + + + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  adc_e_mask_t
     
    enum  adc_e_add_t
     
    enum  adc_e_clear_t
     
    enum  adc_e_grpa_t
     
    enum  adc_e_active_trigger_t
     
    enum  adc_e_double_trigger_t
     
    enum  adc_e_compare_cfg_t
     
    enum  adc_e_window_b_channel_t
     
    enum  adc_e_window_b_mode_t
     
    enum  adc_e_elc_t
     
    +

    Data Structure Documentation

    + +

    ◆ adc_e_extended_cfg_t

    + +
    +
    + + + + +
    struct adc_e_extended_cfg_t
    +
    +

    Extended configuration structure for ADC.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +adc_e_add_t +add_average_count +Add or average samples.
    +adc_e_clear_t +clearing +Clear after read.
    +adc_trigger_t +trigger_group_b +Group B trigger source; valid only for group mode.
    +adc_e_double_trigger_t +double_trigger_mode +Double-trigger mode setting.
    +adc_e_active_trigger_t +adc_start_trigger_a +A/D Conversion Start Trigger Group A.
    +adc_e_active_trigger_t +adc_start_trigger_b +A/D Conversion Start Trigger Group B.
    +bool +adc_start_trigger_c_enabled +Set to true to enable Group C, false to disable Group C.
    +adc_e_active_trigger_t +adc_start_trigger_c +A/D Conversion Start Trigger Group C.
    +adc_e_elc_t +adc_elc_ctrl +A/D Event Link Control.
    +IRQn_Type +window_a_irq +IRQ number for Window Compare A interrupts.
    +IRQn_Type +window_b_irq +IRQ number for Window Compare B interrupts.
    +uint8_t +window_a_ipl +Priority for Window Compare A interrupts.
    +uint8_t +window_b_ipl +Priority for Window Compare B interrupts.
    + +
    +
    + +

    ◆ adc_e_window_cfg_t

    + +
    +
    + + + + +
    struct adc_e_window_cfg_t
    +
    +

    ADC Window Compare configuration

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +compare_mask +Channel mask to compare with Window A.
    +uint32_t +compare_mode_mask +Per-channel condition mask for Window A.
    +adc_e_compare_cfg_t +compare_cfg +Window Compare configuration.
    +uint16_t +compare_ref_low +Window A lower reference value.
    +uint16_t +compare_ref_high +Window A upper reference value.
    +uint16_t +compare_b_ref_low +Window B lower reference value.
    +uint16_t +compare_b_ref_high +Window A upper reference value.
    +adc_e_window_b_channel_t +compare_b_channel +Window B channel.
    +adc_e_window_b_mode_t +compare_b_mode +Window B condition setting.
    + +
    +
    + +

    ◆ adc_e_channel_cfg_t

    + +
    +
    + + + + +
    struct adc_e_channel_cfg_t
    +
    +

    ADC channel(s) configuration

    +
    + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +scan_mask +Channels/bits: bit 0 is ch0; bit 15 is ch15.
    +uint32_t +scan_mask_group_b +Valid for group modes.
    +uint32_t +scan_mask_group_c +Valid for group modes.
    +uint32_t +add_mask +Valid if add enabled in Open().
    +adc_e_window_cfg_t * +p_window_cfg +Pointer to Window Compare configuration.
    +adc_e_grpa_t +priority_group_a +Valid for group modes.
    + +
    +
    + +

    ◆ adc_e_instance_ctrl_t

    + +
    +
    + + + + +
    struct adc_e_instance_ctrl_t
    +
    +

    ADC instance control block. DO NOT INITIALIZE. Initialized in adc_api_t::open().

    +
    +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ adc_e_mask_t

    + +
    +
    + + + + +
    enum adc_e_mask_t
    +
    +

    For ADC Scan configuration adc_channel_cfg_t::scan_mask, adc_channel_cfg_t::scan_mask_group_b, adc_channel_cfg_t::add_mask and adc_channel_cfg_t::sample_hold_mask. Use bitwise OR to combine these masks for desired channels and sensors.

    + + + + + + + + + + +
    Enumerator
    ADC_E_MASK_OFF 

    No channels selected.

    +
    ADC_E_MASK_CHANNEL_0 

    Channel 0 mask.

    +
    ADC_E_MASK_CHANNEL_1 

    Channel 1 mask.

    +
    ADC_E_MASK_CHANNEL_2 

    Channel 2 mask.

    +
    ADC_E_MASK_CHANNEL_3 

    Channel 3 mask.

    +
    ADC_E_MASK_CHANNEL_4 

    Channel 4 mask.

    +
    ADC_E_MASK_CHANNEL_5 

    Channel 5 mask.

    +
    ADC_E_MASK_CHANNEL_6 

    Channel 6 mask.

    +
    ADC_E_MASK_CHANNEL_7 

    Channel 7 mask.

    +
    + +
    +
    + +

    ◆ adc_e_add_t

    + +
    +
    + + + + +
    enum adc_e_add_t
    +
    +

    ADC data sample addition and averaging options

    + + + + + + + + +
    Enumerator
    ADC_E_ADD_OFF 

    Addition turned off for channels/sensors.

    +
    ADC_E_ADD_TWO 

    Add two samples.

    +
    ADC_E_ADD_THREE 

    Add three samples.

    +
    ADC_E_ADD_FOUR 

    Add four samples.

    +
    ADC_E_ADD_SIXTEEN 

    Add sixteen samples.

    +
    ADC_E_ADD_AVERAGE_TWO 

    Average two samples.

    +
    ADC_E_ADD_AVERAGE_FOUR 

    Average four samples.

    +
    + +
    +
    + +

    ◆ adc_e_clear_t

    + +
    +
    + + + + +
    enum adc_e_clear_t
    +
    +

    ADC clear after read definitions

    + + + +
    Enumerator
    ADC_E_CLEAR_AFTER_READ_OFF 

    Clear after read off.

    +
    ADC_E_CLEAR_AFTER_READ_ON 

    Clear after read on.

    +
    + +
    +
    + +

    ◆ adc_e_grpa_t

    + +
    +
    + + + + +
    enum adc_e_grpa_t
    +
    +

    ADC action for group A interrupts group B scan. This enumeration is used to specify the priority between Group A and B in group mode.

    + + + + + + + + +
    Enumerator
    ADC_E_GRPA_PRIORITY_OFF 

    Group A ignored and does not interrupt Group B and Group C.

    +
    ADC_E_GRPA_GRPB_GRPC_WAIT_TRIG 

    Group B and Group C restart at next trigger.

    +
    ADC_E_GRPA_GRPB_GRPC_TOP_RESTART_SCAN 

    Group B and Group C restart immediately and scans from the head of the channel.

    +
    ADC_E_GRPA_GRPB_GRPC_RESTART_SCAN 

    Group B and Group C restart immediately and scans.

    +
    ADC_E_GRPA_GRPB_GRPC_TOP_CONT_SCAN 

    Group B and Group C restart and scans continuously from the head of the channel.

    +
    ADC_E_GRPA_GRPB_GRPC_RESTART_TOP_CONT_SCAN 

    Group B and Group C restart immediately and scans continuously from the head of the channel.

    +
    ADC_E_GRPA_GRPB_GRPC_RESTART_CONT_SCAN 

    Group B and Group C restart immediately and scans continuously.

    +
    + +
    +
    + +

    ◆ adc_e_active_trigger_t

    + +
    +
    + + + + +
    enum adc_e_active_trigger_t
    +
    +

    Defines the registers settings for the ADC trigger.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    ADC_E_ACTIVE_TRIGGER_EXTERNAL 

    Input pin for the trigger.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA0N 

    Compare match with GPT00.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB0N 

    Compare match with GPT00.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA1N 

    Compare match with GPT01.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB1N 

    Compare match with GPT01.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA2N 

    Compare match with GPT02.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB2N 

    Compare match with GPT02.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA3N 

    Compare match with GPT03.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB3N 

    Compare match with GPT03.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA4N 

    Compare match with GPT04.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB4N 

    Compare match with GPT04.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA5N 

    Compare match with GPT05.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB5N 

    Compare match with GPT05.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA6N 

    Compare match with GPT06.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB6N 

    Compare match with GPT06.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA7N 

    Compare match with GPT07.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB7N 

    Compare match with GPT07.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA8N 

    Compare match with GPT08.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB8N 

    Compare match with GPT08.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA9N 

    Compare match with GPT09.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB9N 

    Compare match with GPT09.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA10N 

    Compare match with GPT10.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB10N 

    Compare match with GPT10.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA11N 

    Compare match with GPT11.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB11N 

    Compare match with GPT11.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA12N 

    Compare match with GPT12.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB12N 

    Compare match with GPT12.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA13N 

    Compare match with GPT13.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB13N 

    Compare match with GPT13.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA14N 

    Compare match with GPT14.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB14N 

    Compare match with GPT14.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA15N 

    Compare match with GPT15.GTADTRA.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRB15N 

    Compare match with GPT15.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA0N_B0N 

    Compare match with GPT00.GTADTRA or Compare match with GPT00.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA1N_B1N 

    Compare match with GPT01.GTADTRA or Compare match with GPT01.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA2N_B2N 

    Compare match with GPT02.GTADTRA or Compare match with GPT02.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA3N_B3N 

    Compare match with GPT03.GTADTRA or Compare match with GPT03.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA4N_B4N 

    Compare match with GPT04.GTADTRA or Compare match with GPT04.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA5N_B5N 

    Compare match with GPT05.GTADTRA or Compare match with GPT05.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA6N_B6N 

    Compare match with GPT06.GTADTRA or Compare match with GPT06.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA7N_B7N 

    Compare match with GPT07.GTADTRA or Compare match with GPT07.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA8N_B8N 

    Compare match with GPT08.GTADTRA or Compare match with GPT08.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA9N_B9N 

    Compare match with GPT09.GTADTRA or Compare match with GPT09.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA10N_B10N 

    Compare match with GPT10.GTADTRA or Compare match with GPT10.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA11N_B11N 

    Compare match with GPT11.GTADTRA or Compare match with GPT11.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA12N_B12N 

    Compare match with GPT12.GTADTRA or Compare match with GPT12.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA13N_B13N 

    Compare match with GPT13.GTADTRA or Compare match with GPT13.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA14N_B14N 

    Compare match with GPT14.GTADTRA or Compare match with GPT14.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_GTADTRA15N_B15N 

    Compare match with GPT15.GTADTRA or Compare match with GPT15.GTADTRB.

    +
    ADC_E_ACTIVE_TRIGGER_ELCTRG0 

    ELC trigger.

    +
    ADC_E_ACTIVE_TRIGGER_DISABLED 

    Trigger source de-selection state.

    +
    + +
    +
    + +

    ◆ adc_e_double_trigger_t

    + +
    +
    + + + + +
    enum adc_e_double_trigger_t
    +
    +

    ADC double-trigger mode definitions

    + + + + +
    Enumerator
    ADC_E_DOUBLE_TRIGGER_DISABLED 

    Double-triggering disabled.

    +
    ADC_E_DOUBLE_TRIGGER_ENABLED 

    Double-triggering enabled.

    +
    ADC_E_DOUBLE_TRIGGER_ENABLED_EXTENDED 

    Double-triggering enabled on both ADC ELC events.

    +
    + +
    +
    + +

    ◆ adc_e_compare_cfg_t

    + +
    +
    + + + + +
    enum adc_e_compare_cfg_t
    +
    +

    ADC comparison settings

    + +
    +
    + +

    ◆ adc_e_window_b_channel_t

    + +
    +
    + + + + +
    enum adc_e_window_b_channel_t
    +
    +

    ADC Window B channel

    + +
    +
    + +

    ◆ adc_e_window_b_mode_t

    + +
    +
    + + + + +
    enum adc_e_window_b_mode_t
    +
    +

    ADC Window B comparison mode

    + +
    +
    + +

    ◆ adc_e_elc_t

    + +
    +
    + + + + +
    enum adc_e_elc_t
    +
    +

    AD event link control definitions.

    + + + + + +
    Enumerator
    ADC_E_ELC_GROUP_A_SCAN 

    At the end of a group_a scan GCELC = 0b, ELCC[1:0] = 00b.

    +
    ADC_E_ELC_GROUP_B_SCAN 

    At the end of a group_b scan GCELC = 0b, ELCC[1:0] = 01b.

    +
    ADC_E_ELC_GROUP_A_B_C_SCAN 

    At the end of a group_abc scan GCELC = 0b, ELCC[1:0] = 1xb.

    +
    ADC_E_ELC_GROUP_C_SCAN 

    At the end of a group_c scan GCELC = 1b, ELCC[1:0] = 00b.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_ADC_E_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_Open (adc_ctrl_t * p_ctrl,
    adc_cfg_t const *const p_cfg 
    )
    +
    +

    Sets the operational mode, trigger sources, interrupt priority, and configurations for the peripheral as a whole. If interrupt is enabled, the function registers a callback function pointer for notifying the user whenever a scan has completed.

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSModule is ready for use.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_ALREADY_OPENThe instance control structure has already been opened.
    FSP_ERR_IRQ_BSP_DISABLEDA callback is provided, but the interrupt is not enabled.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe requested unit does not exist on this MCU.
    FSP_ERR_INVALID_HW_CONDITIONThe ADC clock must be at least 1 MHz
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_ScanCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_ScanCfg (adc_ctrl_t * p_ctrl,
    void const *const p_channel_cfg 
    )
    +
    +

    Configures the ADC scan parameters. Channel specific settings are set in this function. Pass a pointer to adc_e_channel_cfg_t to p_channel_cfg.

    +
    Return values
    + + + + +
    FSP_SUCCESSChannel specific settings applied.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_InfoGet (adc_ctrl_t * p_ctrl,
    adc_info_t * p_adc_info 
    )
    +
    +

    Returns the address of the lowest number configured channel and the total number of bytes to be read in order to read the results of the configured channels. If no channels are configured, then a length of 0 is returned.

    +
    Note
    In group mode, information is returned for group A only. Calculating information for group B is not currently supported.
    +
    Return values
    + + + + +
    FSP_SUCCESSInformation stored in p_adc_info.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_ScanStart()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ADC_E_ScanStart (adc_ctrl_t * p_ctrl)
    +
    +

    Starts a software scan or enables the hardware trigger for a scan depending on how the triggers were configured in the R_ADC_E_Open call. If the unit was configured for ELC or external hardware triggering, then this function allows the trigger signal to get to the ADC unit. The function is not able to control the generation of the trigger itself. If the unit was configured for software triggering, then this function starts the software triggered scan.

    +
    Precondition
    Call R_ADC_E_ScanCfg after R_ADC_E_Open before starting a scan.
    +
    Return values
    + + + + + + +
    FSP_SUCCESSScan started (software trigger) or hardware triggers enabled.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENADC_E is not open.
    FSP_ERR_NOT_INITIALIZEDADC_E is not initialized.
    FSP_ERR_IN_USEAnother scan is still in progress (software trigger).
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_ScanGroupStart()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_ScanGroupStart (adc_ctrl_t * p_ctrl,
    adc_group_mask_t group_id 
    )
    +
    +

    adc_api_t::scanStart is not supported on the ADCH. Use scanStart instead.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_ScanStop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ADC_E_ScanStop (adc_ctrl_t * p_ctrl)
    +
    +

    Stops the software scan or disables the unit from being triggered by the hardware trigger (ELC or external) based on what type of trigger the unit was configured for in the R_ADC_E_Open function. Stopping a hardware triggered scan via this function does not abort an ongoing scan, but prevents the next scan from occurring. Stopping a software triggered scan aborts an ongoing scan.

    +
    Return values
    + + + + + +
    FSP_SUCCESSScan stopped (software trigger) or hardware triggers disabled.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_StatusGet (adc_ctrl_t * p_ctrl,
    adc_status_t * p_status 
    )
    +
    +

    Provides the status of any scan process that was started, including scans started by ELC or external triggers.

    +
    Return values
    + + + + +
    FSP_SUCCESSModule status stored in the provided pointer p_status
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_Read (adc_ctrl_t * p_ctrl,
    adc_channel_t const reg_id,
    uint16_t *const p_data 
    )
    +
    +

    Reads conversion results from a single channel or sensor.

    +
    Return values
    + + + + + +
    FSP_SUCCESSData read into provided p_data.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_Read32()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_Read32 (adc_ctrl_t * p_ctrl,
    adc_channel_t const reg_id,
    uint32_t *const p_data 
    )
    +
    +

    Reads conversion results from a single channel or sensor register into a 32-bit result.

    +
    Return values
    + + + + + +
    FSP_SUCCESSData read into provided p_data.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    FSP_ERR_NOT_INITIALIZEDUnit is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ADC_E_Close (adc_ctrl_t * p_ctrl)
    +
    +

    This function ends any scan in progress, disables interrupts, and removes power to the A/D peripheral.

    +
    Return values
    + + + + +
    FSP_SUCCESSModule closed.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_OffsetSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_OffsetSet (adc_ctrl_t *const p_ctrl,
    adc_channel_t const reg_id,
    int32_t offset 
    )
    +
    +

    adc_api_t::offsetSet is not supported on the ADC.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_Calibrate()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_Calibrate (adc_ctrl_t *const p_ctrl,
    void const * p_extend 
    )
    +
    +

    adc_api_t::calibrate is not supported on the ADC.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_ADC_E_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ADC_E_CallbackSet (adc_ctrl_t *const p_api_ctrl,
    void(*)(adc_callback_args_t *) p_callback,
    void const *const p_context,
    adc_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements adc_api_t::callbackSet

    +
    Return values
    + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    +
    +
    + +
    +
    +
    +
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"group___a_d_c___e.html#ga1e0b524d58f582130181a3772222886a", null ], + [ "R_ADC_E_OffsetSet", "group___a_d_c___e.html#ga70abfa718ea4f6fd5d14acbaf8730cbf", null ], + [ "R_ADC_E_Calibrate", "group___a_d_c___e.html#ga60b7cc39514b62e1b0ea3eabaa7c27de", null ], + [ "R_ADC_E_CallbackSet", "group___a_d_c___e.html#gaab99f6d8921a70ed3609a0d3ddabd09a", null ] +]; \ No newline at end of file diff --git a/group___b_s_p___i_o.html b/group___b_s_p___i_o.html index f9940b8..43a0cd4 100644 --- a/group___b_s_p___i_o.html +++ b/group___b_s_p___i_o.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: BSP I/O access +RZV Flexible Software Package Documentation: BSP I/O access @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | @@ -108,6 +176,26 @@   __STATIC_INLINE void R_BSP_PinAccessDisable (void)   +__STATIC_INLINE void R_BSP_OENAccessEnable (void) +  +__STATIC_INLINE void R_BSP_OENAccessDisable (void) +  +__STATIC_INLINE void R_BSP_EthernetModeCfg (bsp_ethernet_channel_t channel, bsp_ethernet_mode_t mode) +  +__STATIC_INLINE void R_BSP_SDVoltageModeCfg (bsp_sd_channel_t channel, bsp_sd_voltage_t voltage) +  +__STATIC_INLINE void R_BSP_QSPIVoltageModeCfg (bsp_qspi_voltage_t voltage) +  +__STATIC_INLINE void R_BSP_XSPIVoltageModeCfg (bsp_xspi_voltage_t voltage) +  +__STATIC_INLINE void R_BSP_EthernetVoltageModeCfg (bsp_ethernet_channel_t channel, bsp_ethernet_voltage_t voltage) +  +__STATIC_INLINE void R_BSP_I3CControlCfg (bsp_i3c_voltage_t voltage, bsp_i3c_mode_t mode) +  +__STATIC_INLINE void R_BSP_BypassModeCfg (bsp_bypass_oscillator_t oscillator, bsp_bypass_mode_t mode, bsp_bypass_freq_range_t freq_range) +  +__STATIC_INLINE void R_BSP_XSPIOutputEnableCfg (void) + 

    Detailed Description

    This module provides basic read/write access to port pins.

    @@ -122,6 +210,30 @@   enum  bsp_io_port_pin_t   +enum  bsp_sd_channel_t +  +enum  bsp_ethernet_channel_t +  +enum  bsp_sd_voltage_t +  +enum  bsp_qspi_voltage_t +  +enum  bsp_xspi_voltage_t +  +enum  bsp_ethernet_voltage_t +  +enum  bsp_i3c_voltage_t +  +enum  bsp_ethernet_mode_t +  +enum  bsp_i3c_mode_t +  +enum  bsp_bypass_oscillator_t +  +enum  bsp_bypass_mode_t +  +enum  bsp_bypass_freq_range_t + 

    Enumeration Type Documentation

    @@ -183,103 +295,103 @@

    Superset list of all possible IO ports.

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    Enumerator
    BSP_IO_PORT_00 

    IO port 0.

    +
    Enumerator
    BSP_IO_PORT_00 

    IO port 0.

    BSP_IO_PORT_01 

    IO port 1.

    +
    BSP_IO_PORT_01 

    IO port 1.

    BSP_IO_PORT_02 

    IO port 2.

    +
    BSP_IO_PORT_02 

    IO port 2.

    BSP_IO_PORT_03 

    IO port 3.

    +
    BSP_IO_PORT_03 

    IO port 3.

    BSP_IO_PORT_04 

    IO port 4.

    +
    BSP_IO_PORT_04 

    IO port 4.

    BSP_IO_PORT_05 

    IO port 5.

    +
    BSP_IO_PORT_05 

    IO port 5.

    BSP_IO_PORT_06 

    IO port 6.

    +
    BSP_IO_PORT_06 

    IO port 6.

    BSP_IO_PORT_07 

    IO port 7.

    +
    BSP_IO_PORT_07 

    IO port 7.

    BSP_IO_PORT_08 

    IO port 8.

    +
    BSP_IO_PORT_08 

    IO port 8.

    BSP_IO_PORT_09 

    IO port 9.

    +
    BSP_IO_PORT_09 

    IO port 9.

    BSP_IO_PORT_10 

    IO port 10.

    +
    BSP_IO_PORT_10 

    IO port 10.

    BSP_IO_PORT_11 

    IO port 11.

    +
    BSP_IO_PORT_11 

    IO port 11.

    BSP_IO_PORT_12 

    IO port 12.

    +
    BSP_IO_PORT_12 

    IO port 12.

    BSP_IO_PORT_13 

    IO port 13.

    +
    BSP_IO_PORT_13 

    IO port 13.

    BSP_IO_PORT_14 

    IO port 14.

    +
    BSP_IO_PORT_14 

    IO port 14.

    BSP_IO_PORT_15 

    IO port 15.

    +
    BSP_IO_PORT_15 

    IO port 15.

    BSP_IO_PORT_16 

    IO port 16.

    +
    BSP_IO_PORT_16 

    IO port 16.

    BSP_IO_PORT_17 

    IO port 17.

    +
    BSP_IO_PORT_17 

    IO port 17.

    BSP_IO_PORT_18 

    IO port 18.

    +
    BSP_IO_PORT_18 

    IO port 18.

    BSP_IO_PORT_19 

    IO port 19.

    +
    BSP_IO_PORT_19 

    IO port 19.

    BSP_IO_PORT_20 

    IO port 20.

    +
    BSP_IO_PORT_20 

    IO port 20.

    BSP_IO_PORT_21 

    IO port 21.

    +
    BSP_IO_PORT_21 

    IO port 21.

    BSP_IO_PORT_22 

    IO port 22.

    +
    BSP_IO_PORT_22 

    IO port 22.

    BSP_IO_PORT_23 

    IO port 23.

    +
    BSP_IO_PORT_23 

    IO port 23.

    BSP_IO_PORT_24 

    IO port 24.

    +
    BSP_IO_PORT_24 

    IO port 24.

    BSP_IO_PORT_25 

    IO port 25.

    +
    BSP_IO_PORT_25 

    IO port 25.

    BSP_IO_PORT_26 

    IO port 26.

    +
    BSP_IO_PORT_26 

    IO port 26.

    BSP_IO_PORT_27 

    IO port 27.

    +
    BSP_IO_PORT_27 

    IO port 27.

    BSP_IO_PORT_28 

    IO port 28.

    +
    BSP_IO_PORT_28 

    IO port 28.

    BSP_IO_PORT_29 

    IO port 29.

    +
    BSP_IO_PORT_29 

    IO port 29.

    BSP_IO_PORT_30 

    IO port 30.

    +
    BSP_IO_PORT_30 

    IO port 30.

    BSP_IO_PORT_31 

    IO port 31.

    +
    BSP_IO_PORT_31 

    IO port 31.

    BSP_IO_PORT_32 

    IO port 32.

    +
    BSP_IO_PORT_32 

    IO port 32.

    BSP_IO_PORT_33 

    IO port 33.

    +
    BSP_IO_PORT_33 

    IO port 33.

    BSP_IO_PORT_34 

    IO port 34.

    +
    BSP_IO_PORT_34 

    IO port 34.

    BSP_IO_PORT_35 

    IO port 35.

    +
    BSP_IO_PORT_35 

    IO port 35.

    BSP_IO_PORT_36 

    IO port 36.

    +
    BSP_IO_PORT_36 

    IO port 36.

    BSP_IO_PORT_37 

    IO port 37.

    +
    BSP_IO_PORT_37 

    IO port 37.

    BSP_IO_PORT_38 

    IO port 38.

    +
    BSP_IO_PORT_38 

    IO port 38.

    BSP_IO_PORT_39 

    IO port 39.

    +
    BSP_IO_PORT_39 

    IO port 39.

    BSP_IO_PORT_40 

    IO port 40.

    +
    BSP_IO_PORT_40 

    IO port 40.

    BSP_IO_PORT_41 

    IO port 41.

    +
    BSP_IO_PORT_41 

    IO port 41.

    BSP_IO_PORT_42 

    IO port 42.

    +
    BSP_IO_PORT_42 

    IO port 42.

    BSP_IO_PORT_43 

    IO port 43.

    +
    BSP_IO_PORT_43 

    IO port 43.

    BSP_IO_PORT_44 

    IO port 44.

    +
    BSP_IO_PORT_44 

    IO port 44.

    BSP_IO_PORT_45 

    IO port 45.

    +
    BSP_IO_PORT_45 

    IO port 45.

    BSP_IO_PORT_46 

    IO port 46.

    +
    BSP_IO_PORT_46 

    IO port 46.

    BSP_IO_PORT_47 

    IO port 47.

    +
    BSP_IO_PORT_47 

    IO port 47.

    BSP_IO_PORT_48 

    IO port 48.

    +
    BSP_IO_PORT_48 

    IO port 48.

    @@ -298,335 +410,599 @@

    Superset list of all possible IO port pins.

    - + + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + +
    Enumerator
    BSP_IO_PORT_00_PIN_00 

    IO port 0 pin 0.

    +
    Enumerator
    BSP_IO_PORT_00_PIN_00 

    IO port 0 pin 0.

    +
    BSP_IO_PORT_00_PIN_01 

    IO port 0 pin 1.

    +
    BSP_IO_PORT_01_PIN_00 

    IO port 1 pin 0.

    +
    BSP_IO_PORT_01_PIN_01 

    IO port 1 pin 1.

    +
    BSP_IO_PORT_02_PIN_00 

    IO port 2 pin 0.

    +
    BSP_IO_PORT_02_PIN_01 

    IO port 2 pin 1.

    +
    BSP_IO_PORT_03_PIN_00 

    IO port 3 pin 0.

    +
    BSP_IO_PORT_03_PIN_01 

    IO port 3 pin 1.

    +
    BSP_IO_PORT_04_PIN_00 

    IO port 4 pin 0.

    +
    BSP_IO_PORT_04_PIN_01 

    IO port 4 pin 1.

    +
    BSP_IO_PORT_05_PIN_00 

    IO port 5 pin 0.

    +
    BSP_IO_PORT_05_PIN_01 

    IO port 5 pin 1.

    +
    BSP_IO_PORT_05_PIN_02 

    IO port 5 pin 2.

    +
    BSP_IO_PORT_06_PIN_00 

    IO port 6 pin 0.

    +
    BSP_IO_PORT_06_PIN_01 

    IO port 6 pin 1.

    +
    BSP_IO_PORT_07_PIN_00 

    IO port 7 pin 0.

    BSP_IO_PORT_00_PIN_01 

    IO port 0 pin 1.

    +
    BSP_IO_PORT_07_PIN_01 

    IO port 7 pin 1.

    BSP_IO_PORT_01_PIN_00 

    IO port 1 pin 0.

    +
    BSP_IO_PORT_07_PIN_02 

    IO port 7 pin 2.

    BSP_IO_PORT_01_PIN_01 

    IO port 1 pin 1.

    +
    BSP_IO_PORT_08_PIN_00 

    IO port 8 pin 0.

    BSP_IO_PORT_02_PIN_00 

    IO port 2 pin 0.

    +
    BSP_IO_PORT_08_PIN_01 

    IO port 8 pin 1.

    BSP_IO_PORT_02_PIN_01 

    IO port 2 pin 1.

    +
    BSP_IO_PORT_08_PIN_02 

    IO port 8 pin 2.

    BSP_IO_PORT_03_PIN_00 

    IO port 3 pin 0.

    +
    BSP_IO_PORT_09_PIN_00 

    IO port 9 pin 0.

    BSP_IO_PORT_03_PIN_01 

    IO port 3 pin 1.

    +
    BSP_IO_PORT_09_PIN_01 

    IO port 9 pin 1.

    BSP_IO_PORT_04_PIN_00 

    IO port 4 pin 0.

    +
    BSP_IO_PORT_10_PIN_00 

    IO port 10 pin 0.

    BSP_IO_PORT_04_PIN_01 

    IO port 4 pin 1.

    +
    BSP_IO_PORT_10_PIN_01 

    IO port 10 pin 1.

    BSP_IO_PORT_05_PIN_00 

    IO port 5 pin 0.

    +
    BSP_IO_PORT_11_PIN_00 

    IO port 11 pin 0.

    BSP_IO_PORT_05_PIN_01 

    IO port 5 pin 1.

    +
    BSP_IO_PORT_11_PIN_01 

    IO port 11 pin 1.

    BSP_IO_PORT_05_PIN_02 

    IO port 5 pin 2.

    +
    BSP_IO_PORT_12_PIN_00 

    IO port 12 pin 0.

    BSP_IO_PORT_06_PIN_00 

    IO port 6 pin 0.

    +
    BSP_IO_PORT_12_PIN_01 

    IO port 12 pin 1.

    BSP_IO_PORT_06_PIN_01 

    IO port 6 pin 1.

    +
    BSP_IO_PORT_13_PIN_00 

    IO port 13 pin 0.

    BSP_IO_PORT_07_PIN_00 

    IO port 7 pin 0.

    +
    BSP_IO_PORT_13_PIN_01 

    IO port 13 pin 1.

    BSP_IO_PORT_07_PIN_01 

    IO port 7 pin 1.

    +
    BSP_IO_PORT_13_PIN_02 

    IO port 13 pin 2.

    BSP_IO_PORT_07_PIN_02 

    IO port 7 pin 2.

    +
    BSP_IO_PORT_14_PIN_00 

    IO port 14 pin 0.

    BSP_IO_PORT_08_PIN_00 

    IO port 8 pin 0.

    +
    BSP_IO_PORT_14_PIN_01 

    IO port 14 pin 1.

    BSP_IO_PORT_08_PIN_01 

    IO port 8 pin 1.

    +
    BSP_IO_PORT_15_PIN_00 

    IO port 15 pin 0.

    BSP_IO_PORT_08_PIN_02 

    IO port 8 pin 2.

    +
    BSP_IO_PORT_15_PIN_01 

    IO port 15 pin 1.

    BSP_IO_PORT_09_PIN_00 

    IO port 9 pin 0.

    +
    BSP_IO_PORT_16_PIN_00 

    IO port 16 pin 0.

    BSP_IO_PORT_09_PIN_01 

    IO port 9 pin 1.

    +
    BSP_IO_PORT_16_PIN_01 

    IO port 16 pin 1.

    BSP_IO_PORT_10_PIN_00 

    IO port 10 pin 0.

    +
    BSP_IO_PORT_17_PIN_00 

    IO port 17 pin 0.

    BSP_IO_PORT_10_PIN_01 

    IO port 10 pin 1.

    +
    BSP_IO_PORT_17_PIN_01 

    IO port 17 pin 1.

    BSP_IO_PORT_11_PIN_00 

    IO port 11 pin 0.

    +
    BSP_IO_PORT_17_PIN_02 

    IO port 17 pin 2.

    BSP_IO_PORT_11_PIN_01 

    IO port 11 pin 1.

    +
    BSP_IO_PORT_18_PIN_00 

    IO port 18 pin 0.

    BSP_IO_PORT_12_PIN_00 

    IO port 12 pin 0.

    +
    BSP_IO_PORT_18_PIN_01 

    IO port 18 pin 1.

    BSP_IO_PORT_12_PIN_01 

    IO port 12 pin 1.

    +
    BSP_IO_PORT_19_PIN_00 

    IO port 19 pin 0.

    BSP_IO_PORT_13_PIN_00 

    IO port 13 pin 0.

    +
    BSP_IO_PORT_19_PIN_01 

    IO port 19 pin 1.

    BSP_IO_PORT_13_PIN_01 

    IO port 13 pin 1.

    +
    BSP_IO_PORT_20_PIN_00 

    IO port 20 pin 0.

    BSP_IO_PORT_13_PIN_02 

    IO port 13 pin 2.

    +
    BSP_IO_PORT_20_PIN_01 

    IO port 20 pin 1.

    BSP_IO_PORT_14_PIN_00 

    IO port 14 pin 0.

    +
    BSP_IO_PORT_20_PIN_02 

    IO port 20 pin 2.

    BSP_IO_PORT_14_PIN_01 

    IO port 14 pin 1.

    +
    BSP_IO_PORT_21_PIN_00 

    IO port 21 pin 0.

    BSP_IO_PORT_15_PIN_00 

    IO port 15 pin 0.

    +
    BSP_IO_PORT_21_PIN_01 

    IO port 21 pin 1.

    BSP_IO_PORT_15_PIN_01 

    IO port 15 pin 1.

    +
    BSP_IO_PORT_22_PIN_00 

    IO port 22 pin 0.

    BSP_IO_PORT_16_PIN_00 

    IO port 16 pin 0.

    +
    BSP_IO_PORT_22_PIN_01 

    IO port 22 pin 1.

    BSP_IO_PORT_16_PIN_01 

    IO port 16 pin 1.

    +
    BSP_IO_PORT_23_PIN_00 

    IO port 23 pin 0.

    BSP_IO_PORT_17_PIN_00 

    IO port 17 pin 0.

    +
    BSP_IO_PORT_23_PIN_01 

    IO port 23 pin 1.

    BSP_IO_PORT_17_PIN_01 

    IO port 17 pin 1.

    +
    BSP_IO_PORT_24_PIN_00 

    IO port 24 pin 0.

    BSP_IO_PORT_17_PIN_02 

    IO port 17 pin 2.

    +
    BSP_IO_PORT_24_PIN_01 

    IO port 24 pin 1.

    BSP_IO_PORT_18_PIN_00 

    IO port 18 pin 0.

    +
    BSP_IO_PORT_25_PIN_00 

    IO port 25 pin 0.

    BSP_IO_PORT_18_PIN_01 

    IO port 18 pin 1.

    +
    BSP_IO_PORT_25_PIN_01 

    IO port 25 pin 1.

    BSP_IO_PORT_19_PIN_00 

    IO port 19 pin 0.

    +
    BSP_IO_PORT_26_PIN_00 

    IO port 26 pin 0.

    BSP_IO_PORT_19_PIN_01 

    IO port 19 pin 1.

    +
    BSP_IO_PORT_26_PIN_01 

    IO port 26 pin 1.

    BSP_IO_PORT_20_PIN_00 

    IO port 20 pin 0.

    +
    BSP_IO_PORT_27_PIN_00 

    IO port 27 pin 0.

    BSP_IO_PORT_20_PIN_01 

    IO port 20 pin 1.

    +
    BSP_IO_PORT_27_PIN_01 

    IO port 27 pin 1.

    BSP_IO_PORT_20_PIN_02 

    IO port 20 pin 2.

    +
    BSP_IO_PORT_28_PIN_00 

    IO port 28 pin 0.

    BSP_IO_PORT_21_PIN_00 

    IO port 21 pin 0.

    +
    BSP_IO_PORT_28_PIN_01 

    IO port 28 pin 1.

    BSP_IO_PORT_21_PIN_01 

    IO port 21 pin 1.

    +
    BSP_IO_PORT_29_PIN_00 

    IO port 29 pin 0.

    BSP_IO_PORT_22_PIN_00 

    IO port 22 pin 0.

    +
    BSP_IO_PORT_29_PIN_01 

    IO port 29 pin 1.

    BSP_IO_PORT_22_PIN_01 

    IO port 22 pin 1.

    +
    BSP_IO_PORT_30_PIN_00 

    IO port 30 pin 0.

    BSP_IO_PORT_23_PIN_00 

    IO port 23 pin 0.

    +
    BSP_IO_PORT_30_PIN_01 

    IO port 30 pin 1.

    BSP_IO_PORT_23_PIN_01 

    IO port 23 pin 1.

    +
    BSP_IO_PORT_31_PIN_00 

    IO port 31 pin 0.

    BSP_IO_PORT_24_PIN_00 

    IO port 24 pin 0.

    +
    BSP_IO_PORT_31_PIN_01 

    IO port 31 pin 1.

    BSP_IO_PORT_24_PIN_01 

    IO port 24 pin 1.

    +
    BSP_IO_PORT_32_PIN_00 

    IO port 32 pin 0.

    BSP_IO_PORT_25_PIN_00 

    IO port 25 pin 0.

    +
    BSP_IO_PORT_32_PIN_01 

    IO port 32 pin 1.

    BSP_IO_PORT_25_PIN_01 

    IO port 25 pin 1.

    +
    BSP_IO_PORT_33_PIN_00 

    IO port 33 pin 0.

    BSP_IO_PORT_26_PIN_00 

    IO port 26 pin 0.

    +
    BSP_IO_PORT_33_PIN_01 

    IO port 33 pin 1.

    BSP_IO_PORT_26_PIN_01 

    IO port 26 pin 1.

    +
    BSP_IO_PORT_34_PIN_00 

    IO port 34 pin 0.

    BSP_IO_PORT_27_PIN_00 

    IO port 27 pin 0.

    +
    BSP_IO_PORT_34_PIN_01 

    IO port 34 pin 1.

    BSP_IO_PORT_27_PIN_01 

    IO port 27 pin 1.

    +
    BSP_IO_PORT_35_PIN_00 

    IO port 35 pin 0.

    BSP_IO_PORT_28_PIN_00 

    IO port 28 pin 0.

    +
    BSP_IO_PORT_35_PIN_01 

    IO port 35 pin 1.

    BSP_IO_PORT_28_PIN_01 

    IO port 28 pin 1.

    +
    BSP_IO_PORT_36_PIN_00 

    IO port 36 pin 0.

    BSP_IO_PORT_29_PIN_00 

    IO port 29 pin 0.

    +
    BSP_IO_PORT_36_PIN_01 

    IO port 36 pin 1.

    BSP_IO_PORT_29_PIN_01 

    IO port 29 pin 1.

    +
    BSP_IO_PORT_37_PIN_00 

    IO port 37 pin 0.

    BSP_IO_PORT_30_PIN_00 

    IO port 30 pin 0.

    +
    BSP_IO_PORT_37_PIN_01 

    IO port 37 pin 1.

    BSP_IO_PORT_30_PIN_01 

    IO port 30 pin 1.

    +
    BSP_IO_PORT_37_PIN_02 

    IO port 37 pin 2.

    BSP_IO_PORT_31_PIN_00 

    IO port 31 pin 0.

    +
    BSP_IO_PORT_38_PIN_00 

    IO port 38 pin 0.

    BSP_IO_PORT_31_PIN_01 

    IO port 31 pin 1.

    +
    BSP_IO_PORT_38_PIN_01 

    IO port 38 pin 1.

    BSP_IO_PORT_32_PIN_00 

    IO port 32 pin 0.

    +
    BSP_IO_PORT_39_PIN_00 

    IO port 39 pin 0.

    BSP_IO_PORT_32_PIN_01 

    IO port 32 pin 1.

    +
    BSP_IO_PORT_39_PIN_01 

    IO port 39 pin 1.

    BSP_IO_PORT_33_PIN_00 

    IO port 33 pin 0.

    +
    BSP_IO_PORT_39_PIN_02 

    IO port 39 pin 2.

    BSP_IO_PORT_33_PIN_01 

    IO port 33 pin 1.

    +
    BSP_IO_PORT_40_PIN_00 

    IO port 40 pin 0.

    BSP_IO_PORT_34_PIN_00 

    IO port 34 pin 0.

    +
    BSP_IO_PORT_40_PIN_01 

    IO port 40 pin 1.

    BSP_IO_PORT_34_PIN_01 

    IO port 34 pin 1.

    +
    BSP_IO_PORT_40_PIN_02 

    IO port 40 pin 2.

    BSP_IO_PORT_35_PIN_00 

    IO port 35 pin 0.

    +
    BSP_IO_PORT_41_PIN_00 

    IO port 41 pin 0.

    BSP_IO_PORT_35_PIN_01 

    IO port 35 pin 1.

    +
    BSP_IO_PORT_41_PIN_01 

    IO port 41 pin 1.

    BSP_IO_PORT_36_PIN_00 

    IO port 36 pin 0.

    +
    BSP_IO_PORT_42_PIN_00 

    IO port 42 pin 0.

    BSP_IO_PORT_36_PIN_01 

    IO port 36 pin 1.

    +
    BSP_IO_PORT_42_PIN_01 

    IO port 42 pin 1.

    BSP_IO_PORT_37_PIN_00 

    IO port 37 pin 0.

    +
    BSP_IO_PORT_42_PIN_02 

    IO port 42 pin 2.

    BSP_IO_PORT_37_PIN_01 

    IO port 37 pin 1.

    +
    BSP_IO_PORT_42_PIN_03 

    IO port 42 pin 3.

    BSP_IO_PORT_37_PIN_02 

    IO port 37 pin 2.

    +
    BSP_IO_PORT_42_PIN_04 

    IO port 42 pin 4.

    BSP_IO_PORT_38_PIN_00 

    IO port 38 pin 0.

    +
    BSP_IO_PORT_43_PIN_00 

    IO port 43 pin 0.

    BSP_IO_PORT_38_PIN_01 

    IO port 38 pin 1.

    +
    BSP_IO_PORT_43_PIN_01 

    IO port 43 pin 1.

    BSP_IO_PORT_39_PIN_00 

    IO port 39 pin 0.

    +
    BSP_IO_PORT_43_PIN_02 

    IO port 43 pin 2.

    BSP_IO_PORT_39_PIN_01 

    IO port 39 pin 1.

    +
    BSP_IO_PORT_43_PIN_03 

    IO port 43 pin 3.

    BSP_IO_PORT_39_PIN_02 

    IO port 39 pin 2.

    +
    BSP_IO_PORT_44_PIN_00 

    IO port 44 pin 0.

    BSP_IO_PORT_40_PIN_00 

    IO port 40 pin 0.

    +
    BSP_IO_PORT_44_PIN_01 

    IO port 44 pin 1.

    BSP_IO_PORT_40_PIN_01 

    IO port 40 pin 1.

    +
    BSP_IO_PORT_44_PIN_02 

    IO port 44 pin 2.

    BSP_IO_PORT_40_PIN_02 

    IO port 40 pin 2.

    +
    BSP_IO_PORT_44_PIN_03 

    IO port 44 pin 3.

    BSP_IO_PORT_41_PIN_00 

    IO port 41 pin 0.

    +
    BSP_IO_PORT_45_PIN_00 

    IO port 45 pin 0.

    BSP_IO_PORT_41_PIN_01 

    IO port 41 pin 1.

    +
    BSP_IO_PORT_45_PIN_01 

    IO port 45 pin 1.

    BSP_IO_PORT_42_PIN_00 

    IO port 42 pin 0.

    +
    BSP_IO_PORT_45_PIN_02 

    IO port 45 pin 2.

    BSP_IO_PORT_42_PIN_01 

    IO port 42 pin 1.

    +
    BSP_IO_PORT_45_PIN_03 

    IO port 45 pin 3.

    BSP_IO_PORT_42_PIN_02 

    IO port 42 pin 2.

    +
    BSP_IO_PORT_46_PIN_00 

    IO port 46 pin 0.

    BSP_IO_PORT_42_PIN_03 

    IO port 42 pin 3.

    +
    BSP_IO_PORT_46_PIN_01 

    IO port 46 pin 1.

    BSP_IO_PORT_42_PIN_04 

    IO port 42 pin 4.

    +
    BSP_IO_PORT_46_PIN_02 

    IO port 46 pin 2.

    BSP_IO_PORT_43_PIN_00 

    IO port 43 pin 0.

    +
    BSP_IO_PORT_46_PIN_03 

    IO port 46 pin 3.

    BSP_IO_PORT_43_PIN_01 

    IO port 43 pin 1.

    +
    BSP_IO_PORT_47_PIN_00 

    IO port 47 pin 0.

    BSP_IO_PORT_43_PIN_02 

    IO port 43 pin 2.

    +
    BSP_IO_PORT_47_PIN_01 

    IO port 47 pin 1.

    BSP_IO_PORT_43_PIN_03 

    IO port 43 pin 3.

    +
    BSP_IO_PORT_47_PIN_02 

    IO port 47 pin 2.

    BSP_IO_PORT_44_PIN_00 

    IO port 44 pin 0.

    +
    BSP_IO_PORT_47_PIN_03 

    IO port 47 pin 3.

    BSP_IO_PORT_44_PIN_01 

    IO port 44 pin 1.

    +
    BSP_IO_PORT_48_PIN_00 

    IO port 48 pin 0.

    BSP_IO_PORT_44_PIN_02 

    IO port 44 pin 2.

    +
    BSP_IO_PORT_48_PIN_01 

    IO port 48 pin 1.

    BSP_IO_PORT_44_PIN_03 

    IO port 44 pin 3.

    +
    BSP_IO_PORT_48_PIN_02 

    IO port 48 pin 2.

    BSP_IO_PORT_45_PIN_00 

    IO port 45 pin 0.

    +
    BSP_IO_PORT_48_PIN_03 

    IO port 48 pin 3.

    BSP_IO_PORT_45_PIN_01 

    IO port 45 pin 1.

    +
    BSP_IO_PORT_48_PIN_04 

    IO port 48 pin 4.

    BSP_IO_PORT_45_PIN_02 

    IO port 45 pin 2.

    +
    BSP_IO_NMI 

    NMI.

    BSP_IO_PORT_45_PIN_03 

    IO port 45 pin 3.

    +
    BSP_IO_TMS_SWDIO 

    TMS_SWDIO.

    BSP_IO_PORT_46_PIN_00 

    IO port 46 pin 0.

    +
    BSP_IO_TDO 

    TDO.

    BSP_IO_PORT_46_PIN_01 

    IO port 46 pin 1.

    +
    BSP_IO_AUDIO_CLK1 

    AUDIO_CLK1.

    BSP_IO_PORT_46_PIN_02 

    IO port 46 pin 2.

    +
    BSP_IO_AUDIO_CLK2 

    AUDIO_CLK2.

    BSP_IO_PORT_46_PIN_03 

    IO port 46 pin 3.

    +
    BSP_IO_SD0_CLK 

    SD0_CLK.

    BSP_IO_PORT_47_PIN_00 

    IO port 47 pin 0.

    +
    BSP_IO_SD0_CMD 

    SD0_CMD.

    BSP_IO_PORT_47_PIN_01 

    IO port 47 pin 1.

    +
    BSP_IO_SD0_RST_N 

    SD0_RST_N.

    BSP_IO_PORT_47_PIN_02 

    IO port 47 pin 2.

    +
    BSP_IO_SD0_DATA0 

    SD0_DATA0.

    BSP_IO_PORT_47_PIN_03 

    IO port 47 pin 3.

    +
    BSP_IO_SD0_DATA1 

    SD0_DATA1.

    BSP_IO_PORT_48_PIN_00 

    IO port 48 pin 0.

    +
    BSP_IO_SD0_DATA2 

    SD0_DATA2.

    BSP_IO_PORT_48_PIN_01 

    IO port 48 pin 1.

    +
    BSP_IO_SD0_DATA3 

    SD0_DATA3.

    BSP_IO_PORT_48_PIN_02 

    IO port 48 pin 2.

    +
    BSP_IO_SD0_DATA4 

    SD0_DATA4.

    BSP_IO_PORT_48_PIN_03 

    IO port 48 pin 3.

    +
    BSP_IO_SD0_DATA5 

    SD0_DATA5.

    BSP_IO_PORT_48_PIN_04 

    IO port 48 pin 4.

    +
    BSP_IO_SD0_DATA6 

    SD0_DATA6.

    BSP_IO_NMI 

    NMI.

    +
    BSP_IO_SD0_DATA7 

    SD0_DATA7.

    BSP_IO_TMS_SWDIO 

    TMS_SWDIO.

    +
    BSP_IO_SD1_CLK 

    SD1_CLK.

    BSP_IO_TDO 

    TDO.

    +
    BSP_IO_SD1_CMD 

    SD1_CMD.

    BSP_IO_AUDIO_CLK1 

    AUDIO_CLK1.

    +
    BSP_IO_SD1_DATA0 

    SD1_DATA0.

    BSP_IO_AUDIO_CLK2 

    AUDIO_CLK2.

    +
    BSP_IO_SD1_DATA1 

    SD1_DATA1.

    BSP_IO_SD0_CLK 

    CD0_CLK.

    +
    BSP_IO_SD1_DATA2 

    SD1_DATA2.

    BSP_IO_SD0_CMD 

    CD0_CMD.

    +
    BSP_IO_SD1_DATA3 

    SD1_DATA3.

    BSP_IO_SD0_RST_N 

    CD0_RST_N.

    +
    BSP_IO_QSPI0_SPCLK 

    QSPI0_SPCLK.

    BSP_IO_SD0_DATA0 

    SD0_DATA0.

    +
    BSP_IO_QSPI0_IO0 

    QSPI0_IO0.

    BSP_IO_SD0_DATA1 

    SD0_DATA1.

    +
    BSP_IO_QSPI0_IO1 

    QSPI0_IO1.

    BSP_IO_SD0_DATA2 

    SD0_DATA2.

    +
    BSP_IO_QSPI0_IO2 

    QSPI0_IO2.

    BSP_IO_SD0_DATA3 

    SD0_DATA3.

    +
    BSP_IO_QSPI0_IO3 

    QSPI0_IO3.

    BSP_IO_SD0_DATA4 

    SD0_DATA4.

    +
    BSP_IO_QSPI0_SSL 

    QSPI0_SSL.

    BSP_IO_SD0_DATA5 

    SD0_DATA5.

    +
    BSP_IO_QSPI1_SPCLK 

    QSPI1_SPCLK.

    BSP_IO_SD0_DATA6 

    SD0_DATA6.

    +
    BSP_IO_QSPI1_IO0 

    QSPI1_IO0.

    BSP_IO_SD0_DATA7 

    SD0_DATA7.

    +
    BSP_IO_QSPI1_IO1 

    QSPI1_IO1.

    BSP_IO_SD1_CLK 

    SD1_CLK.

    +
    BSP_IO_QSPI1_IO2 

    QSPI1_IO2.

    +
    BSP_IO_QSPI1_IO3 

    QSPI1_IO3.

    +
    BSP_IO_QSPI1_SSL 

    QSPI1_SSL.

    +
    BSP_IO_QSPI_RESET_N 

    QSPI_RESET_N.

    +
    BSP_IO_QSPI_WP_N 

    QSPI_WP_N.

    +
    BSP_IO_QSPI_INT_N 

    QSPI_INT_N.

    +
    BSP_IO_WDTOVF_PERROUT_N 

    WDTOVF_PERROUT_N.

    +
    BSP_IO_RIIC0_SDA 

    RIIC0_SDA.

    +
    BSP_IO_RIIC0_SCL 

    RIIC0_SCL.

    +
    BSP_IO_RIIC1_SDA 

    RIIC1_SDA.

    +
    BSP_IO_RIIC1_SCL 

    RIIC1_SCL.

    +
    + +

    +
    + +

    ◆ bsp_sd_channel_t

    + +
    +
    + + + + +
    enum bsp_sd_channel_t
    +
    +

    Superset of SD channels.

    + + - -
    Enumerator
    BSP_SD_CHANNEL_0 

    Used to select SD channel 0.

    BSP_IO_SD1_CMD 

    SD1_CMD.

    +
    BSP_SD_CHANNEL_1 

    Used to select SD channel 1.

    BSP_IO_SD1_DATA0 

    SD1_DATA0.

    +
    + +
    +
    + +

    ◆ bsp_ethernet_channel_t

    + +
    +
    + + + + +
    enum bsp_ethernet_channel_t
    +
    +

    Superset of Ethernet channels.

    + + - -
    Enumerator
    BSP_ETHERNET_CHANNEL_0 

    Used to select Ethernet channel 0.

    BSP_IO_SD1_DATA1 

    SD1_DATA1.

    +
    BSP_ETHERNET_CHANNEL_1 

    Used to select Ethernet channel 1.

    BSP_IO_SD1_DATA2 

    SD1_DATA2.

    +
    + +
    +
    + +

    ◆ bsp_sd_voltage_t

    + +
    +
    + + + + +
    enum bsp_sd_voltage_t
    +
    +

    Superset of SD voltages.

    + + - -
    Enumerator
    BSP_SD_VOLTAGE_33 

    SD voltage set to 3.3V.

    BSP_IO_SD1_DATA3 

    SD1_DATA3.

    +
    BSP_SD_VOLTAGE_18 

    SD voltage set to 1.8V.

    BSP_IO_QSPI0_SPCLK 

    QSPI0_SPCLK.

    +
    + +
    +
    + +

    ◆ bsp_qspi_voltage_t

    + +
    +
    + + + + +
    enum bsp_qspi_voltage_t
    +
    +

    Superset of QSPI voltages.

    + + - -
    Enumerator
    BSP_QSPI_VOLTAGE_33 

    QSPI voltage set to 3.3V.

    BSP_IO_QSPI0_IO0 

    QSPI0_IO0.

    +
    BSP_QSPI_VOLTAGE_18 

    QSPI voltage set to 1.8V.

    BSP_IO_QSPI0_IO1 

    QSPI0_IO1.

    +
    + +
    +
    + +

    ◆ bsp_xspi_voltage_t

    + +
    +
    + + + + +
    enum bsp_xspi_voltage_t
    +
    +

    Superset of XSPI voltages.

    + + - - -
    Enumerator
    BSP_XSPI_VOLTAGE_33 

    XSPI voltage set to 3.3V.

    BSP_IO_QSPI0_IO2 

    QSPI0_IO2.

    +
    BSP_XSPI_VOLTAGE_18 

    XSPI voltage set to 1.8V.

    BSP_IO_QSPI0_IO3 

    QSPI0_IO3.

    +
    BSP_XSPI_VOLTAGE_25 

    XSPI voltage set to 2.5V.

    BSP_IO_QSPI0_SSL 

    QSPI0_SSL.

    +
    + +
    +
    + +

    ◆ bsp_ethernet_voltage_t

    + +
    +
    + + + + +
    enum bsp_ethernet_voltage_t
    +
    +

    Superset of Ethernet voltages.

    + + - - -
    Enumerator
    BSP_ETHERNET_VOLTAGE_33 

    Ethernet voltage set to 3.3V.

    BSP_IO_QSPI1_SPCLK 

    QSPI1_SPCLK.

    +
    BSP_ETHERNET_VOLTAGE_18 

    Ethernet voltage set to 1.8V.

    BSP_IO_QSPI1_IO0 

    QSPI1_IO0.

    +
    BSP_ETHERNET_VOLTAGE_25 

    Ethernet voltage set to 2.5V.

    BSP_IO_QSPI1_IO1 

    QSPI1_IO1.

    +
    + +
    +
    + +

    ◆ bsp_i3c_voltage_t

    + +
    +
    + + + + +
    enum bsp_i3c_voltage_t
    +
    +

    Superset of I3C voltages.

    + + - -
    Enumerator
    BSP_I3C_VOLTAGE_18 

    I3C voltage set to 1.8V.

    BSP_IO_QSPI1_IO2 

    QSPI1_IO2.

    +
    BSP_I3C_VOLTAGE_12 

    I3C voltage set to 1.2V.

    BSP_IO_QSPI1_IO3 

    QSPI1_IO3.

    +
    + +
    +
    + +

    ◆ bsp_ethernet_mode_t

    + +
    +
    + + + + +
    enum bsp_ethernet_mode_t
    +
    +

    Superset of Ethernet PHY modes.

    + + - -
    Enumerator
    BSP_ETHERNET_MODE_RMII 

    Ethernet PHY mode set to RMII.

    BSP_IO_QSPI1_SSL 

    QSPI1_SSL.

    +
    BSP_ETHERNET_MODE_MII 

    Ethernet PHY mode set to MII.

    BSP_IO_QSPI_RESET_N 

    QSPI_RESET_N.

    +
    + +
    +
    + +

    ◆ bsp_i3c_mode_t

    + +
    +
    + + + + +
    enum bsp_i3c_mode_t
    +
    +

    Superset of Standby modes for I3C.

    + + - -
    Enumerator
    BSP_I3C_MODE_STB 

    Standby mode set to Standby mode.

    BSP_IO_QSPI_WP_N 

    QSPI_WP_N.

    +
    BSP_I3C_MODE_NOR 

    Standby mode set to Normal mode.

    BSP_IO_QSPI_INT_N 

    QSPI_INT_N.

    +
    + +
    +
    + +

    ◆ bsp_bypass_oscillator_t

    + +
    +
    + + + + +
    enum bsp_bypass_oscillator_t
    +
    +

    Superset of oscillator for bypass mode.

    + + - - -
    Enumerator
    BSP_BYPASS_OSCILLATOR_RTC 

    Oscillator set to RTC.

    BSP_IO_WDTOVF_PERROUT_N 

    WDTOVF_PERROUT_N.

    +
    BSP_BYPASS_OSCILLATOR_AUDIO 

    Oscillator set to Audio.

    BSP_IO_RIIC0_SDA 

    RIIC0_SDA.

    +
    BSP_BYPASS_OSCILLATOR_EMCLK 

    Oscillator set to EMCLK.

    BSP_IO_RIIC0_SCL 

    RIIC0_SCL.

    +
    + +
    +
    + +

    ◆ bsp_bypass_mode_t

    + +
    +
    + + + + +
    enum bsp_bypass_mode_t
    +
    +

    Superset of bypass modes.

    + + - - +
    Enumerator
    BSP_BYPASS_MODE_CRYSTAL_OSC 

    Bypass mode set to Crystal oscillator.

    BSP_IO_RIIC1_SDA 

    RIIC1_SDA.

    +
    BSP_BYPASS_MODE_EXTERNAL_CLK 

    Bypass mode set to External clock receive.

    BSP_IO_RIIC1_SCL 

    RIIC1_SCL.

    +
    BSP_BYPASS_MODE_POWER_DOWN 

    Bypass mode set to Power-down.

    +
    + +
    +
    + +

    ◆ bsp_bypass_freq_range_t

    + +
    +
    + + + + +
    enum bsp_bypass_freq_range_t
    +
    +

    Superset of frequency range for bypass mode.

    + + + + +
    Enumerator
    BSP_BYPASS_FREQ_RANGE_1MHZ 

    Frequency range set to 32KHz to 1MHz.

    +
    BSP_BYPASS_FREQ_RANGE_12MHZ 

    Frequency range set to 1.1MHz to 12MHz.

    +
    BSP_BYPASS_FREQ_RANGE_24MHZ 

    Frequency range set to 12.1MHz to 24MHz.

    +
    BSP_BYPASS_FREQ_RANGE_48MHZ 

    Frequency range set to 24.1MHz to 48MHz.

    @@ -736,6 +1112,252 @@

    Disable access to the PFS registers. Uses a reference counter to protect against interrupts that could occur via multiple threads or an ISR re-entering this code.

    +

    +
    + +

    ◆ R_BSP_OENAccessEnable()

    + +
    +
    + + + + + + + + +
    __STATIC_INLINE void R_BSP_OENAccessEnable (void )
    +
    +

    Enable access to the OEN registers.

    + +
    +
    + +

    ◆ R_BSP_OENAccessDisable()

    + +
    +
    + + + + + + + + +
    __STATIC_INLINE void R_BSP_OENAccessDisable (void )
    +
    +

    Disable access to the OEN registers.

    + +
    +
    + +

    ◆ R_BSP_EthernetModeCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    __STATIC_INLINE void R_BSP_EthernetModeCfg (bsp_ethernet_channel_t channel,
    bsp_ethernet_mode_t mode 
    )
    +
    +

    Configures Ethernet channel PHY mode.

    + +
    +
    + +

    ◆ R_BSP_SDVoltageModeCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    __STATIC_INLINE void R_BSP_SDVoltageModeCfg (bsp_sd_channel_t channel,
    bsp_sd_voltage_t voltage 
    )
    +
    +

    Configures SD channel voltage mode.

    + +
    +
    + +

    ◆ R_BSP_QSPIVoltageModeCfg()

    + +
    +
    + + + + + + + + +
    __STATIC_INLINE void R_BSP_QSPIVoltageModeCfg (bsp_qspi_voltage_t voltage)
    +
    +

    Configures QSPI channel voltage mode.

    + +
    +
    + +

    ◆ R_BSP_XSPIVoltageModeCfg()

    + +
    +
    + + + + + + + + +
    __STATIC_INLINE void R_BSP_XSPIVoltageModeCfg (bsp_xspi_voltage_t voltage)
    +
    +

    Configures XSPI channel voltage mode.

    + +
    +
    + +

    ◆ R_BSP_EthernetVoltageModeCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    __STATIC_INLINE void R_BSP_EthernetVoltageModeCfg (bsp_ethernet_channel_t channel,
    bsp_ethernet_voltage_t voltage 
    )
    +
    +

    Configures Ethernet channel voltage mode.

    + +
    +
    + +

    ◆ R_BSP_I3CControlCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    __STATIC_INLINE void R_BSP_I3CControlCfg (bsp_i3c_voltage_t voltage,
    bsp_i3c_mode_t mode 
    )
    +
    +

    Configures I3C control.

    + +
    +
    + +

    ◆ R_BSP_BypassModeCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    __STATIC_INLINE void R_BSP_BypassModeCfg (bsp_bypass_oscillator_t oscillator,
    bsp_bypass_mode_t mode,
    bsp_bypass_freq_range_t freq_range 
    )
    +
    +

    Configures bypass mode for RTC, Audio and EMCLK oscillator.

    + +
    +
    + +

    ◆ R_BSP_XSPIOutputEnableCfg()

    + +
    +
    + + + + + + + + +
    __STATIC_INLINE void R_BSP_XSPIOutputEnableCfg (void )
    +
    +

    Configures XSPI output Enable.

    +
    @@ -744,7 +1366,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

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"R_BSP_QSPIVoltageModeCfg", "group___b_s_p___i_o.html#ga273b018bc22b835afd630e6b46a3cc4e", null ], + [ "R_BSP_XSPIVoltageModeCfg", "group___b_s_p___i_o.html#ga59bb3fd83a257bd92926ea266faa9fd8", null ], + [ "R_BSP_EthernetVoltageModeCfg", "group___b_s_p___i_o.html#gaee8fdb90b591063571f73dc23d4306b4", null ], + [ "R_BSP_I3CControlCfg", "group___b_s_p___i_o.html#gaea02bfef9058ac480e59f4175124c4da", null ], + [ "R_BSP_BypassModeCfg", "group___b_s_p___i_o.html#gaa07b15ea5255e2d6ad2a8fb9231adcda", null ], + [ "R_BSP_XSPIOutputEnableCfg", "group___b_s_p___i_o.html#ga3c75c9c53842401896a9feb2e969c5b0", null ] ]; \ No newline at end of file diff --git a/group___b_s_p___m_c_u.html b/group___b_s_p___m_c_u.html index 492fb70..5ec79ea 100644 --- a/group___b_s_p___m_c_u.html +++ b/group___b_s_p___m_c_u.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: MPU Board Support Package +RZV Flexible Software Package Documentation: MPU Board Support Package @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | @@ -127,25 +195,27 @@   void SystemInit_S (void)   - __attribute__ ((optimize("-O1"))) -  + __attribute__ ((naked)) +  uint32_t R_FSP_SystemClockHzGet (fsp_priv_clock_t clock)   +fsp_err_t R_BSP_ClockSelectorSet (fsp_priv_clock_selector_t selector, uint32_t clock_sel) +  +fsp_err_t R_BSP_ClockDividerSet (fsp_priv_clock_divider_t divider, uint32_t clock_div) +  fsp_err_t R_BSP_VersionGet (fsp_version_t *p_version)   -__STATIC_INLINE IRQn_Type R_FSP_CurrentIrqGet (void) -  -__STATIC_INLINE bsp_unique_id_t const * R_BSP_UniqueIdGet () -  void R_BSP_SoftwareDelay (uint32_t delay, bsp_delay_units_t units)   fsp_err_t R_BSP_GroupIrqWrite (bsp_grp_irq_t irq, void(*p_callback)(bsp_grp_irq_t irq))   -void R_BSP_NonSecureEnter (void) -  +__STATIC_INLINE IRQn_Type R_FSP_CurrentIrqGet (void) +  +__STATIC_INLINE bsp_unique_id_t const * R_BSP_UniqueIdGet () + 

    Detailed Description

    -

    The BSP is responsible for getting the MPU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, interrupts and C runtime environment.

    +

    The BSP is responsible for getting the MCU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, clocks, interrupts, C runtime environment, and stack monitor.

    Overview

    @@ -184,8 +258,12 @@

    BSP Features

    BSP Clock Configuration

    -

    RZ/V FSP does not support setting clock frequency. This FSP assumes that the clock frequency is set on the main core side. By entering the information set in the main core into the Clocks tab of the Configuration editor, it is possible to refer this information from the program.

    -

    +

    All system clocks are set up during BSP initialization based on the settings in bsp_clock_cfg.h. These settings are derived from clock configuration information provided from the Configuration editor Clocks tab.

    +
      +
    • Clock configuration is performed prior to initializing the C runtime environment to speed up the startup process.
      • +
    • The BSP implements the required delays to allow the selected clock to stabilize.
      • +
    • The BSP will configure the CMSIS SystemCoreClock variable after clock initialization with the current system clock frequency.
      • +

    System Interrupts

    As RZ MPUs are based on the Cortex-M ARM architecture, the NVIC Nested Vectored Interrupt Controller (NVIC) handles exceptions and interrupt configuration, prioritization and interrupt masking. In the ARM architecture, the NVIC handles exceptions. Some exceptions are known as System Exceptions. System exceptions are statically located at the "top" of the vector table and occupy vector numbers 1 to 15. Vector zero is reserved for the MSP Main Stack Pointer (MSP). The remaining 15 system exceptions are shown below:

    @@ -216,7 +294,8 @@

    RZ MPU supports 480 interrupts by NVIC, and any factor can be registered in the vector table from the Interrupts tab of the Configuration editor.

    BSP Weak Symbols

    -

    The weak attribute causes the declaration to be emitted as a weak symbol rather than a global. A weak symbol is one that can be overridden by an accompanying strong reference with the same name. When the BSP declares a function as weak, user code can define the same function and it will be used in place of the BSP function.

    +

    You might wonder how the BSP is able to place ISR addresses in the NVIC table without the user having explicitly defined one. All that is required by the BSP is that the interrupt event be given a priority.

    +

    This is accomplished through the use of the 'weak' attribute. The weak attribute causes the declaration to be emitted as a weak symbol rather than a global. A weak symbol is one that can be overridden by an accompanying strong reference with the same name. When the BSP declares a function as weak, user code can define the same function and it will be used in place of the BSP function. By defining all possible interrupt sources as weak, the vector table can be built at compile time and any user declarations (strong references) will be used at runtime.

    Weak symbols are supported for ELF targets and also for a.out targets when using the GNU assembler and linker.

    Note that in CMSIS system.c, there is also a weak definition (and a function body) for the Warm Start callback function R_BSP_WarmStart(). Because this function is defined in the same file as the weak declaration, it will be called as the 'default' implementation. The function may be overridden by the user by copying the body into their user application and modifying it as necessary. The linker identifies this as the 'strong' reference and uses it.

    @@ -229,7 +308,7 @@

    This BSP configuration allows the user to skip the FSP C runtime initialization code by setting the "C Runtime Initialization" to "Disabled" on the BSP tab of the Configuration editor. Disabling this option is useful in cases where a non-standard linker script is being used or other modifications to the runtime initialization are desired. If this macro is disabled, the user must use the 'Post Clock Init' event from the warm start (described above) to run their own runtime initialization code.

    Heap Allocation

    -

    The relatively low amount of on-chip SRAM available and lack of memory protection in an MPU means that heap use must be very carefully controlled to avoid memory leaks, overruns and attempted overallocation. Further, many RTOSes provide their own dynamic memory allocation system. For these reasons the default heap size is set at 0 bytes, effectively disabling dynamic memory. If it is required for an application setting a positive value to the "Heap size (bytes)" option in the RZ/V2L Common configurations on the BSP tab will allocate a heap.

    +

    The relatively low amount of on-chip SRAM available and lack of memory protection in an MPU means that heap use must be very carefully controlled to avoid memory leaks, overruns and attempted overallocation. Further, many RTOSes provide their own dynamic memory allocation system. For these reasons the default heap size is set at 0 bytes, effectively disabling dynamic memory. If it is required for an application setting a positive value to the "Heap size (bytes)" option in the Common configurations on the BSP tab will allocate a heap.

    Note
    When using printf/sprintf (and other variants) to output floating point numbers a heap is required. A minimum size of 0x1000 (4096) bytes is recommended when starting development in this case.

    Error Logging

    @@ -243,7 +322,7 @@

    Software Delay

    Implements a blocking software delay. A delay can be specified in microseconds, milliseconds or seconds. The delay is implemented based on the system clock rate.

    -
    /* Delay at least 1 second. Depending on the number of wait states required for the region of memory
    * that the software_delay_loop has been linked in this could take longer. The default value of
    * BSP_DELAY_LOOP_CYCLES is 100. One loop running time of software_delay_loop can be modified by redefining this
    * macro. BSP_DELAY_UNITS_SECONDS, BSP_DELAY_UNITS_MILLISECONDS, and BSP_DELAY_UNITS_MICROSECONDS can all be used
    * with R_BSP_SoftwareDelay. */
    R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_SECONDS);

    +
    /* Delay at least 1 second. Depending on the number of wait states required for the region of memory
    * that the software_delay_loop has been linked in this could take longer. The default is 4 cycles per loop.
    * This can be modified by redefining DELAY_LOOP_CYCLES. BSP_DELAY_UNITS_SECONDS, BSP_DELAY_UNITS_MILLISECONDS,
    * and BSP_DELAY_UNITS_MICROSECONDS can all be used with R_BSP_SoftwareDelay. */
    R_BSP_SoftwareDelay(1, BSP_DELAY_UNITS_SECONDS);

    Critical Section Macros

    Implements a critical section. Some MPUs (MPUs with the BASEPRI register) support allowing high priority interrupts to execute during critical sections. On these MPUs, interrupts with priority less than or equal to BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION are not serviced in critical sections. Interrupts with higher priority than BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION still execute in critical sections.

    FSP_CRITICAL_SECTION_DEFINE;
    /* Store the current interrupt posture. */
    FSP_CRITICAL_SECTION_ENTER;
    /* Interrupts cannot run in this section unless their priority is less than BSP_CFG_IRQ_MASK_LEVEL_FOR_CRITICAL_SECTION. */
    /* Restore saved interrupt posture. */
    FSP_CRITICAL_SECTION_EXIT;

    @@ -320,14 +399,105 @@

    Enabled Select if the C runtime initialization in the BSP is to be used. If disabled, use the BSP_WARM_START_POST_CLOCK event to run user defined equivalent.

    +

    +Secure state of CR8 cores (RZ/V2H)

    +

    The default setting for bus access from the Cortex-R8 core is Non-Secure access.

    +

    If you want to change to secure and privileged access, change the setting value of the SYS_MSTACCCTL2 register in src/cr8_start.c to 0x00999999.

    +

    src/cr8_start.c

    + +

    Modules

     RZV2H
     
     RZV2L
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + @@ -348,120 +518,195 @@

    - - - -

    Macros

    #define R_BSP_MODULE_START(ip, ch)
     
    #define R_BSP_MODULE_STOP(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_GTM(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_GTM(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_GPT(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_GPT(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_CANFD(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_CANFD(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_ADC(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_ADC(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_MHU(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_MHU(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_POEG(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_POEG(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_RIIC(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_RIIC(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_SCI(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_SCI(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_RSPI(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_RSPI(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_TSU(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_TSU(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_SCIF(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_SCIF(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_DMAC(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_DMAC(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_WDT(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_WDT(ip, ch)
     
    #define R_BSP_MODULE_START_FSP_IP_MTU3(ip, ch)
     
    #define R_BSP_MODULE_STOP_FSP_IP_MTU3(ip, ch)
     
    #define R_BSP_MSTP_START(ip, channel)
     
    #define R_BSP_MSTP_STOP(ip, channel)
     
    #define BSP_IRQ_DISABLED
     
    #define FSP_RETURN(err)
     
    #define FSP_ERROR_LOG(err)
     
    #define FSP_ASSERT(a)
     
    #define FSP_ERROR_RETURN(a, err)
     
    #define FSP_CRITICAL_SECTION_ENTER
     
    #define FSP_CRITICAL_SECTION_EXIT
     
    #define FSP_INVALID_VECTOR
     
    #define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR(x)
     
    #define BSP_STACK_ALIGNMENT
     
    #define BSP_IRQ_DISABLED
     
    #define FSP_RETURN(err)
     
    #define BSP_STACK_ALIGNMENT
     
    #define R_BSP_MSTPSTART(ip, ch)
     
    #define R_BSP_MSTPSTOP(ip, ch)
     
    - - + + + +

    Enumerations

    enum  fsp_ip_t
     
    enum  bsp_warm_start_event_t
     
    enum  bsp_delay_units_t
     
    enum  bsp_grp_irq_t
     
    enum  bsp_warm_start_event_t
     
    enum  bsp_warm_start_event_t
     
    + + + + +

    Variables

    uint32_t SystemCoreClock
     
    uint32_t SystemCoreClock
     
    const fsp_version_t g_bsp_version
     Default initialization function. More...
     
    const fsp_version_t g_bsp_version
     Default initialization function. More...
     

    Macro Definition Documentation

    - -

    ◆ BSP_IRQ_DISABLED

    + +

    ◆ R_BSP_MODULE_START

    - + + + + + + + + + + + + + + +
    #define BSP_IRQ_DISABLED#define R_BSP_MODULE_START( ip,
     ch 
    )
    -

    Used to signify that an interrupt factor is not available.

    +

    Cancels the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be started
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ FSP_RETURN

    + +

    ◆ R_BSP_MODULE_STOP

    - + - + + + + + + + + + + +
    #define FSP_RETURN#define R_BSP_MODULE_STOP (  err)ip,
     ch 
    )
    -

    Macro to log and return error without an assertion.

    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ FSP_ERROR_LOG

    + +

    ◆ R_BSP_MODULE_START_FSP_IP_GTM

    - + - + + + + + + + + + + +
    #define FSP_ERROR_LOG#define R_BSP_MODULE_START_FSP_IP_GTM (  err)ip,
     ch 
    )
    -

    This function is called before returning an error code. To stop on a runtime error, define fsp_error_log in user code and do required debugging (breakpoints, stack dump, etc) in this function.

    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ FSP_ASSERT

    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_GTM

    - + - + + + + + + + + + + +
    #define FSP_ASSERT#define R_BSP_MODULE_STOP_FSP_IP_GTM (  a)ip,
     ch 
    )
    -

    Default assertion calls FSP_ERROR_RETURN if condition "a" is false. Used to identify incorrect use of API's in FSP functions.

    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ FSP_ERROR_RETURN

    + +

    ◆ R_BSP_MODULE_START_FSP_IP_GPT

    - + - + - + @@ -470,158 +715,1346 @@

    -

    All FSP error codes are returned using this macro. Calls FSP_ERROR_LOG function if condition "a" is false. Used to identify runtime errors in FSP functions.

    +

    Cancel the module stop state.

    +
    Parameters
    +

    #define FSP_ERROR_RETURN#define R_BSP_MODULE_START_FSP_IP_GPT (  a, ip,
     err ch 
    + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    + +
    - -

    ◆ FSP_CRITICAL_SECTION_ENTER

    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_GPT

    - + + + + + + + + + + + + + + +
    #define FSP_CRITICAL_SECTION_ENTER#define R_BSP_MODULE_STOP_FSP_IP_GPT( ip,
     ch 
    )
    -

    This macro temporarily saves the current interrupt state and disables interrupts.

    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ FSP_CRITICAL_SECTION_EXIT

    + +

    ◆ R_BSP_MODULE_START_FSP_IP_CANFD

    - + + + + + + + + + + + + + + +
    #define FSP_CRITICAL_SECTION_EXIT#define R_BSP_MODULE_START_FSP_IP_CANFD( ip,
     ch 
    )
    -

    This macro restores the previously saved interrupt state, reenabling interrupts.

    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ FSP_INVALID_VECTOR

    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_CANFD

    - + + + + + + + + + + + + + + +
    #define FSP_INVALID_VECTOR#define R_BSP_MODULE_STOP_FSP_IP_CANFD( ip,
     ch 
    )
    -

    Used to signify that the requested IRQ vector is not defined in this system.

    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ BSP_CFG_HANDLE_UNRECOVERABLE_ERROR

    + +

    ◆ R_BSP_MODULE_START_FSP_IP_ADC

    - + - + + + + + + + + + + +
    #define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR#define R_BSP_MODULE_START_FSP_IP_ADC (  x)ip,
     ch 
    )
    -

    In the event of an unrecoverable error the BSP will by default call the __BKPT() intrinsic function which will alert the user of the error. The user can override this default behavior by defining their own BSP_CFG_HANDLE_UNRECOVERABLE_ERROR macro.

    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    - -

    ◆ BSP_STACK_ALIGNMENT

    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_ADC

    - + + + + + + + + + + + + + + + + +
    #define BSP_STACK_ALIGNMENT#define R_BSP_MODULE_STOP_FSP_IP_ADC( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_MHU

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_MHU( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_MHU

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_MHU( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_POEG

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_POEG( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_POEG

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_POEG( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_RIIC

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_RIIC( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_RIIC

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_RIIC( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_SCI

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_SCI( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_SCI

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_SCI( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_RSPI

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_RSPI( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_RSPI

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_RSPI( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_TSU

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_TSU( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_TSU

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_TSU( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_SCIF

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_SCIF( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_SCIF

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_SCIF( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_DMAC

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_DMAC( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_DMAC

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_DMAC( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_WDT

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_WDT( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_WDT

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_WDT( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_START_FSP_IP_MTU3

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_START_FSP_IP_MTU3( ip,
     ch 
    )
    +
    +

    Cancel the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MODULE_STOP_FSP_IP_MTU3

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MODULE_STOP_FSP_IP_MTU3( ip,
     ch 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped
    chThe channel. Use channel 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MSTP_START

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MSTP_START( ip,
     channel 
    )
    +
    +

    Cancels the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be started.
    channelThe channel. Use ch 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ R_BSP_MSTP_STOP

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define R_BSP_MSTP_STOP( ip,
     channel 
    )
    +
    +

    Enables the module stop state.

    +
    Parameters
    + + + +
    ipfsp_ip_t enum value for the module to be stopped.
    channelThe channel. Use ch 0 for modules without channels.
    +
    +
    + +
    +
    + +

    ◆ BSP_IRQ_DISABLED [1/2]

    + +
    +
    + + + + +
    #define BSP_IRQ_DISABLED
    +
    +

    Used to signify that an interrupt factor is not available.

    + +
    +
    + +

    ◆ FSP_RETURN [1/2]

    + +
    +
    + + + + + + + + +
    #define FSP_RETURN( err)
    +
    +

    Macro to log and return error without an assertion.

    + +
    +
    + +

    ◆ FSP_ERROR_LOG [1/2]

    + +
    +
    + + + + + + + + +
    #define FSP_ERROR_LOG( err)
    +
    +

    This function is called before returning an error code. To stop on a runtime error, define fsp_error_log in user code and do required debugging (breakpoints, stack dump, etc) in this function.

    + +
    +
    + +

    ◆ FSP_ASSERT [1/2]

    + +
    +
    + + + + + + + + +
    #define FSP_ASSERT( a)
    +
    +

    Default assertion calls FSP_ERROR_RETURN if condition "a" is false. Used to identify incorrect use of API's in FSP functions.

    + +
    +
    + +

    ◆ FSP_ERROR_RETURN [1/2]

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define FSP_ERROR_RETURN( a,
     err 
    )
    +
    +

    All FSP error codes are returned using this macro. Calls FSP_ERROR_LOG function if condition "a" is false. Used to identify runtime errors in FSP functions.

    + +
    +
    + +

    ◆ FSP_CRITICAL_SECTION_ENTER [1/2]

    + +
    +
    + + + + +
    #define FSP_CRITICAL_SECTION_ENTER
    +
    +

    This macro temporarily saves the current interrupt state and disables interrupts.

    + +
    +
    + +

    ◆ FSP_CRITICAL_SECTION_EXIT [1/2]

    + +
    +
    + + + + +
    #define FSP_CRITICAL_SECTION_EXIT
    +
    +

    This macro restores the previously saved interrupt state, reenabling interrupts.

    + +
    +
    + +

    ◆ FSP_INVALID_VECTOR [1/2]

    + +
    +
    + + + + +
    #define FSP_INVALID_VECTOR
    +
    +

    Used to signify that the requested IRQ vector is not defined in this system.

    + +
    +
    + +

    ◆ BSP_CFG_HANDLE_UNRECOVERABLE_ERROR [1/2]

    + +
    +
    + + + + + + + + +
    #define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR( x)
    +
    +

    In the event of an unrecoverable error the BSP will by default call the __BKPT() intrinsic function which will alert the user of the error. The user can override this default behavior by defining their own BSP_CFG_HANDLE_UNRECOVERABLE_ERROR macro.

    + +
    +
    + +

    ◆ BSP_STACK_ALIGNMENT [1/2]

    + +
    +
    + + + + +
    #define BSP_STACK_ALIGNMENT
    +
    +

    Stacks (and heap) must be sized and aligned to an integer multiple of this number.

    + +
    +
    + +

    ◆ BSP_IRQ_DISABLED [2/2]

    + +
    +
    + + + + +
    #define BSP_IRQ_DISABLED
    +
    +

    Used to signify that an interrupt factor is not available.

    + +
    +
    + +

    ◆ FSP_RETURN [2/2]

    + +
    +
    + + + + + + + + +
    #define FSP_RETURN( err)
    +
    +

    Macro to log and return error without an assertion.

    + +
    +
    + +

    ◆ FSP_ERROR_LOG [2/2]

    + +
    +
    + + + + + + + + +
    #define FSP_ERROR_LOG( err)
    +
    +

    This function is called before returning an error code. To stop on a runtime error, define fsp_error_log in user code and do required debugging (breakpoints, stack dump, etc) in this function.

    + +
    +
    + +

    ◆ FSP_ASSERT [2/2]

    + +
    +
    + + + + + + + + +
    #define FSP_ASSERT( a)
    +
    +

    Default assertion calls FSP_ERROR_RETURN if condition "a" is false. Used to identify incorrect use of API's in FSP functions.

    + +
    +
    + +

    ◆ FSP_ERROR_RETURN [2/2]

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    #define FSP_ERROR_RETURN( a,
     err 
    )
    +
    +

    All FSP error codes are returned using this macro. Calls FSP_ERROR_LOG function if condition "a" is false. Used to identify runtime errors in FSP functions.

    + +
    +
    + +

    ◆ FSP_CRITICAL_SECTION_ENTER [2/2]

    + +
    +
    + + + + +
    #define FSP_CRITICAL_SECTION_ENTER
    +
    +

    This macro temporarily saves the current interrupt state and disables interrupts.

    + +
    +
    + +

    ◆ FSP_CRITICAL_SECTION_EXIT [2/2]

    + +
    +
    + + + + +
    #define FSP_CRITICAL_SECTION_EXIT
    +
    +

    This macro restores the previously saved interrupt state, reenabling interrupts.

    + +
    +
    + +

    ◆ FSP_INVALID_VECTOR [2/2]

    + +
    +
    + + +
    #define FSP_INVALID_VECTOR
    -

    Stacks (and heap) must be sized and aligned to an integer multiple of this number.

    +

    Used to signify that the requested IRQ vector is not defined in this system.

    - -

    ◆ R_BSP_MSTPSTART

    + +

    ◆ BSP_CFG_HANDLE_UNRECOVERABLE_ERROR [2/2]

    - + - - - - - - - - - + - -
    #define R_BSP_MSTPSTART#define BSP_CFG_HANDLE_UNRECOVERABLE_ERROR (  ip,
     ch 
    x) )
    -

    Cancels the module stop state.

    -
    Parameters
    - - - -
    ipbsp_mstp_ip_t enum value for the module to be started
    chThe channel. Use ch 0 for modules without channels.
    -
    -
    +

    In the event of an unrecoverable error the BSP will by default call the __BKPT() intrinsic function which will alert the user of the error. The user can override this default behavior by defining their own BSP_CFG_HANDLE_UNRECOVERABLE_ERROR macro.

    - -

    ◆ R_BSP_MSTPSTOP

    + +

    ◆ BSP_STACK_ALIGNMENT [2/2]

    - - - - - - - - - - - - - - - +
    #define R_BSP_MSTPSTOP( ip,
     ch 
    )#define BSP_STACK_ALIGNMENT
    -

    Enables the module stop state.

    -
    Parameters
    - - - -
    ipbsp_mstp_ip_t enum value for the module to be stopped
    chThe channel. Use ch 0 for modules without channels.
    -
    -
    +

    Stacks (and heap) must be sized and aligned to an integer multiple of this number.

    @@ -637,96 +2070,181 @@

    -

    Following IPs are available. Used for module standby release / transition, clock ON / OFF, and reset assert / negate.

    +

    Available modules.

    - + + + + + + + + + + + + + + + + + + - - - - - - - - - - - + + + + + + +
    Enumerator
    FSP_IP_GTM 

    General Timer.

    +
    Enumerator
    FSP_IP_GTM 

    General Timer.

    +
    FSP_IP_GPT 

    General PWM Timer.

    +
    FSP_IP_POEG 

    Port Output Enable for GPT.

    +
    FSP_IP_PORT 

    I/O Ports.

    +
    FSP_IP_IM33 

    IM33 (Interrupt controller)

    +
    FSP_IP_SCIF 

    Serial Communications Interface with FIFO.

    +
    FSP_IP_RIIC 

    I2C Bus Interface.

    +
    FSP_IP_RSPI 

    Renesas Serial Peripheral Interface.

    +
    FSP_IP_MHU 

    Message Handling Unit.

    +
    FSP_IP_DMAC 

    Direct Memory Access Controller.

    +
    FSP_IP_SSI 

    Serial Sound Interface.

    +
    FSP_IP_CANFD 

    CANFD Interface (RS-CANFD)

    +
    FSP_IP_SCI 

    Serial Communications Interface.

    +
    FSP_IP_MTU3 

    Multi-Function Timer Pulse Unit 3.

    +
    FSP_IP_GTM 

    General Timer.

    +
    FSP_IP_GPT 

    General PWM Timer.

    +
    FSP_IP_POEG 

    Port Output Enable for GPT.

    +
    FSP_IP_PORT 

    I/O Ports.

    +
    FSP_IP_IM33 

    IM33 (Interrupt controller)

    FSP_IP_GPT 

    General PWM Timer.

    +
    FSP_IP_SCIF 

    Serial Communications Interface with FIFO.

    FSP_IP_POEG 

    Port Output Enable for GPT.

    +
    FSP_IP_RIIC 

    I2C Bus Interface.

    FSP_IP_PORT 

    I/O Ports.

    +
    FSP_IP_RSPI 

    Renesas Serial Peripheral Interface.

    FSP_IP_IM33 

    IM33 (Interrupt controller)

    +
    FSP_IP_MHU 

    Message Handling Unit.

    FSP_IP_SCIF 

    Serial Communications Interface with FIFO.

    +
    FSP_IP_DMAC 

    Direct Memory Access Controller.

    FSP_IP_RIIC 

    I2C Bus Interface.

    +
    FSP_IP_DMAC_s 

    Direct Memory Access Controller.

    FSP_IP_RSPI 

    Renesas Serial Peripheral Interface.

    +
    FSP_IP_SSI 

    Serial Sound Interface.

    FSP_IP_MHU 

    Message Handling Unit.

    +
    FSP_IP_CANFD 

    CANFD Interface (RS-CANFD)

    FSP_IP_DMAC 

    Direct Memory Access Controller.

    +
    FSP_IP_ADC 

    A/D Converter.

    FSP_IP_SSI 

    Serial Sound Interface.

    +
    FSP_IP_TSU 

    Thermal Sensor Unit.

    FSP_IP_CANFD 

    CANFD Interface (RS-CANFD)

    +
    FSP_IP_WDT 

    Watchdog Timer.

    +
    FSP_IP_SCI 

    Serial Communications Interface.

    +
    FSP_IP_CMTW 

    Compare Match Timer W.

    +
    FSP_IP_XSPI 

    Expanded Serial Peripheral Interface.

    +
    FSP_IP_CRC 

    Cyclic redundancy check (CRC) operation units.

    +
    FSP_IP_I3C 

    I3C Bus Interface.

    +
    FSP_IP_RTC 

    Realtime Clock.

    +
    FSP_IP_SYC 

    System counter.

    - -

    ◆ bsp_warm_start_event_t

    + +

    ◆ bsp_delay_units_t

    - +
    enum bsp_warm_start_event_tenum bsp_delay_units_t
    -

    Different warm start entry locations in the BSP.

    +

    Available delay units for R_BSP_SoftwareDelay(). These are ultimately used to calculate a total # of microseconds

    - - -
    Enumerator
    BSP_WARM_START_RESET 

    Called almost immediately after reset. No C runtime environment, clocks, or IRQs.

    +
    Enumerator
    BSP_DELAY_UNITS_SECONDS 

    Requested delay amount is in seconds.

    BSP_WARM_START_POST_CLOCK 

    Called after clock initialization. No C runtime environment or IRQs.

    +
    BSP_DELAY_UNITS_MILLISECONDS 

    Requested delay amount is in milliseconds.

    BSP_WARM_START_POST_C 

    Called after clocks and C runtime environment have been set up.

    +
    BSP_DELAY_UNITS_MICROSECONDS 

    Requested delay amount is in microseconds.

    - -

    ◆ bsp_delay_units_t

    + +

    ◆ bsp_grp_irq_t

    - +
    enum bsp_delay_units_tenum bsp_grp_irq_t
    -

    Available delay units for R_BSP_SoftwareDelay(). These are ultimately used to calculate a total # of microseconds

    +

    Which interrupts can have callbacks registered.

    - -
    Enumerator
    BSP_DELAY_UNITS_SECONDS 

    Requested delay amount is in seconds.

    +
    Enumerator
    BSP_GRP_IRQ_UNSUPPORTED 

    NMI Group IRQ are not supported in this device.

    BSP_DELAY_UNITS_MILLISECONDS 

    Requested delay amount is in milliseconds.

    +
    + +
    +
    + +

    ◆ bsp_warm_start_event_t [1/2]

    + +
    +
    + + + + +
    enum bsp_warm_start_event_t
    +
    +

    Different warm start entry locations in the BSP.

    + + - + + + +
    Enumerator
    BSP_WARM_START_RESET 

    Called almost immediately after reset. No C runtime environment, clocks, or IRQs.

    BSP_DELAY_UNITS_MICROSECONDS 

    Requested delay amount is in microseconds.

    +
    BSP_WARM_START_POST_CLOCK 

    Called after clock initialization. No C runtime environment or IRQs.

    +
    BSP_WARM_START_POST_C 

    Called after clocks and C runtime environment have been set up.

    +
    BSP_WARM_START_RESET 

    Called almost immediately after reset. No C runtime environment, clocks, or IRQs.

    +
    BSP_WARM_START_POST_CLOCK 

    Called after clock initialization. No C runtime environment or IRQs.

    +
    BSP_WARM_START_POST_C 

    Called after clocks and C runtime environment have been set up.

    - -

    ◆ bsp_grp_irq_t

    + +

    ◆ bsp_warm_start_event_t [2/2]

    - +
    enum bsp_grp_irq_tenum bsp_warm_start_event_t
    -

    Which interrupts can have callbacks registered.

    +

    Different warm start entry locations in the BSP.

    - + + + + +
    Enumerator
    BSP_GRP_IRQ_UNSUPPORTED 

    NMI Group IRQ are not supported in this device.

    +
    Enumerator
    BSP_WARM_START_RESET 

    Called almost immediately after reset. No C runtime environment, clocks, or IRQs.

    +
    BSP_WARM_START_POST_CLOCK 

    Called after clock initialization. No C runtime environment or IRQs.

    +
    BSP_WARM_START_POST_C 

    Called after clocks and C runtime environment have been set up.

    +
    BSP_WARM_START_RESET 

    Called almost immediately after reset. No C runtime environment, clocks, or IRQs.

    +
    BSP_WARM_START_POST_CLOCK 

    Called after clock initialization. No C runtime environment or IRQs.

    +
    BSP_WARM_START_POST_C 

    Called after clocks and C runtime environment have been set up.

    @@ -958,8 +2476,7 @@

    Initialize security features for TrustZone.

    -

    This function initializes ARM security register for secure projects.

    -
    Note
    IDAU settings must be configured to match project settings.
    +

    This function initializes security register for secure projects.

    @@ -982,8 +2499,8 @@

    -

    ◆ __attribute__()

    + +

    ◆ __attribute__()

    @@ -991,13 +2508,14 @@

    __attribute__ ( - (optimize("-O1"))  + (naked)  )

    -

    In the Cortex-M33 CPU core of this device, the secure vector address must be set to SYS_CM33_CFG2 before WarmReset is executed. Also, the non-secure vector address must be set to SYS_CM33_CFG3 before WarmReset is executed. The Cortex-M33's program works on the assumption that the appropriate vector address values have been set in SYS_CM33_CFG2 and SYS_CM33_CFG3 in the Cortex-A55 program.

    +

    In the Cortex-M33 CPU core of this device, the secure vector address must be set to SYS_CM33_CFG2 before WarmReset is executed. Also, the non-secure vector address must be set to SYS_CM33_CFG3 before WarmReset is executed. The Cortex-M33's program works on the assumption that the appropriate vector address values have been set in SYS_CM33_CFG2 and SYS_CM33_CFG3 in the Cortex-A55 program.

    +

    Entry function when debugging RAM load using a debugger

    @@ -1032,74 +2550,125 @@

    -

    ◆ R_BSP_VersionGet()

    + +

    ◆ R_BSP_ClockSelectorSet()

    - + - - + + + + + + + + + + + +
    fsp_err_t R_BSP_VersionGet fsp_err_t R_BSP_ClockSelectorSet (fsp_version_t * p_version)fsp_priv_clock_selector_t selector,
    uint32_t clock_sel 
    )
    -

    Get the BSP version based on compile time macros.

    +

    Set a clock selector.

    Parameters
    - + +
    [out]p_versionMemory address to return version information to.
    [in]selectorElement number of the array that defines the clock selector.
    [in]clock_selValue to set in Mux Control register.
    Return values
    - - + + +
    FSP_SUCCESSVersion information stored.
    FSP_ERR_ASSERTIONThe parameter p_version is NULL.
    FSP_SUCCESSSelector configuration changes completed.
    FSP_ERR_INVALID_ARGUMENTUndefined selector specified.
    FSP_ERR_PLL_SRC_INACTIVEClock source PLL is reset state.
    +
    Note
    This function assumes that a source clock is supplied. If the source clock is not supplied, the selector setting process cannot be completed successfully.
    - -

    ◆ R_FSP_CurrentIrqGet()

    + +

    ◆ R_BSP_ClockDividerSet()

    - + - - + + + + + + + + + + + +
    __STATIC_INLINE IRQn_Type R_FSP_CurrentIrqGet fsp_err_t R_BSP_ClockDividerSet (void )fsp_priv_clock_divider_t divider,
    uint32_t clock_div 
    )
    -

    Return active interrupt vector number value

    -
    Returns
    Active interrupt vector number value
    +

    Set a clock division ratio.

    +
    Parameters
    + + + +
    [in]dividerElement number of the array that defines the clock divider.
    [in]clock_divValue to set in Gear Control register.
    +
    +
    +
    Return values
    + + + + +
    FSP_SUCCESSDivider configuration changes completed.
    FSP_ERR_INVALID_ARGUMENTUndefined divider specified.
    FSP_ERR_PLL_SRC_INACTIVEClock source PLL is reset state.
    +
    +
    +
    Note
    This function assumes that a source clock is supplied. If the source clock is not supplied, the divider setting process cannot be completed successfully.
    - -

    ◆ R_BSP_UniqueIdGet()

    + +

    ◆ R_BSP_VersionGet()

    - + - + +
    __STATIC_INLINE bsp_unique_id_t const* R_BSP_UniqueIdGet fsp_err_t R_BSP_VersionGet ()fsp_version_t * p_version)
    -

    Get unique ID is not supported in this device.

    -
    Returns
    A pointer to the unique identifier structure
    +

    Get the BSP version based on compile time macros.

    +
    Parameters
    + + +
    [out]p_versionMemory address to return version information to.
    +
    +
    +
    Return values
    + + + +
    FSP_SUCCESSVersion information stored.
    FSP_ERR_ASSERTIONThe parameter p_version is NULL.
    +
    +
    @@ -1129,7 +2698,7 @@

    Delay for at least the specified duration in units and return. This function shouldn't be used to generate an accurate delay time. A running time of the function is depending on the region of memory where the function is excuted on and a frequency of the CPU clock.

    -

    The funcion calls bsp_prv_software_delay_loop() which loops over the requested delay time. One loop time through bsp_prv_software_delay_loop() takes roughly 500ns. This value is based on the actual measured time in the condition that a frequency of the CPU clock is 200MHz and the code is excuted on DDR3L-1333 DRAM(133MHz). One loop running time of software_delay_loop() can be modified by redefining BSP_DELAY_LOOP_CYCLES.

    +

    The funcion calls bsp_prv_software_delay_loop() which loops over the requested delay time. One loop time through bsp_prv_software_delay_loop() takes roughly 500ns. This value is based on the actual measured time in the condition that a frequency of the CPU clock is 200MHz and the code is excuted on DDR3L-1333 DRAM(133MHz). One loop running time of software_delay_loop() can be modified by redefining BSP_FEATURE_BSP_DELAY_LOOP_CYCLES.

    Parameters
    @@ -1188,14 +2757,14 @@

    -

    ◆ R_BSP_NonSecureEnter()

    + +

    ◆ R_FSP_CurrentIrqGet()

    [in]delayThe number of 'units' to delay.
    - + @@ -1203,15 +2772,48 @@

    -

    Enter the non-secure code environment.

    -

    This function configures the non-secure MSP and vector table then jumps to the non-secure project's Reset_Handler.

    -
    Note
    This function (and therefore the non-secure code) should not return.
    +

    Return active interrupt vector number value

    +
    Returns
    Active interrupt vector number value
    + + + +     +

    ◆ R_BSP_UniqueIdGet()

    + +
    +
    +

    void R_BSP_NonSecureEnter __STATIC_INLINE IRQn_Type R_FSP_CurrentIrqGet ( void  )
    + + + + + + +
    __STATIC_INLINE bsp_unique_id_t const * R_BSP_UniqueIdGet ()
    +

    +

    Get unique ID is not supported in this device.

    +
    Returns
    A pointer to the unique identifier structure

    Variable Documentation

    -

    ◆ SystemCoreClock

    +

    ◆ SystemCoreClock [1/2]

    + +
    +
    + + + + +
    uint32_t SystemCoreClock
    +
    +

    System Clock Frequency (Core Clock)

    + +
    +
    + +

    ◆ SystemCoreClock [2/2]

    @@ -1226,7 +2828,24 @@

    -

    ◆ g_bsp_version

    +

    ◆ g_bsp_version [1/2]

    + +
    +
    + + + + +
    const fsp_version_t g_bsp_version
    +
    + +

    Default initialization function.

    +

    Version data structure used by error logger macro.

    + +
    +
    + +

    ◆ g_bsp_version [2/2]

    @@ -1248,7 +2867,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

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"group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950acfc9bb8ff007a7b82cf4fd845dfce053", null ], + [ "FSP_IP_PORT", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a3403f62d1f8cc29a868e5da9a86a46f7", null ], + [ "FSP_IP_IM33", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a4704af5ed32cbd6532fd28a44d0d028e", null ], + [ "FSP_IP_SCIF", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a837b8847e248ed296512f20813008cd5", null ], + [ "FSP_IP_RIIC", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a17e007a04505fb7a7614067e3d5e7447", null ], + [ "FSP_IP_RSPI", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950acbce1d6d73ea0d9a18c42b2389c69888", null ], + [ "FSP_IP_MHU", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950abfff39a6b8ca24d18832ad7153cc0880", null ], + [ "FSP_IP_DMAC", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a494addfd4ceb1fabb0bea0893b444641", null ], + [ "FSP_IP_DMAC_s", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950adf8c428fc9e6594881035cfc67a66373", null ], + [ "FSP_IP_SSI", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a372bbc7267801454ac9a1bf3677ef60c", null ], + [ "FSP_IP_CANFD", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950aacbead3e070986a6c40c32d2485d5c4e", null ], + [ "FSP_IP_ADC", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950ac49bfca1e1ccf88f53586fc28bd54250", null ], + [ "FSP_IP_TSU", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a55e1c8e5259f5bc822c320abb058142b", null ], + [ "FSP_IP_WDT", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a9b738d0f557574bb4d659abc2dc0fbf8", null ], + [ "FSP_IP_SCI", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950ad8802ee74d9cafca9a1c4d5faea8e253", null ], + [ "FSP_IP_CMTW", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a41268ed3e6b973a85d0dcabaf5d1abf2", null ], + [ "FSP_IP_XSPI", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a8e412d35ce1643636ba6bc355914c5e0", null ], + [ "FSP_IP_CRC", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a66f3b5b31f294d50f964990b205cb92b", null ], + [ "FSP_IP_I3C", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950aaff0832d2687261b54f54189c224db06", null ], + [ "FSP_IP_RTC", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950ae2e4b37d45024125cbb660f1b3a3090e", null ], + [ "FSP_IP_SYC", "group___b_s_p___m_c_u.html#ga7880302f0edd7cc4290c037809975950a308404027f3f10d27b8cb240dec71244", null ] ] ], [ "bsp_delay_units_t", "group___b_s_p___m_c_u.html#gafd98e2a6f080d6a52a3ef72e3d731b2b", [ [ "BSP_DELAY_UNITS_SECONDS", "group___b_s_p___m_c_u.html#ggafd98e2a6f080d6a52a3ef72e3d731b2bacc709da08ef4acc99bf6e2e84946be5d", null ], @@ -40,6 +101,22 @@ var group___b_s_p___m_c_u = [ "bsp_grp_irq_t", "group___b_s_p___m_c_u.html#ga72e70676360e6a4d753a8d235e6b93a2", [ [ "BSP_GRP_IRQ_UNSUPPORTED", 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"group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4af322ff0740a8d31f831b98ff042f0811", null ] + ] ], + [ "bsp_warm_start_event_t", "group___b_s_p___m_c_u.html#ga6fe6dc3c0813eeae8665430a31c005b4", [ + [ "BSP_WARM_START_RESET", "group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4a682d5dad980652c1acbc5b04531f6da2", null ], + [ "BSP_WARM_START_POST_CLOCK", "group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4a0ac1a271ef413302af1558941563f3e7", null ], + [ "BSP_WARM_START_POST_C", "group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4af322ff0740a8d31f831b98ff042f0811", null ], + [ "BSP_WARM_START_RESET", "group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4a682d5dad980652c1acbc5b04531f6da2", null ], + [ "BSP_WARM_START_POST_CLOCK", "group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4a0ac1a271ef413302af1558941563f3e7", null ], + [ "BSP_WARM_START_POST_C", "group___b_s_p___m_c_u.html#gga6fe6dc3c0813eeae8665430a31c005b4af322ff0740a8d31f831b98ff042f0811", null ] + ] ], [ "R_FSP_VersionGet", "group___b_s_p___m_c_u.html#gaf3ee66233fc75acfcc21a97d7a767aa1", null ], [ "Reset_Handler_NS", "group___b_s_p___m_c_u.html#ga49c8711ce69459021327e37557a1a9f1", null ], [ "Default_Handler", "group___b_s_p___m_c_u.html#ga4e0c522c1bb26af24accaf20e6b87d12", null ], @@ -52,14 +129,17 @@ var group___b_s_p___m_c_u = [ "R_BSP_WarmStart", "group___b_s_p___m_c_u.html#ga662624feaff3850ffbe7fb118ab140d7", null ], [ "R_BSP_SecurityInit", "group___b_s_p___m_c_u.html#ga0d1fdb0e18d303e7f6ed3410d52c9d7f", null ], [ "SystemInit_S", "group___b_s_p___m_c_u.html#ga5cd95eba95dc2c1bad0bf05398c9779c", null ], - [ "__attribute__", "group___b_s_p___m_c_u.html#ga1300de3839c776da2d29a95c154e0c7a", null ], + [ "__attribute__", "group___b_s_p___m_c_u.html#ga2804a023941a956288c32ad08b2cf59e", null ], [ "R_FSP_SystemClockHzGet", "group___b_s_p___m_c_u.html#ga992632ae2e45c2f962855fe4bbe98a63", null ], + [ "R_BSP_ClockSelectorSet", "group___b_s_p___m_c_u.html#ga6a8598c7564c37b201a19003d188de7f", null ], + [ "R_BSP_ClockDividerSet", "group___b_s_p___m_c_u.html#gac27f5c8e3abd9d557b79ff1bdde2f932", null ], [ "R_BSP_VersionGet", "group___b_s_p___m_c_u.html#gade0e6b9fc5ca580d5bf6c8ae2a6af8d9", null ], - [ "R_FSP_CurrentIrqGet", "group___b_s_p___m_c_u.html#ga50cae0c65c54074c32d30eb4108d9a09", null ], - [ "R_BSP_UniqueIdGet", "group___b_s_p___m_c_u.html#gadee5f5e0c5fa723426f73d7d5a07f9b2", null ], [ "R_BSP_SoftwareDelay", "group___b_s_p___m_c_u.html#gaf3219448adfd1531cf69f68697ab184b", null ], [ "R_BSP_GroupIrqWrite", "group___b_s_p___m_c_u.html#gaed27ea47f0c85a1af9bb515600d5e2ba", null ], - [ "R_BSP_NonSecureEnter", "group___b_s_p___m_c_u.html#gae05dfbdf57eb8b0bea46f555a2845d7b", null ], + [ "R_FSP_CurrentIrqGet", "group___b_s_p___m_c_u.html#ga50cae0c65c54074c32d30eb4108d9a09", null ], + [ "R_BSP_UniqueIdGet", "group___b_s_p___m_c_u.html#ga1273625a09a1d570dea0c5189f6b5fe8", null ], + [ "SystemCoreClock", "group___b_s_p___m_c_u.html#gaa3cd3e43291e81e795d642b79b6088e6", null ], [ "SystemCoreClock", "group___b_s_p___m_c_u.html#gaa3cd3e43291e81e795d642b79b6088e6", null ], + [ "g_bsp_version", "group___b_s_p___m_c_u.html#gaaa2f4340010ddb682ca12fac46f83db8", null ], [ "g_bsp_version", "group___b_s_p___m_c_u.html#gaaa2f4340010ddb682ca12fac46f83db8", null ] ]; \ No newline at end of file diff --git a/group___b_s_p___m_c_u___r_z_v2_h.html b/group___b_s_p___m_c_u___r_z_v2_h.html new file mode 100644 index 0000000..dd4c5d7 --- /dev/null +++ b/group___b_s_p___m_c_u___r_z_v2_h.html @@ -0,0 +1,207 @@ + + + + + + + +RZV Flexible Software Package Documentation: RZV2H + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Enumerations
    +
    +
    RZV2H
    BSP » MPU Board Support Package
    +
    +
    +

    Detailed Description

    +

    Build Time Configurations for rzv2h_fsp

    +The following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:
    +

    + + +
    ConfigurationOptionsDefaultDescription
    +

    + + + + +

    +Enumerations

    enum  elc_event_t
     
    +

    Enumeration Type Documentation

    + +

    ◆ elc_event_t

    + +
    +
    + + + + +
    enum elc_event_t
    +
    +

    Sources of event signals to be linked to other peripherals or the CPU

    Note
    This list may change based on based on the device.
    + +
    +
    +
    +
    + + + + + diff --git a/group___b_s_p___m_c_u___r_z_v2_h.js b/group___b_s_p___m_c_u___r_z_v2_h.js new file mode 100644 index 0000000..cc25835 --- /dev/null +++ b/group___b_s_p___m_c_u___r_z_v2_h.js @@ -0,0 +1,4 @@ +var group___b_s_p___m_c_u___r_z_v2_h = +[ + [ "elc_event_t", "group___b_s_p___m_c_u___r_z_v2_h.html#gaebe723200f2a7f181f08324128b9d7b5", null ] +]; \ No newline at end of file diff --git a/group___b_s_p___m_c_u___r_z_v2_l.html b/group___b_s_p___m_c_u___r_z_v2_l.html index 298f89e..3c5c3dc 100644 --- a/group___b_s_p___m_c_u___r_z_v2_l.html +++ b/group___b_s_p___m_c_u___r_z_v2_l.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: RZV2L +RZV Flexible Software Package Documentation: RZV2L @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    RZV2L
    BSP » MPU Board Support Package
    +

    Detailed Description

    Build Time Configurations for rzv2l_fsp

    The following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:

    @@ -107,7 +176,7 @@ diff --git a/group___c_a_n___a_p_i.html b/group___c_a_n___a_p_i.html index 410292f..c81fe04 100644 --- a/group___c_a_n___a_p_i.html +++ b/group___c_a_n___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: CAN Interface +RZV Flexible Software Package Documentation: CAN Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -115,14 +183,14 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    + + - - @@ -145,18 +213,64 @@

    - - - - - - - -

    Data Structures

    struct  can_info_t
     
    struct  can_bit_timing_cfg_t
     
    struct  can_frame_t
     
    struct  can_callback_args_t
     
    struct  can_mailbox_t
     
    struct  can_cfg_t
     
    struct  can_api_t
     
    enum  can_id_mode_t
     
    enum  can_global_id_mode_t
     
    enum  can_frame_type_t
     
    enum  can_message_mode_t
     
    enum  can_clock_source_t
     
    enum  can_mailbox_send_receive_t
     

    Data Structure Documentation

    + +

    ◆ can_info_t

    + +
    +
    + + + + +
    struct can_info_t
    +
    +

    CAN status info

    +
    + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +status +Useful information from the CAN status register.
    +uint32_t +rx_mb_status +RX Message Buffer New Data flags.
    +uint32_t +rx_fifo_status +RX FIFO Empty flags.
    +uint8_t +error_count_transmit +Transmit error count.
    +uint8_t +error_count_receive +Receive error count.
    +uint32_t +error_code +Error code, cleared after reading.
    + +
    +

    ◆ can_bit_timing_cfg_t

    @@ -226,18 +340,18 @@

    ` Standard or Extended ID (IDE). -uint8_t - -data_length_code - -CAN Data Length Code (DLC). - can_frame_type_t type Frame type (RTR). +uint8_t + +data_length_code + +CAN Data Length Code (DLC). + uint32_t options @@ -292,12 +406,6 @@

    -can_frame_t * - -p_frame - - - void const * p_context @@ -311,48 +419,6 @@

    -

    ◆ can_mailbox_t

    - -
    -
    - - - - -
    struct can_mailbox_t
    -
    -

    CAN Mailbox

    -
    - - - - - - - - - - - - - -
    Data Fields
    -uint32_t -mailbox_id -Mailbox ID.
    -can_id_mode_t -id_mode -Standard or Extended ID. Only used in Mixed ID mode.
    -can_mailbox_send_receive_t -mailbox_type -Receive or Transmit mailbox type.
    -can_frame_type_t -frame_type -Frame type for receive mailbox.
    -
    @@ -397,30 +463,14 @@

    ◆ IRQn_Type error_irq  Error IRQ number.
      - -IRQn_Type mailbox_rx_irq - Receive IRQ number.
    -  - -IRQn_Type mailbox_tx_irq - Transmit IRQ number.
    -  - -can_mailbox_t * p_mailbox - Pointer to mailboxes.
    -  - -can_global_id_mode_t id_mode - Standard or Extended ID mode.
    -  - -uint32_t mailbox_count - Number of mailboxes.
    -  - -can_message_mode_t message_mode - Overwrite message or overrun.
    -  + +IRQn_Type rx_irq + Receive IRQ number.
    +  + +IRQn_Type tx_irq + Transmit IRQ number.
    + 

    @@ -449,12 +499,10 @@

    ◆   fsp_err_t(* modeTransition )(can_ctrl_t *const p_api_ctrl, can_operation_mode_t operation_mode, can_test_mode_t test_mode)   -fsp_err_t(* infoGet )(can_ctrl_t *const p_ctrl, can_info_t *const p_info) +fsp_err_t(* infoGet )(can_ctrl_t *const p_ctrl, can_info_t *const p_info)   fsp_err_t(* callbackSet )(can_ctrl_t *const p_api_ctrl, void(*p_callback)(can_callback_args_t *), void const *const p_context, can_callback_args_t *const p_callback_memory)   -fsp_err_t(* versionGet )(fsp_version_t *const p_version) - 

    Field Documentation

    @@ -469,13 +517,14 @@

    Open function for CAN device

    Implemented as
    Parameters
    - +
    [in,out]p_ctrlPointer to the CAN control block. Must be declared by user. Value set here.
    [in]can_cfg_tPointer to CAN configuration structure. All elements of this structure must be set by user.
    [in]p_cfgPointer to CAN configuration structure. All elements of this structure must be set by user.
    @@ -494,6 +543,7 @@

    Write function for CAN device

    Implemented as
    @@ -546,6 +596,7 @@

    Close function for CAN device

    Implemented as
    @@ -570,6 +621,7 @@

    Mode Transition function for CAN device

    Implemented as
    @@ -591,11 +643,12 @@

    - +
    fsp_err_t(* can_api_t::infoGet) (can_ctrl_t *const p_ctrl, can_info_t *const p_info)fsp_err_t(* can_api_t::infoGet) (can_ctrl_t *const p_ctrl, can_info_t *const p_info)

    Get CAN channel info.

    Implemented as
    @@ -621,6 +674,7 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    @@ -634,30 +688,6 @@

    -

    ◆ versionGet

    - -
    -
    - - - - -
    fsp_err_t(* can_api_t::versionGet) (fsp_version_t *const p_version)
    -
    -

    Version get function for CAN device

    Implemented as
      -
    • R_CANFD_VersionGet()
      • -
    -
    -
    Parameters
    - - -
    [in]p_versionPointer to the memory to store the version information
    -
    -
    -
    @@ -755,6 +785,10 @@

    CAN_EVENT_ERR_GLOBAL 

    Global error has occurred.

    +CAN_EVENT_TX_FIFO_EMPTY 

    Transmit FIFO is empty.

    + +CAN_EVENT_FIFO_MESSAGE_LOST 

    Receive FIFO overrun.

    +

    @@ -830,29 +864,6 @@

    -

    ◆ can_global_id_mode_t

    - -
    -
    - - - - -
    enum can_global_id_mode_t
    -
    -

    Global CAN ID mode settings

    - - - - -
    Enumerator
    CAN_GLOBAL_ID_MODE_STANDARD 

    Standard IDs of 11 bits used.

    -
    CAN_GLOBAL_ID_MODE_EXTENDED 

    Extended IDs of 29 bits used.

    -
    CAN_GLOBAL_ID_MODE_MIXED 

    Both Standard and Extended IDs used.

    -
    -
    @@ -874,69 +885,6 @@

    -

    ◆ can_message_mode_t

    - -
    -
    - - - - -
    enum can_message_mode_t
    -
    -

    CAN Message Modes

    - - - -
    Enumerator
    CAN_MESSAGE_MODE_OVERWRITE 

    Receive data will be overwritten if not read before the next frame.

    -
    CAN_MESSAGE_MODE_OVERRUN 

    Receive data will be retained until it is read.

    -
    - -
    -
    - -

    ◆ can_clock_source_t

    - -
    -
    - - - - -
    enum can_clock_source_t
    -
    -

    CAN Source Clock

    - - - -
    Enumerator
    CAN_CLOCK_SOURCE_PCLKB 

    PCLKB is the source of the CAN Clock.

    -
    CAN_CLOCK_SOURCE_CANMCLK 

    CANMCLK is the source of the CAN Clock.

    -
    - -
    -
    - -

    ◆ can_mailbox_send_receive_t

    - -
    -
    - - - - -
    enum can_mailbox_send_receive_t
    -
    -

    CAN Mailbox type

    - - - -
    Enumerator
    CAN_MAILBOX_RECEIVE 

    Mailbox is for receiving.

    -
    CAN_MAILBOX_TRANSMIT 

    Mailbox is for sending.

    -
    -

    @@ -945,7 +893,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___c_a_n___a_p_i.js b/group___c_a_n___a_p_i.js index 38262e7..09487a0 100644 --- a/group___c_a_n___a_p_i.js +++ b/group___c_a_n___a_p_i.js @@ -1,5 +1,13 @@ var group___c_a_n___a_p_i = [ + [ "can_info_t", "group___c_a_n___a_p_i.html#structcan__info__t", [ + [ "status", "group___c_a_n___a_p_i.html#aec9d4439f59b61933c2205e4d3ea9210", null ], + [ "rx_mb_status", "group___c_a_n___a_p_i.html#ade07c155f14547df76ac44249e0d0feb", null ], + [ "rx_fifo_status", "group___c_a_n___a_p_i.html#a7cd7ac782cdb433247cc0f28f2755f81", null ], + [ "error_count_transmit", "group___c_a_n___a_p_i.html#ada0fe3e8eb824d0ebb36332f98e3c771", null ], + [ "error_count_receive", "group___c_a_n___a_p_i.html#a59787b23ec15fa38f51d167e10389081", null ], + [ "error_code", "group___c_a_n___a_p_i.html#a1ea2aaf80adb9f24fdee9828cae02e05", null ] + ] ], [ "can_bit_timing_cfg_t", "group___c_a_n___a_p_i.html#structcan__bit__timing__cfg__t", [ [ "baud_rate_prescaler", "group___c_a_n___a_p_i.html#a33ae62d869abaf989823b7bb1563de41", null ], [ "time_segment_1", "group___c_a_n___a_p_i.html#aafe4728b44b6abbb0f5d540e16d0be40", null ], @@ -9,8 +17,8 @@ var group___c_a_n___a_p_i = [ "can_frame_t", "group___c_a_n___a_p_i.html#structcan__frame__t", [ [ "id", "group___c_a_n___a_p_i.html#a49d4261f37f08f5a11cc3fc12c56cdc3", null ], [ "id_mode", "group___c_a_n___a_p_i.html#a4144eba26f77850571fca0498bec60ef", null ], - [ "data_length_code", "group___c_a_n___a_p_i.html#af58b9f3fe19ed69e0a635cd271c68404", null ], [ "type", "group___c_a_n___a_p_i.html#a79046fddb934fd7ea0d0cc70b8d7f26d", null ], + [ "data_length_code", "group___c_a_n___a_p_i.html#af58b9f3fe19ed69e0a635cd271c68404", null ], [ "options", "group___c_a_n___a_p_i.html#a27833816de50e1ad5b16b42856653ad8", null ], [ "data", "group___c_a_n___a_p_i.html#ad70086e98bfe0871e3f73d1f253138db", null ] ] ], @@ -21,12 +29,6 @@ var group___c_a_n___a_p_i = [ "p_context", "group___c_a_n___a_p_i.html#a663ed64c927057ab0ac45d02505dc758", null ], [ "frame", "group___c_a_n___a_p_i.html#aa8706fd62e652e6582d3c9eb155fb610", null ] ] ], - [ "can_mailbox_t", "group___c_a_n___a_p_i.html#structcan__mailbox__t", [ - [ "mailbox_id", "group___c_a_n___a_p_i.html#aa0c1d24b5896560908adb0ac9761aa28", null ], - [ "id_mode", "group___c_a_n___a_p_i.html#a9d3924b6ba4efb4c978a04d0e9a4fbc6", null ], - [ "mailbox_type", "group___c_a_n___a_p_i.html#aa6a30551456873fb921b933bd3ddbe23", null ], - [ "frame_type", "group___c_a_n___a_p_i.html#af01f0306a9ad2e430154d9d6a4e3404f", null ] - ] ], [ "can_cfg_t", "group___c_a_n___a_p_i.html#structcan__cfg__t", [ [ "channel", "group___c_a_n___a_p_i.html#a12f266c39b851a037b4d30ae5661e46b", null ], [ "p_bit_timing", "group___c_a_n___a_p_i.html#a751918f74effc746b381a75c971af879", null ], @@ -35,12 +37,8 @@ var group___c_a_n___a_p_i = [ "p_extend", "group___c_a_n___a_p_i.html#a0715ca299b94eea0ef2843b99e0d32e5", null ], [ "ipl", "group___c_a_n___a_p_i.html#a31ab501a9df967965b8085592b4d2ba1", null ], [ "error_irq", "group___c_a_n___a_p_i.html#ac958a7179da3a9f365a3bf55707fac6d", null ], - [ "mailbox_rx_irq", "group___c_a_n___a_p_i.html#a70c47efed0012e4512b7d7eca31e3e58", null ], - [ "mailbox_tx_irq", "group___c_a_n___a_p_i.html#afe91f3dd74163cacafbfb96ab2104df0", null ], - [ "p_mailbox", "group___c_a_n___a_p_i.html#a564584ef9e48317f93f432a0b86b9af8", null ], - [ "id_mode", "group___c_a_n___a_p_i.html#a34bf75f61795800b3df706b240fd7907", null ], - [ "mailbox_count", "group___c_a_n___a_p_i.html#a66e92277959e9e01a6ce2105dcdcbae6", null ], - [ "message_mode", "group___c_a_n___a_p_i.html#a0cb83f81e41146d1e688f88a69231d38", null ] + [ "rx_irq", "group___c_a_n___a_p_i.html#a88ba0583ec46ae65985a733c38975c38", null ], + [ "tx_irq", "group___c_a_n___a_p_i.html#ac495ac44fdee552f013eea5ba0e86b06", null ] ] ], [ "can_api_t", "group___c_a_n___a_p_i.html#structcan__api__t", [ [ "open", "group___c_a_n___a_p_i.html#a44ef1a1a3726114b30f228c54b0d44ce", null ], @@ -49,8 +47,7 @@ var group___c_a_n___a_p_i = [ "close", "group___c_a_n___a_p_i.html#a32ec8d31d80a709bae881f2e28d36d6c", null ], [ "modeTransition", "group___c_a_n___a_p_i.html#afb37a7735c6ac61a151a083b2d25153b", null ], [ "infoGet", "group___c_a_n___a_p_i.html#aba27908c89442250d365d4a44304e3c1", null ], - [ "callbackSet", "group___c_a_n___a_p_i.html#a0eeb3995e651ce4b77e8860ab50597a9", null ], - [ "versionGet", "group___c_a_n___a_p_i.html#aa3a9393d2130549479111743b1750b41", null ] + [ "callbackSet", "group___c_a_n___a_p_i.html#a0eeb3995e651ce4b77e8860ab50597a9", null ] ] ], [ "can_instance_t", "group___c_a_n___a_p_i.html#structcan__instance__t", [ [ "p_ctrl", "group___c_a_n___a_p_i.html#ae4d4d032f3e4f0688879027286ae4dbe", null ], @@ -69,7 +66,9 @@ var group___c_a_n___a_p_i = [ "CAN_EVENT_TX_ABORTED", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dba973c55ab2a29a1554f488fedf29fea8a", null ], [ "CAN_EVENT_RX_COMPLETE", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dbaa0bc5e15cee037a1d102b517ef63e161", null ], [ "CAN_EVENT_TX_COMPLETE", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dbac169b4940b7cb76562efd7439fc76949", null ], - [ "CAN_EVENT_ERR_GLOBAL", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dba8adaa142ed94841f5f282232ce414333", null ] + [ "CAN_EVENT_ERR_GLOBAL", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dba8adaa142ed94841f5f282232ce414333", null ], + [ "CAN_EVENT_TX_FIFO_EMPTY", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dba838c3a494516ccd0326bc1dad93e35d8", null ], + [ "CAN_EVENT_FIFO_MESSAGE_LOST", "group___c_a_n___a_p_i.html#ggacc2e5bc68e8b707c069ca27f521695dba4b9bfbf96c82d53ce3dd47e9a3237359", null ] ] ], [ "can_operation_mode_t", "group___c_a_n___a_p_i.html#gac29bd7d00b06d7457ae786471c296ba7", [ [ "CAN_OPERATION_MODE_NORMAL", "group___c_a_n___a_p_i.html#ggac29bd7d00b06d7457ae786471c296ba7abde5d9e8f5711b6fe8374671c96e6f72", null ], @@ -88,25 +87,8 @@ var group___c_a_n___a_p_i = [ "CAN_ID_MODE_STANDARD", "group___c_a_n___a_p_i.html#ggabc98e244722dcea05b5ce91bdb4c70c8a5d29b837d94d14fb99868c2d0a5220b0", null ], [ "CAN_ID_MODE_EXTENDED", "group___c_a_n___a_p_i.html#ggabc98e244722dcea05b5ce91bdb4c70c8abc5a87ed8edf218a6b44e4cceb48c0cb", null ] ] ], - [ "can_global_id_mode_t", "group___c_a_n___a_p_i.html#gab798132b937282be9589b6ed177ea999", [ - [ "CAN_GLOBAL_ID_MODE_STANDARD", "group___c_a_n___a_p_i.html#ggab798132b937282be9589b6ed177ea999af93ba7d9a4356ffa8c9b49f26c4f1b3d", null ], - [ "CAN_GLOBAL_ID_MODE_EXTENDED", "group___c_a_n___a_p_i.html#ggab798132b937282be9589b6ed177ea999a7dc9d3f494129db1c953915d1b781faa", null ], - [ "CAN_GLOBAL_ID_MODE_MIXED", "group___c_a_n___a_p_i.html#ggab798132b937282be9589b6ed177ea999aabdf871d5bbaf279c8dcf743ca64b488", null ] - ] ], [ "can_frame_type_t", "group___c_a_n___a_p_i.html#gad3ffe1ae0429fcd1053a969d96c47610", [ [ "CAN_FRAME_TYPE_DATA", "group___c_a_n___a_p_i.html#ggad3ffe1ae0429fcd1053a969d96c47610a1da44b52c2731b02cf02ca55eec08899", null ], [ "CAN_FRAME_TYPE_REMOTE", "group___c_a_n___a_p_i.html#ggad3ffe1ae0429fcd1053a969d96c47610a10c7ad0f4e083496ad3a3032fc533920", null ] - ] ], - [ "can_message_mode_t", "group___c_a_n___a_p_i.html#ga42c6d0b24e77b50c47ec54bafcac7604", [ - [ "CAN_MESSAGE_MODE_OVERWRITE", "group___c_a_n___a_p_i.html#gga42c6d0b24e77b50c47ec54bafcac7604ad8aab020d2b6d64777a0be580f44ddb4", null ], - [ "CAN_MESSAGE_MODE_OVERRUN", "group___c_a_n___a_p_i.html#gga42c6d0b24e77b50c47ec54bafcac7604af25ce6de3b35f5abe47186351372b8b7", null ] - ] ], - [ "can_clock_source_t", "group___c_a_n___a_p_i.html#ga5bf3c71a3b53b409e9ee682c69189a39", [ - [ "CAN_CLOCK_SOURCE_PCLKB", "group___c_a_n___a_p_i.html#gga5bf3c71a3b53b409e9ee682c69189a39a7c0cedacb23a57e50692191f61915cbd", null ], - [ "CAN_CLOCK_SOURCE_CANMCLK", "group___c_a_n___a_p_i.html#gga5bf3c71a3b53b409e9ee682c69189a39a5c90a69c9ba1a8116b6ec45ff238e117", null ] - ] ], - [ "can_mailbox_send_receive_t", "group___c_a_n___a_p_i.html#ga99db0880f7c03215e00781d3e57db3a3", [ - [ "CAN_MAILBOX_RECEIVE", "group___c_a_n___a_p_i.html#gga99db0880f7c03215e00781d3e57db3a3a5f4004ddfe179e388be8bb240527450e", null ], - [ "CAN_MAILBOX_TRANSMIT", "group___c_a_n___a_p_i.html#gga99db0880f7c03215e00781d3e57db3a3a1c100296f7b9384c8e09b55fd611242d", null ] ] ] ]; \ No newline at end of file diff --git a/group___c_a_n_f_d.html b/group___c_a_n_f_d.html index e58bad8..2afac19 100644 --- a/group___c_a_n_f_d.html +++ b/group___c_a_n_f_d.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Controller Area Network - Flexible Data (r_canfd) +RZV Flexible Software Package Documentation: Controller Area Network - Flexible Data (r_canfd) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    Controller Area Network - Flexible Data (r_canfd)
    Modules
    +
    Controller Area Network - Flexible Data (r_canfd)
    Modules » Connectivity
    @@ -111,7 +179,7 @@ - + @@ -127,18 +195,18 @@

    Common Features

    • Compatibility
      • Send and receive Classical CAN and CAN-FD frames on the same channel
        • -
      • Bitrate up to 1 Mbps with FD data phase speeds up to 4 Mbps
        • +
      • Bitrate up to 1 Mbps with FD data phase speeds up to 4-8 Mbps
      • Supports both ISO 11898-1
    • Buffers
        -
      • 32 global receive Message Buffers (RX MBs)
        • +
      • 32-96 global receive Message Buffers (RX MBs)
      • 8 global receive FIFOs (RX FIFOs)
        • -
      • 16 transmit Message Buffers (TX MBs) per channel
        • +
      • 16-32 transmit Message Buffers (TX MBs) per channel
    • Filtering
        -
      • Up to 128 filter rules across both channels
        • +
      • Up to 128-256 filter rules across both channels
      • Each filter rule can be individually configured to accept messages based on:
        • ID
        • Standard or Extended ID (IDE bit)
          • @@ -180,35 +248,35 @@

          Common Features

          Per-MPU Specifications

     
    fsp_err_t R_CANFD_ModeTransition (can_ctrl_t *const p_api_ctrl, can_operation_mode_t operation_mode, can_test_mode_t test_mode)
     
    fsp_err_t R_CANFD_InfoGet (can_ctrl_t *const p_api_ctrl, can_info_t *const p_info)
    fsp_err_t R_CANFD_InfoGet (can_ctrl_t *const p_api_ctrl, can_info_t *const p_info)
     
    fsp_err_t R_CANFD_CallbackSet (can_ctrl_t *const p_api_ctrl, void(*p_callback)(can_callback_args_t *), void const *const p_context, can_callback_args_t *const p_callback_memory)
     
    - + - + - + - + - + - + - + - + - + - +
    RZ/V2L
    RZ/V2L RZ/V2H
    Channels 2
    Channels 2 6
    Max nominal bitrate 1 Mbps
    Max nominal bitrate 1 Mbps 1 Mbps
    Max data bitrate 4 Mbps
    Max data bitrate 4 Mbps 8 Mbps
    Filter rules 128
    Filter rules 128 256
    TX message buffers 16/ch
    TX message buffers 16/ch 32/ch
    RX message buffers 32
    RX message buffers 32 96
    RX FIFOs 8
    RX FIFOs 8 8
    RX Buffer RAM 4864 bytes
    RX Buffer RAM 4864 bytes 14,592 bytes
    Standards ISO
    Standards ISO ISO
    Note
    Each message buffer comprises 12 header bytes plus data length (8-64 bytes). The above buffer RAM values therefore correspond to the following capacities: - + - + - +
    RZ/V2L
    RZ/V2L RZ/V2H
    Max 64-byte storage 64 messages
    Max 64-byte storage 64 messages 192 messages
    Max 8-byte storage 243 messages
    Max 8-byte storage 243 messages 729 messages
    -
    +

    Configuration

    Build Time Configurations for r_canfd

    @@ -217,57 +285,21 @@

    ConfigurationOptionsDefaultDescription -Global Error Interrupt > PriorityValue must be an integer between 0 and 25513 This interrupt is fired for each of the error sources selected below. +Global Error Interrupt > PriorityValue must be an integer between 0 and 25512 This interrupt is fired for each of the error sources selected below. -Global Error Interrupt > Sources
      -
    • -DLC Check
      • -
    • -Message Lost
      • -
    • -FD Payload Overflow
      • -
    -0U Select which errors should trigger an interrupt. +Global Error Interrupt > SourcesMCU Specific OptionsSelect which errors should trigger an interrupt. -Global Error Interrupt > Callback Channel
      -
    • -Channel 0
      • -
    • -Channel 1
      • -
    -Channel 1 Specify which channel callback should be called to handle global errors. When starting the driver this channel must be opened first. +Global Error Interrupt > Callback ChannelMCU Specific OptionsSpecify which channel callback should be called to handle global errors. When starting the driver this channel must be opened first. -Flexible Data (FD) > Protocol Exceptions
      -
    • -Enabled (ISO 11898-1)
      • -
    • -Disabled
      • -
    -Enabled (ISO 11898-1) Select whether to enter the protocol exception handling state when a RES bit is sampled recessive as defined in ISO 11898-1. +Flexible Data (FD) > Protocol ExceptionsMCU Specific OptionsSelect whether to enter the protocol exception handling state when a RES bit is sampled recessive as defined in ISO 11898-1. -Flexible Data (FD) > Payload Overflow
      -
    • -Reject
      • -
    • -Truncate
      • -
    -Reject Configure whether received messages larger than the destination buffer should be truncated or rejected. +Flexible Data (FD) > Payload OverflowMCU Specific OptionsConfigure whether received messages larger than the destination buffer should be truncated or rejected. -Reception > Message Buffers > Number of BuffersRX Message Buffer number must be an integer between 0 and 32.0 Number of message buffers available for reception.
    +Reception > Message Buffers > Number of BuffersManual Entry0 Number of message buffers available for reception.

    As there is no interrupt for message buffer reception it is recommended to use RX FIFOs instead. Set this value to 0 to disable RX Message Buffers. -Reception > Message Buffers > Payload Size
      -
    • -8 bytes
      • -
    • -12 bytes
      • -
    • -16 bytes
      • -
    • -20 bytes
      • -
    -8 bytes Payload size for all RX Message Buffers. +Reception > Message Buffers > Payload SizeMCU Specific OptionsPayload size for all RX Message Buffers. Reception > FIFOs > FIFO 0 > Enable
    • @@ -277,13 +309,13 @@

    Enabled Enable or disable RX FIFO 0. -Reception > FIFOs > FIFO 0 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 0. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 0 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 0. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 0 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 0. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 0 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 0. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 0 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 0. +Reception > FIFOs > FIFO 0 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 0. -Reception > FIFOs > FIFO 0 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 0. +Reception > FIFOs > FIFO 0 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 0. Reception > FIFOs > FIFO 1 > Enable
    • @@ -293,13 +325,13 @@

    Disabled Enable or disable RX FIFO 1. -Reception > FIFOs > FIFO 1 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 1. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 1 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 1. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 1 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 1. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 1 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 1. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 1 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 1. +Reception > FIFOs > FIFO 1 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 1. -Reception > FIFOs > FIFO 1 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 1. +Reception > FIFOs > FIFO 1 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 1. Reception > FIFOs > FIFO 2 > Enable
    • @@ -309,13 +341,13 @@

    Disabled Enable or disable RX FIFO 2. -Reception > FIFOs > FIFO 2 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 2. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 2 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 2. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 2 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 2. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 2 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 2. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 2 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 2. +Reception > FIFOs > FIFO 2 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 2. -Reception > FIFOs > FIFO 2 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 2. +Reception > FIFOs > FIFO 2 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 2. Reception > FIFOs > FIFO 3 > Enable
    • @@ -325,13 +357,13 @@

    Disabled Enable or disable RX FIFO 3. -Reception > FIFOs > FIFO 3 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 3. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 3 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 3. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 3 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 3. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 3 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 3. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 3 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 3. +Reception > FIFOs > FIFO 3 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 3. -Reception > FIFOs > FIFO 3 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 3. +Reception > FIFOs > FIFO 3 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 3. Reception > FIFOs > FIFO 4 > Enable
    • @@ -341,13 +373,13 @@

    Disabled Enable or disable RX FIFO 4. -Reception > FIFOs > FIFO 4 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 4. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 4 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 4. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 4 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 4. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 4 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 4. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 4 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 4. +Reception > FIFOs > FIFO 4 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 4. -Reception > FIFOs > FIFO 4 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 4. +Reception > FIFOs > FIFO 4 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 4. Reception > FIFOs > FIFO 5 > Enable
    • @@ -357,13 +389,13 @@

    Disabled Enable or disable RX FIFO 5. -Reception > FIFOs > FIFO 5 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 5. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 5 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 5. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 5 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 5. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 5 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 5. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 5 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 5. +Reception > FIFOs > FIFO 5 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 5. -Reception > FIFOs > FIFO 5 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 5. +Reception > FIFOs > FIFO 5 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 5. Reception > FIFOs > FIFO 6 > Enable
    • @@ -373,13 +405,13 @@

    Disabled Enable or disable RX FIFO 6. -Reception > FIFOs > FIFO 6 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 6. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 6 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 6. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. -Reception > FIFOs > FIFO 6 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 6. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 6 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 6. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 6 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 6. +Reception > FIFOs > FIFO 6 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 6. -Reception > FIFOs > FIFO 6 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 6. +Reception > FIFOs > FIFO 6 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 6. Reception > FIFOs > FIFO 7 > Enable
    • @@ -389,19 +421,27 @@

    Disabled Enable or disable RX FIFO 7. -Reception > FIFOs > FIFO 7 > Interrupt ModeMPU Specific OptionsSet the interrupt mode for RX FIFO 7. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. +Reception > FIFOs > FIFO 7 > Interrupt ModeMCU Specific OptionsSet the interrupt mode for RX FIFO 7. Threshold mode will only fire an interrupt each time an incoming message crosses the threshold value set below. + +Reception > FIFOs > FIFO 7 > Interrupt ThresholdMCU Specific OptionsSet the interrupt threshold value for RX FIFO 7. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. -Reception > FIFOs > FIFO 7 > Interrupt ThresholdMPU Specific OptionsSet the interrupt threshold value for RX FIFO 7. This setting is only applicable when the Interrupt Mode is set to 'At Threshold Value'. +Reception > FIFOs > FIFO 7 > Payload SizeMCU Specific OptionsSelect the message payload size for RX FIFO 7. -Reception > FIFOs > FIFO 7 > Payload SizeMPU Specific OptionsSelect the message payload size for RX FIFO 7. +Reception > FIFOs > FIFO 7 > DepthMCU Specific OptionsSelect the number of stages for RX FIFO 7. -Reception > FIFOs > FIFO 7 > DepthMPU Specific OptionsSelect the number of stages for RX FIFO 7. +Reception > FIFOs > Interrupt PriorityValue must be an integer between 0 and 25512 This priority level will apply to all FIFO interrupts globally. -Reception > FIFOs > Interrupt PriorityValue must be an integer between 0 and 25513 This priority level will apply to all FIFO interrupts globally. +Reception > Acceptance Filtering > Channel 0 Rule CountValue must be a non-negative integer64 Number of acceptance filter list rules dedicated to Channel 0. -Reception > Acceptance Filtering > Channel 0 Rule CountThe number of AFL rules must be an integer between 0 and 128.64 Number of acceptance filter list rules dedicated to Channel 0. +Reception > Acceptance Filtering > Channel 1 Rule CountValue must be a non-negative integer64 Number of acceptance filter list rules dedicated to Channel 1. -Reception > Acceptance Filtering > Channel 1 Rule CountThe number of AFL rules must be an integer between 0 and 128.64 Number of acceptance filter list rules dedicated to Channel 1. +Reception > Acceptance Filtering > Channel 2 Rule CountValue must be a non-negative integer0 Number of acceptance filter list rules dedicated to Channel 2. + +Reception > Acceptance Filtering > Channel 3 Rule CountValue must be a non-negative integer0 Number of acceptance filter list rules dedicated to Channel 3. + +Reception > Acceptance Filtering > Channel 4 Rule CountValue must be a non-negative integer0 Number of acceptance filter list rules dedicated to Channel 4. + +Reception > Acceptance Filtering > Channel 5 Rule CountValue must be a non-negative integer0 Number of acceptance filter list rules dedicated to Channel 5. Parameter Checking
    • @@ -413,65 +453,45 @@

    Default (BSP) If selected code for parameter checking is included in the build. -Transmission Priority
      -
    • -Message ID
      • -
    • -Buffer Number
      • -
    -Buffer Number Select how messages should be prioritized for transmission. In either case, lower numbers indicate higher priority. +Transmission PriorityMCU Specific OptionsSelect how messages should be prioritized for transmission. In either case, lower numbers indicate higher priority. -DLC Check
      -
    • -Disabled
      • -
    • -Enabled
      • -
    • -Enabled w/truncate
      • -
    -config.driver.canfd.dlc_check.disabled When enabled received messages will be rejected if their DLC field is less than the value configured in the associated AFL rule. If 'Enabled w/truncate' is selected and a message passes the DLC check the DLC field is set to the value in the associated AFL rule and any excess data is discarded. +DLC CheckMCU Specific OptionsWhen enabled received messages will be rejected if their DLC field is less than the value configured in the associated AFL rule. If 'Enabled w/truncate' is selected and a message passes the DLC check the DLC field is set to the value in the associated AFL rule and any excess data is discarded. -Clock Source
      -
    • -P0CLK/2
      • -
    • -CAN_CLK
      • -
    -P0CLK/2 Select the CANFD clock source. +Clock SourceMCU Specific OptionsSelect the CANFD clock source. -

    Configurations for Driver > Connectivity > CANFD Driver on r_canfd

    -This module can be added to the Stacks tab via New Stack > Driver > Connectivity > CANFD Driver on r_canfd.
    +

    Configurations for Connectivity > CANFD Driver on r_canfd

    +This module can be added to the Stacks tab via New Stack > Connectivity > CANFD Driver on r_canfd.

    - + - + - + - + - + - + - + - + - + - + - + - + - + - + - +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_canfd0 Module name.
    General > ChannelChannel should be 0 or 10 Specify the CAN channel to use.
    General > ChannelValue must be a non-negative integer0 Specify the CAN channel to use.
    Bitrate > Automatic > Clock source frequency (Set 0 if P0CLK use)Must be a valid integer.0 Input clock source frequency.
    Bitrate > Automatic > Clock source frequency (Set 0 if PCLK use)Must be a valid integer.0 Input clock source frequency.
    Bitrate > Automatic > Nominal Rate (bps)Must be a valid integer with a maximum of 1MHz.500000 Specify nominal bitrate in bits per second.
    Bitrate > Automatic > Data Rate (bps)Must be a valid integer with a maximum of 4MHz.2000000 Specify data bitrate in bits per second.
    Bitrate > Automatic > Data Rate (bps)Must be a valid integer greater than 0.2000000 Specify data bitrate in bits per second.
    Bitrate > Automatic > Sample Point (%)Must be a valid integer between 60 and 99.75 Specify desired sample point.
    Bitrate > Manual > Nominal > Prescaler (divisor)Value must be a non-negative integer between 1 and 1024.2 Specify clock divisor for nominal bitrate.
    Bitrate > Manual > Nominal > Prescaler (divisor)Manual Entry1 Specify clock divisor for nominal bitrate.
    Bitrate > Manual > Nominal > Time Segment 1 (Tq)Value must be a non-negative integer between 4 and 128.37 Select the Time Segment 1 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Nominal > Time Segment 1 (Tq)Manual Entry29 Select the Time Segment 1 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Nominal > Time Segment 2 (Tq)Value must be a non-negative integer between 2 and 32.12 Select the Time Segment 2 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Nominal > Time Segment 2 (Tq)Manual Entry10 Select the Time Segment 2 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Nominal > Sync Jump Width (Tq)Value must be a non-negative integer between 1 and 32.4 Select the Synchronization Jump Width value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Nominal > Sync Jump Width (Tq)Manual Entry4 Select the Synchronization Jump Width value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Data > Prescaler (divisor)Value must be a non-negative integer between 1 and 256.2 Specify clock divisor for data bitrate.
    Bitrate > Manual > Data > Prescaler (divisor)Manual Entry1 Specify clock divisor for data bitrate.
    Bitrate > Manual > Data > Time Segment 1 (Tq)Value must be a non-negative integer between 2 and 16.9 Select the Time Segment 1 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Data > Time Segment 1 (Tq)Manual Entry12 Select the Time Segment 1 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Data > Time Segment 2 (Tq)Value must be a non-negative integer between 2 and 8.3 Select the Time Segment 2 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Data > Time Segment 2 (Tq)Manual Entry4 Select the Time Segment 2 value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Data > Sync Jump Width (Tq)Value must be a non-negative integer between 1 and 8.1 Select the Synchronization Jump Width value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Data > Sync Jump Width (Tq)Manual Entry1 Select the Synchronization Jump Width value. Check module usage notes for how to calculate this value.
    Bitrate > Manual > Use manual settings
    • @@ -491,57 +511,45 @@

      Configurations for Driver > Connectivity > CANFD Driver on r_canfd

    		Interrupts > CallbackName must be a valid C symbolcanfd0_callback A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time any interrupt occurs.
    Interrupts > Channel Interrupt Priority LevelValue must be an integer between 0 and 25513 Channel Error/Transmit interrupt priority.
    Interrupts > Channel Interrupt Priority LevelValue must be an integer between 0 and 25512 Channel Error/Transmit interrupt priority.
    Transmit InterruptsRefer to the Configuration tool for available options.0ULL Select which TX Message Buffers should trigger an interrupt when transmission is complete.
    Transmit InterruptsMCU Specific OptionsSelect which TX Message Buffers should trigger an interrupt when transmission is complete.
    Channel Error Interrupts
      -
    • -Error Warning
      • -
    • -Error Passive
      • -
    • -Bus-Off Entry
      • -
    • -Bus-Off Recovery
      • -
    • -Overload
      • -
    -    		0U Select which channel error interrupt sources to enable.
    Channel Error InterruptsMCU Specific OptionsSelect which channel error interrupt sources to enable.
    TX Buffer Merge Mode
      -
    • -Disable (Transmit Payloads 20bytes or less)
      • -
    • -Enable (Transmit payloads over 20bytes at TX MB0,3)
      • -
    -    		Disable (Transmit Payloads 20bytes or less) When enabled the CANFD module set Transmit buffer merge mode enable. TX MB0,3 are able to transmit payload with a length of more than 20 bytes.
    TX Buffer Merge ModeMCU Specific OptionsWhen enabled the CANFD module set Transmit buffer merge mode enable. TX MB0,3 are able to transmit payload with a length of more than 20 bytes.
    Filter List ArrayName must be a valid C symbolp_canfd0_afl Acceptance Filter List (AFL) rule array symbol name.

    Clock Configuration

    -

    The CANFD peripheral uses either P0/2 clock or CAN_CLK which is an externally input clock as its clock source. The RZ Configuration editor will attempt to get as close as possible to the supplied bitrate with the configured clock source. To achieve an exact bitrate the CANFD source clock or divisor may need to be adjusted to meet the criteria in the formula below:

    +

    The CANFD peripheral uses the clocks shown in the table below as its clock sources.

    + + + + + +
    RZ/V2L RZ/V2H
    Clock Source P0 clock/2 or External CANFD Clock*1 CANFD_0_pclk
    +

    *1: Externally input clock to the CAN_CLK pin

    +

    To achieve an exact bitrate the CANFD source clock or divisor may need to be adjusted to meet the criteria in the formula below:

    bitrate = canfd_clock_hz / ((time_segment_1 + time_segment_2 + 1) * prescalar)

    For CANFD, the possible values for each element are as follows:

    - + - + - + - +
    Element Min Max (Nominal) Max (Data)
    Bitrate - 1 Mbps 4 Mbps
    Bitrate - 1 Mbps 4-8 Mbps*1
    Time Segment 1 2* Tq 128 Tq 16 Tq
    Time Segment 1 2 Tq 128 Tq 16-32 Tq*2
    Time Segment 2 2 Tq 32 Tq 8 Tq
    Time Segment 2 2 Tq 32 Tq 8-16 Tq*3
    Sync Jump Width 1 Tq Time Segment 2 Time Segment 2
    Sync Jump Width 2 Tq (Nominal) / 1 Tq (Data)*2 Time Segment 2 Time Segment 2
    Prescalar 1 1024 256
    -
      -
    • 4 Tq for Nominal.
      • -
    -

    In the Stacks tab of the CANFD on the RZ Configuration editor, you can choose whether to use the P0/2 clock or the CAN_CLK in the Clock Source option.

    +

    *1: RZ/V2L supports up to 4 Mbps; RZ/V2H supports up to 8 Mbps. *2: RZ/V2L supports up to 16 Tq; RZ/V2H supports up to 32 Tq. *3: RZ/V2L supports up to 8 Tq; RZ/V2H supports up to 16 Tq.

    +
    Note
    RZ/V FSP does not support changing the frequency of the peripheral clock used in CANFD.

    Pin Configuration

    CANFD channels each control two pins: CRX (receive) and CTX (transmit).

    @@ -554,7 +562,7 @@

    TX Message Buffers

    TX MBs are used for transmission only. Refer to the hardware manual for your device for information on which TX MBs are available.

    Note
    The CANFD peripheral continually scans TX MBs for new data. Depending on the provided clock it may be possible to write to multiple TX MBs before transmission begins. In this case, messages will be sent in the priority specified by the Transmission Priority option in the RZ Configuration editor.

    RX Message Buffers

    -

    RX MBs are for reception only and may only hold one message at a time. 32 total RX MBs are available and are shared across all channels.

    +

    RX MBs are for reception only and may only hold one message at a time. 32-96 total RX MBs are available and are shared across all channels.

    No interrupts are provided for RX MBs. Use R_CANFD_InfoGet and R_CANFD_Read to poll and read them, respectively.

    RX FIFOs

    RX FIFOs provide interrupt-driven queue functionality for receiving messages and are shared across all channels. All FIFOs have the following capabilities:

    @@ -758,7 +766,7 @@

    AFL rules list. -uint16_t +uint64_t txmb_txi_enable @@ -882,6 +890,18 @@

    CANFD_ERROR_GLOBAL_PAYLOAD_OVERFLOW 

    FD Payload Overflow.

    +CANFD_ERROR_GLOBAL_TXQ_OVERWRITE 

    TX Queue Message Overwrite.

    + +CANFD_ERROR_GLOBAL_TXQ_MESSAGE_LOST 

    TX Queue Message Lost.

    + +CANFD_ERROR_GLOBAL_CH0_SCAN_FAIL 

    Channel 0 RX Scan Failure.

    + +CANFD_ERROR_GLOBAL_CH1_SCAN_FAIL 

    Channel 1 RX Scan Failure.

    + +CANFD_ERROR_GLOBAL_CH0_ECC 

    Channel 0 ECC Error.

    + +CANFD_ERROR_GLOBAL_CH1_ECC 

    Channel 1 ECC Error.

    +

    @@ -1106,7 +1126,8 @@

    FSP_ERR_CAN_TRANSMIT_NOT_READYTransmit in progress, cannot write data at this time. FSP_ERR_INVALID_ARGUMENTData length or buffer number invalid. FSP_ERR_INVALID_MODEAn FD option was set on a non-FD frame. - FSP_ERR_ASSERTIONNull pointer presented + FSP_ERR_ASSERTIONOne or more pointer arguments is NULL. + FSP_ERR_UNSUPPORTEDFD is not supported on this MPU. @@ -1218,7 +1239,7 @@

    - can_info_t *const  + can_info_t *const  p_info  @@ -1296,7 +1317,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___c_a_n_f_d.js b/group___c_a_n_f_d.js index 5086985..ba202de 100644 --- a/group___c_a_n_f_d.js +++ b/group___c_a_n_f_d.js @@ -11,7 +11,7 @@ var group___c_a_n_f_d = ] ], [ "canfd_extended_cfg_t", "group___c_a_n_f_d.html#structcanfd__extended__cfg__t", [ [ "p_afl", "group___c_a_n_f_d.html#a3bcb58bb257835c3618f28751aad29a5", null ], - [ "txmb_txi_enable", "group___c_a_n_f_d.html#a1a95c697fe49bba12e5ddb7e21b04572", null ], + [ "txmb_txi_enable", "group___c_a_n_f_d.html#ab3421077c295a40773c6cad2fb638176", null ], [ "error_interrupts", "group___c_a_n_f_d.html#a0c05dacb48970397676e54a01c81d0e1", null ], [ "p_data_timing", "group___c_a_n_f_d.html#a924d2187cf551c85ded2b148e26bbfd9", null ], [ "delay_compensation", "group___c_a_n_f_d.html#a3b38e8d28731a86eb521db8a5c5ae85e", null ], @@ -47,7 +47,13 @@ var group___c_a_n_f_d = [ "CANFD_ERROR_CHANNEL_ACK_DELIMITER", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4a5c4e3bece7c60441a51d3899e73a158f", null ], [ "CANFD_ERROR_GLOBAL_DLC", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4ac1b7da9fdca7a6fa3c9b9ba33371f4a8", null ], [ "CANFD_ERROR_GLOBAL_MESSAGE_LOST", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4abee1888c27382c7121781db44c31bc2b", null ], - [ "CANFD_ERROR_GLOBAL_PAYLOAD_OVERFLOW", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4a5d38f69b80c5a2ca136cc2372885dd15", null ] + [ "CANFD_ERROR_GLOBAL_PAYLOAD_OVERFLOW", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4a5d38f69b80c5a2ca136cc2372885dd15", null ], + [ "CANFD_ERROR_GLOBAL_TXQ_OVERWRITE", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4aabb74eb7c63e572823fdc251ee430510", null ], + [ "CANFD_ERROR_GLOBAL_TXQ_MESSAGE_LOST", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4a46568698565919a0a2f47cb8f3641799", null ], + [ "CANFD_ERROR_GLOBAL_CH0_SCAN_FAIL", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4a12b3e818b05c74a2e138ea58893151af", null ], + [ "CANFD_ERROR_GLOBAL_CH1_SCAN_FAIL", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4abad26cd9692b98e885b8f80eea26c9d9", null ], + [ "CANFD_ERROR_GLOBAL_CH0_ECC", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4acc2641aa9a3f9543af9d27313ba09001", null ], + [ "CANFD_ERROR_GLOBAL_CH1_ECC", "group___c_a_n_f_d.html#gga1598f08872dd960675f060c7e8c35cf4a632b3d6e96c5d7f468dfd4c0b33b1f86", null ] ] ], [ "canfd_tx_mb_t", "group___c_a_n_f_d.html#gaa7408bbf08466fb0f6025a8dfd93c714", null ], [ "canfd_rx_buffer_t", "group___c_a_n_f_d.html#gacccf33f0942180054dd71c26c512844d", null ], diff --git a/group___c_m_t_w.html b/group___c_m_t_w.html new file mode 100644 index 0000000..fb5b0e3 --- /dev/null +++ b/group___c_m_t_w.html @@ -0,0 +1,1234 @@ + + + + + + + +RZV Flexible Software Package Documentation: Compare Match Timer W (r_cmtw) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Enumerations
    +
    +
    Compare Match Timer W (r_cmtw)
    Modules » Timers
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_CMTW_Close (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CMTW_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)
     
    fsp_err_t R_CMTW_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)
     
    fsp_err_t R_CMTW_Reset (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CMTW_Start (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CMTW_Enable (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CMTW_Disable (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CMTW_InfoGet (timer_ctrl_t *const p_ctrl, timer_info_t *const p_info)
     
    fsp_err_t R_CMTW_StatusGet (timer_ctrl_t *const p_ctrl, timer_status_t *const p_status)
     
    fsp_err_t R_CMTW_Stop (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CMTW_Open (timer_ctrl_t *const p_ctrl, timer_cfg_t const *const p_cfg)
     
    fsp_err_t R_CMTW_OutputEnable (timer_ctrl_t *const p_ctrl, cmtw_io_pin_t pin)
     
    fsp_err_t R_CMTW_OutputDisable (timer_ctrl_t *const p_ctrl, cmtw_io_pin_t pin)
     
    fsp_err_t R_CMTW_CallbackSet (timer_ctrl_t *const p_api_ctrl, void(*p_callback)(timer_callback_args_t *), void const *const p_context, timer_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the CMTW peripheral on RZ MPUs. This module implements the Timer Interface.

    +

    +Overview

    +

    +Features

    +

    The CMTW module has the following features:

      +
    • Supports periodic mode and one-shot mode.
      • +
    • Supports Input capture function, Output compare function, and Compare match function.
      • +
    • Signal can be output to a pin.
      • +
    • Configurable period (counts per timer cycle).
      • +
    • Supports runtime reconfiguration of period.
      • +
    • APIs are provided to start, stop, and reset the counter.
      • +
    • APIs are provided to get the current period, source clock frequency, and count direction.
      • +
    • APIs are provided to get the current timer status and counter value.
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_cmtw

    +The following build time configurations are defined in fsp_cfg/r_cmtw_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Timers > Timer Driver on r_cmtw

    +This module can be added to the Stacks tab via New Stack > Timers > Timer Driver on r_cmtw.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_timer0 Module name.
    General > ChannelChannel number does not exist0 Physical hardware channel.
    General > Mode
      +
    • +Periodic
      • +
    • +One-Shot
      • +
    +    		Periodic Mode selection. Note: One-shot mode is implemented in software. ISR's must be enabled for one shot even if callback is unused.
    General > PeriodValue must be non-negative0x10000 Specify the timer period based on the selected unit.
    General > Period Unit
      +
    • +Raw Counts
      • +
    • +Nanoseconds
      • +
    • +Microseconds
      • +
    • +Milliseconds
      • +
    • +Seconds
      • +
    • +Hertz
      • +
    • +Kilohertz
      • +
    +    		Raw Counts Unit of the period specified above
    General > Counter Size
      +
    • +32-bit
      • +
    • +16-bit
      • +
    +    		32-bit Size of the timer counter
    General > Counter Clear Source
      +
    • +Compare Match
      • +
    • +Disabled
      • +
    • +Input Capture0
      • +
    • +Input Capture1
      • +
    • +Output Compare0
      • +
    • +Output Compare1
      • +
    +    		Compare Match Select the Counter Clear Source.
    Output > TOC0 Output
      +
    • +Disabled
      • +
    • +Start Level Low and Toggle Output
      • +
    • +Start Level High and Toggle Output
      • +
    +    		Disabled Configure TOC0 output.
    Output > TOC1 Output
      +
    • +Disabled
      • +
    • +Start Level Low and Toggle Output
      • +
    • +Start Level High and Toggle Output
      • +
    +    		Disabled Configure TOC1 output.
    Output > TOC0 Output Enable
      +
    • +Output Disable
      • +
    • +Output Enable
      • +
    +    		Output Disable Configure TOC0 output enable.
    Output > TOC1 Output Enable
      +
    • +Output Disable
      • +
    • +Output Enable
      • +
    +    		Output Disable Configure TOC1 output enable.
    Input > TIC0 Capture Trigger
      +
    • +Rising Edge
      • +
    • +Falling Edge
      • +
    • +Both Edge
      • +
    +    		Rising Edge Select the trigger edge.
    Input > TIC1 Capture Trigger
      +
    • +Rising Edge
      • +
    • +Falling Edge
      • +
    • +Both Edge
      • +
    +    		Rising Edge Select the trigger edge.
    Input > TIC0 Input Enable
      +
    • +Input Disable
      • +
    • +Input Enable
      • +
    +    		Input Disable Configure TIC0 output enable.
    Input > TIC1 Input Enable
      +
    • +Input Disable
      • +
    • +Input Enable
      • +
    +    		Input Disable Configure TIC1 output enable.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the timer period elapses.
    Interrupts > Compare Match Interrupt EnableMCU Specific OptionsCompare match interrupt enanble.
    Interrupts > Compare Match Interrupt PriorityValue must be an integer between 0 and 2555 Compare match interrupt priority.
    Interrupts > Input Capture 0 Interrupt EnableMCU Specific OptionsInput capture 0 interrupt enanble.
    Interrupts > Input Capture 0 Interrupt PriorityValue must be an integer between 0 and 2555 Input capture 0 interrupt priority.
    Interrupts > Input Capture 1 Interrupt EnableMCU Specific OptionsInput capture 1 interrupt enanble.
    Interrupts > Input Capture 1 Interrupt PriorityValue must be an integer between 0 and 2555 Input capture 1 interrupt priority.
    Interrupts > Output Compare 0 Interrupt EnableMCU Specific OptionsOutput capture 0 interrupt enanble.
    Interrupts > Output Compare 0 Interrupt PriorityValue must be an integer between 0 and 2555 Output capture 0 interrupt priority.
    Interrupts > Output Compare 1 Interrupt EnableMCU Specific OptionsOutput capture 1 interrupt enanble.
    Interrupts > Output Compare 1 Interrupt PriorityValue must be an integer between 0 and 2555 Output capture 1 interrupt priority.
    +

    +

    +Clock Configuration

    +

    The CMTW clock is based on the PLLCM33 and PLLCLN. You can set the clock frequency using the Clocks tab of the FSP Configuration editor or by using the CGC Interface at run-time.

    +

    +Pin Configuration

    +

    This module can use the TOC0 and TOC1 pins as output pins for output compare or one-shot signals.

    +

    For input capture, the input signal must be applied to the TIC0 or TIC1 pin.

    +

    +Timer Period

    +

    The FSP Configuration editor will automatically calculate the period count value and source clock divider based on the selected period time, units, and clock speed.

    + + + + + + + +
    Channel Clock source Maximum period (counts)
    CMTW0-CMTW3 PLLCM33 clock 0x100000000
    CMTW4-CMTW7 PLLCLN clock 0x100000000
    +
    Note
    Because the period interrupt occurs when the counter overflows, setting the period register to 0 results in an effective period of 1 count. For this reason all user-provided raw count values reflect the actual number of period counts (not the raw register values).
    +

    +Usage Notes

    +

    One-Shot Mode

    +

    The CMTW timer does not support one-shot mode natively. One-shot mode is achieved by stopping the timer in the interrupt service routine before the callback is called. If the interrupt is not serviced before the timer period expires again, the timer generates more than one event. The callback is only called once in this case, but multiple events may be generated if the timer is linked to the DMAC.

    +

    One-Shot Mode Output

    +

    Examples of one-shot signals that can be generated by this module are shown below:

    +
    +r_gpt_one_shot_output.svg +
    +GPT One-Shot Output
    +

    Output Compare

    +

    The TOC0 or TOC1 pin toggles each time the timer expires in output compare mode.

    +

    Examples of periodic signals that can be generated by this module are shown below:

    +
    +r_gpt_periodic_output.svg +
    +GPT Periodic Output
    +

    +Examples

    +

    CMTW Basic Example

    +

    This is a basic example of minimal use of the CMTW in an application.

    +
    void cmtw_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    __asm volatile ("cpsie i");
    __asm volatile ("isb");
    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);
    }

    CMTW Callback Example

    +

    This is an example of a timer callback.

    +
    /* Example callback called when timer expires. */
    void timer_callback (timer_callback_args_t * p_args)
    {
    if (TIMER_EVENT_CYCLE_END == p_args->event)
    {
    /* Add application code to be called periodically here. */
    }
    }

    CMTW Free Running Counter Example

    +

    To use the CMTW as a free running counter, select periodic mode and set the the Period to 0xFFFF (16-bit counter) or 0xFFFFFFFF (32-bit counter).

    +
    void cmtw_counter_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);
    /* (Optional) Stop the timer. */
    (void) R_CMTW_Stop(&g_timer0_ctrl);
    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_CMTW_StatusGet(&g_timer0_ctrl, &status);
    }

    CMTW Input Capture Example

    +

    This is an example of using the CMTW to capture pulse width or pulse period measurements.

    +
    /* Example callback called when a capture occurs. */
    uint64_t g_captured_time = 0U;
    uint32_t g_capture_overflows = 0U;
    void timer_capture_callback (timer_callback_args_t * p_args)
    {
    if (TIMER_EVENT_CAPTURE_A == p_args->event)
    {
    /* (Optional) Get the current period if not known. */
    timer_info_t info;
    (void) R_CMTW_InfoGet(&g_timer0_ctrl, &info);
    uint32_t period = info.period_counts;
    /* Process capture from CMTWm_TIC0/CMTWm_TIC1. */
    g_captured_time = ((uint64_t) period * g_capture_overflows) + p_args->capture;
    g_capture_overflows = 0U;
    }
    if (TIMER_EVENT_CYCLE_END == p_args->event)
    {
    /* An overflow occurred during capture. This must be accounted for at the application layer. */
    g_capture_overflows++;
    }
    }
    void cmtw_capture_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    __asm volatile ("cpsie i");
    __asm volatile ("isb");
    /* Enable captures. Captured values arrive in the interrupt. */
    (void) R_CMTW_Enable(&g_timer0_ctrl);
    /* (Optional) Disable captures. */
    (void) R_CMTW_Disable(&g_timer0_ctrl);
    }

    CMTW Period Update Example

    +

    This an example of updating the period.

    +
    #define CMTW_EXAMPLE_MSEC_PER_SEC (1000)
    #define CMTW_EXAMPLE_DESIRED_PERIOD_MSEC (20)
    /* This example shows how to calculate a new period value at runtime. */
    void cmtw_period_calculation_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);
    /* Get the source clock frequency (in Hz). There are several ways to do this in FSP:
    * - Use the R_CMTW_InfoGet function (it accounts for the clock source and divider).
    * - Calculate the current PCLKL frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKL) and right shift
    * by timer_cfg_t::source_div.
    *
    * This example uses the last option (R_FSP_SystemClockHzGet).
    */
    uint32_t timer_freq_hz = R_FSP_SystemClockHzGet(BSP_FEATURE_CMTW_SOURCE_CLOCK) >> g_timer0_cfg.source_div;
    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT32_MAX / pclkl_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
    (uint32_t) (((uint64_t) timer_freq_hz * CMTW_EXAMPLE_DESIRED_PERIOD_MSEC) / CMTW_EXAMPLE_MSEC_PER_SEC);
    /* Set the calculated period. This will return an error if parameter checking is enabled and the calculated
    * period is larger than UINT16_MAX when the count value is 16-bit wide. */
    err = R_CMTW_PeriodSet(&g_timer0_ctrl, period_counts);
    handle_error(err);
    }
    + + + + + +

    +Data Structures

    struct  cmtw_instance_ctrl_t
     
    struct  cmtw_extended_cfg_t
     
    + + + + + + + + + + + + + +

    +Enumerations

    enum  cmtw_source_edge_t
     
    enum  cmtw_output_pin_t
     
    enum  cmtw_clear_source_t
     
    enum  cmtw_io_pin_t
     
    enum  cmtw_output_control_t
     
    enum  cmtw_input_control_t
     
    +

    Data Structure Documentation

    + +

    ◆ cmtw_instance_ctrl_t

    + +
    +
    + + + + +
    struct cmtw_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when timer_api_t::open is called.

    +
    +
    +
    + +

    ◆ cmtw_extended_cfg_t

    + +
    +
    + + + + +
    struct cmtw_extended_cfg_t
    +
    +

    Optional CMTW extension data structure.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +cmtw_output_pin_t +toc0 +Configure TOC0 pin.
    +cmtw_output_pin_t +toc1 +Configure TOC1 pin.
    +cmtw_output_control_t +toc0_control +OutputCompare0 enable setting.
    +cmtw_output_control_t +toc1_control +OutputCompare1 enable setting.
    +cmtw_source_edge_t +capture_ic0_source +Event sources that trigger capture of TIC0.
    +cmtw_source_edge_t +capture_ic1_source +Event sources that trigger capture of TIC1.
    +cmtw_input_control_t +ic0_control +InputCapture0 enable setting.
    +cmtw_input_control_t +ic1_control +InputCapture1 enable setting.
    +cmtw_clear_source_t +clear_source +Counter clear source.
    +timer_variant_t +counter_size +Timer counter size.
    +uint8_t +capture_ic0_ipl +InputCapture 0 interrupt priority.
    +uint8_t +capture_ic1_ipl +InputCapture 1 interrupt priority.
    +IRQn_Type +capture_ic0_irq +InputCapture 0 interrupt.
    +IRQn_Type +capture_ic1_irq +InputCapture 1 interrupt.
    +uint8_t +compare_oc0_ipl +OutputCompare 0 interrupt priority.
    +uint8_t +compare_oc1_ipl +OutputCompare 1 interrupt priority.
    +IRQn_Type +compare_oc0_irq +OutputCompare 0 interrupt.
    +IRQn_Type +compare_oc1_irq +OutputCompare 1 interrupt.
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ cmtw_source_edge_t

    + +
    +
    + + + + +
    enum cmtw_source_edge_t
    +
    +

    Trigger edge for Input capture function.

    + + + + +
    Enumerator
    CMTW_SOURCE_EDGE_RISING 

    Input capture trigger on rising edge.

    +
    CMTW_SOURCE_EDGE_FALLING 

    Input capture trigger on falling edge.

    +
    CMTW_SOURCE_EDGE_BOTH 

    Input capture trigger on both edge.

    +
    + +
    +
    + +

    ◆ cmtw_output_pin_t

    + +
    +
    + + + + +
    enum cmtw_output_pin_t
    +
    +

    Level of CMTW pin

    + + + + +
    Enumerator
    CMTW_OUTPUT_PIN_RETAIN 

    Retain output value.

    +
    CMTW_OUTPUT_PIN_START_LEVEL_LOW 

    Pin level low.

    +
    CMTW_OUTPUT_PIN_START_LEVEL_HIGH 

    Pin level high.

    +
    + +
    +
    + +

    ◆ cmtw_clear_source_t

    + +
    +
    + + + + +
    enum cmtw_clear_source_t
    +
    +

    Clear source of CMWCNT

    + + + + + + + +
    Enumerator
    CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWCOR 

    Counter is cleared by CMWCOR compare match.

    +
    CMTW_CLEAR_SOURCE_DISABLED 

    Counter is not cleared.

    +
    CMTW_CLEAR_SOURCE_INPUT_CAPTURE_CMWICR0 

    Counter is cleared by CMWICR0 input capture.

    +
    CMTW_CLEAR_SOURCE_INPUT_CAPTURE_CMWICR1 

    Counter is cleared by CMWICR1 input capture.

    +
    CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWOCR0 

    Counter is cleared by CMWOCR0 output compare.

    +
    CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWOCR1 

    Counter is cleared by CMWOCR1 output compare.

    +
    + +
    +
    + +

    ◆ cmtw_io_pin_t

    + +
    +
    + + + + +
    enum cmtw_io_pin_t
    +
    +

    Output pins, used to select

    + + + + +
    Enumerator
    CMTW_IO_PIN_TOC0 

    TOC0.

    +
    CMTW_IO_PIN_TOC1 

    TOC1.

    +
    CMTW_IO_PIN_TOC0_AND_TOC1 

    TOC0 and TOC1.

    +
    + +
    +
    + +

    ◆ cmtw_output_control_t

    + +
    +
    + + + + +
    enum cmtw_output_control_t
    +
    + + + +
    Enumerator
    CMTW_OUTPUT_CONTROL_DISABLED 

    OutputCompare disabled.

    +
    CMTW_OUTPUT_CONTROL_ENABLED 

    OutputCompare enabled.

    +
    + +
    +
    + +

    ◆ cmtw_input_control_t

    + +
    +
    + + + + +
    enum cmtw_input_control_t
    +
    + + + +
    Enumerator
    CMTW_INPUT_CONTROL_DISABLED 

    InputCapture disabled.

    +
    CMTW_INPUT_CONTROL_ENABLED 

    InputCapture enabled.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_CMTW_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CMTW_Close (timer_ctrl_t *const p_ctrl)
    +
    +

    Stops counter, disables interrupts, disables output pins, and clears internal driver data. Implements timer_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSTimer closed.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_PeriodSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_PeriodSet (timer_ctrl_t *const p_ctrl,
    uint32_t const period_counts 
    )
    +
    +

    Updates period. The new period is updated immediately. Implements timer_api_t::periodSet.

    +
    Warning
    Stop the timer before calling this function if one-shot output is used.
    +

    Example:

    /* Get the source clock frequency (in Hz). There are several ways to do this in FSP:
    * - Use the R_CMTW_InfoGet function (it accounts for the clock source and divider).
    * - Calculate the current PCLKL frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_PCLKL) and right shift
    * by timer_cfg_t::source_div.
    *
    * This example uses the last option (R_FSP_SystemClockHzGet).
    */
    uint32_t timer_freq_hz = R_FSP_SystemClockHzGet(BSP_FEATURE_CMTW_SOURCE_CLOCK) >> g_timer0_cfg.source_div;
    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT32_MAX / pclkl_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
    (uint32_t) (((uint64_t) timer_freq_hz * CMTW_EXAMPLE_DESIRED_PERIOD_MSEC) / CMTW_EXAMPLE_MSEC_PER_SEC);
    /* Set the calculated period. This will return an error if parameter checking is enabled and the calculated
    * period is larger than UINT16_MAX when the count value is 16-bit wide. */
    err = R_CMTW_PeriodSet(&g_timer0_ctrl, period_counts);
    handle_error(err);
    Return values
    + + + + +
    FSP_SUCCESSPeriod value updated.
    FSP_ERR_ASSERTIONA required pointer was NULL, or the period was not in the valid range of 1 to 0xFFFF in 16bit counter or 1 to 0xFFFFFFFF in 32bit counter.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_DutyCycleSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_DutyCycleSet (timer_ctrl_t *const p_ctrl,
    uint32_t const duty_cycle_counts,
    uint32_t const pin 
    )
    +
    +

    Updates duty cycle. If the timer is counting, the new duty cycle is reflected after the next counter underflow. Implements timer_api_t::dutyCycleSet.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDCMTW duty cycle set is not supported.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_Reset()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CMTW_Reset (timer_ctrl_t *const p_ctrl)
    +
    +

    Resets the counter value to 0. Implements timer_api_t::reset.

    +
    Return values
    + + + + +
    FSP_SUCCESSCounter reset.
    FSP_ERR_ASSERTIONp_ctrl is NULL
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_Start()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CMTW_Start (timer_ctrl_t *const p_ctrl)
    +
    +

    Starts timer. Implements timer_api_t::start.

    +

    Example:

    /* Start the timer. */
    (void) R_CMTW_Start(&g_timer0_ctrl);
    Return values
    + + + + +
    FSP_SUCCESSTimer started.
    FSP_ERR_ASSERTIONp_ctrl is null.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_Enable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CMTW_Enable (timer_ctrl_t *const p_ctrl)
    +
    +

    Enables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::enable.

    +

    Example:

    /* Enable captures. Captured values arrive in the interrupt. */
    (void) R_CMTW_Enable(&g_timer0_ctrl);
    Return values
    + + + + +
    FSP_SUCCESSExternal events successfully enabled.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_Disable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CMTW_Disable (timer_ctrl_t *const p_ctrl)
    +
    +

    Disables external event triggers that start, stop, clear, or capture the counter. Implements timer_api_t::disable.

    +

    Example:

    /* (Optional) Disable captures. */
    (void) R_CMTW_Disable(&g_timer0_ctrl);
    Return values
    + + + + +
    FSP_SUCCESSExternal events successfully disabled.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_InfoGet (timer_ctrl_t *const p_ctrl,
    timer_info_t *const p_info 
    )
    +
    +

    Gets timer information and store it in provided pointer p_info. Implements timer_api_t::infoGet.

    +

    Example:

    /* (Optional) Get the current period if not known. */
    timer_info_t info;
    (void) R_CMTW_InfoGet(&g_timer0_ctrl, &info);
    uint32_t period = info.period_counts;
    Return values
    + + + + +
    FSP_SUCCESSPeriod, count direction, and frequency stored in p_info.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_StatusGet (timer_ctrl_t *const p_ctrl,
    timer_status_t *const p_status 
    )
    +
    +

    Retrieves the current state and counter value stores them in p_status. Implements timer_api_t::statusGet.

    +

    Example:

    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_CMTW_StatusGet(&g_timer0_ctrl, &status);
    Return values
    + + + + +
    FSP_SUCCESSCurrent status and counter value provided in p_status.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_Stop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CMTW_Stop (timer_ctrl_t *const p_ctrl)
    +
    +

    Stops the timer. Implements timer_api_t::stop.

    +

    Example:

    /* (Optional) Stop the timer. */
    (void) R_CMTW_Stop(&g_timer0_ctrl);
    Return values
    + + + + +
    FSP_SUCCESSTimer stopped.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_Open (timer_ctrl_t *const p_ctrl,
    timer_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the CMTW module instance. Implements timer_api_t::open.

    +

    The CMTW hardware does not support one-shot functionality natively. The one-shot feature is therefore implemented in the CMTW HAL layer. For a timer configured as a one-shot timer, the timer is stopped upon the first timer expiration.

    +

    The CMTW implementation of the general timer can accept an optional cmtw_extended_cfg_t extension parameter.

    +

    Example:

    /* Initializes the module. */
    err = R_CMTW_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    __asm volatile ("cpsie i");
    __asm volatile ("isb");
    Return values
    + + + + + + +
    FSP_SUCCESSInitialization was successful and timer has started.
    FSP_ERR_ASSERTIONA required input pointer is NULL or the period is not in the valid range of 1 to 0xFFFF in 16bit counter or 1 to 0xFFFFFFFF in 32bit counter.
    FSP_ERR_ALREADY_OPENR_CMTW_Open has already been called for this p_ctrl.
    FSP_ERR_IRQ_BSP_DISABLEDA required interrupt has not been enabled in the vector table.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTRequested channel number is not available on CMTW.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_OutputEnable()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_OutputEnable (timer_ctrl_t *const p_ctrl,
    cmtw_io_pin_t pin 
    )
    +
    +

    Enable output for TOC0 and/or TOC1.

    +
    Return values
    + + + + +
    FSP_SUCCESSOutput is enabled.
    FSP_ERR_ASSERTIONp_ctrl or p_status was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_OutputDisable()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_OutputDisable (timer_ctrl_t *const p_ctrl,
    cmtw_io_pin_t pin 
    )
    +
    +

    Disable output for TOC0 and/or TOC1.

    +
    Return values
    + + + + +
    FSP_SUCCESSOutput is disabled.
    FSP_ERR_ASSERTIONp_ctrl or p_status was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CMTW_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CMTW_CallbackSet (timer_ctrl_t *const p_api_ctrl,
    void(*)(timer_callback_args_t *) p_callback,
    void const *const p_context,
    timer_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback with the option to provide memory for the callback argument structure. Implements timer_api_t::callbackSet.

    +
    Return values
    + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___c_m_t_w.js b/group___c_m_t_w.js new file mode 100644 index 0000000..8adec88 --- /dev/null +++ b/group___c_m_t_w.js @@ -0,0 +1,69 @@ +var group___c_m_t_w = +[ + [ "cmtw_instance_ctrl_t", "group___c_m_t_w.html#structcmtw__instance__ctrl__t", null ], + [ "cmtw_extended_cfg_t", "group___c_m_t_w.html#structcmtw__extended__cfg__t", [ + [ "toc0", "group___c_m_t_w.html#af9073998c0c28e05a8f12da3eddf30ed", null ], + [ "toc1", "group___c_m_t_w.html#ac2924a866fbfae428b2d6feb8edde25f", null ], + [ "toc0_control", "group___c_m_t_w.html#a1734ae8129ed557f34e735fc4a0488b6", null ], + [ "toc1_control", "group___c_m_t_w.html#a77d38169188404361f4dbb3f6c792655", null ], + [ "capture_ic0_source", "group___c_m_t_w.html#a1844763704e5a3427c31651cdd536751", null ], + [ "capture_ic1_source", "group___c_m_t_w.html#ae4c3df19de12bbe9ba4c36f78dd6be78", null ], + [ "ic0_control", "group___c_m_t_w.html#a9b7a216779c89527ce522c447d65dcb4", null ], + [ "ic1_control", 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"group___c_m_t_w.html#ga7bf1b1875884b0e1c847a3b54c440763", [ + [ "CMTW_SOURCE_EDGE_RISING", "group___c_m_t_w.html#gga7bf1b1875884b0e1c847a3b54c440763a70169e2f2026cef455de71078bf2250c", null ], + [ "CMTW_SOURCE_EDGE_FALLING", "group___c_m_t_w.html#gga7bf1b1875884b0e1c847a3b54c440763abd14459296fab9fec238c00996728beb", null ], + [ "CMTW_SOURCE_EDGE_BOTH", "group___c_m_t_w.html#gga7bf1b1875884b0e1c847a3b54c440763a6f1ff1a299555fef86ec60c3e4f2d28c", null ] + ] ], + [ "cmtw_output_pin_t", "group___c_m_t_w.html#ga46ea17c23eab6d920c84290eb5769f6b", [ + [ "CMTW_OUTPUT_PIN_RETAIN", "group___c_m_t_w.html#gga46ea17c23eab6d920c84290eb5769f6ba5d4a192f5904e23a4aacfa1675613806", null ], + [ "CMTW_OUTPUT_PIN_START_LEVEL_LOW", "group___c_m_t_w.html#gga46ea17c23eab6d920c84290eb5769f6ba0f66391fe40f9d325a877e7f7a93bfde", null ], + [ "CMTW_OUTPUT_PIN_START_LEVEL_HIGH", "group___c_m_t_w.html#gga46ea17c23eab6d920c84290eb5769f6bad4b944e10a406b9159fa59d5a666a284", null ] + ] ], + [ "cmtw_clear_source_t", "group___c_m_t_w.html#gab8cb04d74fe011e5742d07cddb9a8447", [ + [ "CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWCOR", "group___c_m_t_w.html#ggab8cb04d74fe011e5742d07cddb9a8447a29bae60b7e43072850cb4c44dffc3b1d", null ], + [ "CMTW_CLEAR_SOURCE_DISABLED", "group___c_m_t_w.html#ggab8cb04d74fe011e5742d07cddb9a8447a7b1981140600ccabecbec2cce85ea30f", null ], + [ "CMTW_CLEAR_SOURCE_INPUT_CAPTURE_CMWICR0", "group___c_m_t_w.html#ggab8cb04d74fe011e5742d07cddb9a8447a283a72ceb7ff6900d1d4d5184097ea34", null ], + [ "CMTW_CLEAR_SOURCE_INPUT_CAPTURE_CMWICR1", "group___c_m_t_w.html#ggab8cb04d74fe011e5742d07cddb9a8447adc588629f6353dc88c3661d3d3eeb57b", null ], + [ "CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWOCR0", "group___c_m_t_w.html#ggab8cb04d74fe011e5742d07cddb9a8447a017587b5ab692912de7865167cb32be8", null ], + [ "CMTW_CLEAR_SOURCE_COMPARE_MATCH_CMWOCR1", "group___c_m_t_w.html#ggab8cb04d74fe011e5742d07cddb9a8447a30c9445b77896f4583ee052861df0be0", null ] + ] ], + [ "cmtw_io_pin_t", "group___c_m_t_w.html#gaf5f1958607aa6c7f52f4e47195e3a61f", [ + [ "CMTW_IO_PIN_TOC0", "group___c_m_t_w.html#ggaf5f1958607aa6c7f52f4e47195e3a61fac8abb25fd9d25d55bcdebb8780553f1d", null ], + [ "CMTW_IO_PIN_TOC1", "group___c_m_t_w.html#ggaf5f1958607aa6c7f52f4e47195e3a61fa7cb7514798b0fde43e9d028d7718f4f4", null ], + [ "CMTW_IO_PIN_TOC0_AND_TOC1", "group___c_m_t_w.html#ggaf5f1958607aa6c7f52f4e47195e3a61fa7031caa0b57b3e17a531d44ef8e7fa0f", null ] + ] ], + [ "cmtw_output_control_t", "group___c_m_t_w.html#ga0d3145595cde1b2a26d8812cbb1aac5c", [ + [ "CMTW_OUTPUT_CONTROL_DISABLED", "group___c_m_t_w.html#gga0d3145595cde1b2a26d8812cbb1aac5ca1c9cd650977b70a3211d7a190085b0c5", null ], + [ "CMTW_OUTPUT_CONTROL_ENABLED", "group___c_m_t_w.html#gga0d3145595cde1b2a26d8812cbb1aac5ca89b0a65698f2c9dad74c7ba53ba9de5d", null ] + ] ], + [ "cmtw_input_control_t", "group___c_m_t_w.html#gaa69aac2c20f895bd57f0d4dfa9da9c84", [ + [ "CMTW_INPUT_CONTROL_DISABLED", "group___c_m_t_w.html#ggaa69aac2c20f895bd57f0d4dfa9da9c84aef9e4feabd4045f976f8b85a535a1e6e", null ], + [ "CMTW_INPUT_CONTROL_ENABLED", "group___c_m_t_w.html#ggaa69aac2c20f895bd57f0d4dfa9da9c84a47a43fe08c66afb2854454bde1e0a235", null ] + ] ], + [ "R_CMTW_Close", "group___c_m_t_w.html#gac59c2dfa9436df60eb01971c996875aa", null ], + [ "R_CMTW_PeriodSet", "group___c_m_t_w.html#gaa50bb9ff96b3f0e38459a7e3e65c0a18", null ], + [ "R_CMTW_DutyCycleSet", "group___c_m_t_w.html#ga928fd6d8249fe9c66e870849a6975ca9", null ], + [ "R_CMTW_Reset", "group___c_m_t_w.html#ga10851764cdad9c5c580e146501bc4352", null ], + [ "R_CMTW_Start", "group___c_m_t_w.html#ga874d0098275f48ec3c84e8587d262fce", null ], + [ "R_CMTW_Enable", "group___c_m_t_w.html#gadba23fc3303d81ce926ba6ebe9245e6a", null ], + [ "R_CMTW_Disable", "group___c_m_t_w.html#ga414c89c292c18a33619337489cd43787", null ], + [ "R_CMTW_InfoGet", "group___c_m_t_w.html#gae56c5935864ef5ef23eeae25a95ab079", null ], + [ "R_CMTW_StatusGet", "group___c_m_t_w.html#gacbdfc3716f8d5bd47edaa801eb50d1b7", null ], + [ "R_CMTW_Stop", "group___c_m_t_w.html#ga842bb3b9c5c12cdfff41dd8595defc70", null ], + [ "R_CMTW_Open", "group___c_m_t_w.html#ga7b086a5e535460e7855000cc6141b22e", null ], + [ "R_CMTW_OutputEnable", "group___c_m_t_w.html#ga78987d5578215cbf098221602bbbc193", null ], + [ "R_CMTW_OutputDisable", "group___c_m_t_w.html#gadd9a734062792a507971568dac4c3013", null ], + [ "R_CMTW_CallbackSet", "group___c_m_t_w.html#gabc760f97e8a609485ae6194571d41127", null ] +]; \ No newline at end of file diff --git a/group___c_r_c.html b/group___c_r_c.html new file mode 100644 index 0000000..cddae15 --- /dev/null +++ b/group___c_r_c.html @@ -0,0 +1,555 @@ + + + + + + + +RZV Flexible Software Package Documentation: CRC (r_crc) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    CRC (r_crc)
    Modules » Monitoring
    +
    +
    + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_CRC_Open (crc_ctrl_t *const p_ctrl, crc_cfg_t const *const p_cfg)
     
    fsp_err_t R_CRC_Close (crc_ctrl_t *const p_ctrl)
     
    fsp_err_t R_CRC_Calculate (crc_ctrl_t *const p_ctrl, crc_input_t *const p_crc_input, uint32_t *calculatedValue)
     
    fsp_err_t R_CRC_CalculatedValueGet (crc_ctrl_t *const p_ctrl, uint32_t *calculatedValue)
     
    fsp_err_t R_CRC_SnoopEnable (crc_ctrl_t *const p_ctrl, uint32_t crc_seed)
     
    fsp_err_t R_CRC_SnoopDisable (crc_ctrl_t *const p_ctrl)
     
    +

    Detailed Description

    +

    Driver for the CRC peripheral on RZ MPUs. This module implements the CRC Interface.

    +

    +Overview

    +

    The CRC module provides a API to calculate 8, 16 and 32-bit CRC values on a block of data in memory or a stream of data over a Serial Communication Interface (SCI) channel using industry-standard polynomials.

    +

    +Features

    +
      +
    • CRC module supports the following 8 and 16 bit CRC polynomials which operates on 8-bit data in parallel
        +
      • X^8+X^2+X+1 (CRC-8)
        • +
      • X^16+X^15+X^2+1 (CRC-16)
        • +
      • X^16+X^12+X^5+1 (CRC-CCITT)
        • +
      +
      • +
    • CRC module supports the following 32 bit CRC polynomials which operates on 32-bit data in parallel
        +
      • X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X+ 1 (CRC-32)
        • +
      • X^32+ X^28+ X^27+ X^26+ X^25+ X^23+ X^22+ X^20+ X^19+ X^18+X^14+X^13+X^11+X^10+X^9+X^8+X^6+1 (CRC-32C)
        • +
      +
      • +
    • CRC module can calculate CRC with LSB first or MSB first bit order.
      • +
    +

    +

    +Configuration

    +

    Build Time Configurations for r_crc

    +The following build time configurations are defined in fsp_cfg/r_crc_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Monitoring > CRC (r_crc)

    +This module can be added to the Stacks tab via New Stack > Monitoring > CRC (r_crc). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.
    +

    + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_crc0 Module name.
    CRC Polynomial
      +
    • +CRC-8
      • +
    • +CRC-16
      • +
    • +CRC-CCITT
      • +
    • +CRC-32
      • +
    • +CRC-32C
      • +
    +    		CRC-32C Select the CRC polynomial.
    Bit Order
      +
    • +LSB
      • +
    • +MSB
      • +
    +    		MSB Select the CRC bit order.
    Snoop AddressMCU Specific OptionsSelect the communication module register address CRC snoop
    +

    +

    +Clock Configuration

    +

    There is no clock configuration for the CRC module.

    +

    +Pin Configuration

    +

    This module does not use I/O pins.

    +

    +Usage Notes

    +

    CRC Snoop

    +

    The CRC snoop function monitors reads from and writes to a specified I/O register address and performs CRC calculation on the data read from and written to the register address automatically. Instead of calling R_CRC_Calculate on a block of data, R_CRC_SnoopEnable is called to start monitoring reads/writes and R_CRC_CalculatedValueGet is used to obtain the current CRC.

    +
    Note
    Snoop mode is available for transmit/receive operations on SPI_B or SCI_B only.
    +

    +

    +Limitations

    +

    When using CRC32 polynomial functions the CRC module produces the same results as popular online CRC32 calculators, but it is important to remember a few important points.

      +
    • Online CRC32 calculators allow the input to be any number of bytes. The FSP CRC32 API function uses 32-bit words. This means the online calculations must be 'padded' to end on a 32-bit boundary.
      • +
    • Online CRC32 calculators usually invert the output prior to presenting it as a result. It is up to the application program to include this step if needed.
      • +
    • The seed value of 0xFFFFFFFF needs to be used by both the online calculator and the R_CRC module API (CRC32 polynomials)
      • +
    • Make sure the bit orientation of the R_CRC CRC32 is set for LSB and that you have CRC32 selected and not CRC32C.
      • +
    • Some online CRC tools XOR the final result with 0xFFFFFFFF.
      • +
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the CRC module in an application.

    +
    void crc_example ()
    {
    uint32_t length;
    uint32_t uint8_calculated_value;
    length = sizeof(g_data_8bit) / sizeof(g_data_8bit[0]);
    crc_input_t example_input =
    {
    .p_input_buffer = g_data_8bit,
    .num_bytes = length,
    .crc_seed = 0,
    };
    /* Open CRC module with 8 bit polynomial */
    R_CRC_Open(&crc_ctrl, &g_crc_test_cfg);
    /* 8-bit CRC calculation */
    R_CRC_Calculate(&crc_ctrl, &example_input, &uint8_calculated_value);
    }

    Snoop Example

    +

    This example demonstrates CRC snoop operation.

    +
    void crc_snoop_example ()
    {
    /* Open CRC module with 8 bit polynomial */
    R_CRC_Open(&crc_ctrl, &g_crc_test_cfg);
    /* Open SCI Driver */
    /* Configure Snoop address and enable snoop mode */
    R_CRC_SnoopEnable(&crc_ctrl, 0);
    /* Perfrom SCI read/Write operation depending on the SCI snoop address configure */
    /* Read CRC value */
    R_CRC_CalculatedValueGet(&crc_ctrl, &g_crc_buff);
    }
    + + + + + +

    +Data Structures

    struct  crc_extended_cfg_t
     
    struct  crc_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ crc_extended_cfg_t

    + +
    +
    + + + + +
    struct crc_extended_cfg_t
    +
    +

    Driver extend config structure.

    +
    +
    +
    + +

    ◆ crc_instance_ctrl_t

    + +
    +
    + + + + +
    struct crc_instance_ctrl_t
    +
    +

    Driver instance control structure.

    +
    +
    +
    +

    Function Documentation

    + +

    ◆ R_CRC_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CRC_Open (crc_ctrl_t *const p_ctrl,
    crc_cfg_t const *const p_cfg 
    )
    +
    +

    Open the CRC driver module

    +

    Implements crc_api_t::open

    +

    Open the CRC driver module and initialize the driver control block according to the passed-in configuration structure.

    +
    Return values
    + + + + +
    FSP_SUCCESSConfiguration was successful.
    FSP_ERR_ASSERTIONp_ctrl or p_cfg is NULL.
    FSP_ERR_ALREADY_OPENModule already open
    +
    +
    + +
    +
    + +

    ◆ R_CRC_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CRC_Close (crc_ctrl_t *const p_ctrl)
    +
    +

    Close the CRC module driver.

    +

    Implements crc_api_t::close

    +
    Return values
    + + + + +
    FSP_SUCCESSConfiguration was successful.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe driver is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CRC_Calculate()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CRC_Calculate (crc_ctrl_t *const p_ctrl,
    crc_input_t *const p_crc_input,
    uint32_t * calculatedValue 
    )
    +
    +

    Perform a CRC calculation on a block of 8-bit/32-bit (for 32-bit polynomial) data.

    +

    Implements crc_api_t::calculate

    +

    This function performs a CRC calculation on an array of 8-bit/32-bit (for 32-bit polynomial) values and returns an 8-bit/32-bit (for 32-bit polynomial) calculated value

    +
    Return values
    + + + + + +
    FSP_SUCCESSCalculation successful.
    FSP_ERR_ASSERTIONEither p_ctrl, inputBuffer, or calculatedValue is NULL.
    FSP_ERR_INVALID_ARGUMENTlength value is NULL.
    FSP_ERR_NOT_OPENThe driver is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CRC_CalculatedValueGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CRC_CalculatedValueGet (crc_ctrl_t *const p_ctrl,
    uint32_t * calculatedValue 
    )
    +
    +

    Return the current calculated value.

    +

    Implements crc_api_t::crcResultGet

    +

    CRC calculation operates on a running value. This function returns the current calculated value.

    +
    Return values
    + + + + +
    FSP_SUCCESSReturn of calculated value successful.
    FSP_ERR_ASSERTIONEither p_ctrl or calculatedValue is NULL.
    FSP_ERR_NOT_OPENThe driver is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_CRC_SnoopEnable()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_CRC_SnoopEnable (crc_ctrl_t *const p_ctrl,
    uint32_t crc_seed 
    )
    +
    +

    Configure the snoop channel and set the CRC seed.

    +

    Implements crc_api_t::snoopEnable

    +

    The CRC calculator can operate on reads and writes over any of the first ten SCI channels. For example, if set to channel 0, transmit, every byte written out SCI channel 0 is also sent to the CRC calculator as if the value was explicitly written directly to the CRC calculator.

    +
    Return values
    + + + + + +
    FSP_SUCCESSSnoop configured successfully.
    FSP_ERR_ASSERTIONPointer to control stucture is NULL
    FSP_ERR_NOT_OPENThe driver is not opened.
    FSP_ERR_UNSUPPORTEDSNOOP operation is not supported.
    +
    +
    + +
    +
    + +

    ◆ R_CRC_SnoopDisable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_CRC_SnoopDisable (crc_ctrl_t *const p_ctrl)
    +
    +

    Disable snooping.

    +

    Implements crc_api_t::snoopDisable

    +
    Return values
    + + + + + +
    FSP_SUCCESSSnoop disabled.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe driver is not opened.
    FSP_ERR_UNSUPPORTEDSNOOP operation is not supported.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___c_r_c.js b/group___c_r_c.js new file mode 100644 index 0000000..4630eb5 --- /dev/null +++ b/group___c_r_c.js @@ -0,0 +1,11 @@ +var group___c_r_c = +[ + [ "crc_extended_cfg_t", "group___c_r_c.html#structcrc__extended__cfg__t", null ], + [ "crc_instance_ctrl_t", "group___c_r_c.html#structcrc__instance__ctrl__t", null ], + [ "R_CRC_Open", "group___c_r_c.html#gae4cc2bba5d6aeaadd9f4d43948fca5ac", null ], + [ "R_CRC_Close", "group___c_r_c.html#gab1ba556ab77f9f3d32ed5a448ebc7f9c", null ], + [ "R_CRC_Calculate", "group___c_r_c.html#ga89b0be959ce83ac6ca053329b1fddb75", null ], + [ "R_CRC_CalculatedValueGet", "group___c_r_c.html#ga5bb7766a9c3217d2da7b77ea203b8c74", null ], + [ "R_CRC_SnoopEnable", "group___c_r_c.html#ga606b389497fa4cba30b0d8f9a658331f", null ], + [ "R_CRC_SnoopDisable", "group___c_r_c.html#ga5bda4df2557aeaaf312b23fb31568f20", null ] +]; \ No newline at end of file diff --git a/group___c_r_c___a_p_i.html b/group___c_r_c___a_p_i.html new file mode 100644 index 0000000..91aaff1 --- /dev/null +++ b/group___c_r_c___a_p_i.html @@ -0,0 +1,588 @@ + + + + + + + +RZV Flexible Software Package Documentation: CRC Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    CRC Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for cyclic redundancy checking.

    +

    +Summary

    +

    The CRC (Cyclic Redundancy Check) calculator generates CRC codes using five different polynomials including 8 bit, 16 bit, and 32 bit variations. Calculation can be performed by sending data to the block using the CPU or by snooping on read or write activity on one of SCI channels.

    +

    Implemented by:

    + + + + + + + + + + +

    +Data Structures

    struct  crc_input_t
     
    struct  crc_cfg_t
     
    struct  crc_api_t
     
    struct  crc_instance_t
     
    + + + +

    +Typedefs

    typedef void crc_ctrl_t
     
    + + + + + + + +

    +Enumerations

    enum  crc_polynomial_t
     
    enum  crc_bit_order_t
     
    enum  crc_snoop_direction_t
     
    +

    Data Structure Documentation

    + +

    ◆ crc_input_t

    + +
    +
    + + + + +
    struct crc_input_t
    +
    +

    Structure for CRC inputs

    +
    +
    +
    + +

    ◆ crc_cfg_t

    + +
    +
    + + + + +
    struct crc_cfg_t
    +
    +

    User configuration structure, used in open function

    +
    + + + + + + + + + + + + + + + + +
    Data Fields
    +uint8_t +channel +Channel number.
    +crc_polynomial_t +polynomial +CRC Generating Polynomial Switching (GPS)
    +crc_bit_order_t +bit_order +CRC Calculation Switching (LMS)
    +uint32_t +snoop_address +Register Snoop Address (CRCSA)
    +void const * +p_extend +CRC Hardware Dependent Configuration.
    + +
    +
    + +

    ◆ crc_api_t

    + +
    +
    + + + + +
    struct crc_api_t
    +
    +

    CRC driver structure. General CRC functions implemented at the HAL layer will follow this API.

    +
    + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(crc_ctrl_t *const p_ctrl, crc_cfg_t const *const p_cfg)
     
    fsp_err_t(* close )(crc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* crcResultGet )(crc_ctrl_t *const p_ctrl, uint32_t *crc_result)
     
    fsp_err_t(* snoopEnable )(crc_ctrl_t *const p_ctrl, uint32_t crc_seed)
     
    fsp_err_t(* snoopDisable )(crc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* calculate )(crc_ctrl_t *const p_ctrl, crc_input_t *const p_crc_input, uint32_t *p_crc_result)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* crc_api_t::open) (crc_ctrl_t *const p_ctrl, crc_cfg_t const *const p_cfg)
    +
    +

    Open the CRC driver module.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to CRC device handle.
    [in]p_cfgPointer to a configuration structure.
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* crc_api_t::close) (crc_ctrl_t *const p_ctrl)
    +
    +

    Close the CRC module driver

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to CRC device handle
    +
    +
    +
    Return values
    + + +
    FSP_SUCCESSConfiguration was successful.
    +
    +
    + +
    +
    + +

    ◆ crcResultGet

    + +
    +
    + + + + +
    fsp_err_t(* crc_api_t::crcResultGet) (crc_ctrl_t *const p_ctrl, uint32_t *crc_result)
    +
    +

    Return the current calculated value.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to CRC device handle.
    [out]crc_resultThe calculated value from the last CRC calculation.
    +
    +
    + +
    +
    + +

    ◆ snoopEnable

    + +
    +
    + + + + +
    fsp_err_t(* crc_api_t::snoopEnable) (crc_ctrl_t *const p_ctrl, uint32_t crc_seed)
    +
    +

    Configure and Enable snooping.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to CRC device handle.
    [in]crc_seedCRC seed.
    +
    +
    + +
    +
    + +

    ◆ snoopDisable

    + +
    +
    + + + + +
    fsp_err_t(* crc_api_t::snoopDisable) (crc_ctrl_t *const p_ctrl)
    +
    +

    Disable snooping.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to CRC device handle.
    +
    +
    + +
    +
    + +

    ◆ calculate

    + +
    +
    + + + + +
    fsp_err_t(* crc_api_t::calculate) (crc_ctrl_t *const p_ctrl, crc_input_t *const p_crc_input, uint32_t *p_crc_result)
    +
    +

    Perform a CRC calculation on a block of data.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to CRC device handle.
    [in]p_crc_inputA pointer to structure for CRC inputs
    [out]crc_resultThe calculated value of the CRC calculation.
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ crc_instance_t

    + +
    +
    + + + + +
    struct crc_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +crc_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +crc_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +crc_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ crc_ctrl_t

    + +
    +
    + + + + +
    typedef void crc_ctrl_t
    +
    +

    CRC control block. Allocate an instance specific control block to pass into the CRC API calls.

    Implemented as
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ crc_polynomial_t

    + +
    +
    + + + + +
    enum crc_polynomial_t
    +
    +

    CRC Generating Polynomial Switching (GPS).

    + + + + + + +
    Enumerator
    CRC_POLYNOMIAL_CRC_8 

    8-bit CRC-8 (X^8 + X^2 + X + 1)

    +
    CRC_POLYNOMIAL_CRC_16 

    16-bit CRC-16 (X^16 + X^15 + X^2 + 1)

    +
    CRC_POLYNOMIAL_CRC_CCITT 

    16-bit CRC-CCITT (X^16 + X^12 + X^5 + 1)

    +
    CRC_POLYNOMIAL_CRC_32 

    32-bit CRC-32 (X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 + X^8 + X^7 + X^5 + X^4 + X^2 + X + 1)

    +
    CRC_POLYNOMIAL_CRC_32C 

    32-bit CRC-32C (X^32 + X^28 + X^27 + X^26 + X^25 + X^23 + X^22 + X^20 + X^19 + X^18 + X^14 + X^13 + X^11 + X^10 + X^9 + X^8 + X^6 + 1)

    +
    + +
    +
    + +

    ◆ crc_bit_order_t

    + +
    +
    + + + + +
    enum crc_bit_order_t
    +
    +

    CRC Calculation Switching (LMS)

    + + + +
    Enumerator
    CRC_BIT_ORDER_LMS_LSB 

    Generates CRC for LSB first communication.

    +
    CRC_BIT_ORDER_LMS_MSB 

    Generates CRC for MSB first communication.

    +
    + +
    +
    + +

    ◆ crc_snoop_direction_t

    + +
    +
    + + + + +
    enum crc_snoop_direction_t
    +
    +

    Snoop-On-Write/Read Switch (CRCSWR)

    + + + +
    Enumerator
    CRC_SNOOP_DIRECTION_RECEIVE 

    Snoop-on-read.

    +
    CRC_SNOOP_DIRECTION_TRANSMIT 

    Snoop-on-write.

    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___c_r_c___a_p_i.js b/group___c_r_c___a_p_i.js new file mode 100644 index 0000000..163ce68 --- /dev/null +++ b/group___c_r_c___a_p_i.js @@ -0,0 +1,40 @@ +var group___c_r_c___a_p_i = +[ + [ "crc_input_t", "group___c_r_c___a_p_i.html#structcrc__input__t", null ], + [ "crc_cfg_t", "group___c_r_c___a_p_i.html#structcrc__cfg__t", [ + [ "channel", "group___c_r_c___a_p_i.html#a93f724f6e008179d16750067ce740f91", null ], + [ "polynomial", "group___c_r_c___a_p_i.html#a77a51a5aaddd34da23595f1b522cab3d", null ], + [ "bit_order", "group___c_r_c___a_p_i.html#a1647f8768f919a79d36f7dba45ff0bb4", null ], + [ "snoop_address", "group___c_r_c___a_p_i.html#af1f280c0dc14a01fa8c8a3aa1f76feeb", null ], + [ "p_extend", "group___c_r_c___a_p_i.html#aa38d898bb2b40f121ce3ec1b54bf921f", null ] + ] ], + [ "crc_api_t", "group___c_r_c___a_p_i.html#structcrc__api__t", [ + [ "open", "group___c_r_c___a_p_i.html#ad1c70317b3a73fc3cb102e6c673111be", null ], + [ "close", "group___c_r_c___a_p_i.html#a7783105d71a3cf701d7928cba9585e6d", null ], + [ "crcResultGet", "group___c_r_c___a_p_i.html#a0c748a9f3b2eb21585c97e3493f285ac", null ], + [ "snoopEnable", "group___c_r_c___a_p_i.html#a4d4efcfb06b59c92801320f31e8f2eb7", null ], + [ "snoopDisable", "group___c_r_c___a_p_i.html#ab171c85217e275bda7426309bd832b02", null ], + [ "calculate", "group___c_r_c___a_p_i.html#ababb93aa2ede5ba3d5750bd3203ce7e3", null ] + ] ], + [ "crc_instance_t", "group___c_r_c___a_p_i.html#structcrc__instance__t", [ + [ "p_ctrl", "group___c_r_c___a_p_i.html#a43ca783a75a91815659195f46717b4ca", null ], + [ "p_cfg", "group___c_r_c___a_p_i.html#aba878011b00301dd2d99582eda689dcd", null ], + [ "p_api", "group___c_r_c___a_p_i.html#afbbb090a3e9cfa08f51cdd89a3389fac", null ] + ] ], + [ "crc_ctrl_t", "group___c_r_c___a_p_i.html#ga4c9c5ebe6bb4522f76618993434459e0", null ], + [ "crc_polynomial_t", "group___c_r_c___a_p_i.html#ga7daa8fa0df9f42a98afcf766a63d931d", [ + [ "CRC_POLYNOMIAL_CRC_8", "group___c_r_c___a_p_i.html#gga7daa8fa0df9f42a98afcf766a63d931da3743dfb69b7a6127e74de34390f3a55c", null ], + [ "CRC_POLYNOMIAL_CRC_16", "group___c_r_c___a_p_i.html#gga7daa8fa0df9f42a98afcf766a63d931da6b5637781ae91033928a2e082c823465", null ], + [ "CRC_POLYNOMIAL_CRC_CCITT", "group___c_r_c___a_p_i.html#gga7daa8fa0df9f42a98afcf766a63d931da5f95f86fa3c29357706b0eb54223ef62", null ], + [ "CRC_POLYNOMIAL_CRC_32", "group___c_r_c___a_p_i.html#gga7daa8fa0df9f42a98afcf766a63d931dac9c97ab1a8814206b952a35066a861c2", null ], + [ "CRC_POLYNOMIAL_CRC_32C", "group___c_r_c___a_p_i.html#gga7daa8fa0df9f42a98afcf766a63d931da8854edee82722360b9adbfbfda3843b1", null ] + ] ], + [ "crc_bit_order_t", "group___c_r_c___a_p_i.html#ga5d770a90efa92855a81b5ae47b50db70", [ + [ "CRC_BIT_ORDER_LMS_LSB", "group___c_r_c___a_p_i.html#gga5d770a90efa92855a81b5ae47b50db70a938646e39c9f235ae7a23c19e03f6d53", null ], + [ "CRC_BIT_ORDER_LMS_MSB", "group___c_r_c___a_p_i.html#gga5d770a90efa92855a81b5ae47b50db70a929efb1d3d263f589cf6a6c650d5e393", null ] + ] ], + [ "crc_snoop_direction_t", "group___c_r_c___a_p_i.html#gad26e18afbb5663c0bcb91d62d418e2e3", [ + [ "CRC_SNOOP_DIRECTION_RECEIVE", "group___c_r_c___a_p_i.html#ggad26e18afbb5663c0bcb91d62d418e2e3af13bda1509e0658baf48a48eb9f1c03c", null ], + [ "CRC_SNOOP_DIRECTION_TRANSMIT", "group___c_r_c___a_p_i.html#ggad26e18afbb5663c0bcb91d62d418e2e3a961727790a4640f4be3e6229068c6c62", null ] + ] ] +]; \ No newline at end of file diff --git a/group___d_m_a_c___b.html b/group___d_m_a_c___b.html new file mode 100644 index 0000000..e13632c --- /dev/null +++ b/group___d_m_a_c___b.html @@ -0,0 +1,1298 @@ + + + + + + + +RZV Flexible Software Package Documentation: Direct Memory Access Controller (r_dmac_b) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
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    + +
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    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Macros | +Enumerations
    +
    +
    Direct Memory Access Controller (r_dmac_b)
    Modules » Transfer
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_DMAC_B_Open (transfer_ctrl_t *const p_api_ctrl, transfer_cfg_t const *const p_cfg)
     
    fsp_err_t R_DMAC_B_Reconfigure (transfer_ctrl_t *const p_api_ctrl, transfer_info_t *p_info)
     
    fsp_err_t R_DMAC_B_Reset (transfer_ctrl_t *const p_api_ctrl, void const *volatile p_src, void *volatile p_dest, uint16_t const num_transfers)
     
    fsp_err_t R_DMAC_B_SoftwareStart (transfer_ctrl_t *const p_api_ctrl, transfer_start_mode_t mode)
     
    fsp_err_t R_DMAC_B_SoftwareStop (transfer_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_DMAC_B_Enable (transfer_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_DMAC_B_Disable (transfer_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_DMAC_B_InfoGet (transfer_ctrl_t *const p_api_ctrl, transfer_properties_t *const p_info)
     
    fsp_err_t R_DMAC_B_Close (transfer_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_DMAC_B_Reload (transfer_ctrl_t *const p_api_ctrl, void const *p_src, void *p_dest, uint32_t const num_transfers)
     
    +

    Detailed Description

    +

    Driver for the DMAC peripheral on RZ MPUs. This module implements the Transfer Interface.

    +

    +Overview

    +

    The Direct Memory Access Controller (DMAC) transfers data from one memory location to another without using the CPU.

    +

    +Features

    +
      +
    • Supports multiple transfer modes
        +
      • Normal transfer
        • +
      • Block transfer
        • +
      +
      • +
    • Support Register mode
      • +
    • Supports Next0 Register set and Next1 Register set
      • +
    • Address increment, fixed
      • +
    • Triggered by peripheral module events
        +
      • See "Table 14.3" in "14.5.2 DMA Transfer Requests" in the User's manual.
        • +
      +
      • +
    • Supports 1, 2, 4, 8, 16, 32, 64, 128 byte data units
      • +
    • Configurable DMA transfer activation request source, detection method of DMA request signal and DACK output mode
      • +
    • Configurable DMA transfer interval
      • +
    • Configurable DMAC channel priority
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_dmac_b

    +The following build time configurations are defined in fsp_cfg/r_dmac_b_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Transfer > Transfer Driver on r_dmac_b

    +This module can be added to the Stacks tab via New Stack > Transfer > Transfer Driver on r_dmac_b.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_transfer0 Module name.
    UnitMCU Specific OptionsSpecify the hardware unit.
    ChannelMust be a valid integer between 0 and 15.0 Specify the hardware channel.
    Mode
      +
    • +Normal
      • +
    • +Block
      • +
    +    		Normal Select the transfer mode.
    Source Data Size
      +
    • +1 Byte
      • +
    • +2 Bytes
      • +
    • +4 Bytes
      • +
    • +8 Bytes
      • +
    • +16 Bytes
      • +
    • +32 Bytes
      • +
    • +64 Bytes
      • +
    • +128 Bytes
      • +
    +    		2 Bytes Select the source data size.
    Destination Data Size
      +
    • +1 Byte
      • +
    • +2 Bytes
      • +
    • +4 Bytes
      • +
    • +8 Bytes
      • +
    • +16 Bytes
      • +
    • +32 Bytes
      • +
    • +64 Bytes
      • +
    • +128 Bytes
      • +
    +    		2 Bytes Select the destination data size.
    Destination Address Mode
      +
    • +Fixed
      • +
    • +Incremented
      • +
    +    		Fixed Select the address mode for the destination.
    Source Address Mode
      +
    • +Fixed
      • +
    • +Incremented
      • +
    +    		Fixed Select the address mode for the source.
    Activation SourceMCU Specific OptionsSelect the DMAC transfer start event.
    DMA Activation Request Source Select
      +
    • +Requested by a transfer source module
      • +
    • +Requested by a transfer destination module
      • +
    +    		Requested by a transfer source module DMA Activation Request Source Select.
    DACK Output modeMCU Specific OptionsSelect DACK output mode.
    External DACK Output Pin SelectMCU Specific OptionsSelect DACK output signal.
    External TEND Output Pin SelectMCU Specific OptionsSelect TEND output signal.
    External DREQ Detection ModeMCU Specific OptionsExternal DREQ detection mode select.(This cannot be set on devices that do not have an external DREQ terminal)
    DMAC ModeRegister ModeRegister Mode Select DMAC Mode.
    CallbackName must be a valid C symbolNULL A user callback that is called at the end of the transfer.
    ContextManual EntryNULL Pointer to the context structure passed through the callback argument.
    Transfer End Interrupt EnableMCU Specific OptionsEnable the transfer end interrupt.
    Transfer End Interrupt PriorityValue must be an integer between 0 and 25512 Select the transfer end interrupt priority.
    Transfer IntervalValue must be a non-negative integer0 Transfer interval
    Channel Priority
      +
    • +Fixed
      • +
    • +Round Robin
      • +
    +    		module.driver.transfer_on_dmac_b.channel_priority.fixed Channel Priority
    Transfer Continuation
      +
    • +DMA transfer only once
      • +
    • +Transfer with Setting 1 and Setting 2 alternately
      • +
    +    		DMA transfer only once When Next0 Register Set Transfer completes, Next1 Register Set Transfer occurs
    Setting 1 Destination AddressManual EntryNULL Specify the transfer destination address.
    Setting 1 Source AddressManual EntryNULL Specify the transfer source address.
    Setting 1 Total Number of Transfer BytesValue must be a non-negative integer1 Specify the total number of transfer bytes.
    Setting 2 Destination AddressManual EntryNULL Specify the transfer destination address.(Use only when Transfer with Setting 1 and Setting 2 horizontally is selected in Transfer Continuatuion.)
    Setting 2 Source AddressManual EntryNULL Specify the transfer source address.(Use only when Transfer with Setting 1 and Setting 2 horizontally is selected in Transfer Continuatuion.)
    Setting 2 Total Number of Transfer BytesValue must be a non-negative integer1 Specify the total number of transfer bytes.(Use only when Transfer with Setting 1 and Setting 2 horizontally is selected in Transfer Continuatuion.)
    +

    +
    Warning
    "DMA Activation Request Source Select", "Low Detection Enable", "High Detection Enable", and "DACK output" must be set according to the DMAC transfer source. For details, see 'DMA Transfer Request Detection Operation Setting Table' of User's Manual.
    +

    +Clock Configuration

    +

    The DMAC peripheral module uses ICLK as the clock source. The ICLK frequency is set by using the Clocks tab of the FSP Configuration editor prior to a build, or by using the CGC module at run-time.

    +

    +Pin Configuration

    +

    This module does not use I/O pins.

    +

    +Usage Notes

    +

    Transfer Modes

    +

    The DMAC Module supports two modes of operation.

    +
      +
    • Normal Mode - In normal mode, a single data unit is forwarded each time a configured peripheral module event is received by the DMAC channel. The data unit can be 1 byte, 2 bytes, 4 bytes, 8 bytes, 16 bytes, 32 bytes, 64 bytes, or 128 bytes. The source and destination addresses can be fixed or incremented. The 32-bit counter decrements on every transfer. When the counter reaches 0, the peripheral module event no longer triggers the transfer and you can interrupt the CPU to signal that all transfers have finished.
      • +
    • Block Mode - In block mode, the amount of data units transfered by each interrupt. For one DMA request, performs transfers until a DMA transfer completes. When the counter reaches 0, transfers will no longer be triggered by the peripheral module event and the CPU can be interrupted to signal that all transfers have finished.
      • +
    +

    Limitations

    +

    This driver only supports the transfer by non-secure access. Also, DMA transfer cannot be performed to the slave area for which the security level has been set.

    +

    It is not supported DMA transfer to DDR-SDRAM area (0x8000_0000 to 0x9FFF_FFFF) in the current driver version of RZ/V2H . Therefore, do not specify addresses in this area as source or destination addresses.

    +

    If CPU has built-in cache memory, the transfer source and destination should be placed to the area where the cache memory is set to disabled.

    +

    The execution of the Reload function must be completed during the transfer of Next0 or Next1. If the total number of bytes transferred is small, the next transfer may start before the function execution completes. In this case, continuous operation of DMAC transfer is not guaranteed, so when using the Reload function, it is recommended to set the number of bytes to be transferred a little longer, taking into account the bus clock frequency and interrupt processing time.

    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the DMAC in an application.

    +
    void dmac_minimal_example (void)
    {
    /* Open the transfer instance with initial configuration. */
    fsp_err_t err = R_DMAC_B_Open(&g_transfer_ctrl, &g_transfer_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Enable the DMAC to handle incoming transfer requests. */
    err = R_DMAC_B_Enable(&g_transfer_ctrl);
    assert(FSP_SUCCESS == err);
    }
    + + + + + + + + + + + +

    +Data Structures

    struct  dmac_b_callback_args_t
     
    struct  dmac_b_register_set_setting_t
     
    struct  dmac_b_instance_ctrl_t
     
    struct  dmac_b_extended_cfg_t
     
    struct  dmac_b_extended_info_t
     
    + + + + + +

    +Macros

    #define DMAC_B_MAX_NORMAL_TRANSFER_LENGTH
     
    #define DMAC_B_MAX_BLOCK_TRANSFER_LENGTH
     
    + + + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  dmac_b_event_t
     
    enum  dmac_b_transfer_size_t
     
    enum  dmac_b_ack_mode_t
     
    enum  dmac_b_external_detection_t
     
    enum  dmac_b_internal_detection_t
     
    enum  dmac_b_request_direction_t
     
    enum  dmac_b_continuous_setting_t
     
    enum  dmac_b_channel_scheduling_t
     
    enum  dmac_b_mode_select_t
     
    +

    Data Structure Documentation

    + +

    ◆ dmac_b_callback_args_t

    + +
    +
    + + + + +
    struct dmac_b_callback_args_t
    +
    +

    Callback function parameter data.

    +
    + + + + + + + +
    Data Fields
    +dmac_b_event_t +event +Event code.
    +void const * +p_context +Placeholder for user data. Set in r_transfer_t::open function in transfer_cfg_t.
    + +
    +
    + +

    ◆ dmac_b_register_set_setting_t

    + +
    +
    + + + + +
    struct dmac_b_register_set_setting_t
    +
    +

    Register set settings.

    +
    + + + + + + + + + + +
    Data Fields
    +void const * +p_src +Source pointer.
    +void * +p_dest +Destination pointer.
    +uint32_t +length +Transfer byte.
    + +
    +
    + +

    ◆ dmac_b_instance_ctrl_t

    + +
    +
    + + + + +
    struct dmac_b_instance_ctrl_t
    +
    +

    Control block used by driver. DO NOT INITIALIZE - this structure will be initialized in transfer_api_t::open.

    +
    +
    +
    + +

    ◆ dmac_b_extended_cfg_t

    + +
    +
    + + + + +
    struct dmac_b_extended_cfg_t
    +
    +

    DMAC transfer configuration extension. This extension is required.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +uint8_t unit
     Unit number.
     
    +uint8_t channel
     Channel number.
     
    +IRQn_Type dmac_int_irq
     DMAC interrupt number.
     
    +uint8_t dmac_int_ipl
     DMAC interrupt priority.
     
    dmac_trigger_event_t activation_source
     
    +dmac_b_ack_mode_t ack_mode
     DACK output mode.
     
    +dmac_b_external_output_pin_t ack_output_pin
     DACK output pin name.
     
    +dmac_b_external_output_pin_t tend_output_pin
     TEND output pin name.
     
    +dmac_b_external_detection_t external_detection_mode
     DMAC request detection method for external pin.
     
    +dmac_b_internal_detection_t internal_detection_mode
     DMAC request detection method for internal pin.
     
    +dmac_b_request_direction_t activation_request_source_select
     DMAC activation request source.
     
    +dmac_b_mode_select_t dmac_mode
     DMAC Mode.
     
    +dmac_b_continuous_setting_t continuous_setting
     Next register operation settings.
     
    +uint16_t transfer_interval
     DMA transfer interval.
     
    +dmac_b_channel_scheduling_t channel_scheduling
     DMA channel scheduling.
     
    void(* p_callback )(dmac_b_callback_args_t *cb_data)
     
    void const * p_context
     
    +

    Field Documentation

    + +

    ◆ activation_source

    + +
    +
    + + + + +
    dmac_trigger_event_t dmac_b_extended_cfg_t::activation_source
    +
    +

    Select which event will trigger the transfer.

    + +
    +
    + +

    ◆ p_callback

    + +
    +
    + + + + +
    void(* dmac_b_extended_cfg_t::p_callback) (dmac_b_callback_args_t *cb_data)
    +
    +

    Callback for transfer end interrupt.

    + +
    +
    + +

    ◆ p_context

    + +
    +
    + + + + +
    void const* dmac_b_extended_cfg_t::p_context
    +
    +

    Placeholder for user data. Passed to the user p_callback in dmac_b_callback_args_t.

    + +
    +
    + +
    +
    + +

    ◆ dmac_b_extended_info_t

    + +
    +
    + + + + +
    struct dmac_b_extended_info_t
    +
    +

    DMAC transfer information configuration extension. This extension is required.

    +
    + + + + + + + + + + +
    Data Fields
    +dmac_b_transfer_size_t +src_size +

    Select number of source bytes to transfer at once.

    +
    +dmac_b_transfer_size_t +dest_size +

    Select number of destination bytes to transfer at once.

    +
    +dmac_b_register_set_setting_t * +p_next1_register_setting +

    Next1 Register set settings

    +
    + +
    +
    +

    Macro Definition Documentation

    + +

    ◆ DMAC_B_MAX_NORMAL_TRANSFER_LENGTH

    + +
    +
    + + + + +
    #define DMAC_B_MAX_NORMAL_TRANSFER_LENGTH
    +
    +

    Max configurable number of transfers in TRANSFER_MODE_NORMAL.

    + +
    +
    + +

    ◆ DMAC_B_MAX_BLOCK_TRANSFER_LENGTH

    + +
    +
    + + + + +
    #define DMAC_B_MAX_BLOCK_TRANSFER_LENGTH
    +
    +

    Max number of transfers per block in TRANSFER_MODE_BLOCK

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ dmac_b_event_t

    + +
    +
    + + + + +
    enum dmac_b_event_t
    +
    +

    Events that can trigger a callback function.

    + + + +
    Enumerator
    DMAC_B_EVENT_TRANSFER_END 

    DMA transfer has completed.

    +
    DMAC_B_EVENT_TRANSFER_ERROR 

    A bus error occurred during DMA transfer.

    +
    + +
    +
    + +

    ◆ dmac_b_transfer_size_t

    + +
    +
    + + + + +
    enum dmac_b_transfer_size_t
    +
    +

    Transfer size specifies the size of each individual transfer.

    + + + + + + + + + +
    Enumerator
    DMAC_B_TRANSFER_SIZE_1_BYTE 

    Each transfer transfers a 8-bit value.

    +
    DMAC_B_TRANSFER_SIZE_2_BYTE 

    Each transfer transfers a 16-bit value.

    +
    DMAC_B_TRANSFER_SIZE_4_BYTE 

    Each transfer transfers a 32-bit value.

    +
    DMAC_B_TRANSFER_SIZE_8_BYTE 

    Each transfer transfers a 64-bit value.

    +
    DMAC_B_TRANSFER_SIZE_16_BYTE 

    Each transfer transfers a 128-bit value.

    +
    DMAC_B_TRANSFER_SIZE_32_BYTE 

    Each transfer transfers a 256-bit value.

    +
    DMAC_B_TRANSFER_SIZE_64_BYTE 

    Each transfer transfers a 512-bit value.

    +
    DMAC_B_TRANSFER_SIZE_128_BYTE 

    Each transfer transfers a 1024-bit value.

    +
    + +
    +
    + +

    ◆ dmac_b_ack_mode_t

    + +
    +
    + + + + +
    enum dmac_b_ack_mode_t
    +
    +

    DACK output mode. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table.

    + + + + +
    Enumerator
    DMAC_B_ACK_MODE_LEVEL_MODE 

    Level mode.

    +
    DMAC_B_ACK_MODE_BUS_CYCLE_MODE 

    Bus cycle mode.

    +
    DMAC_B_ACK_MODE_MASK_DACK_OUTPUT 

    Output is masked.

    +
    + +
    +
    + +

    ◆ dmac_b_external_detection_t

    + +
    +
    + + + + +
    enum dmac_b_external_detection_t
    +
    +

    Detection method of the external DMA request signal. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table.

    + + + + + + +
    Enumerator
    DMAC_B_EXTERNAL_DETECTION_LOW_LEVEL 

    Low level detection.

    +
    DMAC_B_EXTERNAL_DETECTION_FALLING_EDGE 

    Falling edge detection.

    +
    DMAC_B_EXTERNAL_DETECTION_RISING_EDGE 

    Rising edge detection.

    +
    DMAC_B_EXTERNAL_DETECTION_FALLING_RISING_EDGE 

    Falling/Rising edge detection.

    +
    DMAC_B_EXTERNAL_DETECTION_NO_DETECTION 

    Not using hardware detection.

    +
    + +
    +
    + +

    ◆ dmac_b_internal_detection_t

    + +
    +
    + + + + +
    enum dmac_b_internal_detection_t
    +
    +

    Detection method of the internal DMA request signal. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table.

    + + + + + + +
    Enumerator
    DMAC_B_INTERNAL_DETECTION_NO_DETECTION 

    Not using hardware detection.

    +
    DMAC_B_INTERNAL_DETECTION_FALLING_EDGE 

    Falling edge detection.

    +
    DMAC_B_INTERNAL_DETECTION_RISING_EDGE 

    Rising edge detection.

    +
    DMAC_B_INTERNAL_DETECTION_LOW_LEVEL 

    Low level detection.

    +
    DMAC_B_INTERNAL_DETECTION_HIGH_LEVEL 

    High level detection.

    +
    + +
    +
    + +

    ◆ dmac_b_request_direction_t

    + +
    +
    + + + + +
    enum dmac_b_request_direction_t
    +
    +

    DMA activation request source select. See RZ/T2M hardware manual Table 14.19 DMA Transfer Request Detection Operation Setting Table.

    + + + +
    Enumerator
    DMAC_B_REQUEST_DIRECTION_SOURCE_MODULE 

    Requested by a transfer source module.

    +
    DMAC_B_REQUEST_DIRECTION_DESTINATION_MODULE 

    Requested by a transfer destination module.

    +
    + +
    +
    + +

    ◆ dmac_b_continuous_setting_t

    + +
    +
    + + + + +
    enum dmac_b_continuous_setting_t
    +
    +

    Select the Next register set to be executed next.

    + + + +
    Enumerator
    DMAC_B_CONTINUOUS_SETTING_TRANSFER_ONCE 

    Transfer only once using the Next0 register set.

    +
    DMAC_B_CONTINUOUS_SETTING_TRANSFER_ALTERNATELY 

    Transfers are performed alternately with the Next0 register set and the Next1 register set.

    +
    + +
    +
    + +

    ◆ dmac_b_channel_scheduling_t

    + +
    +
    + + + + +
    enum dmac_b_channel_scheduling_t
    +
    +

    DMAC channel scheduling.

    + + + +
    Enumerator
    DMAC_B_CHANNEL_SCHEDULING_FIXED 

    Fixed priority mode.

    +
    DMAC_B_CHANNEL_SCHEDULING_ROUND_ROBIN 

    Round-robin mode.

    +
    + +
    +
    + +

    ◆ dmac_b_mode_select_t

    + +
    +
    + + + + +
    enum dmac_b_mode_select_t
    +
    +

    DMAC mode setting.

    + + + +
    Enumerator
    DMAC_B_MODE_SELECT_REGISTER 

    Register mode.

    +
    DMAC_B_MODE_SELECT_LINK 

    Link mode.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_DMAC_B_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_DMAC_B_Open (transfer_ctrl_t *const p_api_ctrl,
    transfer_cfg_t const *const p_cfg 
    )
    +
    +

    Configure a DMAC channel.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSSuccessful open.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe configured channel is invalid.
    FSP_ERR_IRQ_BSP_DISABLEDThe IRQ associated with the activation source is not enabled in the BSP.
    FSP_ERR_ALREADY_OPENThe control structure is already opened.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_Reconfigure()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_DMAC_B_Reconfigure (transfer_ctrl_t *const p_api_ctrl,
    transfer_info_t * p_info 
    )
    +
    +

    Reconfigure the transfer with new transfer info.

    +
    Return values
    + + + + + +
    FSP_SUCCESSTransfer is configured and will start when trigger occurs.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_ENABLEDDMAC is not enabled. The current configuration must not be valid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_Reset()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_DMAC_B_Reset (transfer_ctrl_t *const p_api_ctrl,
    void const *volatile p_src,
    void *volatile p_dest,
    uint16_t const num_transfers 
    )
    +
    +

    Reset transfer source, destination, and number of transfers.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_SoftwareStart()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_DMAC_B_SoftwareStart (transfer_ctrl_t *const p_api_ctrl,
    transfer_start_mode_t mode 
    )
    +
    +

    If the mode is TRANSFER_START_MODE_SINGLE initiate a single transfer with software. If the mode is TRANSFER_START_MODE_REPEAT continue triggering transfers until all of the transfers are completed.

    +
    Return values
    + + + + +
    FSP_SUCCESSTransfer started written successfully.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_SoftwareStop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_DMAC_B_SoftwareStop (transfer_ctrl_t *const p_api_ctrl)
    +
    +

    Stop software transfers if they were started with TRANSFER_START_MODE_REPEAT.

    +
    Return values
    + + + + +
    FSP_SUCCESSTransfer stopped written successfully.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_Enable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_DMAC_B_Enable (transfer_ctrl_t *const p_api_ctrl)
    +
    +

    Enable transfers for the configured activation source.

    +
    Return values
    + + + + +
    FSP_SUCCESSCounter value written successfully.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_Disable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_DMAC_B_Disable (transfer_ctrl_t *const p_api_ctrl)
    +
    +

    Disable transfers so that they are no longer triggered by the activation source.

    +
    Return values
    + + + + +
    FSP_SUCCESSCounter value written successfully.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_DMAC_B_InfoGet (transfer_ctrl_t *const p_api_ctrl,
    transfer_properties_t *const p_info 
    )
    +
    +

    Set driver specific information in provided pointer.

    +
    Return values
    + + + + +
    FSP_SUCCESSInformation has been written to p_info.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_DMAC_B_Close (transfer_ctrl_t *const p_api_ctrl)
    +
    +

    Disable transfer and clean up internal data. Implements transfer_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSSuccessful close.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    + +

    ◆ R_DMAC_B_Reload()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_DMAC_B_Reload (transfer_ctrl_t *const p_api_ctrl,
    void const *volatile p_src,
    void *volatile p_dest,
    uint32_t const num_transfers 
    )
    +
    +

    Make the following transfer settings to continue the transfer.

    +
    Return values
    + + + + +
    FSP_SUCCESSSuccessful continuous transfer settings.
    FSP_ERR_ASSERTIONAn input parameter is invalid.
    FSP_ERR_NOT_OPENHandle is not initialized. Call R_DMAC_Open to initialize the control block.
    +
    +
    + +
    +
    +
    +
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b/group___e_l_c.html new file mode 100644 index 0000000..cf2902b --- /dev/null +++ b/group___e_l_c.html @@ -0,0 +1,537 @@ + + + + + + + +RZV Flexible Software Package Documentation: Event Link Controller (r_elc) + + + + + + + + + + + + + + + + + + + +
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    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Functions | +Data Structures
    +
    +
    Event Link Controller (r_elc)
    Modules » System
    +
    +
    + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_ELC_Open (elc_ctrl_t *const p_ctrl, elc_cfg_t const *const p_cfg)
     
    fsp_err_t R_ELC_Close (elc_ctrl_t *const p_ctrl)
     
    fsp_err_t R_ELC_SoftwareEventGenerate (elc_ctrl_t *const p_ctrl, elc_software_event_t event_number)
     
    fsp_err_t R_ELC_LinkSet (elc_ctrl_t *const p_ctrl, elc_peripheral_t peripheral, elc_event_t signal)
     
    fsp_err_t R_ELC_LinkBreak (elc_ctrl_t *const p_ctrl, elc_peripheral_t peripheral)
     
    fsp_err_t R_ELC_Enable (elc_ctrl_t *const p_ctrl)
     
    fsp_err_t R_ELC_Disable (elc_ctrl_t *const p_ctrl)
     
    +

    Detailed Description

    +

    Driver for the ELC peripheral on RZ microprocessor. This module implements the ELC Interface.

    +

    +Overview

    +

    The event link controller (ELC) uses the event requests generated by various peripheral modules as source signals to connect (link) them to different modules, allowing direct cooperation between the modules without central processing unit (CPU) intervention. The conceptual diagram below illustrates a potential setup where a pin input triggers a timer which later triggers an ADC conversion. These tasks would be automatically handled without the need for polling or interrupt management.

    +
    +r_elc_concept.svg +
    +Event Link Controller Conceptual Diagram
    +

    In essence, the ELC is an array of multiplexers to route a wide variety of interrupt signals to a subset of peripheral functions. Events are linked by setting the multiplexer for the desired function to the desired signal (through R_ELC_LinkSet). The diagram below illustrates one peripheral output of the ELC. In this example, a conversion start is triggered for ADC when the GPT00 counter overflows:

    +
    +r_elc_eventset.svg +
    +ELC Example
    +

    +Features

    +

    The ELC HAL module can perform the following functions:

    +
      +
    • Initialize the ELC to a pre-defined set of links
      • +
    • Create an event link between two blocks
      • +
    • Break an event link between two blocks
      • +
    • Generate one of seven software events that interrupt the CPU
      • +
    +

    A variety of functions can be activated via events, including:

    +
      +
    • General-purpose timer (GPT) control
      • +
    • ADC and TSU conversion start
      • +
    • Port group output and input (ports 6, 8 only)
      • +
    • Single port output and input
      • +
    • GBRTH auxiliary timestamp trigger
      • +
    +
    Note
    The available sources and peripherals may differ between devices. A full list of selectable peripherals and events is available in the User's Manual for your device.
    +
    +Some peripherals have specific settings related to ELC event generation and/or reception. Details on how to enable event functionality for each peripheral are located in the usage notes for the related module(s) as well as in the User's Manual for your device.
    +

    +Configuration

    +
    Note
    Event links will be automatically generated based on the selections made in module properties. To view the currently linked events check the Event Links tab in the FSP Configuration editor.
    +

    To manually link an event to a peripheral at runtime perform the following steps:

    +
      +
    1. Configure the operation of the destination peripheral (including any configuration necessary to receive events)
      2. +
    2. Use R_ELC_LinkSet to set the desired event link to the peripheral
      3. +
    3. Configure the signaling module to output the desired event (typically an interrupt)
      4. +
    +

    To disable the event, either use R_ELC_LinkBreak to clear the link for a specific event.

    +
    Note
    The ELC module needs no pin, clocking or interrupt configuration; it is merely a mechanism to connect signals between peripherals. However, when linking I/O Ports via the ELC the relevant I/O pins need to be configured as inputs or outputs, and more ELC module I/O port settings.
    +
    +Interrupt and event signals are exclusive output controlled. Signals that can be handled as either interrupt signals or event signals are no longer output as interrupt signals when linked to peripherals by the ELC module. Interrupt and/or event signals are listed in the User's Manual for your device.
    +

    Build Time Configurations for r_elc

    +The following build time configurations are defined in fsp_cfg/r_elc_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for System > Event Link Controller (r_elc)

    +This module can be added to the Stacks tab via New Stack > System > Event Link Controller (r_elc).
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    NameELC instance name must be g_elc to match elc_cfg_t data structure created in elc_data.cg_elc Module name. Fixed to g_elc.
    +

    +

    +Usage Notes

    +

    +Limitations

    +

    Developers should be aware of the following limitations when using the ELC:

    +
      +
    • To link events it is necessary for the ELC and the related modules to be enabled. The ELC cannot operate if the related modules are in the module stop state or the MPU is in a low power consumption mode for which the module is stopped.
      • +
    • Signals to the ICU from the other units must be input with an interval of at least 34 cycles at 100 MHz between them. If an interval is shorter than this, input signals may be lost.
      • +
    • Using a DMAC REQ signal generated by an SW DMAC Request Generation Register as an event output is not allowed.
      • +
    +

    +Examples

    +

    Basic Example

    +

    Below is a basic example of minimal use of event linking in an application.

    +
    /* This struct is automatically generated based on the events configured by peripherals in the RZ Configuration editor. */
    static const elc_cfg_t g_elc_cfg =
    {
    .link[ELC_PERIPHERAL_GPT0_ACT0] = ELC_EVENT_SW_EVENT_0,
    .link[ELC_PERIPHERAL_GPT0_ACT1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT0_ACT2] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT0_ACT3] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT0_ACT4] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT0_ACT5] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT0_ACT6] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT0_ACT7] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT2] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT3] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT4] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT5] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT6] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GPT1_ACT7] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ADC0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_TSU0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_TSU1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_INPORTGR1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_INPORTGR0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_SINGLEPORT0] = ELC_EVENT_GPT_U0_GPT_ELCOVF_0,
    .link[ELC_PERIPHERAL_SINGLEPORT1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_SINGLEPORT2] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_SINGLEPORT3] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_OUTPORTGR0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_OUTPORTGR1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH0_TGR0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH0_TGR1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH0_TGR2] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH0_TGR3] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH1_TGR0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH1_TGR1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH1_TGR2] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_GBETH1_TGR3] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC0] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC1] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC2] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC3] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC4] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC5] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC6] = ELC_EVENT_NONE,
    .link[ELC_PERIPHERAL_ICU_DMAC7] = ELC_EVENT_NONE
    };
    void elc_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the software and sets the links defined in the control structure. */
    err = R_ELC_Open(&g_elc_ctrl, &g_elc_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Create or modify a link between a peripheral function and an event source. */
    err = R_ELC_LinkSet(&g_elc_ctrl, ELC_PERIPHERAL_ADC0, ELC_EVENT_GPT_U0_GPT_ELCOVF_0);
    handle_error(err);
    }
    + + + +

    +Data Structures

    struct  elc_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ elc_instance_ctrl_t

    + +
    +
    + + + + +
    struct elc_instance_ctrl_t
    +
    +

    ELC private control block. DO NOT MODIFY. Initialization occurs when R_ELC_Open() is called.

    +
    +
    +
    +

    Function Documentation

    + +

    ◆ R_ELC_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ELC_Open (elc_ctrl_t *const p_ctrl,
    elc_cfg_t const *const p_cfg 
    )
    +
    +

    Initialize all the links in the Event Link Controller. Implements elc_api_t::open

    +

    The configuration structure passed in to this function includes links for every event source included in the ELC and sets them all at once. To set or clear an individual link use R_ELC_LinkSet and R_ELC_LinkBreak respectively.

    +
    Return values
    + + + + +
    FSP_SUCCESSInitialization was successful
    FSP_ERR_ASSERTIONp_ctrl or p_cfg was NULL
    FSP_ERR_ALREADY_OPENThe module is currently open
    +
    +
    + +
    +
    + +

    ◆ R_ELC_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ELC_Close (elc_ctrl_t *const p_ctrl)
    +
    +

    Globally disable ELC linking. Implements elc_api_t::close

    +
    Return values
    + + + + +
    FSP_SUCCESSThe ELC was successfully disabled
    FSP_ERR_ASSERTIONp_ctrl was NULL
    FSP_ERR_NOT_OPENThe module has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_ELC_SoftwareEventGenerate()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ELC_SoftwareEventGenerate (elc_ctrl_t *const p_ctrl,
    elc_software_event_t event_number 
    )
    +
    +

    Generate a software event in the Event Link Controller. Implements elc_api_t::softwareEventGenerate

    +
    Return values
    + + + + +
    FSP_SUCCESSInitialization was successful
    FSP_ERR_ASSERTIONInvalid event number or p_ctrl was NULL
    FSP_ERR_NOT_OPENThe module has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_ELC_LinkSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ELC_LinkSet (elc_ctrl_t *const p_ctrl,
    elc_peripheral_t peripheral,
    elc_event_t signal 
    )
    +
    +

    Create a single event link. Implements elc_api_t::linkSet

    +
    Return values
    + + + + +
    FSP_SUCCESSInitialization was successful
    FSP_ERR_ASSERTIONp_ctrl was NULL
    FSP_ERR_NOT_OPENThe module has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_ELC_LinkBreak()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_ELC_LinkBreak (elc_ctrl_t *const p_ctrl,
    elc_peripheral_t peripheral 
    )
    +
    +

    Break an event link. Implements elc_api_t::linkBreak

    +
    Return values
    + + + + +
    FSP_SUCCESSEvent link broken
    FSP_ERR_ASSERTIONp_ctrl was NULL
    FSP_ERR_NOT_OPENThe module has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_ELC_Enable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ELC_Enable (elc_ctrl_t *const p_ctrl)
    +
    +

    Enable the operation of the Event Link Controller. Implements elc_api_t::enable

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    + +

    ◆ R_ELC_Disable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_ELC_Disable (elc_ctrl_t *const p_ctrl)
    +
    +

    Disable the operation of the Event Link Controller. Implements elc_api_t::disable

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___e_l_c.js b/group___e_l_c.js new file mode 100644 index 0000000..8280581 --- /dev/null +++ b/group___e_l_c.js @@ -0,0 +1,11 @@ +var group___e_l_c = +[ + [ "elc_instance_ctrl_t", "group___e_l_c.html#structelc__instance__ctrl__t", null ], + [ "R_ELC_Open", "group___e_l_c.html#ga35864de459d2ef45a03da4343729712f", null ], + [ "R_ELC_Close", "group___e_l_c.html#gac5e6b998138cc28bcbd8b17a5eb26674", null ], + [ "R_ELC_SoftwareEventGenerate", "group___e_l_c.html#gaa8735a16325cfeff3c47a50345d11d82", null ], + [ "R_ELC_LinkSet", "group___e_l_c.html#ga4b40a4cb59194b6315cf608cd5e36bd9", null ], + [ "R_ELC_LinkBreak", "group___e_l_c.html#ga2b2ed9cb9e86bf6c75d85977c4c135ff", null ], + [ "R_ELC_Enable", "group___e_l_c.html#ga4bcac22edb575069ba86d87ce9aea84c", null ], + [ "R_ELC_Disable", "group___e_l_c.html#gad52f538fbce405f18a46f6e42cce9ebf", null ] +]; \ No newline at end of file diff --git a/group___e_l_c___a_p_i.html b/group___e_l_c___a_p_i.html new file mode 100644 index 0000000..4bf2d8b --- /dev/null +++ b/group___e_l_c___a_p_i.html @@ -0,0 +1,526 @@ + + + + + + + +RZV Flexible Software Package Documentation: ELC Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    ELC Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for the Event Link Controller.

    + + + + + + + + +

    +Data Structures

    struct  elc_cfg_t
     
    struct  elc_api_t
     
    struct  elc_instance_t
     
    + + + +

    +Typedefs

    typedef void elc_ctrl_t
     
    + + + + + +

    +Enumerations

    enum  elc_peripheral_t
     
    enum  elc_software_event_t
     
    +

    Data Structure Documentation

    + +

    ◆ elc_cfg_t

    + +
    +
    + + + + +
    struct elc_cfg_t
    +
    +

    Main configuration structure for the Event Link Controller

    +
    + + + + +
    Data Fields
    +elc_event_t const +link[ELC_PERIPHERAL_NUM] +Event link register settings.
    + +
    +
    + +

    ◆ elc_api_t

    + +
    +
    + + + + +
    struct elc_api_t
    +
    +

    ELC driver structure. General ELC functions implemented at the HAL layer follow this API.

    +
    + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(elc_ctrl_t *const p_ctrl, elc_cfg_t const *const p_cfg)
     
    fsp_err_t(* close )(elc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* softwareEventGenerate )(elc_ctrl_t *const p_ctrl, elc_software_event_t event_num)
     
    fsp_err_t(* linkSet )(elc_ctrl_t *const p_ctrl, elc_peripheral_t peripheral, elc_event_t signal)
     
    fsp_err_t(* linkBreak )(elc_ctrl_t *const p_ctrl, elc_peripheral_t peripheral)
     
    fsp_err_t(* enable )(elc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* disable )(elc_ctrl_t *const p_ctrl)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::open) (elc_ctrl_t *const p_ctrl, elc_cfg_t const *const p_cfg)
    +
    +

    Initialize all links in the Event Link Controller.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [in]p_cfgPointer to configuration structure.
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::close) (elc_ctrl_t *const p_ctrl)
    +
    +

    Disable all links in the Event Link Controller and close the API.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control structure.
    +
    +
    + +
    +
    + +

    ◆ softwareEventGenerate

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::softwareEventGenerate) (elc_ctrl_t *const p_ctrl, elc_software_event_t event_num)
    +
    +

    Generate a software event in the Event Link Controller.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [in]eventNumSoftware event number to be generated.
    +
    +
    + +
    +
    + +

    ◆ linkSet

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::linkSet) (elc_ctrl_t *const p_ctrl, elc_peripheral_t peripheral, elc_event_t signal)
    +
    +

    Create a single event link.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to control structure.
    [in]peripheralThe peripheral block that will receive the event signal.
    [in]signalThe event signal.
    +
    +
    + +
    +
    + +

    ◆ linkBreak

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::linkBreak) (elc_ctrl_t *const p_ctrl, elc_peripheral_t peripheral)
    +
    +

    Break an event link.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [in]peripheralThe peripheral that should no longer be linked.
    +
    +
    + +
    +
    + +

    ◆ enable

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::enable) (elc_ctrl_t *const p_ctrl)
    +
    +

    Enable the operation of the Event Link Controller.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control structure.
    +
    +
    + +
    +
    + +

    ◆ disable

    + +
    +
    + + + + +
    fsp_err_t(* elc_api_t::disable) (elc_ctrl_t *const p_ctrl)
    +
    +

    Disable the operation of the Event Link Controller.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control structure.
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ elc_instance_t

    + +
    +
    + + + + +
    struct elc_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +elc_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +elc_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +elc_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ elc_ctrl_t

    + +
    +
    + + + + +
    typedef void elc_ctrl_t
    +
    +

    ELC control block. Allocate an instance specific control block to pass into the ELC API calls.

    Implemented as
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ elc_peripheral_t

    + +
    +
    + + + + +
    enum elc_peripheral_t
    +
    +

    Possible peripherals to be linked to event signals (not all available on all MCUs)

    + +
    +
    + +

    ◆ elc_software_event_t

    + +
    +
    + + + + +
    enum elc_software_event_t
    +
    +

    Software event number

    + + + +
    Enumerator
    ELC_SOFTWARE_EVENT_0 

    Software event 0.

    +
    ELC_SOFTWARE_EVENT_1 

    Software event 1.

    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___e_l_c___a_p_i.js b/group___e_l_c___a_p_i.js new file mode 100644 index 0000000..0456e1d --- /dev/null +++ b/group___e_l_c___a_p_i.js @@ -0,0 +1,26 @@ +var group___e_l_c___a_p_i = +[ + [ "elc_cfg_t", "group___e_l_c___a_p_i.html#structelc__cfg__t", [ + [ "link", "group___e_l_c___a_p_i.html#ad58380dc39c1d257fc9128dda007865d", null ] + ] ], + [ "elc_api_t", "group___e_l_c___a_p_i.html#structelc__api__t", [ + [ "open", "group___e_l_c___a_p_i.html#ac4f753f3fcae95e036d24e3d6a84d1f5", null ], + [ "close", "group___e_l_c___a_p_i.html#a4ca08e8e0db93700e8e4f651f4492977", null ], + [ "softwareEventGenerate", "group___e_l_c___a_p_i.html#a5201eaeb1fbc56f6c78b9db34fb580e3", null ], + [ "linkSet", "group___e_l_c___a_p_i.html#a05af30d0ca7743f5a033b10d664ded59", null ], + [ "linkBreak", "group___e_l_c___a_p_i.html#aded8ab0cdd59a636f2a5cc60313c54c5", null ], + [ "enable", "group___e_l_c___a_p_i.html#a5ec2e92543d9a74fd4e33b20b9782ef5", null ], + [ "disable", "group___e_l_c___a_p_i.html#a91eea8824e8ea3d204860d16abb8d78a", null ] + ] ], + [ "elc_instance_t", "group___e_l_c___a_p_i.html#structelc__instance__t", [ + [ "p_ctrl", "group___e_l_c___a_p_i.html#a666a726dd9209856799d03b62b703029", null ], + [ "p_cfg", "group___e_l_c___a_p_i.html#a90896863b4141cbbd2eb4d2eea7e58e4", null ], + [ "p_api", "group___e_l_c___a_p_i.html#a9919c68bc6249d294d121715277a53dd", null ] + ] ], + [ "elc_ctrl_t", "group___e_l_c___a_p_i.html#ga71d9612a7e093ba6bbef8ff708266596", null ], + [ "elc_peripheral_t", "group___e_l_c___a_p_i.html#gaa5bf5e18ceb8cf51ac6dce985f9230a7", null ], + [ "elc_software_event_t", "group___e_l_c___a_p_i.html#ga5fed76c06664ddad69c5a7ccb0330f0e", [ + [ "ELC_SOFTWARE_EVENT_0", "group___e_l_c___a_p_i.html#ga5fed76c06664ddad69c5a7ccb0330f0ea862eb8abb2f512a4b4caaa1ee6900d27", null ], + [ "ELC_SOFTWARE_EVENT_1", "group___e_l_c___a_p_i.html#ga5fed76c06664ddad69c5a7ccb0330f0ea4ba5ce998b49ee8ba5fd264f53146d6d", null ] + ] ] +]; \ No newline at end of file diff --git a/group___e_x_t_e_r_n_a_l___i_r_q___a_p_i.html b/group___e_x_t_e_r_n_a_l___i_r_q___a_p_i.html index ea703e1..f8830e9 100644 --- a/group___e_x_t_e_r_n_a_l___i_r_q___a_p_i.html +++ b/group___e_x_t_e_r_n_a_l___i_r_q___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: External IRQ Interface +RZV Flexible Software Package Documentation: External IRQ Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -104,7 +172,9 @@

    Summary

    The External IRQ Interface is for configuring interrupts to fire when a trigger condition is detected on an external IRQ pin.

    The External IRQ Interface can be implemented by:

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    General PWM Timer (r_gpt)
    Modules
    +
    General PWM Timer (r_gpt)
    Modules » Timers

    @@ -281,7 +351,9 @@

    Initial configuration.

    Implemented as
    Parameters
    @@ -306,7 +378,9 @@

    Enable callback when an external trigger condition occurs.

    Implemented as
    Parameters
    @@ -330,7 +404,9 @@

    Disable callback when external trigger condition occurs.

    Implemented as
    Parameters
    @@ -354,7 +430,9 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    Parameters
    @@ -381,7 +459,9 @@

    Allow driver to be reconfigured. May reduce power consumption.

    Implemented as
    Parameters
    @@ -445,7 +525,9 @@

    External IRQ control block. Allocate an instance specific control block to pass into the external IRQ API calls.

    Implemented as
    @@ -508,7 +590,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___g_p_t.html b/group___g_p_t.html index 0d744e7..b74b429 100644 --- a/group___g_p_t.html +++ b/group___g_p_t.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: General PWM Timer (r_gpt) +RZV Flexible Software Package Documentation: General PWM Timer (r_gpt) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -129,22 +197,26 @@ + + + +
     
    fsp_err_t R_GPT_AdcTriggerSet (timer_ctrl_t *const p_ctrl, gpt_adc_compare_match_t which_compare_match, uint32_t compare_match_value)
     
    fsp_err_t R_GPT_PwmOutputDelaySet (timer_ctrl_t *const p_ctrl, gpt_pwm_output_delay_edge_t edge, gpt_pwm_output_delay_setting_t delay_setting, uint32_t const pin)
     
    fsp_err_t R_GPT_CallbackSet (timer_ctrl_t *const p_api_ctrl, void(*p_callback)(timer_callback_args_t *), void const *const p_context, timer_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_GPT_Close (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_GPT_PwmOutputDelayInitialize ()
     

    Detailed Description

    Driver for the GPT peripheral on RZ MPUs. This module implements the Timer Interface.

    Overview

    The GPT module can be used to count events, measure external input signals, generate a periodic interrupt, or output a periodic or PWM signal to a GTIOC pin.

    -

    This module supports the GPT peripherals GPT32E are 32-bit timers. The 32-bit timers are all treated the same in this module from the API perspective.

    +

    This module supports the GPT peripherals are 32-bit timers. The 32-bit timers are all treated the same in this module from the API perspective.

    Features

    The GPT module has the following features:

    • Supports periodic mode, one-shot mode, and PWM mode.
      • -
    • Supports count source of PCLK, GTETRG pins or GTIOC pins.
      • +
    • Supports count source of PCLK, GTETRG pins or GTIOC pins or ELC events. *1
    • Supports debounce filter on GTIOC pins.
    • Signal can be output to a pin.
    • Configurable period (counts per timer cycle).
      • @@ -154,7 +226,7 @@

    • APIs are provided to start, stop, and reset the counter.
    • APIs are provided to get the current period, source clock frequency, and count direction.
    • APIs are provided to get the current timer status and counter value.
      • -
    • Supports start, stop, clear, count up, count down, and capture by external sources from GTETRG pins or GTIOC pins.
      • +
    • Supports start, stop, clear, count up, count down, and capture by external sources from GTETRG pins or GTIOC pins or ELC events. *1
    • Supports symmetric and asymmetric PWM waveform generation.
    • Supports automatic addition of dead time.
    • Supports generating A/D converter start trigger.
      • @@ -162,20 +234,35 @@

    • Supports setting the counter value while the timer is stopped.
    • Supports enabling and disabling output pins.
    • Supports skipping up to seven overflow/underflow (crest/trough) interrupts at a time
      • +
    • Supports phase count function.
      • +
    • Supports dead time error interrupt.

    +

    *1 ELC event only supports RZ/V2H.

    Selecting a Timer

    RZ MPUs have two timer peripherals: the General PWM Timer (GPT) and the General Timer (GTM). When selecting between them, consider these factors:

    +

    RZV2L

    - + - +
    GPT GTM
    Available ChannelsThe number of GPT channels is device specific. All currently supported MPUs have at least 6 GPT channels.All MPUs have 3 GTM channels.
    Available ChannelsThe number of GPT channels are 8 channels (ch0~7). The number of GTM channels are 3 channels (ch0~2).
    Timer ResolutionAll MPUs have 32-bit GPT timer.The GTM timers are 32-bit timers.
    Timer ResolutionThe GPT timers have 32-bit timers.The GTM timers are 32-bit timers.
    Clock SourceThe GPT runs off P0 clock with a configurable divider up to 1024.The GTM runs off P0 clock.
    +

    RZV2H

    + + + + + + + + + +
    GPT GTM
    Available ChannelsThe number of GPT channels are 16 channels (ch0~15).The number of GTM channels are 3 channels (ch0~2).
    Timer ResolutionThe GPT timers have 32-bit GPT timer.The GTM timers are 32-bit timers.
    Clock SourceThe GPT runs off P4 clock with a configurable divider up to 1024.The GTM runs off P0 clock.

    Configuration

    Build Time Configurations for r_gpt

    @@ -202,7 +289,7 @@

  • Enabled with Extra Features
    • -Disabled If selected code for outputting a waveform to a pin is included in the build. +Disabled Enables or disables support for outputting PWM waveforms on GTIOCx pins. The "Enabled with Extra Features" option enables support for Triangle wave modes and also enables the features located in the "Extra Features" section of each module instance. Write Protect Enable
    • @@ -211,16 +298,18 @@

      Disabled

    Disabled If selected write protection is applied to all GPT channels. + +Clock SourceMCU Specific OptionsSelect either the synchronous clock or asynchronous clock as the source for the GPT core clock. -

    Configurations for Driver > Timers > Timer Driver on r_gpt

    -This module can be added to the Stacks tab via New Stack > Driver > Timers > Timer Driver on r_gpt.
    +

    Configurations for Timers > Timer, General PWM (r_gpt)

    +This module can be added to the Stacks tab via New Stack > Timers > Timer, General PWM (r_gpt).

    - + - - - + + + + + + + + + + + + + + + + + + + - + - + - - + - + - + - + @@ -333,25 +514,37 @@

    Configurations for Driver > Timers > Timer Driver on r_gpt

  • No Filter
  • -Filter P0CLK / 1
    • +Filter CLK / 1
  • -Filter P0CLK / 4
    • +Filter CLK / 4
  • -Filter P0CLK / 16
    • +Filter CLK / 16
  • -Filter P0CLK / 64
    • +Filter CLK / 64 + + + + + + - + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_timer0 Module name.
    General > ChannelChannel number must exist on this MPU0 Specify the hardware channel.
    General > ChannelChannel number must be a positive integer0 Specify the hardware channel.
    General > Mode
    • @@ -230,9 +319,13 @@

      Configurations for Driver > Timers > Timer Driver on r_gpt

    • PWM
    • +One-Shot Pulse
      • +
    • Triangle-Wave Symmetric PWM
    • Triangle-Wave Asymmetric PWM
      • +
    • +Triangle-Wave Asymmetric PWM (Mode 3)
    		Periodic Mode selection.
    Periodic: Generates periodic interrupts or square waves.
    @@ -241,9 +334,9 @@

    Configurations for Driver > Timers > Timer Driver on r_gpt

    Triangle-Wave Symmetric PWM: Generates symmetric PWM waveforms with duty cycle determined by compare match set during a crest interrupt and updated at the next trough.
    Triangle-Wave Asymmetric PWM: Generates asymmetric PWM waveforms with duty cycle determined by compare match set during a crest/trough interrupt and updated at the next trough/crest.
    General > Buffer ModeSingle BufferSingle Buffer This device only supports Single Buffer Mode.
    General > PeriodValue must be a non-negative integer less than or equal to 0x400000000001 Specify the timer period in units selected below. Setting the period to 0x100000000 raw counts results in the maximum period. Set the period to 0x100000000 raw counts for a free running timer or an input capture configuration. The period can be set up to 0x40000000000, which will use a divider of 1024 with the maximum period.
    General > PeriodValue must be a non-negative integer less than or equal to 0x400000000001 Specify the timer period in units selected below. Set the period to 0x100000000 (32-bit) or 0x10000 (16-bit) raw counts for a free running timer or an input capture configuration. The period can be set up to 0x40000000000 (32-bit) or 0x4000000 (16-bit) which will use a divider of 1024 with the maximum period.
    +
    +If the requested period cannot be achieved, the settings with the largest possible period that is less than or equal to the requested period are used. The theoretical calculated period is printed in a comment in the generated timer_cfg_t structure.
    General > Period Unit
    • @@ -263,6 +356,94 @@

      Configurations for Driver > Timers > Timer Driver on r_gpt

    		Milliseconds Unit of the period specified above
    Output > Custom Waveform > GTIOA > Initial Output Level
      +
    • +Pin Level Low
      • +
    • +Pin Level High
      • +
    +    		Pin Level Low Set the initial output level of GTIOCxA.
    Output > Custom Waveform > GTIOA > Cycle End Output Level
      +
    • +Pin Level Retain
      • +
    • +Pin Level Low
      • +
    • +Pin Level High
      • +
    • +Pin Level Toggle
      • +
    +    		Pin Level Retain Set the output level of GTIOCxA at cycle end.
    Output > Custom Waveform > GTIOA > Compare Match Output Level
      +
    • +Pin Level Retain
      • +
    • +Pin Level Low
      • +
    • +Pin Level High
      • +
    • +Pin Level Toggle
      • +
    +    		Pin Level Retain Set the output level of GTIOCxA at compare match.
    Output > Custom Waveform > GTIOA > Retain Output Level at Count Stop
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Retain the current GTIOxA output level when counting is stopped.
    Output > Custom Waveform > GTIOB > Initial Output Level
      +
    • +Pin Level Low
      • +
    • +Pin Level High
      • +
    +    		Pin Level Low Set the initial output level of GTIOCxB.
    Output > Custom Waveform > GTIOB > Cycle End Output Level
      +
    • +Pin Level Retain
      • +
    • +Pin Level Low
      • +
    • +Pin Level High
      • +
    • +Pin Level Toggle
      • +
    +    		Pin Level Retain Set the output level of GTIOCxB at cycle end.
    Output > Custom Waveform > GTIOB > Compare Match Output Level
      +
    • +Pin Level Retain
      • +
    • +Pin Level Low
      • +
    • +Pin Level High
      • +
    • +Pin Level Toggle
      • +
    +    		Pin Level Retain Set the output level of GTIOCxB at compare match.
    Output > Custom Waveform > GTIOB > Retain Output Level at Count Stop
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Retain the current GTIOxB output level when counting is stopped.
    Output > Custom Waveform > Custom Waveform Enable
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Enable custom waveform configuration.
    Output > Duty Cycle Percent (only applicable in PWM mode)Value must be between 0 and 10050 Specify the timer duty cycle percent. Only used in PWM mode.
    Output > GTIOCA Output Enabled
      @@ -297,35 +478,35 @@

      Configurations for Driver > Timers > Timer Driver on r_gpt

    		Pin Level Low Select the behavior of the output pin when the timer is stopped.
    Input > Count Up SourceMPU Specific OptionsSelect external source that will increment the counter. If any count up source is selected, the timer will count the external sources only. It will not count P0 clock cycles.
    Input > Count Up SourceMCU Specific OptionsSelect external source that will increment the counter. If any count up source is selected, the timer will count the external sources only. It will not count PCLKD cycles.
    Input > Count Down SourceMPU Specific OptionsSelect external source that will decrement the counter. If any count down source is selected, the timer will count the external sources only. It will not count P0 clock cycles.
    Input > Count Down SourceMCU Specific OptionsSelect external source that will decrement the counter. If any count down source is selected, the timer will count the external sources only. It will not count PCLKD cycles.
    Input > Start SourceMPU Specific OptionsSelect external source that will start the timer.
    +    		Input > Start SourceMCU Specific OptionsSelect external source that will start the timer.

    For pulse width measurement, set the Start Source and the Clear Source to the trigger edge (the edge to start the measurement), and set the Stop Source and Capture Source (either A or B) to the opposite edge (the edge to stop the measurement).

    For pulse period measurement, set the Start Source, the Clear Source, and the Capture Source (either A or B) to the trigger edge (the edge to start the measurement).
    Input > Stop SourceMPU Specific OptionsSelect external source that will stop the timer.
    Input > Stop SourceMCU Specific OptionsSelect external source that will stop the timer.
    Input > Clear SourceMPU Specific OptionsSelect external source that will clear the timer.
    Input > Clear SourceMCU Specific OptionsSelect external source that will clear the timer.
    Input > Capture A SourceMPU Specific OptionsSelect external source that will trigger a capture A event.
    Input > Capture A SourceMCU Specific OptionsSelect external source that will trigger a capture A event.
    Input > Capture B SourceMPU Specific OptionsSelect external source that will trigger a capture B event.
    Input > Capture B SourceMCU Specific OptionsSelect external source that will trigger a capture B event.
    Input > Noise Filter A Sampling Clock Select
    • No Filter
    • -Filter P0CLK / 1
      • +Filter CLK / 1
    • -Filter P0CLK / 4
      • +Filter CLK / 4
    • -Filter P0CLK / 16
      • +Filter CLK / 16
    • -Filter P0CLK / 64
      • +Filter CLK / 64
    		No Filter Select the input filter for GTIOCA.
    No Filter Select the input filter for GTIOCB.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be specified here. If this callback function is provided, it will be called from the interrupt service routine (ISR) each time the timer period elapses
    Interrupts > Overflow/Crest Interrupt EnableMCU Specific OptionsEnable the Overflow/Crest Interrupt.
    Interrupts > Overflow/Crest Interrupt PriorityValue must be an integer between 0 and 2554 Select the overflow interrupt priority. This is the crest interrupt for triangle-wave PWM.
    Interrupts > Capture A Interrupt EnableMCU Specific OptionsEnable the Capture A Interrupt.
    Interrupts > Capture A Interrupt PriorityValue must be an integer between 0 and 2554 Select the interrupt priority for capture A.
    Interrupts > Capture B Interrupt EnableMCU Specific OptionsEnable the Capture B Interrupt.
    Interrupts > Capture B Interrupt PriorityValue must be an integer between 0 and 2554 Select the interrupt priority for capture B.
    Interrupts > Trough Interrupt PriorityValue must be an integer between 0 and 2554 Select the interrupt priority for the trough interrupt (triangle-wave PWM only).
    Interrupts > Underflow/Trough Interrupt EnableMCU Specific OptionsEnable the Underflow/Trough Interrupt.
    Interrupts > Underflow/Trough Interrupt PriorityValue must be an integer between 0 and 2554 Select the interrupt priority for the trough interrupt (triangle-wave PWM only).
    Interrupts > Dead Time Error Interrupt EnableMCU Specific OptionsEnable dead time error Interrupt.
    Interrupts > Dead Time Error Interrupt PriorityValue must be an integer between 0 and 2554 Select the interrupt priority for dead time error.
    Extra Features > Output Disable > POEG Link
    • @@ -474,7 +667,7 @@

      Configurations for Driver > Timers > Timer Driver on r_gpt

      Clock Configuration

      -

      The GPT clock is based on the P0 clock frequency. In RZ/V FSP, the clock frequency is depending on the setting of main core(Arm Cortex-A55). You must set the clock frequency which is same as the setting of main core using the Clocks tab of the Configuration editor.

      +

      The GPT clock is based on the peripheral clock frequency. You can set the peripheral clock frequency using the Clocks tab of the Configuration editor

      Pin Configuration

      This module can use GTETRGA, GTETRGB, GTETRGC, GTETRGD, GTIOCA and GTIOCB pins as count sources.

      @@ -482,7 +675,7 @@

      This module can use GTIOCA and GTIOCB as input pins to measure input signals.

      Usage Notes

      -

      Maximum Period for GPT32E

      +

      Maximum Period

      The Configuration editor will automatically calculate the period count value and source clock divider based on the selected period time, units and clock speed.

      When the selected period unit is "Raw counts", the maximum period setting is 0x40000000000 on a 32-bit timer. This will configure the timer with the maximum period and a count clock divisor of 1024.

      Note
      When manually changing the timer period counts the maximum value for a 32-bit GPT is 0x100000000. This number overflows the 32-bit value for timer_cfg_t::period_counts. To configure the timer for the maximum period, set timer_cfg_t::period_counts to 0.
      @@ -491,7 +684,7 @@

      Updating Period and Duty Cycle

      One-Shot Mode

      The GPT timer does not support one-shot mode natively. One-shot mode is achieved by stopping the timer in the interrupt service routine before the callback is called. If the interrupt is not serviced before the timer period expires again, the timer generates more than one event. The callback is only called once in this case.

      One-Shot Mode Output

      -

      The output waveform in one-shot mode is one P0 clock cycle less than the configured period. The configured period must be at least 2 counts to generate an output pulse.

      +

      The output waveform in one-shot mode is one peripheral clock cycle less than the configured period. The configured period must be at least 2 counts to generate an output pulse.

      Examples of one-shot signals that can be generated by this module are shown below:

      r_gpt_one_shot_output.svg @@ -517,6 +710,9 @@

      Triangle-Wave PWM Output

      r_gpt_triangle_wave_pwm_output.svg
      GPT Triangle-Wave PWM Output
      +

      Event Counting

      +

      Event counting can be done by selecting up or down counting sources from GTETRG pins, ELC events, or GTIOC pins. In event counting mode, the GPT counter is not affected by peripheral clock.

      +
      Note
      In event counting mode, the application must call R_GPT_Start() to enable event counting. The counter will not change after calling R_GPT_Start() until an event occurs.

      Pulse Measurement

      If the capture edge occurs before the start edge in pulse measurement, the first capture is invalid (0).

      Controlling GPT with GTETRG Edges

      @@ -524,6 +720,15 @@

      Controlling GPT with GTETRG Edges

      Note
      The GTETRG pins are shared by all GPT channels.
      GTETRG pins require POEG to be on (example code for this is provided in GPT Free Running Counter Example). If input filtering is required on the GTETRG pins, that must also be handled outside this module.
      +

      Controlling GPT with ELC Events

      +

      The GPT timer can be configured to stop, start, clear, count up, or count down when an ELC event occurs.

      +
      Note
      The configurable ELC GPT sources are shared by all GPT channels.
      +
      +The event links for the ELC must be configured outside this module.
      +

      Triggering ELC Events with GPT

      +

      The GPT timer can trigger the start of other peripherals. The Event Link Controller (r_elc) guide provides a list of all available peripherals.

      +

      Enabling External Sources for Start, Stop, Clear, or Capture

      +

      R_GPT_Enable() must be called when external sources are used for start, stop, clear, or capture.

      Interrupt Skipping

      When an interrupt skipping source is selected a hardware counter will increment each time the selected event occurs. Each interrupt past the first (up to the specified skip count) will be suppressed. If ADC events are selected for skipping they will also be suppressed except during the timer period leading to the selected interrupt skipping event (see below diagram).

      @@ -538,17 +743,21 @@

      GPT Basic Example

      This is an example of a timer callback.

      /* Example callback called when timer expires. */
      void timer_callback (timer_callback_args_t * p_args)
      {
      if (TIMER_EVENT_CYCLE_END == p_args->event)
      {
      /* Add application code to be called periodically here. */
      }
      }

      GPT Free Running Counter Example

      To use the GPT as a free running counter, select periodic mode and set the the Period to 0xFFFFFFFF for a 32-bit timer.

      -
      void gpt_counter_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* (Optional) If event count mode is used to count edges on a GTETRG pin, POEG must be started to use GTETRG. */
      R_BSP_MODULE_START(FSP_IP_POEG, 0U);
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer4_ctrl, &g_timer4_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Start the timer. */
      (void) R_GPT_Start(&g_timer4_ctrl);
      /* (Optional) Stop the timer. */
      (void) R_GPT_Stop(&g_timer4_ctrl);
      /* Read the current counter value. Counter value is in status.counter. */
      timer_status_t status;
      (void) R_GPT_StatusGet(&g_timer4_ctrl, &status);
      }

      GPT Input Capture Example

      +
      void gpt_counter_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* (Optional) If event count mode is used to count edges on a GTETRG pin, POEG must be started to use GTETRG. */
      R_BSP_MODULE_START(FSP_IP_POEG, 0U);
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer4_ctrl, &g_timer4_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Start the timer. */
      (void) R_GPT_Start(&g_timer4_ctrl);
      /* (Optional) Stop the timer. */
      (void) R_GPT_Stop(&g_timer4_ctrl);
      /* Read the current counter value. Counter value is in status.counter. */
      timer_status_t status;
      (void) R_GPT_StatusGet(&g_timer4_ctrl, &status);
      }

      GPT Input Capture Example

      This is an example of using the GPT to capture pulse width or pulse period measurements.

      /* Example callback called when a capture occurs. */
      uint64_t g_captured_time = 0U;
      uint32_t g_capture_overflows = 0U;
      void timer_capture_callback (timer_callback_args_t * p_args)
      {
      if ((TIMER_EVENT_CAPTURE_A == p_args->event) || (TIMER_EVENT_CAPTURE_B == p_args->event))
      {
      /* (Optional) Get the current period if not known. */
      timer_info_t info;
      (void) R_GPT_InfoGet(&g_timer4_ctrl, &info);
      uint64_t period = info.period_counts;
      /* The maximum period is one more than the maximum 32-bit number, but will be reflected as 0 in
      * timer_info_t::period_counts. */
      if (0U == period)
      {
      period = UINT32_MAX + 1U;
      }
      g_captured_time = (period * g_capture_overflows) + p_args->capture;
      g_capture_overflows = 0U;
      }
      if (TIMER_EVENT_CYCLE_END == p_args->event)
      {
      /* An overflow occurred during capture. This must be accounted for at the application layer. */
      g_capture_overflows++;
      }
      }
      void gpt_capture_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer4_ctrl, &g_timer4_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Enable captures. Captured values arrive in the interrupt. */
      (void) R_GPT_Enable(&g_timer4_ctrl);
      /* (Optional) Disable captures. */
      (void) R_GPT_Disable(&g_timer4_ctrl);
      }

      GPT Period Update Example

      This an example of updating the period.

      -
      #define GPT_EXAMPLE_MSEC_PER_SEC (1000)
      #define GPT_EXAMPLE_DESIRED_PERIOD_MSEC (20)
      /* This example shows how to calculate a new period value at runtime. */
      void gpt_period_calculation_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Start the timer. */
      (void) R_GPT_Start(&g_timer0_ctrl);
      /* Get the source clock frequency (in Hz). There are 3 ways to do this in FSP:
      * - Use the R_GPT_InfoGet function (it accounts for the divider).
      * - Calculate the current P0 clock frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK) and right shift
      * by timer_cfg_t::source_div.
      *
      * This example uses the 2nd option (R_FSP_SystemClockHzGet).
      */
      uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK) >> g_timer4_cfg.source_div;
      /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
      * desired period is larger than UINT32_MAX / pclkd_freq_hz. A cast to uint64_t is used to prevent this. */
      uint32_t period_counts =
      (uint32_t) (((uint64_t) pclkd_freq_hz * GPT_EXAMPLE_DESIRED_PERIOD_MSEC) / GPT_EXAMPLE_MSEC_PER_SEC);
      /* Set the calculated period. */
      err = R_GPT_PeriodSet(&g_timer0_ctrl, period_counts);
      handle_error(err);
      }

      GPT Duty Cycle Update Example

      +
      #define GPT_EXAMPLE_MSEC_PER_SEC (1000)
      #define GPT_EXAMPLE_DESIRED_PERIOD_MSEC (20)
      /* This example shows how to calculate a new period value at runtime. */
      void gpt_period_calculation_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Start the timer. */
      (void) R_GPT_Start(&g_timer0_ctrl);
      /* Get the source clock frequency (in Hz). There are 3 ways to do this in FSP:
      * - Use the R_GPT_InfoGet function (it accounts for the divider).
      * - Calculate the current PCLKD frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_GPTCLK) and right shift
      * by timer_cfg_t::source_div.
      *
      * This example uses the 2nd option (R_FSP_SystemClockHzGet).
      */
      uint32_t pclkd_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_GPTCLK) >> g_timer4_cfg.source_div;
      /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
      * desired period is larger than UINT32_MAX / pclkd_freq_hz. A cast to uint64_t is used to prevent this. */
      uint32_t period_counts =
      (uint32_t) (((uint64_t) pclkd_freq_hz * GPT_EXAMPLE_DESIRED_PERIOD_MSEC) / GPT_EXAMPLE_MSEC_PER_SEC);
      /* Set the calculated period. */
      err = R_GPT_PeriodSet(&g_timer0_ctrl, period_counts);
      handle_error(err);
      }

      GPT Duty Cycle Update Example

      This an example of updating the duty cycle.

      -
      #define GPT_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT (25)
      #define GPT_EXAMPLE_MAX_PERCENT (100)
      /* This example shows how to calculate a new duty cycle value at runtime. */
      void gpt_duty_cycle_calculation_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer4_ctrl, &g_timer4_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Start the timer. */
      (void) R_GPT_Start(&g_timer4_ctrl);
      /* Get the current period setting. */
      timer_info_t info;
      (void) R_GPT_InfoGet(&g_timer4_ctrl, &info);
      uint32_t current_period_counts = info.period_counts;
      /* Calculate the desired duty cycle based on the current period. Note that if the period could be larger than
      * UINT32_MAX / 100, this calculation could overflow. A cast to uint64_t is used to prevent this. */
      uint32_t duty_cycle_counts =
      (uint32_t) (((uint64_t) current_period_counts * GPT_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT) /
      GPT_EXAMPLE_MAX_PERCENT);
      /* Set the calculated duty cycle. */
      err = R_GPT_DutyCycleSet(&g_timer4_ctrl, duty_cycle_counts, GPT_IO_PIN_GTIOCB);
      handle_error(err);
      }
      +
      #define GPT_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT (25)
      #define GPT_EXAMPLE_MAX_PERCENT (100)
      /* This example shows how to calculate a new duty cycle value at runtime. */
      void gpt_duty_cycle_calculation_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* Initializes the module. */
      err = R_GPT_Open(&g_timer4_ctrl, &g_timer4_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Start the timer. */
      (void) R_GPT_Start(&g_timer4_ctrl);
      /* Get the current period setting. */
      timer_info_t info;
      (void) R_GPT_InfoGet(&g_timer4_ctrl, &info);
      uint32_t current_period_counts = info.period_counts;
      /* Calculate the desired duty cycle based on the current period. Note that if the period could be larger than
      * UINT32_MAX / 100, this calculation could overflow. A cast to uint64_t is used to prevent this. */
      uint32_t duty_cycle_counts =
      (uint32_t) (((uint64_t) current_period_counts * GPT_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT) /
      GPT_EXAMPLE_MAX_PERCENT);
      /* Set the calculated duty cycle. */
      err = R_GPT_DutyCycleSet(&g_timer4_ctrl, duty_cycle_counts, GPT_IO_PIN_GTIOCB);
      handle_error(err);
      }

      GPT A/D Converter Start Request Example

      +

      This is an example of using the GPT to start the ADC at a configurable A/D converter compare match value.

      +
      /* This example shows how to configure the GPT to generate an A/D start request at an A/D start request compare
      * match value. */
      void gpt_adc_start_request_example (void)
      {
      fsp_err_t err = FSP_SUCCESS;
      /* Initializes the module. */
      err = R_ADC_E_Open(&g_adc0_ctrl, &g_adc0_cfg);
      /* Handle any errors. This function should be defined by the user. */
      handle_error(err);
      /* Enable channels. */
      err = R_ADC_E_ScanCfg(&g_adc0_ctrl, &g_adc0_channel_cfg);
      assert(FSP_SUCCESS == err);
      (void) R_ADC_E_ScanStart(&g_adc0_ctrl);
      /* Initializes the GPT module. Configure gpt_extended_pwm_cfg_t::adc_trigger to set when the A/D start request
      * is generated. Set gpt_extended_pwm_cfg_t::adc_a_compare_match to set the desired compare match value. */
      err = R_GPT_Open(&g_timer3_ctrl, &g_timer3_cfg);
      /* Start the timer. A/D converter start request events are generated each time the counter is equal to the
      * A/D start request compare match value. */
      (void) R_GPT_Start(&g_timer3_ctrl);
      }
      + + @@ -560,6 +769,8 @@

      GPT Basic Example

      Enumerations + + @@ -584,6 +795,10 @@

      GPT Basic Example

      + + + +

      Data Structures

      struct  gpt_output_pin_t
       
      struct  gpt_gtior_setting_t
       
      struct  gpt_instance_ctrl_t
       
      struct  gpt_extended_pwm_cfg_t
      enum  gpt_io_pin_t
       
      enum  gpt_buffer_force_push
       
      enum  gpt_pin_level_t
       
      enum  gpt_source_t
       
      enum  gpt_buffer_mode_t
       
      enum  gpt_pwm_output_delay_setting_t
       
      enum  gpt_pwm_output_delay_edge_t
       

      Data Structure Documentation

      @@ -614,6 +829,21 @@

      gpt_pin_level_t.

    +
    +
    + +

    ◆ gpt_gtior_setting_t

    + +
    +
    + + + + +
    struct gpt_gtior_setting_t
    +
    +

    Custom GTIOR settings used for configuring GTIOCxA and GTIOCxB pins.

    +
    @@ -760,12 +990,6 @@

    Configuration for GPT I/O pin B. -gpt_shortest_level_t - -shortest_pwm_signal - - - gpt_source_t start_source @@ -834,6 +1058,12 @@

    Capture B interrupt priority. +uint8_t + +dead_time_ipl + +Dead time error interrupt priority. + IRQn_Type capture_a_irq @@ -846,11 +1076,23 @@

    Capture B interrupt. +IRQn_Type + +dead_time_irq + +Dead time error interrupt. + gpt_extended_pwm_cfg_t const * p_pwm_cfg Advanced PWM features, optional. + +gpt_gtior_setting_t + +gtior_setting + +Custom GTIOR settings used for configuring GTIOCxA and GTIOCxB pins.

    @@ -875,6 +1117,33 @@

    GPT_IO_PIN_GTIOCA_AND_GTIOCB 

    GTIOCA and GTIOCB.

    +GPT_IO_PIN_TROUGH 

    Used in R_GPT_DutyCycleSet when Triangle-wave PWM Mode 3 is selected.

    + +GPT_IO_PIN_CREST 

    Used in R_GPT_DutyCycleSet when Triangle-wave PWM Mode 3 is selected.

    + +GPT_IO_PIN_ONE_SHOT_LEADING_EDGE 

    Used in R_GPT_DutyCycleSet to set GTCCRC and GTCCRE registers when One-Shot Pulse mode is selected.

    + +GPT_IO_PIN_ONE_SHOT_TRAILING_EDGE 

    Used in R_GPT_DutyCycleSet to set GTCCRD and GTCCRF registers when One-Shot Pulse mode is selected.

    + + + +

    +

    + +

    ◆ gpt_buffer_force_push

    + +
    +
    + + + + +
    enum gpt_buffer_force_push
    +
    +

    Forced buffer push operation used in One-Sot Pulse mode with R_GPT_DutyCycleSet().

    + +
    Enumerator
    GPT_BUFFER_FORCE_PUSH 

    Used in R_GPT_DutyCycleSet to force push the data from GTCCRn registers to temporary buffer A or B when One-Shot Pulse mode is selected.

    +
    @@ -913,39 +1182,121 @@

    Sources can be used to start the timer, stop the timer, count up, or count down. These enumerations represent a bitmask. Multiple sources can be ORed together.

    - + + + + + + + + + + + + + + - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    GPT_SOURCE_NONE 

    No active event sources.

    +
    Enumerator
    GPT_SOURCE_NONE 

    No active event sources.

    +
    GPT_SOURCE_GTETRGA_RISING 

    Action performed on GTETRGA rising edge.

    +
    GPT_SOURCE_GTETRGA_FALLING 

    Action performed on GTETRGA falling edge.

    +
    GPT_SOURCE_GTETRGB_RISING 

    Action performed on GTETRGB rising edge.

    +
    GPT_SOURCE_GTETRGB_FALLING 

    Action performed on GTETRGB falling edge.

    +
    GPT_SOURCE_GTETRGC_RISING 

    Action performed on GTETRGC rising edge.

    +
    GPT_SOURCE_GTETRGC_FALLING 

    Action performed on GTETRGC falling edge.

    +
    GPT_SOURCE_GTETRGD_RISING 

    Action performed on GTETRGB rising edge.

    +
    GPT_SOURCE_GTETRGD_FALLING 

    Action performed on GTETRGB falling edge.

    +
    GPT_SOURCE_GTIOCA_RISING_WHILE_GTIOCB_LOW 

    Action performed when GTIOCA input rises while GTIOCB is low.

    +
    GPT_SOURCE_GTIOCA_RISING_WHILE_GTIOCB_HIGH 

    Action performed when GTIOCA input rises while GTIOCB is high.

    +
    GPT_SOURCE_GTIOCA_FALLING_WHILE_GTIOCB_LOW 

    Action performed when GTIOCA input falls while GTIOCB is low.

    +
    GPT_SOURCE_GTIOCA_FALLING_WHILE_GTIOCB_HIGH 

    Action performed when GTIOCA input falls while GTIOCB is high.

    +
    GPT_SOURCE_GTIOCB_RISING_WHILE_GTIOCA_LOW 

    Action performed when GTIOCB input rises while GTIOCA is low.

    +
    GPT_SOURCE_GTIOCB_RISING_WHILE_GTIOCA_HIGH 

    Action performed when GTIOCB input rises while GTIOCA is high.

    GPT_SOURCE_GTETRGA_RISING 

    Action performed on GTETRGA rising edge.

    +
    GPT_SOURCE_GTIOCB_FALLING_WHILE_GTIOCA_LOW 

    Action performed when GTIOCB input falls while GTIOCA is low.

    GPT_SOURCE_GTETRGA_FALLING 

    Action performed on GTETRGA falling edge.

    +
    GPT_SOURCE_GTIOCB_FALLING_WHILE_GTIOCA_HIGH 

    Action performed when GTIOCB input falls while GTIOCA is high.

    GPT_SOURCE_GTETRGB_RISING 

    Action performed on GTETRGB rising edge.

    +
    GPT_SOURCE_GPT_A 

    Action performed on ELC GPTA event.

    GPT_SOURCE_GTETRGB_FALLING 

    Action performed on GTETRGB falling edge.

    +
    GPT_SOURCE_GPT_B 

    Action performed on ELC GPTB event.

    GPT_SOURCE_GTETRGC_RISING 

    Action performed on GTETRGC rising edge.

    +
    GPT_SOURCE_GPT_C 

    Action performed on ELC GPTC event.

    GPT_SOURCE_GTETRGC_FALLING 

    Action performed on GTETRGC falling edge.

    +
    GPT_SOURCE_GPT_D 

    Action performed on ELC GPTD event.

    GPT_SOURCE_GTETRGD_RISING 

    Action performed on GTETRGB rising edge.

    +
    GPT_SOURCE_GPT_E 

    Action performed on ELC GPTE event.

    GPT_SOURCE_GTETRGD_FALLING 

    Action performed on GTETRGB falling edge.

    +
    GPT_SOURCE_GPT_F 

    Action performed on ELC GPTF event.

    GPT_SOURCE_GTIOCA_RISING_WHILE_GTIOCB_LOW 

    Action performed when GTIOCA input rises while GTIOCB is low.

    +
    GPT_SOURCE_GPT_G 

    Action performed on ELC GPTG event.

    GPT_SOURCE_GTIOCA_RISING_WHILE_GTIOCB_HIGH 

    Action performed when GTIOCA input rises while GTIOCB is high.

    +
    GPT_SOURCE_GPT_H 

    Action performed on ELC GPTH event.

    GPT_SOURCE_GTIOCA_FALLING_WHILE_GTIOCB_LOW 

    Action performed when GTIOCA input falls while GTIOCB is low.

    +
    GPT_SOURCE_NONE 

    No active event sources.

    GPT_SOURCE_GTIOCA_FALLING_WHILE_GTIOCB_HIGH 

    Action performed when GTIOCA input falls while GTIOCB is high.

    +
    GPT_SOURCE_GTETRGA_RISING 

    Action performed on GTETRGA rising edge.

    GPT_SOURCE_GTIOCB_RISING_WHILE_GTIOCA_LOW 

    Action performed when GTIOCB input rises while GTIOCA is low.

    +
    GPT_SOURCE_GTETRGA_FALLING 

    Action performed on GTETRGA falling edge.

    GPT_SOURCE_GTIOCB_RISING_WHILE_GTIOCA_HIGH 

    Action performed when GTIOCB input rises while GTIOCA is high.

    +
    GPT_SOURCE_GTETRGB_RISING 

    Action performed on GTETRGB rising edge.

    GPT_SOURCE_GTIOCB_FALLING_WHILE_GTIOCA_LOW 

    Action performed when GTIOCB input falls while GTIOCA is low.

    +
    GPT_SOURCE_GTETRGB_FALLING 

    Action performed on GTETRGB falling edge.

    GPT_SOURCE_GTIOCB_FALLING_WHILE_GTIOCA_HIGH 

    Action performed when GTIOCB input falls while GTIOCA is high.

    +
    GPT_SOURCE_GTETRGC_RISING 

    Action performed on GTETRGC rising edge.

    +
    GPT_SOURCE_GTETRGC_FALLING 

    Action performed on GTETRGC falling edge.

    +
    GPT_SOURCE_GTETRGD_RISING 

    Action performed on GTETRGB rising edge.

    +
    GPT_SOURCE_GTETRGD_FALLING 

    Action performed on GTETRGB falling edge.

    +
    GPT_SOURCE_GTIOCA_RISING_WHILE_GTIOCB_LOW 

    Action performed when GTIOCA input rises while GTIOCB is low.

    +
    GPT_SOURCE_GTIOCA_RISING_WHILE_GTIOCB_HIGH 

    Action performed when GTIOCA input rises while GTIOCB is high.

    +
    GPT_SOURCE_GTIOCA_FALLING_WHILE_GTIOCB_LOW 

    Action performed when GTIOCA input falls while GTIOCB is low.

    +
    GPT_SOURCE_GTIOCA_FALLING_WHILE_GTIOCB_HIGH 

    Action performed when GTIOCA input falls while GTIOCB is high.

    +
    GPT_SOURCE_GTIOCB_RISING_WHILE_GTIOCA_LOW 

    Action performed when GTIOCB input rises while GTIOCA is low.

    +
    GPT_SOURCE_GTIOCB_RISING_WHILE_GTIOCA_HIGH 

    Action performed when GTIOCB input rises while GTIOCA is high.

    +
    GPT_SOURCE_GTIOCB_FALLING_WHILE_GTIOCA_LOW 

    Action performed when GTIOCB input falls while GTIOCA is low.

    +
    GPT_SOURCE_GTIOCB_FALLING_WHILE_GTIOCA_HIGH 

    Action performed when GTIOCB input falls while GTIOCA is high.

    +
    GPT_SOURCE_GPT0_ACT0 

    Action performed on ELC GPT0 (A) event.

    +
    GPT_SOURCE_GPT0_ACT1 

    Action performed on ELC GPT0 (B) event.

    +
    GPT_SOURCE_GPT0_ACT2 

    Action performed on ELC GPT0 (C) event.

    +
    GPT_SOURCE_GPT0_ACT3 

    Action performed on ELC GPT0 (D) event.

    +
    GPT_SOURCE_GPT0_ACT4 

    Action performed on ELC GPT0 (E) event.

    +
    GPT_SOURCE_GPT0_ACT5 

    Action performed on ELC GPT0 (F) event.

    +
    GPT_SOURCE_GPT0_ACT6 

    Action performed on ELC GPT0 (G) event.

    +
    GPT_SOURCE_GPT0_ACT7 

    Action performed on ELC GPT0 (H) event.

    +
    GPT_SOURCE_GPT1_ACT0 

    Action performed on ELC GPT1 (A) event.

    +
    GPT_SOURCE_GPT1_ACT1 

    Action performed on ELC GPT1 (B) event.

    +
    GPT_SOURCE_GPT1_ACT2 

    Action performed on ELC GPT1 (C) event.

    +
    GPT_SOURCE_GPT1_ACT3 

    Action performed on ELC GPT1 (D) event.

    +
    GPT_SOURCE_GPT1_ACT4 

    Action performed on ELC GPT1 (E) event.

    +
    GPT_SOURCE_GPT1_ACT5 

    Action performed on ELC GPT1 (F) event.

    +
    GPT_SOURCE_GPT1_ACT6 

    Action performed on ELC GPT1 (G) event.

    +
    GPT_SOURCE_GPT1_ACT7 

    Action performed on ELC GPT1 (H) event.

    @@ -966,13 +1317,13 @@

    EnumeratorGPT_CAPTURE_FILTER_NONE 

    None - no filtering.

    -GPT_CAPTURE_FILTER_P0CLK_DIV_1 

    P0CLK/1 - fast sampling.

    +GPT_CAPTURE_FILTER_CLOCK_SOURCE_DIV_1 

    CLK/1 - fast sampling.

    -GPT_CAPTURE_FILTER_P0CLK_DIV_4 

    P0CLK/4.

    +GPT_CAPTURE_FILTER_CLOCK_SOURCE_DIV_4 

    CLK/4.

    -GPT_CAPTURE_FILTER_P0CLK_DIV_16 

    P0CLK/16.

    +GPT_CAPTURE_FILTER_CLOCK_SOURCE_DIV_16 

    CLK/16.

    -GPT_CAPTURE_FILTER_P0CLK_DIV_64 

    P0CLK/64 - slow sampling.

    +GPT_CAPTURE_FILTER_CLOCK_SOURCE_DIV_64 

    CLK/64 - slow sampling.

    @@ -1203,6 +1554,110 @@

    +

    ◆ gpt_pwm_output_delay_setting_t

    + +
    +
    + + + + +
    enum gpt_pwm_output_delay_setting_t
    +
    +

    Delay setting for the PWM Delay Generation Circuit (PDG).

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    GPT_PWM_OUTPUT_DELAY_SETTING_0_32 

    Delay is not applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_1_32 

    Delay of 1 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_2_32 

    Delay of 2 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_3_32 

    Delay of 3 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_4_32 

    Delay of 4 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_5_32 

    Delay of 5 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_6_32 

    Delay of 6 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_7_32 

    Delay of 7 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_8_32 

    Delay of 8 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_9_32 

    Delay of 9 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_10_32 

    Delay of 10 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_11_32 

    Delay of 11 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_12_32 

    Delay of 12 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_13_32 

    Delay of 13 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_14_32 

    Delay of 14 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_15_32 

    Delay of 15 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_16_32 

    Delay of 16 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_17_32 

    Delay of 17 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_18_32 

    Delay of 18 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_19_32 

    Delay of 19 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_20_32 

    Delay of 20 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_21_32 

    Delay of 21 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_22_32 

    Delay of 22 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_23_32 

    Delay of 23 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_24_32 

    Delay of 24 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_25_32 

    Delay of 25 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_26_32 

    Delay of 26 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_27_32 

    Delay of 27 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_28_32 

    Delay of 28 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_29_32 

    Delay of 29 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_30_32 

    Delay of 30 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_31_32 

    Delay of 31 / 32 GTCLK period applied.

    +
    GPT_PWM_OUTPUT_DELAY_SETTING_BYPASS 

    Bypass the PWM Output Delay Circuit.

    +
    + +
    +
    + +

    ◆ gpt_pwm_output_delay_edge_t

    + +
    +
    + + + + +
    enum gpt_pwm_output_delay_edge_t
    +
    +

    Select which PWM Output Delay setting to apply.

    + + + +
    Enumerator
    GPT_PWM_OUTPUT_DELAY_EDGE_RISING 

    Configure the PWM Output Delay setting for rising edge.

    +
    GPT_PWM_OUTPUT_DELAY_EDGE_FALLING 

    Configure the PWM Output Delay setting for falling edge.

    +
    +

    Function Documentation

    @@ -1240,7 +1695,7 @@

    FSP_ERR_ASSERTIONA required input pointer is NULL or the source divider is invalid. FSP_ERR_ALREADY_OPENModule is already open. FSP_ERR_IRQ_BSP_DISABLEDtimer_cfg_t::mode is TIMER_MODE_ONE_SHOT or timer_cfg_t::p_callback is not NULL, but ISR is not enabled. ISR must be enabled to use one-shot mode or callback. - FSP_ERR_INVALID_MODETriangle wave PWM is only supported if GPT_CFG_OUTPUT_SUPPORT_ENABLE is 2. + FSP_ERR_INVALID_MODETriangle wave PWM is only supported if GPT_CFG_OUTPUT_SUPPORT_ENABLE is 2. Selected channel does not support external count sources. External and event count sources not are available in this mode. FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel requested in the p_cfg parameter is not available on this device. @@ -1470,6 +1925,7 @@

    FSP_ERR_ASSERTIONp_ctrl was NULL or the pin is not one of gpt_io_pin_t FSP_ERR_NOT_OPENThe instance is not opened. FSP_ERR_INVALID_ARGUMENTDuty cycle is larger than period. + FSP_ERR_INVALID_MODEGPT_IO_PIN_TROUGH, and GPT_IO_PIN_CREST settings are invalid in the this mode. FSP_ERR_UNSUPPORTEDGPT_CFG_OUTPUT_SUPPORT_ENABLE is 0. @@ -1705,6 +2161,59 @@

    +

    ◆ R_GPT_PwmOutputDelaySet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_GPT_PwmOutputDelaySet (timer_ctrl_t *const p_ctrl,
    gpt_pwm_output_delay_edge_t edge,
    gpt_pwm_output_delay_setting_t delay_setting,
    uint32_t const pin 
    )
    +
    +

    Set the Output Delay setting for the PWM output pin.

    +
    Return values
    + + + + + + + + +
    FSP_SUCCESSThe output delay was set.
    FSP_ERR_ASSERTIONAn input parameter was invalid.
    FSP_ERR_NOT_OPENThe instance is not opened.
    FSP_ERR_INVALID_CHANNELThe channel does not support this feature.
    FSP_ERR_NOT_INITIALIZEDThe PWM Output Delay Circuit has not been initialized.
    FSP_ERR_INVALID_STATEThe PWM Output Delay setting cannot be updated in the current state.
    FSP_ERR_UNSUPPORTEDThis feature is not supported on this MCU.
    +
    +
    +
    @@ -1782,6 +2291,33 @@

    +

    ◆ R_GPT_PwmOutputDelayInitialize()

    + +
    +
    + + + + + + + +
    fsp_err_t R_GPT_PwmOutputDelayInitialize ()
    +
    +

    Initialize the PWM Delay Generation Circuit (PDG). This function must be called before calling R_GPT_PwmOutputDelaySet.

    +
    Note
    This function will delay for 20 microseconds.
    +
    Return values
    + + + + +
    FSP_SUCCESSInitialization sequence completed successfully.
    FSP_ERR_INVALID_STATEThe source clock frequnecy is out of the required range for the PDG.
    FSP_ERR_UNSUPPORTEDThis feature is not supported.
    +
    +
    +

    @@ -1790,7 +2326,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

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"R_GPT_Stop", "group___g_p_t.html#ga1e6af74d7faaf735f5847a34121eff71", null ], [ "R_GPT_Start", "group___g_p_t.html#ga2769f9fda49613246bc84dba41aa4863", null ], @@ -141,6 +232,8 @@ var group___g_p_t = [ "R_GPT_OutputEnable", "group___g_p_t.html#ga0e6638508ec1d5441713195c877bb7a7", null ], [ "R_GPT_OutputDisable", "group___g_p_t.html#gae204e5d6c9305923e98724005dcdf03d", null ], [ "R_GPT_AdcTriggerSet", "group___g_p_t.html#ga311c91c55f20338f7082fa4369e7c80f", null ], + [ "R_GPT_PwmOutputDelaySet", "group___g_p_t.html#gaff2d30ece9bd30b5a9cc2117623834c6", null ], [ "R_GPT_CallbackSet", "group___g_p_t.html#ga2a09de185d3b7f1c301b33330931bac4", null ], - [ "R_GPT_Close", "group___g_p_t.html#ga2fc5d6a737a00948802e2bb77fbe8d8c", null ] + [ "R_GPT_Close", "group___g_p_t.html#ga2fc5d6a737a00948802e2bb77fbe8d8c", null ], + [ "R_GPT_PwmOutputDelayInitialize", "group___g_p_t.html#gada982ef1873ca00147f9692b42aba8f0", null ] ]; \ No newline at end of file diff --git a/group___g_t_m.html b/group___g_t_m.html index 9f1b4be..4cecb7a 100644 --- a/group___g_t_m.html +++ b/group___g_t_m.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: General Timer (r_gtm) +RZV Flexible Software Package Documentation: General Timer (r_gtm) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    General Timer (r_gtm)
    Modules
    +
    General Timer (r_gtm)
    Modules » Timers
    @@ -178,15 +246,15 @@

    Default (BSP) If selected code for parameter checking is included in the build.
    -

    Configurations for Driver > Timers > Timer Driver on r_gtm

    -This module can be added to the Stacks tab via New Stack > Driver > Timers > Timer Driver on r_gtm.
    +

    Configurations for Timers > Timer (r_gtm)

    +This module can be added to the Stacks tab via New Stack > Timers > Timer (r_gtm).

    - + +Valid input value range:
    +- When 'Raw Counts' is selected in 'Period Unit', set the value to 0x00000001~0x100000000
    +- When other item is selected in 'Period Unit', set the value to (1 / count clock) ~ (0x100000000 / count clock)
    +
    +If the input value is exceeded valid range, the ERROR will be shown in hal_data.c. - + @@ -273,7 +345,7 @@

    GTM Basic Example

    To use the GTM as a free running counter, select Free-Running Comparison Mode.

    void gtm_counter_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_GTM_Open(&g_timer_ctrl, &g_timer_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start the timer. */
    (void) R_GTM_Start(&g_timer_ctrl);
    /* (Optional) Stop the timer. */
    (void) R_GTM_Stop(&g_timer_ctrl);
    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_GTM_StatusGet(&g_timer_ctrl, &status);
    }

    GTM Period Update Example

    This is an example of updating the period.

    -
    #define GTM_EXAMPLE_MSEC_PER_SEC (1000)
    #define GTM_EXAMPLE_DESIRED_PERIOD_MSEC (20)
    /* This example shows how to calculate a new period value at runtime. */
    void gtm_period_calculation_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_GTM_Open(&g_timer_ctrl, &g_timer_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start the timer. */
    (void) R_GTM_Start(&g_timer_ctrl);
    /* Get the source clock frequency (in Hz). There are several ways to do this in FSP:
    * - Use the R_GTM_InfoGet function (it accounts for the clock source and divider).
    * - Calculate the current P0 clock frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK).
    *
    * This example uses the last option (R_FSP_SystemClockHzGet).
    */
    uint32_t timer_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK);
    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT32_MAX / pclkb_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
    (uint32_t) (((uint64_t) timer_freq_hz * gtm_EXAMPLE_DESIRED_PERIOD_MSEC) / gtm_EXAMPLE_MSEC_PER_SEC);
    /* Set the calculated period. */
    err = R_GTM_PeriodSet(&g_timer_ctrl, period_counts);
    assert(FSP_SUCCESS == err);
    }
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_timer0 Module name.
    General > ChannelChannel number does not exist0 Physical hardware channel.
    General > ChannelMCU Specific OptionsPhysical hardware channel.
    General > Mode
    • @@ -198,7 +266,11 @@

      Configurations for Driver > Timers > Timer Driver on r_gtm

    General > PeriodValue must be non-negative1 Specify the timer period based on the selected unit.

    -When the unit is set to 'Raw Counts', setting the period to 0x10000 results in the maximum period at the lowest divisor (fastest timer tick). Set the period to 0x10000 for a free running timer, pulse width measurement or pulse period measurement. Setting the period higher will automatically select a higher divider; the period can be set up to 0x80000 when counting from PCLKB or 0x800000 when counting from LOCO/subclock, which will use a divider of 8 or 128 respectively with the maximum period.
    General > Period Unit
    • @@ -218,7 +290,7 @@

      Configurations for Driver > Timers > Timer Driver on r_gtm

    		Milliseconds Unit of the period specified above
    General > Count SourceP0CLKP0CLK GTM counter clock source. NOTE: The divisor is calculated automatically based on the selected period. See agt_count_source_t documentation for details.
    General > Count SourceMCU Specific OptionsGTM counter clock source. NOTE: The divisor is calculated automatically based on the selected period. See agt_count_source_t documentation for details.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the timer period elapses.
    +
    #define GTM_EXAMPLE_MSEC_PER_SEC (1000)
    #define GTM_EXAMPLE_DESIRED_PERIOD_MSEC (20)
    /* This example shows how to calculate a new period value at runtime. */
    void gtm_period_calculation_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_GTM_Open(&g_timer_ctrl, &g_timer_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start the timer. */
    (void) R_GTM_Start(&g_timer_ctrl);
    /* Get the source clock frequency (in Hz). There are several ways to do this in FSP:
    * - Use the R_GTM_InfoGet function (it accounts for the clock source and divider).
    * - Calculate the current count clock frequency using R_FSP_SystemClockHzGet(BSP_FEATURE_GTM_SOURCE_CLOCK).
    *
    * This example uses the last option (R_FSP_SystemClockHzGet).
    */
    uint32_t timer_freq_hz = R_FSP_SystemClockHzGet(BSP_FEATURE_GTM_SOURCE_CLOCK);
    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT32_MAX / pclkb_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
    (uint32_t) (((uint64_t) timer_freq_hz * gtm_EXAMPLE_DESIRED_PERIOD_MSEC) / gtm_EXAMPLE_MSEC_PER_SEC);
    /* Set the calculated period. */
    err = R_GTM_PeriodSet(&g_timer_ctrl, period_counts);
    assert(FSP_SUCCESS == err);
    }
    @@ -771,7 +843,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___i2_c___m_a_s_t_e_r___a_p_i.html b/group___i2_c___m_a_s_t_e_r___a_p_i.html index 8a3837f..0cfabc3 100644 --- a/group___i2_c___m_a_s_t_e_r___a_p_i.html +++ b/group___i2_c___m_a_s_t_e_r___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: I2C Master Interface +RZV Flexible Software Package Documentation: I2C Master Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -107,7 +175,8 @@

  • Callback function support which can return an event code

    • Implemented by:

    Data Structures

    struct  gtm_instance_ctrl_t
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    External IRQ (r_intc_irq)
    Modules
    +
    External IRQ (r_intc_irq)
    Modules » Input

    @@ -376,6 +445,7 @@

    Opens the I2C Master driver and initializes the hardware.

    Implemented as
    Parameters
    @@ -401,6 +471,7 @@

    Performs a read operation on an I2C Master device.

    Implemented as
    Parameters
    @@ -428,6 +499,7 @@

    Performs a write operation on an I2C Master device.

    Implemented as
    Parameters
    @@ -455,6 +527,7 @@

    Performs a reset of the peripheral.

    Implemented as
    Parameters
    @@ -479,6 +552,7 @@

    Sets address of the slave device without reconfiguring the bus.

    Implemented as
    Parameters
    @@ -505,11 +579,12 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    Parameters
    - + @@ -532,11 +607,12 @@

    Gets the status of the configured I2C device.

    Implemented as
    Parameters

    [in]p_ctrlPointer to the RIIC Master control block.
    [in]p_api_ctrlPointer to the IIC Master control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_working_memoryPointer to volatile memory where callback structure can be allocated. Callback arguments allocated here are only valid during the callback.
    - +
    [in]p_ctrlPointer to the RIIC Master control block.
    [in]p_ctrlPointer to the IIC Master control block.
    [out]p_statusPointer to store current status.
    @@ -557,6 +633,7 @@

    Closes the driver and releases the I2C Master device.

    Implemented as
    Parameters
    @@ -700,7 +777,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___i2_c___s_l_a_v_e___a_p_i.html b/group___i2_c___s_l_a_v_e___a_p_i.html new file mode 100644 index 0000000..a6016b1 --- /dev/null +++ b/group___i2_c___s_l_a_v_e___a_p_i.html @@ -0,0 +1,670 @@ + + + + + + + +RZV Flexible Software Package Documentation: I2C Slave Interface + + + + + + + + + + + + + + + + + + + +
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    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
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    +Data Structures | +Typedefs | +Enumerations
    +
    +
    I2C Slave Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for I2C slave communication.

    +

    +Summary

    +

    The I2C slave interface provides a common API for I2C HAL drivers. The I2C slave interface supports:

      +
    • Interrupt driven transmit/receive processing
      • +
    • Callback function support which returns a event codes
      • +
    +

    Implemented by:

    + + + + + + + + + + +

    +Data Structures

    struct  i2c_slave_callback_args_t
     
    struct  i2c_slave_cfg_t
     
    struct  i2c_slave_api_t
     
    struct  i2c_slave_instance_t
     
    + + + +

    +Typedefs

    typedef void i2c_slave_ctrl_t
     
    + + + + + + + +

    +Enumerations

    enum  i2c_slave_rate_t
     
    enum  i2c_slave_addr_mode_t
     
    enum  i2c_slave_event_t
     
    +

    Data Structure Documentation

    + +

    ◆ i2c_slave_callback_args_t

    + +
    +
    + + + + +
    struct i2c_slave_callback_args_t
    +
    +

    I2C callback parameter definition

    +
    + + + + + + + + + + +
    Data Fields
    +void const * +p_context +Pointer to user-provided context.
    +uint32_t +bytes +Number of received/transmitted bytes in buffer.
    +i2c_slave_event_t +event +Event code.
    + +
    +
    + +

    ◆ i2c_slave_cfg_t

    + +
    +
    + + + + +
    struct i2c_slave_cfg_t
    +
    +

    I2C configuration block

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    uint8_t channel
     Identifier recognizable by implementation. More...
     
    +i2c_slave_rate_t rate
     Device's maximum clock rate from enum i2c_rate_t.
     
    +uint16_t slave
     The address of the slave device.
     
    +i2c_slave_addr_mode_t addr_mode
     Indicates how slave fields should be interpreted.
     
    +bool general_call_enable
     Allow a General call from master.
     
    +IRQn_Type rxi_irq
     Receive IRQ number.
     
    +IRQn_Type txi_irq
     Transmit IRQ number.
     
    +IRQn_Type tei_irq
     Transmit end IRQ number.
     
    +IRQn_Type eri_irq
     Error IRQ number.
     
    +uint8_t ipl
     Interrupt priority level for RXI, TXI and TER interrupts.
     
    +uint8_t eri_ipl
     Interrupt priority level for ERI interrupt.
     
    +bool clock_stretching_enable
     Low Hold SCL during reception for the period between the 9th and the 1st clock cycle.
     
    void(* p_callback )(i2c_slave_callback_args_t *p_args)
     Pointer to callback function. More...
     
    +void const * p_context
     Pointer to the user-provided context.
     
    void const * p_extend
     Any configuration data needed by the hardware. More...
     
    +

    Field Documentation

    + +

    ◆ channel

    + +
    +
    + + + + +
    uint8_t i2c_slave_cfg_t::channel
    +
    + +

    Identifier recognizable by implementation.

    +

    Generic configuration

    + +
    +
    + +

    ◆ p_callback

    + +
    +
    + + + + +
    void(* i2c_slave_cfg_t::p_callback) (i2c_slave_callback_args_t *p_args)
    +
    + +

    Pointer to callback function.

    +

    Parameters to control software behavior

    + +
    +
    + +

    ◆ p_extend

    + +
    +
    + + + + +
    void const* i2c_slave_cfg_t::p_extend
    +
    + +

    Any configuration data needed by the hardware.

    +

    Implementation-specific configuration

    + +
    +
    + +
    +
    + +

    ◆ i2c_slave_api_t

    + +
    +
    + + + + +
    struct i2c_slave_api_t
    +
    +

    Interface definition for I2C access as slave

    +
    + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(i2c_slave_ctrl_t *const p_ctrl, i2c_slave_cfg_t const *const p_cfg)
     
    fsp_err_t(* read )(i2c_slave_ctrl_t *const p_ctrl, uint8_t *const p_dest, uint32_t const bytes)
     
    fsp_err_t(* write )(i2c_slave_ctrl_t *const p_ctrl, uint8_t *const p_src, uint32_t const bytes)
     
    fsp_err_t(* callbackSet )(i2c_slave_ctrl_t *const p_api_ctrl, void(*p_callback)(i2c_slave_callback_args_t *), void const *const p_context, i2c_slave_callback_args_t *const p_callback_memory)
     
    fsp_err_t(* close )(i2c_slave_ctrl_t *const p_ctrl)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* i2c_slave_api_t::open) (i2c_slave_ctrl_t *const p_ctrl, i2c_slave_cfg_t const *const p_cfg)
    +
    +

    Opens the I2C Slave driver and initializes the hardware.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control block. Must be declared by user. Elements are set here.
    [in]p_cfgPointer to configuration structure.
    +
    +
    + +
    +
    + +

    ◆ read

    + +
    +
    + + + + +
    fsp_err_t(* i2c_slave_api_t::read) (i2c_slave_ctrl_t *const p_ctrl, uint8_t *const p_dest, uint32_t const bytes)
    +
    +

    Performs a read operation on an I2C Slave device.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to control block set in i2c_slave_api_t::open call.
    [in]p_destPointer to the location to store read data.
    [in]bytesNumber of bytes to read.
    +
    +
    + +
    +
    + +

    ◆ write

    + +
    +
    + + + + +
    fsp_err_t(* i2c_slave_api_t::write) (i2c_slave_ctrl_t *const p_ctrl, uint8_t *const p_src, uint32_t const bytes)
    +
    +

    Performs a write operation on an I2C Slave device.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to control block set in i2c_slave_api_t::open call.
    [in]p_srcPointer to the location to get write data from.
    [in]bytesNumber of bytes to write.
    +
    +
    + +
    +
    + +

    ◆ callbackSet

    + +
    +
    + + + + +
    fsp_err_t(* i2c_slave_api_t::callbackSet) (i2c_slave_ctrl_t *const p_api_ctrl, void(*p_callback)(i2c_slave_callback_args_t *), void const *const p_context, i2c_slave_callback_args_t *const p_callback_memory)
    +
    +

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to the IIC Slave control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_working_memoryPointer to volatile memory where callback structure can be allocated. Callback arguments allocated here are only valid during the callback.
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* i2c_slave_api_t::close) (i2c_slave_ctrl_t *const p_ctrl)
    +
    +

    Closes the driver and releases the I2C Slave device.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control block set in i2c_slave_api_t::open call.
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ i2c_slave_instance_t

    + +
    +
    + + + + +
    struct i2c_slave_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +i2c_slave_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +i2c_slave_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +i2c_slave_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ i2c_slave_ctrl_t

    + +
    +
    + + + + +
    typedef void i2c_slave_ctrl_t
    +
    +

    I2C control block. Allocate an instance specific control block to pass into the I2C API calls.

    Implemented as
      +
    • iic_slave_instance_ctrl_t
      • +
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ i2c_slave_rate_t

    + +
    +
    + + + + +
    enum i2c_slave_rate_t
    +
    +

    Communication speed options

    + + + + +
    Enumerator
    I2C_SLAVE_RATE_STANDARD 

    100 kHz

    +
    I2C_SLAVE_RATE_FAST 

    400 kHz

    +
    I2C_SLAVE_RATE_FASTPLUS 

    1 MHz

    +
    + +
    +
    + +

    ◆ i2c_slave_addr_mode_t

    + +
    +
    + + + + +
    enum i2c_slave_addr_mode_t
    +
    +

    Addressing mode options

    + + + +
    Enumerator
    I2C_SLAVE_ADDR_MODE_7BIT 

    Use 7-bit addressing mode.

    +
    I2C_SLAVE_ADDR_MODE_10BIT 

    Use 10-bit addressing mode.

    +
    + +
    +
    + +

    ◆ i2c_slave_event_t

    + +
    +
    + + + + +
    enum i2c_slave_event_t
    +
    +

    Callback events

    + + + + + + + + + +
    Enumerator
    I2C_SLAVE_EVENT_ABORTED 

    A transfer was aborted.

    +
    I2C_SLAVE_EVENT_RX_COMPLETE 

    A receive operation was completed successfully.

    +
    I2C_SLAVE_EVENT_TX_COMPLETE 

    A transmit operation was completed successfully.

    +
    I2C_SLAVE_EVENT_RX_REQUEST 

    A read operation expected from slave. Detected a write from master.

    +
    I2C_SLAVE_EVENT_TX_REQUEST 

    A write operation expected from slave. Detected a read from master.

    +
    I2C_SLAVE_EVENT_RX_MORE_REQUEST 

    A read operation expected from slave. Master sends out more data than configured to be read in slave.

    +
    I2C_SLAVE_EVENT_TX_MORE_REQUEST 

    A write operation expected from slave. Master requests more data than configured to be written by slave.

    +
    I2C_SLAVE_EVENT_GENERAL_CALL 

    General Call address received from Master. Detected a write from master.

    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___i2_c___s_l_a_v_e___a_p_i.js b/group___i2_c___s_l_a_v_e___a_p_i.js new file mode 100644 index 0000000..2e74a7b --- /dev/null +++ b/group___i2_c___s_l_a_v_e___a_p_i.js @@ -0,0 +1,57 @@ +var group___i2_c___s_l_a_v_e___a_p_i = +[ + [ "i2c_slave_callback_args_t", "group___i2_c___s_l_a_v_e___a_p_i.html#structi2c__slave__callback__args__t", [ + [ "p_context", "group___i2_c___s_l_a_v_e___a_p_i.html#a8480d2ef5f292fa836adfbaef1a0689c", null ], + [ "bytes", "group___i2_c___s_l_a_v_e___a_p_i.html#a43903d76b59b527cef993d5cdbe9a2b9", null ], + [ "event", "group___i2_c___s_l_a_v_e___a_p_i.html#ab8f7ff67f811463a59921e4fbe11898e", null ] + ] ], + [ "i2c_slave_cfg_t", "group___i2_c___s_l_a_v_e___a_p_i.html#structi2c__slave__cfg__t", [ + [ "channel", "group___i2_c___s_l_a_v_e___a_p_i.html#a2708ed5dc2491d0551dd4a8688d919cb", null ], + [ "rate", "group___i2_c___s_l_a_v_e___a_p_i.html#a2abbee554bf1c554d96c8863eb3db77a", null ], + [ "slave", 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Documentation: I3C Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    I3C Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for I3C.

    +

    +Summary

    +

    The I3C interface provides APIs and definitions for I3C communication.

    +

    +Known Implementations

    +

    I3C (r_i3c_b)

    + + + + + + + + + + + + + + + + + + + + +

    +Data Structures

    struct  i3c_device_status_t
     
    struct  i3c_slave_info_t
     
    struct  i3c_device_table_cfg_t
     
    struct  i3c_device_cfg_t
     
    struct  i3c_command_descriptor_t
     
    struct  i3c_callback_args_t
     
    struct  i3c_cfg_t
     
    struct  i3c_api_t
     
    struct  i3c_instance_t
     
    + + + +

    +Typedefs

    typedef void i3c_ctrl_t
     
    + + + + + + + + + + + + + +

    +Enumerations

    enum  i3c_common_command_code_t
     
    enum  i3c_event_t
     
    enum  i3c_device_type_t
     
    enum  i3c_device_protocol_t
     
    enum  i3c_address_assignment_mode_t
     
    enum  i3c_ibi_type_t
     
    +

    Data Structure Documentation

    + +

    ◆ i3c_device_status_t

    + +
    +
    + + + + +
    struct i3c_device_status_t
    +
    +

    The current status of the slave device (See GETSTATUS in the MIPI I3C Specification v1.0).

    +
    + + + + + + + +
    Data Fields
    +uint8_t +pending_interrupt +Contains the interrupt number of any pending interrupt, or 0 if no interrupts are pending.
    +uint8_t +vendor_status +Reserved for vendor-specific meaning.
    + +
    +
    + +

    ◆ i3c_slave_info_t

    + +
    +
    + + + + +
    struct i3c_slave_info_t
    +
    +

    Device characteristics that define the I3C capabilities of a slave.

    +
    + + + + + + + + + + +
    Data Fields
    +uint8_t +pid[6] +Provisional ID.
    +union i3c_slave_info_t +__unnamed__ +
    +uint8_t +dcr +Device Characteristics Register.
    + +
    +
    + +

    ◆ i3c_device_table_cfg_t

    + +
    +
    + + + + +
    struct i3c_device_table_cfg_t
    +
    +

    Structure for configuring an entry in the device table when the driver is in master mode (See i3c_api_t::masterDeviceTableSet).

    +
    + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint8_t +static_address +I3C Static address / I2C address for this device.
    +uint8_t +dynamic_address +

    Dynamic address for the device. This address will be assigned during Dynamic Address Assignment.

    +
    +i3c_device_protocol_t +device_protocol +The protocol used to communicate with this device (I3C / I2C Legacy).
    +bool +ibi_accept +Accept or reject IBI requests from this device.
    +bool +master_request_accept +Accept mastership requests from this device.
    +bool +ibi_payload +

    IBI requests from this device have a data payload.

    +

    Note: When the device is configured using ENTDAA, the ibi_payload will automatically be updated based on the value of BCR.

    +
    + +
    +
    + +

    ◆ i3c_device_cfg_t

    + +
    +
    + + + + +
    struct i3c_device_cfg_t
    +
    +

    Structure for configuring a slave address when the driver is in slave mode (See i3c_api_t::deviceCfgSet).

    +
    + + + + + + + + + + +
    Data Fields
    +uint8_t +static_address +I3C Static address / I2C address for this device.
    +uint8_t +dynamic_address +

    Dynamic address for this device. Note that the dynamic address will automatically be updated when ENTDAA is completed.

    +
    +i3c_slave_info_t +slave_info +PID, BCR, and DCR registers for the device (Slave mode only).
    + +
    +
    + +

    ◆ i3c_command_descriptor_t

    + +
    +
    + + + + +
    struct i3c_command_descriptor_t
    +
    +

    Descriptor for completing CCC transfers.

    +
    + + + + + + + + + + + + + + + + +
    Data Fields
    +uint8_t +command_code +Common Command Code for the transfer.
    +uint8_t * +p_buffer +Buffer for reading or writing data.
    +uint32_t +length +Length of the data portion of the command.
    +bool +restart +If true, issue a repeated-start after the transfer is completed.
    +bool +rnw +Set to true if the command type is Direct Get.
    + +
    +
    + +

    ◆ i3c_callback_args_t

    + +
    +
    + + + + +
    struct i3c_callback_args_t
    +
    +

    Arguments that are passed to the user callback when an event occurs.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +i3c_event_t +event +The type of event that has occurred.
    +uint32_t +event_status +Status flags associated with the event.
    +uint32_t +transfer_size +Number of bytes transferred.
    +i3c_slave_info_t const * +p_slave_info +A pointer to the Characteristics Registers read during ENTDAA.
    +uint8_t +dynamic_address +The dynamic address that was assigned to the slave during ENTDAA.
    +i3c_ibi_type_t +ibi_type +The type of IBI that has been received.
    +uint8_t +ibi_address +The address of the device that sent the IBI.
    +uint8_t +command_code +The command code of the received command.
    +void const * +p_context +User defined context.
    + +
    +
    + +

    ◆ i3c_cfg_t

    + +
    +
    + + + + +
    struct i3c_cfg_t
    +
    +

    User configuration structure, used in open function

    +
    + + + + + + + + + + + + +

    Data Fields

    uint32_t channel
     
    i3c_device_type_t device_type
     
    void(* p_callback )(i3c_callback_args_t const *const p_args)
     
    +void const * p_context
     Pointer to the user-provided context.
     
    void const * p_extend
     
    +

    Field Documentation

    + +

    ◆ channel

    + +
    +
    + + + + +
    uint32_t i3c_cfg_t::channel
    +
    +

    Select a channel corresponding to the channel number of the hardware.

    + +
    +
    + +

    ◆ device_type

    + +
    +
    + + + + +
    i3c_device_type_t i3c_cfg_t::device_type
    +
    +

    The type of device.

    + +
    +
    + +

    ◆ p_callback

    + +
    +
    + + + + +
    void(* i3c_cfg_t::p_callback) (i3c_callback_args_t const *const p_args)
    +
    +

    Pointer to the user callback.

    + +
    +
    + +

    ◆ p_extend

    + +
    +
    + + + + +
    void const* i3c_cfg_t::p_extend
    +
    +

    Pointer to extended configuration.

    + +
    +
    + +
    +
    + +

    ◆ i3c_api_t

    + +
    +
    + + + + +
    struct i3c_api_t
    +
    +

    I3C functions implemented at the HAL layer will follow this API.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(i3c_ctrl_t *const p_ctrl, i3c_cfg_t const *const p_cfg)
     
    fsp_err_t(* enable )(i3c_ctrl_t *const p_ctrl)
     
    fsp_err_t(* deviceCfgSet )(i3c_ctrl_t *const p_ctrl, i3c_device_cfg_t const *const p_device_cfg)
     
    fsp_err_t(* masterDeviceTableSet )(i3c_ctrl_t *const p_ctrl, uint32_t device_index, i3c_device_table_cfg_t const *const p_device_table_cfg)
     
    fsp_err_t(* deviceSelect )(i3c_ctrl_t *const p_ctrl, uint32_t device_index, uint32_t bitrate_mode)
     
    fsp_err_t(* dynamicAddressAssignmentStart )(i3c_ctrl_t *const p_ctrl, i3c_address_assignment_mode_t address_assignment_mode, uint32_t starting_device_index, uint32_t device_count)
     
    fsp_err_t(* slaveStatusSet )(i3c_ctrl_t *const p_ctrl, i3c_device_status_t device_status)
     
    fsp_err_t(* commandSend )(i3c_ctrl_t *const p_ctrl, i3c_command_descriptor_t *p_command_descriptor)
     
    fsp_err_t(* write )(i3c_ctrl_t *const p_ctrl, uint8_t const *const p_data, uint32_t length, bool restart)
     
    fsp_err_t(* read )(i3c_ctrl_t *const p_ctrl, uint8_t *const p_data, uint32_t length, bool restart)
     
    fsp_err_t(* ibiWrite )(i3c_ctrl_t *const p_ctrl, i3c_ibi_type_t ibi_type, uint8_t const *const p_data, uint32_t length)
     
    fsp_err_t(* ibiRead )(i3c_ctrl_t *const p_ctrl, uint8_t *const p_data, uint32_t length)
     
    fsp_err_t(* close )(i3c_ctrl_t *const p_ctrl)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::open) (i3c_ctrl_t *const p_ctrl, i3c_cfg_t const *const p_cfg)
    +
    +

    Initial configuration.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control block. Must be declared by user. Elements set here.
    [in]p_cfgPointer to configuration structure. All elements of this structure must be set by user.
    +
    +
    + +
    +
    + +

    ◆ enable

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::enable) (i3c_ctrl_t *const p_ctrl)
    +
    +

    Enable the I3C device.

    +
    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    +
    +
    + +
    +
    + +

    ◆ deviceCfgSet

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::deviceCfgSet) (i3c_ctrl_t *const p_ctrl, i3c_device_cfg_t const *const p_device_cfg)
    +
    +

    Set the configuration of this device.

    +
    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]p_device_cfgPointer to device configuration.
    +
    +
    + +
    +
    + +

    ◆ masterDeviceTableSet

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::masterDeviceTableSet) (i3c_ctrl_t *const p_ctrl, uint32_t device_index, i3c_device_table_cfg_t const *const p_device_table_cfg)
    +
    +

    Set the configuration for the device at the given index in the device table. The configuration will be used by transfers when it is selected by deviceSelect.

    +

    Note: This function is not used in slave mode.

    +
    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]device_indexIndex into the device table.
    [in]p_device_table_cfgPointer to the table settings for the entry in the master device table.
    +
    +
    + +
    +
    + +

    ◆ deviceSelect

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::deviceSelect) (i3c_ctrl_t *const p_ctrl, uint32_t device_index, uint32_t bitrate_mode)
    +
    +

    In master mode, select the device for the next transfer.

    +

    Note: This function is not used in slave mode.

    +
    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]device_indexIndex into the device table.
    [in]bitrate_settingThe bitrate settings for the selected device.
    +
    +
    + +
    +
    + +

    ◆ dynamicAddressAssignmentStart

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::dynamicAddressAssignmentStart) (i3c_ctrl_t *const p_ctrl, i3c_address_assignment_mode_t address_assignment_mode, uint32_t starting_device_index, uint32_t device_count)
    +
    +

    Start Dynamic Address Assignment by sending either the ENTDAA or SETDASA command See i3c_address_assignment_mode_t for more information.

    +

    Note: This function is not used in slave mode.

    +
    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]address_assignment_modeThe command to use for Dynamic Address Assignment.
    [in]starting_device_indexThe device index that will be used to assign the first device during Dynamic Address Assignment.
    [in]device_countThe number of devices to assign (Only used with I3C_ADDRESS_ASSIGNMENT_MODE_ENTDAA).
    +
    +
    + +
    +
    + +

    ◆ slaveStatusSet

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::slaveStatusSet) (i3c_ctrl_t *const p_ctrl, i3c_device_status_t device_status)
    +
    +

    Set the status returned to the master in response to a GETSTATUS command.

    +

    Note: This function is not used in master mode.

    +
    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]device_statusNew status settings for responding to the GETSTATUS command code.
    +
    +
    + +
    +
    + +

    ◆ commandSend

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::commandSend) (i3c_ctrl_t *const p_ctrl, i3c_command_descriptor_t *p_command_descriptor)
    +
    +

    Send a broadcast or directed command to slave devices on the bus.

    +

    Note: This function is not used in slave mode.

    +
    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]p_command_descriptorA descriptor for executing the command.
    +
    +
    + +
    +
    + +

    ◆ write

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::write) (i3c_ctrl_t *const p_ctrl, uint8_t const *const p_data, uint32_t length, bool restart)
    +
    +

    In master mode: Start a write transfer. When the transfer is completed send a stop condition or a repeated-start. In slave mode: Set the write buffer and configure the number of bytes that will be transferred before the the transfer is ended by the slave via the 'T' bit or by the master issueing a stop condition.

    +
    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]p_dataPointer to a buffer to write.
    [in]lengthNumber of bytes to transfer.
    [in]restartIf true, issue a repeated-start after the transfer is completed (Master only).
    +
    +
    + +
    +
    + +

    ◆ read

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::read) (i3c_ctrl_t *const p_ctrl, uint8_t *const p_data, uint32_t length, bool restart)
    +
    +

    In master mode: Start a read transfer. When the transfer is completed, send a stop condition or a repeated-start. In slave mode: Set the read buffer for storing data read during the transfer. When the buffer is full, the application will receive a callback requesting a new read buffer. If no buffer is provided by the application, the driver will discard any remaining bytes read during the transfer.

    +
    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]p_dataPointer to a buffer to store the bytes read during the transfer.
    [in]lengthNumber of bytes to transfer.
    [in]restartIf true, issue a repeated-start after the transfer is completed (Master only).
    +
    +
    + +
    +
    + +

    ◆ ibiWrite

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::ibiWrite) (i3c_ctrl_t *const p_ctrl, i3c_ibi_type_t ibi_type, uint8_t const *const p_data, uint32_t length)
    +
    +

    Initiate an IBI write operation.

    +

    Note: This function is not used in master mode.

    +
    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]ibi_typeThe type of In-Band Interrupt.
    [in]p_dataPointer to a buffer to start the bytes read during the transfer.
    [in]lengthNumber of bytes to transfer.
    +
    +
    + +
    +
    + +

    ◆ ibiRead

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::ibiRead) (i3c_ctrl_t *const p_ctrl, uint8_t *const p_data, uint32_t length)
    +
    +

    Set the read buffer for storing received IBI data (This function is not used in slave mode).

    +
    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    [in]p_dataPointer to a buffer to store the bytes read during the transfer.
    [in]lengthNumber of bytes to transfer.
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* i3c_api_t::close) (i3c_ctrl_t *const p_ctrl)
    +
    +

    Allows driver to be reconfigured and may reduce power consumption.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlControl block set in i3c_api_t::open call for this instance.
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ i3c_instance_t

    + +
    +
    + + + + +
    struct i3c_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +i3c_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +i3c_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +i3c_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ i3c_ctrl_t

    + +
    +
    + + + + +
    typedef void i3c_ctrl_t
    +
    +

    I3C control block. Allocate an instance specific control block to pass into the I3C API calls.

    Implemented as
      +
    • i3c_instance_ctrl_t
      • +
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ i3c_common_command_code_t

    + +
    +
    + + + + +
    enum i3c_common_command_code_t
    +
    +

    Common Command Codes defined by MIPI I3C Specification v1.1.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    I3C_CCC_BROADCAST_ENEC 

    Enable Slave initiated events.

    +
    I3C_CCC_BROADCAST_DISEC 

    Disable Slave initiated events.

    +
    I3C_CCC_BROADCAST_ENTAS0 

    Enter Activity State 0.

    +
    I3C_CCC_BROADCAST_ENTAS1 

    Enter Activity State 1.

    +
    I3C_CCC_BROADCAST_ENTAS2 

    Enter Activity State 2.

    +
    I3C_CCC_BROADCAST_ENTAS3 

    Enter Activity State 3.

    +
    I3C_CCC_BROADCAST_RSTDAA 

    Reset Dynamic Address Assignment.

    +
    I3C_CCC_BROADCAST_ENTDAA 

    Enter Dynamic Address Assignment.

    +
    I3C_CCC_BROADCAST_DEFSVLS 

    Define List of Slaves.

    +
    I3C_CCC_BROADCAST_SETMWL 

    Set Max Write Length.

    +
    I3C_CCC_BROADCAST_SETMRL 

    Set Max Read Length.

    +
    I3C_CCC_BROADCAST_ENTTM 

    Enter Test Mode.

    +
    I3C_CCC_BROADCAST_ENTHDR0 

    Enter HDR Mode 0.

    +
    I3C_CCC_BROADCAST_ENTHDR1 

    Enter HDR Mode 1.

    +
    I3C_CCC_BROADCAST_ENTHDR2 

    Enter HDR Mode 2.

    +
    I3C_CCC_BROADCAST_ENTHDR3 

    Enter HDR Mode 3.

    +
    I3C_CCC_BROADCAST_ENTHDR4 

    Enter HDR Mode 4 (Reserved for future definition).

    +
    I3C_CCC_BROADCAST_ENTHDR5 

    Enter HDR Mode 5 (Reserved for future definition).

    +
    I3C_CCC_BROADCAST_ENTHDR6 

    Enter HDR Mode 6 (Reserved for future definition).

    +
    I3C_CCC_BROADCAST_ENTHDR7 

    Enter HDR Mode 7 (Reserved for future definition).

    +
    I3C_CCC_BROADCAST_SETXTIME 

    Set Exchange Timing Info.

    +
    I3C_CCC_BROADCAST_SETAASA 

    Set All Addresses to Static Address.

    +
    I3C_CCC_DIRECT_ENEC 

    Enable Slave initiated events.

    +
    I3C_CCC_DIRECT_DISEC 

    Disable Slave initiated events.

    +
    I3C_CCC_DIRECT_ENTAS0 

    Enter Activity State 0.

    +
    I3C_CCC_DIRECT_ENTAS1 

    Enter Activity State 1.

    +
    I3C_CCC_DIRECT_ENTAS2 

    Enter Activity State 2.

    +
    I3C_CCC_DIRECT_ENTAS3 

    Enter Activity State 3.

    +
    I3C_CCC_DIRECT_RSTDAA 

    Reset Dynamic Address Assignment.

    +
    I3C_CCC_DIRECT_SETDASA 

    Set Dynamic Address from Static Address.

    +
    I3C_CCC_DIRECT_SETNEWDA 

    Set New Dynamic Address.

    +
    I3C_CCC_DIRECT_SETMWL 

    Set Max Write Length.

    +
    I3C_CCC_DIRECT_SETMRL 

    Set Max Read Length.

    +
    I3C_CCC_DIRECT_GETMWL 

    Get Max Write Length.

    +
    I3C_CCC_DIRECT_GETMRL 

    Get Max Read Length.

    +
    I3C_CCC_DIRECT_GETPID 

    Get Provisional ID.

    +
    I3C_CCC_DIRECT_GETBCR 

    Get Bus Characteristic Register.

    +
    I3C_CCC_DIRECT_GETDCR 

    Get Device Characteristic Register.

    +
    I3C_CCC_DIRECT_GETSTATUS 

    Get Device Status.

    +
    I3C_CCC_DIRECT_GETACCMST 

    Get Accept Mastership.

    +
    I3C_CCC_DIRECT_GETMXDS 

    Get Max Data Speed.

    +
    I3C_CCC_DIRECT_SETXTIME 

    Set Exchange Timing Information.

    +
    I3C_CCC_DIRECT_GETXTIME 

    Get Exchange Timing Information.

    +
    + +
    +
    + +

    ◆ i3c_event_t

    + +
    +
    + + + + +
    enum i3c_event_t
    +
    +

    I3C Events that result in a callback.

    + + + + + + + + + + + + + +
    Enumerator
    I3C_EVENT_ENTDAA_ADDRESS_PHASE 

    Events that only occur in Master mode. A Slave device has finished writing its PID, BCR, and DCR. This information is provided in i3c_callback_args_t::p_slave_info.

    +
    I3C_EVENT_IBI_READ_COMPLETE 

    An IBI has successfully been read.

    +
    I3C_EVENT_IBI_READ_BUFFER_FULL 

    There is no more space in the IBI read buffer. The application may provide another buffer by calling i3c_api_t::ibiRead.

    +
    I3C_EVENT_READ_BUFFER_FULL 

    Events that only occur in Slave mode. There is no more space in the read buffer. The application may provide another buffer by calling i3c_api_t::read.

    +
    I3C_EVENT_IBI_WRITE_COMPLETE 

    A IBI was written successfully.

    +
    I3C_EVENT_HDR_EXIT_PATTERN_DETECTED 

    The HDR exit pattern was detected on the bus.

    +
    I3C_EVENT_ADDRESS_ASSIGNMENT_COMPLETE 

    Dynamic Address Assignment has completed.

    +

    Events that are common to Master and Slave mode.

    +
    I3C_EVENT_COMMAND_COMPLETE 

    A command was completed.

    +
    I3C_EVENT_WRITE_COMPLETE 

    A write transfer has completed.

    +
    I3C_EVENT_READ_COMPLETE 

    A read transfer has completed.

    +
    I3C_EVENT_TIMEOUT_DETECTED 

    SCL is stuck at the logic high or logic low level during a transfer.

    +
    I3C_EVENT_INTERNAL_ERROR 

    An internal error occurred.

    +
    + +
    +
    + +

    ◆ i3c_device_type_t

    + +
    +
    + + + + +
    enum i3c_device_type_t
    +
    +

    The type of device.

    + + + +
    Enumerator
    I3C_DEVICE_TYPE_MAIN_MASTER 

    The main master starts in master mode and is responsible for configuring the bus.

    +
    I3C_DEVICE_TYPE_SLAVE 

    A slave device listens to the bus for relevant I3C Commands (CCCs) sent by the current master, and responds accordingly. Slave devices may also initiate In-band interrupts and Hot-Join requests.

    +
    + +
    +
    + +

    ◆ i3c_device_protocol_t

    + +
    +
    + + + + +
    enum i3c_device_protocol_t
    +
    +

    Identifies the protocol for transferring data with the device on the bus.

    + + + +
    Enumerator
    I3C_DEVICE_PROTOCOL_I2C 

    Transfers will use legacy I2C protocol with open-drain output at a reduced baudrate.

    +
    I3C_DEVICE_PROTOCOL_I3C 

    Transfers will use I3C SDR mode.

    +
    + +
    +
    + +

    ◆ i3c_address_assignment_mode_t

    + +
    +
    + + + + +
    enum i3c_address_assignment_mode_t
    +
    +

    Address Assignment Mode.

    + + +
    Enumerator
    I3C_ADDRESS_ASSIGNMENT_MODE_ENTDAA 

    Send the ENTDAA command to enter Dynamic Address Assignment mode and assign dynamic addresses in order, starting with the starting device index. The procedure is completed after the specified number of devices have been configured. The callback will be called after the PID, DCR, and BCR registers have been read for each device.

    +
    + +
    +
    + +

    ◆ i3c_ibi_type_t

    + +
    +
    + + + + +
    enum i3c_ibi_type_t
    +
    +

    The type of In-Band Interrupt.

    + + + + +
    Enumerator
    I3C_IBI_TYPE_INTERRUPT 

    Application specific In-Band Interrupt for notifying the master when an event occurs.

    +
    I3C_IBI_TYPE_HOT_JOIN 

    Request the master to perform the Dynamic Address Assignment process.

    +
    I3C_IBI_TYPE_MASTERSHIP_REQUEST 

    Request the master to give up control of the bus.

    +
    + +
    +
    +
    +
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"group___i3_c___a_p_i.html#gaa7585dee427a1d95926f88dd55ecf305", [ + [ "I3C_DEVICE_PROTOCOL_I2C", "group___i3_c___a_p_i.html#ggaa7585dee427a1d95926f88dd55ecf305a68c12b56610277eac342a9aa5b5fcb1b", null ], + [ "I3C_DEVICE_PROTOCOL_I3C", "group___i3_c___a_p_i.html#ggaa7585dee427a1d95926f88dd55ecf305a6b32868175ba9fb454f459441be611be", null ] + ] ], + [ "i3c_address_assignment_mode_t", "group___i3_c___a_p_i.html#ga6ebef50cdf52650f03e1b449325779fc", [ + [ "I3C_ADDRESS_ASSIGNMENT_MODE_ENTDAA", "group___i3_c___a_p_i.html#gga6ebef50cdf52650f03e1b449325779fca747529dae6e854111df4e95e9ba3c91a", null ] + ] ], + [ "i3c_ibi_type_t", "group___i3_c___a_p_i.html#ga81ac58196d67e74a0a3702c3e760ede7", [ + [ "I3C_IBI_TYPE_INTERRUPT", "group___i3_c___a_p_i.html#gga81ac58196d67e74a0a3702c3e760ede7a29e66a0c093804099f1680935b8390a7", null ], + [ "I3C_IBI_TYPE_HOT_JOIN", "group___i3_c___a_p_i.html#gga81ac58196d67e74a0a3702c3e760ede7ae53f3f0966395df095e951839052c6ca", null ], + [ "I3C_IBI_TYPE_MASTERSHIP_REQUEST", "group___i3_c___a_p_i.html#gga81ac58196d67e74a0a3702c3e760ede7a6aec7546d7484201fa4442c4b37b3d8c", null ] + ] ] +]; \ No newline at end of file diff --git a/group___i3_c___b.html b/group___i3_c___b.html new file mode 100644 index 0000000..b6e1f7a --- /dev/null +++ b/group___i3_c___b.html @@ -0,0 +1,1883 @@ + + + + + + + +RZV Flexible Software Package Documentation: I3C (r_i3c_b) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +
    +Functions | +Data Structures | +Macros | +Enumerations
    +
    +
    I3C (r_i3c_b)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_I3C_B_Open (i3c_ctrl_t *const p_api_ctrl, i3c_cfg_t const *const p_cfg)
     
    fsp_err_t R_I3C_B_Enable (i3c_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_I3C_B_DeviceCfgSet (i3c_ctrl_t *const p_api_ctrl, i3c_device_cfg_t const *const p_device_cfg)
     
    fsp_err_t R_I3C_B_MasterDeviceTableSet (i3c_ctrl_t *const p_api_ctrl, uint32_t device_index, i3c_device_table_cfg_t const *const p_device_table_cfg)
     
    fsp_err_t R_I3C_B_SlaveStatusSet (i3c_ctrl_t *const p_api_ctrl, i3c_device_status_t status)
     
    fsp_err_t R_I3C_B_DeviceSelect (i3c_ctrl_t *const p_api_ctrl, uint32_t device_index, uint32_t bitrate_mode)
     
    fsp_err_t R_I3C_B_DynamicAddressAssignmentStart (i3c_ctrl_t *const p_api_ctrl, i3c_address_assignment_mode_t address_assignment_mode, uint32_t starting_device_index, uint32_t device_count)
     
    fsp_err_t R_I3C_B_CommandSend (i3c_ctrl_t *const p_api_ctrl, i3c_command_descriptor_t *p_command_descriptor)
     
    fsp_err_t R_I3C_B_Write (i3c_ctrl_t *const p_api_ctrl, uint8_t const *const p_data, uint32_t length, bool restart)
     
    fsp_err_t R_I3C_B_Read (i3c_ctrl_t *const p_api_ctrl, uint8_t *const p_data, uint32_t length, bool restart)
     
    fsp_err_t R_I3C_B_IbiWrite (i3c_ctrl_t *const p_api_ctrl, i3c_ibi_type_t ibi_type, uint8_t const *const p_data, uint32_t length)
     
    fsp_err_t R_I3C_B_IbiRead (i3c_ctrl_t *const p_api_ctrl, uint8_t *const p_data, uint32_t length)
     
    fsp_err_t R_I3C_B_Close (i3c_ctrl_t *const p_api_ctrl)
     
    +

    Detailed Description

    +

    Driver for the I3C peripheral on RZ MPU. This module implements the I3C Interface.

    +

    +Overview

    +

    I3C is a communication protocol defined by MIPI that aims to improve on I2C by increasing the maximum transfer rate, as well as providing other features like "In-band Interrupts", "Dynamic Address Assignment", and a set of standard "Common Command Codes".

    +

    +Features

    +

      +
    • I3C Master Mode
      • +
    • I3C Slave Mode
      • +
    • Dynamic Address Assignment (ENTDAA/SETDASA)
      • +
    • SDR Read/Write transfers
      • +
    • I2C Legacy Read/Write transfers
      • +
    • In-Band Interrupts (Interrupt Requests, Hot-Join Requests)
      • +
    • Common Command Codes
      • +
    • Clock Stalling
      • +
    • Timeout Detection
      • +
    +

    Master Mode

    +

    On an I3C bus, only one device may operate in master mode at a time. The current master is responsible for initiating I2C Legacy transfers, SDR transfers, Common Command Codes, and handling IBIs (Interrupt Requests, Hot-Join Requests). In order to perform these operations, the driver has an internal device table that is used for storing configuration information for each device on the bus (See i3c_device_table_cfg_t). Each entry in the device table contains the static or dynamic address of the device, and IBI permissions for accepting or rejecting IBI requests from the device. The device table has a limited number of entries as well as one extended device entry that only contains the static or dynamic address of a device (See below).

    +
    +r_i3c_device_table.svg +
    +Master Device Table
    +

    In order to initiate I2C Legacy transfers, SDR transfers, or Common Command Codes, the master must select a device entry from the device table using i3c_api_t::deviceSelect. Once a device has been selected, all subsequent operations will be directed to the selected device until a new device is selected using i3c_api_t::deviceSelect.

    +

    The master may also receive IBI requests that are initiated by slave devices on the bus. If there is a payload, then the driver will write the data into a buffer that is provided by the application by calling i3c_api_t::ibiRead. If the application has not provided an IBI buffer prior to receiving an IBI, then the it will get a callback requesting an IBI buffer. Once the IBI is completed, the application will be notified by a callback.

    +
    Note
    1. Even though there are only a limited number of device table entries and one extended device table entry, the application can operate on more devices by maintaining its own list of devices and updating the extended device entry as needed. Note however that devices defined in the extended device table entry will not be able to initiate IBI requests.
    +

    Main Master

    +

    The main master is responsible for configuring the dynamic address of all devices on the bus. The driver initiates this procedure by calling i3c_api_t::dynamicAddressAssignmentStart. Before starting address assignment, the application must configure the device table using i3c_api_t::masterDeviceTableSet.

    +

    Enter Dynamic Address Assignment (ENTDAA):

    +

    The application initiates the ENTDAA operation by calling i3c_api_t::dynamicAddressAssignmentStart with a starting index into the master device table and a count specifying the number of devices to configure. The master starts by sending the ENTDAA command. Every I3C device on the bus that has not already been initialized will acknowledge the command and attempt to write its Provisional ID, DCR, and BCR registers. The device with the smallest value in these registers will win arbitration and be assigned with the first dynamic address defined in the master device table. The master will then increment the index and repeat the process by assigning the dynamic address to the next device. The process continues until the specified number of devices have been initialized or until there are no more devices to configure.

    +
    Note
    1. The IBI payload setting will automatically be updated in the master device table based on the BCR setting that was read during ENTDAA.
    +
    +2. After each device successfully writes its Provisional ID, DCR, and BCR registers, the application will get a callback that will provide the value of the registers.
    +
    +3. If the starting index is set to the extended device entry, then the device count must be set to 1.
    +
    +4. The main master assigns its own dynamic address with i3c_api_t::deviceCfgSet.
    +

    Set Dynamic Address from Static Address (SETDASA):

    +

    The application initiates the SETDASA operation by calling i3c_api_t::dynamicAddressAssignmentStart with an index into the master device table. The master sends the SETDASA command to the static address defined in the given device table entry, and then assigns the associated dynamic address.

    +
    Note
    1. Set the count to 0 when using SETDASA.
    +

    Slave Mode

    +

    In slave mode, the device configures its static address, Provisional ID, BCR, and DCR registers using i3c_api_t::deviceCfgSet, and then waits for the master to initiate communication. Prior to being assigned a dynamic address, the slave will operate as an I2C device using its static address. The application will receive a callback when the master assigns it a dynamic address, after which point, the slave will operate as an I3C device until it receives the RSTDAA command.

    +

    Depending on the capabilities defined in its BCR register, the slave may also initiate IBI Interrupt Requests, and Hot-Join Requests using i3c_api_t::ibiWrite

    +

    +Configuration

    +

    Build Time Configurations for r_i3c_b

    +The following build time configurations are defined in fsp_cfg/r_i3c_b_cfg.h:
    +

    + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    Unaligned Buffer Support
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled Unaligned buffer support may be optionally disabled for improved performance.
    Master Support
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled If only slave mode is required, disable master support to decrease code size.
    Slave Support
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled If only master mode is required, disable slave support to decrease code size.
    Error Recovery ProcedureSupport Error Recovery of I3C modeSupport Error Recovery of I3C mode Error Recovery of I3C mode
    +

    Configurations for Connectivity > I3C (r_i3c_b)

    +This module can be added to the Stacks tab via New Stack > Connectivity > I3C (r_i3c_b).
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Bitrate Settings > Standard Mode > Open-Drain > Logic High Period (ns)Must be an integer greater than 0.167 The Logic High period of SCL during Standard Mode Open Drain transfers.
    Bitrate Settings > Standard Mode > Open-Drain > FrequencyMust be an integer greater than 0.1000000 The Frequency of SCL during Standard Mode Open Drain transfers.
    Bitrate Settings > Standard Mode > Push-Pull > Logic High Period (ns)The Logic High Period must be greater than or equal to 24 Nanoseconds.167 The Logic High period of SCL during Standard Mode Push Pull transfers.
    Bitrate Settings > Standard Mode > Push-Pull > FrequencyPush-Pull frequency must be greater than or equal to 10000 Hz.3400000 The Frequency of SCL during Standard Mode Push-Pull transfers.
    Bitrate Settings > Extended Mode > Open-Drain > Logic High Period (ns)Must be an integer greater than 0.167 The Logic High period of SCL during Extended Mode Open Drain transfers.
    Bitrate Settings > Extended Mode > Open-Drain > FrequencyMust be an integer greater than 0.1000000 The Frequency of SCL during Extended Mode Open Drain transfers.
    Bitrate Settings > Extended Mode > Push-Pull > Logic High Period (ns)The Logic High Period must be greater than or equal to 24 Nanoseconds.167 The Logic High period of SCL during Extended Mode Push Pull transfers.
    Bitrate Settings > Extended Mode > Push-Pull > FrequencyPush-Pull frequency must be greater than or equal to 10000 Hz.3400000 The Frequency of SCL during Extended Mode Push-Pull transfers.
    Bitrate Settings > Bus Timing > Open Drain Rising Time (ns)Rising time must be greater than or equal to 0 nanoseconds.0 The Open Drain rising time in nanoseconds.
    Bitrate Settings > Bus Timing > Open Drain Falling Time (ns)Falling time must be greater than or equal to 0 nanoseconds.0 The Open Drain falling time in nanoseconds.
    Bitrate Settings > Bus Timing > Push-Pull Rising Time (ns)Rising time must be greater than or equal to 0 nanoseconds.0 The Push-Pull rising time in nanoseconds.
    Bitrate Settings > Bus Timing > Push-Pull Falling Time (ns)Falling time must be greater than or equal to 0 nanoseconds.0 The Push-Pull rising time in nanoseconds.
    Bitrate Settings > Clock Stalling > Address Assignment Phase
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Enable clock stalling during the Address Assignment Phase of ENTDAA.
    Bitrate Settings > Clock Stalling > Transition Phase
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Enable clock stalling during the Transition Bit of a read transfer.
    Bitrate Settings > Clock Stalling > Parity Phase
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Enable clock stalling during the Parity Bit of a write transfer.
    Bitrate Settings > Clock Stalling > Ack Phase
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Enable clock stalling during the ACK phase of a transfer.
    Bitrate Settings > Clock Stalling > Time (us)Must be greater than or equal to 0.0 The amount of time to stall the clock during the Address Assignment Phase, Transition Phase, Parity Phase, and ACK Phase.
    Master Mode > ACK Hot-Join Requests
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, the I3C_B instance will ACK Hot-Join Requests and notify the application.
    Master Mode > Notify Rejected Hot-Join Requests.
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, the application will get a callback when an IBI Hot-Join Request is rejected.
    Master Mode > Notify Rejected Mastership Requests.
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, the application will get a callback when an IBI Mastership Request is rejected.
    Master Mode > Notify Rejected Interrupt Requests.
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, the application will get a callback when an IBI Interrupt Request is rejected.
    Slave Mode > Command Response Info > ENEC/DISEC > In-Band Interrupts
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Configure whether the slave can issue IBI requests.
    Slave Mode > Command Response Info > ENEC/DISEC > Hot-Join Requests
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Configure whether the slave can issue Hot-Join requests.
    Slave Mode > Command Response Info > ENTASn > Activity State
      +
    • +Activity State 0
      • +
    • +Activity State 1
      • +
    • +Activity State 2
      • +
    • +Activity State 3
      • +
    +    		Activity State 0 Configure the starting activity state of the slave.
    Slave Mode > Command Response Info > SETMWL/GETMWL > Max Write LengthWrite length must be in the range of [8, 65535].65535 Set the max write length.
    Slave Mode > Command Response Info > SETMRL/GETMRL > Max Read LengthRead length must be in the range of [16, 65535].65535 Set the max read length.
    Slave Mode > Command Response Info > SETMRL/GETMRL > Max IBI Payload LengthRead length must be in the range of [0, 255].0 Set the max IBI payload length, or set it to 0 for unlimited.
    Slave Mode > Command Response Info > GETMXDS > Write Data Rate
      +
    • +FSCL_MAX
      • +
    • +8Mhz
      • +
    • +6Mhz
      • +
    • +4Mhz
      • +
    • +2Mhz
      • +
    +    		2Mhz Set the max write data rate.
    Slave Mode > Command Response Info > GETMXDS > Read Data Rate
      +
    • +FSCL_MAX
      • +
    • +8Mhz
      • +
    • +6Mhz
      • +
    • +4Mhz
      • +
    • +2Mhz
      • +
    +    		2Mhz Set the max read data rate.
    Slave Mode > Command Response Info > GETMXDS > Clock to Data Turnaround Time
      +
    • +8 Nanoseconds
      • +
    • +9 Nanoseconds
      • +
    • +10 Nanoseconds
      • +
    • +11 Nanoseconds
      • +
    • +12 Nanoseconds
      • +
    • +Greater than 12 Nanoseconds
      • +
    +    		8 Nanoseconds Set the clock to data turnaround time.
    Slave Mode > Command Response Info > GETMXDS > Include Max Read Turnaround Time
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Configure whether the Max Read Turnaround time will be transmitted.
    Slave Mode > Command Response Info > GETMXDS > Max Read Turnaround TimeValue must be in the range [0, 255].0 Set max read turnaround time.
    Slave Mode > Command Response Info > GETXTIME > Frequency ByteValue must be in the range [0, 255].0 Set the internal oscillator frequency in increments of 0.5 Mhz.
    Slave Mode > Command Response Info > GETXTIME > Inaccuracy ByteValue must be in the range [0, 255].0 Set the oscillator inaccuracy byte in increments of 0.5%
    Interrupts > Interrupt PriorityChannel number must be a positive integer10 The interrupt priority of the RX, TX, RESPONSE, RCV_STATUS, and IBI ISRs.
    Interrupts > Error and Event Interrupt PriorityChannel number must be a positive integer10 The interrupt priority of the EEI ISR which is used to notify the application when an Internal Error, HDR Exit Pattern, or Timeout is detected.
    NameName must be a valid C symbolg_i3c0 Module name.
    CallbackName must be a valid C symbolg_i3c0_callback A user callback function must be provided. This will be called in order to notify the application of I3C_B events and provide status information.
    Callback ContextName must be a valid C symbolNULL A pointer to additional application specific information that is provided to the callback.
    Device Type
      +
    • +Main Master
      • +
    • +Slave
      • +
    +    		Slave The role that the I3C_B instance will take on the I3C_B bus.
    Bus Free Condition Detection Time (ns)Must be greater than or equal to 38.4 nanoseconds.38.4 The minimum period occurring after a STOP and before a START.
    Bus Available Condition Detection Time (us)Must be greater than or equal to 1 microsecond.1 The minimum period occurring after the Bus Free Condition when Slaves can initiate IBI requests.
    Bus Idle Condition Detection Time (us)Must be greater than or equal to 1000 microseconds.1000 The minimum period occurring after the Bus Available Condition when Slaves can initiate Hot-Join requests.
    Timeout Detection
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, the application will get a callback if SCL is stuck at a logic high or logic low level for more than 65535 cycles of the I3C_B source clock.
    +

    +

    +Clock Configuration

    +

    The following settings are used to configure the timing of SCL.

      +
    • Frequency of TCLK
      • +
    • Standard Mode
        +
      • Open Drain High Period (THIGH)
        • +
      • Open Drain Frequency
        • +
      • Push-Pull High Period (THIGH)
        • +
      • Push-Pull Frequency
        • +
      +
      • +
    • Extended Mode
        +
      • Open Drain High Period (THIGH)
        • +
      • Open Drain Frequency
        • +
      • Push-Pull High Period (THIGH)
        • +
      • Push-Pull Frquency
        • +
      +
      • +
    • i3c_b_bitrate_mode_t (Set during i3c_api_t::deviceSelect)
      • +
    +

    The Standard and Extended Mode settings define two separate SCL configurations that can be selected at run-time using i3c_api_t::deviceSelect.

    +

    In addition to selecting between the Standard and Extended Mode settings, the base SCL period can also be multiplied using the following options:

      +
    • I3C_B_BITRATE_MODE_I3C_SDR2_STDBR_X2: Multiple the base Standard Open Drain and Push-Pull period by 2.
      • +
    • I3C_B_BITRATE_MODE_I3C_SDR3_EXTBR_X2: Multiple the base Extended Open Drain and Push-Pull period by 2.
      • +
    • I3C_B_BITRATE_MODE_I3C_SDR4_EXTBR_X4: Multiple the base Extended Open Drain and Push-Pull period by 4.
      • +
    +

    In order to get accurate frequency calculations, the Rising and Falling edges must be input into the calculation. These values will depend on the topology the I3C bus that will be different for every application.

    +
    Note
    1. The Standard and Extended Open Drain period settings define the period to use during legacy I2C transfers (Only use the following i3c_b_bitrate_mode_t settings with I2C transfers: I3C_B_BITRATE_MODE_I2C_STDBR, I3C_B_BITRATE_MODE_I2C_EXTBR).
    +
    +2. THIGH is defined in Figure 31 in the MIPI I3C Specification v1.0 and describes the Logic High period.
    +
    +3. Depending on the MCU, TCLK is either derived from PCLKD or from a dedicated I3C Clock (I3CCLK).
    +

    +Pin Configuration

    +

    The I3C peripheral module uses pins on the MCU to communicate to external devices. I/O pins must be selected and configured as required by the external device. An I3C channel would consist of two pins - SDA and SCL for data/address and clock respectively.

    +

    +Usage Notes

    +

    Read and Write in Slave Mode

    +

    In slave mode, calling read or write does not start a transfer. Instead, calling read or write will configure the driver to perform the next read or write transfer using the user provided buffer.

    +

    Provided that a transfer is not already in progress, i3c_api_t::read and i3c_api_t::write can be called to update the internal buffers even if the transfer has not been completed yet. Both the read and write buffers can be configured at the same time in order to prepare the driver for when the master initiates a read or a write transfer.

    +

    If there is no space remaining in a user configured read buffer, the application will get a I3C_EVENT_READ_BUFFER_FULL callback requesting for a new read buffer to be provided.

    +

    Event Status

    +

    When a write, read, ibiWrite, ibiRead or commandSend, operation is completed, the i3c_callback_args_t::event_status should be checked. The event_status will provide information about the success or failure of the operation.

    +

    The following are possible statuses:

    +
    Note
    In master mode, if the master issues a stop condition before the slave ends the transfer via the 'T' bit, the status will be I3C_B_EVENT_STATUS_ABORTED.
    +
    +In slave mode, if the master issues a stop condition before the slave ends the transfer via the 'T' bit, the status will be I3C_B_EVENT_STATUS_ABORTED_TO_MASTER.
    +

    Direct Get Common Command Codes in Slave Mode

    +

    When an I3C slave receives a Command Code of type Direct Get, the response is automatically sent from the device Special Function Registers (SFR). The SFR contains information for each command code and can be configured during open (See i3c_b_extended_cfg_t::slave_command_response_info). This allows the slave to respond to Direct Get Command Codes much faster, and removes the burden of responding to these commands from the application.

    +

    The response to the GETSTATUS command can be configured at run-time using i3c_api_t::slaveStatusSet.

    +

    Disabling Unaligned Buffer Support

    +

    Support for performing read and write operations on unaligned buffers can be disabled in order to improve performance. When unaligned buffer support is disabled, all buffers passed to read, ibiRead, write, ibiWrite, and commandSend must be aligned to 4 bytes and the size of the buffers must be a multiple of 4 bytes.

    +

    In master mode, the value of the length passed to i3c_api_t::read and i3c_api_t::write sets the total length of the operation in bytes. During the read or write operation, the driver may read or write to the last word of memory during the operation. This means that the allocated memory for the buffer passed to read and write needs to be a multiple of 4 bytes even though the transfer length is not a multiple of 4 bytes.

    +

    In slave mode, the length passed to i3c_api_t::read must be a multiple of 4 bytes. The length passed to i3c_api_t::write sets the number of bytes that the slave will write. The size of the buffer passed to write still needs to be a multiple of 4 bytes.

    +

    Max Data Speed Limitation on RA2E2 MCUs

    +

    In Slave Mode, it is highly recommended that BCR[0] be set to '1' in order to indicate to the master that the device doesn't support the max data speed. The master is then required to use the GETMXDS command to get the device specific data speed limitations.

    +

    This will allow the slave to specify its maximum supported data rate for read/write, and the maximum read turnaround time (See GETMXDS in the MIPI I3C Specification v1.0).

    +

    Mixed Fast Bus

    +

    The MIPI I3C Specification v1.0 defines a Mixed Fast Bus as a bus that has legacy I2C devices that all have a 50ns Spike Filter.

    +

    On Mixed Fast Buses, SCL has the following constraints during I3C SDR transfers:

      +
    • SCL High Period: tDIG_H_MIXED(MIN) to tDIG_H_MIXED(MAX)
      • +
    • SCL Low Period: Up to tDIG_L(MAX)
      • +
    +

    In this case, configure the Extended Bitrate settings for I3C SDR transfers, and use the Standard Bitrate settings for I2C transfers.

    +
    Note
    1. See section 5.1.2.4 in the MIPI I3C Specification v1.0.
    +

    Mixed Slow Bus

    +

    The MIPI I3C Specification v1.0 defines a Mixed Slow Bus as a bus that has legacy I2C devices that do not have a 50ns Spike Filter.

    +

    In this case, the SCL frequency is limited to I2C Fast Mode or I2C Fast Mode Plus.

    +
    Note
    1. See section 5.1.2.4 in the MIPI I3C Specification v1.0.
    +

    +Limitations

    +

    Developers should be aware of the following limitations when using the I3C:

    +
      +
    • The MIPI Reserved area and Vendor Extension area of Command Codes are not supported.
      • +
    • Mixed Fast Bus topology has the following limitation on RA2E2 MCUs. The minimum SCL high period (TDIG_H) is 156 nanoseconds when PCLKD is 48 Mhz, and 120 nanoseconds when PCLKD is 64 Mhz. On a Mixed Fast Bus, the high period TDIG_HIGH_MIXED must be less than 45 nanoseconds in order to ensure that Legacy I2C devices do not interpret I3C signaling as valid I2C signaling (See Table 111 Push-Pull-Timing Parameters in the MIPI I3C Specification v1.1). This required high period cannot be achievable with RA2E2 MCUs.
      • +
    • Secondary Master device role is not currently supported.
      • +
    +

    +Examples

    +

    I3C Master Basic Example

    +

    This is a basic example of minimal use of the I3C Master in an application.

    +
    void i3c_b_master_basic_example (void)
    {
    /* Initializes the module. */
    fsp_err_t status = R_I3C_B_Open(&g_i3c_ctrl, &g_i3c_cfg);
    assert(FSP_SUCCESS == status);
    static i3c_device_cfg_t master_device_cfg =
    {
    /* This is the Static I3C / I2C Legacy address defined by the device manufacturer. */
    .static_address = EXAMPLE_MASTER_STATIC_ADDRESS,
    /* If the device is a main master, it must configure its own dynamic address. */
    .dynamic_address = EXAMPLE_MASTER_DYNAMIC_ADDRESS,
    };
    status = R_I3C_B_DeviceCfgSet(&g_i3c_ctrl, &master_device_cfg);
    assert(FSP_SUCCESS == status);
    static i3c_device_table_cfg_t device_table_cfg =
    {
    /* This is the Static I3C / I2C Legacy address defined by the device manufacturer. */
    .static_address = EXAMPLE_STATIC_ADDRESS,
    /* Dynamic address is not used in I2C. */
    .dynamic_address = EXAMPLE_DYNAMIC_ADDRESS,
    /* This is the type of device. It may be either an I2C device or an I3C device. */
    .device_protocol = I3C_DEVICE_PROTOCOL_I3C,
    .ibi_accept = false,
    /* Depending on the device the IBI requests may have a data payload.
    * Note that this field will be automatically updated if the device is configured using ENTDAA.
    */
    .ibi_payload = false,
    /* Master requests cannot be accepted because Secondary Master is not supported. */
    .master_request_accept = false,
    };
    /* Set the device configuration in the master device table. */
    status = R_I3C_B_MasterDeviceTableSet(&g_i3c_ctrl, 0, &device_table_cfg);
    assert(FSP_SUCCESS == status);
    /* Enable the I3C device. */
    status = R_I3C_B_Enable(&g_i3c_ctrl);
    assert(FSP_SUCCESS == status);
    /* Start assigning dynamic addresses to devices on the bus using the ENTDAA command. */
    status = R_I3C_B_DynamicAddressAssignmentStart(&g_i3c_ctrl, I3C_ADDRESS_ASSIGNMENT_MODE_ENTDAA, 0, 1);
    assert(FSP_SUCCESS == status);
    /* Wait for dynamic address assignment to complete. */
    i3c_b_app_event_wait(I3C_EVENT_ADDRESS_ASSIGNMENT_COMPLETE);
    /* Select the configured device and bitrate mode for the following operations. */
    status = R_I3C_B_DeviceSelect(&g_i3c_ctrl, 0, I3C_B_BITRATE_MODE_I3C_SDR0_STDBR);
    assert(FSP_SUCCESS == status);
    /* Start a write transfer. */
    static uint8_t p_write_buffer[] = {1, 2, 3, 4, 5};
    status = R_I3C_B_Write(&g_i3c_ctrl, p_write_buffer, sizeof(p_write_buffer), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the write transfer to complete. */
    i3c_b_app_event_wait(I3C_EVENT_WRITE_COMPLETE);
    /* Start a read transfer. */
    static uint8_t p_read_buffer[16];
    status = R_I3C_B_Read(&g_i3c_ctrl, p_read_buffer, sizeof(p_read_buffer), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the read transfer to complete. */
    i3c_b_app_event_wait(I3C_EVENT_READ_COMPLETE);
    }
    /* This function is called by the I3C driver from ISRs in order to notify the application of I3C events. */
    void i3c_b_master_basic_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_ENTDAA_ADDRESS_PHASE:
    {
    /* The device PID, DCR, and BCR registers will be available in i3c_callback_args_t::p_slave_info. */
    break;
    }
    case I3C_EVENT_ADDRESS_ASSIGNMENT_COMPLETE:
    {
    i3c_b_app_event_notify(I3C_EVENT_ADDRESS_ASSIGNMENT_COMPLETE);
    break;
    }
    case I3C_EVENT_WRITE_COMPLETE:
    {
    i3c_b_app_event_notify(I3C_EVENT_WRITE_COMPLETE);
    break;
    }
    case I3C_EVENT_READ_COMPLETE:
    {
    /* The number of bytes read from the slave will be available in i3c_callback_args_t::transfer_size. */
    i3c_b_app_event_notify(I3C_EVENT_READ_COMPLETE);
    break;
    }
    default:
    {
    break;
    }
    }
    }

    I3C Slave Basic Example

    +

    This is a basic example of minimal use of the I3C Slave in an application.

    +
    void i3c_b_slave_basic_example (void)
    {
    /* Initializes the module. */
    fsp_err_t status = R_I3C_B_Open(&g_i3c_ctrl, &g_i3c_cfg);
    assert(FSP_SUCCESS == status);
    static i3c_device_cfg_t slave_device_cfg =
    {
    /* This is the Static I3C / I2C Legacy address defined by the device manufacturer. */
    .static_address = EXAMPLE_STATIC_ADDRESS,
    /* The dynamic address will be automatically updated when the master configures this device using ENTDAA. */
    .dynamic_address = 0,
    /* Device Registers that are read by the master. */
    .slave_info =
    {
    .bcr = EXAMPLE_BCR_SETTING,
    .dcr = EXAMPLE_DCR_SETTING,
    .pid =
    {
    0, 1, 2, 3, 4, 5
    }
    }
    };
    /* Set the device configuration for this device. */
    status = R_I3C_B_DeviceCfgSet(&g_i3c_ctrl, &slave_device_cfg);
    assert(FSP_SUCCESS == status);
    /* Enable Slave Mode. */
    status = R_I3C_B_Enable(&g_i3c_ctrl);
    assert(FSP_SUCCESS == status);
    static uint8_t p_read_buffer[EXAMPLE_READ_BUFFER_SIZE];
    static uint8_t p_write_buffer[EXAMPLE_WRITE_BUFFER_SIZE];
    /* Set the buffer for storing data received during a read transfer. */
    status = R_I3C_B_Read(&g_i3c_ctrl, p_read_buffer, sizeof(p_read_buffer), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the master to complete a read transfer. */
    i3c_b_app_event_wait(I3C_EVENT_READ_COMPLETE);
    /* Set the write buffer that will be transmitted during a write transfer. */
    status = R_I3C_B_Write(&g_i3c_ctrl, p_write_buffer, sizeof(p_write_buffer), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the master to complete a write transfer. */
    i3c_b_app_event_wait(I3C_EVENT_WRITE_COMPLETE);
    }
    void i3c_b_slave_basic_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_ADDRESS_ASSIGNMENT_COMPLETE:
    {
    i3c_b_app_event_notify(I3C_EVENT_ADDRESS_ASSIGNMENT_COMPLETE);
    break;
    }
    case I3C_EVENT_READ_BUFFER_FULL:
    {
    /* If there is no user provided read buffer, or if the user provided read buffer has been filled,
    * the driver will notify the application that the buffer is full. The application may provide
    * a new read buffer by calling i3c_b_api_t::read. If no read buffer is provided, then any remaining bytes
    * in the transfer will be dropped. */
    uint8_t * p_read_buffer = i3c_b_app_next_read_buffer_get();
    R_I3C_B_Read(&g_i3c_ctrl, p_read_buffer, EXAMPLE_READ_BUFFER_SIZE, false);
    break;
    }
    case I3C_EVENT_READ_COMPLETE:
    {
    /* The number of bytes read by the slave will be available in i3c_callback_args_t::transfer_size. */
    i3c_b_app_event_notify(I3C_EVENT_READ_COMPLETE);
    /* Note that the application may also call i3c_b_api_t::read or i3c_b_api_t::write from this event
    * In order to set the transfer buffers for the next transfer. */
    break;
    }
    case I3C_EVENT_WRITE_COMPLETE:
    {
    /* The number of bytes written by the slave will be available in i3c_callback_args_t::transfer_size. */
    i3c_b_app_event_notify(I3C_EVENT_WRITE_COMPLETE);
    /* Note that the application may also call i3c_b_api_t::read or i3c_b_api_t::write from this event
    * In order to set the transfer buffers for the next transfer. */
    break;
    }
    default:
    {
    break;
    }
    }
    }

    I2C Legacy Basic Example

    +

    This is a basic example of minimal use of I2C Legacy transfers in an application.

    +
    void i2c_legacy_basic_example (void)
    {
    /* Initializes the module. */
    fsp_err_t status = R_I3C_B_Open(&g_i3c_ctrl, &g_i3c_cfg);
    assert(FSP_SUCCESS == status);
    static i3c_device_cfg_t master_device_cfg =
    {
    /* This is the Static I3C / I2C Legacy address defined by the device manufacturer. */
    .static_address = EXAMPLE_MASTER_STATIC_ADDRESS,
    /* If the device is a main master, it must configure its own dynamic address. */
    .dynamic_address = EXAMPLE_MASTER_DYNAMIC_ADDRESS,
    };
    status = R_I3C_B_DeviceCfgSet(&g_i3c_ctrl, &master_device_cfg);
    assert(FSP_SUCCESS == status);
    static i3c_device_table_cfg_t device_table_cfg =
    {
    /* This is the Static I3C / I2C Legacy address defined by the device manufacturer. */
    .static_address = EXAMPLE_STATIC_ADDRESS,
    /* Dynamic address is not used in I2C. */
    .dynamic_address = 0,
    /* This is the type of device. It may be either an I2C device or an I3C device. */
    .device_protocol = I3C_DEVICE_PROTOCOL_I2C,
    /* These options are not used in I2C. */
    .ibi_accept = false,
    /* Depending on the device the IBI requests may have a data payload.
    * Note that this field will be automatically updated if the device is configured using ENTDAA.
    */
    .ibi_payload = false,
    /* Master requests cannot be accepted because Secondary Master is not supported. */
    .master_request_accept = false,
    };
    /* Set the device configuration in the master device table. */
    status = R_I3C_B_MasterDeviceTableSet(&g_i3c_ctrl, 0, &device_table_cfg);
    assert(FSP_SUCCESS == status);
    /* Enable the I3C device. */
    status = R_I3C_B_Enable(&g_i3c_ctrl);
    assert(FSP_SUCCESS == status);
    /* Select the configured device for the following operations. */
    status = R_I3C_B_DeviceSelect(&g_i3c_ctrl, 0, I3C_B_BITRATE_MODE_I2C_STDBR);
    assert(FSP_SUCCESS == status);
    /* Start a write transfer. */
    static uint8_t p_write_data[] = {1, 2, 3, 4, 5};
    status = R_I3C_B_Write(&g_i3c_ctrl, p_write_data, sizeof(p_write_data), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the write transfer to complete. */
    i3c_b_app_event_wait(I3C_EVENT_WRITE_COMPLETE);
    /* Start a read transfer. */
    static uint8_t p_read_data[16];
    status = R_I3C_B_Read(&g_i3c_ctrl, p_read_data, sizeof(p_read_data), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the read transfer to complete. */
    i3c_b_app_event_wait(I3C_EVENT_READ_COMPLETE);
    }
    void i2c_legacy_basic_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_WRITE_COMPLETE:
    {
    i3c_b_app_event_notify(I3C_EVENT_WRITE_COMPLETE);
    break;
    }
    case I3C_EVENT_READ_COMPLETE:
    {
    /* The number of bytes read from the slave will be available in i3c_callback_args_t::transfer_size. */
    i3c_b_app_event_notify(I3C_EVENT_READ_COMPLETE);
    break;
    }
    default:
    {
    break;
    }
    }
    }

    I3C Master In-band Interrupts Example

    +

    This is a basic example of reading In-band Interrupts in I3C Master mode.

    +
    void i3c_b_master_ibi_basic_example (void)
    {
    static uint8_t p_ibi_read_buffer[EXAMPLE_READ_BUFFER_SIZE];
    /* Set the buffer for storing IBI data that is read from the slave. */
    fsp_err_t status = R_I3C_B_IbiRead(&g_i3c_ctrl, p_ibi_read_buffer, sizeof(p_ibi_read_buffer));
    assert(FSP_SUCCESS == status);
    /* Wait for the ibiRead transfer to complete.
    * Note that the master does not need to wait for the IBI, and can start other operations. */
    i3c_b_app_event_wait(I3C_EVENT_IBI_READ_COMPLETE);
    }
    void i3c_b_master_ibi_basic_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_IBI_READ_BUFFER_FULL:
    {
    /* If there is no user provided ibiRead buffer, or if the user provided ibiRead buffer has been filled,
    * the driver will notify the application that the buffer is full. The application may provide
    * a new read buffer by calling i3c_b_api_t::ibiRead. If no read buffer is provided, then any remaining bytes
    * in the transfer will be dropped. */
    uint8_t * p_read_buffer = i3c_b_app_next_read_buffer_get();
    R_I3C_B_IbiRead(&g_i3c_ctrl, p_read_buffer, EXAMPLE_READ_BUFFER_SIZE);
    break;
    }
    case I3C_EVENT_IBI_READ_COMPLETE:
    {
    /* When an IBI is completed, the transfer_size, ibi_type, and ibi_address will be available in p_args. */
    switch (p_args->ibi_type)
    {
    case I3C_IBI_TYPE_INTERRUPT:
    {
    /* Notify the application that an IBI was read. */
    i3c_b_app_event_notify(I3C_EVENT_IBI_READ_COMPLETE);
    break;
    }
    case I3C_IBI_TYPE_HOT_JOIN:
    {
    /* If a Hot-Join event is received, then the master can initiate the dynamic address assignment procedure. */
    R_I3C_B_DynamicAddressAssignmentStart(&g_i3c_ctrl, I3C_ADDRESS_ASSIGNMENT_MODE_ENTDAA, 0, 1);
    break;
    }
    default:
    {
    break;
    }
    }
    }
    default:
    {
    break;
    }
    }
    }

    I3C Slave In-band Interrupts Example

    +

    This is a basic example of writing In-band Interrupts in I3C Slave mode.

    +
    void i3c_b_slave_ibi_write_basic_example (void)
    {
    uint8_t ibi_write_buffer[EXAMPLE_WRITE_BUFFER_SIZE];
    /* Initiate an In-band interrupt in slave mode.
    * Note: If the slave does not have an IBI payload or if it is a Hot-Join request, the write buffer should be set
    * to NULL and the write length should be set to 0. */
    fsp_err_t status =
    R_I3C_B_IbiWrite(&g_i3c_ctrl, I3C_IBI_TYPE_INTERRUPT, ibi_write_buffer, sizeof(ibi_write_buffer));
    assert(FSP_SUCCESS == status);
    /* Wait for the ibiWrite transfer to complete. */
    i3c_b_app_event_wait(I3C_EVENT_IBI_WRITE_COMPLETE);
    }
    void i3c_b_slave_ibi_write_basic_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_IBI_WRITE_COMPLETE:
    {
    /* Notify the application that the IBI write is complete. */
    i3c_b_app_event_notify(I3C_EVENT_IBI_WRITE_COMPLETE);
    break;
    }
    default:
    {
    break;
    }
    }
    }

    I3C Master Common Command Codes Example

    +

    This is a basic example of sending Common Command Codes in I3C Master mode.

    +
    void i3c_b_master_ccc_example (void)
    {
    static uint8_t command_buffer[EXAMPLE_READ_BUFFER_SIZE];
    /* Setup the command descriptor. */
    static i3c_command_descriptor_t command_descriptor =
    {
    .command_code = I3C_CCC_DIRECT_GETSTATUS,
    /* Set a buffer for storing the data read by the command. */
    .p_buffer = command_buffer,
    /* The length for a GETSTATUS command is 2 bytes. */
    .length = 2,
    /* Terminate the transfer with a STOP condition. */
    .restart = false,
    /* The GETSTATUS command is a Direct Get Command so rnw should be true. */
    .rnw = true,
    };
    /* Send the command. */
    fsp_err_t status = R_I3C_B_CommandSend(&g_i3c_ctrl, &command_descriptor);
    assert(FSP_SUCCESS == status);
    /* Wait for the command to complete. */
    i3c_b_app_event_wait(I3C_EVENT_COMMAND_COMPLETE);
    /* The command_buffer will have the status info that was read from the slave device. */
    }
    void i3c_b_master_ccc_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_COMMAND_COMPLETE:
    {
    /* Notify the application that the command is complete. */
    i3c_b_app_event_notify(I3C_EVENT_COMMAND_COMPLETE);
    break;
    }
    default:
    {
    break;
    }
    }
    }

    I3C Slave Common Command Codes Example

    +

    This is a basic example of receiving Common Command Codes in I3C Slave mode.

    +
    void i3c_b_slave_ccc_example (void)
    {
    static uint8_t read_buffer[EXAMPLE_READ_BUFFER_SIZE];
    /* Broadcast and Direct Set commands will be read into the read_buffer the same way that
    * a normal SDR Master Write / Slave Read transfer is read. */
    fsp_err_t status = R_I3C_B_Read(&g_i3c_ctrl, read_buffer, sizeof(read_buffer), false);
    assert(FSP_SUCCESS == status);
    /* Wait for the command to complete. */
    i3c_b_app_event_wait(I3C_EVENT_COMMAND_COMPLETE);
    }
    void i3c_b_slave_ccc_example_callback (i3c_callback_args_t const * const p_args)
    {
    switch (p_args->event)
    {
    case I3C_EVENT_COMMAND_COMPLETE:
    {
    /* The command code and transfer size will be available in p_args.
    * If the command code is a Broadcast or Direct Set, then data will
    * be stored in the read buffer provided by i3c_b_api_t::read.
    * If the command code is a Direct Get, then the data will be automatically
    * sent from device SFR. */
    i3c_b_app_event_notify(I3C_EVENT_COMMAND_COMPLETE);
    break;
    }
    default:
    {
    break;
    }
    }
    }
    + + + + + + + + + + + + + +

    +Data Structures

    struct  i3c_b_clock_stalling_t
     
    struct  i3c_b_bitrate_settings_t
     
    struct  i3c_b_ibi_control_t
     
    struct  i3c_b_slave_command_response_info_t
     
    struct  i3c_b_instance_ctrl_t
     
    struct  i3c_b_extended_cfg_t
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Macros

    #define I3C_B_ERROR_RECOVERY_VERSION_1
     Support error recovery procedure for chip version 1. More...
     
    +#define I3C_B_ERROR_RECOVERY_VERSION_2
     Support error recovery procedure for chip version 2.
     
    +#define I3C_B_ERROR_RECOVERY_VERSION_BOTH
     Support error recovery procedure for chip version 1 and version 2.
     
    #define I3C_B_DEVICE_INDEX_EXTENDED_DEVICE
     
    #define I3C_B_EVENT_STATUS_SUCCESS
     The transfer was completed as expected. More...
     
    +#define I3C_B_EVENT_STATUS_PARITY
     A parity error was detected.
     
    +#define I3C_B_EVENT_STATUS_FRAME
     A frame error was detected.
     
    +#define I3C_B_EVENT_STATUS_ADDRESS_HEADER
     An Address Header error wasdetected.
     
    +#define I3C_B_EVENT_STATUS_NACK
     The transfer was NACK'd.
     
    +#define I3C_B_EVENT_STATUS_OVERFLOW
     A Receive FIFO overflow or Transmit FIFO underflow occurred.
     
    +#define I3C_B_EVENT_STATUS_ABORTED_TO_MASTER
     In slave mode, the write transfer was ended via the 'T' bit.
     
    +#define I3C_B_EVENT_STATUS_ABORTED
     In master mode, the transfer was aborted.
     
    +#define I3C_B_EVENT_STATUS_IBI_NACK_DISABLED
     An IBI was NACK'd and the a DISEC command was sent.
     
    + + + + + + + + + +

    +Enumerations

    enum  i3c_b_bitrate_mode_t
     
    enum  i3c_b_activity_state_t
     
    enum  i3c_b_data_rate_setting_t
     
    enum  i3c_b_clock_data_turnaround_t
     
    +

    Data Structure Documentation

    + +

    ◆ i3c_b_clock_stalling_t

    + +
    +
    + + + + +
    struct i3c_b_clock_stalling_t
    +
    +

    Clock stalling settings.

    +
    + + + + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +assigned_address_phase_enable: 1 +Enable Clock Stalling during the address phase of the ENTDAA command.
    +uint32_t +transition_phase_enable: 1 +Enable Clock Stalling during the transition bit in read transfers.
    +uint32_t +parity_phase_enable: 1 +Enable Clock Stalling during the parity bit period in write transfers.
    +uint32_t +ack_phase_enable: 1 +Enable Clock Stalling during the ACK/NACK phase.
    +uint16_t +clock_stalling_time +The amount of time to stall the clock in I3C source clock ticks.
    + +
    +
    + +

    ◆ i3c_b_bitrate_settings_t

    + +
    +
    + + + + +
    struct i3c_b_bitrate_settings_t
    +
    +

    Bitrate settings for configuring the SCL clock frequency.

    +
    + + + + + + + + + + +
    Data Fields
    +uint32_t +stdbr +The standard bitrate settings.
    +uint32_t +extbr +The extended bitrate settings.
    +i3c_b_clock_stalling_t +clock_stalling +

    Clock Stalling settings (See Master Clock Stalling in the MIPI I3C Specification v1.0).

    +
    + +
    +
    + +

    ◆ i3c_b_ibi_control_t

    + +
    +
    + + + + +
    struct i3c_b_ibi_control_t
    +
    +

    Settings for controlling the drivers behavior in response to IBIs.

    +
    + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +hot_join_acknowledge: 1 +If false, NACK all Hot Join requests.
    +uint32_t +notify_rejected_hot_join_requests: 1 +Notify the application when an IBI Hot-Join request has been NACK'd.
    +uint32_t +notify_rejected_mastership_requests: 1 +Notify the application when an IBI Mastership request has been NACK'd.
    +uint32_t +notify_rejected_interrupt_requests: 1 +Notify the application when an IBI Interrupt request has been NACK'd.
    + +
    +
    + +

    ◆ i3c_b_slave_command_response_info_t

    + +
    +
    + + + + +
    struct i3c_b_slave_command_response_info_t
    +
    +

    Default configuration settings for the slave response to Direct Get Common Command Codes.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +bool +inband_interrupt_enable +Enable IBI interrupts.

    Slave Event Settings (See ENEC and DISEC in the MIPI I3C Specification v1.0).

    +
    +bool +mastership_request_enable +Enable Mastership requests.
    +bool +hotjoin_request_enable +Enable Hot-Join requests.
    +i3c_b_activity_state_t +activity_state +

    Starting Activity State (See ENTASn in the MIPI I3C Specification v1.0).

    +
    +uint16_t +write_length +

    Max Write Length (See SETMWL and GETMWL in the MIPI I3C Specification v1.0).

    +
    +uint16_t +read_length +

    Max Read Length (See SETMRL and GETMRL in the MIPI I3C Specification v1.0).

    +
    +uint8_t +ibi_payload_length +

    Number of bytes that will be written by an IBI (See SETMRL and GETMRL in the MIPI I3C Specification v1.0).

    +
    +i3c_b_data_rate_setting_t +write_data_rate +Max Write Data Rate.

    Max Data Rate Settings (See GETMXDS in the MIPI I3C Specification v1.0).

    +
    +i3c_b_data_rate_setting_t +read_data_rate +Max Read Data Rate.
    +i3c_b_clock_data_turnaround_t +clock_data_turnaround +Max Data Speed Turnaround.
    +bool +read_turnaround_time_enable +Enable transmission of the of the Max Read Max Read Turnaround Time.
    +uint32_t +read_turnaround_time +Max Read Turnaround Time.
    +uint8_t +oscillator_frequency +

    This byte represents the Slave’s internal oscillator frequency in increments of 0.5 MHz (500kHz), up to 127.5 MHz. (See GETXTIME in the MIPI I3C Specification v1.1).

    +
    +uint8_t +oscillator_inaccuracy +

    Oscillator inaccuracy in 0.5% increments of 0% up to 25.5% (See GETXTIME in the MIPI I3C Specification v1.1).

    +
    + +
    +
    + +

    ◆ i3c_b_instance_ctrl_t

    + +
    +
    + + + + +
    struct i3c_b_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when i3c_api_t::open is called.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Public Member Functions

    +i3c_slave_info_t current_slave_info BSP_ALIGN_VARIABLE (4)
     The last i3c_slave_info_t read during ENTDAA.
     

    Data Fields

    +uint32_t open
     Indicates whether the open() API has been successfully called.
     
    +R_I3C_B0_Type * p_reg
     Base register for this channel.
     
    +volatile uint32_t internal_state
     Used to track the current state of the driver.
     
    +uint8_t current_command_code
     The current Common Command Code that is being transferred.
     
    +uint32_t device_index
     The device index selected using i3c_api_t::deviceSelect.
     
    +i3c_b_bitrate_mode_t device_bitrate_mode
     Runtime bitrate settings to use for the next transfer.
     
    +uint32_t next_word
     The next word that will be written to the FIFO.
     
    +uint32_t ibi_next_word
     The next word that will be written to the IBI FIFO.
     
    +i3c_b_write_buffer_descriptor_t write_buffer_descriptor
     Buffer descriptor for keeping track of a write transfer.
     
    +i3c_b_read_buffer_descriptor_t read_buffer_descriptor
     Buffer descriptor for keeping track of a read transfer.
     
    +i3c_b_read_buffer_descriptor_t ibi_buffer_descriptor
     Buffer descriptor for keeping track of an IBI read/write transfer.
     
    +volatile uint32_t read_transfer_count_final
     The total number of bytes read during a read transfer.
     
    +volatile uint32_t ibi_transfer_count_final
     The total number of bytes read during an IBI transfer.
     
    +i3c_cfg_t const * p_cfg
     A pointer to the configuration structure provided during open.
     
    + +
    +
    + +

    ◆ i3c_b_extended_cfg_t

    + +
    +
    + + + + +
    struct i3c_b_extended_cfg_t
    +
    +

    Extended configuration for r_i3c_b.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +i3c_b_bitrate_settings_t +bitrate_settings +Bitrate settings configuring the frequency and duty cycle for SCL.
    +i3c_b_ibi_control_t +ibi_control +Configure the driver's behavior in response to IBIs.
    +uint32_t +bus_free_detection_time +

    The time in I3C reference clock ticks needed in order to detect the bus free condition (See "Bus Free Condition" in the MIPI I3C Specification v1.0).

    +
    +uint32_t +bus_available_detection_time +

    The time in I3C reference clock ticks needed in order to detect the bus available condition (See "Bus Available Condition" in the MIPI I3C Specification v1.0).

    +
    +uint32_t +bus_idle_detection_time +

    The time in I3C reference clock ticks needed in order to detect the bus idle condition (See "Bus Idle Condition" in the MIPI I3C Specification v1.0).

    +
    +bool +timeout_detection_enable +Notify the application if SCL is stuck high or low.
    +i3c_b_slave_command_response_info_t +slave_command_response_info +

    Initial settings for configuring the slave's responses to received commands.

    +
    +IRQn_Type +resp_irq +Response Queue Full IRQ number.
    +IRQn_Type +rx_irq +Receive FIFO Full IRQ number.
    +IRQn_Type +tx_irq +Transmit FIFO Empty IRQ number.
    +IRQn_Type +rcv_irq +Receive Status Queue Full IRQ number.
    +IRQn_Type +ibi_irq +IBI IRQ number.
    +IRQn_Type +st_irq +Start condition IRQ Number.
    +IRQn_Type +sp_irq +Stop condition IRQ Number.
    +IRQn_Type +tmo_irq +Timeout IRQ Number.
    +IRQn_Type +ierr_irq +Non-recoverable internal error IRQ Numbe.
    +IRQn_Type +terr_irq +Transfer Error IRQ Number.
    +IRQn_Type +abort_irq +Transfer Abort IRQ Number.
    +IRQn_Type +wu_irq +Wake-up IRQ Number.
    +uint8_t +ipl +Interrupt Priority for Resp, Rx, Tx, and RCV IRQs.
    +uint8_t +eei_ipl +Error and Event Interrupt Priority.
    + +
    +
    +

    Macro Definition Documentation

    + +

    ◆ I3C_B_ERROR_RECOVERY_VERSION_1

    + +
    +
    + + + + +
    #define I3C_B_ERROR_RECOVERY_VERSION_1
    +
    + +

    Support error recovery procedure for chip version 1.

    +

    There are two different versions of the RA2E2 MCU and the error recovery procedure is different for each version.

    + +
    +
    + +

    ◆ I3C_B_DEVICE_INDEX_EXTENDED_DEVICE

    + +
    +
    + + + + +
    #define I3C_B_DEVICE_INDEX_EXTENDED_DEVICE
    +
    +

    Index for selecting the device defined in the extended address table.

    + +
    +
    + +

    ◆ I3C_B_EVENT_STATUS_SUCCESS

    + +
    +
    + + + + +
    #define I3C_B_EVENT_STATUS_SUCCESS
    +
    + +

    The transfer was completed as expected.

    +

    Event Status Provided by the callback.

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ i3c_b_bitrate_mode_t

    + +
    +
    + + + + +
    enum i3c_b_bitrate_mode_t
    +
    +

    Bitrate settings that can be selected at run-time using i3c_api_t::deviceSelect.

    + + + + + + + + +
    Enumerator
    I3C_B_BITRATE_MODE_I2C_STDBR 

    Use the period settings defined in STDBRH/L.

    +
    I3C_B_BITRATE_MODE_I2C_EXTBR 

    Use the period settings defined in EXTBRH/L.

    +
    I3C_B_BITRATE_MODE_I3C_SDR0_STDBR 

    Use the period settings defined in STDBRH/L (I3C Devices only).

    +
    I3C_B_BITRATE_MODE_I3C_SDR1_EXTBR 

    Use the period settings defined in EXTBRH/L (I3C Devices only).

    +
    I3C_B_BITRATE_MODE_I3C_SDR2_STDBR_X2 

    Use the period settings defined in STDBRH/L x 2 (I3C Devices only).

    +
    I3C_B_BITRATE_MODE_I3C_SDR3_EXTBR_X2 

    Use the period settings defined in EXTBRH/L x 2 (I3C Devices only).

    +
    I3C_B_BITRATE_MODE_I3C_SDR4_EXTBR_X4 

    Use the period settings defined in EXTBRH/L x 4 (I3C Devices only).

    +
    + +
    +
    + +

    ◆ i3c_b_activity_state_t

    + +
    +
    + + + + +
    enum i3c_b_activity_state_t
    +
    +

    Supported activity states for ENTASn Command (See ENTASn in the MIPI I3C Specification v1.0).

    + + + + + +
    Enumerator
    I3C_B_ACTIVITY_STATE_ENTAS0 

    Activity Interval (1 microsecond).

    +
    I3C_B_ACTIVITY_STATE_ENTAS1 

    Activity Interval (100 microseconds).

    +
    I3C_B_ACTIVITY_STATE_ENTAS2 

    Activity Interval (2 milliseconds).

    +
    I3C_B_ACTIVITY_STATE_ENTAS3 

    Activity Interval (50 milliseconds).

    +
    + +
    +
    + +

    ◆ i3c_b_data_rate_setting_t

    + +
    +
    + + + + +
    enum i3c_b_data_rate_setting_t
    +
    +

    Maximum Sustained Data Rate for non-CCC messages sent by Master Device to Slave Device (See GETMXDS in the MIPI I3C Specification v1.0).

    + + + + + + +
    Enumerator
    I3C_B_DATA_RATE_SETTING_FSCL_MAX 

    There is no data rate limit.

    +
    I3C_B_DATA_RATE_SETTING_8MHZ 

    The max sustained data rate is 8 Mhz.

    +
    I3C_B_DATA_RATE_SETTING_6MHZ 

    The max sustained data rate is 6 Mhz.

    +
    I3C_B_DATA_RATE_SETTING_4MHZ 

    The max sustained data rate is 4 Mhz.

    +
    I3C_B_DATA_RATE_SETTING_2MHZ 

    The max sustained data rate is 2 Mhz.

    +
    + +
    +
    + +

    ◆ i3c_b_clock_data_turnaround_t

    + +
    +
    + + + + +
    enum i3c_b_clock_data_turnaround_t
    +
    +

    Clock to Data Turnaround Time (See GETMXDS in the MIPI I3C Specification v1.0).

    + + + + + + + +
    Enumerator
    I3C_B_CLOCK_DATA_TURNAROUND_8NS 

    Clock to turnaround time is 8 nanoseconds or less.

    +
    I3C_B_CLOCK_DATA_TURNAROUND_9NS 

    Clock to turnaround time is 9 nanoseconds or less.

    +
    I3C_B_CLOCK_DATA_TURNAROUND_10NS 

    Clock to turnaround time is 10 nanoseconds or less.

    +
    I3C_B_CLOCK_DATA_TURNAROUND_11NS 

    Clock to turnaround time is 11 nanoseconds or less.

    +
    I3C_B_CLOCK_DATA_TURNAROUND_12NS 

    Clock to turnaround time is 12 nanoseconds or less.

    +
    I3C_B_CLOCK_DATA_TURNAROUND_EXTENDED 

    Clock to turnaround time is greater than 12 nanoseconds.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_I3C_B_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_Open (i3c_ctrl_t *const p_api_ctrl,
    i3c_cfg_t const *const p_cfg 
    )
    +
    +

    Configure an I3C_B instance. Implements i3c_api_t::open.

    +
    Return values
    + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was invalid.
    FSP_ERR_ALREADY_OPENOpen has already been called for this instance.
    FSP_ERR_UNSUPPORTEDA selected feature is not supported with the current configuration.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_Enable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_I3C_B_Enable (i3c_ctrl_t *const p_api_ctrl)
    +
    +

    Enable the I3C device.

    +
    Return values
    + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_INVALID_MODEThis instance is already enabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_DeviceCfgSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_DeviceCfgSet (i3c_ctrl_t *const p_api_ctrl,
    i3c_device_cfg_t const *const p_device_cfg 
    )
    +
    +

    Set the configuration for this device.

    +
    Return values
    + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_UNSUPPORTEDThe device cannot be a secondary master if master support is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_MasterDeviceTableSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_MasterDeviceTableSet (i3c_ctrl_t *const p_api_ctrl,
    uint32_t device_index,
    i3c_device_table_cfg_t const *const p_device_table_cfg 
    )
    +
    +

    Configure an entry in the master device table. This function is called in master mode in order to configure the devices on the I3C bus. It may also be called in slave mode when the slave receives the DEFSVLS command.

    +
    Return values
    + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_UNSUPPORTEDMastership requests must be rejected is slave support is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_SlaveStatusSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_SlaveStatusSet (i3c_ctrl_t *const p_api_ctrl,
    i3c_device_status_t status 
    )
    +
    +

    Set the status returned to the master in response to a GETSTATUS command.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_INVALID_MODEThe instance is not in slave mode.
    FSP_ERR_UNSUPPORTEDSlave support is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_DeviceSelect()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_DeviceSelect (i3c_ctrl_t *const p_api_ctrl,
    uint32_t device_index,
    uint32_t bitrate_mode 
    )
    +
    +

    In master mode, select the device for the next transfer. This function is not used in slave mode.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_INVALID_MODEThis operation is prohibited in slave mode.
    FSP_ERR_UNSUPPORTEDMaster support is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_DynamicAddressAssignmentStart()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_DynamicAddressAssignmentStart (i3c_ctrl_t *const p_api_ctrl,
    i3c_address_assignment_mode_t address_assignment_mode,
    uint32_t starting_device_index,
    uint32_t device_count 
    )
    +
    +

    Start the Dynamic Address Assignment Process. Implements i3c_api_t::dynamicAddressAssignmentStart.

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL or invalid.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_INVALID_MODEThis operation is prohibited in slave mode.
    FSP_ERR_IN_USEThe operation could not be completed because the driver is busy.
    FSP_ERR_UNSUPPORTEDMaster support is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_CommandSend()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_CommandSend (i3c_ctrl_t *const p_api_ctrl,
    i3c_command_descriptor_t * p_command_descriptor 
    )
    +
    +

    Send a broadcast or direct command to slave devices on the bus. Implements i3c_api_t::commandSend.

    +
    Return values
    + + + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_IN_USEThe operation could not be completed because the driver is busy.
    FSP_ERR_INVALID_MODEThis driver is not in master mode.
    FSP_ERR_INVALID_ALIGNMENTThe buffer must be aligned to 4 bytes. If it is a read operation, the length also be a multiple of 4 bytes.
    FSP_ERR_UNSUPPORTEDMaster support must be enabled to call this function. Slave support must be enabled when sending the GETACCMST command.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_Write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_Write (i3c_ctrl_t *const p_api_ctrl,
    uint8_t const *const p_data,
    uint32_t length,
    bool restart 
    )
    +
    +

    Set the write buffer for the transfer. In master mode, start the transfer. When the transfer is completed send a stop condition or a repeated-start. Implements i3c_api_t::write.

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_IN_USEThe operation could not be completed because the driver is busy.
    FSP_ERR_INVALID_MODEThis driver is disabled.
    FSP_ERR_INVALID_ALIGNMENTThe buffer must be aligned to 4 bytes.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_Read (i3c_ctrl_t *const p_api_ctrl,
    uint8_t *const p_data,
    uint32_t length,
    bool restart 
    )
    +
    +

    Set the read buffer for the transfer. In master mode, start the transfer. When the transfer is completed send a stop condition or a repeated-start. Implements i3c_api_t::read.

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_IN_USEThe operation could not be completed because the driver is busy.
    FSP_ERR_INVALID_MODEThis driver is disabled.
    FSP_ERR_INVALID_ALIGNMENTThe buffer must be aligned to 4 bytes and the length must be a multiple of 4 bytes.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_IbiWrite()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_IbiWrite (i3c_ctrl_t *const p_api_ctrl,
    i3c_ibi_type_t ibi_type,
    uint8_t const *const p_data,
    uint32_t length 
    )
    +
    +

    Initiate an IBI write operation (This function is only used in slave mode).

    +
    Return values
    + + + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_IN_USEThe operation could not be completed because the driver is busy.
    FSP_ERR_INVALID_MODEThis function is only called in slave mode.
    FSP_ERR_INVALID_ALIGNMENTThe buffer must be aligned to 4 bytes.
    FSP_ERR_UNSUPPORTEDSlave supoprt is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_IbiRead()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_I3C_B_IbiRead (i3c_ctrl_t *const p_api_ctrl,
    uint8_t *const p_data,
    uint32_t length 
    )
    +
    +

    Set the read buffer for storing received IBI data (This function is only used in master mode).

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    FSP_ERR_INVALID_MODEThis function is only called in master mode.
    FSP_ERR_INVALID_ALIGNMENTThe buffer must be aligned to 4 bytes and the length must be a multiple of 4 bytes.
    FSP_ERR_UNSUPPORTEDMaster support is disabled.
    +
    +
    + +
    +
    + +

    ◆ R_I3C_B_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_I3C_B_Close (i3c_ctrl_t *const p_api_ctrl)
    +
    +

    Close the I3C instance. Implements i3c_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONAn argument was NULL.
    FSP_ERR_NOT_OPENThis instance has not been opened yet.
    +
    +
    + +
    +
    +
    +
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b/group___i_n_t_c___i_r_q.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: External IRQ (r_intc_irq) +RZV Flexible Software Package Documentation: External IRQ (r_intc_irq) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -112,10 +180,10 @@
     

    Detailed Description

    -

    Driver for the INTC_IRQ peripheral on RZ/V2L. This module implements the External IRQ Interface.

    +

    Driver for the INTC_IRQ peripheral on RZ MPUs. This module implements the External IRQ Interface.

    Overview

    -

    The Interrupt Controller controls which event signals are linked to the NVIC module. The R_INTC_IRQ software module only implements the External IRQ Interface. The interface is for configuring interrupts to fire when a trigger condition is detected on an external IRQ pin.

    +

    The Interrupt Controller controls which event signals are linked to the NVIC module (CM33) or GIC module (CR8). The R_INTC_IRQ software module only implements the External IRQ Interface. The interface is for configuring interrupts to fire when a trigger condition is detected on an external IRQ pin.

    Note
    Multiple instances are used when more than one external interrupt is needed. Configure each instance with different channels and properties as needed for the specific interrupt.

    Features

    @@ -153,7 +221,7 @@

    Configurations for Input > External IRQ Driver on r_intc_irq

    NameName must be a valid C symbolg_external_irq0 Module name. -ChannelValue must be an integer between 0 and 70 Specify the hardware channel. +ChannelValue must be an positive integer0 Specify the hardware channel. Trigger
    • @@ -167,6 +235,8 @@

      Configurations for Input > External IRQ Driver on r_intc_irq

    Rising Select the signal edge or state that triggers an interrupt. +External pin interrupt detection typeMCU Specific OptionsSelect the External pin interrupt detection type of interrupt controller. + CallbackName must be a valid C symbolNULL A user callback function can be provided here. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the IRQn triggers Pin Interrupt PriorityValue must be an integer between 0 and 25512 Select the PIN interrupt priority(0-255). Note: If you specify the lowest priority (i.e.,255), no interrupt will occur. @@ -277,8 +347,7 @@

    FSP_ERR_ALREADY_OPENThe channel specified has already been opened. No configurations were changed. Call the associated Close function to reconfigure the channel. - FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel requested in p_cfg is not available on the device selected in r_bsp_cfg.h. - FSP_ERR_INVALID_ARGUMENTp_cfg->p_callback is not NULL, but ISR is not enabled. ISR must be enabled to use callback function. + FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel requested in p_cfg is not available on the device selected in r_bsp_cfg.h. @@ -425,7 +494,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___i_n_t_c___n_m_i.html b/group___i_n_t_c___n_m_i.html new file mode 100644 index 0000000..89f1953 --- /dev/null +++ b/group___i_n_t_c___n_m_i.html @@ -0,0 +1,493 @@ + + + + + + + +RZV Flexible Software Package Documentation: External IRQ (r_intc_nmi) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    External IRQ (r_intc_nmi)
    Modules » Input
    +
    +
    + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_INTC_NMI_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl, external_irq_cfg_t const *const p_cfg)
     
    fsp_err_t R_INTC_NMI_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_INTC_NMI_ExternalIrqDisable (external_irq_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_INTC_NMI_ExternalIrqCallbackSet (external_irq_ctrl_t *const p_api_ctrl, void(*p_callback)(external_irq_callback_args_t *), void const *const p_context, external_irq_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_INTC_NMI_ExternalIrqClose (external_irq_ctrl_t *const p_api_ctrl)
     
    +

    Detailed Description

    +

    Driver for the INTC_NMI peripheral on RZ MPUs. This module implements the External IRQ Interface.

    +

    +Overview

    +

    The Interrupt Controller controls which event signals are linked to the NVIC module (CM33) or GIC module (CR8). The R_INTC_NMI software module only implements the External IRQ Interface.The interface is for configuring interrupts to fire when a trigger condition is detected on a NMI pin.

    +
    Note
    Multiple instances are used when more than one external interrupt is needed. Configure each instance with different channels and properties as needed for the specific interrupt.
    +

    +Features

    +

      +
    • Supports configuring interrupts for NMI.
        +
      • Enabling and disabling interrupt generation.
        • +
      • Configuring interrupt trigger on falling edge, or rising edge.
        • +
      +
      • +
    • Supports configuring a user callback function, which will be invoked by the HAL module when a NMI pin interrupt is generated.
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_intc_nmi

    +The following build time configurations are defined in fsp_cfg/r_intc_nmi_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Input > External IRQ Driver on r_intc_nmi

    +This module can be added to the Stacks tab via New Stack > Input > External IRQ Driver on r_intc_nmi.
    +

    + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_external_irq0 Module name.
    Trigger
      +
    • +Falling
      • +
    • +Rising
      • +
    +    		Rising Select the signal edge or state that triggers an interrupt.
    CallbackName must be a valid C symbolNULL A user callback function can be provided here. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the IRQn triggers
    Pin Interrupt PriorityValue must be an integer between 0 and 25512 Select the PIN interrupt priority(0-255). Note: If you specify the lowest priority (i.e.,255), no interrupt will occur.
    +

    +

    +Clock Configuration

    +

    The INTC_NMI peripheral module doesn't require any specific clock settings.

    +

    +Pin Configuration

    +

    The pin for the external interrupt channel must be configured as an input with NMI Input Enabled.

    +

    Limitation

    +

    Pin configuration does not show conflicts when same NMI is used by multiple pins.

    +

    +Usage Notes

    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the INTC_NMI in an application.

    +
    /* Called from r_intc_nmi_isr */
    void external_irq_callback (external_irq_callback_args_t * p_args)
    {
    (void) p_args;
    g_external_irq_complete = 1;
    }
    void simple_example ()
    {
    /* Example Configuration */
    external_irq_cfg_t g_external_irq_cfg =
    {
    .channel = 0,
    .trigger = EXTERNAL_IRQ_TRIG_RISING,
    .filter_enable = false,
    .pclk_div = EXTERNAL_IRQ_PCLK_DIV_BY_1,
    .p_callback = external_irq_callback,
    .p_context = 0,
    .ipl = 24,
    .irq = NMI_IRQn,
    };
    /* Configure the external interrupt. */
    fsp_err_t err = R_INTC_NMI_ExternalIrqOpen(&g_external_irq_ctrl, &g_external_irq_cfg);
    assert(FSP_SUCCESS == err);
    /* Enable the external interrupt. */
    err = R_INTC_NMI_ExternalIrqEnable(&g_external_irq_ctrl);
    assert(FSP_SUCCESS == err);
    while (0 == g_external_irq_complete)
    {
    /* Wait for interrupt. */
    }
    }
    + + + +

    +Data Structures

    struct  intc_nmi_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ intc_nmi_instance_ctrl_t

    + +
    +
    + + + + +
    struct intc_nmi_instance_ctrl_t
    +
    +

    INTC_NMI private control block. DO NOT MODIFY. Initialization occurs when R_INTC_NMI_ExternalIrqOpen is called.

    +
    + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Used to determine if channel control block is in use.
     
    +IRQn_Type irq
     NVIC Interrupt number.
     
    +uint8_t channel
     Channel.
     
    void const * p_context
     
    +

    Field Documentation

    + +

    ◆ p_context

    + +
    +
    + + + + +
    void const* intc_nmi_instance_ctrl_t::p_context
    +
    +

    Placeholder for user data. Passed to the user callback in external_irq_callback_args_t.

    + +
    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_INTC_NMI_ExternalIrqOpen()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_INTC_NMI_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl,
    external_irq_cfg_t const *const p_cfg 
    )
    +
    +

    Configure a NMI pin for use with the external interrupt interface. Implements external_irq_api_t::open.

    +

    The Open function is responsible for preparing a NMI pin for operation.

    +
    Return values
    + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONOne of the following is invalid:
      +
    • p_ctrl or p_cfg is NULL.
      • +
    +
    FSP_ERR_ALREADY_OPENThe channel specified has already been opened. No configurations were changed. Call the associated Close function to reconfigure the channel.
    FSP_ERR_INVALID_ARGUMENTp_cfg->trigger is invalid.
    +
    +
    +
    Note
    This function is reentrant for different channels. It is not reentrant for the same channel.
    + +
    +
    + +

    ◆ R_INTC_NMI_ExternalIrqEnable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_INTC_NMI_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)
    +
    +

    Enable external interrupt for specified channel at NVIC. Implements external_irq_api_t::enable.

    +
    Return values
    + + + + + +
    FSP_SUCCESSInterrupt Enabled successfully.
    FSP_ERR_ASSERTIONThe p_ctrl parameter was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    FSP_ERR_IRQ_BSP_DISABLEDRequested IRQ is not defined in this system.
    +
    +
    + +
    +
    + +

    ◆ R_INTC_NMI_ExternalIrqDisable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_INTC_NMI_ExternalIrqDisable (external_irq_ctrl_t *const p_api_ctrl)
    +
    +

    Disable external interrupt for specified channel at NVIC. Implements external_irq_api_t::disable.

    +
    Return values
    + + + + + +
    FSP_SUCCESSInterrupt disabled successfully.
    FSP_ERR_ASSERTIONThe p_ctrl parameter was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    FSP_ERR_IRQ_BSP_DISABLEDRequested IRQ is not defined in this system.
    +
    +
    + +
    +
    + +

    ◆ R_INTC_NMI_ExternalIrqCallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_INTC_NMI_ExternalIrqCallbackSet (external_irq_ctrl_t *const p_api_ctrl,
    void(*)(external_irq_callback_args_t *) p_callback,
    void const *const p_context,
    external_irq_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements external_irq_api_t::callbackSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_INTC_NMI_ExternalIrqClose()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_INTC_NMI_ExternalIrqClose (external_irq_ctrl_t *const p_api_ctrl)
    +
    +

    Close the external interrupt channel. Implements external_irq_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSSuccessfully closed.
    FSP_ERR_ASSERTIONThe parameter p_ctrl is NULL.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___i_n_t_c___n_m_i.js b/group___i_n_t_c___n_m_i.js new file mode 100644 index 0000000..937d7df --- /dev/null +++ b/group___i_n_t_c___n_m_i.js @@ -0,0 +1,14 @@ +var group___i_n_t_c___n_m_i = +[ + [ "intc_nmi_instance_ctrl_t", "group___i_n_t_c___n_m_i.html#structintc__nmi__instance__ctrl__t", [ + [ "open", "group___i_n_t_c___n_m_i.html#a4f439c63a9660ded18be6210ad5c61f1", null ], + [ "irq", "group___i_n_t_c___n_m_i.html#afbc0c2d0c28a1e1b6659add5e1d906a8", null ], + [ "channel", "group___i_n_t_c___n_m_i.html#affbe014faf25330d8d3f2d8692dc7ef6", null ], + [ "p_context", "group___i_n_t_c___n_m_i.html#af0208db3467f67a11f7bfe085a79708e", null ] + ] ], + [ "R_INTC_NMI_ExternalIrqOpen", "group___i_n_t_c___n_m_i.html#ga22b4030a01652c42e160e109c5772beb", null ], + [ "R_INTC_NMI_ExternalIrqEnable", "group___i_n_t_c___n_m_i.html#ga037bcbc05ae66d3cab50fcc159f04d52", null ], + [ "R_INTC_NMI_ExternalIrqDisable", "group___i_n_t_c___n_m_i.html#ga213e64c8943eae69a17b77273c459ff2", null ], + [ "R_INTC_NMI_ExternalIrqCallbackSet", "group___i_n_t_c___n_m_i.html#ga52b9b9595c41fcfef9abf3ed0dc05a14", null ], + [ "R_INTC_NMI_ExternalIrqClose", "group___i_n_t_c___n_m_i.html#ga87b6b8010db2fcb6e7e9de9e42b5306a", null ] +]; \ No newline at end of file diff --git a/group___i_n_t_c___t_i_n_t.html b/group___i_n_t_c___t_i_n_t.html new file mode 100644 index 0000000..c3e7b2a --- /dev/null +++ b/group___i_n_t_c___t_i_n_t.html @@ -0,0 +1,587 @@ + + + + + + + +RZV Flexible Software Package Documentation: External IRQ (r_intc_tint) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Typedefs | +Enumerations
    +
    +
    External IRQ (r_intc_tint)
    Modules » Input
    +
    +
    + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_INTC_TINT_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl, external_irq_cfg_t const *const p_cfg)
     
    fsp_err_t R_INTC_TINT_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_INTC_TINT_ExternalIrqDisable (external_irq_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_INTC_TINT_ExternalIrqCallbackSet (external_irq_ctrl_t *const p_api_ctrl, void(*p_callback)(external_irq_callback_args_t *), void const *const p_context, external_irq_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_INTC_TINT_ExternalIrqClose (external_irq_ctrl_t *const p_api_ctrl)
     
    +

    Detailed Description

    +

    Driver for the Interrupt Controller peripheral on RZ MPUs. This module implements the External IRQ Interface.

    +

    +Overview

    +

    The Interrupt Controller controls which event signals are linked to the NVIC module (CM33) or GIC module (CR8). The R_INTC_TINT software module only implements the External IRQ Interface. The interface is for configuring interrupts to fire when a trigger condition is detected on a TINT pin.

    +
    Note
    Multiple instances are used when more than one external interrupt is needed. Configure each instance with different channels and properties as needed for the specific interrupt.
    +

    +Features

    +

      +
    • Supports configuring interrupts for TINT.
      • +
    • Enabling and disabling interrupt generation.
      • +
    • Configuring interrupt trigger on rising edge, falling edge, low level, or high level signal.
      • +
    • Supports configuring a user callback function, which will be invoked by the HAL module when a TINT pin interrupt is generated.
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_intc_tint

    +The following build time configurations are defined in fsp_cfg/r_intc_tint_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Input > External IRQ Driver on r_intc_tint

    +This module can be added to the Stacks tab via New Stack > Input > External IRQ Driver on r_intc_tint.
    +

    + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_external_irq0 Module name.
    ChannelValue must be an integer between 0 and 310 Specify the hardware channel.
    P TINT Mapping GPIO PinMCU Specific OptionsSpecify the P TINT mapping GPIO pin.
    Trigger
      +
    • +Rising
      • +
    • +Falling
      • +
    • +High Level
      • +
    • +Low Level
      • +
    +    		Rising Select the signal edge or state that triggers an interrupt.
    TINT interrupt detection typeMCU Specific OptionsSelect the TINT interrupt detection type of interrupt controller.
    CallbackName must be a valid C symbolNULL A user callback function can be provided here. If this callback function is provided, it is called from the interrupt service routine (ISR) each time the IRQn triggers
    Pin Interrupt PriorityValue must be an integer between 0 and 25512 Select the PIN interrupt priority(0-255). Note: If you specify the lowest priority (i.e.,255), no interrupt will occur.
    +

    +

    +Clock Configuration

    +

    The INTC_TINT peripheral module doesn't require any specific clock settings.

    +

    +Pin Configuration

    +

    The pin for the external interrupt channel must be configured as an input with TINT Input Enabled.

    +

    Limitation

    +

    Pin configuration does not show conflicts when same TINT is used by multiple pins.

    +

    +Usage Notes

    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the INTC_TINT in an application.

    +
    #define INTC_TINT_PIN BSP_IO_PORT_00_PIN_03
    #define INTC_TINT 1
    /* Called from r_intc_tint_isr */
    void external_irq_callback (external_irq_callback_args_t * p_args)
    {
    (void) p_args;
    g_external_irq_complete = 1;
    }
    void simple_example ()
    {
    /* Example Configuration */
    const intc_tint_extended_cfg_t g_external_irq_extend =
    {
    .gpioint = 3,
    .tint_trigger = INTC_TINT_TRIGGER_RISING,
    };
    external_irq_cfg_t g_external_irq_cfg =
    {
    .channel = INTC_TINT,
    .trigger = EXTERNAL_IRQ_TRIG_RISING,
    .filter_enable = false,
    .pclk_div = EXTERNAL_IRQ_PCLK_DIV_BY_1,
    .p_callback = external_irq_callback,
    .p_context = 0,
    .p_extend = &g_external_irq_extend,
    .ipl = 12,
    .irq = SEL1_IRQn,
    };
    /* Configure the external interrupt. */
    fsp_err_t err = R_INTC_TINT_ExternalIrqOpen(&g_external_irq_ctrl, &g_external_irq_cfg);
    assert(FSP_SUCCESS == err);
    /* Enable the external interrupt. */
    err = R_INTC_TINT_ExternalIrqEnable(&g_external_irq_ctrl);
    assert(FSP_SUCCESS == err);
    while (0 == g_external_irq_complete)
    {
    /* Wait for interrupt. */
    }
    }
    + + + + + +

    +Data Structures

    struct  intc_tint_instance_ctrl_t
     
    struct  intc_tint_extended_cfg_t
     
    + + + +

    +Typedefs

    typedef uint8_t intc_tint_gpioint_t
     
    + + + +

    +Enumerations

    enum  intc_tint_trigger_t
     
    +

    Data Structure Documentation

    + +

    ◆ intc_tint_instance_ctrl_t

    + +
    +
    + + + + +
    struct intc_tint_instance_ctrl_t
    +
    +

    INTC_TINT private control block. DO NOT MODIFY. Initialization occurs when R_INTC_TINT_ExternalIrqOpen is called.

    +
    + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Used to determine if channel control block is in use.
     
    +IRQn_Type irq
     Interrupt number.
     
    +uint8_t channel
     Channel.
     
    void const * p_context
     
    +

    Field Documentation

    + +

    ◆ p_context

    + +
    +
    + + + + +
    void const* intc_tint_instance_ctrl_t::p_context
    +
    +

    Placeholder for user data. Passed to the user callback in external_irq_callback_args_t.

    + +
    +
    + +
    +
    + +

    ◆ intc_tint_extended_cfg_t

    + +
    +
    + + + + +
    struct intc_tint_extended_cfg_t
    +
    +

    INTC_TINT configuration extension.

    +
    + + + + + + + +
    Data Fields
    +intc_tint_gpioint_t +gpioint +GPIOINT number.
    +intc_tint_trigger_t +tint_trigger +TINT trigger.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ intc_tint_gpioint_t

    + +
    +
    + + + + +
    typedef uint8_t intc_tint_gpioint_t
    +
    +

    INTC_TINT GPIOINT number.

    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ intc_tint_trigger_t

    + +
    +
    + + + + +
    enum intc_tint_trigger_t
    +
    +

    TINT trigger condition.

    + + + + + +
    Enumerator
    INTC_TINT_TRIGGER_RISING 

    Rising edge trigger.

    +
    INTC_TINT_TRIGGER_FALLING 

    Falling edge trigger.

    +
    INTC_TINT_TRIGGER_LEVEL_HIGH 

    High level trigger.

    +
    INTC_TINT_TRIGGER_LEVEL_LOW 

    Low level trigger.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_INTC_TINT_ExternalIrqOpen()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_INTC_TINT_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl,
    external_irq_cfg_t const *const p_cfg 
    )
    +
    +

    Configure a TINT input pin for use with the external interrupt interface. Implements external_irq_api_t::open.

    +

    The Open function is responsible for preparing a TINT pin for operation.

    +
    Return values
    + + + + + +
    FSP_SUCCESSOpen successful.
    FSP_ERR_ASSERTIONOne of the following is invalid:
      +
    • p_ctrl or p_cfg is NULL
      • +
    +
    FSP_ERR_ALREADY_OPENThe channel specified has already been opened. No configurations were changed. Call the associated Close function to reconfigure the channel.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel requested in p_cfg is not available on the device selected in r_bsp_cfg.h.
    +
    +
    +
    Note
    This function is reentrant for different channels. It is not reentrant for the same channel.
    + +
    +
    + +

    ◆ R_INTC_TINT_ExternalIrqEnable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_INTC_TINT_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)
    +
    +

    Enable external interrupt for specified channel. Implements external_irq_api_t::enable.

    +
    Return values
    + + + + + +
    FSP_SUCCESSInterrupt Enabled successfully.
    FSP_ERR_ASSERTIONThe p_ctrl parameter was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    FSP_ERR_IRQ_BSP_DISABLEDRequested IRQ is not defined in this system.
    +
    +
    + +
    +
    + +

    ◆ R_INTC_TINT_ExternalIrqDisable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_INTC_TINT_ExternalIrqDisable (external_irq_ctrl_t *const p_api_ctrl)
    +
    +

    Disable external interrupt for specified channel. Implements external_irq_api_t::disable.

    +
    Return values
    + + + + + +
    FSP_SUCCESSInterrupt disabled successfully.
    FSP_ERR_ASSERTIONThe p_ctrl parameter was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    FSP_ERR_IRQ_BSP_DISABLEDRequested IRQ is not defined in this system.
    +
    +
    + +
    +
    + +

    ◆ R_INTC_TINT_ExternalIrqCallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_INTC_TINT_ExternalIrqCallbackSet (external_irq_ctrl_t *const p_api_ctrl,
    void(*)(external_irq_callback_args_t *) p_callback,
    void const *const p_context,
    external_irq_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements external_irq_api_t::callbackSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_INTC_TINT_ExternalIrqClose()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_INTC_TINT_ExternalIrqClose (external_irq_ctrl_t *const p_api_ctrl)
    +
    +

    Close the external interrupt channel. Implements external_irq_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSSuccessfully closed.
    FSP_ERR_ASSERTIONThe parameter p_ctrl is NULL.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___i_n_t_c___t_i_n_t.js b/group___i_n_t_c___t_i_n_t.js new file mode 100644 index 0000000..45e0616 --- /dev/null +++ b/group___i_n_t_c___t_i_n_t.js @@ -0,0 +1,25 @@ +var group___i_n_t_c___t_i_n_t = +[ + [ "intc_tint_instance_ctrl_t", "group___i_n_t_c___t_i_n_t.html#structintc__tint__instance__ctrl__t", [ + [ "open", "group___i_n_t_c___t_i_n_t.html#a418c0307cdb3fcf14d74e151652ffd78", null ], + [ "irq", "group___i_n_t_c___t_i_n_t.html#aa0f2fc4c91d800c45bb08df191a01fa4", null ], + [ "channel", "group___i_n_t_c___t_i_n_t.html#a443068029bc0fbf20147fd24df48f9e9", null ], + [ "p_context", "group___i_n_t_c___t_i_n_t.html#a09938fef3661c208ee0e249c305d9cb7", null ] + ] ], + [ "intc_tint_extended_cfg_t", "group___i_n_t_c___t_i_n_t.html#structintc__tint__extended__cfg__t", [ + [ "gpioint", "group___i_n_t_c___t_i_n_t.html#a8066afa114318265d9fe96031434bbd3", null ], + [ "tint_trigger", "group___i_n_t_c___t_i_n_t.html#a15e2ce2189f72bd6ac8d5789cf535a45", null ] + ] ], + [ "intc_tint_gpioint_t", "group___i_n_t_c___t_i_n_t.html#ga3ba2aca2c4a94e31e689d5796a056825", null ], + [ "intc_tint_trigger_t", "group___i_n_t_c___t_i_n_t.html#ga050a0c4d8019d4576ca781ec7d27c5ed", [ + [ "INTC_TINT_TRIGGER_RISING", "group___i_n_t_c___t_i_n_t.html#gga050a0c4d8019d4576ca781ec7d27c5edab0877acf066a60852cf20f2555246521", null ], + [ "INTC_TINT_TRIGGER_FALLING", "group___i_n_t_c___t_i_n_t.html#gga050a0c4d8019d4576ca781ec7d27c5edae0b70e173c23a2bb41685eedcca0eaa2", null ], + [ "INTC_TINT_TRIGGER_LEVEL_HIGH", "group___i_n_t_c___t_i_n_t.html#gga050a0c4d8019d4576ca781ec7d27c5eda005c2f7b5cbb161fb0bf671952ca60fd", null ], + [ "INTC_TINT_TRIGGER_LEVEL_LOW", "group___i_n_t_c___t_i_n_t.html#gga050a0c4d8019d4576ca781ec7d27c5edab9b8df90dff304ec0c877b337c417188", null ] + ] ], + [ "R_INTC_TINT_ExternalIrqOpen", "group___i_n_t_c___t_i_n_t.html#gab01a60894ce57e9089bbdff30d38334f", null ], + [ "R_INTC_TINT_ExternalIrqEnable", "group___i_n_t_c___t_i_n_t.html#ga61a1dc7902ccb186b915b33b5d38a03d", null ], + [ "R_INTC_TINT_ExternalIrqDisable", "group___i_n_t_c___t_i_n_t.html#gad244de976bca311f089962b82d3f850b", null ], + [ "R_INTC_TINT_ExternalIrqCallbackSet", "group___i_n_t_c___t_i_n_t.html#ga3237412fedf68db30556824a96b2ecb6", null ], + [ "R_INTC_TINT_ExternalIrqClose", "group___i_n_t_c___t_i_n_t.html#gaafe713f813011a846a754d9137fda61b", null ] +]; \ No newline at end of file diff --git a/group___i_o_p_o_r_t.html b/group___i_o_p_o_r_t.html index 3cb7df3..b45fd90 100644 --- a/group___i_o_p_o_r_t.html +++ b/group___i_o_p_o_r_t.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: I/O Ports (r_ioport) +RZV Flexible Software Package Documentation: I/O Ports (r_ioport) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    I/O Ports (r_ioport)
    Modules
    +
    I/O Ports (r_ioport)
    Modules » System
    @@ -127,20 +195,12 @@ - - - - - - - -
     
    fsp_err_t R_IOPORT_PortWrite (ioport_ctrl_t *const p_ctrl, bsp_io_port_t port, ioport_size_t value, ioport_size_t mask)
     
    fsp_err_t R_IOPORT_SDVoltageModeCfg (ioport_ctrl_t *const p_ctrl, ioport_sd_channel_t channel, ioport_sd_voltage_t voltage)
     
    fsp_err_t R_IOPORT_QSPIVoltageModeCfg (ioport_ctrl_t *const p_ctrl, ioport_qspi_channel_t channel, ioport_qspi_voltage_t voltage)
     
    fsp_err_t R_IOPORT_EthernetVoltageModeCfg (ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_voltage_t voltage)
     
    fsp_err_t R_IOPORT_EthernetModeCfg (ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_mode_t mode)
     

    Detailed Description

    Driver for the I/O Ports peripheral on RZ MPUs. This module implements the I/O Port Interface.

    Overview

    -

    The I/O port pins operate as general I/O port pins, I/O pins for peripheral modules, interrupt input pins, analog I/O, or bus control pins.

    +

    The I/O port pins operate as general I/O port pins, I/O pins for peripheral modules, interrupt input pins, analog I/O, port group function for the ELC, or bus control pins.

    Features

    The IOPORT HAL module can configure the following pin settings:

      @@ -152,16 +212,21 @@

    • Whether the pin is to be used as an TINT pin
    • Peripheral connection
    • Slew rate setting (Slow, Fast）
      • +
    • Event Output Operation (Low, High, Toggle)
      • +
    • Event edge trigger (falling, rising or both)

    The module also provides the following functionality:

    • Read/write GPIO pins/ports
    • Select operation voltage of SD, QSPI and ETHER.
    • Select ETHER operation mode.
    • Enable / Disable noise filter and set noise filter number and noise filter clock.
      • +
    • Sets event output data
      • +
    • Reads event input data

    Configuration

    The I/O PORT HAL module must be configured by the user for the desired operation.

    +

    Build Time Configurations for r_ioport

    The following build time configurations are defined in fsp_cfg/r_ioport_cfg.h:

    @@ -178,13 +243,127 @@

    Default (BSP) If selected code for parameter checking is included in the build.
    -

    Configurations for Driver > System > I/O Port Driver on r_ioport

    -This module can be added to the Stacks tab via New Stack > Driver > System > I/O Port Driver on r_ioport.
    +

    Configurations for System > I/O Port (r_ioport)

    +This module can be added to the Stacks tab via New Stack > System > I/O Port (r_ioport).

    - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_ioport Module name.
    General > NameName must be a valid C symbolg_ioport Module name.
    General > Pin Configuration NameName must be a valid C symbolg_bsp_pin_cfg Name for pin configuration structure
    ELC Output Port Group 1 > Trigger SourceMCU Specific OptionsELC source that will trigger Output port group 1
    ELC Output Port Group 1 > Port SelectionMCU Specific OptionsSelect multiple port number that specify in Ouput port group 1
    ELC Output Port Group 1 > Output OperationMCU Specific OptionsSelect output operation for Output port group 1. When select toggle output, the target Port m Mode register should be set to 11b: Output (Output data is input to input buffer)
    ELC Output Port Group 2 > Trigger SourceMCU Specific OptionsELC source that will trigger Output port group 2
    ELC Output Port Group 2 > Port SelectionMCU Specific OptionsSelect multiple port number that specify in Ouput port group 2
    ELC Output Port Group 2 > Output OperationMCU Specific OptionsSelect output operation for Output port group 2. When select toggle output, the target Port m Mode register should be set to 11b: Output (Output data is input to input buffer)
    ELC Input Port Group 1 > Buffer Initial Value > P60MCU Specific OptionsSet initial input state for P60
    ELC Input Port Group 1 > Buffer Initial Value > P61MCU Specific OptionsSet initial input state for P61
    ELC Input Port Group 1 > Buffer Initial Value > P62MCU Specific OptionsSet initial input state for P62
    ELC Input Port Group 1 > Buffer Initial Value > P63MCU Specific OptionsSet initial input state for P63
    ELC Input Port Group 1 > Buffer Initial Value > P64MCU Specific OptionsSet initial input state for P64
    ELC Input Port Group 1 > Buffer Initial Value > P65MCU Specific OptionsSet initial input state for P65
    ELC Input Port Group 1 > Buffer Initial Value > P66MCU Specific OptionsSet initial input state for P66
    ELC Input Port Group 1 > Buffer Initial Value > P67MCU Specific OptionsSet initial input state for P67
    ELC Input Port Group 1 > Trigger SourceMCU Specific OptionsELC source that will trigger Input port group 1
    ELC Input Port Group 1 > Event Link ControlMCU Specific OptionsSet input port group 1 enablement
    ELC Input Port Group 1 > Port SelectionMCU Specific OptionsSelect multiple port number that specify in Input port group 1
    ELC Input Port Group 1 > Edge DetectionMCU Specific OptionsSelect edge detection that will trigger Input port group 1
    ELC Input Port Group 1 > Buffer OverwriteMCU Specific OptionsSet whether preventing overwriting ELC Port Buffer Register before reading it
    ELC Input Port Group 2 > Buffer Initial Value > P80MCU Specific OptionsSet initial input state for P80
    ELC Input Port Group 2 > Buffer Initial Value > P81MCU Specific OptionsSet initial input state for P81
    ELC Input Port Group 2 > Buffer Initial Value > P82MCU Specific OptionsSet initial input state for P82
    ELC Input Port Group 2 > Buffer Initial Value > P83MCU Specific OptionsSet initial input state for P83
    ELC Input Port Group 2 > Buffer Initial Value > P84MCU Specific OptionsSet initial input state for P84
    ELC Input Port Group 2 > Buffer Initial Value > P85MCU Specific OptionsSet initial input state for P85
    ELC Input Port Group 2 > Buffer Initial Value > P86MCU Specific OptionsSet initial input state for P86
    ELC Input Port Group 2 > Buffer Initial Value > P87MCU Specific OptionsSet initial input state for P87
    ELC Input Port Group 2 > Trigger SourceMCU Specific OptionsELC source that will trigger Input port group 2
    ELC Input Port Group 2 > Event Link ControlMCU Specific OptionsSet input port group 2 enablement
    ELC Input Port Group 2 > Port SelectionMCU Specific OptionsSelect multiple port number that specify in Input port group 2
    ELC Input Port Group 2 > Edge DetectionMCU Specific OptionsSelect edge detection that will trigger Input port group 2
    ELC Input Port Group 2 > Buffer OverwriteMCU Specific OptionsSet whether preventing overwriting ELC Port Buffer Register before reading it
    ELC Single Port 0 > Common > Event Link ControlMCU Specific OptionsSet single port 0 enablement
    ELC Single Port 0 > Common > Event DirectionMCU Specific OptionsSelect event direction for Single port 0
    ELC Single Port 0 > Common > Port selectionMCU Specific OptionsSelect port number for Single port 0
    ELC Single Port 0 > Output Direction Setting > Trigger SourceMCU Specific OptionsELC source that will trigger Single output port 0
    ELC Single Port 0 > Output Direction Setting > Output OperationMCU Specific OptionsSelect output operation for Single output port 0. When select toggle output, the target Port m Mode register should be set to 11b: Output (Output data is input to input buffer)
    ELC Single Port 0 > Input Direction Setting > Edge DetectionMCU Specific OptionsSelect edge detection that will trigger Single input port 0
    ELC Single Port 1 > Common > Event Link ControlMCU Specific OptionsSet single port 1 enablement
    ELC Single Port 1 > Common > Event DirectionMCU Specific OptionsSelect event direction for Single port 1
    ELC Single Port 1 > Common > Port selectionMCU Specific OptionsSelect port number for Single port 1
    ELC Single Port 1 > Output Direction Setting > Trigger SourceMCU Specific OptionsELC source that will trigger Single output port 1
    ELC Single Port 1 > Output Direction Setting > Output OperationMCU Specific OptionsSelect output operation for Single output port 1. When select toggle output, the target Port m Mode register should be set to 11b: Output (Output data is input to input buffer)
    ELC Single Port 1 > Input Direction Setting > Edge DetectionMCU Specific OptionsSelect edge detection that will trigger Single input port 1
    ELC Single Port 2 > Common > Event Link ControlMCU Specific OptionsSet single port 2 enablement
    ELC Single Port 2 > Common > Event DirectionMCU Specific OptionsSelect event direction for Single port 2
    ELC Single Port 2 > Common > Port selectionMCU Specific OptionsSelect port number for Single port 2
    ELC Single Port 2 > Output Direction Setting > Trigger SourceMCU Specific OptionsELC source that will trigger Single output port 2
    ELC Single Port 2 > Output Direction Setting > Output OperationMCU Specific OptionsSelect output operation for Single output port 2. When select toggle output, the target Port m Mode register should be set to 11b: Output (Output data is input to input buffer)
    ELC Single Port 2 > Input Direction Setting > Edge DetectionMCU Specific OptionsSelect edge detection that will trigger Single input port 2
    ELC Single Port 3 > Common > Event Link ControlMCU Specific OptionsSet single port 3 enablement
    ELC Single Port 3 > Common > Event DirectionMCU Specific OptionsSelect event direction for Single port 3
    ELC Single Port 3 > Common > Port selectionMCU Specific OptionsSelect port number for Single port 3
    ELC Single Port 3 > Output Direction Setting > Trigger SourceMCU Specific OptionsELC source that will trigger Single output port 3
    ELC Single Port 3 > Output Direction Setting > Output OperationMCU Specific OptionsSelect output operation for Single output port 3. When select toggle output, the target Port m Mode register should be set to 11b: Output (Output data is input to input buffer)
    ELC Single Port 3 > Input Direction Setting > Edge DetectionMCU Specific OptionsSelect edge detection that will trigger Single input port 3

    @@ -194,22 +373,59 @@

    Pin Configuration

    The IOPORT module is used for configuring pins.

    Usage Notes

    +

    Port Group Function for ELC

    +

    Depending on pin configuration, the IOPORT module can perform automatic reads or writes on ports 6 or 8 on receipt of an ELC event. Multiple pins can be specified from ports 6 or 8 as port group function by the user.

    +

    In the input port group function, when an event is received by a port, the state of the input pins on the port is saved in a hardware register. The functions R_IOPORT_PinEventInputRead and R_IOPORT_PortEventInputRead allow reading the last event input state of pins specified to the input port group. In addition, the function can be configured to trigger an ELC event on rising, falling or both edges. This event can be used to activate other modules when the pin changes state.

    +

    In the output port group function, when an event is received by a port, the state of output pins on the port is set high, low, toggle or buffer value based on settings configured by the user. The event-triggered pin output can be configured to high or low output through R_IOPORT_PortEventOutputWrite.

    +

    Single Port Function for ELC

    +

    Depending on pin configuration, the IOPORT module can perform automatic writes or links to other module on single pin of ports 6 or 8 on receipt of an ELC event. Pins on ports 6 or 8 can be configured to four single port function by the user.

    +

    When the single port function is received an event from other modules, the state of an output pin specified as the single port function is set high, low or toggle output based on settings configured by the user. The event-triggered pin output can be configured to high or low output through R_IOPORT_PinEventOutputWrite.

    +

    In addition, a pin specified as the single port function can be configured to trigger an ELC event on rising, falling or both edges. This event can be used to activate other modules when the pin changes state.

    +
    Note
    If a pin is specified as both a single port and a member of a port group, the single port function is disabled and only the port group function is enabled when the relevant pin is output.

    Examples

    Basic Example

    This is a basic example of minimal use of the IOPORT in an application.

    -
    void basic_example ()
    {
    bsp_io_level_t readLevel;
    fsp_err_t err;
    /* Initialize the IOPORT module and configure the pins
    * Note: The default pin configuration name in the RZ Configuraton tool is g_bsp_pin_cfg */
    err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Call R_IOPORT_PinsCfg if the configuration was not part of initial configurations made in open */
    err = R_IOPORT_PinsCfg(&g_ioport_ctrl, &g_runtime_pin_cfg);
    handle_error(err);
    /* Set Pin 00 of Port 41 to High */
    err = R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_41_PIN_00, BSP_IO_LEVEL_HIGH);
    handle_error(err);
    /* Read Pin 00 of Port 41 */
    err = R_IOPORT_PinRead(&g_ioport_ctrl, BSP_IO_PORT_41_PIN_00, &readLevel);
    handle_error(err);
    }

    Blinky Example

    +
    void basic_example ()
    {
    bsp_io_level_t readLevel;
    fsp_err_t err;
    /* Initialize the IOPORT module and configure the pins
    * Note: The default pin configuration name in the RZ Configuraton tool is g_bsp_pin_cfg */
    err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Call R_IOPORT_PinsCfg if the configuration was not part of initial configurations made in open */
    err = R_IOPORT_PinsCfg(&g_ioport_ctrl, &g_runtime_pin_cfg);
    handle_error(err);
    /* Set Pin 00 of Port 10 to High */
    err = R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_10_PIN_00, BSP_IO_LEVEL_HIGH);
    handle_error(err);
    /* Read Pin 00 of Port 10 */
    err = R_IOPORT_PinRead(&g_ioport_ctrl, BSP_IO_PORT_10_PIN_00, &readLevel);
    handle_error(err);
    }

    Blinky Example

    This example uses IOPORT to configure and toggle a pin to blink an LED.

    -
    void blinky_example ()
    {
    fsp_err_t err;
    /* Initialize the IOPORT module and configure the pins */
    err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Configure Pin as output
    * Call the R_IOPORT_PinCfg if the configuration was not part of initial configurations made in open */
    err = R_IOPORT_PinCfg(&g_ioport_ctrl, BSP_IO_PORT_41_PIN_00, BSP_IO_DIRECTION_OUTPUT);
    handle_error(err);
    bsp_io_level_t level = BSP_IO_LEVEL_LOW;
    while (1)
    {
    /* Determine the next state of the LEDs */
    if (BSP_IO_LEVEL_LOW == level)
    {
    level = BSP_IO_LEVEL_HIGH;
    }
    else
    {
    level = BSP_IO_LEVEL_LOW;
    }
    /* Update LED of PMOD board connected to PMOD0 of RZ/V2L SMARC board */
    err = R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_41_PIN_00, level);
    handle_error(err);
    /* Delay */
    R_BSP_SoftwareDelay(100, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }
    +
    #define DELAY_TIME (100)
    void blinky_example ()
    {
    fsp_err_t err;
    /* Initialize the IOPORT module and configure the pins */
    err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Configure Pin as output
    * Call the R_IOPORT_PinCfg if the configuration was not part of initial configurations made in open */
    err = R_IOPORT_PinCfg(&g_ioport_ctrl, BSP_IO_PORT_10_PIN_00, BSP_IO_DIRECTION_OUTPUT);
    handle_error(err);
    bsp_io_level_t level = BSP_IO_LEVEL_LOW;
    while (1)
    {
    /* Determine the next state of the LEDs */
    if (BSP_IO_LEVEL_LOW == level)
    {
    level = BSP_IO_LEVEL_HIGH;
    }
    else
    {
    level = BSP_IO_LEVEL_LOW;
    }
    /* Update LED of PMOD board connected to PMOD0 of RZ/V2L SMARC board */
    err = R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_10_PIN_00, level);
    handle_error(err);
    /* Delay */
    R_BSP_SoftwareDelay(DELAY_TIME, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    ELC Example

    +

    This is an example of using IOPORT with ELC events. The ELC event system allows the captured data to be stored when it occurs and then read back at a later time.

    +
    static elc_instance_ctrl_t g_elc_ctrl;
    static elc_cfg_t g_elc_cfg;
    void ioport_elc_example ()
    {
    bsp_io_level_t eventValue;
    fsp_err_t err;
    /* Initializes the software and sets the links defined in the control structure. */
    err = R_ELC_Open(&g_elc_ctrl, &g_elc_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Create or modify a link between a peripheral function and an event source. */
    err = R_ELC_LinkSet(&g_elc_ctrl, (elc_peripheral_t) ELC_PERIPHERAL_SINGLEPORT0, ELC_EVENT_SW_EVENT_0);
    handle_error(err);
    /* Initialize the IOPORT module and configure the pins */
    err = R_IOPORT_Open(&g_ioport_ctrl, &g_bsp_pin_cfg);
    handle_error(err);
    /* Call the R_IOPORT_PinCfg if the configuration was not part of initial configurations made in open */
    err = R_IOPORT_PinCfg(&g_ioport_ctrl, BSP_IO_PORT_06_PIN_00, BSP_IO_DIRECTION_INPUT);
    handle_error(err);
    /* Generate an event signal through software to the linked peripheral. */
    err = R_ELC_SoftwareEventGenerate(&g_elc_ctrl, ELC_SOFTWARE_EVENT_0);
    handle_error(err);
    /* Read Pin Event Input. The data(BSP_IO_LEVEL_HIGH/ BSP_IO_LEVEL_LOW) from BSP_IO_PORT_02_PIN_00 is read into the
    * EIDR bit */
    err = R_IOPORT_PinEventInputRead(&g_ioport_ctrl, BSP_IO_PORT_06_PIN_00, &eventValue);
    handle_error(err);
    }
    + + + + + + + +

    Data Structures

    struct  ioport_instance_ctrl_t
     
    struct  ioport_event_single_t
     
    struct  ioport_event_group_output_t
     
    struct  ioport_event_group_input_t
     
    struct  ioport_extend_cfg_t
     
    - - + + + + + + + + + + + + + + + + + + + +

    Enumerations

    enum  ioport_port_pin_t
     
    enum  ioport_peripheral_t
     
    enum  ioport_cfg_options_t
     
    enum  ioport_event_pin_selection_t
     
    enum  ioport_event_output_operation_t
     
    enum  ioport_event_control_t
     
    enum  ioport_event_direction_t
     
    enum  ioport_event_detection_t
     
    enum  ioport_event_initial_buffer_value_t
     
    enum  ioport_noise_filter_irq_port_offset_t
     
    enum  ioport_noise_filter_dreq_port_offset_t
     

    Data Structure Documentation

    @@ -225,354 +441,548 @@

    IOPORT private control block. DO NOT MODIFY. Initialization occurs when R_IOPORT_Open() is called.

    +

    +
    + +

    ◆ ioport_event_single_t

    + +
    +
    + + + + +
    struct ioport_event_single_t
    +
    +

    Single port configuration

    Note
    Event link must be configured by the ELC
    +
    + + + + + + + + + + + + + + + + +
    Data Fields
    +ioport_event_control_t +event_control +Event link control for single port.
    +ioport_event_direction_t +direction +Event direction for single port.
    +uint16_t +port_num +Port number specified to single port.
    +ioport_event_output_operation_t +operation +Single port operation select.
    +ioport_event_detection_t +edge_detection +Edge detection select.
    + +
    +
    + +

    ◆ ioport_event_group_output_t

    + +
    +
    + + + + +
    struct ioport_event_group_output_t
    +
    +

    Output port group configuration

    Note
    Event link must be configured by the ELC
    +
    + + + + + + + +
    Data Fields
    +uint8_t +pin_select +Port number specified to output port group.
    +ioport_event_output_operation_t +operation +Port group operation select.
    + +
    +
    + +

    ◆ ioport_event_group_input_t

    + +
    +
    + + + + +
    struct ioport_event_group_input_t
    +
    +

    Input port group configuration

    Note
    Event link must be configured by the ELC
    +
    + + + + + + + + + + + + + + + + +
    Data Fields
    +ioport_event_control_t +event_control +Event link control for input port group.
    +ioport_event_detection_t +edge_detection +Edge detection select.
    +ioport_event_control_t +overwrite_control +Buffer register overwrite control.
    +uint8_t +pin_select +Port number specified to input port group.
    +uint8_t +buffer_init_value +Buffer register initial value.
    + +
    +
    + +

    ◆ ioport_extend_cfg_t

    + +
    +
    + + + + +
    struct ioport_extend_cfg_t
    +
    +

    IOPORT extended configuration for event link function

    Note
    Event link must be configured by the ELC
    +
    + + + + + + + + + + +
    Data Fields
    +ioport_event_group_output_t
    +const *    		 +p_port_group_output_cfg +Pointer to output port group configuration.
    +ioport_event_group_input_t const * +p_port_group_input_cfg +Pointer to input port group configuration.
    +ioport_event_single_t const * +p_single_port_cfg +Pointer to single input port configuration.
    +

    Enumeration Type Documentation

    - -

    ◆ ioport_port_pin_t

    + +

    ◆ ioport_peripheral_t

    - +
    enum ioport_port_pin_tenum ioport_peripheral_t
    -

    Superset list of all possible IO port pins.

    +

    Superset of all peripheral functions.

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    Enumerator
    IOPORT_PORT_00_PIN_00 

    IO port 0 pin 0.

    -
    IOPORT_PORT_00_PIN_01 

    IO port 0 pin 1.

    -
    IOPORT_PORT_01_PIN_00 

    IO port 1 pin 0.

    -
    IOPORT_PORT_01_PIN_01 

    IO port 1 pin 1.

    -
    IOPORT_PORT_02_PIN_00 

    IO port 2 pin 0.

    -
    IOPORT_PORT_02_PIN_01 

    IO port 2 pin 1.

    -
    IOPORT_PORT_03_PIN_00 

    IO port 3 pin 0.

    -
    IOPORT_PORT_03_PIN_01 

    IO port 3 pin 1.

    -
    IOPORT_PORT_04_PIN_00 

    IO port 4 pin 0.

    -
    IOPORT_PORT_04_PIN_01 

    IO port 4 pin 1.

    -
    IOPORT_PORT_05_PIN_00 

    IO port 5 pin 0.

    -
    IOPORT_PORT_05_PIN_01 

    IO port 5 pin 1.

    -
    IOPORT_PORT_05_PIN_02 

    IO port 5 pin 2.

    -
    IOPORT_PORT_06_PIN_00 

    IO port 6 pin 0.

    -
    IOPORT_PORT_06_PIN_01 

    IO port 6 pin 1.

    -
    IOPORT_PORT_07_PIN_00 

    IO port 7 pin 0.

    -
    IOPORT_PORT_07_PIN_01 

    IO port 7 pin 1.

    -
    IOPORT_PORT_07_PIN_02 

    IO port 7 pin 2.

    -
    IOPORT_PORT_08_PIN_00 

    IO port 8 pin 0.

    -
    IOPORT_PORT_08_PIN_01 

    IO port 8 pin 1.

    -
    IOPORT_PORT_08_PIN_02 

    IO port 8 pin 2.

    -
    IOPORT_PORT_09_PIN_00 

    IO port 9 pin 0.

    -
    IOPORT_PORT_09_PIN_01 

    IO port 9 pin 1.

    -
    IOPORT_PORT_10_PIN_00 

    IO port 10 pin 0.

    -
    IOPORT_PORT_10_PIN_01 

    IO port 10 pin 1.

    -
    IOPORT_PORT_11_PIN_00 

    IO port 11 pin 0.

    -
    IOPORT_PORT_11_PIN_01 

    IO port 11 pin 1.

    -
    IOPORT_PORT_12_PIN_00 

    IO port 12 pin 0.

    -
    IOPORT_PORT_12_PIN_01 

    IO port 12 pin 1.

    -
    IOPORT_PORT_13_PIN_00 

    IO port 13 pin 0.

    -
    IOPORT_PORT_13_PIN_01 

    IO port 13 pin 1.

    -
    IOPORT_PORT_13_PIN_02 

    IO port 13 pin 2.

    -
    IOPORT_PORT_14_PIN_00 

    IO port 14 pin 0.

    -
    IOPORT_PORT_14_PIN_01 

    IO port 14 pin 1.

    -
    IOPORT_PORT_15_PIN_00 

    IO port 15 pin 0.

    -
    IOPORT_PORT_15_PIN_01 

    IO port 15 pin 1.

    -
    IOPORT_PORT_16_PIN_00 

    IO port 16 pin 0.

    -
    IOPORT_PORT_16_PIN_01 

    IO port 16 pin 1.

    -
    IOPORT_PORT_17_PIN_00 

    IO port 17 pin 0.

    -
    IOPORT_PORT_17_PIN_01 

    IO port 17 pin 1.

    -
    IOPORT_PORT_17_PIN_02 

    IO port 17 pin 2.

    -
    IOPORT_PORT_18_PIN_00 

    IO port 18 pin 0.

    -
    IOPORT_PORT_18_PIN_01 

    IO port 18 pin 1.

    -
    IOPORT_PORT_19_PIN_00 

    IO port 19 pin 0.

    -
    IOPORT_PORT_19_PIN_01 

    IO port 19 pin 1.

    -
    IOPORT_PORT_20_PIN_00 

    IO port 20 pin 0.

    -
    IOPORT_PORT_20_PIN_01 

    IO port 20 pin 1.

    -
    IOPORT_PORT_20_PIN_02 

    IO port 20 pin 2.

    -
    IOPORT_PORT_21_PIN_00 

    IO port 21 pin 0.

    +
    Enumerator
    IOPORT_PERIPHERAL_MODE0 

    Pin will function as a Mode0 peripheral pin

    IOPORT_PORT_21_PIN_01 

    IO port 21 pin 1.

    +
    IOPORT_PERIPHERAL_MODE1 

    Pin will function as a Mode1 peripheral pin

    IOPORT_PORT_22_PIN_00 

    IO port 22 pin 0.

    +
    IOPORT_PERIPHERAL_MODE2 

    Pin will function as a Mode2 peripheral pin

    IOPORT_PORT_22_PIN_01 

    IO port 22 pin 1.

    +
    IOPORT_PERIPHERAL_MODE3 

    Pin will function as a Mode3 peripheral pin

    IOPORT_PORT_23_PIN_00 

    IO port 23 pin 0.

    +
    IOPORT_PERIPHERAL_MODE4 

    Pin will function as a Mode4 peripheral pin

    IOPORT_PORT_23_PIN_01 

    IO port 23 pin 1.

    +
    IOPORT_PERIPHERAL_MODE5 

    Pin will function as a Mode5 peripheral pin

    IOPORT_PORT_24_PIN_00 

    IO port 24 pin 0.

    +
    IOPORT_PERIPHERAL_MODE6 

    Pin will function as a Mode6 peripheral pin

    IOPORT_PORT_24_PIN_01 

    IO port 24 pin 1.

    +
    IOPORT_PERIPHERAL_MODE7 

    Pin will function as a Mode7 peripheral pin

    IOPORT_PORT_25_PIN_00 

    IO port 25 pin 0.

    +
    IOPORT_PERIPHERAL_MODE8 

    Pin will function as a Mode8 peripheral pin

    IOPORT_PORT_25_PIN_01 

    IO port 25 pin 1.

    +
    IOPORT_PERIPHERAL_MODE9 

    Pin will function as a Mode9 peripheral pin

    IOPORT_PORT_26_PIN_00 

    IO port 26 pin 0.

    +
    IOPORT_PERIPHERAL_MODE10 

    Pin will function as a Mode10 peripheral pin

    IOPORT_PORT_26_PIN_01 

    IO port 26 pin 1.

    +
    IOPORT_PERIPHERAL_MODE11 

    Pin will function as a Mode11 peripheral pin

    IOPORT_PORT_27_PIN_00 

    IO port 27 pin 0.

    +
    IOPORT_PERIPHERAL_MODE12 

    Pin will function as a Mode12 peripheral pin

    IOPORT_PORT_27_PIN_01 

    IO port 27 pin 1.

    +
    IOPORT_PERIPHERAL_MODE13 

    Pin will function as a Mode13 peripheral pin

    IOPORT_PORT_28_PIN_00 

    IO port 28 pin 0.

    +
    IOPORT_PERIPHERAL_MODE14 

    Pin will function as a Mode14 peripheral pin

    IOPORT_PORT_28_PIN_01 

    IO port 28 pin 1.

    +
    IOPORT_PERIPHERAL_MODE15 

    Pin will function as a Mode15 peripheral pin

    IOPORT_PORT_29_PIN_00 

    IO port 29 pin 0.

    -
    IOPORT_PORT_29_PIN_01 

    IO port 29 pin 1.

    -
    IOPORT_PORT_30_PIN_00 

    IO port 30 pin 0.

    -
    IOPORT_PORT_30_PIN_01 

    IO port 30 pin 1.

    -
    IOPORT_PORT_31_PIN_00 

    IO port 31 pin 0.

    -
    IOPORT_PORT_31_PIN_01 

    IO port 31 pin 1.

    -
    IOPORT_PORT_32_PIN_00 

    IO port 32 pin 0.

    -
    IOPORT_PORT_32_PIN_01 

    IO port 32 pin 1.

    -
    IOPORT_PORT_33_PIN_00 

    IO port 33 pin 0.

    -
    IOPORT_PORT_33_PIN_01 

    IO port 33 pin 1.

    -
    IOPORT_PORT_34_PIN_00 

    IO port 34 pin 0.

    -
    IOPORT_PORT_34_PIN_01 

    IO port 34 pin 1.

    +
    + +
    +
    + +

    ◆ ioport_cfg_options_t

    + +
    +
    + + + + +
    enum ioport_cfg_options_t
    +
    +

    Options to configure pin functions

    + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    Enumerator
    IOPORT_CFG_PORT_DIRECTION_HIZ 

    Sets the pin direction to Hi-Z (default)

    IOPORT_PORT_35_PIN_00 

    IO port 35 pin 0.

    +
    IOPORT_CFG_PORT_DIRECTION_INPUT 

    Sets the pin direction to input.

    IOPORT_PORT_35_PIN_01 

    IO port 35 pin 1.

    +
    IOPORT_CFG_PORT_DIRECTION_OUTPUT 

    Sets the pin direction to output (input disable)

    IOPORT_PORT_36_PIN_00 

    IO port 36 pin 0.

    +
    IOPORT_CFG_PORT_DIRECTION_OUTPUT_INPUT 

    Sets the pin direction to output (input enable)

    IOPORT_PORT_36_PIN_01 

    IO port 36 pin 1.

    +
    IOPORT_CFG_PORT_OUTPUT_LOW 

    Sets the pin level to low.

    IOPORT_PORT_37_PIN_00 

    IO port 37 pin 0.

    +
    IOPORT_CFG_PORT_OUTPUT_HIGH 

    Sets the pin level to high.

    IOPORT_PORT_37_PIN_01 

    IO port 37 pin 1.

    +
    IOPORT_CFG_PULLUP_PULLDOWN_DISABLE 

    Disable the pin's internal pull-up and pull-down.

    IOPORT_PORT_37_PIN_02 

    IO port 37 pin 2.

    +
    IOPORT_CFG_PULLUP_ENABLE 

    Enables the pin's internal pull-up.

    IOPORT_PORT_38_PIN_00 

    IO port 38 pin 0.

    +
    IOPORT_CFG_PULLDOWN_ENABLE 

    Enables the pin's internal pull-down.

    IOPORT_PORT_38_PIN_01 

    IO port 38 pin 1.

    +
    IOPORT_CFG_NOD_DISABLE 

    Disable the pin's N-ch open-drain.

    IOPORT_PORT_39_PIN_00 

    IO port 39 pin 0.

    +
    IOPORT_CFG_NOD_ENABLE 

    Enables the pin's N-ch open-drain.

    IOPORT_PORT_39_PIN_01 

    IO port 39 pin 1.

    +
    IOPORT_CFG_SCHMITT_DISABLE 

    Disable the pin's Schmitt-trigger input.

    IOPORT_PORT_39_PIN_02 

    IO port 39 pin 2.

    +
    IOPORT_CFG_SCHMITT_ENABLE 

    Enables the pin's Schmitt-trigger input.

    IOPORT_PORT_40_PIN_00 

    IO port 40 pin 0.

    +
    IOPORT_CFG_DRIVE_B00 

    Sets the IOLH register value to b'00.

    IOPORT_PORT_40_PIN_01 

    IO port 40 pin 1.

    +
    IOPORT_CFG_DRIVE_B01 

    Sets the IOLH register value to b'01.

    IOPORT_PORT_40_PIN_02 

    IO port 40 pin 2.

    +
    IOPORT_CFG_DRIVE_B10 

    Sets the IOLH register value to b'10.

    IOPORT_PORT_41_PIN_00 

    IO port 41 pin 0.

    +
    IOPORT_CFG_DRIVE_B11 

    Sets the IOLH register value to b'11.

    IOPORT_PORT_41_PIN_01 

    IO port 41 pin 1.

    +
    IOPORT_CFG_TINT_DISABLE 

    Disable IRQ functionality for a pin.

    IOPORT_PORT_42_PIN_00 

    IO port 42 pin 0.

    +
    IOPORT_CFG_TINT_ENABLE 

    Sets pin as an IRQ pin.

    IOPORT_PORT_42_PIN_01 

    IO port 42 pin 1.

    +
    IOPORT_CFG_SLEW_RATE_SLOW 

    Sets the pin slew-rate to slow.

    IOPORT_PORT_42_PIN_02 

    IO port 42 pin 2.

    +
    IOPORT_CFG_SLEW_RATE_FAST 

    Sets the pin slew-rate to fast.

    IOPORT_PORT_42_PIN_03 

    IO port 42 pin 3.

    +
    IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_DISABLE 

    Disable input the pin of special purpose port.

    IOPORT_PORT_42_PIN_04 

    IO port 42 pin 4.

    +
    IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_ENABLE 

    Sets the pin of special purpose port to input.

    IOPORT_PORT_43_PIN_00 

    IO port 43 pin 0.

    +
    IOPORT_CFG_NOISE_FILTER_OFF 

    Noise filter disable.

    IOPORT_PORT_43_PIN_01 

    IO port 43 pin 1.

    +
    IOPORT_CFG_NOISE_FILTER_ON 

    Noise filter enable.

    IOPORT_PORT_43_PIN_02 

    IO port 43 pin 2.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_4STAGE 

    Sets the pin noise filter to 4-stage filter.

    IOPORT_PORT_43_PIN_03 

    IO port 43 pin 3.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_8STAGE 

    Sets the pin noise filter to 8-stage filter.

    IOPORT_PORT_44_PIN_00 

    IO port 44 pin 0.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_12STAGE 

    Sets the pin noise filter to 12-stage filter.

    IOPORT_PORT_44_PIN_01 

    IO port 44 pin 1.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_16STAGE 

    Sets the pin noise filter to 16-stage filter.

    IOPORT_PORT_44_PIN_02 

    IO port 44 pin 2.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B00 

    Sets the FILCLKSEL register value to b'00.

    IOPORT_PORT_44_PIN_03 

    IO port 44 pin 3.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B01 

    Sets the FILCLKSEL register value to b'01.

    IOPORT_PORT_45_PIN_00 

    IO port 45 pin 0.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B10 

    Sets the FILCLKSEL register value to b'10.

    IOPORT_PORT_45_PIN_01 

    IO port 45 pin 1.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B11 

    Sets the FILCLKSEL register value to b'11.

    IOPORT_PORT_45_PIN_02 

    IO port 45 pin 2.

    +
    IOPORT_CFG_PERIPHERAL_PIN 

    Enables pin to operate as a peripheral pin.

    IOPORT_PORT_45_PIN_03 

    IO port 45 pin 3.

    +
    IOPORT_CFG_PORT_DIRECTION_HIZ 

    Sets the pin direction to Hi-Z (default)

    IOPORT_PORT_46_PIN_00 

    IO port 46 pin 0.

    +
    IOPORT_CFG_PORT_DIRECTION_INPUT 

    Sets the pin direction to input.

    IOPORT_PORT_46_PIN_01 

    IO port 46 pin 1.

    +
    IOPORT_CFG_PORT_DIRECTION_OUTPUT 

    Sets the pin direction to output (input disable)

    IOPORT_PORT_46_PIN_02 

    IO port 46 pin 2.

    +
    IOPORT_CFG_PORT_DIRECTION_OUTPUT_INPUT 

    Sets the pin direction to output (input enable)

    IOPORT_PORT_46_PIN_03 

    IO port 46 pin 3.

    +
    IOPORT_CFG_PORT_OUTPUT_LOW 

    Sets the pin level to low.

    IOPORT_PORT_47_PIN_00 

    IO port 47 pin 0.

    +
    IOPORT_CFG_PORT_OUTPUT_HIGH 

    Sets the pin level to high.

    IOPORT_PORT_47_PIN_01 

    IO port 47 pin 1.

    +
    IOPORT_CFG_PULLUP_PULLDOWN_DISABLE 

    Disable the pin's internal pull-up and pull-down.

    IOPORT_PORT_47_PIN_02 

    IO port 47 pin 2.

    +
    IOPORT_CFG_PULLUP_ENABLE 

    Enables the pin's internal pull-up.

    IOPORT_PORT_47_PIN_03 

    IO port 47 pin 3.

    +
    IOPORT_CFG_PULLDOWN_ENABLE 

    Enables the pin's internal pull-down.

    IOPORT_PORT_48_PIN_00 

    IO port 48 pin 0.

    +
    IOPORT_CFG_NOD_DISABLE 

    Disable the pin's N-ch open-drain.

    IOPORT_PORT_48_PIN_01 

    IO port 48 pin 1.

    +
    IOPORT_CFG_NOD_ENABLE 

    Enables the pin's N-ch open-drain.

    IOPORT_PORT_48_PIN_02 

    IO port 48 pin 2.

    +
    IOPORT_CFG_SCHMITT_DISABLE 

    Disable the pin's Schmitt-trigger input.

    IOPORT_PORT_48_PIN_03 

    IO port 48 pin 3.

    +
    IOPORT_CFG_SCHMITT_ENABLE 

    Enables the pin's Schmitt-trigger input.

    IOPORT_PORT_48_PIN_04 

    IO port 48 pin 4.

    +
    IOPORT_CFG_DRIVE_B00 

    Sets the IOLH register value to b'00.

    IOPORT_NMI 

    NMI.

    +
    IOPORT_CFG_DRIVE_B01 

    Sets the IOLH register value to b'01.

    IOPORT_TMS_SWDIO 

    TMS_SWDIO.

    +
    IOPORT_CFG_DRIVE_B10 

    Sets the IOLH register value to b'10.

    IOPORT_TDO 

    TDO.

    +
    IOPORT_CFG_DRIVE_B11 

    Sets the IOLH register value to b'11.

    IOPORT_AUDIO_CLK1 

    AUDIO_CLK1.

    +
    IOPORT_CFG_TINT_DISABLE 

    Disable IRQ functionality for a pin.

    IOPORT_AUDIO_CLK2 

    AUDIO_CLK2.

    +
    IOPORT_CFG_TINT_ENABLE 

    Sets pin as an IRQ pin.

    IOPORT_SD0_CLK 

    CD0_CLK.

    +
    IOPORT_CFG_SLEW_RATE_SLOW 

    Sets the pin slew-rate to slow.

    IOPORT_SD0_CMD 

    CD0_CMD.

    +
    IOPORT_CFG_SLEW_RATE_FAST 

    Sets the pin slew-rate to fast.

    IOPORT_SD0_RST_N 

    CD0_RST_N.

    +
    IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_DISABLE 

    Disable input the pin of special purpose port.

    IOPORT_SD0_DATA0 

    SD0_DATA0.

    +
    IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_ENABLE 

    Sets the pin of special purpose port to input.

    IOPORT_SD0_DATA1 

    SD0_DATA1.

    +
    IOPORT_CFG_NOISE_FILTER_OFF 

    Noise filter disable.

    IOPORT_SD0_DATA2 

    SD0_DATA2.

    +
    IOPORT_CFG_NOISE_FILTER_ON 

    Noise filter enable.

    IOPORT_SD0_DATA3 

    SD0_DATA3.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_4STAGE 

    Sets the pin noise filter to 4-stage filter.

    IOPORT_SD0_DATA4 

    SD0_DATA4.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_8STAGE 

    Sets the pin noise filter to 8-stage filter.

    IOPORT_SD0_DATA5 

    SD0_DATA5.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_12STAGE 

    Sets the pin noise filter to 12-stage filter.

    IOPORT_SD0_DATA6 

    SD0_DATA6.

    +
    IOPORT_CFG_NOISE_FILTER_NUM_16STAGE 

    Sets the pin noise filter to 16-stage filter.

    IOPORT_SD0_DATA7 

    SD0_DATA7.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B00 

    Sets the FILCLKSEL register value to b'00.

    IOPORT_SD1_CLK 

    SD1_CLK.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B01 

    Sets the FILCLKSEL register value to b'01.

    IOPORT_SD1_CMD 

    SD1_CMD.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B10 

    Sets the FILCLKSEL register value to b'10.

    IOPORT_SD1_DATA0 

    SD1_DATA0.

    +
    IOPORT_CFG_NOISE_FILTER_DIVIDED_B11 

    Sets the FILCLKSEL register value to b'11.

    IOPORT_SD1_DATA1 

    SD1_DATA1.

    +
    IOPORT_CFG_PERIPHERAL_PIN 

    Enables pin to operate as a peripheral pin.

    IOPORT_SD1_DATA2 

    SD1_DATA2.

    +
    + +
    +
    + +

    ◆ ioport_event_pin_selection_t

    + +
    +
    + + + + +
    enum ioport_event_pin_selection_t
    +
    +

    Pin selection for port group

    Note
    Event link must be configured by the ELC
    + + - - - - - - - - -
    Enumerator
    IOPORT_EVENT_PIN_SELECTION_NONE 

    No pin selection for port group.

    IOPORT_SD1_DATA3 

    SD1_DATA3.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_0 

    Select pin 0 to port group.

    IOPORT_QSPI0_SPCLK 

    QSPI0_SPCLK.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_1 

    Select pin 1 to port group.

    IOPORT_QSPI0_IO0 

    QSPI0_IO0.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_2 

    Select pin 2 to port group.

    IOPORT_QSPI0_IO1 

    QSPI0_IO1.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_3 

    Select pin 3 to port group.

    IOPORT_QSPI0_IO2 

    QSPI0_IO2.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_4 

    Select pin 4 to port group.

    IOPORT_QSPI0_IO3 

    QSPI0_IO3.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_5 

    Select pin 5 to port group.

    IOPORT_QSPI0_SSL 

    QSPI0_SSL.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_6 

    Select pin 6 to port group.

    IOPORT_QSPI1_SPCLK 

    QSPI1_SPCLK.

    +
    IOPORT_EVENT_PIN_SELECTION_PIN_7 

    Select pin 7 to port group.

    IOPORT_QSPI1_IO0 

    QSPI1_IO0.

    +
    + +
    +
    + +

    ◆ ioport_event_output_operation_t

    + +
    +
    + + + + +
    enum ioport_event_output_operation_t
    +
    +

    Port group operation

    Note
    Event link must be configured by the ELC
    + + - - - -
    Enumerator
    IOPORT_EVENT_OUTPUT_OPERATION_LOW 

    Set Low output to output operation.

    IOPORT_QSPI1_IO1 

    QSPI1_IO1.

    +
    IOPORT_EVENT_OUTPUT_OPERATION_HIGH 

    Set High output to output operation.

    IOPORT_QSPI1_IO2 

    QSPI1_IO2.

    +
    IOPORT_EVENT_OUTPUT_OPERATION_TOGGLE 

    Set toggle output to output operation.

    IOPORT_QSPI1_IO3 

    QSPI1_IO3.

    +
    IOPORT_EVENT_OUTPUT_OPERATION_BUFFER 

    Set buffer value output to output operation.

    IOPORT_QSPI1_SSL 

    QSPI1_SSL.

    +
    + +
    +
    + +

    ◆ ioport_event_control_t

    + +
    +
    + + + + +
    enum ioport_event_control_t
    +
    +

    Input port group event control

    Note
    Event link must be configured by the ELC
    + + - -
    Enumerator
    IOPORT_EVENT_CONTROL_DISABLE 

    Disable function related with event link.

    IOPORT_QSPI_RESET_N 

    QSPI_RESET_N.

    +
    IOPORT_EVENT_CONTROL_ENABLE 

    Enable function related with event link.

    IOPORT_QSPI_WP_N 

    QSPI_WP_N.

    +
    + +
    +
    + +

    ◆ ioport_event_direction_t

    + +
    +
    + + + + +
    enum ioport_event_direction_t
    +
    +

    Single port event direction

    Note
    Event link must be configured by the ELC
    + + - -
    Enumerator
    IOPORT_EVENT_DIRECTION_OUTPUT 

    Set output direction to single port.

    IOPORT_QSPI_INT_N 

    QSPI_INT_N.

    +
    IOPORT_EVENT_DIRECTION_INPUT 

    Set input direction to single port.

    IOPORT_WDTOVF_PERROUT_N 

    WDTOVF_PERROUT_N.

    +
    + +
    +
    + +

    ◆ ioport_event_detection_t

    + +
    +
    + + + + +
    enum ioport_event_detection_t
    +
    +

    Input event edge detection

    Note
    Event link must be configured by the ELC
    + + - - -
    Enumerator
    IOPORT_EVENT_DETECTION_RISING_EDGE 

    Set rising edge to event detection for input event.

    IOPORT_RIIC0_SDA 

    RIIC0_SDA.

    +
    IOPORT_EVENT_DETECTION_FALLING_EDGE 

    Set falling edge to event detection for input event.

    IOPORT_RIIC0_SCL 

    RIIC0_SCL.

    +
    IOPORT_EVENT_DETECTION_BOTH_EGDE 

    Set both edges to event detection for input event.

    IOPORT_RIIC1_SDA 

    RIIC1_SDA.

    +
    + +
    +
    + +

    ◆ ioport_event_initial_buffer_value_t

    + +
    +
    + + + + +
    enum ioport_event_initial_buffer_value_t
    +
    +

    Initial value for buffer register

    Note
    Event link must be configured by the ELC
    + + -
    Enumerator
    IOPORT_EVENT_INITIAL_BUFFER_VALUE_LOW 

    Set low to initial value of buffer register for input port group.

    IOPORT_RIIC1_SCL 

    RIIC1_SCL.

    +
    IOPORT_EVENT_INITIAL_BUFFER_VALUE_HIGH 

    Set high to initial value of buffer register for input port group.

    +
    +
    + +

    ◆ ioport_noise_filter_irq_port_offset_t

    + +
    +
    + + + + +
    enum ioport_noise_filter_irq_port_offset_t
    +
    +

    Superset of offset for all IRQ functions.

    + +
    +
    + +

    ◆ ioport_noise_filter_dreq_port_offset_t

    + +
    +
    + + + + +
    enum ioport_noise_filter_dreq_port_offset_t
    +
    +

    Superset of offset for all DREQ functions.

    +

    Function Documentation

    @@ -753,10 +1163,15 @@

    -

    This API function has NOT been supported because RZ/V does not have an ELC.

    +

    Reads the value of the event input data of a specific pin. Implements ioport_api_t::pinEventInputRead.

    +

    The pin event data is captured in response to a trigger from the ELC. This function enables this data to be read. Using the event system allows the captured data to be stored when it occurs and then read back at a later time.

    Return values
    - + + + + +
    FSP_ERR_UNSUPPORTEDR_IOPORT_PinEventInputRead is not supported on this device.
    FSP_SUCCESSPin read
    FSP_ERR_ASSERTIONNULL pointer
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_INVALID_ARGUMENTPort is not valid ELC PORT.
    FSP_ERR_UNSUPPORTEDThe function is not supported on the device which doesn't support ELC.
    @@ -794,10 +1209,15 @@

    -

    This API function has NOT been supported because RZ/V does not have an ELC.

    +

    This function writes the event output data value to a pin. Implements ioport_api_t::pinEventOutputWrite.

    +

    Using the event system enables a pin state to be stored by this function in advance of being output on the pin. The output to the pin will occur when the ELC event occurs.

    Return values
    - + + + + +
    FSP_ERR_UNSUPPORTEDR_IOPORT_PinEventOutputWrite is not supported on this device.
    FSP_SUCCESSPin event data written
    FSP_ERR_INVALID_ARGUMENTPort or Pin or value not valid
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_ASSERTIONNULL pointer
    FSP_ERR_UNSUPPORTEDThe function is not supported on the device which doesn't support ELC.
    @@ -976,10 +1396,16 @@

    -

    This API function has NOT been supported because RZ/V does not have an ELC.

    +

    Reads the value of the event input data. Implements ioport_api_t::portEventInputRead().

    +

    The event input data for the port will be read. Each bit in the returned value corresponds to a pin on the port. For example, bit 7 corresponds to pin 7, bit 6 to pin 6, and so on.

    +

    The port event data is captured in response to a trigger from the ELC. This function enables this data to be read. Using the event system allows the captured data to be stored when it occurs and then read back at a later time.

    Return values
    - + + + + +
    FSP_ERR_UNSUPPORTEDR_IOPORT_PortEventInputRead is not supported on this device.
    FSP_SUCCESSPort read
    FSP_ERR_INVALID_ARGUMENTPort not a valid ELC port
    FSP_ERR_ASSERTIONNULL pointer
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_UNSUPPORTEDThe function is not supported on the device which doesn't support ELC.
    @@ -1023,10 +1449,16 @@

    -

    This API function has NOT been supported because RZ/V does not have an ELC.

    +

    This function writes the set and reset event output data for a port. Implements ioport_api_t::portEventOutputWrite.

    +

    Using the event system enables a port state to be stored by this function in advance of being output on the port. The output to the port will occur when the ELC event occurs.

    +

    The input value will be written to the specified port when an ELC event configured for that port occurs. Each bit in the value parameter corresponds to a bit on the port. For example, bit 7 corresponds to pin 7, bit 6 to pin 6, and so on. Each bit in the mask parameter corresponds to a pin on the port.

    Return values
    - + + + + +
    FSP_ERR_UNSUPPORTEDR_IOPORT_PortEventOutputWrite is not supported on this device.
    FSP_SUCCESSPort event data written
    FSP_ERR_INVALID_ARGUMENTPort or Mask not valid
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_ASSERTIONNULL pointer
    FSP_ERR_UNSUPPORTEDThe function is not supported on the device which doesn't support ELC.
    @@ -1129,190 +1561,6 @@

    Note
    This function is re-entrant for different ports.
    -

    -
    - -

    ◆ R_IOPORT_SDVoltageModeCfg()

    - -
    -
    - - - - - - - - - - - - - - - - - - - - - - - - -
    fsp_err_t R_IOPORT_SDVoltageModeCfg (ioport_ctrl_t *const p_ctrl,
    ioport_sd_channel_t channel,
    ioport_sd_voltage_t voltage 
    )
    -
    -

    Configures SD channel voltage mode. Implements ioport_api_t::pinSDVoltageModeCfg.

    -
    Return values
    - - - - - - -
    FSP_SUCCESSSD voltage mode set
    FSP_ERR_INVALID_ARGUMENTChannel or voltage not valid
    FSP_ERR_UNSUPPORTEDSD voltage configuration not supported on this device.
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_ASSERTIONNULL pointer
    -
    -
    -
    Note
    This function is not re-entrant.
    - -
    -
    - -

    ◆ R_IOPORT_QSPIVoltageModeCfg()

    - -
    -
    - - - - - - - - - - - - - - - - - - - - - - - - -
    fsp_err_t R_IOPORT_QSPIVoltageModeCfg (ioport_ctrl_t *const p_ctrl,
    ioport_qspi_channel_t channel,
    ioport_qspi_voltage_t voltage 
    )
    -
    -

    Configures QSPI channel voltage mode. Implements ioport_api_t::pinQSPIVoltageModeCfg.

    -
    Return values
    - - - - - - -
    FSP_SUCCESSQSPI voltage mode set
    FSP_ERR_INVALID_ARGUMENTChannel or voltage not valid
    FSP_ERR_UNSUPPORTEDQSPI voltage configuration not supported on this device.
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_ASSERTIONNULL pointer
    -
    -
    -
    Note
    This function is not re-entrant.
    - -
    -
    - -

    ◆ R_IOPORT_EthernetVoltageModeCfg()

    - -
    -
    - - - - - - - - - - - - - - - - - - - - - - - - -
    fsp_err_t R_IOPORT_EthernetVoltageModeCfg (ioport_ctrl_t *const p_ctrl,
    ioport_ethernet_channel_t channel,
    ioport_ethernet_voltage_t voltage 
    )
    -
    -

    Configures Ethernet channel voltage mode. Implements ioport_api_t::pinEthernetVoltageModeCfg.

    -
    Return values
    - - - - - - -
    FSP_SUCCESSEthernet voltage mode set
    FSP_ERR_INVALID_ARGUMENTChannel or voltage not valid
    FSP_ERR_UNSUPPORTEDEthernet voltage configuration not supported on this device.
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_ASSERTIONNULL pointer
    -
    -
    -
    Note
    This function is not re-entrant.
    - -
    -
    - -

    ◆ R_IOPORT_EthernetModeCfg()

    - -
    -
    - - - - - - - - - - - - - - - - - - - - - - - - -
    fsp_err_t R_IOPORT_EthernetModeCfg (ioport_ctrl_t *const p_ctrl,
    ioport_ethernet_channel_t channel,
    ioport_ethernet_mode_t mode 
    )
    -
    -

    Configures Ethernet channel PHY mode. Implements ioport_api_t::pinEthernetModeCfg.

    -
    Return values
    - - - - - - -
    FSP_SUCCESSEthernet PHY mode set
    FSP_ERR_INVALID_ARGUMENTChannel or mode not valid
    FSP_ERR_UNSUPPORTEDEthernet configuration not supported on this device.
    FSP_ERR_NOT_OPENThe module has not been opened
    FSP_ERR_ASSERTIONNULL pointer
    -
    -
    -
    Note
    This function is not re-entrant.
    -
    @@ -1321,7 +1569,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

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"group___i_o_p_o_r_t.html#ga24938047dccc62c4426ff543489454de", null ], [ "R_IOPORT_Close", "group___i_o_p_o_r_t.html#ga91d4fde6e5f7cdf57b99af5b5f89f1cc", null ], [ "R_IOPORT_PinsCfg", "group___i_o_p_o_r_t.html#ga3daa7097b08c7f623a741e2e481cf89f", null ], @@ -180,9 +160,5 @@ var group___i_o_p_o_r_t = [ "R_IOPORT_PortEventInputRead", "group___i_o_p_o_r_t.html#gae310ec091b58570972ea46f1f263985d", null ], [ "R_IOPORT_PortEventOutputWrite", "group___i_o_p_o_r_t.html#ga8d3f8c4c90241587fee076b6fb0623ff", null ], [ "R_IOPORT_PortRead", "group___i_o_p_o_r_t.html#gab84c08b8ac66d18c5636ebc772133e77", null ], - [ "R_IOPORT_PortWrite", "group___i_o_p_o_r_t.html#ga31825f3f0295317e5b446d74f791cd68", null ], - [ "R_IOPORT_SDVoltageModeCfg", "group___i_o_p_o_r_t.html#gaee86fd299af255bc3020d38d691db7b6", null ], - [ "R_IOPORT_QSPIVoltageModeCfg", "group___i_o_p_o_r_t.html#ga89947e3a2708547f57c5fc020b45c777", null ], - [ "R_IOPORT_EthernetVoltageModeCfg", "group___i_o_p_o_r_t.html#gacfd358d1a3bbaa2c6bbc980664cd2d30", null ], - [ "R_IOPORT_EthernetModeCfg", "group___i_o_p_o_r_t.html#ga383b2f8df036fceeb7c5344c5654d2c3", null ] + [ "R_IOPORT_PortWrite", "group___i_o_p_o_r_t.html#ga31825f3f0295317e5b446d74f791cd68", null ] ]; \ No newline at end of file diff --git a/group___i_o_p_o_r_t___a_p_i.html b/group___i_o_p_o_r_t___a_p_i.html index 6e20c47..a210aa2 100644 --- a/group___i_o_p_o_r_t___a_p_i.html +++ b/group___i_o_p_o_r_t___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: I/O Port Interface +RZV Flexible Software Package Documentation: I/O Port Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -126,24 +194,6 @@

    - - - - - - - - - - - - - - - - - -

    Enumerations

    enum  ioport_peripheral_t
     
    enum  ioport_sd_channel_t
     
    enum  ioport_qspi_channel_t
     
    enum  ioport_ethernet_channel_t
     
    enum  ioport_sd_voltage_t
     
    enum  ioport_qspi_voltage_t
     
    enum  ioport_ethernet_voltage_t
     
    enum  ioport_ethernet_mode_t
     
    enum  ioport_cfg_options_t
     
    enum  ioport_pwpr_t
     
    @@ -204,6 +254,12 @@

    p_pin_cfg_data Pin configuration data. + +const void * + +p_extend + +Pointer to hardware extend configuration.

    @@ -234,14 +290,6 @@

      fsp_err_t(* pinEventOutputWrite )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t pin_value)   -fsp_err_t(* pinSDVoltageModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_sd_channel_t channel, ioport_sd_voltage_t voltage) -  -fsp_err_t(* pinQSPIVoltageModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_qspi_channel_t channel, ioport_qspi_voltage_t voltage) -  -fsp_err_t(* pinEthernetVoltageModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_voltage_t voltage) -  -fsp_err_t(* pinEthernetModeCfg )(ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_mode_t mode) -  fsp_err_t(* pinRead )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t *p_pin_value)   fsp_err_t(* pinWrite )(ioport_ctrl_t *const p_ctrl, bsp_io_port_pin_t pin, bsp_io_level_t level) @@ -403,106 +451,6 @@

    -

    ◆ pinSDVoltageModeCfg

    - -
    -
    - - - - -
    fsp_err_t(* ioport_api_t::pinSDVoltageModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_sd_channel_t channel, ioport_sd_voltage_t voltage)
    -
    -

    Configure the SD voltage of the SD channels.

    Implemented as
    -
    -
    Parameters
    - - - -
    [in]channelChannel configuration will be set for.
    [in]voltageVoltage to set the channel to.
    -
    -
    - -
    -
    - -

    ◆ pinQSPIVoltageModeCfg

    - -
    -
    - - - - -
    fsp_err_t(* ioport_api_t::pinQSPIVoltageModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_qspi_channel_t channel, ioport_qspi_voltage_t voltage)
    -
    -

    Configure the QSPI voltage of the QSPI channels.

    Implemented as
    -
    -
    Parameters
    - - - -
    [in]channelChannel configuration will be set for.
    [in]voltageVoltage to set the channel to.
    -
    -
    - -
    -
    - -

    ◆ pinEthernetVoltageModeCfg

    - -
    -
    - - - - -
    fsp_err_t(* ioport_api_t::pinEthernetVoltageModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_voltage_t voltage)
    -
    -

    Configure the Ethernet voltage of the Ethernet channels.

    Implemented as
    -
    -
    Parameters
    - - - -
    [in]channelChannel configuration will be set for.
    [in]voltageVoltage to set the channel to.
    -
    -
    - -
    -
    - -

    ◆ pinEthernetModeCfg

    - -
    -
    - - - - -
    fsp_err_t(* ioport_api_t::pinEthernetModeCfg) (ioport_ctrl_t *const p_ctrl, ioport_ethernet_channel_t channel, ioport_ethernet_mode_t mode)
    -
    -

    Configure the PHY mode of the Ethernet channels.

    Implemented as
    -
    -
    Parameters
    - - - -
    [in]channelChannel configuration will be set for.
    [in]modePHY mode to set the channel to.
    -
    -
    -
    @@ -759,279 +707,6 @@

    Enumeration Type Documentation

    - -

    ◆ ioport_peripheral_t

    - -
    -
    - - - - -
    enum ioport_peripheral_t
    -
    -

    Superset of all peripheral functions.

    - - - - - - - - -
    Enumerator
    IOPORT_PERIPHERAL_MODE0 

    Pin will function as a Mode0 peripheral pin

    -
    IOPORT_PERIPHERAL_MODE1 

    Pin will function as a Mode1 peripheral pin

    -
    IOPORT_PERIPHERAL_MODE2 

    Pin will function as a Mode2 peripheral pin

    -
    IOPORT_PERIPHERAL_MODE3 

    Pin will function as a Mode3 peripheral pin

    -
    IOPORT_PERIPHERAL_MODE4 

    Pin will function as a Mode4 peripheral pin

    -
    IOPORT_PERIPHERAL_MODE5 

    Pin will function as a Mode5 peripheral pin

    -
    IOPORT_PERIPHERAL_END 

    Marks end of enum - used by parameter checking

    -
    - -
    -
    - -

    ◆ ioport_sd_channel_t

    - -
    -
    - - - - -
    enum ioport_sd_channel_t
    -
    -

    Superset of SD channels.

    - - - - -
    Enumerator
    IOPORT_SD_CHANNEL_0 

    Used to select SD channel 0.

    -
    IOPORT_SD_CHANNEL_1 

    Used to select SD channel 1.

    -
    IOPORT_SD_CHANNEL_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_qspi_channel_t

    - -
    -
    - - - - -
    enum ioport_qspi_channel_t
    -
    -

    Superset of QSPI channels.

    - - - - -
    Enumerator
    IOPORT_QSPI_CHANNEL_0 

    Used to select QSPI channel 0.

    -
    IOPORT_QSPI_CHANNEL_1 

    Used to select QSPI channel 1.

    -
    IOPORT_QSPI_CHANNEL_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_ethernet_channel_t

    - -
    -
    - - - - -
    enum ioport_ethernet_channel_t
    -
    -

    Superset of Ethernet channels.

    - - - - -
    Enumerator
    IOPORT_ETHERNET_CHANNEL_0 

    Used to select Ethernet channel 0.

    -
    IOPORT_ETHERNET_CHANNEL_1 

    Used to select Ethernet channel 1.

    -
    IOPORT_ETHERNET_CHANNEL_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_sd_voltage_t

    - -
    -
    - - - - -
    enum ioport_sd_voltage_t
    -
    -

    Superset of SD voltages.

    - - - - -
    Enumerator
    IOPORT_SD_VOLTAGE_33 

    SD voltage set to 3.3V.

    -
    IOPORT_SD_VOLTAGE_18 

    SD voltage set to 1.8V.

    -
    IOPORT_SD_VOLTAGE_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_qspi_voltage_t

    - -
    -
    - - - - -
    enum ioport_qspi_voltage_t
    -
    -

    Superset of QSPI voltages.

    - - - - -
    Enumerator
    IOPORT_QSPI_VOLTAGE_33 

    QSPI voltage set to 3.3V.

    -
    IOPORT_QSPI_VOLTAGE_18 

    QSPI voltage set to 1.8V.

    -
    IOPORT_QSPI_VOLTAGE_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_ethernet_voltage_t

    - -
    -
    - - - - -
    enum ioport_ethernet_voltage_t
    -
    -

    Superset of Ethernet voltages.

    - - - - - -
    Enumerator
    IOPORT_ETHERNET_VOLTAGE_33 

    Ethernet voltage set to 3.3V.

    -
    IOPORT_ETHERNET_VOLTAGE_18 

    Ethernet voltage set to 1.8V.

    -
    IOPORT_ETHERNET_VOLTAGE_25 

    Ethernet voltage set to 2.5V.

    -
    IOPORT_ETHERNET_VOLTAGE_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_ethernet_mode_t

    - -
    -
    - - - - -
    enum ioport_ethernet_mode_t
    -
    -

    Superset of Ethernet PHY modes.

    - - - - -
    Enumerator
    IOPORT_ETHERNET_MODE_RMII 

    Ethernet PHY mode set to MII.

    -
    IOPORT_ETHERNET_MODE_MII 

    Ethernet PHY mode set to RMII.

    -
    IOPORT_ETHERNET_MODE_END 

    Marks end of enum - used by parameter checking.

    -
    - -
    -
    - -

    ◆ ioport_cfg_options_t

    - -
    -
    - - - - -
    enum ioport_cfg_options_t
    -
    -

    Options to configure pin functions

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    Enumerator
    IOPORT_CFG_PORT_DIRECTION_HIZ 

    Sets the pin direction to Hi-Z (default)

    -
    IOPORT_CFG_PORT_DIRECTION_INPUT 

    Sets the pin direction to input.

    -
    IOPORT_CFG_PORT_DIRECTION_OUTPUT 

    Sets the pin direction to output (input disable)

    -
    IOPORT_CFG_PORT_DIRECTION_OUTPUT_INPUT 

    Sets the pin direction to output (input enable)

    -
    IOPORT_CFG_PORT_OUTPUT_LOW 

    Sets the pin level to low.

    -
    IOPORT_CFG_PORT_OUTPUT_HIGH 

    Sets the pin level to high.

    -
    IOPORT_CFG_PULLUP_PULLDOWN_DISABLE 

    Disable the pin's internal pull-up and pull-down.

    -
    IOPORT_CFG_PULLUP_ENABLE 

    Enables the pin's internal pull-up.

    -
    IOPORT_CFG_PULLDOWN_ENABLE 

    Enables the pin's internal pull-down.

    -
    IOPORT_CFG_DRIVE_B00 

    Sets the IOLH register value to b'00.

    -
    IOPORT_CFG_DRIVE_B01 

    Sets the IOLH register value to b'01.

    -
    IOPORT_CFG_DRIVE_B10 

    Sets the IOLH register value to b'10.

    -
    IOPORT_CFG_DRIVE_B11 

    Sets the IOLH register value to b'11.

    -
    IOPORT_CFG_TINT_DISABLE 

    Disable IRQ functionality for a pin.

    -
    IOPORT_CFG_TINT_ENABLE 

    Sets pin as an IRQ pin.

    -
    IOPORT_CFG_SLEW_RATE_SLOW 

    Sets the pin slew-rate to slow.

    -
    IOPORT_CFG_SLEW_RATE_FAST 

    Sets the pin slew-rate to fast.

    -
    IOPORT_CFG_SLEW_RATE_FLAT 

    DEPRECATED Sets the pin slew-rate to flat.

    -
    IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_DISABLE 

    Disable input the pin of special purpose port.

    -
    IOPORT_CFG_SPECIAL_PURPOSE_PORT_INPUT_ENABLE 

    Sets the pin of special purpose port to input.

    -
    IOPORT_CFG_NOISE_FILTER_OFF 

    Noise filter disable.

    -
    IOPORT_CFG_NOISE_FILTER_ON 

    Noise filter enable.

    -
    IOPORT_CFG_NOISE_FILTER_NUM_4STAGE 

    Sets the pin noise filter to 4-stage filter.

    -
    IOPORT_CFG_NOISE_FILTER_NUM_8STAGE 

    Sets the pin noise filter to 8-stage filter.

    -
    IOPORT_CFG_NOISE_FILTER_NUM_12STAGE 

    Sets the pin noise filter to 12-stage filter.

    -
    IOPORT_CFG_NOISE_FILTER_NUM_16STAGE 

    Sets the pin noise filter to 16-stage filter.

    -
    IOPORT_CFG_NOISE_FILTER_NOT_DIVIDED 

    Noise filter not divided.

    -
    IOPORT_CFG_NOISE_FILTER_DIVIDED_9000 

    Noise filter divided by 9000.

    -
    IOPORT_CFG_NOISE_FILTER_DIVIDED_18000 

    Noise filter divided by 18000.

    -
    IOPORT_CFG_NOISE_FILTER_DIVIDED_36000 

    Noise filter divided by 36000.

    -
    IOPORT_CFG_PERIPHERAL_PIN 

    Enables pin to operate as a peripheral pin.

    -
    - -
    -

    ◆ ioport_pwpr_t

    @@ -1059,7 +734,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

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] ], [ "ioport_pwpr_t", "group___i_o_p_o_r_t___a_p_i.html#ga25ef8d1291cc073dd48f57b16d91c13e", [ [ "IOPORT_PFS_WRITE_DISABLE", "group___i_o_p_o_r_t___a_p_i.html#gga25ef8d1291cc073dd48f57b16d91c13eaf67cf250303fd4692c46717f0b7a9412", null ], [ "IOPORT_PFS_WRITE_ENABLE", "group___i_o_p_o_r_t___a_p_i.html#gga25ef8d1291cc073dd48f57b16d91c13ea5d94e8d4ba61664a407a0d84538fc298", null ] diff --git a/group___m_h_u___a_p_i.html b/group___m_h_u___a_p_i.html index 6595253..0838253 100644 --- a/group___m_h_u___a_p_i.html +++ b/group___m_h_u___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: MHU Interface (for secure and non secure channels) +RZV Flexible Software Package Documentation: MHU Interface (for secure and non secure channels) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -108,7 +176,9 @@

    Implemented by:

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    Message Handling Unit for non secure channels (r_mhu_ns)
    Modules
    +
    Message Handling Unit for non secure channels (r_mhu_ns)
    Modules » Connectivity

    @@ -296,6 +366,8 @@

    Implemented as
    Parameters
    @@ -322,6 +394,8 @@

    Implemented as

    Parameters
    @@ -348,6 +422,8 @@

    Implemented as

    Parameters
    @@ -376,6 +452,8 @@

    Implemented as

    Parameters
    @@ -472,7 +550,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_h_u___b___n_s.html b/group___m_h_u___b___n_s.html new file mode 100644 index 0000000..92ad964 --- /dev/null +++ b/group___m_h_u___b___n_s.html @@ -0,0 +1,440 @@ + + + + + + + +RZV Flexible Software Package Documentation: Message Handling Unit for non secure channels (r_mhu_b_ns) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
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    + + + + + + + +
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    + +
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    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    Message Handling Unit for non secure channels (r_mhu_b_ns)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_MHU_B_NS_Open (mhu_ctrl_t *p_ctrl, mhu_cfg_t const *const p_cfg)
     
    fsp_err_t R_MHU_B_NS_MsgSend (mhu_ctrl_t *const p_ctrl, uint32_t const msg)
     
    fsp_err_t R_MHU_B_NS_Close (mhu_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MHU_B_NS_CallbackSet (mhu_ctrl_t *const p_api_ctrl, void(*p_callback)(mhu_callback_args_t *), void const *const p_context, mhu_callback_args_t *const p_callback_memory)
     
    void R_MHU_B_NS_IsrSub (uint32_t irq)
     
    +

    Detailed Description

    +

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).

    +

    +Overview

    +

    MHU is a function for message communication between:

    +
      +
    • Cortex-A55, Cortex-M33 and Cortex-R8 cores incorporated in RZ/V2H.
      • +
    +

    Message communication is done by shared RAM for passing message and response between CPUs and the function (MHU) for notifying when messages and responses are stored in the memory.

    +

    +Features

    +

    The MHU_B_NS module supports the following features:

    +
      +
    • Generate interrupt to notify each core of RZ MPUs when the message/response is stored in shared RAM.
      • +
    • Receive interrupt when the message/response is stored by each core of RZ MPUs in shared RAM.
      • +
    + + + + +

    +Data Structures

    struct  mhu_b_ns_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ mhu_b_ns_instance_ctrl_t

    + +
    +
    + + + + +
    struct mhu_b_ns_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when mhu_api_t::open is called.

    +
    + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Indicates whether the open() API has been successfully called.
     
    +mhu_cfg_t const * p_cfg
     Pointer to instance configuration.
     
    +R_MHU0_Type * p_regs
     Base register for this channel.
     
    +uint32_t channel
     channel
     
    +mhu_send_type_t send_type
     Send Type: Message or Response.
     
    +uint32_t * p_shared_memory_tx
     Pointer to send data area.
     
    +uint32_t * p_shared_memory_rx
     Pointer to recv data area.
     
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_MHU_B_NS_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_NS_Open (mhu_ctrl_t *const p_ctrl,
    mhu_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the MHU_B_NS module instance. Implements mhu_api_t::open.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSInitialization was successful.
    FSP_ERR_ASSERTIONA required input pointer is NULL.
    FSP_ERR_ALREADY_OPENR_MHU_B_NS_Open has already been called for this p_ctrl.
    FSP_ERR_INVALID_ARGUMENTThe specified IRQ number is invalid.
    FSP_ERR_INVALID_CHANNELRequested channel number is not available on MHU_B_NS.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_MsgSend()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_NS_MsgSend (mhu_ctrl_t *const p_ctrl,
    uint32_t const msg 
    )
    +
    +

    Send message via MHU. Implements mhu_api_t::msgSend.

    +
    Return values
    + + + + +
    FSP_SUCCESSSend message successfully.
    FSP_ERR_ASSERTIONA required pointer was NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MHU_B_NS_Close (mhu_ctrl_t *const p_ctrl)
    +
    +

    Disables interrupts, clears internal driver data. mhu_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSMHU_B_NS closed.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_NS_CallbackSet (mhu_ctrl_t *const p_api_ctrl,
    void(*)(mhu_callback_args_t *) p_callback,
    void const *const p_context,
    mhu_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback with the option to provide memory for the callback argument structure. Implements mhu_api_t::callbackSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_IsrSub()

    + +
    +
    + + + + + + + + +
    void R_MHU_B_NS_IsrSub (uint32_t irq)
    +
    +

    MHU_B_NS receive interrupt sub function (for OpenAMP)

    +
    Parameters
    + + +
    [in]irqirq number for inter-core interrupt
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___m_h_u___b___n_s.js b/group___m_h_u___b___n_s.js new file mode 100644 index 0000000..d4c9018 --- /dev/null +++ b/group___m_h_u___b___n_s.js @@ -0,0 +1,17 @@ +var group___m_h_u___b___n_s = +[ + [ "mhu_b_ns_instance_ctrl_t", "group___m_h_u___b___n_s.html#structmhu__b__ns__instance__ctrl__t", [ + [ "open", "group___m_h_u___b___n_s.html#af4c1fc022c5b71589516dd2ca5789a92", null ], + [ "p_cfg", "group___m_h_u___b___n_s.html#ab0e659a5bf2d3dbc21790c60e55e3502", null ], + [ "p_regs", "group___m_h_u___b___n_s.html#ad68f27c0f8259cfb7a6d58727c56b67c", null ], + [ "channel", "group___m_h_u___b___n_s.html#a32ff5d194f38c43784c59191c7883e76", null ], + [ "send_type", "group___m_h_u___b___n_s.html#a644305cfbb2917f04ceeea349b8849a6", null ], + [ "p_shared_memory_tx", "group___m_h_u___b___n_s.html#a697b7be0ff6ea5e30819c4936991a032", null ], + [ "p_shared_memory_rx", "group___m_h_u___b___n_s.html#aba2ed695735df5ae0890447008554a1a", null ] + ] ], + [ "R_MHU_B_NS_Open", "group___m_h_u___b___n_s.html#gafb961a25b2c2e6b965dfa1ba580450f5", null ], + [ "R_MHU_B_NS_MsgSend", "group___m_h_u___b___n_s.html#ga1bba9825f978e9a56d75d167a7b5b179", null ], + [ "R_MHU_B_NS_Close", "group___m_h_u___b___n_s.html#gaa7e509b5c668cf5926959cb50f53ea06", null ], + [ "R_MHU_B_NS_CallbackSet", "group___m_h_u___b___n_s.html#ga0e9a0ab284383893a02ab288ac885ee8", null ], + [ "R_MHU_B_NS_IsrSub", "group___m_h_u___b___n_s.html#gac10ebe6ec0a9dfc34d9b512bbf3fa66e", null ] +]; \ No newline at end of file diff --git a/group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html b/group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html new file mode 100644 index 0000000..ec36aab --- /dev/null +++ b/group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html @@ -0,0 +1,393 @@ + + + + + + + +RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt receive (r_mhu_b_ns_swint_get) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    Message Handling Unit for non-secure software interrupt receive (r_mhu_b_ns_swint_get)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + +

    +Functions

    fsp_err_t R_MHU_B_NS_SWINT_GET_Open (mhu_ns_swint_get_ctrl_t *p_ctrl, mhu_ns_swint_get_cfg_t const *const p_cfg)
     
    fsp_err_t R_MHU_B_NS_SWINT_GET_Close (mhu_ns_swint_get_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MHU_B_NS_SWINT_GET_CallbackSet (mhu_ns_swint_get_ctrl_t *const p_api_ctrl, void(*p_callback)(mhu_ns_swint_get_callback_args_t *), void const *const p_context, mhu_ns_swint_get_callback_args_t *const p_callback_memory)
     
    void R_MHU_B_NS_SWINT_GET_IsrSub (uint32_t irq)
     
    +

    Detailed Description

    +

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get).

    +

    +Overview

    +

    MHU is a function for message communication between:

    +
      +
    • Cortex-A55, Cortex-M33 and Cortex-R8 cores incorporated in RZ/V2H.
      • +
    +

    +Features

    +

    The MHU_B_NS_SWINT_GET module supports the following features:

    +
      +
    • Receive interrupt when the message/response is stored by each core of RZ MPUs in shared RAM.
      • +
    + + + + +

    +Data Structures

    struct  mhu_b_ns_swint_get_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ mhu_b_ns_swint_get_instance_ctrl_t

    + +
    +
    + + + + +
    struct mhu_b_ns_swint_get_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when mhu_ns_swint_get_api_t::open is called.

    +
    + + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Indicates whether the open() API has been successfully called.
     
    +mhu_ns_swint_get_cfg_t const * p_cfg
     Pointer to instance configuration.
     
    +R_MHU_SWINT0_Type * p_regs
     Base register for this channel.
     
    +uint32_t channel
     channel
     
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_MHU_B_NS_SWINT_GET_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_NS_SWINT_GET_Open (mhu_ns_swint_get_ctrl_t *const p_ctrl,
    mhu_ns_swint_get_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the MHU_B_NS_SWINT_GET module instance. Implements mhu_ns_swint_get_api_t::open.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSInitialization was successful.
    FSP_ERR_ASSERTIONA required input pointer is NULL.
    FSP_ERR_ALREADY_OPENR_MHU_B_NS_SWINT_GET_Open has already been called for this p_ctrl.
    FSP_ERR_INVALID_ARGUMENTThe specified IRQ number is invalid.
    FSP_ERR_INVALID_CHANNELRequested channel number is not available on MHU_B_NS_SWINT_GET.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_SWINT_GET_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MHU_B_NS_SWINT_GET_Close (mhu_ns_swint_get_ctrl_t *const p_ctrl)
    +
    +

    Disables interrupts, clears internal driver data. mhu_ns_swint_get_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSMHU_B_NS_SWINT_GET closed.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_SWINT_GET_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_NS_SWINT_GET_CallbackSet (mhu_ns_swint_get_ctrl_t *const p_api_ctrl,
    void(*)(mhu_ns_swint_get_callback_args_t *) p_callback,
    void const *const p_context,
    mhu_ns_swint_get_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback with the option to provide memory for the callback argument structure. Implements mhu_ns_swint_get_api_t::callbackSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_SWINT_GET_IsrSub()

    + +
    +
    + + + + + + + + +
    void R_MHU_B_NS_SWINT_GET_IsrSub (uint32_t irq)
    +
    +

    MHU_B_NS_SWINT_GET receive interrupt sub function (for OpenAMP)

    +
    Parameters
    + + +
    [in]irq
    +
    +
    +
    Return values
    + + +
    none.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.js b/group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.js new file mode 100644 index 0000000..fa1c8ae --- /dev/null +++ b/group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.js @@ -0,0 +1,13 @@ +var group___m_h_u___b___n_s___s_w_i_n_t___g_e_t = +[ + [ "mhu_b_ns_swint_get_instance_ctrl_t", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#structmhu__b__ns__swint__get__instance__ctrl__t", [ + [ "open", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#a4f56a5fad7755cca0501ce4641ed6979", null ], + [ "p_cfg", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#a0eefba6634fa0bc1909fcd1fc46ca7da", null ], + [ "p_regs", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#af80195b0968f9c69dfd0c89fa645ac4f", null ], + [ "channel", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#a03917ba43d92ba64f3ceff9d2a5ed8f6", null ] + ] ], + [ "R_MHU_B_NS_SWINT_GET_Open", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#gafd2f119cc386c1672bf465ccefb498c3", null ], + [ "R_MHU_B_NS_SWINT_GET_Close", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#gadab533dca3f9ebbd37eddda34b8269fe", null ], + [ "R_MHU_B_NS_SWINT_GET_CallbackSet", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#ga662917c72899887e1ddd67cce497c732", null ], + [ "R_MHU_B_NS_SWINT_GET_IsrSub", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html#ga8a7c2ba26a5025d177316a6a5981c706", null ] +]; \ No newline at end of file diff --git a/group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html b/group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html new file mode 100644 index 0000000..6c1811c --- /dev/null +++ b/group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html @@ -0,0 +1,344 @@ + + + + + + + +RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt generation (r_mhu_b_ns_swint_set) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    Message Handling Unit for non-secure software interrupt generation (r_mhu_b_ns_swint_set)
    Modules » Connectivity
    +
    +
    + + + + + + + + +

    +Functions

    fsp_err_t R_MHU_B_NS_SWINT_SET_Open (mhu_ns_swint_set_ctrl_t *p_ctrl, mhu_ns_swint_set_cfg_t const *const p_cfg)
     
    fsp_err_t R_MHU_B_NS_SWINT_SET_InterruptSet (mhu_ns_swint_set_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MHU_B_NS_SWINT_SET_Close (mhu_ns_swint_set_ctrl_t *const p_ctrl)
     
    +

    Detailed Description

    +

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set).

    +

    +Overview

    +

    MHU is a function for message communication between:

    +
      +
    • Cortex-A55, Cortex-M33 and Cortex-R8 cores incorporated in RZ/V2H.
      • +
    +

    +Features

    +

    The MHU_B_NS_SWINT_SET module supports the following features:

    +
      +
    • Generate software interrupt via MHU.
      • +
    + + + + +

    +Data Structures

    struct  mhu_b_ns_swint_set_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ mhu_b_ns_swint_set_instance_ctrl_t

    + +
    +
    + + + + +
    struct mhu_b_ns_swint_set_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when mhu_ns_swint_set_api_t::open is called.

    +
    + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +open +Indicates whether the open() API has been successfully called.
    +mhu_ns_swint_set_cfg_t const * +p_cfg +Pointer to instance configuration.
    +R_MHU_SWINT0_Type * +p_regs +Base register for this channel.
    +uint32_t +channel +channel
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_MHU_B_NS_SWINT_SET_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_NS_SWINT_SET_Open (mhu_ns_swint_set_ctrl_t *const p_ctrl,
    mhu_ns_swint_set_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the MHU_B_NS_SWINT_SET module instance. Implements mhu_ns_swint_set_api_t::open.

    +
    Return values
    + + + + + +
    FSP_SUCCESSInitialization was successful.
    FSP_ERR_ASSERTIONA required input pointer is NULL.
    FSP_ERR_ALREADY_OPENR_MHU_B_NS_SWINT_SET_Open has already been called for this p_ctrl.
    FSP_ERR_INVALID_CHANNELRequested channel number is not available on MHU_B_NS_SWINT_SET.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_SWINT_SET_InterruptSet()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MHU_B_NS_SWINT_SET_InterruptSet (mhu_ns_swint_set_ctrl_t *const p_ctrl)
    +
    +

    Set Interrupt via MHU. Implements mhu_ns_swint_set_api_t::interruptSet.

    +
    Return values
    + + + + +
    FSP_SUCCESSSet interrupt successfully.
    FSP_ERR_ASSERTIONA required pointer was NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_NS_SWINT_SET_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MHU_B_NS_SWINT_SET_Close (mhu_ns_swint_set_ctrl_t *const p_ctrl)
    +
    +

    Disables interrupts, clears internal driver data. mhu_ns_swint_set_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSMHU_B_NS_SWINT_SET closed.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.js b/group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.js new file mode 100644 index 0000000..2b4f972 --- /dev/null +++ b/group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.js @@ -0,0 +1,12 @@ +var group___m_h_u___b___n_s___s_w_i_n_t___s_e_t = +[ + [ "mhu_b_ns_swint_set_instance_ctrl_t", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#structmhu__b__ns__swint__set__instance__ctrl__t", [ + [ "open", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#a62ec267ef9eb17835f70e99d23c9e840", null ], + [ "p_cfg", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#aceefb97edf194ab8591a4b3977f3c153", null ], + [ "p_regs", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#ae4b9ea02a0965d8918fa729c6b19e8b6", null ], + [ "channel", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#ac237427a57125c109907a6f027aa7bb2", null ] + ] ], + [ "R_MHU_B_NS_SWINT_SET_Open", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#gaba5433742015125a5bf5d8e3ef75b980", null ], + [ "R_MHU_B_NS_SWINT_SET_InterruptSet", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#gaddd83232518e56d27b705f7c8fc99f17", null ], + [ "R_MHU_B_NS_SWINT_SET_Close", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html#gae96425edecc8f21ed9681028dfb81019", null ] +]; \ No newline at end of file diff --git a/group___m_h_u___b___s.html b/group___m_h_u___b___s.html new file mode 100644 index 0000000..33ecef3 --- /dev/null +++ b/group___m_h_u___b___s.html @@ -0,0 +1,439 @@ + + + + + + + +RZV Flexible Software Package Documentation: Message Handling Unit for secure channels (r_mhu_b_s) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    Message Handling Unit for secure channels (r_mhu_b_s)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_MHU_B_S_Open (mhu_ctrl_t *p_ctrl, mhu_cfg_t const *const p_cfg)
     
    fsp_err_t R_MHU_B_S_MsgSend (mhu_ctrl_t *const p_ctrl, uint32_t const msg)
     
    fsp_err_t R_MHU_B_S_Close (mhu_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MHU_B_S_CallbackSet (mhu_ctrl_t *const p_api_ctrl, void(*p_callback)(mhu_callback_args_t *), void const *const p_context, mhu_callback_args_t *const p_callback_memory)
     
    void R_MHU_B_S_IsrSub (uint32_t irq)
     
    +

    Detailed Description

    +

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).

    +

    +Overview

    +
      +
    • Cortex-A55, Cortex-M33 and Cortex-R8 cores incorporated in RZ/V2H.
      • +
    +

    Message communication is done by shared RAM for passing message and response between CPUs and the function (MHU) for notifying when messages and responses are stored in the memory.

    +

    +Features

    +

    The MHU_B_S module supports the following features:

    +
      +
    • Generate interrupt to notify each core of RZ MPUs when the message/response is stored in shared RAM.
      • +
    • Receive interrupt when the message/response is stored by each core of RZ MPUs in shared RAM.
      • +
    + + + + +

    +Data Structures

    struct  mhu_b_s_instance_ctrl_t
     
    +

    Data Structure Documentation

    + +

    ◆ mhu_b_s_instance_ctrl_t

    + +
    +
    + + + + +
    struct mhu_b_s_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when mhu_api_t::open is called.

    +
    + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Indicates whether the open() API has been successfully called.
     
    +mhu_cfg_t const * p_cfg
     Pointer to instance configuration.
     
    +R_MHU0_Type * p_regs
     Base register for this channel.
     
    +uint32_t channel
     channel
     
    +mhu_send_type_t send_type
     Send Type: Message or Response.
     
    +uint32_t * p_shared_memory_tx
     Pointer to send data area.
     
    +uint32_t * p_shared_memory_rx
     Pointer to recv data area.
     
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_MHU_B_S_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_S_Open (mhu_ctrl_t *const p_ctrl,
    mhu_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the MHU_B_S module instance. Implements mhu_api_t::open.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSInitialization was successful.
    FSP_ERR_ASSERTIONA required input pointer is NULL.
    FSP_ERR_ALREADY_OPENR_MHU_B_S_Open has already been called for this p_ctrl.
    FSP_ERR_INVALID_ARGUMENTThe specified IRQ number is invalid.
    FSP_ERR_INVALID_CHANNELRequested channel number is not available on MHU_B_S.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_S_MsgSend()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_S_MsgSend (mhu_ctrl_t *const p_ctrl,
    uint32_t const msg 
    )
    +
    +

    Send message via MHU. Implements mhu_api_t::msgSend.

    +
    Return values
    + + + + +
    FSP_SUCCESSSend message successfully.
    FSP_ERR_ASSERTIONA required pointer was NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_S_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MHU_B_S_Close (mhu_ctrl_t *const p_ctrl)
    +
    +

    Disables interrupts, clears internal driver data. mhu_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSMHU_B_S closed.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENThe instance control structure is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_S_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MHU_B_S_CallbackSet (mhu_ctrl_t *const p_api_ctrl,
    void(*)(mhu_callback_args_t *) p_callback,
    void const *const p_context,
    mhu_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback with the option to provide memory for the callback argument structure. Implements mhu_api_t::callbackSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_MHU_B_S_IsrSub()

    + +
    +
    + + + + + + + + +
    void R_MHU_B_S_IsrSub (uint32_t irq)
    +
    +

    MHU_B_S receive interrupt sub function (for OpenAMP)

    +
    Parameters
    + + +
    [in]irqirq number for inter-core interrupt
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___m_h_u___b___s.js b/group___m_h_u___b___s.js new file mode 100644 index 0000000..4b83d0a --- /dev/null +++ b/group___m_h_u___b___s.js @@ -0,0 +1,17 @@ +var group___m_h_u___b___s = +[ + [ "mhu_b_s_instance_ctrl_t", "group___m_h_u___b___s.html#structmhu__b__s__instance__ctrl__t", [ + [ "open", "group___m_h_u___b___s.html#a294d326c6a08e1f19a58d2a2bbc88ca5", null ], + [ "p_cfg", "group___m_h_u___b___s.html#a3b97d7aeb81bea198e1a0d059636094f", null ], + [ "p_regs", "group___m_h_u___b___s.html#a2b8c58c859b360c49f9c132b8e9e56eb", null ], + [ "channel", "group___m_h_u___b___s.html#a9b896e827be8d101095eb1d8c67afc89", null ], + [ "send_type", "group___m_h_u___b___s.html#ac6ee77183a51d7a53d2f9568318fda9b", null ], + [ "p_shared_memory_tx", "group___m_h_u___b___s.html#aa89c2c59032c4f93ba53b8a8aaeec31c", null ], + [ "p_shared_memory_rx", "group___m_h_u___b___s.html#a910e0327342316a77edb79f80e2beb2e", null ] + ] ], + [ "R_MHU_B_S_Open", "group___m_h_u___b___s.html#ga0b3f80725bd550c0ad45e65a2b1ce84d", null ], + [ "R_MHU_B_S_MsgSend", "group___m_h_u___b___s.html#gad99b4c1d18e5981c75895a2578765c55", null ], + [ "R_MHU_B_S_Close", "group___m_h_u___b___s.html#gac6ff12104bd7bf87ad37d80b447b3fe8", null ], + [ "R_MHU_B_S_CallbackSet", "group___m_h_u___b___s.html#gad7c066b75da3fbe82844c1474d6a3f07", null ], + [ "R_MHU_B_S_IsrSub", "group___m_h_u___b___s.html#ga0222baa1c79edc091f8676c719d32c1b", null ] +]; \ No newline at end of file diff --git a/group___m_h_u___n_s.html b/group___m_h_u___n_s.html index 97c031b..d593260 100644 --- a/group___m_h_u___n_s.html +++ b/group___m_h_u___n_s.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Message Handling Unit for non secure channels (r_mhu_ns) +RZV Flexible Software Package Documentation: Message Handling Unit for non secure channels (r_mhu_ns) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -115,13 +183,17 @@

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).

    Overview

    -

    MHU is a function for message communication between Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L. Message communication is done by shared RAM (On-chip RAM) for passing message and response between CPUs and the function (MHU) for notifying when messages and responses are stored in the memory.

    +

    MHU is a function for message communication between:

    +
      +
    • Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L.
      • +
    +

    Message communication is done by shared RAM for passing message and response between CPUs and the function (MHU) for notifying when messages and responses are stored in the memory.

    Features

    The MHU_NS module supports the following features:

      -
    • Generete interrupt to notify Cortex-A55 when the message/response is stored in shared RAM(On-chip RAM).
      • -
    • Receive interrupt when the message/response is stored by Cortex-A55 in shared RAM(On-chip RAM).
      • +
    • Generate interrupt to notify each core of RZ MPUs when the message/response is stored in shared RAM.
      • +
    • Receive interrupt when the message/response is stored by each core of RZ MPUs in shared RAM.
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)
    Modules
    +
    Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)
    Modules » Connectivity

    @@ -361,7 +433,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_h_u___n_s___s_w_i_n_t___g_e_t.html b/group___m_h_u___n_s___s_w_i_n_t___g_e_t.html index 20a5373..0dcbf2e 100644 --- a/group___m_h_u___n_s___s_w_i_n_t___g_e_t.html +++ b/group___m_h_u___n_s___s_w_i_n_t___g_e_t.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get) +RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -113,12 +181,15 @@

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get).

    Overview

    -

    MHU is a function for message communication between Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L.

    +

    MHU is a function for message communication between:

    +
      +
    • Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L.
      • +

    Features

    The MHU_NS_SWINT_GET module supports the following features:

      -
    • Receive interrupt when the software interrupt is set by Cortex-A55.
      • +
    • Receive interrupt when the message/response is stored by each core of RZ MPUs in shared RAM.
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -105,7 +173,8 @@

  • Receive interrupt when the software interrupt is set by Cortex-A55.

    • Implemented by:

    @@ -315,7 +386,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i.html b/group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i.html index 6b474c9..4e1fd92 100644 --- a/group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i.html +++ b/group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: MHU Interface (Software Interrupt Get) +RZV Flexible Software Package Documentation: MHU Interface (Software Interrupt Get) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)
    Modules
    +
    Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)
    Modules » Connectivity

    @@ -275,6 +344,7 @@

    Opens the MHU driver and initializes the hardware.

    Implemented as
    Parameters
    @@ -300,6 +370,7 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    Parameters
    @@ -327,6 +398,7 @@

    Closes the driver and releases the MHU device.

    Implemented as
    Parameters
    @@ -402,7 +474,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_h_u___n_s___s_w_i_n_t___s_e_t.html b/group___m_h_u___n_s___s_w_i_n_t___s_e_t.html index e1ba9c9..1dc3137 100644 --- a/group___m_h_u___n_s___s_w_i_n_t___s_e_t.html +++ b/group___m_h_u___n_s___s_w_i_n_t___s_e_t.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set) +RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -111,7 +179,10 @@

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set).

    Overview

    -

    MHU is a function for message communication between Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L.

    +

    MHU is a function for message communication between:

    +
      +
    • Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L.
      • +

    Features

    The MHU_NS_SWINT_SET module supports the following features:

    @@ -266,7 +337,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i.html b/group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i.html index 0e5ea32..387e4f6 100644 --- a/group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i.html +++ b/group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: MHU Interface (Software Interrupt Set) +RZV Flexible Software Package Documentation: MHU Interface (Software Interrupt Set) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -105,7 +173,8 @@

  • Generate software interrupt via MHU.

    • Implemented by:

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    Message Handling Unit for secure channels (r_mhu_s)
    Modules
    +
    Message Handling Unit for secure channels (r_mhu_s)
    Modules » Connectivity

    @@ -223,6 +292,7 @@

    Opens the MHU driver and initializes the hardware.

    Implemented as
    Parameters
    @@ -248,6 +318,7 @@

    Performs a send operation on an MHU device.

    Implemented as
    Parameters
    @@ -272,6 +343,7 @@

    Closes the driver and releases the MHU device.

    Implemented as
    Parameters
    @@ -347,7 +419,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_h_u___s.html b/group___m_h_u___s.html index 6c3e620..5c2012e 100644 --- a/group___m_h_u___s.html +++ b/group___m_h_u___s.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Message Handling Unit for secure channels (r_mhu_s) +RZV Flexible Software Package Documentation: Message Handling Unit for secure channels (r_mhu_s) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -115,13 +183,16 @@

    Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).

    Overview

    -

    MHU is a function for message communication between Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L. Message communication is done by shared RAM (On-chip RAM) for passing message and response between CPUs and the function (MHU) for notifying when messages and responses are stored in the memory.

    +
      +
    • Cortex-A55 and Cortex-M33 cores incorporated in RZ/V2L.
      • +
    +

    Message communication is done by shared RAM for passing message and response between CPUs and the function (MHU) for notifying when messages and responses are stored in the memory.

    Features

    The MHU_S module supports the following features:

      -
    • Generete interrupt to notify Cortex-A55 when the message/response is stored in shared RAM(On-chip RAM).
      • -
    • Receive interrupt when the message/response is stored by Cortex-A55 in shared RAM(On-chip RAM).
      • +
    • Generate interrupt to notify each core of RZ MPUs when the message/response is stored in shared RAM.
      • +
    • Receive interrupt when the message/response is stored by each core of RZ MPUs in shared RAM.
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    Port Output Enable for GPT (r_poeg)
    Modules
    +
    Port Output Enable for GPT (r_poeg)
    Modules » Timers

    @@ -361,7 +432,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___m_t_u3.html b/group___m_t_u3.html new file mode 100644 index 0000000..fe3c746 --- /dev/null +++ b/group___m_t_u3.html @@ -0,0 +1,1922 @@ + + + + + + + +RZV Flexible Software Package Documentation: Multi-Function Timer Pulse Unit 3 (r_mtu3) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Enumerations
    +
    +
    Multi-Function Timer Pulse Unit 3 (r_mtu3)
    Modules » Timers
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_MTU3_Open (timer_ctrl_t *const p_ctrl, timer_cfg_t const *const p_cfg)
     
    fsp_err_t R_MTU3_Stop (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MTU3_Start (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MTU3_Reset (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MTU3_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)
     
    fsp_err_t R_MTU3_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)
     
    fsp_err_t R_MTU3_InfoGet (timer_ctrl_t *const p_ctrl, timer_info_t *const p_info)
     
    fsp_err_t R_MTU3_StatusGet (timer_ctrl_t *const p_ctrl, timer_status_t *const p_status)
     
    fsp_err_t R_MTU3_CounterSet (timer_ctrl_t *const p_ctrl, uint32_t counter)
     
    fsp_err_t R_MTU3_OutputEnable (timer_ctrl_t *const p_ctrl, mtu3_output_pin_t pin_level)
     
    fsp_err_t R_MTU3_OutputDisable (timer_ctrl_t *const p_ctrl, mtu3_io_pin_t pin)
     
    fsp_err_t R_MTU3_Enable (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MTU3_Disable (timer_ctrl_t *const p_ctrl)
     
    fsp_err_t R_MTU3_AdcTriggerSet (timer_ctrl_t *const p_ctrl, mtu3_adc_compare_match_t which_compare_match, uint16_t compare_match_value)
     
    fsp_err_t R_MTU3_CallbackSet (timer_ctrl_t *const p_api_ctrl, void(*p_callback)(timer_callback_args_t *), void const *const p_context, timer_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_MTU3_Close (timer_ctrl_t *const p_ctrl)
     
    +

    Detailed Description

    +

    Driver for the MTU3 peripherals on RZ microprocessor. This module implements the Timer Interface.

    +

    +Overview

    +

    The MTU3 module can be used to measure external input signals, generate a periodic interrupt, or output a periodic or PWM signal to a MTIOC pin.

    +

    This module supports the MTU3 peripherals are 16-bit timer and 32-bit timer. All the timer are treated the same in this module from the API perspective.

    + + + + + +
    16-bit timer 32-bit timer
    RZ/V2L ch0 to ch7 ch8
    +

    This driver is supported only in RZ/V2L.

    +

    +Features

    +

    The MTU3 module has the following features:

      +
    • Supports normal mode and PWM mode 1.
      • +
    • Supports count source of PCLK, MTCLK pins, MTIOC pins.
      • +
    • Supports noise filter on MTCLK pins, MTIOC pins.
      • +
    • Signal can be output to a pin.
      • +
    • Configurable period (counts per timer cycle).
      • +
    • Configurable duty cycle in PWM mode.
      • +
    • Supports runtime reconfiguration of period.
      • +
    • Supports runtime reconfiguration of duty cycle in PWM mode.
      • +
    • APIs are provided to start, stop, and reset the counter.
      • +
    • APIs are provided to get the current period, source clock frequency, and count direction.
      • +
    • APIs are provided to get the current timer status and counter value.
      • +
    • Supports PWM waveform generation.
      • +
    • Supports setting the counter value while the timer is stopped.
      • +
    • Supports enabling and disabling output pins.
      • +
    • Supports skipping overflow / comparison match interrupts for specific channels
      • +
    • Supports buffer operation.
      • +
    • Supports start an ADC scan at a compare match value and updating the compare match value.
        +
      • A/D Converter Activation by TGRA Input Capture/Compare Match
        • +
      • A/D Converter Activation by A/D Converter Start Request Delaying Function
        • +
      +
      • +
    +

    The following functions are not supported.

      +
    • Phase counting mode.
      • +
    • Cascade connection operation.
      • +
    • Reset-synchronized PWM mode.
      • +
    • Complementary PWM mode.
      • +
    • Synchronous operation.
      • +
    • Operation as a dead-time compensation counter.
      • +
    • PWM mode 2.
      • +
    • A/D Converter Activation by Compare Match between MTU0.TCNT and MTU0.TGRE.
      • +
    • Three Phase Function (MTU5).
      • +
    +

    +Selecting a Timer

    +

    RZ MPUs have two timer peripherals: the Multi-Function Timer Pulse Unit 3 (MTU3) and the General Timer (GTM). When selecting between them, consider these factors:

    + + + + + + + + + +
    MTU3 GTM
    Available ChannelsThe number of MTU3 channels is device specific. All currently supported MPUs have at least 8 MTU3 channels.All MPUs have 3 GTM channels.
    Timer ResolutionAll MPUs have at least one 16-bit MTU3 timer.The GTM timers are 32-bit timers.
    Clock SourceThe MTU3 runs off P0 clock with a configurable divider up to 1024.The GTM runs off P0 clock.
    +

    +Configuration

    +

    Build Time Configurations for r_mtu3

    +The following build time configurations are defined in fsp_cfg/r_mtu3_cfg.h:
    +

    + + + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    Pin Output Support
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled If selected code for outputting a waveform to a pin is included in the build.
    +

    Configurations for Timers > Timer Driver on r_mtu3

    +This module can be added to the Stacks tab via New Stack > Timers > Timer Driver on r_mtu3.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_timer0 Module name.
    General > ChannelChannel number must exist on this MPU0 Specify the hardware channel.
    General > Mode
      +
    • +Periodic
      • +
    • +PWM
      • +
    +    		Periodic Mode selection.
    +Periodic: Generates periodic interrupts or square waves.
    +One-shot: Generate a single interrupt or a pulse wave. Note: One-shot mode is implemented in software. ISRs must be enabled for one-shot even if callback is unused.
    +PWM: Generates basic PWM waveforms.
    +Triangle-Wave Symmetric PWM: Generates symmetric PWM waveforms with duty cycle determined by compare match set during a crest interrupt and updated at the next trough.
    +Triangle-Wave Asymmetric PWM: Generates asymmetric PWM waveforms with duty cycle determined by compare match set during a crest/trough interrupt and updated at the next trough/crest.
    General > TGRA(Output Compare or Input Capture Value)Value must be an integer between 1 and 65536 (0x10000).0x10000 Capture/Compare match A value.
    General > TGRB(Output Compare or Input Capture Value)Value must be an integer between 1 and 65536 (0x10000).0x10000 Capture/Compare match B value.
    General > TGRC(Output Compare or Input Capture Value)Value must be an integer between 1 and 65536 (0x10000).0x10000 Capture/Compare match C value.
    General > TGRD(Output Compare or Input Capture Value)Value must be an integer between 1 and 65536 (0x10000).0x10000 Capture/Compare match D value.
    General > Time PrescalerRefer to the RZV Configuration tool for available options.P0CLK divided by 1 (common ch) Select time prescaler.
    General > Clock Edge
      +
    • +Rising
      • +
    • +Falling
      • +
    • +Both
      • +
    +    		Rising Select clock edge.
    General > Counter Clear Source
      +
    • +Disabled
      • +
    • +TGRA
      • +
    • +TGRB
      • +
    +    		Disabled Select counter clear source.
    Noise Filter > Extarnal Clock > Enable
      +
    • +MTCLKA Enabled
      • +
    • +MTCLKB Enabled
      • +
    • +MTCLKC Enabled
      • +
    • +MTCLKD Enabled
      • +
    +    		Sets the noise filter for the external clock. Since it is a setting common to all channels, it may be overwritten by other Stacks settings.
    Noise Filter > Extarnal Clock > Clock Select
      +
    • +P0CLK divided by 1
      • +
    • +P0CLK divided by 2
      • +
    • +P0CLK divided by 8
      • +
    • +P0CLK divided by 32
      • +
    +    		P0CLK divided by 1 Select noise filter clock.
    Noise Filter > Input Capture > Enable
      +
    • +MTIOCA Enabled
      • +
    • +MTIOCB Enabled
      • +
    +    		Select whether to enable extra features on this channel.
    Noise Filter > Input Capture > Clock Select
      +
    • +P0CLK divided by 1
      • +
    • +P0CLK divided by 8
      • +
    • +P0CLK divided by 32
      • +
    • +External Clock
      • +
    +    		P0CLK divided by 1 Select noise filter clock.
    I/O Control > MTIOCnA Pin Function
      +
    • +No Output
      • +
    • +Low Output at Low compare match
      • +
    • +Low Output at High compare match
      • +
    • +Low Output at Toggle compare match
      • +
    • +High Output at Low compare match
      • +
    • +High Output at High compare match
      • +
    • +High Output at Toggle compare match
      • +
    • +Input capture at rising edge
      • +
    • +Input capture at falling edge
      • +
    • +Input capture at both edges
      • +
    +    		No Output Select TGRA initial output.
    I/O Control > MTIOCnB Pin Function
      +
    • +No Output
      • +
    • +Low Output at Low compare match
      • +
    • +Low Output at High compare match
      • +
    • +Low Output at Toggle compare match
      • +
    • +High Output at Low compare match
      • +
    • +High Output at High compare match
      • +
    • +High Output at Toggle compare match
      • +
    • +Input capture at rising edge
      • +
    • +Input capture at falling edge
      • +
    • +Input capture at both edges
      • +
    +    		No Output Select TGRB initial output.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be specified here. If this callback function is provided, it will be called from the interrupt service routine (ISR) each time the timer period elapses
    Interrupts > Overflow/Crest Interrupt EnableMCU Specific OptionsEnable the overflow interrupt.
    Interrupts > Overflow/Crest Interrupt PriorityValue must be an integer between 0 and 25524 Select the overflow interrupt priority. This is the crest interrupt for triangle-wave PWM.
    Interrupts > Capture A Interrupt EnableMCU Specific OptionsEnable the capture A interrupt.
    Interrupts > Capture A Interrupt PriorityValue must be an integer between 0 and 25524 Select the interrupt priority for capture A.
    Interrupts > Capture B Interrupt EnableMCU Specific OptionsEnable the capture B interrupt.
    Interrupts > Capture B Interrupt PriorityValue must be an integer between 0 and 25524 Select the interrupt priority for capture B.
    Extra Features > ADC Trigger > Start request cycle A (Start Request Delaying Function)Must be a valid non-negative integer with a maximum configurable value of 65535 (0xffff).0 Timer A/D Converter start request cycle A (MTU4 or MTU7).
    Extra Features > ADC Trigger > Start request cycle B (Start Request Delaying Function)Must be a valid non-negative integer with a maximum configurable value of 65535 (0xffff).0 Timer A/D Converter start request cycle B (MTU4 or MTU7).
    Extra Features > ADC Trigger > A/D Converter Activation by TGRA Input Capture/Compare Match Enable
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Select whether to enable A/D Converter Activation by TGRA Input Capture/Compare Match.
    Extra Features > Interrupt Skipping > Group A > Mode
      +
    • +Mode 1
      • +
    • +Mode 2
      • +
    +    		Mode 1 Selects interrupt skipping function 1 or 2(TIMTRA).
    Extra Features > Interrupt Skipping > Group A > TCIV4 Interrupt Skip Count
      +
    • +Not skip
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Not skip Select the number of TCIV4 interrupts to skip.
    Extra Features > Interrupt Skipping > Group A > TCIV3 Interrupt Skip Count
      +
    • +Not skip
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Not skip Select the number of TCIV3 interrupts to skip.
    Extra Features > Interrupt Skipping > Group A > TRG4AN/TRG4BN Interrupt Skip Count
      +
    • +Not skip
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Not skip Select the number of TRG4AN/TRG4BN interrupts to skip.
    Extra Features > Interrupt Skipping > Group B > Mode
      +
    • +Mode 1
      • +
    • +Mode 2
      • +
    +    		Mode 1 Selects interrupt skipping function 1 or 2(TIMTRB).
    Extra Features > Interrupt Skipping > Group B > TCIV7 Interrupt Skip Count
      +
    • +Not skip
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Not skip Select the number of TCIV7 interrupts to skip.
    Extra Features > Interrupt Skipping > Group B > TGIA6 Interrupt Skip Count
      +
    • +Not skip
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Not skip Select the number of TGIA6 interrupts to skip.
    Extra Features > Interrupt Skipping > Group B > TRG7AN/TRG7BN Interrupt Skip Count
      +
    • +Not skip
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Not skip Select the number of TRG7AN/TRG7BN interrupts to skip.
    Extra Features > Extra Features Enable
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled Select whether to enable extra features on this channel.
    +

    +

    +Clock Configuration

    +

    The MTU3 clock is based on the P0 clock frequency. You can set the P0 clock frequency using the Clocks tab of the Configuration editor.

    +

    +Pin Configuration

    +

    This module can use MTIOCA and MTIOCB pins as output pins for periodic or PWM signals.

    +

    This module can use MTIOCA and MTIOCB as input pins to measure input signals.

    +

    +Usage Notes

    +

    Updating Period and Duty Cycle

    +

    The period is updated after the next counter compare match after calling R_MTU3_PeriodSet().

    +

    The duty cycle is updated after the next counter compare match after calling R_MTU3_DutyCycleSet().

    +

    Periodic Output

    +

    The MTIOC pin toggles twice each time the timer expires in periodic mode. This is achieved by defining a PWM wave at a 50 percent duty cycle so that the period of the resulting square wave (from rising edge to rising edge) matches the period of the MTU3 timer. Since the periodic output is actually a PWM output, the time at the stop level is one cycle shorter than the time opposite the stop level for odd period values.

    +

    PWM Output

    +

    For the PWM output signal, the signal level at the start of the cycle and at the end of the cycle can be selected arbitrarily.

    +

    Interrupt Skipping

    +

    When an interrupt skipping source is selected a hardware counter will increment each time the selected event occurs. Each interrupt past the first (up to the specified skip count) will be suppressed.

    +

    +Examples

    +

    MTU3 Basic Example

    +

    This is a basic example of minimal use of the MTU3 in an application.

    +
    void mtu3_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_MTU3_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Start the timer. */
    (void) R_MTU3_Start(&g_timer0_ctrl);
    }

    MTU3 Callback Example

    +

    This is an example of a timer callback.

    +
    /* Example callback called when timer expires. */
    void timer_callback (timer_callback_args_t * p_args)
    {
    if (TIMER_EVENT_CYCLE_END == p_args->event)
    {
    /* Add application code to be called periodically here. */
    }
    }

    MTU3 Free Running Counter Example

    +

    To use the MTU3 as a free running counter, select periodic mode and set the the Period to 0xFFFF for a 16-bit timer.

    +
    void mtu3_counter_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_MTU3_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Start the timer. */
    (void) R_MTU3_Start(&g_timer0_ctrl);
    /* (Optional) Stop the timer. */
    (void) R_MTU3_Stop(&g_timer0_ctrl);
    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_MTU3_StatusGet(&g_timer0_ctrl, &status);
    }

    MTU3 Period Update Example

    +

    This an example of updating the period.

    +
    #define MTU3_EXAMPLE_MICROSEC_PER_SEC (1000000)
    #define MTU3_EXAMPLE_DESIRED_PERIOD_MICROSEC (200)
    /* This example shows how to calculate a new period value at runtime. */
    void mtu3_period_calculation_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_MTU3_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    /* Start the timer. */
    (void) R_MTU3_Start(&g_timer0_ctrl);
    /* Get the source clock frequency (in Hz). There are 3 ways to do this in FSP:
    * - If P0 clock is chosen in agt_extended_cfg_t::clock_source and the P0 clock frequency has not changed since reset,
    * - The source clock frequency is BSP_STARTUP_P0CLK_HZ >> timer_cfg_t::source_div
    * - Use the R_MTU3_InfoGet function (it accounts for the divider).
    * - Calculate the current P0 clock frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK) and right shift
    * by mtu3_extended_cfg_t::mtu3_clk_div.
    *
    * This example uses the 3rd option (R_FSP_SystemClockHzGet).
    */
    uint32_t p0clk_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK) >> g_timer0_cfg.source_div;
    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT16_MAX / p0clk_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
    (uint32_t) (((uint64_t) p0clk_freq_hz * MTU3_EXAMPLE_DESIRED_PERIOD_MICROSEC) / MTU3_EXAMPLE_MICROSEC_PER_SEC);
    /* Set the calculated period. */
    err = R_MTU3_PeriodSet(&g_timer0_ctrl, period_counts);
    handle_error(err);
    }

    MTU3 Duty Cycle Update Example

    +

    This an example of updating the duty cycle.

    +
    #define MTU3_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT (25)
    #define MTU3_EXAMPLE_MAX_PERCENT (100)
    /* This example shows how to calculate a new duty cycle value at runtime. */
    void mtu3_duty_cycle_calculation_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_MTU3_Open(&g_timer0_ctrl, &g_timer0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start the timer. */
    (void) R_MTU3_Start(&g_timer0_ctrl);
    /* Get the current period setting. */
    timer_info_t info;
    (void) R_MTU3_InfoGet(&g_timer0_ctrl, &info);
    uint32_t current_period_counts = info.period_counts;
    /* Calculate the desired duty cycle based on the current period. */
    uint32_t duty_cycle_counts = (current_period_counts * MTU3_EXAMPLE_DESIRED_DUTY_CYCLE_PERCENT) /
    MTU3_EXAMPLE_MAX_PERCENT;
    /* Set the calculated duty cycle. */
    err = R_MTU3_DutyCycleSet(&g_timer0_ctrl, duty_cycle_counts, 0);
    assert(FSP_SUCCESS == err);
    }
    + + + + + + + + + +

    +Data Structures

    struct  mtu3_output_pin_t
     
    struct  mtu3_instance_ctrl_t
     
    struct  mtu3_extended_pwm_cfg_t
     
    struct  mtu3_extended_cfg_t
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  mtu3_io_pin_level_t
     
    enum  mtu3_clock_edge_t
     
    enum  mtu3_clock_div_t
     
    enum  mtu3_tcnt_clear_t
     
    enum  mtu3_io_pin_t
     
    enum  mtu3_noise_filter_t
     
    enum  mtu3_noise_filter_mtclk_t
     
    enum  mtu3_noise_filter_clock_t
     
    enum  mtu3_noise_filter_external_clock_t
     
    enum  mtu3_interrupt_skip_mode_t
     
    enum  mtu3_interrupt_skip_count_t
     
    enum  mtu3_adc_compare_match_t
     
    enum  mtu3_adc_activation_tgra_compare_match_t
     
    +

    Data Structure Documentation

    + +

    ◆ mtu3_output_pin_t

    + +
    +
    + + + + +
    struct mtu3_output_pin_t
    +
    +

    Configurations for output pins.

    +
    + + + + + + + +
    Data Fields
    +mtu3_io_pin_level_t +output_pin_level_a +I/O Control A.
    +mtu3_io_pin_level_t +output_pin_level_b +I/O Control B.
    + +
    +
    + +

    ◆ mtu3_instance_ctrl_t

    + +
    +
    + + + + +
    struct mtu3_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when timer_api_t::open is called.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Whether or not channel is open.
     
    +const timer_cfg_t * p_cfg
     Pointer to initial configurations.
     
    +void * p_reg
     Base register for this channel.
     
    +R_MTU_Type * p_reg_com
     Base register for this channel(common ch)
     
    +void * p_reg_nf
     Base register for this channel(noise fileter)
     
    +uint32_t channel_mask
     Channel bitmask.
     
    +void(* p_callback )(timer_callback_args_t *)
     Pointer to callback.
     
    +timer_callback_args_t * p_callback_memory
     Pointer to optional callback argument memory.
     
    +void const * p_context
     Pointer to context to be passed into callback function.
     
    + +
    +
    + +

    ◆ mtu3_extended_pwm_cfg_t

    + +
    +
    + + + + +
    struct mtu3_extended_pwm_cfg_t
    +
    +

    MTU3 extension for advanced PWM features.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +mtu3_interrupt_skip_mode_t +interrupt_skip_mode_a +Selects interrupt skipping function 1 or 2(TIMTRA)
    +mtu3_interrupt_skip_mode_t +interrupt_skip_mode_b +Selects interrupt skipping function 1 or 2(TIMTRB)
    +uint16_t +adc_a_compare_match +Timer A/D Converter Start Request Cycle A (MTU4 or MTU7)
    +uint16_t +adc_b_compare_match +Timer A/D Converter Start Request Cycle B (MTU4 or MTU7)
    +mtu3_interrupt_skip_count_t +interrupt_skip_count_tciv4 +TCIV4 Interrupt Skipping Count Setting(TITCR1A)
    +mtu3_interrupt_skip_count_t +interrupt_skip_count_tgia3 +TGIA3 Interrupt Skipping Count Setting(TITCR1A)
    +mtu3_interrupt_skip_count_t +interrupt_skip_count_tciv7 +TCIV7 Interrupt Skipping Count Setting(TITCR1B)
    +mtu3_interrupt_skip_count_t +interrupt_skip_count_tgia6 +TGIA6 Interrupt Skipping Count Setting(TITCR1B)
    +mtu3_interrupt_skip_count_t +interrupt_skip_count_tgr4an_bn +TRG4AN/TRG4BN Interrupt Skipping Count Setting(TITCR2A)
    +mtu3_interrupt_skip_count_t +interrupt_skip_count_tgr7an_bn +TRG7AN/TRG7BN Interrupt Skipping Count Setting(TITCR2B)
    + +
    +
    + +

    ◆ mtu3_extended_cfg_t

    + +
    +
    + + + + +
    struct mtu3_extended_cfg_t
    +
    +

    The MTU3 extension constitutes a unique feature of MTU3.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +tgra_val +Capture/Compare match A register.
    +uint32_t +tgrb_val +Capture/Compare match B register.
    +uint32_t +tgrc_val +Capture/Compare match C register (Does not exist in MTU ch1-2)
    +uint32_t +tgrd_val +Capture/Compare match D register (Does not exist in MTU ch1-2)
    +mtu3_clock_div_t +mtu3_clk_div +Time Prescaler Select.
    +mtu3_clock_edge_t +clk_edge +Clock Edge Select.
    +mtu3_tcnt_clear_t +mtu3_clear +Counter Clear Source Select.
    +mtu3_output_pin_t +mtioc_ctrl_setting +I/O Control A, B.
    +mtu3_noise_filter_t +noise_filter_mtioc_setting +
    +mtu3_noise_filter_clock_t +noise_filter_mtioc_clk +
    +mtu3_noise_filter_mtclk_t +noise_filter_mtclk_setting +
    +mtu3_noise_filter_external_clock_t +noise_filter_mtclk_clk +
    +mtu3_adc_activation_tgra_compare_match_t +adc_activation_setting +
    +uint8_t +capture_a_ipl +Capture/Compare match A interrupt priority.
    +uint8_t +capture_b_ipl +Capture/Compare match B interrupt priority.
    +IRQn_Type +capture_a_irq +Capture/Compare match A interrupt.
    +IRQn_Type +capture_b_irq +Capture/Compare match B interrupt.
    +mtu3_extended_pwm_cfg_t const * +p_pwm_cfg +Advanced PWM features, optional.
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ mtu3_io_pin_level_t

    + +
    +
    + + + + +
    enum mtu3_io_pin_level_t
    +
    +

    I/O Level Select

    + + + + + + + + + + + +
    Enumerator
    MTU3_IO_PIN_LEVEL_NO_OUTPUT 

    Output prohibited.

    +
    MTU3_IO_PIN_LEVEL_INITIAL_LOW_COMPARE_LOW 

    Initial output is low. Low output at compare match.

    +
    MTU3_IO_PIN_LEVEL_INITIAL_LOW_COMPARE_HIGH 

    Initial output is low. High output at compare match.

    +
    MTU3_IO_PIN_LEVEL_INITIAL_LOW_COMPARE_TOGGLE 

    Initial output is low. Toggle output at compare match.

    +
    MTU3_IO_PIN_LEVEL_INITIAL_HIGH_COMPARE_LOW 

    Initial output is high. Low output at compare match.

    +
    MTU3_IO_PIN_LEVEL_INITIAL_HIGH_COMPARE_HIGH 

    Initial output is high. High output at compare match.

    +
    MTU3_IO_PIN_LEVEL_INITIAL_HIGH_COMPARE_TOGGLE 

    Initial output is high. Toggle output at compare match.

    +
    MTU3_IO_PIN_LEVEL_INPUT_RISING_EDGE 

    Input capture at rising edge.

    +
    MTU3_IO_PIN_LEVEL_INPUT_FALLING_EDGE 

    Input capture at falling edge.

    +
    MTU3_IO_PIN_LEVEL_INPUT_BOTH_EDGE 

    Input capture at both edges.

    +
    + +
    +
    + +

    ◆ mtu3_clock_edge_t

    + +
    +
    + + + + +
    enum mtu3_clock_edge_t
    +
    +

    Clock Edge Select

    + + + + +
    Enumerator
    MTU3_CLOCK_EDGE_RISING 

    Count at rising edge.

    +
    MTU3_CLOCK_EDGE_FALLING 

    Count at falling edge.

    +
    MTU3_CLOCK_EDGE_BOTH 

    Count at both edges.

    +
    + +
    +
    + +

    ◆ mtu3_clock_div_t

    + +
    +
    + + + + +
    enum mtu3_clock_div_t
    +
    +

    Time Prescaler Select

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    MTU3_CLOCK_DIV_1 

    CLOCK divided by 1 (common ch)

    +
    MTU3_CLOCK_DIV_4 

    CLOCK divided by 4 (common ch)

    +
    MTU3_CLOCK_DIV_16 

    CLOCK divided by 16 (common ch)

    +
    MTU3_CLOCK_DIV_64 

    CLOCK divided by 64 (common ch)

    +
    MTU3_CLOCK_DIV_2 

    CLOCK divided by 2 (common ch)

    +
    MTU3_CLOCK_DIV_8 

    CLOCK divided by 8 (common ch)

    +
    MTU3_CLOCK_DIV_32 

    CLOCK divided by 32 (common ch)

    +
    MTU3_CLOCK_DIV_MTCLKA_CH_0 

    External clock: counts on MTCLKA pin input (ch0)

    +
    MTU3_CLOCK_DIV_MTCLKB_CH_0 

    External clock: counts on MTCLKB pin input (ch0)

    +
    MTU3_CLOCK_DIV_MTCLKC_CH_0 

    External clock: counts on MTCLKC pin input (ch0)

    +
    MTU3_CLOCK_DIV_MTCLKD_CH_0 

    External clock: counts on MTCLKD pin input (ch0)

    +
    MTU3_CLOCK_DIV_256_CH_0 

    CLOCK divided by 256 (ch0)

    +
    MTU3_CLOCK_DIV_1024_CH_0 

    CLOCK divided by 1024 (ch0)

    +
    MTU3_CLOCK_DIV_MTIOC1A_CH_0 

    External clock: counts on MTIOC1A pin input (ch0)

    +
    MTU3_CLOCK_DIV_MTCLKA_CH_1 

    External clock: counts on MTCLKA pin input (ch1)

    +
    MTU3_CLOCK_DIV_MTCLKB_CH_1 

    External clock: counts on MTCLKB pin input (ch1)

    +
    MTU3_CLOCK_DIV_256_CH_1 

    CLOCK divided by 256 (ch1)

    +
    MTU3_CLOCK_DIV_TCNT_CH1 

    Overflow/underflow of MTU2.TCNT.

    +
    MTU3_CLOCK_DIV_1024_CH_1 

    CLOCK divided by 1024 (ch1)

    +
    MTU3_CLOCK_DIV_MTCLKA_CH_2 

    External clock: counts on MTCLKA pin input (ch2)

    +
    MTU3_CLOCK_DIV_MTCLKB_CH_2 

    External clock: counts on MTCLKB pin input (ch2)

    +
    MTU3_CLOCK_DIV_MTCLKC_CH_2 

    External clock: counts on MTCLKC pin input (ch2)

    +
    MTU3_CLOCK_DIV_1024_CH_2 

    CLOCK divided by 1024 (ch2)

    +
    MTU3_CLOCK_DIV_256_CH_2 

    CLOCK divided by 256 (ch2)

    +
    MTU3_CLOCK_DIV_256_CH_3_4_6_7_8 

    CLOCK divided by 256 (ch3-4, 6-8)

    +
    MTU3_CLOCK_DIV_1024_CH_3_4_6_7_8 

    CLOCK divided by 1024 (ch3-4, 6-8)

    +
    MTU3_CLOCK_DIV_MTCLKA_CH_3_4_6_7_8 

    External clock: counts on MTCLKA pin input (ch3-4, 6-8)

    +
    MTU3_CLOCK_DIV_MTCLKB_CH_3_4_6_7_8 

    External clock: counts on MTCLKB pin input (ch3-4, 6-8)

    +
    + +
    +
    + +

    ◆ mtu3_tcnt_clear_t

    + +
    +
    + + + + +
    enum mtu3_tcnt_clear_t
    +
    +

    Counter Clear Source Select

    + + + + +
    Enumerator
    MTU3_TCNT_CLEAR_DISABLE 

    TCNT clearing disabled.

    +
    MTU3_TCNT_CLEAR_TGRA 

    TCNT cleared by TGRA compare match/input capture.

    +
    MTU3_TCNT_CLEAR_TGRB 

    TCNT cleared by TGRB compare match/input capture.

    +
    + +
    +
    + +

    ◆ mtu3_io_pin_t

    + +
    +
    + + + + +
    enum mtu3_io_pin_t
    +
    +

    Level of MTU3 pin

    + + + + +
    Enumerator
    MTU3_IO_PIN_MTIOCA 

    MTIOCA.

    +
    MTU3_IO_PIN_MTIOCB 

    MTIOCB.

    +
    MTU3_IO_PIN_MTIOCA_AND_MTIOCB 

    MTIOCA and MTIOCB.

    +
    + +
    +
    + +

    ◆ mtu3_noise_filter_t

    + +
    +
    + + + + +
    enum mtu3_noise_filter_t
    +
    +

    Disables or enables the noise filter for input from the MTIOCnA pin

    + + + + +
    Enumerator
    MTU3_NOISE_FILTER_DISABLE 

    The noise filter for the MTIOC pin is disabled.

    +
    MTU3_NOISE_FILTER_A_ENABLE 

    The noise filter for the MTIOCA pin is enabled.

    +
    MTU3_NOISE_FILTER_B_ENABLE 

    The noise filter for the MTIOCB pin is enabled.

    +
    + +
    +
    + +

    ◆ mtu3_noise_filter_mtclk_t

    + +
    +
    + + + + +
    enum mtu3_noise_filter_mtclk_t
    +
    +

    Disables or enables the noise filter for the external clock input pins of the MTU

    + + + + + + +
    Enumerator
    MTU3_NOISE_FILTER_MTCLK_DISABLE 

    The noise filter for the MTCLK pin is disabled.

    +
    MTU3_NOISE_FILTER_MTCLK_A_ENABLE 

    The noise filter for the MTCLKA pin is enabled.

    +
    MTU3_NOISE_FILTER_MTCLK_B_ENABLE 

    The noise filter for the MTCLKB pin is enabled.

    +
    MTU3_NOISE_FILTER_MTCLK_C_ENABLE 

    The noise filter for the MTCLKC pin is enabled.

    +
    MTU3_NOISE_FILTER_MTCLK_D_ENABLE 

    The noise filter for the MTCLKD pin is enabled.

    +
    + +
    +
    + +

    ◆ mtu3_noise_filter_clock_t

    + +
    +
    + + + + +
    enum mtu3_noise_filter_clock_t
    +
    + + + + + +
    Enumerator
    MTU3_NOISE_FILTER_CLOCK_DIV_1 

    CLK/1 - fast sampling.

    +
    MTU3_NOISE_FILTER_CLOCK_DIV_8 

    CLK/8.

    +
    MTU3_NOISE_FILTER_CLOCK_DIV_32 

    CLK/32 - slow sampling.

    +
    MTU3_NOISE_FILTER_CLOCK_SOURCE 

    Clock source for counting.

    +
    + +
    +
    + +

    ◆ mtu3_noise_filter_external_clock_t

    + +
    +
    + + + + +
    enum mtu3_noise_filter_external_clock_t
    +
    + + + + + +
    Enumerator
    MTU3_NOISE_FILTER_EXTERNAL_CLOCK_DIV_1 

    CLK/1 - fast sampling.

    +
    MTU3_NOISE_FILTER_EXTERNAL_CLOCK_DIV_2 

    CLK/2.

    +
    MTU3_NOISE_FILTER_EXTERNAL_CLOCK_DIV_8 

    CLK/8.

    +
    MTU3_NOISE_FILTER_EXTERNAL_CLOCK_DIV_32 

    CLK/32 - slow sampling.

    +
    + +
    +
    + +

    ◆ mtu3_interrupt_skip_mode_t

    + +
    +
    + + + + +
    enum mtu3_interrupt_skip_mode_t
    +
    +

    Interrupt Skipping Function Select

    + + + +
    Enumerator
    MTU3_INTERRUPT_SKIP_MODE_1 

    Setting the TITCR1A or TITCR1B register enables.

    +
    MTU3_INTERRUPT_SKIP_MODE_2 

    Setting the TITCR2A or TITCR2B register enables.

    +
    + +
    +
    + +

    ◆ mtu3_interrupt_skip_count_t

    + +
    +
    + + + + +
    enum mtu3_interrupt_skip_count_t
    +
    +

    Number of interrupts to skip between events

    + + + + + + + + + +
    Enumerator
    MTU3_INTERRUPT_SKIP_COUNT_0 

    Do not skip interrupts.

    +
    MTU3_INTERRUPT_SKIP_COUNT_1 

    Skip one interrupt.

    +
    MTU3_INTERRUPT_SKIP_COUNT_2 

    Skip two interrupts.

    +
    MTU3_INTERRUPT_SKIP_COUNT_3 

    Skip three interrupts.

    +
    MTU3_INTERRUPT_SKIP_COUNT_4 

    Skip four interrupts.

    +
    MTU3_INTERRUPT_SKIP_COUNT_5 

    Skip five interrupts.

    +
    MTU3_INTERRUPT_SKIP_COUNT_6 

    Skip six interrupts.

    +
    MTU3_INTERRUPT_SKIP_COUNT_7 

    Skip seven interrupts.

    +
    + +
    +
    + +

    ◆ mtu3_adc_compare_match_t

    + +
    +
    + + + + +
    enum mtu3_adc_compare_match_t
    +
    +

    Trigger options to start A/D conversion.

    + + + +
    Enumerator
    MTU3_ADC_COMPARE_MATCH_ADC_A 

    Set A/D conversion start request value for MTU3 A/D converter start request A.

    +
    MTU3_ADC_COMPARE_MATCH_ADC_B 

    Set A/D conversion start request value for MTU3 A/D converter start request B.

    +
    + +
    +
    + +

    ◆ mtu3_adc_activation_tgra_compare_match_t

    + +
    +
    + + + + +
    enum mtu3_adc_activation_tgra_compare_match_t
    +
    + + + +
    Enumerator
    MTU3_ADC_TGRA_COMPARE_MATCH_DISABLE 

    A/D Converter Activation by TGRA Input Capture/Compare Match Disable.

    +
    MTU3_ADC_TGRA_COMPARE_MATCH_ENABLE 

    A/D Converter Activation by TGRA Input Capture/Compare Match Enable.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_MTU3_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_Open (timer_ctrl_t *const p_ctrl,
    timer_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the timer module and applies configurations. Implements timer_api_t::open.

    +

    The MTU3 implementation of the general timer can accept a mtu3_extended_cfg_t extension parameter.

    +

    Example:

    /* Initializes the module. */
    err = R_MTU3_Open(&g_timer0_ctrl, &g_timer0_cfg);
    Return values
    + + + + + + +
    FSP_SUCCESSInitialization was successful and timer has started.
    FSP_ERR_ASSERTIONA required input pointer is NULL.
    FSP_ERR_ALREADY_OPENModule is already open.
    FSP_ERR_INVALID_MODEOnly PERIODIC and PWM are supported.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel requested in the p_cfg parameter is not available on this device.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_Stop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MTU3_Stop (timer_ctrl_t *const p_ctrl)
    +
    +

    Stops timer. Implements timer_api_t::stop.

    +

    Example:

    /* (Optional) Stop the timer. */
    (void) R_MTU3_Stop(&g_timer0_ctrl);
    Return values
    + + + + +
    FSP_SUCCESSTimer successfully stopped.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_Start()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MTU3_Start (timer_ctrl_t *const p_ctrl)
    +
    +

    Starts timer. Implements timer_api_t::start.

    +

    Example:

    /* Start the timer. */
    (void) R_MTU3_Start(&g_timer0_ctrl);
    Return values
    + + + + +
    FSP_SUCCESSTimer successfully started.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_Reset()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MTU3_Reset (timer_ctrl_t *const p_ctrl)
    +
    +

    Resets the counter value to 0. Implements timer_api_t::reset.

    +
    Note
    This function also updates to the new period if no counter overflow has occurred since the last call to R_MTU3_PeriodSet().
    +
    Return values
    + + + + +
    FSP_SUCCESSCounter value written successfully.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_PeriodSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_PeriodSet (timer_ctrl_t *const p_ctrl,
    uint32_t const period_counts 
    )
    +
    +

    Sets period value provided. If the timer is running, the period will be updated after the next compare match. If the timer is stopped, this function resets the counter and updates the period. Implements timer_api_t::periodSet.

    +

    Example:

    /* Get the source clock frequency (in Hz). There are 3 ways to do this in FSP:
    * - If P0 clock is chosen in agt_extended_cfg_t::clock_source and the P0 clock frequency has not changed since reset,
    * - The source clock frequency is BSP_STARTUP_P0CLK_HZ >> timer_cfg_t::source_div
    * - Use the R_MTU3_InfoGet function (it accounts for the divider).
    * - Calculate the current P0 clock frequency using R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK) and right shift
    * by mtu3_extended_cfg_t::mtu3_clk_div.
    *
    * This example uses the 3rd option (R_FSP_SystemClockHzGet).
    */
    uint32_t p0clk_freq_hz = R_FSP_SystemClockHzGet(FSP_PRIV_CLOCK_P0CLK) >> g_timer0_cfg.source_div;
    /* Calculate the desired period based on the current clock. Note that this calculation could overflow if the
    * desired period is larger than UINT16_MAX / p0clk_freq_hz. A cast to uint64_t is used to prevent this. */
    uint32_t period_counts =
    (uint32_t) (((uint64_t) p0clk_freq_hz * MTU3_EXAMPLE_DESIRED_PERIOD_MICROSEC) / MTU3_EXAMPLE_MICROSEC_PER_SEC);
    /* Set the calculated period. */
    err = R_MTU3_PeriodSet(&g_timer0_ctrl, period_counts);
    handle_error(err);
    Return values
    + + + + +
    FSP_SUCCESSPeriod value written successfully.
    FSP_ERR_ASSERTIONA required pointer was NULL, or the period was not in the valid range of 1 to 0xFFFF.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_DutyCycleSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_DutyCycleSet (timer_ctrl_t *const p_ctrl,
    uint32_t const duty_cycle_counts,
    uint32_t const pin 
    )
    +
    +

    Sets duty cycle. Implements timer_api_t::dutyCycleSet.

    +

    Duty cycle is updated in the TGRx register.

    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to instance control block.
    [in]duty_cycle_countsDuty cycle to set in counts. When the initial output setting of the period register is LOW, entering a value greater than the period register will result in a 0% duty cycle.
    [in]pinNot Used.
    +
    +
    +
    Return values
    + + + + + +
    FSP_SUCCESSDuty cycle updated successfully.
    FSP_ERR_ASSERTIONA required pointer was NULL, or the period was not in the valid range of 1 to 0xFFFF.
    FSP_ERR_NOT_OPENThe instance is not opened.
    FSP_ERR_UNSUPPORTEDMTU3_CFG_OUTPUT_SUPPORT_ENABLE is 0.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_InfoGet (timer_ctrl_t *const p_ctrl,
    timer_info_t *const p_info 
    )
    +
    +

    Get timer information and store it in provided pointer p_info. Implements timer_api_t::infoGet.

    +
    Return values
    + + + + +
    FSP_SUCCESSTGRx, count direction, frequency, structure successfully.
    FSP_ERR_ASSERTIONp_ctrl or p_info was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_StatusGet (timer_ctrl_t *const p_ctrl,
    timer_status_t *const p_status 
    )
    +
    +

    Get current timer status and store it in provided pointer p_status. Implements timer_api_t::statusGet.

    +

    Example:

    /* Read the current counter value. Counter value is in status.counter. */
    timer_status_t status;
    (void) R_MTU3_StatusGet(&g_timer0_ctrl, &status);
    Return values
    + + + + +
    FSP_SUCCESSCurrent timer state and counter value set successfully.
    FSP_ERR_ASSERTIONp_ctrl or p_status was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_CounterSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_CounterSet (timer_ctrl_t *const p_ctrl,
    uint32_t counter 
    )
    +
    +

    Set counter value.

    +
    Note
    Do not call this API while the counter is counting. The counter value can only be updated while the counter is stopped.
    +
    Return values
    + + + + + +
    FSP_SUCCESSCounter value updated.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    FSP_ERR_IN_USEThe timer is running. Stop the timer before calling this function.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_OutputEnable()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_OutputEnable (timer_ctrl_t *const p_ctrl,
    mtu3_output_pin_t pin_level 
    )
    +
    +

    Enable output for MTIOCA and/or MTIOCB.

    +
    Return values
    + + + + +
    FSP_SUCCESSOutput is enabled.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_OutputDisable()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_OutputDisable (timer_ctrl_t *const p_ctrl,
    mtu3_io_pin_t pin 
    )
    +
    +

    Disable output for MTIOCA and/or MTIOCB.

    +
    Return values
    + + + + +
    FSP_SUCCESSOutput is disabled.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_Enable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MTU3_Enable (timer_ctrl_t *const p_ctrl)
    +
    +

    timer_api_t::enable is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDEnable not supported on this MPU.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_Disable()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MTU3_Disable (timer_ctrl_t *const p_ctrl)
    +
    +

    timer_api_t::disable is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDDisable not supported on this MPU.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_AdcTriggerSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_AdcTriggerSet (timer_ctrl_t *const p_ctrl,
    mtu3_adc_compare_match_t which_compare_match,
    uint16_t compare_match_value 
    )
    +
    +

    Set A/D converter start request compare match value.

    +
    Note
    MTU ch4, ch7 only
    +
    Return values
    + + + + +
    FSP_SUCCESSCounter value updated.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_MTU3_CallbackSet (timer_ctrl_t *const p_api_ctrl,
    void(*)(timer_callback_args_t *) p_callback,
    void const *const p_context,
    timer_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback with the option to provide memory for the callback argument structure. Implements timer_api_t::callbackSet.

    +
    Return values
    + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    +
    +
    + +
    +
    + +

    ◆ R_MTU3_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_MTU3_Close (timer_ctrl_t *const p_ctrl)
    +
    +

    Stops counter, disables output pins, and clears internal driver data. Implements timer_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSSuccessful close.
    FSP_ERR_ASSERTIONp_ctrl was NULL.
    FSP_ERR_NOT_OPENThe instance is not opened.
    +
    +
    + +
    +
    +
    +
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"group___m_t_u3.html#gab8b9c7b84a459fabd5449e83db526ee1", null ], + [ "R_MTU3_AdcTriggerSet", "group___m_t_u3.html#ga3e16434800b5d897208039f3398acf84", null ], + [ "R_MTU3_CallbackSet", "group___m_t_u3.html#ga4ec0ad4f10536b74374b75f2ca46f527", null ], + [ "R_MTU3_Close", "group___m_t_u3.html#gace590734aa53fc0116c411decc0142d2", null ] +]; \ No newline at end of file diff --git a/group___p_d_m.html b/group___p_d_m.html new file mode 100644 index 0000000..da2220d --- /dev/null +++ b/group___p_d_m.html @@ -0,0 +1,1260 @@ + + + + + + + +RZV Flexible Software Package Documentation: PDM Interface (r_pdm) + + + + + + + + + + + + + + + + + + + +
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    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Functions | +Data Structures | +Enumerations
    +
    +
    PDM Interface (r_pdm)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_PDM_Open (pdm_ctrl_t *const p_ctrl, pdm_cfg_t const *const p_cfg)
     
    fsp_err_t R_PDM_Start (pdm_ctrl_t *const p_ctrl, void *const p_buffer, size_t const buffer_size, uint32_t const number_of_data_to_callback)
     
    fsp_err_t R_PDM_Stop (pdm_ctrl_t *const p_ctrl)
     
    fsp_err_t R_PDM_Read (pdm_ctrl_t *const p_ctrl, void *const p_dest, uint32_t const bytes)
     
    fsp_err_t R_PDM_StatusGet (pdm_ctrl_t *const p_ctrl, pdm_status_t *const p_status)
     
    fsp_err_t R_PDM_Close (pdm_ctrl_t *const p_ctrl)
     
    fsp_err_t R_PDM_CallbackSet (pdm_ctrl_t *const p_ctrl, void(*p_callback)(pdm_callback_args_t *), void const *const p_context, pdm_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the PDM peripheral on RZ MPUs. This module implements the PDM Interface.

    +

    +Overview

    +

    +Features

    +

    The PDM module supports the following features:

    +

    Reception of a voice data from external PDM device

      +
    • Integration with the DMAC transfer module
      • +
    • Callback function notification when data is received from the PDM FIFO
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_pdm

    +The following build time configurations are defined in fsp_cfg/r_pdm_cfg.h:
    +

    + + + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    DMAC Support
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If code for DMAC transfer support is included in the build.
    +

    Configurations for Connectivity > PDM Driver on r_pdm

    +This module can be added to the Stacks tab via New Stack > Connectivity > PDM Driver on r_pdm.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Input > Edge
      +
    • +Rising
      • +
    • +Falling
      • +
    +    		Rising Select the edge of input audio data.
    Input > PDM_CLK frequencyRefer to the RZV Configuration tool for available options.module.driver.pdm.clock_div.clock_div_2 Select PDM_CLK Frequency (MHz).
    Output > Bit Depth
      +
    • +20 Bits mode {1 Sign bit and [18:0] bits of the buffer}
      • +
    • +20 Bits mode {2 Sign bits and [18:1] bits of the buffer}
      • +
    • +20 Bits mode {3 Sign bits and [18:2] bits of the buffer}
      • +
    • +20 Bits mode {4 Sign bits and [18:3] bits of the buffer}
      • +
    • +16 Bits mode {1 Sign bit and [18:4] bits of the buffer}
      • +
    • +16 Bits mode {1 Sign bit and [17:3] bits of the buffer}
      • +
    • +16 Bits mode {1 Sign bit and [16:2] bits of the buffer}
      • +
    • +16 Bits mode {1 Sign bit and [15:1] bits of the buffer}
      • +
    • +16 Bits mode {1 Sign bit and [14:0] bits of the buffer}
      • +
    +    		module.driver.pdm.pcm_width.pcm_width_20bits_0_18 Select the bit depth of one sample of audio data.
    Output > Target sampling frequencyRefer to the RZV Configuration tool for available options.30 kHz Select Target sampling Frequency (kHz).
    Filter > Low-pass filter > Low-pass filter input shift
      +
    • +No shift
      • +
    • +1-bit right shift
      • +
    • +2-bits right shift
      • +
    • +3-bits right shift
      • +
    +    		No shift Select the low-pass (half-band decimation) filter input shift setting.
    Filter > Low-pass filter > LPF Coefficient h0(10)Value must be an integer between 0x0000 and 0x1FFF0x0400 Specify the Low-Pass Filter Coefficient h0(10)
    Filter > Low-pass filter > LPF Coefficient h1(0)Value must be an integer between 0x0000 and 0x1FFF0x1FF8 Specify the Low-Pass Filter Coefficient h1(0)
    Filter > Low-pass filter > LPF Coefficient h1(1)Value must be an integer between 0x0000 and 0x1FFF0x000A Specify the Low-Pass Filter Coefficient h1(1)
    Filter > Low-pass filter > LPF Coefficient h1(2)Value must be an integer between 0x0000 and 0x1FFF0x1FF0 Specify the Low-Pass Filter Coefficient h1(2)
    Filter > Low-pass filter > LPF Coefficient h1(3)Value must be an integer between 0x0000 and 0x1FFF0x0018 Specify the Low-Pass Filter Coefficient h1(3)
    Filter > Low-pass filter > LPF Coefficient h1(4)Value must be an integer between 0x0000 and 0x1FFF0x1FDC Specify the Low-Pass Filter Coefficient h1(4)
    Filter > Low-pass filter > LPF Coefficient h1(5)Value must be an integer between 0x0000 and 0x1FFF0x0034 Specify the Low-Pass Filter Coefficient h1(5)
    Filter > Low-pass filter > LPF Coefficient h1(6)Value must be an integer between 0x0000 and 0x1FFF0x1FB3 Specify the Low-Pass Filter Coefficient h1(6)
    Filter > Low-pass filter > LPF Coefficient h1(7)Value must be an integer between 0x0000 and 0x1FFF0x0076 Specify the Low-Pass Filter Coefficient h1(7)
    Filter > Low-pass filter > LPF Coefficient h1(8)Value must be an integer between 0x0000 and 0x1FFF0x1F2E Specify the Low-Pass Filter Coefficient h1(8)
    Filter > Low-pass filter > LPF Coefficient h1(9)Value must be an integer between 0x0000 and 0x1FFF0x0289 Specify the Low-Pass Filter Coefficient h1(9)
    Filter > Low-pass filter > LPF Coefficient h1(10)Value must be an integer between 0x0000 and 0x1FFF0x0289 Specify the Low-Pass Filter Coefficient h1(10)
    Filter > Low-pass filter > LPF Coefficient h1(11)Value must be an integer between 0x0000 and 0x1FFF0x1F2E Specify the Low-Pass Filter Coefficient h1(11)
    Filter > Low-pass filter > LPF Coefficient h1(12)Value must be an integer between 0x0000 and 0x1FFF0x0076 Specify the Low-Pass Filter Coefficient h1(12)
    Filter > Low-pass filter > LPF Coefficient h1(13)Value must be an integer between 0x0000 and 0x1FFF0x1FB3 Specify the Low-Pass Filter Coefficient h1(13)
    Filter > Low-pass filter > LPF Coefficient h1(14)Value must be an integer between 0x0000 and 0x1FFF0x0034 Specify the Low-Pass Filter Coefficient h1(14)
    Filter > Low-pass filter > LPF Coefficient h1(15)Value must be an integer between 0x0000 and 0x1FFF0x1FDC Specify the Low-Pass Filter Coefficient h1(15)
    Filter > Low-pass filter > LPF Coefficient h1(16)Value must be an integer between 0x0000 and 0x1FFF0x0018 Specify the Low-Pass Filter Coefficient h1(16)
    Filter > Low-pass filter > LPF Coefficient h1(17)Value must be an integer between 0x0000 and 0x1FFF0x1FF0 Specify the Low-Pass Filter Coefficient h1(17)
    Filter > Low-pass filter > LPF Coefficient h1(18)Value must be an integer between 0x0000 and 0x1FFF0x000A Specify the Low-Pass Filter Coefficient h1(18)
    Filter > Low-pass filter > LPF Coefficient h1(19)Value must be an integer between 0x0000 and 0x1FFF0x1FF8 Specify the Low-Pass Filter Coefficient h1(19)
    Filter > Compensation filter > Compensation filter input shift
      +
    • +No shift
      • +
    • +1-bit right shift
      • +
    • +2-bits right shift
      • +
    • +3-bits right shift
      • +
    +    		No shift Select the compensation filter input shift setting.
    Filter > Compensation filter > Compensation Filter Coefficient h(0)Value must be an integer between 0x0000 and 0x1FFF0x1FE8 Specify the Compensation Filter Coefficient h(0)
    Filter > Compensation filter > Compensation Filter Coefficient h(1)Value must be an integer between 0x0000 and 0x1FFF0x0039 Specify the Compensation Filter Coefficient h(1)
    Filter > Compensation filter > Compensation Filter Coefficient h(2)Value must be an integer between 0x0000 and 0x1FFF0x003C Specify the Compensation Filter Coefficient h(2)
    Filter > Compensation filter > Compensation Filter Coefficient h(3)Value must be an integer between 0x0000 and 0x1FFF0x1E56 Specify the Compensation Filter Coefficient h(3)
    Filter > Compensation filter > Compensation Filter Coefficient h(4)Value must be an integer between 0x0000 and 0x1FFF0x01DC Specify the Compensation Filter Coefficient h(4)
    Filter > Compensation filter > Compensation Filter Coefficient h(5)Value must be an integer between 0x0000 and 0x1FFF0x06E1 Specify the Compensation Filter Coefficient h(5)
    Filter > Compensation filter > Compensation Filter Coefficient h(6)Value must be an integer between 0x0000 and 0x1FFF0x01DC Specify the Compensation Filter Coefficient h(6)
    Filter > Compensation filter > Compensation Filter Coefficient h(7)Value must be an integer between 0x0000 and 0x1FFF0x1E56 Specify the Compensation Filter Coefficient h(7)
    Filter > Compensation filter > Compensation Filter Coefficient h(8)Value must be an integer between 0x0000 and 0x1FFF0x003C Specify the Compensation Filter Coefficient h(8)
    Filter > Compensation filter > Compensation Filter Coefficient h(9)Value must be an integer between 0x0000 and 0x1FFF0x0039 Specify the Compensation Filter Coefficient h(9)
    Filter > Compensation filter > Compensation Filter Coefficient h(10)Value must be an integer between 0x0000 and 0x1FFF0x1FE8 Specify the Compensation Filter Coefficient h(10)
    Filter > High-pass filter > High-pass filter input shift
      +
    • +No shift
      • +
    • +1-bit right shift
      • +
    • +2-bits right shift
      • +
    • +3-bits right shift
      • +
    +    		No shift Select the high-pass filter input shift setting.
    Filter > High-pass filter > HPF Coefficient s(0)Value must be an integer between 0x0000 and 0xFFFF0x3F61 Specify the High-Pass Filter Coefficient s(0)
    Filter > High-pass filter > HPF Coefficient k(1)Value must be an integer between 0x0000 and 0xFFFF0x3EC1 Specify the High-Pass Filter Coefficient k(1)
    Filter > High-pass filter > HPF Coefficient h(0)Value must be an integer between 0x0000 and 0xFFFF0x4000 Specify the High-Pass Filter Coefficient h(0)
    Filter > High-pass filter > HPF Coefficient h(1)Value must be an integer between 0x0000 and 0xFFFF0xC000 Specify the High-Pass Filter Coefficient h(1)
    Filter > Moving average mode
      +
    • +1-order (filter is skipped)
      • +
    • +2-order
      • +
    • +4-order
      • +
    +    		1-order (filter is skipped) Select the moving average mode for sound detection data.
    Filter > Sinc filter mode
      +
    • +1-order
      • +
    • +2-order
      • +
    • +3-order
      • +
    • +4-order
      • +
    +    		4-order Select the sinc filter mode setting.
    Data Reception > Buffer overwrite detection enable
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled Select buffer overwrite detection.
    Data Reception > Data reception interrupt threshold
      +
    • +1 or more data
      • +
    • +2 or more data
      • +
    • +4 or more data
      • +
    • +8 or more data
      • +
    • +16 or more data
      • +
    +    		1 or more data Select Data reception interrupt threshold.
    Sound Detection > Sound detection enable
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		module.driver.pdm.sound_detection.sound_detection Select sound detection.
    Sound Detection > Sound detection lower limitValue must be an integer between 0x0000 and 0xFFFFF0x0 Specify the Sound detection lower limit
    Sound Detection > Sound detection upper limitValue must be an integer between 0x0000 and 0xFFFFF0x0 Specify the Sound detection upper limit
    Short circuit detection > Short circuit detection enable
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		module.driver.pdm.short_circuit.short_circuit Select short circuit detection.
    Short circuit detection > Short circuit detection High Continuous detection countValue must be an integer between 0x0000 and 0x1FFF0x0 Specify the Short circuit detection High Continuous detection count.
    Short circuit detection > Short circuit detection Low Continuous detection countValue must be an integer between 0x0000 and 0x1FFF0x0 Short circuit detection Low Continuous detection count.
    Overvoltage detection > Overvoltage detection lower limit enable
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		module.driver.pdm.overvoltage_detection_lower_limit_error.overvoltage_detection_lower_limit_error Select overvoltage detection lower limit.
    Overvoltage detection > Overvoltage detection lower limitValue must be an integer between 0x0000 and 0xFFFFF0x0 Specify the Overvoltage detection lower limit
    Overvoltage detection > Overvoltage detection upper limit enable
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		module.driver.pdm.overvoltage_detection_upper_limit_error.overvoltage_detection_upper_limit_error Select overvoltage detection upper limit.
    Overvoltage detection > Overvoltage detection upper limitValue must be an integer between 0x0000 and 0xFFFFF0x0 Specify the Overvoltage detection upper limit
    Interrupt > CallbackName must be a valid C symbolNULL A user callback function can be provided. If this callback function is provided, it will be called from all three interrupt service routines (ISR).
    Interrupt > Sound Detection Interrupt EnableMCU Specific OptionsEnable the sound detection interrupt.
    Interrupt > Sound Detection Interrupt PriorityValue must be an integer between 0 and 25524 Select the sound detection interrupt priority.
    Interrupt > Data Reception Interrupt EnableMCU Specific OptionsEnable the data reception interrupt.
    Interrupt > Data Reception Interrupt PriorityValue must be an integer between 0 and 25524 Select the data reception interrupt priority.
    Interrupt > Error Detection Interrupt EnableMCU Specific OptionsEnable the error detection interrupt.
    Interrupt > Error Detection Interrupt PriorityValue must be an integer between 0 and 25524 Select the error detection interrupt priority.
    NameName must be a valid C symbolg_pdm0 Module name.
    UnitValue must be an non-negative integer0 Specify the PDM unit.
    ChannelValue must be an non-negative integer1 Specify the PDM channel.
    +

    +

    +Clock Configuration

    +

    The PDM peripheral runs on PDM_0_CCLK. PDM_0_CCLK frequency is 48 MHz and can not be configured on the Clocks tab of the RZ Configuration editor.

    +

    +Pin Configuration

    +

    The PDM uses the following pins:

      +
    • PDMDATn0 External PDM CH0 data reception pin
      • +
    • PDMDATn1 External PDM CH1 data reception pin
      • +
    • PDMDATn2 External PDM CH2 data reception pin
      • +
    • PDMCLKn0 External PDM CH0 clock output pin
      • +
    • PDMCLKn1 External PDM CH1 clock output pin
      • +
    • PDMCLKn2 External PDM CH2 clock output pin
      • +
    +

    +Usage Notes

    +

    Audio Data

    +

    PDM hardware converts PDM data to PCM data.

    +

    Data arrays have the following size, alignment, and length based on the "Bit Depth" setting:

    + + + + + + + +
    Bit Depth Array Data Type Required Alignment
    16 Bits 32-bit integer, right justified 4 byte alignment
    20 Bits 32-bit integer, right justified 4 byte alignment
    +

    Data Format for 16 Bits

    + + + + + + + + + +
    Bit Description
    31-20 Fixed to 0
    19-16 Sign bits
    15-0 Fixed-point data
    +

    Data Format for 20 Bits

    + + + + + + + +
    Bit Description
    31-20 Fixed to 0
    19-0 Fixed-point data
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the PDM in an application.

    +
    #define BUFFER_SIZE 0x1000
    uint32_t buffer[BUFFER_SIZE] __attribute__((aligned(16)));
    void pdm_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Initialize the module. */
    err = R_PDM_Open(&g_pdm_ctrl, &g_pdm_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    err = R_PDM_Start(&g_pdm_ctrl, buffer, sizeof(buffer), BUFFER_SIZE / 2);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    }
    + + + + + +

    +Data Structures

    struct  pdm_instance_ctrl_t
     
    struct  pdm_extended_cfg_t
     
    + + + + + + + + + + + + + + + +

    +Enumerations

    enum  pdm_clk_div_t
     
    enum  pdm_moving_average_mode_t
     
    enum  pdm_low_pass_filter_shift_t
     
    enum  pdm_compensation_filter_shift_t
     
    enum  pdm_high_pass_filter_shift_t
     
    enum  pdm_sinc_filter_mode_t
     
    enum  pdm_interrupt_threshold_t
     
    +

    Data Structure Documentation

    + +

    ◆ pdm_instance_ctrl_t

    + +
    +
    + + + + +
    struct pdm_instance_ctrl_t
    +
    +

    Channel instance control block. DO NOT INITIALIZE. Initialization occurs when pdm_api_t::open is called.

    +
    +
    +
    + +

    ◆ pdm_extended_cfg_t

    + +
    +
    + + + + +
    struct pdm_extended_cfg_t
    +
    +

    PDM configuration extension. This extension is optional.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +pdm_clk_div_t +clock_div +PDM_CLKn's division ratio to core clock.
    +uint8_t +sound_detection_enable +Sound detection enable.

    Function Settings.

    +
    +uint8_t +short_circuit_detection_enable +Short circuit detection enable.
    +uint8_t +over_voltage_lower_limit_detection_enable +Overvoltage detection lower limit enable.
    +uint8_t +over_voltage_upper_limit_detection_enable +Overvoltage detection upper limit enable.
    +uint8_t +buffer_overwrite_detection_enable +Buffer overwrite detection enable.
    +pdm_moving_average_mode_t +moving_average_mode +Moving average mode f or sound detection data.

    Filter Settings.

    +
    +pdm_low_pass_filter_shift_t +low_pass_filter_shift +Low-pass (half -band decimation) filter input shift setting.
    +pdm_compensation_filter_shift_t +compensation_filter_shift +Compensation filter input shift setting.
    +pdm_high_pass_filter_shift_t +high_pass_filter_shift +High-pass filter input shift setting.
    +pdm_sinc_filter_mode_t +sinc_filter_mode +Sinc filter mode setting.
    +uint8_t +sincrng +Sinc filter output valid range.
    +uint8_t +sincdec +Sinc filter decimation ratio.
    +uint16_t +hpf_coefficient_s0 +High-pass filter coefficient s0 (16-bit signed fixed point data)
    +uint16_t +hpf_coefficient_k1 +High-pass filter coefficient k1 (16-bit signed fixed point data)
    +uint16_t +hpf_coefficient_h[2] +High-pass filter coefficient h(p) (16-bit signed fixed point data)
    +uint16_t +compensation_filter_coefficient_h[11] +High-pass filter coefficient h(p) (13-bit signed fixed point data)
    +uint16_t +lpf_coefficient_h0 +Low-pass (half-band decimation) filter coefficient h0 (13-bit signed fixed point data)
    +uint16_t +lpf_coefficient_h1[20] +Low-pass (half-band decimation) filter coefficient h1 (13-bit signed fixed point data)
    +uint32_t +filter_setting_time +Filter setting time.
    +pdm_interrupt_threshold_t +interupt_threshold +Data reception interrupt threshold.

    Sound Detection Threshold.

    +
    +uint32_t +sound_detection_lower_limit +Sound detection lower limit (20-bit signed fixed point data)
    +uint32_t +sound_detection_upper_limit +Sound detection upper limit (20-bit signed fixed point data)
    +uint16_t +short_circuit_count_h +Short circuit detection High Continuous detection count.

    Short-Circuit Detection.

    +
    +uint16_t +short_circuit_count_l +Continuous detection count.
    +uint32_t +overvoltage_detection_lower_limit +Overvoltage detection lower limit (20-bit signed fixed point data)

    Overvoltage Detection.

    +
    +uint32_t +overvoltage_detection_upper_limit +Overvoltage detection upper limit (20-bit signed fixed point data)
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ pdm_clk_div_t

    + +
    +
    + + + + +
    enum pdm_clk_div_t
    +
    +

    PDM_CLKn's division ratio to core clock.

    + + + + + + + + + + + + + + + + + +
    Enumerator
    PDM_CLOCK_DIV_2 

    0000b: 1/2

    +
    PDM_CLOCK_DIV_4 

    0001b: 1/4

    +
    PDM_CLOCK_DIV_6 

    0010b: 1/6

    +
    PDM_CLOCK_DIV_8 

    0011b: 1/8

    +
    PDM_CLOCK_DIV_10 

    0100b: 1/10

    +
    PDM_CLOCK_DIV_12 

    0101b: 1/12

    +
    PDM_CLOCK_DIV_14 

    0110b: 1/14

    +
    PDM_CLOCK_DIV_16 

    0111b: 1/16

    +
    PDM_CLOCK_DIV_18 

    1000b: 1/18

    +
    PDM_CLOCK_DIV_20 

    1001b: 1/20

    +
    PDM_CLOCK_DIV_22 

    1010b: 1/22

    +
    PDM_CLOCK_DIV_24 

    1011b: 1/24

    +
    PDM_CLOCK_DIV_26 

    1100b: 1/26

    +
    PDM_CLOCK_DIV_28 

    1101b: 1/28

    +
    PDM_CLOCK_DIV_30 

    1110b: 1/30

    +
    PDM_CLOCK_DIV_32 

    1111b: 1/32

    +
    + +
    +
    + +

    ◆ pdm_moving_average_mode_t

    + +
    +
    + + + + +
    enum pdm_moving_average_mode_t
    +
    +

    Moving average mode for sound detection data.

    + + + + +
    Enumerator
    PDM_MOVING_AVERAGE_MODE_1_ORDER 

    1-order

    +
    PDM_MOVING_AVERAGE_MODE_2_ORDER 

    2-order

    +
    PDM_MOVING_AVERAGE_MODE_4_ORDER 

    4-order

    +
    + +
    +
    + +

    ◆ pdm_low_pass_filter_shift_t

    + +
    +
    + + + + +
    enum pdm_low_pass_filter_shift_t
    +
    +

    Low-pass (half-band decimation) filter input shift setting.

    + + + + + +
    Enumerator
    PDM_LPF_RIGHT_SHIFT_0 

    No shift.

    +
    PDM_LPF_RIGHT_SHIFT_1 

    1-bit right shift

    +
    PDM_LPF_RIGHT_SHIFT_2 

    2-bit right shift

    +
    PDM_LPF_RIGHT_SHIFT_3 

    3-bit right shift

    +
    + +
    +
    + +

    ◆ pdm_compensation_filter_shift_t

    + +
    +
    + + + + +
    enum pdm_compensation_filter_shift_t
    +
    +

    Compensation filter input shift setting.

    + + + + + +
    Enumerator
    PDM_COMPENSATION_FILTER_RIGHT_SHIFT_0 

    No shift.

    +
    PDM_COMPENSATION_FILTER_RIGHT_SHIFT_1 

    1-bit right shift

    +
    PDM_COMPENSATION_FILTER_RIGHT_SHIFT_2 

    2-bit right shift

    +
    PDM_COMPENSATION_FILTER_RIGHT_SHIFT_3 

    3-bit right shift

    +
    + +
    +
    + +

    ◆ pdm_high_pass_filter_shift_t

    + +
    +
    + + + + +
    enum pdm_high_pass_filter_shift_t
    +
    +

    High-pass filter input shift setting.

    + + + + + +
    Enumerator
    PDM_HPF_RIGHT_SHIFT_0 

    No shift.

    +
    PDM_HPF_RIGHT_SHIFT_1 

    1-bit right shift

    +
    PDM_HPF_RIGHT_SHIFT_2 

    2-bit right shift

    +
    PDM_HPF_RIGHT_SHIFT_3 

    3-bit right shift

    +
    + +
    +
    + +

    ◆ pdm_sinc_filter_mode_t

    + +
    +
    + + + + +
    enum pdm_sinc_filter_mode_t
    +
    +

    Sinc filter mode setting.

    + + + + + +
    Enumerator
    PDM_SINC_FILTER_MODE_1 

    1-order

    +
    PDM_SINC_FILTER_MODE_2 

    2-order

    +
    PDM_SINC_FILTER_MODE_3 

    3-order

    +
    PDM_SINC_FILTER_MODE_4 

    4-order

    +
    + +
    +
    + +

    ◆ pdm_interrupt_threshold_t

    + +
    +
    + + + + +
    enum pdm_interrupt_threshold_t
    +
    +

    Data reception interrupt threshold.

    + + + + + + +
    Enumerator
    PDM_INTERRUPT_THRESHOLD_1 

    000b: Output interrupt when receiving 1 or more data

    +
    PDM_INTERRUPT_THRESHOLD_2 

    001b: Output interrupt when receiving 2 or more data

    +
    PDM_INTERRUPT_THRESHOLD_4 

    010b: Output interrupt when receiving 4 or more data

    +
    PDM_INTERRUPT_THRESHOLD_8 

    011b: Output interrupt when receiving 8 or more data

    +
    PDM_INTERRUPT_THRESHOLD_16 

    100b: Output interrupt when receiving 16 or more data

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_PDM_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_PDM_Open (pdm_ctrl_t *const p_ctrl,
    pdm_cfg_t const *const p_cfg 
    )
    +
    +

    Opens the PDM. Implements pdm_api_t::open.

    +

    This function sets this clock divisor and the configurations specified in pdm_cfg_t. It also opens the timer and transfer instances if they are provided.

    +
    Return values
    + + + + + +
    FSP_SUCCESSReady for PDM communication.
    FSP_ERR_ASSERTIONThe pointer to p_ctrl or p_cfg is null.
    FSP_ERR_ALREADY_OPENThe control block has already been opened.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTChannel number is not available on this device.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other popdmble return codes. This function calls: +
    + +
    +
    + +

    ◆ R_PDM_Start()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_PDM_Start (pdm_ctrl_t *const p_ctrl,
    void *const p_buffer,
    size_t const buffer_size,
    uint32_t const number_of_data_to_callback 
    )
    +
    +

    Starts PDM. Implements pdm_api_t::start.

    +

    This function enables reception, and enables any transfer instances used.

    +

    The PDM will start on the next frame boundary.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSPDM communication stop request issued.
    FSP_ERR_ASSERTIONThe pointer to p_ctrl was null.
    FSP_ERR_INVALID_SIZEThe size of buffer is not the multiple of pdm_interrupt_threshold_t.
    FSP_ERR_INVALID_ALIGNMENTThe alignment of argument buffer_size is not matched with hardware specification.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    +
    Returns
    See Common Error Codes or lower level drivers for other popdmble return codes.
    + +
    +
    + +

    ◆ R_PDM_Stop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_PDM_Stop (pdm_ctrl_t *const p_ctrl)
    +
    +

    Stops PDM. Implements pdm_api_t::stop.

    +

    This function disables reception, and disables any transfer instances used.

    +

    The PDM will stop on the next frame boundary.

    +
    Return values
    + + + + +
    FSP_SUCCESSPDM communication stop request issued.
    FSP_ERR_ASSERTIONThe pointer to p_ctrl was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    +
    Returns
    See Common Error Codes or lower level drivers for other popdmble return codes.
    + +
    +
    + +

    ◆ R_PDM_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_PDM_Read (pdm_ctrl_t *const p_ctrl,
    void *const p_dest,
    uint32_t const bytes 
    )
    +
    +

    Reads data into provided buffer. Implements pdm_api_t::read.

    +

    This function resets the transfer if the transfer interface is used, or reads the length of data available in the FIFO then stores the remaining read buffer in the control block to be filled in the ISR.

    +

    Read() cannot be called if another Start() operation is in progress. Read can be called when the PDM is idle.

    +
    Return values
    + + + + + +
    FSP_SUCCESSRead initiated successfully.
    FSP_ERR_IN_USEPeripheral is in the wrong mode or not idle.
    FSP_ERR_ASSERTIONThe pointer to p_ctrl or p_dest was null, or bytes requested was 0.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other popdmble return codes. This function calls: +
    + +
    +
    + +

    ◆ R_PDM_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_PDM_StatusGet (pdm_ctrl_t *const p_ctrl,
    pdm_status_t *const p_status 
    )
    +
    +

    Gets PDM status and stores it in provided pointer p_status. Implements pdm_api_t::statusGet.

    +
    Return values
    + + + + +
    FSP_SUCCESSInformation stored successfully.
    FSP_ERR_ASSERTIONThe p_ctrl or p_status parameter was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_PDM_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_PDM_Close (pdm_ctrl_t *const p_ctrl)
    +
    +

    Closes PDM. Implements pdm_api_t::close.

    +

    This function powers down the PDM and closes the lower level timer and transfer drivers if they are used.

    +
    Return values
    + + + + +
    FSP_SUCCESSDevice closed successfully.
    FSP_ERR_ASSERTIONThe pointer to p_ctrl was null.
    FSP_ERR_NOT_OPENThe channel is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_PDM_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_PDM_CallbackSet (pdm_ctrl_t *const p_ctrl,
    void(*)(pdm_callback_args_t *) p_callback,
    void const *const p_context,
    pdm_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements pdm_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___p_d_m.js b/group___p_d_m.js new file mode 100644 index 0000000..809268d --- /dev/null +++ b/group___p_d_m.js @@ -0,0 +1,94 @@ +var group___p_d_m = +[ + [ "pdm_instance_ctrl_t", "group___p_d_m.html#structpdm__instance__ctrl__t", null ], + [ "pdm_extended_cfg_t", "group___p_d_m.html#structpdm__extended__cfg__t", [ + [ "clock_div", "group___p_d_m.html#a73d4ca013e3c3d061bc3c0c693e12ffa", null ], + [ "sound_detection_enable", "group___p_d_m.html#a99ccd7247027a766a05b32d0784489d8", null ], + [ "short_circuit_detection_enable", "group___p_d_m.html#af817e528f5ff2e362fb4b550d32dc347", null ], + [ "over_voltage_lower_limit_detection_enable", "group___p_d_m.html#ac67dc74127d1809c2f5831150d313b83", null ], + [ "over_voltage_upper_limit_detection_enable", "group___p_d_m.html#aa316525186852ad3ceb518911c92fd48", null ], + [ "buffer_overwrite_detection_enable", "group___p_d_m.html#a9cbd930664bb8b7902a78d5dc07ff1b0", null ], + [ "moving_average_mode", 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"R_PDM_Open", "group___p_d_m.html#ga348be7b997dd1200eb549ff3e7f946a0", null ], + [ "R_PDM_Start", "group___p_d_m.html#ga745fa70668486ae2a7d16bd72eb93a54", null ], + [ "R_PDM_Stop", "group___p_d_m.html#ga35f2abc47410d9906e8ae5bac12d7a29", null ], + [ "R_PDM_Read", "group___p_d_m.html#ga62fc9390544cabfb4800f38125f748ab", null ], + [ "R_PDM_StatusGet", "group___p_d_m.html#gaf5696a4b5a4e9f33f89baefe9a7e1f94", null ], + [ "R_PDM_Close", "group___p_d_m.html#ga0f07fb3bab80af13bd260b7f7f54062e", null ], + [ "R_PDM_CallbackSet", "group___p_d_m.html#gaecf26c2d11db2e9700beb41164b8a1fb", null ] +]; \ No newline at end of file diff --git a/group___p_d_m___a_p_i.html b/group___p_d_m___a_p_i.html new file mode 100644 index 0000000..dc3e605 --- /dev/null +++ b/group___p_d_m___a_p_i.html @@ -0,0 +1,802 @@ + + + + + + + +RZV Flexible Software Package Documentation: PDM Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    PDM Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for PDM audio communication.

    +

    +Summary

    +

    The pulse-density modulation(PDM) interface provides APIs and definitions for PDM audio communication.

    +

    +Known Implementations

    +

    PDM Interface (r_pdm)

    + + + + + + + + + + + + +

    +Data Structures

    struct  pdm_callback_args_t
     
    struct  pdm_status_t
     
    struct  pdm_cfg_t
     
    struct  pdm_api_t
     
    struct  pdm_instance_t
     
    + + + +

    +Typedefs

    typedef void pdm_ctrl_t
     
    + + + + + + + + + + + +

    +Enumerations

    enum  pdm_pcm_width_t
     
    enum  pdm_input_data_edge_t
     
    enum  pdm_event_t
     
    enum  pdm_error_t
     
    enum  pdm_state_t
     
    +

    Data Structure Documentation

    + +

    ◆ pdm_callback_args_t

    + +
    +
    + + + + +
    struct pdm_callback_args_t
    +
    +

    Callback function parameter data

    +
    + + + + + + + + + + +
    Data Fields
    +void const * +p_context +

    Placeholder for user data. Set in pdm_api_t::open function in pdm_cfg_t.

    +
    +pdm_event_t +event +The event can be used to identify what caused the callback (overflow or error).
    +pdm_error_t +error +The kind of error.
    + +
    +
    + +

    ◆ pdm_status_t

    + +
    +
    + + + + +
    struct pdm_status_t
    +
    +

    PDM status.

    +
    + + + + +
    Data Fields
    +pdm_state_t +state +Current PDM state.
    + +
    +
    + +

    ◆ pdm_cfg_t

    + +
    +
    + + + + +
    struct pdm_cfg_t
    +
    +

    User configuration structure, used in open function

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    uint32_t unit
     
    +pdm_pcm_width_t pcm_width
     Audio PCM data width.
     
    +pdm_input_data_edge_t pcm_edge
     Input data select.
     
    transfer_instance_t const * p_transfer_rx
     
    void(* p_callback )(pdm_callback_args_t *p_args)
     
    void const * p_context
     
    +void const * p_extend
     Extension parameter for hardware specific settings.
     
    +uint8_t dat_ipl
     Data reception interrupt priority.
     
    +uint8_t sdet_ipl
     Sound detection interrupt priority.
     
    +uint8_t err_ipl
     Idle/Error interrupt priority.
     
    +IRQn_Type dat_irq
     IRQ number of data reception interrupt.
     
    +IRQn_Type sdet_irq
     IRQ number of sound detection interrupt.
     
    +IRQn_Type err_irq
     IRQ number of error detection interrupt.
     
    +

    Field Documentation

    + +

    ◆ unit

    + +
    +
    + + + + +
    uint32_t pdm_cfg_t::unit
    +
    +

    Select a unit/channel corresponding to the unit/channel number of the hardware.

    + +
    +
    + +

    ◆ p_transfer_rx

    + +
    +
    + + + + +
    transfer_instance_t const* pdm_cfg_t::p_transfer_rx
    +
    +

    To use DMA for receiving link a Transfer instance here. Set to NULL if unused.

    + +
    +
    + +

    ◆ p_callback

    + +
    +
    + + + + +
    void(* pdm_cfg_t::p_callback) (pdm_callback_args_t *p_args)
    +
    +

    Callback provided when an PDM ISR occurs. Set to NULL for no CPU interrupt.

    + +
    +
    + +

    ◆ p_context

    + +
    +
    + + + + +
    void const* pdm_cfg_t::p_context
    +
    +

    Placeholder for user data. Passed to the user callback in pdm_callback_args_t.

    + +
    +
    + +
    +
    + +

    ◆ pdm_api_t

    + +
    +
    + + + + +
    struct pdm_api_t
    +
    +

    PDM functions implemented at the HAL layer will follow this API.

    +
    + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(pdm_ctrl_t *const p_ctrl, pdm_cfg_t const *const p_cfg)
     
    fsp_err_t(* start )(pdm_ctrl_t *const p_ctrl, void *const p_buffer, size_t const buffer_size, uint32_t const number_of_data_to_callback)
     
    fsp_err_t(* stop )(pdm_ctrl_t *const p_ctrl)
     
    fsp_err_t(* read )(pdm_ctrl_t *const p_ctrl, void *const p_dest, uint32_t const bytes)
     
    fsp_err_t(* statusGet )(pdm_ctrl_t *const p_ctrl, pdm_status_t *const p_status)
     
    fsp_err_t(* close )(pdm_ctrl_t *const p_ctrl)
     
    fsp_err_t(* callbackSet )(pdm_ctrl_t *const p_ctrl, void(*p_callback)(pdm_callback_args_t *), void const *const p_context, pdm_callback_args_t *const p_callback_memory)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::open) (pdm_ctrl_t *const p_ctrl, pdm_cfg_t const *const p_cfg)
    +
    +

    Initial configuration.

    Implemented as
    +
    +
    Precondition
    Peripheral clocks and any required output pins should be configured prior to calling this function.
    +
    Note
    To reconfigure after calling this function, call pdm_api_t::close first.
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control block. Must be declared by user. Elements set here.
    [in]p_cfgPointer to configuration structure. All elements of this structure must be set by user.
    +
    +
    + +
    +
    + +

    ◆ start

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::start) (pdm_ctrl_t *const p_ctrl, void *const p_buffer, size_t const buffer_size, uint32_t const number_of_data_to_callback)
    +
    +

    Start communication.

    +
    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlControl block set in pdm_api_t::open call for this instance.
    [in]p_bufferPointer to the reception buffer
    [in]buffer_sizeSize of the buffer
    [in]number_of_data_to_callbackNumber of the data to call the callback function from dat_isr
    +
    +
    + +
    +
    + +

    ◆ stop

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::stop) (pdm_ctrl_t *const p_ctrl)
    +
    +

    Stop communication. Communication is stopped when callback is called with PDM_EVENT_IDLE.

    +
    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlControl block set in pdm_api_t::open call for this instance.
    +
    +
    + +
    +
    + +

    ◆ read

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::read) (pdm_ctrl_t *const p_ctrl, void *const p_dest, uint32_t const bytes)
    +
    +

    Read remaining PDM data. This function can be called during PDM_STATE_STOPPED.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlControl block set in pdm_api_t::open call for this instance.
    [in]p_destBuffer to store PCM samples. Must be 4 byte aligned.
    [in]bytesNumber of bytes in the buffer. Recommended requesting a multiple of 8 bytes. If not a multiple of 8, receive will stop at the multiple of 8 below requested bytes.
    +
    +
    + +
    +
    + +

    ◆ statusGet

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::statusGet) (pdm_ctrl_t *const p_ctrl, pdm_status_t *const p_status)
    +
    +

    Get current status and store it in provided pointer p_status.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlControl block set in pdm_api_t::open call for this instance.
    [out]p_statusCurrent status of the driver.
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::close) (pdm_ctrl_t *const p_ctrl)
    +
    +

    Allows driver to be reconfigured and may reduce power consumption.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlControl block set in pdm_api_t::open call for this instance.
    +
    +
    + +
    +
    + +

    ◆ callbackSet

    + +
    +
    + + + + +
    fsp_err_t(* pdm_api_t::callbackSet) (pdm_ctrl_t *const p_ctrl, void(*p_callback)(pdm_callback_args_t *), void const *const p_context, pdm_callback_args_t *const p_callback_memory)
    +
    +

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to the PDM control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_callback_memoryPointer to volatile memory where callback structure can be allocated. Callback arguments allocated here are only valid during the callback.
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ pdm_instance_t

    + +
    +
    + + + + +
    struct pdm_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +pdm_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +pdm_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +pdm_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ pdm_ctrl_t

    + +
    +
    + + + + +
    typedef void pdm_ctrl_t
    +
    +

    PDM control block. Allocate an instance specific control block to pass into the PDM API calls.

    Implemented as
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ pdm_pcm_width_t

    + +
    +
    + + + + +
    enum pdm_pcm_width_t
    +
    +

    Audio PCM width

    + + + + + + + + + + +
    Enumerator
    PDM_PCM_WIDTH_20_BITS_0_18 

    Using 20-bit PCM Clips [18:0] bit of the buffer and 1-bit of sign.

    +
    PDM_PCM_WIDTH_20_BITS_1_18 

    Using 20-bit PCM Clips [18:1] bit of the buffer and 2-bits of sign.

    +
    PDM_PCM_WIDTH_20_BITS_2_18 

    Using 20-bit PCM Clips [18:2] bit of the buffer and 3-bits of sign.

    +
    PDM_PCM_WIDTH_20_BITS_3_18 

    Using 20-bit PCM Clips [18:3] bit of the buffer and 4-bits of sign.

    +
    PDM_PCM_WIDTH_16_BITS_4_18 

    Using 16-bit PCM Clips [18:4] bit of the buffer and 1-bit of sign.

    +
    PDM_PCM_WIDTH_16_BITS_3_17 

    Using 16-bit PCM Clips [17:3] bit of the buffer and 1-bit of sign.

    +
    PDM_PCM_WIDTH_16_BITS_2_16 

    Using 16-bit PCM Clips [16:2] bit of the buffer and 1-bit of sign.

    +
    PDM_PCM_WIDTH_16_BITS_1_15 

    Using 16-bit PCM Clips [15:1] bit of the buffer and 1-bit of sign.

    +
    PDM_PCM_WIDTH_16_BITS_0_14 

    Using 16-bit PCM Clips [14:0] bit of the buffer and 1-bit of sign.

    +
    + +
    +
    + +

    ◆ pdm_input_data_edge_t

    + +
    +
    + + + + +
    enum pdm_input_data_edge_t
    +
    +

    Input data select.

    + + + +
    Enumerator
    PDM_INPUT_DATA_EDGE_RISE 

    Rise-edge data of channel n.

    +
    PDM_INPUT_DATA_EDGE_FALL 

    Fall-edge data of channel n-1 (In case of n = 0, fall-edge data of channel 2 is selected.)

    +
    + +
    +
    + +

    ◆ pdm_event_t

    + +
    +
    + + + + +
    enum pdm_event_t
    +
    +

    Events that can trigger a callback function

    + + + + + +
    Enumerator
    PDM_EVENT_IDLE 

    IDLE.

    +
    PDM_EVENT_DATA 

    Data reception.

    +
    PDM_EVENT_SOUND_DETECTION 

    Sound detection.

    +
    PDM_EVENT_ERROR 

    Error.

    +
    + +
    +
    + +

    ◆ pdm_error_t

    + +
    +
    + + + + +
    enum pdm_error_t
    +
    +

    Error information included in a callback function

    + + + + + +
    Enumerator
    PDM_ERROR_SHORT_CIRCUIT 

    Short circuit detection.

    +
    PDM_ERROR_OVERVOLTAGE_LOWER 

    Overvoltage lower limit exceeded detection.

    +
    PDM_ERROR_OVERVOLTAGE_UPPER 

    Overvoltage upper limit exceeded detection.

    +
    PDM_ERROR_BUFFER_OVERWRITE 

    Buffer overwriting detection.

    +
    + +
    +
    + +

    ◆ pdm_state_t

    + +
    +
    + + + + +
    enum pdm_state_t
    +
    +

    Possible status values returned by pdm_api_t::statusGet.

    + + + +
    Enumerator
    PDM_STATE_IN_USE 

    PDM is in use.

    +
    PDM_STATE_STOPPED 

    PDM is stopped.

    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___p_d_m___a_p_i.js b/group___p_d_m___a_p_i.js new file mode 100644 index 0000000..522d4d2 --- /dev/null +++ b/group___p_d_m___a_p_i.js @@ -0,0 +1,72 @@ +var group___p_d_m___a_p_i = +[ + [ "pdm_callback_args_t", "group___p_d_m___a_p_i.html#structpdm__callback__args__t", [ + [ "p_context", "group___p_d_m___a_p_i.html#ac700c0b3e8b54aaee5e31e37d74c2f3f", null ], + [ "event", "group___p_d_m___a_p_i.html#a4baa164d236e7f2c62cd33ddb64f41ec", null ], + [ "error", "group___p_d_m___a_p_i.html#a98b4bbf5bb1bf1feccda12382e919bbc", null ] + ] ], + [ "pdm_status_t", "group___p_d_m___a_p_i.html#structpdm__status__t", [ + [ "state", "group___p_d_m___a_p_i.html#a2c6cf4b37d45d78d3c1f61721877a691", null ] + ] ], + [ "pdm_cfg_t", "group___p_d_m___a_p_i.html#structpdm__cfg__t", [ + [ "unit", "group___p_d_m___a_p_i.html#a336b1d202eafdf805edd3cc274ef89e3", null ], + [ "pcm_width", "group___p_d_m___a_p_i.html#a5ef7c8d0fc16829d08bf291a64b996b7", null ], + [ "pcm_edge", "group___p_d_m___a_p_i.html#ab612a5c37643d9c506a10a9967b887c8", null ], + [ "p_transfer_rx", "group___p_d_m___a_p_i.html#ad25f36a51d384189ebc129a471f88c4c", null ], + [ "p_callback", "group___p_d_m___a_p_i.html#aee193c08a4d958f6dc4905479594109f", null ], + [ "p_context", "group___p_d_m___a_p_i.html#aaff00f00bf416201caca2c61fb0b3d7b", null ], + [ "p_extend", "group___p_d_m___a_p_i.html#abff3295dd414d671e7c75d538d657cf7", null ], + [ "dat_ipl", "group___p_d_m___a_p_i.html#a298ee7b058b5cddae6a30ac90a093818", null ], + [ "sdet_ipl", "group___p_d_m___a_p_i.html#a346098539bddc9e3c5228e7360553a9e", null ], + [ "err_ipl", "group___p_d_m___a_p_i.html#a5f32ed867759c9d830f46a64a453d9c0", null ], + [ "dat_irq", "group___p_d_m___a_p_i.html#a5a22105924178bfeb3d5d4e21e6cb5a4", null ], + [ "sdet_irq", "group___p_d_m___a_p_i.html#ae4b909dedca5d5099654a1342ae76d20", null ], + [ "err_irq", "group___p_d_m___a_p_i.html#a2f4774f5b5da972990370a2efbeae9f3", null ] + ] ], + [ "pdm_api_t", "group___p_d_m___a_p_i.html#structpdm__api__t", [ + [ "open", "group___p_d_m___a_p_i.html#a9144eb5d334c37cba16c54a931ff0b39", null ], + [ "start", "group___p_d_m___a_p_i.html#abf43fd87ed8c5bdaccb5474009fa6006", null ], + [ "stop", "group___p_d_m___a_p_i.html#ad8342d4be5d02082a860b08303d0478c", null ], + [ "read", "group___p_d_m___a_p_i.html#ac5a449eb8492fef49421d8e3babf205f", null ], + [ "statusGet", "group___p_d_m___a_p_i.html#a2b1840e35134d539722e741e0b00042c", null ], + [ "close", "group___p_d_m___a_p_i.html#a37bb473e04c42ef4dc01e03f6c52ce75", null ], + [ "callbackSet", "group___p_d_m___a_p_i.html#a3a08bbd100782b9a8771628cc2637edb", null ] + ] ], + [ "pdm_instance_t", "group___p_d_m___a_p_i.html#structpdm__instance__t", [ + [ "p_ctrl", "group___p_d_m___a_p_i.html#a3c9a2ef616d009192da8185b064ba3ab", null ], + [ "p_cfg", "group___p_d_m___a_p_i.html#aa7507f32d16aa2574b645cd8ac720e30", null ], + [ "p_api", "group___p_d_m___a_p_i.html#a82eac8296ce13d4a73f461bd10bf9242", null ] + ] ], + [ "pdm_ctrl_t", "group___p_d_m___a_p_i.html#ga16be2346ab1fd4d3929228a28914430c", null ], + [ "pdm_pcm_width_t", "group___p_d_m___a_p_i.html#gac80768e70548497f4a739b84d0af572f", [ + [ "PDM_PCM_WIDTH_20_BITS_0_18", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fa66dcfd2b5e3f5c788bf30d09e33ecea9", null ], + [ "PDM_PCM_WIDTH_20_BITS_1_18", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fa5c1961f77255f5cc1e9b10bb2eb7a610", null ], + [ "PDM_PCM_WIDTH_20_BITS_2_18", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fa422ec8ffc432c508a18febbd57f857c9", null ], + [ "PDM_PCM_WIDTH_20_BITS_3_18", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fabd56bdeaef4f1e776b865066e1dbe6b1", null ], + [ "PDM_PCM_WIDTH_16_BITS_4_18", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fae0af427ccb4ce9337eded095b609a2b6", null ], + [ "PDM_PCM_WIDTH_16_BITS_3_17", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fac2744c4aaff0de1651b0c61c39c2291e", null ], + [ "PDM_PCM_WIDTH_16_BITS_2_16", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fa8778dcb9208e5416f680c6fe1f1f6279", null ], + [ "PDM_PCM_WIDTH_16_BITS_1_15", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fa324772bd777c1f50889a17b70f3444a8", null ], + [ "PDM_PCM_WIDTH_16_BITS_0_14", "group___p_d_m___a_p_i.html#ggac80768e70548497f4a739b84d0af572fa3adeaaa39404c582601c40179f1e6629", null ] + ] ], + [ "pdm_input_data_edge_t", "group___p_d_m___a_p_i.html#ga471ab0afd7d0f709e50ece23087b1759", [ + [ "PDM_INPUT_DATA_EDGE_RISE", "group___p_d_m___a_p_i.html#gga471ab0afd7d0f709e50ece23087b1759ab7bc06eef0965cb223d7da74d5164afb", null ], + [ "PDM_INPUT_DATA_EDGE_FALL", "group___p_d_m___a_p_i.html#gga471ab0afd7d0f709e50ece23087b1759ad4f961a1e93d174697084cd288c0e57f", null ] + ] ], + [ "pdm_event_t", "group___p_d_m___a_p_i.html#gafb514c195258d2f14c8e18e3778ad946", [ + [ "PDM_EVENT_IDLE", "group___p_d_m___a_p_i.html#ggafb514c195258d2f14c8e18e3778ad946aa4e2f360c85f3e28c57bfa71b932a57d", null ], + [ "PDM_EVENT_DATA", "group___p_d_m___a_p_i.html#ggafb514c195258d2f14c8e18e3778ad946ac3719cfdf7fc1e91172888da1ab6f511", null ], + [ "PDM_EVENT_SOUND_DETECTION", "group___p_d_m___a_p_i.html#ggafb514c195258d2f14c8e18e3778ad946a3cf03b37b166de31e8e8761161bf7e44", null ], + [ "PDM_EVENT_ERROR", "group___p_d_m___a_p_i.html#ggafb514c195258d2f14c8e18e3778ad946a6ab9b149f9673d692a581c5211f13134", null ] + ] ], + [ "pdm_error_t", "group___p_d_m___a_p_i.html#gaf682776db13b51a982b047a8eb5fef2d", [ + [ "PDM_ERROR_SHORT_CIRCUIT", "group___p_d_m___a_p_i.html#ggaf682776db13b51a982b047a8eb5fef2da0507dc19cc300d66e07d4b452a44c9a9", null ], + [ "PDM_ERROR_OVERVOLTAGE_LOWER", "group___p_d_m___a_p_i.html#ggaf682776db13b51a982b047a8eb5fef2da70bb4c740eec0bdd92cf20e63e540ba7", null ], + [ "PDM_ERROR_OVERVOLTAGE_UPPER", "group___p_d_m___a_p_i.html#ggaf682776db13b51a982b047a8eb5fef2dab00a11e564c13def3c78e520e09573ab", null ], + [ "PDM_ERROR_BUFFER_OVERWRITE", "group___p_d_m___a_p_i.html#ggaf682776db13b51a982b047a8eb5fef2da61c56fc9d6d836096a7c7e4b10c0ee17", null ] + ] ], + [ "pdm_state_t", "group___p_d_m___a_p_i.html#ga09df76d543b0cc6b39c5fed3bf1f4485", [ + [ "PDM_STATE_IN_USE", "group___p_d_m___a_p_i.html#gga09df76d543b0cc6b39c5fed3bf1f4485a886d05c63fd087836c605e609908161c", null ], + [ "PDM_STATE_STOPPED", "group___p_d_m___a_p_i.html#gga09df76d543b0cc6b39c5fed3bf1f4485a571969657d1a5ca91391807510eed100", null ] + ] ] +]; \ No newline at end of file diff --git a/group___p_o_e_g.html b/group___p_o_e_g.html index 609109f..0bc720d 100644 --- a/group___p_o_e_g.html +++ b/group___p_o_e_g.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Port Output Enable for GPT (r_poeg) +RZV Flexible Software Package Documentation: Port Output Enable for GPT (r_poeg) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -145,17 +213,17 @@

    Default (BSP) If selected code for parameter checking is included in the build.
    -

    Configurations for Driver > Timers > Port Output Enable for GPT on r_poeg

    -This module can be added to the Stacks tab via New Stack > Driver > Timers > Port Output Enable for GPT on r_poeg.
    +

    Configurations for Timers > Port Output Enable for GPT (r_poeg)

    +This module can be added to the Stacks tab via New Stack > Timers > Port Output Enable for GPT (r_poeg).

    - + - + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_poeg0 Module name.
    General > ChannelMust be a valid POEG channel0 Specify the hardware channel.
    General > ChannelChannel number must be a positive integer0 Specify the hardware channel.
    General > TriggerMPU Specific OptionsSelect the trigger sources that will enable POEG. Software disable is always supported. This configuration can only be set once after reset. It cannot be modified after the initial setting.
    General > TriggerMCU Specific OptionsSelect the trigger sources that will enable POEG. Software disable is always supported. This configuration can only be set once after reset. It cannot be modified after the initial setting.
    Input > GTETRG Polarity
    • @@ -169,18 +237,20 @@

      Configurations for Driver > Timers > Port Output Enable for GPT on r_p
    • Disabled
    • -P0CLK / 1
      • +Clock Source / 1

    • -P0CLK / 8
      • +Clock Source / 8
    • -P0CLK / 32
      • +Clock Source / 32
    • -P0CLK / 128
      • +Clock Source / 128
    -    		Disabled Configure the noise filter for the GTETRG pin. Only applicable if GTETRG pin is selected under Trigger.
    Clock Source / 1 Configure the noise filter for the GTETRG pin. Only applicable if GTETRG pin is selected under Trigger.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be specified here. If this callback function is provided, it will be called from the interrupt service routine (ISR) when GPT output pins are disabled by POEG.
    Interrupts > POEG Interrupt EnableMCU Specific OptionsEnable the POEG interrupt.
    Interrupts > Interrupt PriorityValue must be an integer between 0 and 2554 Select the POEG interrupt priority.

    @@ -444,7 +514,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___p_o_e_g___a_p_i.html b/group___p_o_e_g___a_p_i.html index 3b52688..13d9fc4 100644 --- a/group___p_o_e_g___a_p_i.html +++ b/group___p_o_e_g___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: POEG Interface +RZV Flexible Software Package Documentation: POEG Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -617,7 +685,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..293e15a --- /dev/null +++ b/group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.html @@ -0,0 +1,192 @@ + + + + + + + +RZV Flexible Software Package Documentation: Analog + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Modules
    +
    +
    Analog
    Modules
    +
    +
    +

    Detailed Description

    +

    Analog Modules.

    + + + + + + + + + + + +

    +Modules

     Analog to Digital Converter (r_adc_c)
     Driver for the ADC peripheral on RZ MPUs. This module implements the ADC Interface.
     
     Analog to Digital Converter (r_adc_e)
     Driver for the and ADC12 peripherals on RZ microprocessor. This module implements the ADC Interface.
     
     Temperature Sensor Unit (r_tsu_b)
     Driver for the TSU peripheral on RZ microprocessor. This module implements the ADC Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..994db4b --- /dev/null +++ b/group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.js @@ -0,0 +1,6 @@ +var group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s = +[ + [ "Analog to Digital Converter (r_adc_c)", "group___a_d_c___c.html", "group___a_d_c___c" ], + [ "Analog to Digital Converter (r_adc_e)", "group___a_d_c___e.html", "group___a_d_c___e" ], + [ "Temperature Sensor Unit (r_tsu_b)", "group___t_s_u___b.html", "group___t_s_u___b" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___c_o_m_m_o_n.html b/group___r_e_n_e_s_a_s___c_o_m_m_o_n.html index d82742c..d921fdc 100644 --- a/group___r_e_n_e_s_a_s___c_o_m_m_o_n.html +++ b/group___r_e_n_e_s_a_s___c_o_m_m_o_n.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: BSP +RZV Flexible Software Package Documentation: BSP @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Modules | @@ -106,7 +174,7 @@  Common Error Codes    MPU Board Support Package - The BSP is responsible for getting the MPU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, interrupts and C runtime environment.
    + The BSP is responsible for getting the MCU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, clocks, interrupts, C runtime environment, and stack monitor.
       BSP I/O access  This module provides basic read/write access to port pins.
    @@ -157,7 +225,7 @@

    -struct fsp_pack_version_t +struct fsp_pack_version_t __unnamed__ @@ -306,7 +374,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..487bd7f --- /dev/null +++ b/group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.html @@ -0,0 +1,240 @@ + + + + + + + +RZV Flexible Software Package Documentation: Connectivity + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Modules
    +
    +
    Connectivity
    Modules
    +
    +
    +

    Detailed Description

    +

    Connectivity Modules.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Modules

     Controller Area Network - Flexible Data (r_canfd)
     Driver for the CANFD peripheral on RZ MPUs. This module implements the CAN Interface.
     
     I3C (r_i3c_b)
     Driver for the I3C peripheral on RZ MPU. This module implements the I3C Interface.
     
     Message Handling Unit for non secure channels (r_mhu_b_ns)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).
     
     Message Handling Unit for non-secure software interrupt receive (r_mhu_b_ns_swint_get)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get).
     
     Message Handling Unit for non-secure software interrupt generation (r_mhu_b_ns_swint_set)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set).
     
     Message Handling Unit for secure channels (r_mhu_b_s)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).
     
     Message Handling Unit for non secure channels (r_mhu_ns)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).
     
     Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get).
     
     Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set).
     
     Message Handling Unit for secure channels (r_mhu_s)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).
     
     PDM Interface (r_pdm)
     Driver for the PDM peripheral on RZ MPUs. This module implements the PDM Interface.
     
     I2C Master on RIIC (r_riic_master)
     Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Master Interface.
     
     I2C Slave (r_riic_slave)
     Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Slave Interface.
     
     Renesas Serial Peripheral Interface (r_rspi)
     Driver for the RSPI peripheral on RZ MPUs. This module implements the SPI Interface.
     
     I2C Master (r_sci_b_i2c)
     Driver for the SCI_B peripheral on RZ MPUs. This module implements the I2C Master Interface.
     
     UART (r_sci_b_uart)
     Driver for the SCI peripheral on RZ MPUs. This module implements the UART Interface.
     
     Serial Communications Interface (SCIF) UART (r_scif_uart)
     Driver for the SCIF peripheral on RZ MPUs. This module implements the UART Interface.
     
     SPI (r_spi_b)
     Driver for the SPI peripheral on RZ MPUs. This module implements the SPI Interface.
     
     I2C Communication Device (rm_comms_i2c)
     Middleware to implement the I2C communications interface. This module implements the Communicatons Middleware Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..681259c --- /dev/null +++ b/group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.js @@ -0,0 +1,22 @@ +var group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s = +[ + [ "Controller Area Network - Flexible Data (r_canfd)", "group___c_a_n_f_d.html", "group___c_a_n_f_d" ], + [ "I3C (r_i3c_b)", "group___i3_c___b.html", "group___i3_c___b" ], + [ "Message Handling Unit for non secure channels (r_mhu_b_ns)", "group___m_h_u___b___n_s.html", "group___m_h_u___b___n_s" ], + [ "Message Handling Unit for non-secure software interrupt receive (r_mhu_b_ns_swint_get)", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html", "group___m_h_u___b___n_s___s_w_i_n_t___g_e_t" ], + [ "Message Handling Unit for non-secure software interrupt generation (r_mhu_b_ns_swint_set)", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html", "group___m_h_u___b___n_s___s_w_i_n_t___s_e_t" ], + [ "Message Handling Unit for secure channels (r_mhu_b_s)", "group___m_h_u___b___s.html", "group___m_h_u___b___s" ], + [ "Message Handling Unit for non secure channels (r_mhu_ns)", "group___m_h_u___n_s.html", "group___m_h_u___n_s" ], + [ "Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)", "group___m_h_u___n_s___s_w_i_n_t___g_e_t.html", "group___m_h_u___n_s___s_w_i_n_t___g_e_t" ], + [ "Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)", "group___m_h_u___n_s___s_w_i_n_t___s_e_t.html", "group___m_h_u___n_s___s_w_i_n_t___s_e_t" ], + [ "Message Handling Unit for secure channels (r_mhu_s)", "group___m_h_u___s.html", "group___m_h_u___s" ], + [ "PDM Interface (r_pdm)", "group___p_d_m.html", "group___p_d_m" ], + [ "I2C Master on RIIC (r_riic_master)", "group___r_i_i_c___m_a_s_t_e_r.html", "group___r_i_i_c___m_a_s_t_e_r" ], + [ "I2C Slave (r_riic_slave)", "group___r_i_i_c___s_l_a_v_e.html", "group___r_i_i_c___s_l_a_v_e" ], + [ "Renesas Serial Peripheral Interface (r_rspi)", "group___r_s_p_i.html", "group___r_s_p_i" ], + [ "I2C Master (r_sci_b_i2c)", "group___s_c_i___b___i2_c.html", "group___s_c_i___b___i2_c" ], + [ "UART (r_sci_b_uart)", "group___s_c_i___b___u_a_r_t.html", "group___s_c_i___b___u_a_r_t" ], + [ "Serial Communications Interface (SCIF) UART (r_scif_uart)", "group___s_c_i_f___u_a_r_t.html", "group___s_c_i_f___u_a_r_t" ], + [ "SPI (r_spi_b)", "group___s_p_i___b.html", "group___s_p_i___b" ], + [ "I2C Communication Device (rm_comms_i2c)", "group___r_m___c_o_m_m_s___i2_c.html", "group___r_m___c_o_m_m_s___i2_c" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html b/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html index 9889e54..0ee28f1 100644 --- a/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html +++ b/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Common Error Codes +RZV Flexible Software Package Documentation: Common Error Codes @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -147,7 +215,7 @@

    Version id

    -    struct fsp_version_t +struct fsp_version_t __unnamed__ @@ -348,6 +416,8 @@

    FSP_ERR_BUFFER_EMPTY 

    No data available in buffer.

    +FSP_ERR_INVALID_DATA 

    Accuracy of data is not guaranteed.

    + FSP_ERR_INTERNAL 

    Internal error.

    FSP_ERR_WAIT_ABORTED 

    Wait aborted.

    @@ -512,6 +582,8 @@

    FSP_ERR_ETHER_ERROR_PHY_COMMUNICATION 

    ETHERC/EDMAC has an error in the phy communication.

    +FSP_ERR_ETHER_RECEIVE_BUFFER_ACTIVE 

    Receive buffer is active.

    + FSP_ERR_ETHER_PHY_ERROR_LINK 

    PHY is not link up.

    FSP_ERR_ETHER_PHY_NOT_READY 

    PHY has an error in the Auto-negotiation.

    @@ -526,6 +598,36 @@

    FSP_ERR_CTSU_INCOMPLETE_TUNING 

    Incomplete initial offset tuning.

    +FSP_ERR_CTSU_DIAG_NOT_YET 

    Diagnosis of data collected no yet.

    + +FSP_ERR_CTSU_DIAG_LDO_OVER_VOLTAGE 

    Diagnosis of LDO over voltage failed.

    + +FSP_ERR_CTSU_DIAG_CCO_HIGH 

    Diagnosis of CCO into 19.2uA failed.

    + +FSP_ERR_CTSU_DIAG_CCO_LOW 

    Diagnosis of CCO into 2.4uA failed.

    + +FSP_ERR_CTSU_DIAG_SSCG 

    Diagnosis of SSCG frequency failed.

    + +FSP_ERR_CTSU_DIAG_DAC 

    Diagnosis of non-touch count value failed.

    + +FSP_ERR_CTSU_DIAG_OUTPUT_VOLTAGE 

    Diagnosis of LDO output voltage failed.

    + +FSP_ERR_CTSU_DIAG_OVER_VOLTAGE 

    Diagnosis of over voltage detection circuit failed.

    + +FSP_ERR_CTSU_DIAG_OVER_CURRENT 

    Diagnosis of over current detection circuit failed.

    + +FSP_ERR_CTSU_DIAG_LOAD_RESISTANCE 

    Diagnosis of LDO internal resistance value failed.

    + +FSP_ERR_CTSU_DIAG_CURRENT_SOURCE 

    Diagnosis of Current source value failed.

    + +FSP_ERR_CTSU_DIAG_SENSCLK_GAIN 

    Diagnosis of SENSCLK frequency gain failed.

    + +FSP_ERR_CTSU_DIAG_SUCLK_GAIN 

    Diagnosis of SUCLK frequency gain failed.

    + +FSP_ERR_CTSU_DIAG_CLOCK_RECOVERY 

    Diagnosis of SUCLK clock recovery function failed.

    + +FSP_ERR_CTSU_DIAG_CFC_GAIN 

    Diagnosis of CFC oscillator gain failed.

    + FSP_ERR_CARD_INIT_FAILED 

    SD card or eMMC device failed to initialize.

    FSP_ERR_CARD_NOT_INSERTED 

    SD card not installed.

    @@ -558,6 +660,8 @@

    FSP_ERR_CAN_MESSAGE_LOST 

    Receive message has been overwritten or overrun.

    +FSP_ERR_CAN_TRANSMIT_FIFO_FULL 

    Transmit FIFO is full.

    + FSP_ERR_WIFI_CONFIG_FAILED 

    WiFi module Configuration failed.

    FSP_ERR_WIFI_INIT_FAILED 

    WiFi module initialization failed.

    @@ -570,6 +674,8 @@

    FSP_ERR_WIFI_SCAN_COMPLETE 

    Wifi scan has completed.

    +FSP_ERR_WIFI_AP_NOT_CONNECTED 

    WiFi module is not connected to access point.

    + FSP_ERR_CELLULAR_CONFIG_FAILED 

    Cellular module Configuration failed.

    FSP_ERR_CELLULAR_INIT_FAILED 

    Cellular module initialization failed.

    @@ -638,6 +744,12 @@

    FSP_ERR_CRYPTO_SCE_KEY_SET_FAIL 

    Failure to Init Cipher.

    +FSP_ERR_CRYPTO_SCE_AUTHENTICATION 

    Authentication failed.

    + +FSP_ERR_CRYPTO_SCE_PARAMETER 

    Input date is illegal.

    + +FSP_ERR_CRYPTO_SCE_PROHIBIT_FUNCTION 

    An invalid function call occurred.

    + FSP_ERR_CRYPTO_COMMON_NOT_OPENED 

    Crypto Framework Common is not opened.

    FSP_ERR_CRYPTO_HAL_ERROR 

    Cryoto HAL module returned an error.

    @@ -671,7 +783,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.js b/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.js index 367bae3..ac05677 100644 --- a/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.js +++ b/group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.js @@ -49,6 +49,7 @@ var group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s = [ "FSP_ERR_NOT_FOUND", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a5b3fa149fddaa9617a7d3cacf67810a4", null ], [ "FSP_ERR_NO_CALLBACK_MEMORY", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a0b11740f5efdcaa58bd9606a1e29fa53", null ], [ "FSP_ERR_BUFFER_EMPTY", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a36f32f07063bd03749f0410256fa95db", null ], + [ "FSP_ERR_INVALID_DATA", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a2b8bd9b82940ba39e5d6c8351a8e6528", null ], [ "FSP_ERR_INTERNAL", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a6d11b644cafb53d7d39f701de5ca026d", null ], [ "FSP_ERR_WAIT_ABORTED", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8aa5cbda3787ddf5092d0fdf14b8e4fe57", null ], [ "FSP_ERR_FRAMING", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a8f76d058261cd655519cbc81f1586bc4", null ], @@ -131,6 +132,7 @@ var group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s = [ "FSP_ERR_ETHER_ERROR_TRANSMIT_BUFFER_FULL", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a7ff828228ccab4f53b2438ddd1c7e11a", null ], [ "FSP_ERR_ETHER_ERROR_FILTERING", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8affc315c6031ade6b6642d2649281f2e0", null ], [ "FSP_ERR_ETHER_ERROR_PHY_COMMUNICATION", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a6240bb179602fe6d111b3cb464ca4612", null ], + [ "FSP_ERR_ETHER_RECEIVE_BUFFER_ACTIVE", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a092517cd93432a76ae16c3cc3ff4bc29", null ], [ "FSP_ERR_ETHER_PHY_ERROR_LINK", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a629a12ea100187a63ddb2f8ee9a5c823", null ], [ "FSP_ERR_ETHER_PHY_NOT_READY", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8aad936f5a80f8c3fe3faa8d6220189098", null ], [ "FSP_ERR_QUEUE_FULL", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8afe0f3347d7aed817201dac3bbad6fc75", null ], @@ -138,6 +140,21 @@ var group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s = [ "FSP_ERR_CTSU_SCANNING", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8abf96e28ad6ffcefb3753b3236b7d8f74", null ], [ "FSP_ERR_CTSU_NOT_GET_DATA", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a7cfb255a9b41bb7d578b892b94ec362c", null ], [ "FSP_ERR_CTSU_INCOMPLETE_TUNING", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a19beacb3a5e19f362431d08a1fcaaa5d", null ], + [ "FSP_ERR_CTSU_DIAG_NOT_YET", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8ac3355a82b4fc612941c6d2b8f4f52f90", null ], + [ "FSP_ERR_CTSU_DIAG_LDO_OVER_VOLTAGE", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8aab6cc8f1186d7e953d0a25806106b01c", null ], + [ "FSP_ERR_CTSU_DIAG_CCO_HIGH", "group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html#ggadfb1288da0fcc7ae1dc88c58601374f8a7ee7b868f3bfce9f09e5a45c47cce101", null ], + [ "FSP_ERR_CTSU_DIAG_CCO_LOW", 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b/group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s.html @@ -0,0 +1,192 @@ + + + + + + + +RZV Flexible Software Package Documentation: Input + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
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    +
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    + + + + + + + +
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    +Modules
    +
    +
    Input
    Modules
    +
    +
    +

    Detailed Description

    +

    Input Modules.

    + + + + + + + + + + + +

    +Modules

     External IRQ (r_intc_irq)
     Driver for the INTC_IRQ peripheral on RZ MPUs. This module implements the External IRQ Interface.
     
     External IRQ (r_intc_nmi)
     Driver for the INTC_NMI peripheral on RZ MPUs. This module implements the External IRQ Interface.
     
     External IRQ (r_intc_tint)
     Driver for the Interrupt Controller peripheral on RZ MPUs. This module implements the External IRQ Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..646301c --- /dev/null +++ b/group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s.js @@ -0,0 +1,6 @@ +var group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s = +[ + [ "External IRQ (r_intc_irq)", "group___i_n_t_c___i_r_q.html", "group___i_n_t_c___i_r_q" ], + [ "External IRQ (r_intc_nmi)", "group___i_n_t_c___n_m_i.html", "group___i_n_t_c___n_m_i" ], + [ "External IRQ (r_intc_tint)", "group___i_n_t_c___t_i_n_t.html", "group___i_n_t_c___t_i_n_t" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.html b/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.html index 336ad9b..e54cbf4 100644 --- a/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.html +++ b/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Interfaces +RZV Flexible Software Package Documentation: Interfaces @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Modules
    @@ -101,15 +169,30 @@ + + + + + + + + + + + + + + + @@ -122,12 +205,21 @@ + + + + + + + + + @@ -137,6 +229,9 @@ + + + @@ -146,9 +241,6 @@ - - - @@ -159,7 +251,7 @@ diff --git a/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.js b/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.js index 2c00124..3a1d958 100644 --- a/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.js +++ b/group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.js @@ -1,20 +1,28 @@ var group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s = [ + [ "ADC Interface", "group___a_d_c___a_p_i.html", "group___a_d_c___a_p_i" ], [ "CAN Interface", "group___c_a_n___a_p_i.html", "group___c_a_n___a_p_i" ], + [ "CRC Interface", "group___c_r_c___a_p_i.html", "group___c_r_c___a_p_i" ], + [ "ELC Interface", "group___e_l_c___a_p_i.html", "group___e_l_c___a_p_i" ], [ "External IRQ Interface", "group___e_x_t_e_r_n_a_l___i_r_q___a_p_i.html", "group___e_x_t_e_r_n_a_l___i_r_q___a_p_i" ], [ "I2C Master Interface", "group___i2_c___m_a_s_t_e_r___a_p_i.html", "group___i2_c___m_a_s_t_e_r___a_p_i" ], + [ "I2C Slave Interface", "group___i2_c___s_l_a_v_e___a_p_i.html", "group___i2_c___s_l_a_v_e___a_p_i" ], + [ "I3C Interface", "group___i3_c___a_p_i.html", "group___i3_c___a_p_i" ], [ "I/O Port Interface", "group___i_o_p_o_r_t___a_p_i.html", "group___i_o_p_o_r_t___a_p_i" ], [ "MHU Interface (for secure and non secure channels)", "group___m_h_u___a_p_i.html", "group___m_h_u___a_p_i" ], [ "MHU Interface (Software Interrupt Get)", "group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i.html", "group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i" ], [ "MHU Interface (Software Interrupt Set)", "group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i.html", "group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i" ], + [ "PDM Interface", "group___p_d_m___a_p_i.html", "group___p_d_m___a_p_i" ], [ "POEG Interface", "group___p_o_e_g___a_p_i.html", "group___p_o_e_g___a_p_i" ], + [ "RTC Interface", "group___r_t_c___a_p_i.html", "group___r_t_c___a_p_i" ], [ "SPI Interface", "group___s_p_i___a_p_i.html", "group___s_p_i___a_p_i" ], + [ "SPI Flash Interface", "group___s_p_i___f_l_a_s_h___a_p_i.html", "group___s_p_i___f_l_a_s_h___a_p_i" ], [ "Timer Interface", "group___t_i_m_e_r___a_p_i.html", "group___t_i_m_e_r___a_p_i" ], [ "Transfer Interface", "group___t_r_a_n_s_f_e_r___a_p_i.html", "group___t_r_a_n_s_f_e_r___a_p_i" ], [ "UART Interface", "group___u_a_r_t___a_p_i.html", "group___u_a_r_t___a_p_i" ], + [ "WDT Interface", "group___w_d_t___a_p_i.html", "group___w_d_t___a_p_i" ], [ "Communicatons Middleware Interface", "group___r_m___c_o_m_m_s___a_p_i.html", "group___r_m___c_o_m_m_s___a_p_i" ], [ "HS300X Middleware Interface", "group___r_m___h_s300_x___a_p_i.html", "group___r_m___h_s300_x___a_p_i" ], [ "HS400X Middleware Interface", "group___r_m___h_s400_x___a_p_i.html", "group___r_m___h_s400_x___a_p_i" ], - [ "OB1203 Middleware Interface", "group___r_m___o_b1203___a_p_i.html", "group___r_m___o_b1203___a_p_i" ], [ "ZMOD4XXX Middleware Interface", "group___r_m___z_m_o_d4_x_x_x___a_p_i.html", "group___r_m___z_m_o_d4_x_x_x___a_p_i" ] ]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.html index 9a05746..7dcee56 100644 --- a/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.html +++ b/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Modules +RZV Flexible Software Package Documentation: Modules @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Modules
    @@ -98,7 +166,8 @@

    Detailed Description

    Modules are the smallest unit of software available in the FSP. Each module implements one interface.

    -

    For more information on FSP Modules and Interfaces review FSP Modules, FSP Stacks and FSP Interfaces in the FSP Architecutre section of this manual.

    +

    For more information on FSP Modules and Interfaces review fsp-modules, fsp-stacks and fsp-interfaces in the FSP Architecutre section of this manual.

    +
    Note
    Not all modules are available for all MCUs. For more information, see the User's Manual for the specific MCU.

    Organization of Module Sections

    Each module within FSP has a detailed Users' Guide listed below. Each guide typically includes the following content:

      @@ -114,62 +183,35 @@

    Modules

     ADC Interface
     Interface for A/D Converters.
     
     CAN Interface
     Interface for CAN peripheral.
     
     CRC Interface
     Interface for cyclic redundancy checking.
     
     ELC Interface
     Interface for the Event Link Controller.
     
     External IRQ Interface
     Interface for detecting external interrupts.
     
     I2C Master Interface
     Interface for I2C master communication.
     
     I2C Slave Interface
     Interface for I2C slave communication.
     
     I3C Interface
     Interface for I3C.
     
     I/O Port Interface
     Interface for accessing I/O ports and configuring I/O functionality.
     
     MHU Interface (Software Interrupt Set)
     Interface for Message Handling Unit (Software Interrupt Set)
     
     PDM Interface
     Interface for PDM audio communication.
     
     POEG Interface
     Interface for the Port Output Enable for GPT.
     
     RTC Interface
     Interface for accessing the Realtime Clock.
     
     SPI Interface
     Interface for SPI communications.
     
     SPI Flash Interface
     Interface for accessing external SPI flash devices.
     
     Timer Interface
     Interface for timer functions.
     
     UART Interface
     Interface for UART communications.
     
     WDT Interface
     Interface for watch dog timer functions.
     
     Communicatons Middleware Interface
     Interface for Communications Middleware functions.
     
     HS400X Middleware Interface
     Interface for HS400X Middleware functions.
     
     OB1203 Middleware Interface
     Interface for OB1203 Middleware functions.
     
     ZMOD4XXX Middleware Interface
     Interface for ZMOD4XXX Middleware functions.
     
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + + - - + +

    Modules

     Controller Area Network - Flexible Data (r_canfd)
     Driver for the CANFD peripheral on RZ MPUs. This module implements the CAN Interface.
     
     General PWM Timer (r_gpt)
     Driver for the GPT peripheral on RZ MPUs. This module implements the Timer Interface.
     
     General Timer (r_gtm)
     Driver for the GTM peripherals on RZ MPUs. This module implements the Timer Interface.
     
     External IRQ (r_intc_irq)
     Driver for the INTC_IRQ peripheral on RZ/V2L. This module implements the External IRQ Interface.
     
     I/O Ports (r_ioport)
     Driver for the I/O Ports peripheral on RZ MPUs. This module implements the I/O Port Interface.
     
     Message Handling Unit for non secure channels (r_mhu_ns)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).
     
     Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get).
     
     Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set).
     
     Message Handling Unit for secure channels (r_mhu_s)
     Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels).
     
     Port Output Enable for GPT (r_poeg)
     Driver for the POEG peripheral on RZ MPUs. This module implements the POEG Interface.
     Analog
     Analog Modules.
     
     I2C Master on RIIC (r_riic_master)
     Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Master Interface.
     Connectivity
     Connectivity Modules.
     
     Renesas Serial Peripheral Interface (r_rspi)
     Driver for the RSPI peripheral on RZ MPUs. This module implements the SPI Interface.
     Input
     Input Modules.
     
     Serial Communications Interface (SCIF) UART (r_scif_uart)
     Driver for the SCIF peripheral on RZ MPUs. This module implements the UART Interface.
     Monitoring
     Monitoring Modules.
     
     I2C Communication Device (rm_comms_i2c)
     Middleware to implement the I2C communications interface. This module implements the Communicatons Middleware Interface.
     RTOS
     RTOS Modules.
     
     FreeRTOS Port (rm_freertos_port)
     FreeRTOS port for RZ MPUs.
     Sensor
     Sensor Modules.
     
     HS300X Temperature/Humidity Sensor (rm_hs300x)
     Middleware to implement the HS300X sensor interface. This module implements the HS300X Middleware Interface.
     Storage
     Storage Modules.
     
     HS400X Temperature/Humidity Sensor (rm_hs400x)
     Middleware to implement the HS400X sensor interface. This module implements the HS400X Middleware Interface.
     System
     System Modules.
     
     OB1203 Light/Proximity/PPG Sensor (rm_ob1203)
     Middleware to implement the OB1203 sensor interface. This module implements the OB1203 Middleware Interface.
     Timers
     Timers Modules.
     
     ZMOD4XXX Gas Sensor (rm_zmod4xxx)
     Middleware to implement the ZMOD4XXX sensor interface. This module implements the ZMOD4XXX Middleware Interface.
     Transfer
     Transfer Modules.
     
    @@ -178,7 +220,7 @@ diff --git a/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.js index 9f4b4ea..dd09783 100644 --- a/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.js +++ b/group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.js @@ -1,22 +1,13 @@ var group___r_e_n_e_s_a_s___m_o_d_u_l_e_s = [ - [ "Controller Area Network - Flexible Data (r_canfd)", "group___c_a_n_f_d.html", "group___c_a_n_f_d" ], - [ "General PWM Timer (r_gpt)", "group___g_p_t.html", "group___g_p_t" ], - [ "General Timer (r_gtm)", "group___g_t_m.html", "group___g_t_m" ], - [ "External IRQ (r_intc_irq)", "group___i_n_t_c___i_r_q.html", "group___i_n_t_c___i_r_q" ], - [ "I/O Ports (r_ioport)", "group___i_o_p_o_r_t.html", "group___i_o_p_o_r_t" ], - [ "Message Handling Unit for non secure channels (r_mhu_ns)", "group___m_h_u___n_s.html", "group___m_h_u___n_s" ], - [ "Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)", "group___m_h_u___n_s___s_w_i_n_t___g_e_t.html", "group___m_h_u___n_s___s_w_i_n_t___g_e_t" ], - [ "Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)", "group___m_h_u___n_s___s_w_i_n_t___s_e_t.html", "group___m_h_u___n_s___s_w_i_n_t___s_e_t" ], - [ "Message Handling Unit for secure channels (r_mhu_s)", "group___m_h_u___s.html", "group___m_h_u___s" ], - [ "Port Output Enable for GPT (r_poeg)", "group___p_o_e_g.html", "group___p_o_e_g" ], - [ "I2C Master on RIIC (r_riic_master)", "group___r_i_i_c___m_a_s_t_e_r.html", "group___r_i_i_c___m_a_s_t_e_r" ], - [ "Renesas Serial Peripheral Interface (r_rspi)", "group___r_s_p_i.html", "group___r_s_p_i" ], - [ "Serial Communications Interface (SCIF) UART (r_scif_uart)", "group___s_c_i_f___u_a_r_t.html", "group___s_c_i_f___u_a_r_t" ], - [ "I2C Communication Device (rm_comms_i2c)", "group___r_m___c_o_m_m_s___i2_c.html", "group___r_m___c_o_m_m_s___i2_c" ], - [ "FreeRTOS Port (rm_freertos_port)", "group___r_m___f_r_e_e_r_t_o_s___p_o_r_t.html", null ], - [ "HS300X Temperature/Humidity Sensor (rm_hs300x)", "group___r_m___h_s300_x.html", "group___r_m___h_s300_x" ], - [ "HS400X Temperature/Humidity Sensor (rm_hs400x)", "group___r_m___h_s400_x.html", "group___r_m___h_s400_x" ], - [ "OB1203 Light/Proximity/PPG Sensor (rm_ob1203)", "group___r_m___o_b1203.html", "group___r_m___o_b1203" ], - [ "ZMOD4XXX Gas Sensor (rm_zmod4xxx)", "group___r_m___z_m_o_d4_x_x_x.html", "group___r_m___z_m_o_d4_x_x_x" ] + [ "Analog", "group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s" ], + [ "Connectivity", "group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s" ], + [ "Input", "group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s" ], + [ "Monitoring", "group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s" ], + [ "RTOS", "group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s" ], + [ "Sensor", "group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s" ], + [ "Storage", "group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s" ], + [ "System", "group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s" ], + [ "Timers", "group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s" ], + [ "Transfer", "group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.html", "group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s" ] ]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..30b3074 --- /dev/null +++ b/group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.html @@ -0,0 +1,189 @@ + + + + + + + +RZV Flexible Software Package Documentation: Monitoring + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
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    + +
    +
    +
    +
    +
    +Modules
    +
    +
    Monitoring
    Modules
    +
    +
    +

    Detailed Description

    +

    Monitoring Modules.

    + + + + + + + + +

    +Modules

     CRC (r_crc)
     Driver for the CRC peripheral on RZ MPUs. This module implements the CRC Interface.
     
     Watchdog (r_wdt)
     Driver for the WDT peripheral on RZ MPUs. This module implements the WDT Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..52940df --- /dev/null +++ b/group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.js @@ -0,0 +1,5 @@ +var group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s = +[ + [ "CRC (r_crc)", "group___c_r_c.html", "group___c_r_c" ], + [ "Watchdog (r_wdt)", "group___w_d_t.html", "group___w_d_t" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..e5cedab --- /dev/null +++ b/group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.html @@ -0,0 +1,186 @@ + + + + + + + +RZV Flexible Software Package Documentation: RTOS + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
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    +Modules
    +
    +
    RTOS
    Modules
    +
    +
    +

    Detailed Description

    +

    RTOS Modules.

    + + + + + +

    +Modules

     FreeRTOS Port (rm_freertos_port)
     FreeRTOS port for RZ MPUs.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..ca252fa --- /dev/null +++ b/group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.js @@ -0,0 +1,4 @@ +var group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s = +[ + [ "FreeRTOS Port (rm_freertos_port)", "group___r_m___f_r_e_e_r_t_o_s___p_o_r_t.html", null ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..b4ac2b0 --- /dev/null +++ b/group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.html @@ -0,0 +1,192 @@ + + + + + + + +RZV Flexible Software Package Documentation: Sensor + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Modules
    +
    +
    Sensor
    Modules
    +
    +
    +

    Detailed Description

    +

    Sensor Modules.

    + + + + + + + + + + + +

    +Modules

     HS300X Temperature/Humidity Sensor (rm_hs300x)
     Middleware to implement the HS300X sensor interface. This module implements the HS300X Middleware Interface.
     
     HS400X Temperature/Humidity Sensor (rm_hs400x)
     Middleware to implement the HS400X sensor interface. This module implements the HS400X Middleware Interface.
     
     ZMOD4XXX Gas Sensor (rm_zmod4xxx)
     Middleware to implement the ZMOD4XXX sensor interface. This module implements the ZMOD4XXX Middleware Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..5477660 --- /dev/null +++ b/group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.js @@ -0,0 +1,6 @@ +var group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s = +[ + [ "HS300X Temperature/Humidity Sensor (rm_hs300x)", "group___r_m___h_s300_x.html", "group___r_m___h_s300_x" ], + [ "HS400X Temperature/Humidity Sensor (rm_hs400x)", "group___r_m___h_s400_x.html", "group___r_m___h_s400_x" ], + [ "ZMOD4XXX Gas Sensor (rm_zmod4xxx)", "group___r_m___z_m_o_d4_x_x_x.html", "group___r_m___z_m_o_d4_x_x_x" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..8999f83 --- /dev/null +++ b/group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.html @@ -0,0 +1,186 @@ + + + + + + + +RZV Flexible Software Package Documentation: Storage + + + + + + + + + + + + + + + + + + + +
    +
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    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    Storage
    Modules
    +
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    Detailed Description

    +

    Storage Modules.

    + + + + + +

    +Modules

     Expanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi)
     Driver for the xSPI peripheral on RZ microprocessor. This module implements the SPI Flash Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..61aed64 --- /dev/null +++ b/group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.js @@ -0,0 +1,4 @@ +var group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s = +[ + [ "Expanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi)", "group___x_s_p_i___q_s_p_i.html", "group___x_s_p_i___q_s_p_i" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..d63a442 --- /dev/null +++ b/group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.html @@ -0,0 +1,189 @@ + + + + + + + +RZV Flexible Software Package Documentation: System + + + + + + + + + + + + + + + + + + + +
    +
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    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Modules
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    System
    Modules
    +
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    +

    Detailed Description

    +

    System Modules.

    + + + + + + + + +

    +Modules

     Event Link Controller (r_elc)
     Driver for the ELC peripheral on RZ microprocessor. This module implements the ELC Interface.
     
     I/O Ports (r_ioport)
     Driver for the I/O Ports peripheral on RZ MPUs. This module implements the I/O Port Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..371519d --- /dev/null +++ b/group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.js @@ -0,0 +1,5 @@ +var group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s = +[ + [ "Event Link Controller (r_elc)", "group___e_l_c.html", "group___e_l_c" ], + [ "I/O Ports (r_ioport)", "group___i_o_p_o_r_t.html", "group___i_o_p_o_r_t" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..eb82808 --- /dev/null +++ b/group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.html @@ -0,0 +1,201 @@ + + + + + + + +RZV Flexible Software Package Documentation: Timers + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +
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    Timers
    Modules
    +
    +
    +

    Detailed Description

    +

    Timers Modules.

    + + + + + + + + + + + + + + + + + + + + +

    +Modules

     Compare Match Timer W (r_cmtw)
     Driver for the CMTW peripheral on RZ MPUs. This module implements the Timer Interface.
     
     General PWM Timer (r_gpt)
     Driver for the GPT peripheral on RZ MPUs. This module implements the Timer Interface.
     
     General Timer (r_gtm)
     Driver for the GTM peripherals on RZ MPUs. This module implements the Timer Interface.
     
     Multi-Function Timer Pulse Unit 3 (r_mtu3)
     Driver for the MTU3 peripherals on RZ microprocessor. This module implements the Timer Interface.
     
     Port Output Enable for GPT (r_poeg)
     Driver for the POEG peripheral on RZ MPUs. This module implements the POEG Interface.
     
     Realtime Clock (r_rtc)
     Driver for the RTC peripheral on RZ MPUs. This module implements the RTC Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..09f69d8 --- /dev/null +++ b/group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.js @@ -0,0 +1,9 @@ +var group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s = +[ + [ "Compare Match Timer W (r_cmtw)", "group___c_m_t_w.html", "group___c_m_t_w" ], + [ "General PWM Timer (r_gpt)", "group___g_p_t.html", "group___g_p_t" ], + [ "General Timer (r_gtm)", "group___g_t_m.html", "group___g_t_m" ], + [ "Multi-Function Timer Pulse Unit 3 (r_mtu3)", "group___m_t_u3.html", "group___m_t_u3" ], + [ "Port Output Enable for GPT (r_poeg)", "group___p_o_e_g.html", "group___p_o_e_g" ], + [ "Realtime Clock (r_rtc)", "group___r_t_c.html", "group___r_t_c" ] +]; \ No newline at end of file diff --git a/group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.html b/group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.html new file mode 100644 index 0000000..5c3fe94 --- /dev/null +++ b/group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.html @@ -0,0 +1,186 @@ + + + + + + + +RZV Flexible Software Package Documentation: Transfer + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Modules
    +
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    Transfer
    Modules
    +
    +
    +

    Detailed Description

    +

    Transfer Modules.

    + + + + + +

    +Modules

     Direct Memory Access Controller (r_dmac_b)
     Driver for the DMAC peripheral on RZ MPUs. This module implements the Transfer Interface.
     
    +
    +
    + + + + + diff --git a/group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.js b/group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.js new file mode 100644 index 0000000..1ceb2d8 --- /dev/null +++ b/group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.js @@ -0,0 +1,4 @@ +var group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s = +[ + [ "Direct Memory Access Controller (r_dmac_b)", "group___d_m_a_c___b.html", "group___d_m_a_c___b" ] +]; \ No newline at end of file diff --git a/group___r_i_i_c___m_a_s_t_e_r.html b/group___r_i_i_c___m_a_s_t_e_r.html index 523810e..a02dfa7 100644 --- a/group___r_i_i_c___m_a_s_t_e_r.html +++ b/group___r_i_i_c___m_a_s_t_e_r.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: I2C Master on RIIC (r_riic_master) +RZV Flexible Software Package Documentation: I2C Master on RIIC (r_riic_master) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    I2C Master on RIIC (r_riic_master)
    Modules
    +
    I2C Master on RIIC (r_riic_master)
    Modules » Connectivity
    @@ -160,6 +228,8 @@

    + +
    Default (BSP) If selected code for parameter checking is included in the build.
    DMAC SupportMCU Specific OptionsIf enabled, DMAC instances will be included in the build for both transmission and reception.
    10-bit slave addressing
    • Enabled
      • @@ -168,8 +238,8 @@

    		Disabled If enabled, the driver will support 10-bit slave addressing mode along with the default 7-bit slave addressing mode.
    -

    Configurations for Driver > Connectivity > I2C Master Driver on r_riic_master

    -This module can be added to the Stacks tab via New Stack > Driver > Connectivity > I2C Master Driver on r_riic_master.
    +

    Configurations for Connectivity > I2C Master (r_riic_master)

    +This module can be added to the Stacks tab via New Stack > Connectivity > I2C Master (r_riic_master).

    @@ -192,7 +262,7 @@

    Configurations for Driver > Connectivity > I2C Master Driver on r_riic

    - + + - +
    ConfigurationOptionsDefaultDescription
    Fall Time (ns)Value must be a non-negative integer120 Set the fall time (tf) in nanoseconds.
    Duty Cycle (%)Value must be an integer between 0 and 10050 Sets the duty ratio of the High-level period of the SCL clock for the bit rate.
    +    		Duty Cycle (%)Value must be an integer between 4 and 9650 Sets the duty ratio of the High-level period of the SCL clock for the bit rate.
    The recommended range of duty ratio to satisfy the minimum value for SCL High-level or Low-level period of AC characteristic is shown below.
    Standard : 40-53%
    Fast-mode : 24-48%
    @@ -218,14 +288,32 @@

    Configurations for Driver > Connectivity > I2C Master Driver on r_riic

    		Short Mode Select the timeout mode to detect bus hang.
    Timeout during SCL Low
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled Select if the timeout can occur when SCL is held low for a duration longer than what is set in the timeout mode.
    CallbackName must be a valid C symbolNULL A user callback function must be provided. This will be called from the interrupt service routine (ISR) upon RIIC transaction completion reporting the transaction status.
    Interrupt Priority LevelValue must be an integer between 0 and 25512 Select the interrupt priority level. This is set for RXI, TXI, TEI, NAKI, SPI, STI, ALI and TMOI interrupts.
    Interrupt Priority LevelValue must be an integer between 0 and 25512 Select the interrupt priority level. This is set for RXI, TXI, TEI, NAKI, SPI, STI, ALI and TMOI interrupts.
    +When DMA transfer is used in RIIC communication, interrupt priorities of DMA and RIIC must be set to meet the following conditions:
    +Set the IPL value of the transfer completion interrupt of the DMAC to be greater than or equal to the IPL value of the RIIC interrupts.

    Clock Configuration

    -

    The RIIC peripheral module uses the P0 clock as its clock source. The actual I2C transfer rate will be calculated and set by the tooling depending on the selected transfer rate. If the P0 clock is configured in such a manner that the selected internal rate cannot be achieved, an error will be returned.

    +

    The RIIC peripheral module uses the clock shown in the following table as its clock source.

    + + + + + + +
    Device Source Clock
    RZ/V2L P0 clock
    RZ/V2H Ch0 to Ch7: PLLCLN/16, Ch8: PLLCM33/16
    +

    The actual I2C transfer rate will be calculated and set by the tooling depending on the selected transfer rate. If the clock source is configured in such a manner that the selected internal rate cannot be achieved, an error will be returned.

    Pin Configuration

    The RIIC peripheral module uses pins on the MPU to communicate to external devices. I/O pins must be selected and configured as required by the external device. An I2C channel would consist of two pins - SDA and SCL for data/address and clock respectively.

    @@ -236,6 +324,7 @@

    • The RIIC NACK reception (NAKI), Start condition (STI), Stop condition (SPI), Arbitration lost (ALI), Timeout (TMOI), receive buffer full (RXI), transmit buffer empty (TXI) and transmit end (TEI) interrupts for the selected channel used must be enabled in the properties of the selected device.
    • Set equal priority levels for all the interrupts mentioned above. Setting the interrupts to different priority levels could result in improper operation.
      • +
    • When DMA transfer is used in RIIC communication, interrupt priorities of DMA and RIIC must be set to meet the following conditions: Set the IPL value of the transfer completion interrupt of the DMAC to be greater than or equal to the IPL value of the RIIC interrupts.

    RIIC Master Rate Calculation

    @@ -279,6 +368,8 @@

    Basic Example

    Enumerations enum  iic_master_timeout_mode_t   +enum  iic_master_timeout_scl_low_t + 

    Data Structure Documentation

    @@ -353,6 +444,12 @@

    Timeout Detection Time Select: Long Mode = 0 and Short Mode = 1. +iic_master_timeout_scl_low_t + +timeout_scl_low + +Allows timeouts to occur when SCL is held low. + iic_master_clock_settings_t clock_settings @@ -418,6 +515,26 @@

    +

    ◆ iic_master_timeout_scl_low_t

    + +
    +
    + + + + +
    enum iic_master_timeout_scl_low_t
    +
    + + + +
    Enumerator
    IIC_MASTER_TIMEOUT_SCL_LOW_DISABLED 

    Timeout detection during SCL low disabled.

    +
    IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED 

    Timeout detection during SCL low enabled.

    +
    +

    Function Documentation

    @@ -758,7 +875,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_i_i_c___m_a_s_t_e_r.js b/group___r_i_i_c___m_a_s_t_e_r.js index 43ab816..a22c41b 100644 --- a/group___r_i_i_c___m_a_s_t_e_r.js +++ b/group___r_i_i_c___m_a_s_t_e_r.js @@ -8,6 +8,7 @@ var group___r_i_i_c___m_a_s_t_e_r = [ "iic_master_instance_ctrl_t", "group___r_i_i_c___m_a_s_t_e_r.html#structiic__master__instance__ctrl__t", null ], [ "riic_master_extended_cfg_t", "group___r_i_i_c___m_a_s_t_e_r.html#structriic__master__extended__cfg__t", [ [ "timeout_mode", "group___r_i_i_c___m_a_s_t_e_r.html#ac4f06d6bc304b3105524646725c0e736", null ], + [ "timeout_scl_low", "group___r_i_i_c___m_a_s_t_e_r.html#a248dede6dc400b36d660ee00bf2b814b", null ], [ "clock_settings", "group___r_i_i_c___m_a_s_t_e_r.html#aa0e87db942a63d7eb72077bf75f34d87", null ], [ "noise_filter_stage", "group___r_i_i_c___m_a_s_t_e_r.html#a81efa4dd941b358e014354ffbf02ac16", null ], [ "naki_irq", "group___r_i_i_c___m_a_s_t_e_r.html#a3e7ce84039e9c21f7a3cdc63060efdd1", null ], @@ -20,6 +21,10 @@ var group___r_i_i_c___m_a_s_t_e_r = [ "IIC_MASTER_TIMEOUT_MODE_LONG", "group___r_i_i_c___m_a_s_t_e_r.html#ggaf8ecd43a76bfa058281bb8b6b3981d3facc441997b6e18766361457d26227b4bd", null ], [ "IIC_MASTER_TIMEOUT_MODE_SHORT", "group___r_i_i_c___m_a_s_t_e_r.html#ggaf8ecd43a76bfa058281bb8b6b3981d3fa4afacd0b267f604d06e2b83891c0e577", null ] ] ], + [ "iic_master_timeout_scl_low_t", "group___r_i_i_c___m_a_s_t_e_r.html#ga9789e54472d093bd5348f202205d28ec", [ + [ "IIC_MASTER_TIMEOUT_SCL_LOW_DISABLED", "group___r_i_i_c___m_a_s_t_e_r.html#gga9789e54472d093bd5348f202205d28eca0773c9356e560a84576f1d5498234a09", null ], + [ "IIC_MASTER_TIMEOUT_SCL_LOW_ENABLED", "group___r_i_i_c___m_a_s_t_e_r.html#gga9789e54472d093bd5348f202205d28eca62238f63df0d06f25af5b158bbfb2169", null ] + ] ], [ "R_RIIC_MASTER_Open", "group___r_i_i_c___m_a_s_t_e_r.html#ga0e3fee8948f4df299977350491d537fa", null ], [ "R_RIIC_MASTER_Read", "group___r_i_i_c___m_a_s_t_e_r.html#ga2a0ac14ddd932a9cab8faf253dcdbbb5", null ], [ "R_RIIC_MASTER_Write", "group___r_i_i_c___m_a_s_t_e_r.html#ga492a86497c72e8f9bcf70d8dcd03c762", null ], diff --git a/group___r_i_i_c___s_l_a_v_e.html b/group___r_i_i_c___s_l_a_v_e.html new file mode 100644 index 0000000..aaf4872 --- /dev/null +++ b/group___r_i_i_c___s_l_a_v_e.html @@ -0,0 +1,712 @@ + + + + + + + +RZV Flexible Software Package Documentation: I2C Slave (r_riic_slave) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
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    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    I2C Slave (r_riic_slave)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_RIIC_SLAVE_Open (i2c_slave_ctrl_t *const p_api_ctrl, i2c_slave_cfg_t const *const p_cfg)
     
    fsp_err_t R_RIIC_SLAVE_Read (i2c_slave_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes)
     
    fsp_err_t R_RIIC_SLAVE_Write (i2c_slave_ctrl_t *const p_api_ctrl, uint8_t *const p_src, uint32_t const bytes)
     
    fsp_err_t R_RIIC_SLAVE_Close (i2c_slave_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_RIIC_SLAVE_CallbackSet (i2c_slave_ctrl_t *const p_api_ctrl, void(*p_callback)(i2c_slave_callback_args_t *), void const *const p_context, i2c_slave_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Slave Interface.

    +

    +Overview

    +

    +Features

    +
      +
    • Supports multiple transmission rates
        +
      • Standard Mode Support with up to 100-kHz transaction rate.
        • +
      • Fast Mode Support with up to 400-kHz transaction rate.
        • +
      • Fast Mode Plus Support with up to 1-MHz transaction rate.
        • +
      +
      • +
    • Reads data written by master device.
      • +
    • Write data which is read by master device.
      • +
    • Can accept 0x00 as slave address.
      • +
    • Can be assigned a 10-bit address.
      • +
    • Clock stretching is supported and can be implemented via callbacks.
      • +
    • Provides Transmission/Reception transaction size in the callback.
      • +
    • I2C Slave can notify the following events via callbacks: Transmission/Reception Request, Transmission/Reception Request for more data, Transmission/Reception Completion, Error Condition.
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_riic_slave

    +The following build time configurations are defined in fsp_cfg/r_riic_slave_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Connectivity > I2C Slave Driver on r_riic_slave

    +This module can be added to the Stacks tab via New Stack > Connectivity > I2C Slave Driver on r_riic_slave.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Interrupt Priority Level > Transmit, Receive, and Transmit EndValue must be an integer between 0 and 25512 Select the interrupt priority level. This is set for TXI, RXI, and TEI interrupts.
    Interrupt Priority Level > NACK, Start, Stop, Timeout, Arbitration lostValue must be an integer between 0 and 25512 Select the interrupt priority level. This is set for NAKI, SPI, STI, ALI, TMOI interrupt.
    NameName must be a valid C symbolg_i2c_slave0 Module name.
    ChannelValue must be a non-negative integer0 Specify the RIIC channel.
    Rate
      +
    • +Standard
      • +
    • +Fast-mode
      • +
    • +Fast-mode plus
      • +
    +    		Standard Select the transfer rate.
    Internal Reference Clock
      +
    • +P0CLK / 1
      • +
    • +P0CLK / 2
      • +
    • +P0CLK / 4
      • +
    • +P0CLK / 8
      • +
    • +P0CLK / 16
      • +
    • +P0CLK / 32
      • +
    • +P0CLK / 64
      • +
    • +P0CLK / 128
      • +
    +    		P0CLK / 1 Select the internal reference clock for RIIC slave. The internal reference clock is used only to determine the clock frequency of the noise filter samples.
    Digital Noise Filter Stage Select
      +
    • +Disabled
      • +
    • +Single-stage filter
      • +
    • +2-stage filter
      • +
    • +3-stage filter
      • +
    • +4-stage filter
      • +
    +    		3-stage filter Select the number of digital filter stages for RIIC Slave.
    Slave AddressValue must be non-negative0x00 Specify the slave address.
    General Call
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Allows the slave to respond to general call address: 0x00.
    Address Mode
      +
    • +7-Bit
      • +
    • +10-Bit
      • +
    +    		7-Bit Select the slave address mode.
    Clock Stretching
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Configure Clock Stretching.
    CallbackName must be a valid C symbolNULL A user callback function must be provided. This will be called from the interrupt service routine (ISR) to report I2C Slave transaction events and status.
    +

    +

    +Clock Configuration

    +

    The RIIC peripheral module uses the clock shown in the following table as its clock source.

    + + + + + + +
    Device Source Clock
    RZ/V2L P0 clock
    RZ/V2H Ch0 to Ch7: PLLCLN/16, Ch8: PLLCM33/16
    +

    The actual I2C transfer rate will be calculated and set by the tooling depending on the selected transfer rate. If the clock source is configured in such a manner that the selected transfer rate cannot be achieved, an error will be returned.

    +

    +Pin Configuration

    +

    The IIC peripheral module uses pins on the MPU to communicate to external devices. I/O pins must be selected and configured as required by the external device. An I2C channel would consist of two pins - SDA and SCL for data/address and clock respectively.

    +

    +Usage Notes

    +

    +Interrupt Configuration

    +
      +
    • TThe RIIC NACK reception (NAKI), Start condition (STI), Stop condition (SPI), Arbitration lost (ALI), Timeout (TMOI), receive data full (RXI), transmit data empty (TXI) and transmit end (TEI) interrupts for the selected channel used must be enabled in the properties of the selected device.
      • +
    • The interrupt priority of NAKI, STI, SPI, ALI, TMOI can be set higher than or equal to the interrupt priorities of RXI, TXI and TEI.
      Note
      : During master-write slave-read type of operations if the slave device requires to perform clock stretching after the last data byte is received, a higher priority will ensure that the ongoing transaction is completed (by accepting the Stop/Restart condition from the master) before the next transaction is initiated.
      +
      +: To support clock stretching (Holding SCL low after the falling edge of the 9th clock cycle), 'Clock Stretching' configuration must be enabled.
      +
      • +
    +

    +Callback

    +
      +
    • A callback function must be provided which will be invoked for the cases below:
        +
      • An I2C Master initiates a transmission or reception: I2C_SLAVE_EVENT_TX_REQUEST; I2C_SLAVE_EVENT_RX_REQUEST
        • +
      • A Transmission or reception has been completed: I2C_SLAVE_EVENT_TX_COMPLETE; I2C_SLAVE_EVENT_RX_COMPLETE
        • +
      • An I2C Master is requesting to read or write more data: I2C_SLAVE_EVENT_TX_MORE_REQUEST; I2C_SLAVE_EVENT_RX_MORE_REQUEST
        • +
      • Error conditions: I2C_SLAVE_EVENT_ABORTED
        • +
      • An I2C Master initiates a general call by passing 0x00 as slave address: I2C_SLAVE_EVENT_GENERAL_CALL
        • +
      +
      • +
    • The callback arguments will contain information about the transaction status/events, bytes transferred and a pointer to the user defined context.
      • +
    • Clock stretching is enabled by the use of callbacks. This means that the IIC slave can hold the clock line SCL LOW to force the I2C Master into a wait state.
      • +
    • The table below shows I2C Slave event handling expected in user code:
      • +
    + + + + + + + + + + + + + + + + + + + +
    RIIC Slave Callback Event RIIC Slave API expected to be called
    I2C_SLAVE_EVENT_ABORTED Handle event based on application
    I2C_SLAVE_EVENT_RX_COMPLETE Handle event based on application
    I2C_SLAVE_EVENT_TX_COMPLETE Handle event based on application
    I2C_SLAVE_EVENT_RX_REQUEST R_RIIC_SLAVE_Read API. If the slave is a Write Only device call this API with 0 bytes to send a NACK to the master.
    I2C_SLAVE_EVENT_TX_REQUEST R_RIIC_SLAVE_Write API
    I2C_SLAVE_EVENT_RX_MORE_REQUEST R_RIIC_SLAVE_Read API. If the slave cannot read any more data call this API with 0 bytes to send a NACK to the master.
    I2C_SLAVE_EVENT_TX_MORE_REQUEST R_RIIC_SLAVE_Write API
    I2C_SLAVE_EVENT_GENERAL_CALL R_RIIC_SLAVE_Read
    +
      +
    • If parameter checking is enabled and R_RIIC_SLAVE_Read API is not called for I2C_SLAVE_EVENT_RX_REQUEST and/or I2C_SLAVE_EVENT_RX_MORE_REQUEST, the slave will send a NACK to the master and would eventually timeout.
      • +
    • R_RIIC_SLAVE_Write API is not called for I2C_SLAVE_EVENT_TX_REQUEST and/or I2C_SLAVE_EVENT_TX_MORE_REQUEST:
        +
      • Slave timeout is less than Master timeout: The slave will timeout and release the bus causing the master to read 0xFF for every remaining byte.
        • +
      • Slave timeout is more than Master timeout: The master will timeout first followed by the slave.
        • +
      +
      • +
    +

    +RIIC Slave Rate Calculation

    +
      +
    • The Configuration editor calculates the internal baud-rate setting based on the configured transfer rate. The closest possible baud-rate that can be achieved (less than or equal to the requested rate) at the current clock source settings is calculated and used.
      • +
    +

    Limitations

    +
      +
    • When 'Clock Stretching' configuration is enabled, the receive operation will not utilize the double buffer arrangement in hardware for a continuous read. This means that the read operation would happen in single byte units such that the active master would send the next byte only when the slave has read the current byte of data.
      • +
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the R_RIIC_SLAVE in an application. This example shows how this driver can be used for basic read and write operations.

    +
    iic_master_instance_ctrl_t g_i2c_master_ctrl;
    i2c_master_cfg_t g_i2c_master_cfg =
    {
    .channel = I2C_MASTER_CHANNEL_0,
    .rate = I2C_MASTER_RATE_STANDARD,
    .slave = I2C_7BIT_ADDR_IIC_SLAVE,
    .addr_mode = I2C_MASTER_ADDR_MODE_7BIT,
    .p_callback = i2c_master_callback, // Callback
    .p_context = &g_i2c_master_ctrl,
    .p_transfer_tx = NULL,
    .p_transfer_rx = NULL,
    .rxi_irq = RIIC0_RI_IRQn,
    .txi_irq = RIIC0_TI_IRQn,
    .tei_irq = RIIC0_TEI_IRQn,
    .ipl = 24,
    .p_extend = &g_iic_master_cfg_extend_standard_mode
    };
    iic_slave_instance_ctrl_t g_i2c_slave_ctrl;
    i2c_slave_cfg_t g_i2c_slave_cfg =
    {
    .channel = I2C_SLAVE_CHANNEL_1,
    .rate = I2C_SLAVE_RATE_STANDARD,
    .slave = I2C_7BIT_ADDR_IIC_SLAVE,
    .addr_mode = I2C_SLAVE_ADDR_MODE_7BIT,
    .rxi_irq = RIIC1_RI_IRQn,
    .txi_irq = RIIC1_TI_IRQn,
    .tei_irq = RIIC1_TEI_IRQn,
    .ipl = 24,
    .p_callback = i2c_slave_callback, // Callback
    .p_context = &g_i2c_slave_ctrl,
    .p_extend = &g_iic_slave_cfg_extend_standard_mode
    };
    void i2c_master_callback (i2c_master_callback_args_t * p_args)
    {
    g_i2c_master_callback_event = p_args->event;
    }
    void i2c_slave_callback (i2c_slave_callback_args_t * p_args)
    {
    g_i2c_slave_callback_event = p_args->event;
    if ((p_args->event == I2C_SLAVE_EVENT_RX_COMPLETE) || (p_args->event == I2C_SLAVE_EVENT_TX_COMPLETE))
    {
    /* Transaction Successful */
    }
    else if ((p_args->event == I2C_SLAVE_EVENT_RX_REQUEST) || (p_args->event == I2C_SLAVE_EVENT_RX_MORE_REQUEST))
    {
    /* Read from Master */
    err = R_RIIC_SLAVE_Read(&g_i2c_slave_ctrl, g_i2c_slave_buffer, g_slave_transfer_length);
    assert(FSP_SUCCESS == err);
    }
    else if ((p_args->event == I2C_SLAVE_EVENT_TX_REQUEST) || (p_args->event == I2C_SLAVE_EVENT_TX_MORE_REQUEST))
    {
    /* Write to master */
    err = R_RIIC_SLAVE_Write(&g_i2c_slave_ctrl, g_i2c_slave_buffer, g_slave_transfer_length);
    assert(FSP_SUCCESS == err);
    }
    else
    {
    /* Error Event - reported through g_i2c_slave_callback_event */
    }
    }
    void basic_example (void)
    {
    uint32_t i;
    uint32_t timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    g_slave_transfer_length = I2C_BUFFER_SIZE_BYTES;
    /* Pin connections:
    * Channel 0 SDA <--> Channel 1 SDA
    * Channel 0 SCL <--> Channel 1 SCL
    */
    /* Initialize the RIIC Slave module */
    err = R_RIIC_SLAVE_Open(&g_i2c_slave_ctrl, &g_i2c_slave_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Initialize the RIIC Master module */
    err = R_RIIC_MASTER_Open(&g_i2c_master_ctrl, &g_i2c_master_cfg);
    assert(FSP_SUCCESS == err);
    /* Write some data to the transmit buffer */
    for (i = 0; i < I2C_BUFFER_SIZE_BYTES; i++)
    {
    g_i2c_master_tx_buffer[i] = (uint8_t) i;
    }
    /* Send data to I2C slave */
    g_i2c_master_callback_event = I2C_MASTER_EVENT_ABORTED;
    g_i2c_slave_callback_event = I2C_SLAVE_EVENT_ABORTED;
    err = R_RIIC_MASTER_Write(&g_i2c_master_ctrl, &g_i2c_master_tx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    assert(FSP_SUCCESS == err);
    /* Since there is nothing else to do, block until Callback triggers
    * The Slave Callback will call the R_RIIC_SLAVE_Read API to service the Master Write Request.
    */
    while ((I2C_MASTER_EVENT_TX_COMPLETE != g_i2c_master_callback_event ||
    I2C_SLAVE_EVENT_RX_COMPLETE != g_i2c_slave_callback_event) && timeout_ms)
    {
    R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
    timeout_ms--;
    }
    if ((I2C_MASTER_EVENT_ABORTED == g_i2c_master_callback_event) ||
    (I2C_SLAVE_EVENT_ABORTED == g_i2c_slave_callback_event))
    {
    __BKPT(0);
    }
    /* Read data back from the I2C slave */
    g_i2c_master_callback_event = I2C_MASTER_EVENT_ABORTED;
    g_i2c_slave_callback_event = I2C_SLAVE_EVENT_ABORTED;
    timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    err = R_RIIC_MASTER_Read(&g_i2c_master_ctrl, &g_i2c_master_rx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    assert(FSP_SUCCESS == err);
    /* Since there is nothing else to do, block until Callback triggers
    * The Slave Callback will call the R_RIIC_SLAVE_Write API to service the Master Read Request.
    */
    while ((I2C_MASTER_EVENT_RX_COMPLETE != g_i2c_master_callback_event ||
    I2C_SLAVE_EVENT_TX_COMPLETE != g_i2c_slave_callback_event) && timeout_ms)
    {
    R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
    timeout_ms--;
    }
    if ((I2C_MASTER_EVENT_ABORTED == g_i2c_master_callback_event) ||
    (I2C_SLAVE_EVENT_ABORTED == g_i2c_slave_callback_event))
    {
    __BKPT(0);
    }
    /* Verify the read data */
    if (0U != memcmp(g_i2c_master_tx_buffer, g_i2c_master_rx_buffer, I2C_BUFFER_SIZE_BYTES))
    {
    __BKPT(0);
    }
    }
    + + + + + +

    +Data Structures

    struct  iic_slave_clock_settings_t
     
    struct  riic_slave_extended_cfg_t
     
    +

    Data Structure Documentation

    + +

    ◆ iic_slave_clock_settings_t

    + +
    +
    + + + + +
    struct iic_slave_clock_settings_t
    +
    +

    I2C clock settings

    +
    + + + + + + + + + + +
    Data Fields
    +uint8_t +cks_value +Internal Reference Clock Select.
    +uint8_t +brl_value +Low-level period of SCL clock.
    +uint8_t +digital_filter_stages +Number of digital filter stages based on brl_value.
    + +
    +
    + +

    ◆ riic_slave_extended_cfg_t

    + +
    +
    + + + + +
    struct riic_slave_extended_cfg_t
    +
    +

    R_IIC_SLAVE extended configuration

    +
    + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +iic_slave_clock_settings_t +clock_settings +I2C Clock settings.
    +IRQn_Type +naki_irq +NACK IRQ Number.
    +IRQn_Type +sti_irq +Start condition IRQ Number.
    +IRQn_Type +spi_irq +Stop condition IRQ Number.
    +IRQn_Type +ali_irq +Arbitration lost IRQ Number.
    +IRQn_Type +tmoi_irq +Timeout IRQ Number.
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_RIIC_SLAVE_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RIIC_SLAVE_Open (i2c_slave_ctrl_t *const p_api_ctrl,
    i2c_slave_cfg_t const *const p_cfg 
    )
    +
    +

    Opens the I2C slave device.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSI2C slave device opened successfully.
    FSP_ERR_ALREADY_OPENModule is already open.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTChannel is not available on this MPU.
    FSP_ERR_INVALID_ARGUMENTNACK, Start, Stop, Timeout, Arbitration lost interrupt priority is lower than Transmit, Receive and Transmit End interrupt priority
    FSP_ERR_ASSERTIONParameter check failure due to one or more reasons below:
      +
    1. p_api_ctrl or p_cfg is NULL.
      2. +
    2. extended parameter is NULL.
      3. +
    3. Callback parameter is NULL.
      4. +
    4. Set the rate to fast mode plus on a channel which does not support it.
      5. +
    5. Invalid IRQ number assigned
      6. +
    +
    +
    +
    + +
    +
    + +

    ◆ R_RIIC_SLAVE_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RIIC_SLAVE_Read (i2c_slave_ctrl_t *const p_api_ctrl,
    uint8_t *const p_dest,
    uint32_t const bytes 
    )
    +
    +

    Performs a read from the I2C Master device.

    +

    This function will fail if there is already an in-progress I2C transfer on the associated channel. Otherwise, the I2C slave read operation will begin. The caller will be notified when the operation has finished by an I2C_SLAVE_EVENT_RX_COMPLETE in the callback. In case the master continues to write more data, an I2C_SLAVE_EVENT_RX_MORE_REQUEST will be issued via callback. In case of errors, an I2C_SLAVE_EVENT_ABORTED will be issued via callback.

    +
    Return values
    + + + + + +
    FSP_SUCCESSFunction executed without issue
    FSP_ERR_ASSERTIONp_api_ctrl, bytes or p_dest is NULL.
    FSP_ERR_IN_USEAnother transfer was in progress.
    FSP_ERR_NOT_OPENDevice is not open.
    +
    +
    + +
    +
    + +

    ◆ R_RIIC_SLAVE_Write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RIIC_SLAVE_Write (i2c_slave_ctrl_t *const p_api_ctrl,
    uint8_t *const p_src,
    uint32_t const bytes 
    )
    +
    +

    Performs a write to the I2C Master device.

    +

    This function will fail if there is already an in-progress I2C transfer on the associated channel. Otherwise, the I2C slave write operation will begin. The caller will be notified when the operation has finished by an I2C_SLAVE_EVENT_TX_COMPLETE in the callback. In case the master continues to read more data, an I2C_SLAVE_EVENT_TX_MORE_REQUEST will be issued via callback. In case of errors, an I2C_SLAVE_EVENT_ABORTED will be issued via callback.

    +
    Return values
    + + + + + +
    FSP_SUCCESSFunction executed without issue.
    FSP_ERR_ASSERTIONp_api_ctrl or p_src is NULL.
    FSP_ERR_IN_USEAnother transfer was in progress.
    FSP_ERR_NOT_OPENDevice is not open.
    +
    +
    + +
    +
    + +

    ◆ R_RIIC_SLAVE_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_RIIC_SLAVE_Close (i2c_slave_ctrl_t *const p_api_ctrl)
    +
    +

    Closes the I2C device.

    +
    Return values
    + + + + +
    FSP_SUCCESSDevice closed successfully.
    FSP_ERR_NOT_OPENDevice not opened.
    FSP_ERR_ASSERTIONp_api_ctrl is NULL.
    +
    +
    + +
    +
    + +

    ◆ R_RIIC_SLAVE_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RIIC_SLAVE_CallbackSet (i2c_slave_ctrl_t *const p_api_ctrl,
    void(*)(i2c_slave_callback_args_t *) p_callback,
    void const *const p_context,
    i2c_slave_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements i2c_slave_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___r_i_i_c___s_l_a_v_e.js b/group___r_i_i_c___s_l_a_v_e.js new file mode 100644 index 0000000..9d9ba71 --- /dev/null +++ b/group___r_i_i_c___s_l_a_v_e.js @@ -0,0 +1,21 @@ +var group___r_i_i_c___s_l_a_v_e = +[ + [ "iic_slave_clock_settings_t", "group___r_i_i_c___s_l_a_v_e.html#structiic__slave__clock__settings__t", [ + [ "cks_value", "group___r_i_i_c___s_l_a_v_e.html#ae84939949fde82ff8600981d24e69d0f", null ], + [ "brl_value", "group___r_i_i_c___s_l_a_v_e.html#a41382084c8a91226db001a7321176112", null ], + [ "digital_filter_stages", "group___r_i_i_c___s_l_a_v_e.html#a8fbc88f3fad23597ec529cccaf5d5bc1", null ] + ] ], + [ "riic_slave_extended_cfg_t", "group___r_i_i_c___s_l_a_v_e.html#structriic__slave__extended__cfg__t", [ + [ "clock_settings", "group___r_i_i_c___s_l_a_v_e.html#aaf746e05cd94560cf30860aa9df619cf", null ], + [ "naki_irq", "group___r_i_i_c___s_l_a_v_e.html#aad289375a5899c38eddfb299556c01e9", null ], + [ "sti_irq", "group___r_i_i_c___s_l_a_v_e.html#a01d8a48ff4d983d8d8995d6dbd4e5ac6", null ], + [ "spi_irq", "group___r_i_i_c___s_l_a_v_e.html#a5710872e90c0db5ed2c177e883979cc7", null ], + [ "ali_irq", "group___r_i_i_c___s_l_a_v_e.html#a55c817a372e45b76fca43326c627c33f", null ], + [ "tmoi_irq", "group___r_i_i_c___s_l_a_v_e.html#a17643f2f26d82852032bd200631567ad", null ] + ] ], + [ "R_RIIC_SLAVE_Open", "group___r_i_i_c___s_l_a_v_e.html#gab0124cdb3b51609214466122053a7d15", null ], + [ "R_RIIC_SLAVE_Read", "group___r_i_i_c___s_l_a_v_e.html#ga46f545b8b7e7d94c773e2563f3cd2534", null ], + [ "R_RIIC_SLAVE_Write", "group___r_i_i_c___s_l_a_v_e.html#ga405ee8b79780785120d761af083f9557", null ], + [ "R_RIIC_SLAVE_Close", "group___r_i_i_c___s_l_a_v_e.html#ga4a85c440574e6f2f837f3e19188d1a67", null ], + [ "R_RIIC_SLAVE_CallbackSet", "group___r_i_i_c___s_l_a_v_e.html#gaeb7fb4539537de4f9388e6cdaab5f94d", null ] +]; \ No newline at end of file diff --git a/group___r_m___c_o_m_m_s___a_p_i.html b/group___r_m___c_o_m_m_s___a_p_i.html index 22fc1bb..21b6807 100644 --- a/group___r_m___c_o_m_m_s___a_p_i.html +++ b/group___r_m___c_o_m_m_s___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Communicatons Middleware Interface +RZV Flexible Software Package Documentation: Communicatons Middleware Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -410,7 +478,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_m___c_o_m_m_s___i2_c.html b/group___r_m___c_o_m_m_s___i2_c.html index d8980a6..c223ee8 100644 --- a/group___r_m___c_o_m_m_s___i2_c.html +++ b/group___r_m___c_o_m_m_s___i2_c.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: I2C Communication Device (rm_comms_i2c) +RZV Flexible Software Package Documentation: I2C Communication Device (rm_comms_i2c) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    I2C Communication Device (rm_comms_i2c)
    Modules
    +
    I2C Communication Device (rm_comms_i2c)
    Modules » Connectivity
    @@ -200,7 +268,7 @@

    Configurations for Connectivity > I2C Communication Device (rm_comms_i2c)

    Pin Configuration

    -

    This module uses SDA and SCL pins of I2C Master and SCI I2C.

    +

    This module uses SDA and SCL pins of I2C function.

    Usage Notes

    If an RTOS is used, blocking and bus lock is available.

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    -
    FreeRTOS Port (rm_freertos_port)
    Modules
    +
    FreeRTOS Port (rm_freertos_port)
    Modules » RTOS

    FreeRTOS port for RZ MPUs.

    Overview

    -
    Note
    The FreeRTOS Port does not provide any interfaces to the user. Consult the FreeRTOS documentation at https://www.freertos.org/Documentation for further information.
    +
    Note
    The FreeRTOS Port does not provide any interfaces to the user. Consult the FreeRTOS documentation at https://www.freertos.org/Documentation for further information.
    +
    +There are no usage notes and examples in this documentation.
    +
    +When each core of a multicore device runs its own instance of FreeRTOS Port, please not use the same timer resource for each core to avoid conflicts.

    Features

    The RZ FreeRTOS port supports the following features:

      @@ -288,7 +360,7 @@

    - - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    HS300X Temperature/Humidity Sensor (rm_hs300x)
    Modules
    +
    HS300X Temperature/Humidity Sensor (rm_hs300x)
    Modules » Sensor
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    General > Message Buffer Length TypeManual Entrysize_t FreeRTOS Message buffers use variables of type Message Buffer Length Type to store the length of each message. If Message Buffer Length Type is not defined then it will default to size_t. If the messages stored in a message buffer will never be larger than 255 bytes then defining Message Buffer Length Type to uint8_t will save 3 bytes per message on a 32-bit microcontroller. Likewise if the messages stored in a message buffer will never be larger than 65535 bytes then defining Message Buffer Length Type to uint16_t will save 2 bytes per message on a 32-bit microcontroller.
    General > Library Max Syscall Interrupt PriorityMPU Specific OptionsThe highest interrupt priority that can be used by any interrupt service routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values)
    +    		General > Library Max Syscall Interrupt PriorityMCU Specific OptionsThe highest interrupt priority that can be used by any interrupt service routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER PRIORITY THAN THIS! (higher priorities are lower numeric values)

    Below is explanation for macros that are set based on this value from FreeRTOS website.

    @@ -686,7 +758,7 @@

    diff --git a/group___r_m___h_s300_x.html b/group___r_m___h_s300_x.html index f16c8d9..52f4c02 100644 --- a/group___r_m___h_s300_x.html +++ b/group___r_m___h_s300_x.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: HS300X Temperature/Humidity Sensor (rm_hs300x) +RZV Flexible Software Package Documentation: HS300X Temperature/Humidity Sensor (rm_hs300x) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -188,7 +256,7 @@

    Configurations for Sensor > HS300X Temperature/Humidity Sensor (rm_hs300x

    Pin Configuration

    -

    This module use SDA and SCL pins of I2C Master and SCI I2C.

    +

    This module use SDA and SCL pins of I2C function.

    Usage Notes

    HS300x datasheet is here.
    @@ -630,7 +698,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___r_m___h_s300_x___a_p_i.html b/group___r_m___h_s300_x___a_p_i.html index ec3bed4..8618fc4 100644 --- a/group___r_m___h_s300_x___a_p_i.html +++ b/group___r_m___h_s300_x___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: HS300X Middleware Interface +RZV Flexible Software Package Documentation: HS300X Middleware Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -633,7 +701,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_m___h_s400_x.html b/group___r_m___h_s400_x.html index fbd16a7..6262df2 100644 --- a/group___r_m___h_s400_x.html +++ b/group___r_m___h_s400_x.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: HS400X Temperature/Humidity Sensor (rm_hs400x) +RZV Flexible Software Package Documentation: HS400X Temperature/Humidity Sensor (rm_hs400x) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures
    -
    HS400X Temperature/Humidity Sensor (rm_hs400x)
    Modules
    +
    HS400X Temperature/Humidity Sensor (rm_hs400x)
    Modules » Sensor
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -163,7 +231,8 @@

  • Periodic Measurement
    • -

    + - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -612,7 +680,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_m___o_b1203.html b/group___r_m___o_b1203.html deleted file mode 100644 index e21232e..0000000 --- a/group___r_m___o_b1203.html +++ /dev/null @@ -1,1800 +0,0 @@ - - - - - - - -RZ/V Flexible Software Package Documentation: OB1203 Light/Proximity/PPG Sensor (rm_ob1203) - - - - - - - - - - - - - - - -
    -
    -
    No-Hold Measurement Select measurement type.
    No-Hold Measurement Select measurement type.
    +Note: When select No-Hold Measurement, it is recommended to set the Drive Capacity of the pins for I2C function to Low on Pins tab.
    Data type
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    - - - - - - - -
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 -
    -
    - - - - - - -
    -
    -
    - - - -
    -
    - -
    -
    -
    - -
    - -
    -
    - - -
    - -
    - -
    -
    -Functions | -Data Structures
    -
    -
    OB1203 Light/Proximity/PPG Sensor (rm_ob1203)
    Modules
    -
    -
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -

    -Functions

    fsp_err_t RM_OB1203_Open (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_cfg_t const *const p_cfg)
     Opens and configures the OB1203 Middle module. Implements rm_ob1203_api_t::open. More...
     
    fsp_err_t RM_OB1203_Close (rm_ob1203_ctrl_t *const p_api_ctrl)
     Disables specified OB1203 control block. Implements rm_ob1203_api_t::close. More...
     
    fsp_err_t RM_OB1203_MeasurementStart (rm_ob1203_ctrl_t *const p_api_ctrl)
     Start measurement. Implements rm_ob1203_api_t::measurementStart. More...
     
    fsp_err_t RM_OB1203_MeasurementStop (rm_ob1203_ctrl_t *const p_api_ctrl)
     Stop measurement. If device interrupt is enabled, interrupt bits are cleared after measurement stop. If PPG mode, FIFO information is also reset after measurement stop. In RTOS and Light/Proximity/Light Proximity mode, if device interrupt is enabled, blocks 2 bytes on the I2C bus. In RTOS and PPG mode, if device interrupt is enabled, blocks 6 bytes on the I2C bus. If device interrupt is disabled, blocks 4 bytes on the I2C bus. Implements rm_ob1203_api_t::measurementStop. More...
     
    fsp_err_t RM_OB1203_LightRead (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_light_data_type_t type)
     Reads Light ADC data from OB1203 device. If device interrupt is enabled, interrupt bits are cleared after data read. In RTOS and Light mode, if device interrupt is enabled, blocks 2 bytes on the I2C bus. Implements rm_ob1203_api_t::lightRead. More...
     
    fsp_err_t RM_OB1203_LightDataCalculate (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_light_data_t *const p_ob1203_data)
     Calculate light data from raw data. Implements rm_ob1203_api_t::lightDataCalculate. More...
     
    fsp_err_t RM_OB1203_ProxRead (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_raw_data_t *const p_raw_data)
     Reads Proximity ADC data from OB1203 device. If device interrupt is enabled, interrupt bits are cleared after data read. In RTOS and Proximity mode, if device interrupt is enabled, blocks 2 bytes on the I2C bus. Implements rm_ob1203_api_t::proxRead. More...
     
    fsp_err_t RM_OB1203_ProxDataCalculate (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_prox_data_t *const p_ob1203_data)
     Calculate proximity data from raw data. Implements rm_ob1203_api_t::proxDataCalculate. More...
     
    fsp_err_t RM_OB1203_PpgRead (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_raw_data_t *const p_raw_data, uint8_t const number_of_samples)
     Reads PPG ADC data from OB1203 device. One sample requires three bytes. 0 cannot set to the number of samples. Implements rm_ob1203_api_t::ppgRead. More...
     
    fsp_err_t RM_OB1203_PpgDataCalculate (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_ppg_data_t *const p_ob1203_data)
     Calculate PPG data from raw data. Implements rm_ob1203_api_t::ppgDataCalculate. More...
     
    fsp_err_t RM_OB1203_GainSet (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_gain_t const gain)
     Set gain. This function should be called after calling RM_OB1203_MeasurementStop(). In RTOS and Light Proximity mode, blocks 2 bytes on the I2C bus. Implements rm_ob1203_api_t::gainSet. More...
     
    fsp_err_t RM_OB1203_LedCurrentSet (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_led_current_t const led_current)
     Set currents. This function should be called after calling RM_OB1203_MeasurementStop(). Implements rm_ob1203_api_t::ledCurrentSet. More...
     
    fsp_err_t RM_OB1203_DeviceInterruptCfgSet (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_device_interrupt_cfg_t const interrupt_cfg)
     Set device interrupt configurations. This function should be called after calling RM_OB1203_MeasurementStop(). Implements rm_ob1203_api_t::deviceInterruptCfgSet. More...
     
    fsp_err_t RM_OB1203_FifoInfoGet (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_fifo_info_t *const p_fifo_info)
     Get FIFO information from OB1203 device. Implements rm_ob1203_api_t::fifoInfoGet. More...
     
    fsp_err_t RM_OB1203_DeviceStatusGet (rm_ob1203_ctrl_t *const p_api_ctrl, rm_ob1203_device_status_t *const p_status)
     Get device status from OB1203 device. Clear all interrupt bits. Implements rm_ob1203_api_t::deviceStatusGet. More...
     
    -

    Detailed Description

    -

    Middleware to implement the OB1203 sensor interface. This module implements the OB1203 Middleware Interface.

    -

    -Overview

    -

    This module provides APIs for configuring and controlling the OB1203 sensor operation modes. Supported OB1203 sensor operation modes are below.

      -
    • Light mode
      • -
    • Proximity mode
      • -
    • Light Proximity mode
      • -
    • PPG mode
      • -
    -

    -Limitations

    -

    This version does not support PPG mode in NonOS projects. Also, non-blocking cannot be used in PPG mode in RTOS projects. Please configure the following properties of the I2C Communication Shared Bus to "Use" in PPG mode in RTOS projects.

      -
    • Semaphore for Blocking (RTOS only)
      • -
    • Recursive Mutex for Bus (RTOS only)
      • -
    -

    -Features

    -

    The OB1203 sensor interface implementation has the following key features:

      -
    • Initialize the sensor for measurement
      • -
    • Start and stop a measurement at any time
      • -
    • Get the ADC data from the sensor
      • -
    • Calculate the Light/Proximity/PPG values.
      • -
    • Software reset
      • -
    -

    -Configuration

    -

    Build Time Configurations for rm_ob1203

    -The following build time configurations are defined in fsp_cfg/rm_ob1203_cfg.h:
    -

    - - - - -
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      -
    • -Default (BSP)
      • -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Default (BSP) If selected code for parameter checking is included in the build.
    -

    Configurations for Sensor > OB1203 Light/Proximity/PPG Sensor (rm_ob1203)

    -This module can be added to the Stacks tab via New Stack > Sensor > OB1203 Light/Proximity/PPG Sensor (rm_ob1203).
    -

    - - - - - - - - - - -
    ConfigurationOptionsDefaultDescription
    NameManual Entryg_ob1203_sensor0 Module name.
    Semaphore Timeout (RTOS only)Value must be a non-negative integer0xFFFFFFFF Set timeout for blocking in using RTOS.
    Comms I2C CallbackName must be a valid C symbolob1203_comms_i2c_callback A user COMMS I2C callback function can be provided.
    IRQ CallbackName must be a valid C symbolob1203_irq_callback A user IRQ callback function can be provided.
    -

    Configurations for Sensor > OB1203 Light mode (rm_ob1203)

    - - - - - - - - - - - - - - - - - - - - - - - -
    ConfigurationOptionsDefaultDescription
    Operation Mode
      -
    • -LS mode
      • -
    • -CS mode
      • -
    -    		LS mode Set operation mode.
    Interrupt Type
      -
    • -Threshold
      • -
    • -Variation
      • -
    -    		Threshold Set interrupt type.
    Interrupt Source
      -
    • -Clear channel
      • -
    • -Green channel
      • -
    • -Red channel (CS mode only)
      • -
    • -Blue channel (CS mode only)
      • -
    -    		Clear channel Set interrupt source.
    The Number of Similar Consecutive Interrupt EventsValue must be a non-negative integer0x02 The number of similar consecutive Light mode interrupt events that must occur before the interrupt is asserted (4bits). Min = 0x0 and Max = 0xF
    Sleep after Interrupt
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set sleep after interrupt.
    Gain
      -
    • -1
      • -
    • -3
      • -
    • -6
      • -
    -    		3 Set gain for detection range.
    Resolution and Measurement PeriodRefer to the Configuration tool for available options.Resolution:18bit. Measurement Period:100ms Set resolution and measurement period.
    Upper ThresholdValue must be a non-negative integer0x00CCC Set upper threshold value (20bits). Min = 0x00000 and Max = 0xFFFFF.
    Lower ThresholdValue must be a non-negative integer0x00000 Set lower threshold value (20bits). Min = 0x00000 and Max = 0xFFFFF.
    Variance Threshold
      -
    • -+/- 8 counts
      • -
    • -+/- 16 counts
      • -
    • -+/- 32 counts
      • -
    • -+/- 64 counts
      • -
    • -+/- 128 counts
      • -
    • -+/- 256 counts
      • -
    • -+/- 512 counts
      • -
    • -+/- 1024 counts
      • -
    -    		+/- 128 counts Set variance threshold. New data varies by selected counts compared to previous result.
    -

    Configurations for Sensor > OB1203 Proximity mode (rm_ob1203)

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    ConfigurationOptionsDefaultDescription
    Interrupt Type
      -
    • -Normal
      • -
    • -Logic
      • -
    -    		Normal Set interrupt type.
    The Number of Similar Consecutive Interrupt EventsValue must be a non-negative integer0x02 The number of similar consecutive Proximity mode interrupt events that must occur before the interrupt is asserted (4bits). Min = 0x0 and Max = 0xF
    Sleep after Interrupt
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set sleep after interrupt.
    Gain
      -
    • -1
      • -
    • -1.5
      • -
    • -2
      • -
    • -4
      • -
    -    		1 Set gain of ADC output and noise.
    LED CurrentValue must be a non-negative integer0x100 Set Current for LED (10bits). Min = 0x000 and Max = 0x3FF
    LED Order
      -
    • -IR LED first, Red LED second
      • -
    • -Red LED first, IR LED second
      • -
    -    		IR LED first, Red LED second Set LED order.
    LED Analog Cancellation
      -
    • -Enabled (50% offset of the full-scale value)
      • -
    • -Disabled
      • -
    -    		Disabled Set analog cancellation level.
    LED Digital CancellationValue must be a non-negative integer0x100 Set digital cancellation level (16bits). Min = 0x0000 and Max = 0xFFFF
    Number of LED pulses
      -
    • -1 pulse
      • -
    • -2 pulses
      • -
    • -4 pulses
      • -
    • -8 pulses
      • -
    • -16 pulses
      • -
    • -32 pulses
      • -
    -    		8 pulses Set number of LED pulses.
    Pulse Width and Measurement PeriodRefer to the Configuration tool for available options.Pulse width:42us. Measurement Period:100ms Set pulse width and measurement period.
    Moving Average
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set moving average.
    HysteresisValue must be a non-negative integer0x00 Set hysteresis level (7bits). Min = 0x00 and Max = 0x7F.
    Upper ThresholdValue must be a non-negative integer0x0600 Set upper threshold value (16bits). Min = 0x0000 and Max = 0xFFFF.
    Lower ThresholdValue must be a non-negative integer0x0000 Set lower threshold value (16bits). Min = 0x0000 and Max = 0xFFFF.
    -

    Configurations for Sensor > OB1203 PPG mode (rm_ob1203)

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    ConfigurationOptionsDefaultDescription
    Operation Mode
      -
    • -PPG1 mode
      • -
    • -PPG2 mode
      • -
    -    		PPG2 mode Set operation mode.
    Interrupt Type
      -
    • -Data
      • -
    • -FIFO Almost Full
      • -
    -    		Data Set interrupt type.
    Gain
      -
    • -1
      • -
    • -1.5
      • -
    • -2
      • -
    • -4
      • -
    -    		1 Set gain of ADC output and noise.
    IR LED CurrentValue must be a non-negative integer0x366 Set Current for IR LED (10bits). Min = 0x000 and Max = 0x3FF
    Red LED CurrentValue must be a non-negative integer0x1B3 Set Current for Red LED (9bits). Min = 0x000 and Max = 0x1FF
    Power Save Mode
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set power save mode.
    LED Order
      -
    • -IR LED first, Red LED second
      • -
    • -Red LED first, IR LED second
      • -
    -    		IR LED first, Red LED second Set LED order.
    IR LED Analog Cancellation
      -
    • -Enabled (50% offset of the full-scale value)
      • -
    • -Disabled
      • -
    -    		Disabled Set analog cancellation level.
    Red LED Analog Cancellation
      -
    • -Enabled (50% offset of the full-scale value)
      • -
    • -Disabled
      • -
    -    		Disabled Set analog cancellation level.
    Number of Averaged PPG Samples
      -
    • -1 (No averaging)
      • -
    • -2 consecutives samples are averaged
      • -
    • -4 consecutives samples are averaged
      • -
    • -8 consecutives samples are averaged
      • -
    • -16 consecutives samples are averaged
      • -
    • -32 consecutives samples are averaged
      • -
    -    		8 consecutives samples are averaged Set number of averaged for PPG samples.
    Pulse Width and Measurement PeriodRefer to the Configuration tool for available options.Pulse width:130us. Measurement Period:1.25ms Set pulse width and measurement period.
    FIFO Rollover
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Enabled Set FIFO rollover.
    FIFO Almost Full ValueValue must be a non-negative integer0x0C Set the number of empty FIFO words when the FIFO almost full interrupt is issued (4bits). Min = 0x0 and Max = 0xF. In PPG2 Mode, only even values must be used.
    -

    Configurations for Sensor > OB1203 Light Proximity mode (rm_ob1203)

    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
    ConfigurationOptionsDefaultDescription
    General > Device Interrupt
      -
    • -Light mode
      • -
    • -Proximity mode
      • -
    -    		Light mode Select an operation mode using device interrupt.
    Light mode > Operation Mode
      -
    • -LS mode
      • -
    • -CS mode
      • -
    -    		LS mode Set operation mode.
    Light mode > Interrupt Type
      -
    • -Threshold
      • -
    • -Variation
      • -
    -    		Threshold Set interrupt type.
    Light mode > Interrupt Source
      -
    • -Clear channel
      • -
    • -Green channel
      • -
    • -Red channel (CS mode only)
      • -
    • -Blue channel (CS mode only)
      • -
    -    		Clear channel Set interrupt source.
    Light mode > The Number of Similar Consecutive Interrupt EventsValue must be a non-negative integer0x02 The number of similar consecutive Light mode interrupt events that must occur before the interrupt is asserted (4bits). Min = 0x0 and Max = 0xF
    Light mode > Sleep after Interrupt
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set sleep after interrupt.
    Light mode > Gain
      -
    • -1
      • -
    • -3
      • -
    • -6
      • -
    -    		3 Set gain for detection range.
    Light mode > Resolution and Measurement PeriodRefer to the Configuration tool for available options.Resolution:18bit. Measurement Period:100ms Set resolution and measurement period.
    Light mode > Upper ThresholdValue must be a non-negative integer0x00CCC Set upper threshold value (20bits). Min = 0x00000 and Max = 0xFFFFF.
    Light mode > Lower ThresholdValue must be a non-negative integer0x00000 Set lower threshold value (20bits). Min = 0x00000 and Max = 0xFFFFF.
    Light mode > Variance Threshold
      -
    • -+/- 8 counts
      • -
    • -+/- 16 counts
      • -
    • -+/- 32 counts
      • -
    • -+/- 64 counts
      • -
    • -+/- 128 counts
      • -
    • -+/- 256 counts
      • -
    • -+/- 512 counts
      • -
    • -+/- 1024 counts
      • -
    -    		+/- 128 counts Set variance threshold. New data varies by selected counts compared to previous result.
    Proximity mode > Interrupt Type
      -
    • -Normal
      • -
    • -Logic
      • -
    -    		Normal Set interrupt type.
    Proximity mode > The Number of Similar Consecutive Interrupt EventsValue must be a non-negative integer0x02 The number of similar consecutive Proximity mode interrupt events that must occur before the interrupt is asserted (4bits). Min = 0x0 and Max = 0xF
    Proximity mode > Sleep after Interrupt
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set sleep after interrupt.
    Proximity mode > Gain
      -
    • -1
      • -
    • -1.5
      • -
    • -2
      • -
    • -4
      • -
    -    		1 Set gain of ADC output and noise.
    Proximity mode > LED CurrentValue must be a non-negative integer0x100 Set Current for LED (10bits). Min = 0x000 and Max = 0x3FF
    Proximity mode > LED Order
      -
    • -IR LED first, Red LED second
      • -
    • -Red LED first, IR LED second
      • -
    -    		IR LED first, Red LED second Set LED order.
    Proximity mode > LED Analog Cancellation
      -
    • -Enabled (50% offset of the full-scale value)
      • -
    • -Disabled
      • -
    -    		Disabled Set analog cancellation level.
    Proximity mode > LED Digital CancellationValue must be a non-negative integer0x100 Set digital cancellation level (16bits). Min = 0x0000 and Max = 0xFFFF
    Proximity mode > Number of LED pulses
      -
    • -1 pulse
      • -
    • -2 pulses
      • -
    • -4 pulses
      • -
    • -8 pulses
      • -
    • -16 pulses
      • -
    • -32 pulses
      • -
    -    		8 pulses Set number of LED pulses.
    Proximity mode > Pulse Width and Measurement PeriodRefer to the Configuration tool for available options.Pulse width:42us. Measurement Period:100ms Set pulse width and measurement period.
    Proximity mode > Moving Average
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Set moving average.
    Proximity mode > HysteresisValue must be a non-negative integer0x00 Set hysteresis level (7bits). Min = 0x00 and Max = 0x7F.
    Proximity mode > Upper ThresholdValue must be a non-negative integer0x0600 Set upper threshold value (16bits). Min = 0x0000 and Max = 0xFFFF.
    Proximity mode > Lower ThresholdValue must be a non-negative integer0x0000 Set lower threshold value (16bits). Min = 0x0000 and Max = 0xFFFF.
    -

    -

    -Pin Configuration

    -

    This module uses I2C Master and IRQ drivers. Therefore, this module uses SDA and SCL pins of I2C Master and an IRQ pin.

    -

    -Usage Notes

    -

    OB1203 datasheet is here.
    - The OB1203 has four operation modes.
    -

    Light mode

    -

    Light mode has two operation modes.
    -

    - - - - - - -
    Operation mode Red Green Blue Clear Comp *1
    LS mode ✓ ✓ ✓
    CS mode ✓ ✓ ✓ ✓ ✓
    -

    *1 : Temperature compensation data
    -
    -Light mode features are below.

      -
    • High lux accuracy over different light sources
      • -
    • Absolute sensitivity: 0.06 lux to > 150000 lux
      • -
    • Output resolution: 13 to 20 bits
      • -
    • Three LS/CS gain modes: x1 to x6
      • -
    • Highly linear output, 50Hz/60Hz light and fluorescent light flicker immunity
      • -
    • Four parallel channels (red, green, blue, clear)
      • -
    • Accurate Correlated Color Temperature (CCT)
      • -
    • Accurate CIE 1931 XYZ (RGB) color measurement
      • -
    • Very stable spectral response over angle of light incidence
      • -
    -

    Proximity mode

    -

    Proximity mode features are below.

      -
    • Integrated and trimmed LED source, driver, and photodetector
      • -
    • Programmable pulsed LED up to 250mA output current
      • -
    • High resolution (12 to 16 bits)
      • -
    • Object movement detection (in/out)
      • -
    • Ambient light suppression > 100klx sun light
      • -
    • Crosstalk cancelation (analog and digital)
      • -
    -

    PPG mode

    -

    PPG mode has two operation modes.
    -

    - - - - - - -
    Operation mode Discription
    PPG1 mode Only one LED is used. This mode allows determination of parameters related to heart rate with an appropriate algorithm
    PPG2 mode Two LED are used. Second LED is used as a transmitter. This mode supports further analysis, such as SpO2 and respiration rate determination.
    -

    PPG mode features are below.

      -
    • SpO2 measurement behind visibly dark, IR transmissive ink
      • -
    • Industry’s smallest optical biosensor module
      • -
    • Fully integrated and trimmed module, including two LEDs, 250mA maximum drive current, and photodetectors
      • -
    • Output resolution PPG: 16 to 18 bits
      • -
    • Data stored in 18-bit wide, 32-sample FIFO memory
      • -
    • Integrated averaging function for higher signal-to-noise ratio(SNR) and data rate reduction
      • -
    • Programmable measurement rate: up to 3200 samples per second
      • -
    • High SNR
      • -
    -

    Light Proximity mode

    -

    Light mode and Proximity mode can be used in parallel.

    -

    Bus Initialization

    -

    The OB1203 interface expects a bus instance to be opened before opening any OB1203 device. The interface will handle switching between devices on the bus but will not open or close the bus instance. The user should open the bus with the appropriate I2C Master Interface open call.

    -

    If an RTOS is used, blocking and bus lock for I2C bus are available.

      -
    • If blocking of an I2C bus is required, it is necessary to create a semaphore for blocking.
      • -
    • If bus lock is required, it is necessary to create a mutex for bus lock. Bus lock is only available when a semaphore for blocking is used.
      • -
    -

    Initialization

    -

    Initialize with RM_OB1203_Open().

    -

    From measurement start to data acquisition

    -

    After normal completion, start the measurement with RM_OB1203_MeasurementStart().

    -

    Light mode

    -

    If IRQ is enabled

    -
      -
    1. Wait until RM_OB1203_EVENT_THRESHOLD_CROSSED is received via IRQ callback.
      2. -
    2. Call RM_OB1203_LightRead(). This function will read the ADC data and clear the interrupt bits.
      3. -
    3. Wait until RM_OB1203_EVENT_SUCCESS is received.
      4. -
    4. Call RM_OB1203_LightDataCalculate(). This function will calculate light data from the ADC data.
      5. -
    -

    If IRQ is disabled

    -
      -
    1. Wait for measurement period configured.
      2. -
    2. Call RM_OB1203_LightRead(). This function will read the ADC data.
      3. -
    3. Wait until RM_OB1203_EVENT_SUCCESS is received.
      4. -
    4. Call RM_OB1203_LightDataCalculate(). This function will calculate light data from the ADC data.
      5. -
    -

    Proximity mode

    -

    If IRQ is enabled

    -
      -
    1. Wait until RM_OB1203_EVENT_THRESHOLD_CROSSED or RM_OB1203_EVENT_OBJECT_NEAR is received via IRQ callback.
      2. -
    2. Call RM_OB1203_ProxRead(). This function will read the ADC data and clear the interrupt bits.
      3. -
    3. Wait until RM_OB1203_EVENT_SUCCESS is received.
      4. -
    4. Call RM_OB1203_ProxDataCalculate(). This function will calculate proximity data from the ADC data.
      5. -
    -

    If IRQ is disabled

    -
      -
    1. Wait for measurement period configured.
      2. -
    2. Call RM_OB1203_ProxRead(). This function will read the ADC data.
      3. -
    3. Wait until RM_OB1203_EVENT_SUCCESS is received.
      4. -
    4. Call RM_OB1203_ProxDataCalculate(). This function will calculate proximity data from the ADC data.
      5. -
    -

    PPG mode

    -

    If IRQ is enabled

    -
      -
    1. Wait until RM_OB1203_EVENT_MEASUREMENT_COMPLETE is received via IRQ callback.
      2. -
    2. Call RM_OB1203_PpgRead(). This function will read the ADC data and clear the interrupt bits. In PPG2 mode, the number of read FIFO samples must be even value because two samples is one pair.
      3. -
    3. Wait until RM_OB1203_EVENT_SUCCESS is received.
      4. -
    4. Call RM_OB1203_PpgDataCalculate(). This function will calculate PPG data from the ADC data.
      5. -
    -

    If IRQ is disabled

    -
      -
    1. Wait for measurement period configured.
      2. -
    2. Call RM_OB1203_PpgRead(). This function will read the ADC data. In PPG2 mode, the number of read FIFO samples must be even value because two samples is one pair.
      3. -
    3. Wait until RM_OB1203_EVENT_SUCCESS is received.
      4. -
    4. Call RM_OB1203_PpgDataCalculate(). This function will calculate PPG data from the ADC data.
      5. -
    -

    Light Proximity mode

    -

    Combination of the above Light mode and Proximity mode.

    -

    Getting device status

    -

    Call RM_OB1203_DeviceStatusGet(). This function will get device status over I2C.

    -
      -
    • If power_on_reset_occur is true, the part has had a power-up event, either because the part was turned on or because there was a power-supply voltage disturbance.
      • -
    • If light_interrupt_occur is true, Light mode interrupt condition has occurred.
      • -
    • If light_measurement_complete is true, Light mode measurement is complete.
      • -
    • If ts_measurement_complete is true, TS measurement is complete.
      • -
    • If fifo_afull_interrupt_occur is true, FIFO almost full interrupt condition has occurred.
      • -
    • If ppg_measurement_complete is true, PPG mode measurement is complete.
      • -
    • If object_near is true, an object is near.
      • -
    • If prox_interrupt_occur is true, Proximity mode interrupt condition has occurred.
      • -
    • If prox_measurement_complete is true, Proximity mode measurement is complete.
      • -
    -

    Clearing interrupt bits

    -

    If interrupt bits are needed to clear without calling RM_OB1203_LightRead(), RM_OB1203_ProxRead(), RM_OB1203_PpgRead() and RM_OB1203_MeasurementStop(), please call RM_OB1203_DeviceStatusGet(). Interrupt bits are reset by STATUS_0 and STATUS_1 registers read.

    -

    Sleep after interrupt

    -

    Sleep after interrupt is valid in Light mode and Proximity mode. If a sleep after interrupt bit are set, a measurement will be stopped after an interrupt occurs. After STATUS_0 and STATUS_1 registers are read, a measurement will be started. please call RM_OB1203_DeviceStatusGet().

    -

    PPG FIFO

    -

    PPG FIFO data is stored in 18-bit wide, 32-sample FIFO memory.
    -The FIFO almost full interrupt is triggered when a certain number of free FIFO registers are remaining.
    -If FIFO informations (write index, read index, overflow counter, unread_samples) are got, Call RM_OB1203_FifoInfoGet().

      -
    • write_index is the FIFO index where the next sample of PPG data will be written in the FIFO.
      • -
    • read_index is the index of the next sample to be read from the FIFO_DATA register.
      • -
    • overflow_counter is the number of old samples (up to 15) which are overwritten by new data. If the FIFO Rollover is enabled, the FIFO overflow counter counts.
      • -
    • unread_samples is the number of unread FIFO samples, which can be calculated by write index and read index.
      • -
    -

    Reconfiguration

    -

    The interface supports the following APIs for reconfiguration.

    - - - - - - - - -
    API Discription
    RM_OB1203_GainSet() Set gain
    RM_OB1203_LedCurrentSet() Set LED currents.
    - Proximity mode and Light Proximity mode: LED Current is 10bits. Min = 0x000 and Max = 0x3FF
    - PPG mode: IR/Red LED currents are 10bits/9bits. Min = 0x000/0x000 and Max = 0x3FF/0x1FF
    RM_OB1203_DeviceInterruptCfgSet() Set interrupt configurations.
    -

    Relationship between APIs and registers

    -

    The relationship between APIs and registers accessed by the API is below.

    - - - - - - - - - - - - - - - - - - - - - - - -
    API Registers
    RM_OB1203_MeasurementStart() MAIN_CTRL_0 and MAIN_CTRL_1
    RM_OB1203_MeasurementStop() MAIN_CTRL_0, MAIN_CTRL_1 , STATUS_0, STATUS_1, FIFO_WR_PTR, FIFO_RD_PTR and FIFO_OVF_CNT
    RM_OB1203_LightRead() LS_CLEAR_DATA, LS_GREEN_DATA, LS_BULE_DATA, LS_RED_DATA, COMP_DATA, STATUS_0 and STATUS_1
    RM_OB1203_ProxRead() PS_DATA, STATUS_0 and STATUS_1
    RM_OB1203_PpgRead() FIFO_DATA
    RM_OB1203_DeviceStatusGet() STATUS_0 and STATUS_1
    RM_OB1203_GainSet() LS_GAIN and PPG_PS_GAIN
    RM_OB1203_LedCurrentSet() PS_LED_CURR, PPG_IRLED_CURR and PPG_RLED_CURR
    RM_OB1203_DeviceInterruptCfgSet() INT_CFG_0, INT_CFG_1 and INT_PST
    RM_OB1203_FifoInfoGet() FIFO_WR_PTR, FIFO_RD_PTR and FIFO_OVF_CNT
    -

    Notifications

    -

    The application note [R01AN6311] using this module has an algorithm for biometric data calculation. The algorithm has the constraint of sampling rate (default: 100 samples per second). Please refer to the application note [R36AN0001EU] and OB1203 sensor page (https://www.renesas.com/jp/en/products/sensor-products/biosensors/ob1203-heart-rate-blood-oxygen-concentration-pulse-oximetry-proximity-light-and-color-sensor)
    -R01AN6311 : https://www.renesas.com/document/apn/ob1203-sample-application-sample-code
    -R36AN0001EU : https://www.renesas.com/document/apn/ob1203-pulse-oximeter-algorithm-spo2-heart-rate-and-respiration-rate
    -

    -

    If multiple operation modes is used with a single OB1203 sensor device, rm_ob1203 modules need to be used while switching between operation modes because modules cannot work in parallel. Threfore, a current rm_ob1203 module must be closed with RM_OB1203_Close() before another rm_ob1203 module is opened with RM_OB1203_Open().

    -

    -Examples

    -

    Basic Example

    -

    These are basic examples of minimal use of OB1203 sensor implementation in an application.

    -

    Light mode

    -
    void rm_ob1203_light_mode_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_ob1203_raw_data_t raw_data;
    rm_ob1203_light_data_t ob1203_data;
    #if 0 == RM_OB1203_EXAMPLE_IRQ_ENABLE
    rm_ob1203_device_status_t device_status;
    #endif
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_ob1203_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    err = RM_OB1203_Open(&g_ob1203_ctrl, &g_ob1203_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    g_i2c_flag = 0;
    /* Start measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    while (true)
    {
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Wait IRQ callback */
    while (0 == g_irq_flag)
    {
    /* Wait callback */
    }
    g_irq_flag = 0;
    #else
    do
    {
    g_i2c_flag = 0;
    /* Get device status */
    RM_OB1203_DeviceStatusGet(&g_ob1203_ctrl, &device_status);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    } while (false == device_status.light_measurement_complete);
    #endif
    g_i2c_flag = 0;
    /* Read ADC data */
    RM_OB1203_LightRead(&g_ob1203_ctrl, &raw_data, RM_OB1203_LIGHT_DATA_TYPE_ALL);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    /* Calculate light data */
    RM_OB1203_LightDataCalculate(&g_ob1203_ctrl, &raw_data, &ob1203_data);
    }
    }

    Proximity mode

    -
    void rm_ob1203_prox_mode_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_ob1203_raw_data_t raw_data;
    rm_ob1203_prox_data_t ob1203_data;
    #if 0 == RM_OB1203_EXAMPLE_IRQ_ENABLE
    rm_ob1203_device_status_t device_status;
    #endif
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_ob1203_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    err = RM_OB1203_Open(&g_ob1203_ctrl, &g_ob1203_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    g_i2c_flag = 0;
    /* Start measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    while (true)
    {
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Wait IRQ callback */
    while (0 == g_irq_flag)
    {
    /* Wait callback */
    }
    g_irq_flag = 0;
    #else
    do
    {
    g_i2c_flag = 0;
    /* Get device status */
    RM_OB1203_DeviceStatusGet(&g_ob1203_ctrl, &device_status);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    } while (false == device_status.prox_measurement_complete);
    #endif
    g_i2c_flag = 0;
    /* Read ADC data */
    RM_OB1203_ProxRead(&g_ob1203_ctrl, &raw_data);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    /* Calculate proximity data */
    RM_OB1203_ProxDataCalculate(&g_ob1203_ctrl, &raw_data, &ob1203_data);
    }
    }

    Light Proximity mode

    -
    void rm_ob1203_light_prox_mode_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_ob1203_raw_data_t raw_data;
    rm_ob1203_light_data_t ob1203_light_data;
    rm_ob1203_prox_data_t ob1203_prox_data;
    #if 0 == RM_OB1203_EXAMPLE_IRQ_ENABLE
    rm_ob1203_device_status_t device_status;
    #endif
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_ob1203_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    err = RM_OB1203_Open(&g_ob1203_ctrl, &g_ob1203_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    g_i2c_flag = 0;
    /* Start measurement in both Light and Proximity modes */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    /*
    * Example :
    * Device interrupt : Proximity mode
    * Measurement peroid(Light mode) : 50ms
    * Measurement peroid(Proximity mode) : 100ms
    */
    while (true)
    {
    /* Delay 50ms for Light mode */
    R_BSP_SoftwareDelay(RM_OB1203_EXAMPLE_DELAY_50MS, BSP_DELAY_UNITS_MILLISECONDS);
    g_i2c_flag = 0;
    /* Read Light ADC data */
    RM_OB1203_LightRead(&g_ob1203_ctrl, &raw_data, RM_OB1203_LIGHT_DATA_TYPE_ALL);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    /* Calculate Light data */
    RM_OB1203_LightDataCalculate(&g_ob1203_ctrl, &raw_data, &ob1203_light_data);
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Wait IRQ callback */
    while (0 == g_irq_flag)
    {
    /* Wait callback */
    }
    g_irq_flag = 0;
    #else
    do
    {
    g_i2c_flag = 0;
    /* Get device status */
    RM_OB1203_DeviceStatusGet(&g_ob1203_ctrl, &device_status);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    } while (false == device_status.prox_measurement_complete);
    #endif
    g_i2c_flag = 0;
    /* Read Proximity ADC data */
    RM_OB1203_ProxRead(&g_ob1203_ctrl, &raw_data);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    /* Calculate proximity data */
    RM_OB1203_ProxDataCalculate(&g_ob1203_ctrl, &raw_data, &ob1203_prox_data);
    }
    }

    PPG mode

    -
    void rm_ob1203_ppg_mode_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_ob1203_raw_data_t raw_data;
    rm_ob1203_ppg_data_t ob1203_data;
    #if 0 == RM_OB1203_EXAMPLE_IRQ_ENABLE
    rm_ob1203_device_status_t device_status;
    #endif
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_ob1203_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    err = RM_OB1203_Open(&g_ob1203_ctrl, &g_ob1203_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    g_i2c_flag = 0;
    /* Start measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    while (true)
    {
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Wait IRQ callback */
    while (0 == g_irq_flag)
    {
    /* Wait callback */
    }
    g_irq_flag = 0;
    #else
    do
    {
    g_i2c_flag = 0;
    /* Get device status */
    RM_OB1203_DeviceStatusGet(&g_ob1203_ctrl, &device_status);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    } while (false == device_status.ppg_measurement_complete);
    #endif
    g_i2c_flag = 0;
    /* Read ADC data */
    RM_OB1203_PpgRead(&g_ob1203_ctrl, &raw_data, 2);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    /* Calculate ppg data */
    RM_OB1203_PpgDataCalculate(&g_ob1203_ctrl, &raw_data, &ob1203_data);
    }
    }

    Light mode reconfiguration at runtime

    -
    void rm_ob1203_light_reconfiguration_basic_example (void)
    {
    g_i2c_flag = 0;
    /* Stop a measurement */
    RM_OB1203_MeasurementStop(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set Light mode gain.
    * Example : Gain mode is 1.
    */
    rm_ob1203_gain_t gain =
    {
    .light = RM_OB1203_LIGHT_GAIN_1,
    };
    RM_OB1203_GainSet(&g_ob1203_ctrl, gain);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Set interrupt configurations for Light mode.
    * Example :
    * Source : Green channel
    * Type : threshold interrupt
    * Persist : 0x02
    */
    rm_ob1203_device_interrupt_cfg_t interrupt_cfg =
    {
    .light_source = RM_OB1203_LIGHT_INTERRUPT_SOURCE_GREEN_CHANNEL,
    .light_type = RM_OB1203_LIGHT_INTERRUPT_TYPE_THRESHOLD,
    .persist = 0x02,
    };
    RM_OB1203_DeviceInterruptCfgSet(&g_ob1203_ctrl, interrupt_cfg);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #endif
    /* Restart a measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    }

    Proximity mode reconfiguration at runtime

    -
    void rm_ob1203_prox_reconfiguration_basic_example (void)
    {
    g_i2c_flag = 0;
    /* Stop a measurement */
    RM_OB1203_MeasurementStop(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set Proximity mode gain.
    * Example : Gain mode is 2.
    */
    rm_ob1203_gain_t gain =
    {
    .ppg_prox = RM_OB1203_PPG_PROX_GAIN_2,
    };
    RM_OB1203_GainSet(&g_ob1203_ctrl, gain);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set LED current.
    * Example :
    * LED : IR LED
    * Current : 0x366 (10bits).
    */
    rm_ob1203_led_current_t led_current =
    {
    .ir_led = RM_OB1203_EXAMPLE_IR_CURRENT_0X366,
    };
    RM_OB1203_LedCurrentSet(&g_ob1203_ctrl, led_current);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Set interrupt configurations for Proximity mode.
    * Example :
    * Type : normal interrupt
    * Persist : 0x02
    */
    rm_ob1203_device_interrupt_cfg_t interrupt_cfg =
    {
    .prox_type = RM_OB1203_PROX_INTERRUPT_TYPE_NORMAL,
    .persist = 0x02,
    };
    RM_OB1203_DeviceInterruptCfgSet(&g_ob1203_ctrl, interrupt_cfg);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #endif
    /* Restart a measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    }

    Light Proximity mode reconfiguration at runtime

    -
    void rm_ob1203_light_prox_reconfiguration_basic_example (void)
    {
    g_i2c_flag = 0;
    /* Stop a measurement */
    RM_OB1203_MeasurementStop(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set Proximity mode gain.
    * Example :
    * Light mode : 1
    * Proximity mode : 2
    */
    rm_ob1203_gain_t gain =
    {
    .light = RM_OB1203_LIGHT_GAIN_1,
    .ppg_prox = RM_OB1203_PPG_PROX_GAIN_2,
    };
    RM_OB1203_GainSet(&g_ob1203_ctrl, gain);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set LED current.
    * Example :
    * LED : IR LED
    * Current : 0x366 (10bits).
    */
    rm_ob1203_led_current_t led_current =
    {
    .ir_led = RM_OB1203_EXAMPLE_IR_CURRENT_0X366,
    };
    RM_OB1203_LedCurrentSet(&g_ob1203_ctrl, led_current);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Set interrupt configurations for Light Proximity mode.
    * Example :
    * device interrupt : Proximity mode
    * Type : normal interrupt
    * Persist : 0x02
    */
    rm_ob1203_device_interrupt_cfg_t interrupt_cfg =
    {
    .light_prox_mode = RM_OB1203_OPERATION_MODE_PROXIMITY,
    .prox_type = RM_OB1203_PROX_INTERRUPT_TYPE_NORMAL,
    .persist = 0x02,
    };
    RM_OB1203_DeviceInterruptCfgSet(&g_ob1203_ctrl, interrupt_cfg);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #endif
    /* Restart a measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    }

    PPG mode reconfiguration at runtime

    -
    void rm_ob1203_ppg_reconfiguration_basic_example (void)
    {
    g_i2c_flag = 0;
    /* Stop a measurement */
    RM_OB1203_MeasurementStop(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set PPG mode gain.
    * Example : Gain mode is 2.
    */
    rm_ob1203_gain_t gain =
    {
    .ppg_prox = RM_OB1203_PPG_PROX_GAIN_2,
    };
    RM_OB1203_GainSet(&g_ob1203_ctrl, gain);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    /* Set LED current.
    * Example :
    * IR LED : 0x366 (10bits).
    * Red LED : 0x1B3 (9bits).
    */
    rm_ob1203_led_current_t led_current =
    {
    .ir_led = RM_OB1203_EXAMPLE_IR_CURRENT_0X366,
    .red_led = RM_OB1203_EXAMPLE_RED_CURRENT_0X1B3,
    };
    RM_OB1203_LedCurrentSet(&g_ob1203_ctrl, led_current);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #if RM_OB1203_EXAMPLE_IRQ_ENABLE
    /* Set interrupt configurations for PPG mode.
    * Example :
    * Type : data interrupt
    */
    rm_ob1203_device_interrupt_cfg_t interrupt_cfg =
    {
    .ppg_type = RM_OB1203_PPG_INTERRUPT_TYPE_DATA,
    };
    RM_OB1203_DeviceInterruptCfgSet(&g_ob1203_ctrl, interrupt_cfg);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    g_i2c_flag = 0;
    #endif
    /* Restart a measurement */
    RM_OB1203_MeasurementStart(&g_ob1203_ctrl);
    while (0 == g_i2c_flag)
    {
    /* Wait callback */
    }
    }
    - - - - - - - -

    -Data Structures

    struct  rm_ob1203_init_process_params_t
     
    struct  rm_ob1203_mode_extended_cfg_t
     
    struct  rm_ob1203_instance_ctrl_t
     
    -

    Data Structure Documentation

    - -

    ◆ rm_ob1203_init_process_params_t

    - -
    -
    - - - - -
    struct rm_ob1203_init_process_params_t
    -
    -

    OB1203 initialization process block

    -
    - - - - - - - -
    Data Fields
    -volatile bool -communication_finished -Communication flag for blocking.
    -volatile rm_ob1203_event_t -event -Callback event.
    - -
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    ◆ rm_ob1203_mode_extended_cfg_t

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    - - - - -
    struct rm_ob1203_mode_extended_cfg_t
    -
    -

    OB1203 mode extended configuration

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    Data Fields
    -rm_ob1203_api_t const * -p_api -Pointer to APIs.
    -rm_ob1203_operation_mode_t -mode_irq -Operation mode using IRQ.
    -rm_ob1203_ppg_prox_gain_t -ppg_prox_gain -Proximity gain range.
    -rm_ob1203_led_order_t -led_order -LED order.
    -rm_ob1203_light_sensor_mode_t -light_sensor_mode -LS or CS sensor mode.
    -rm_ob1203_light_interrupt_type_t -light_interrupt_type -Light mode interrupt type.
    -rm_ob1203_light_interrupt_source_t -light_interrupt_source -Light mode interrupt source.
    -uint8_t -light_interrupt_persist -The number of similar consecutive Light mode interrupt events that must occur before the interrupt is asserted (4bits).
    -rm_ob1203_sleep_after_interrupt_t -light_sleep -Sleep after an interrupt.
    -rm_ob1203_light_gain_t -light_gain -Light gain range.
    -uint32_t -light_upper_threshold -Upper threshold for interrupt.
    -uint32_t -light_lower_threshold -Lower threshold for interrupt.
    -rm_ob1203_variance_threshold_t -light_variance_threshold -variance threshold for interrupt.
    -rm_ob1203_light_resolution_meas_period_t -light_resolution_period -Resolution and measurement period.
    -rm_ob1203_light_data_type_t -light_data_type -Light data type.
    -rm_ob1203_sleep_after_interrupt_t -prox_sleep -Sleep after an interrupt.
    -rm_ob1203_prox_interrupt_type_t -prox_interrupt_type -Proximity mode interrupt type.
    -uint8_t -prox_interrupt_persist -The number of similar consecutive Proximity mode interrupt events that must occur before the interrupt is asserted (4bits).
    -uint16_t -prox_led_current -Proximity LED current.
    -rm_ob1203_analog_cancellation_t -prox_ana_can -Analog cancellation.
    -uint16_t -prox_dig_can -Digital cancellation.
    -rm_ob1203_number_led_pulses_t -prox_num_led_pulses -Number of LED pulses.
    -uint16_t -prox_upper_threshold -Upper threshold for interrupt.
    -uint16_t -prox_lower_threshold -Lower threshold for interrupt.
    -rm_ob1203_prox_pulse_width_meas_period_t -prox_width_period -Proximity pulse width and measurement period.
    -rm_ob1203_moving_average_t -prox_moving_average -Moving average.
    -uint8_t -prox_hysteresis -Proximity hysteresis threshold (7bits).
    -rm_ob1203_ppg_sensor_mode_t -ppg_sensor_mode -PPG1 or PPG2 sensor mode.
    -rm_ob1203_ppg_interrupt_type_t -ppg_interrupt_type -PPG mode interrupt type.
    -uint16_t -ppg_ir_led_current -PPG IR LED current.
    -uint16_t -ppg_red_led_current -PPG Red LED current.
    -rm_ob1203_power_save_mode_t -ppg_power_save_mode -PPG power save mode.
    -rm_ob1203_analog_cancellation_t -ppg_ir_led_ana_can -IR LED analog cancellations.
    -rm_ob1203_analog_cancellation_t -ppg_red_led_ana_can -Red LED analog cancellations.
    -rm_ob1203_number_averaged_samples_t -ppg_num_averaged_samples -Number of averaged PPG samples.
    -rm_ob1203_ppg_pulse_width_meas_period_t -ppg_width_period -PPG pulse width and measurement period.
    -rm_ob1203_fifo_rollover_t -ppg_fifo_rollover -FIFO rollover enable.
    -uint8_t -ppg_fifo_empty_num -the number of empty FIFO words when the FIFO almost full interrupt is issued. In PPG2 Mode only even values should be used. (4 bits)
    -uint8_t -ppg_number_of_samples -Number of PPG samples.
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    ◆ rm_ob1203_instance_ctrl_t

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    struct rm_ob1203_instance_ctrl_t
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    OB1203 Control Block

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    Data Fields

    -uint32_t open
     Open flag.
     
    -rm_ob1203_cfg_t const * p_cfg
     Pointer to OB1203 Configuration.
     
    -uint8_t buf [8]
     Buffer for I2C communications.
     
    -rm_ob1203_init_process_params_t init_process_params
     For the initialization process.
     
    -uint8_t register_address
     Register address to access.
     
    -volatile rm_ob1203_device_status_t * p_device_status
     Pointer to device status.
     
    -volatile rm_ob1203_fifo_info_t * p_fifo_info
     Pointer to FIFO information structure.
     
    -volatile bool fifo_reset
     Flag for FIFO reset for PPG mode.
     
    -volatile bool prox_gain_update
     Flag for gain update for Proximity mode.
     
    -volatile bool interrupt_bits_clear
     Flag for clearing interrupt bits.
     
    -rm_comms_instance_t const * p_comms_i2c_instance
     Pointer of I2C Communications Middleware instance structure.
     
    -rm_ob1203_mode_extended_cfg_t * p_mode
     Pointer of OB1203 operation mode extended configuration.
     
    -void const * p_irq_instance
     Pointer to IRQ instance.
     
    -void const * p_context
     Pointer to the user-provided context.
     
    -void(* p_comms_callback )(rm_ob1203_callback_args_t *p_args)
     I2C Communications callback.
     
    -void(* p_irq_callback )(rm_ob1203_callback_args_t *p_args)
     IRQ callback.
     
    - -
    -
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    Function Documentation

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    ◆ RM_OB1203_Open()

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    fsp_err_t RM_OB1203_Open (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_cfg_t const *const p_cfg 
    )
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    Opens and configures the OB1203 Middle module. Implements rm_ob1203_api_t::open.

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    Example:

    err = RM_OB1203_Open(&g_ob1203_ctrl, &g_ob1203_cfg);
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    FSP_SUCCESSOB1203 successfully configured.
    FSP_ERR_ASSERTIONNull pointer, or one or more configuration options is invalid.
    FSP_ERR_ALREADY_OPENModule is already open. This module can only be opened once.
    FSP_ERR_TIMEOUTCommunication is timeout.
    FSP_ERR_ABORTEDCommunication is aborted.
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    ◆ RM_OB1203_Close()

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    fsp_err_t RM_OB1203_Close (rm_ob1203_ctrl_t *const p_api_ctrl)
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    Disables specified OB1203 control block. Implements rm_ob1203_api_t::close.

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    FSP_SUCCESSSuccessfully closed.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not open.
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    ◆ RM_OB1203_MeasurementStart()

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    fsp_err_t RM_OB1203_MeasurementStart (rm_ob1203_ctrl_t *const p_api_ctrl)
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    Start measurement. Implements rm_ob1203_api_t::measurementStart.

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    Return values
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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_MeasurementStop()

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    fsp_err_t RM_OB1203_MeasurementStop (rm_ob1203_ctrl_t *const p_api_ctrl)
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    Stop measurement. If device interrupt is enabled, interrupt bits are cleared after measurement stop. If PPG mode, FIFO information is also reset after measurement stop. In RTOS and Light/Proximity/Light Proximity mode, if device interrupt is enabled, blocks 2 bytes on the I2C bus. In RTOS and PPG mode, if device interrupt is enabled, blocks 6 bytes on the I2C bus. If device interrupt is disabled, blocks 4 bytes on the I2C bus. Implements rm_ob1203_api_t::measurementStop.

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    Return values
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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_LightRead()

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    fsp_err_t RM_OB1203_LightRead (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_raw_data_t *const p_raw_data,
    rm_ob1203_light_data_type_t type 
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    Reads Light ADC data from OB1203 device. If device interrupt is enabled, interrupt bits are cleared after data read. In RTOS and Light mode, if device interrupt is enabled, blocks 2 bytes on the I2C bus. Implements rm_ob1203_api_t::lightRead.

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    Return values
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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_LightDataCalculate()

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    fsp_err_t RM_OB1203_LightDataCalculate (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_raw_data_t *const p_raw_data,
    rm_ob1203_light_data_t *const p_ob1203_data 
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    Calculate light data from raw data. Implements rm_ob1203_api_t::lightDataCalculate.

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    Return values
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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_ProxRead()

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    fsp_err_t RM_OB1203_ProxRead (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_raw_data_t *const p_raw_data 
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    Reads Proximity ADC data from OB1203 device. If device interrupt is enabled, interrupt bits are cleared after data read. In RTOS and Proximity mode, if device interrupt is enabled, blocks 2 bytes on the I2C bus. Implements rm_ob1203_api_t::proxRead.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_ProxDataCalculate()

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    fsp_err_t RM_OB1203_ProxDataCalculate (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_raw_data_t *const p_raw_data,
    rm_ob1203_prox_data_t *const p_ob1203_data 
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    Calculate proximity data from raw data. Implements rm_ob1203_api_t::proxDataCalculate.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_PpgRead()

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    fsp_err_t RM_OB1203_PpgRead (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_raw_data_t *const p_raw_data,
    uint8_t const number_of_samples 
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    Reads PPG ADC data from OB1203 device. One sample requires three bytes. 0 cannot set to the number of samples. Implements rm_ob1203_api_t::ppgRead.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_PpgDataCalculate()

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    fsp_err_t RM_OB1203_PpgDataCalculate (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_raw_data_t *const p_raw_data,
    rm_ob1203_ppg_data_t *const p_ob1203_data 
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    Calculate PPG data from raw data. Implements rm_ob1203_api_t::ppgDataCalculate.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_GainSet()

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    fsp_err_t RM_OB1203_GainSet (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_gain_t const gain 
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    Set gain. This function should be called after calling RM_OB1203_MeasurementStop(). In RTOS and Light Proximity mode, blocks 2 bytes on the I2C bus. Implements rm_ob1203_api_t::gainSet.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_LedCurrentSet()

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    fsp_err_t RM_OB1203_LedCurrentSet (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_led_current_t const led_current 
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    Set currents. This function should be called after calling RM_OB1203_MeasurementStop(). Implements rm_ob1203_api_t::ledCurrentSet.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
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    ◆ RM_OB1203_DeviceInterruptCfgSet()

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    fsp_err_t RM_OB1203_DeviceInterruptCfgSet (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_device_interrupt_cfg_t const interrupt_cfg 
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    Set device interrupt configurations. This function should be called after calling RM_OB1203_MeasurementStop(). Implements rm_ob1203_api_t::deviceInterruptCfgSet.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
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    ◆ RM_OB1203_FifoInfoGet()

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    fsp_err_t RM_OB1203_FifoInfoGet (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_fifo_info_t *const p_fifo_info 
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    Get FIFO information from OB1203 device. Implements rm_ob1203_api_t::fifoInfoGet.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
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    ◆ RM_OB1203_DeviceStatusGet()

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    fsp_err_t RM_OB1203_DeviceStatusGet (rm_ob1203_ctrl_t *const p_api_ctrl,
    rm_ob1203_device_status_t *const p_status 
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    Get device status from OB1203 device. Clear all interrupt bits. Implements rm_ob1203_api_t::deviceStatusGet.

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    FSP_SUCCESSSuccessfully results are read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENModule is not opened configured.
    FSP_ERR_TIMEOUTCommunication is timeout.
    FSP_ERR_ABORTEDCommunication is aborted.
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[ "RM_OB1203_DeviceStatusGet", "group___r_m___o_b1203.html#ga13ab57714aafa9a3023a32f83c88e1dd", null ] -]; \ No newline at end of file diff --git a/group___r_m___o_b1203___a_p_i.html b/group___r_m___o_b1203___a_p_i.html deleted file mode 100644 index a7cdf8c..0000000 --- a/group___r_m___o_b1203___a_p_i.html +++ /dev/null @@ -1,1777 +0,0 @@ - - - - - - - -RZ/V Flexible Software Package Documentation: OB1203 Middleware Interface - - - - - - - - - - - - - - - -
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    RZ/V Flexible Software Package Documentation -  Release v1.1.0 -
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    -Data Structures | -Typedefs | -Enumerations
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    OB1203 Middleware Interface
    Interfaces
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    Detailed Description

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    Interface for OB1203 Middleware functions.

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    -Summary

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    The OB1203 interface provides OB1203 functionality.

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    The OB1203 interface can be implemented by:

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    -Data Structures

    struct  rm_ob1203_callback_args_t
     
    struct  rm_ob1203_raw_data_t
     
    struct  rm_ob1203_light_data_t
     
    struct  rm_ob1203_prox_data_t
     
    struct  rm_ob1203_ppg_data_t
     
    struct  rm_ob1203_device_interrupt_cfg_t
     
    struct  rm_ob1203_device_status_t
     
    struct  rm_ob1203_gain_t
     
    struct  rm_ob1203_led_current_t
     
    struct  rm_ob1203_fifo_info_t
     
    struct  rm_ob1203_cfg_t
     
    struct  rm_ob1203_api_t
     
    struct  rm_ob1203_instance_t
     
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    -Typedefs

    typedef void rm_ob1203_ctrl_t
     
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    -Enumerations

    enum  rm_ob1203_event_t
     
    enum  rm_ob1203_operation_mode_t
     
    enum  rm_ob1203_light_sensor_mode_t
     
    enum  rm_ob1203_ppg_sensor_mode_t
     
    enum  rm_ob1203_light_data_type_t
     
    enum  rm_ob1203_light_gain_t
     
    enum  rm_ob1203_ppg_prox_gain_t
     
    enum  rm_ob1203_led_order_t
     
    enum  rm_ob1203_light_interrupt_type_t
     
    enum  rm_ob1203_light_interrupt_source_t
     
    enum  rm_ob1203_prox_interrupt_type_t
     
    enum  rm_ob1203_ppg_interrupt_type_t
     
    enum  rm_ob1203_variance_threshold_t
     
    enum  rm_ob1203_sleep_after_interrupt_t
     
    enum  rm_ob1203_moving_average_t
     
    enum  rm_ob1203_power_save_mode_t
     
    enum  rm_ob1203_analog_cancellation_t
     
    enum  rm_ob1203_number_led_pulses_t
     
    enum  rm_ob1203_number_averaged_samples_t
     
    enum  rm_ob1203_light_resolution_meas_period_t
     
    enum  rm_ob1203_prox_pulse_width_meas_period_t
     
    enum  rm_ob1203_ppg_pulse_width_meas_period_t
     
    enum  rm_ob1203_fifo_rollover_t
     
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    Data Structure Documentation

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    ◆ rm_ob1203_callback_args_t

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    struct rm_ob1203_callback_args_t
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    OB1203 callback parameter definition

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    ◆ rm_ob1203_raw_data_t

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    struct rm_ob1203_raw_data_t
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    OB1203 raw data structure

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    Data Fields
    -uint8_t -adc_data[96] -Max of PPG data is 96 (3 bytes multiplied by 32 samples)
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    ◆ rm_ob1203_light_data_t

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    struct rm_ob1203_light_data_t
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    OB1203 light data structure

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    Data Fields
    -uint32_t -clear_data -Clear channel data (20bits).
    -uint32_t -green_data -Green channel data (20bits).
    -uint32_t -blue_data -Blue channel data (20bits).
    -uint32_t -red_data -Red channel data (20bits).
    -uint32_t -comp_data -Temperature compensation (Comp) channel data (20bits).
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    ◆ rm_ob1203_prox_data_t

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    struct rm_ob1203_prox_data_t
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    OB1203 proximity data structure

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    Data Fields
    -uint16_t -proximity_data -Proximity data.
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    ◆ rm_ob1203_ppg_data_t

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    struct rm_ob1203_ppg_data_t
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    OB1203 PPG data structure

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    -uint32_t -ppg_data[32] -PPG data (18bits).
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    ◆ rm_ob1203_device_interrupt_cfg_t

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    struct rm_ob1203_device_interrupt_cfg_t
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    OB1203 device interrupt configuration structure

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    Data Fields
    -rm_ob1203_operation_mode_t -light_prox_mode -Light Proximity mode only. If Light mode uses IRQ, set RM_OB1203_OPERATION_MODE_LIGHT. If Proximity mode uses IRQ, set RM_OB1203_OPERATION_MODE_PROXIMITY.
    -rm_ob1203_light_interrupt_type_t -light_type -Light mode interrupt type.
    -rm_ob1203_light_interrupt_source_t -light_source -Light mode interrupt source.
    -rm_ob1203_prox_interrupt_type_t -prox_type -Proximity mode interrupt type.
    -uint8_t -persist -The number of similar consecutive Light mode or Proximity interrupt events that must occur before the interrupt is asserted (4bits).
    -rm_ob1203_ppg_interrupt_type_t -ppg_type -PPG mode interrupt type.
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    ◆ rm_ob1203_device_status_t

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    struct rm_ob1203_device_status_t
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    OB1203 device status

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    Data Fields
    -bool -power_on_reset_occur -
    -bool -light_interrupt_occur -
    -bool -light_measurement_complete -
    -bool -ts_measurement_complete -
    -bool -fifo_afull_interrupt_occur -FIFO almost full interrupt.
    -bool -ppg_measurement_complete -
    -bool -object_near -
    -bool -prox_interrupt_occur -
    -bool -prox_measurement_complete -
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    ◆ rm_ob1203_gain_t

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    struct rm_ob1203_gain_t
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    OB1203 Gain structure

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    -rm_ob1203_light_gain_t -light -Gain for Light mode.
    -rm_ob1203_ppg_prox_gain_t -ppg_prox -Gain for PPG mode and Proximity mode.
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    ◆ rm_ob1203_led_current_t

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    struct rm_ob1203_led_current_t
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    OB1203 LED currents structure

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    -uint16_t -ir_led -IR LED current.
    -uint16_t -red_led -Red LED current.
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    ◆ rm_ob1203_fifo_info_t

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    struct rm_ob1203_fifo_info_t
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    OB1203 FIFO information structure

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    Data Fields
    -uint8_t -write_index -The FIFO index where the next sample of PPG data will be written in the FIFO.
    -uint8_t -read_index -The index of the next sample to be read from the FIFO_DATA register.
    -uint8_t -overflow_counter -If the FIFO Rollover Enable bit is set, the FIFO overflow counter counts the number of old samples (up to 15) which are overwritten by new data.
    -uint8_t -unread_samples -The number of unread samples calculated from the write index and the read index.
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    ◆ rm_ob1203_cfg_t

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    struct rm_ob1203_cfg_t
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    OB1203 Configuration

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    Data Fields

    -uint32_t semaphore_timeout
     timeout for callback.
     
    -rm_comms_instance_t const * p_comms_instance
     Pointer to Communications Middleware instance.
     
    -void const * p_irq_instance
     Pointer to IRQ instance.
     
    -void const * p_context
     Pointer to the user-provided context.
     
    -void const * p_extend
     Pointer to extended configuration by instance of interface.
     
    -void(* p_comms_callback )(rm_ob1203_callback_args_t *p_args)
     I2C Communications callback.
     
    -void(* p_irq_callback )(rm_ob1203_callback_args_t *p_args)
     IRQ callback.
     
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    ◆ rm_ob1203_api_t

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    struct rm_ob1203_api_t
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    OB1203 APIs

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    Data Fields

    fsp_err_t(* open )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_cfg_t const *const p_cfg)
     
    fsp_err_t(* measurementStart )(rm_ob1203_ctrl_t *const p_ctrl)
     
    fsp_err_t(* measurementStop )(rm_ob1203_ctrl_t *const p_ctrl)
     
    fsp_err_t(* lightRead )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_light_data_type_t type)
     
    fsp_err_t(* lightDataCalculate )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_light_data_t *const p_ob1203_data)
     
    fsp_err_t(* proxRead )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data)
     
    fsp_err_t(* proxDataCalculate )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_prox_data_t *const p_ob1203_data)
     
    fsp_err_t(* ppgRead )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, uint8_t const number_of_samples)
     
    fsp_err_t(* ppgDataCalculate )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_ppg_data_t *const p_ob1203_data)
     
    fsp_err_t(* deviceStatusGet )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_device_status_t *const p_status)
     
    fsp_err_t(* deviceInterruptCfgSet )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_device_interrupt_cfg_t const interrupt_cfg)
     
    fsp_err_t(* gainSet )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_gain_t const gain)
     
    fsp_err_t(* ledCurrentSet )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_led_current_t const led_current)
     
    fsp_err_t(* fifoInfoGet )(rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_fifo_info_t *const p_fifo_info)
     
    fsp_err_t(* close )(rm_ob1203_ctrl_t *const p_ctrl)
     
    -

    Field Documentation

    - -

    ◆ open

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    fsp_err_t(* rm_ob1203_api_t::open) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_cfg_t const *const p_cfg)
    -
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    Open sensor.

    Implemented as
    -
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_cfgPointer to configuration structure.
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    ◆ measurementStart

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    fsp_err_t(* rm_ob1203_api_t::measurementStart) (rm_ob1203_ctrl_t *const p_ctrl)
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    Start measurement.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]modeSensor mode.
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    ◆ measurementStop

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    fsp_err_t(* rm_ob1203_api_t::measurementStop) (rm_ob1203_ctrl_t *const p_ctrl)
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    Stop measurement.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]modeSensor mode.
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    ◆ lightRead

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    fsp_err_t(* rm_ob1203_api_t::lightRead) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_light_data_type_t type)
    -
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    Read Light ADC data from OB1203.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_raw_dataPointer to raw data structure.
    [in]typeLight data type.
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    ◆ lightDataCalculate

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    fsp_err_t(* rm_ob1203_api_t::lightDataCalculate) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_light_data_t *const p_ob1203_data)
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    Calculate Light data from raw data.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_raw_dataPointer to raw data structure.
    [in]p_ob1203_dataPointer to OB1203 Light data structure.
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    ◆ proxRead

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    fsp_err_t(* rm_ob1203_api_t::proxRead) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data)
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    Read Proximity ADC data from OB1203.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_raw_dataPointer to raw data structure.
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    ◆ proxDataCalculate

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    fsp_err_t(* rm_ob1203_api_t::proxDataCalculate) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_prox_data_t *const p_ob1203_data)
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    Calculate Proximity data from raw data.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_raw_dataPointer to raw data structure.
    [in]p_ob1203_dataPointer to OB1203 Proximity data structure.
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    ◆ ppgRead

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    fsp_err_t(* rm_ob1203_api_t::ppgRead) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, uint8_t const number_of_samples)
    -
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    Read PPG ADC data from OB1203.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_raw_dataPointer to raw data structure.
    [in]number_of_samplesNumber of PPG samples. One sample is 3 bytes.
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    ◆ ppgDataCalculate

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    fsp_err_t(* rm_ob1203_api_t::ppgDataCalculate) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_raw_data_t *const p_raw_data, rm_ob1203_ppg_data_t *const p_ob1203_data)
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    Calculate PPG data from raw data.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_raw_dataPointer to raw data structure.
    [in]p_ob1203_dataPointer to OB1203 PPG data structure.
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    ◆ deviceStatusGet

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    fsp_err_t(* rm_ob1203_api_t::deviceStatusGet) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_device_status_t *const p_status)
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    Get device status. Read STATUS_0 and STATUS_1 registers.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_statusPointer to device status.
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    ◆ deviceInterruptCfgSet

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    fsp_err_t(* rm_ob1203_api_t::deviceInterruptCfgSet) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_device_interrupt_cfg_t const interrupt_cfg)
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    Set device interrupt configuration.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]interrupt_cfgDevice interrupt configuration.
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    ◆ gainSet

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    fsp_err_t(* rm_ob1203_api_t::gainSet) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_gain_t const gain)
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    Set gain.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]gainGain configuration.
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    ◆ ledCurrentSet

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    fsp_err_t(* rm_ob1203_api_t::ledCurrentSet) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_led_current_t const led_current)
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    Set LED current value.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]led_currentCurrent value structure.
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    ◆ fifoInfoGet

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    fsp_err_t(* rm_ob1203_api_t::fifoInfoGet) (rm_ob1203_ctrl_t *const p_ctrl, rm_ob1203_fifo_info_t *const p_fifo_info)
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    Get FIFO information.

    Implemented as
    -
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    Parameters
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    [in]p_ctrlPointer to control structure.
    [in]p_fifo_infoPointer to FIFO information (write index, read index and overflow counter).
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    ◆ close

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    fsp_err_t(* rm_ob1203_api_t::close) (rm_ob1203_ctrl_t *const p_ctrl)
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    Close OB1203.

    Implemented as
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    Parameters
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    [in]p_ctrlPointer to control structure.
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    ◆ rm_ob1203_instance_t

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    struct rm_ob1203_instance_t
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    OB1203 instance

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    Data Fields
    -rm_ob1203_ctrl_t * -p_ctrl -

    Pointer to the control structure for this instance

    -
    -rm_ob1203_cfg_t const * -p_cfg -

    Pointer to the configuration structure for this instance

    -
    -rm_ob1203_api_t const * -p_api -

    Pointer to the API structure for this instance

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    Typedef Documentation

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    ◆ rm_ob1203_ctrl_t

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    typedef void rm_ob1203_ctrl_t
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    OB1203 control block. Allocate an instance specific control block to pass into the OB1203 API calls.

    Implemented as
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    Enumeration Type Documentation

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    ◆ rm_ob1203_event_t

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    enum rm_ob1203_event_t
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    Event in the callback function

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    ◆ rm_ob1203_operation_mode_t

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    enum rm_ob1203_operation_mode_t
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    Operation mode of OB1203

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    Enumerator
    RM_OB1203_OPERATION_MODE_STANDBY 

    Standby.

    -
    RM_OB1203_OPERATION_MODE_LIGHT 

    Light mode.

    -
    RM_OB1203_OPERATION_MODE_PROXIMITY 

    Proximity mode.

    -
    RM_OB1203_OPERATION_MODE_PPG 

    PPG mode.

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    ◆ rm_ob1203_light_sensor_mode_t

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    enum rm_ob1203_light_sensor_mode_t
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    Light sensor mode of OB1203

    - - - -
    Enumerator
    RM_OB1203_LIGHT_SENSOR_MODE_LS 

    Light sensor LS mode (Green, Clear, Comp)

    -
    RM_OB1203_LIGHT_SENSOR_MODE_CS 

    Light sensor CS mode (Red, Green, Blue, Clear, Comp)

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    ◆ rm_ob1203_ppg_sensor_mode_t

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    enum rm_ob1203_ppg_sensor_mode_t
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    PPG sensor mode of OB1203

    - - - -
    Enumerator
    RM_OB1203_PPG_SENSOR_MODE_PPG1 

    PPG sensor PPG1 mode.

    -
    RM_OB1203_PPG_SENSOR_MODE_PPG2 

    PPG sensor PPG2 mode.

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    ◆ rm_ob1203_light_data_type_t

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    enum rm_ob1203_light_data_type_t
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    Data type of Light

    - - - - - - - -
    Enumerator
    RM_OB1203_LIGHT_DATA_TYPE_ALL 

    Common.

    -
    RM_OB1203_LIGHT_DATA_TYPE_CLEAR 

    Common.

    -
    RM_OB1203_LIGHT_DATA_TYPE_GREEN 

    Common.

    -
    RM_OB1203_LIGHT_DATA_TYPE_BLUE 

    CS mode only.

    -
    RM_OB1203_LIGHT_DATA_TYPE_RED 

    CS mode only.

    -
    RM_OB1203_LIGHT_DATA_TYPE_COMP 

    Common. Temperature compensation data.

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    ◆ rm_ob1203_light_gain_t

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    enum rm_ob1203_light_gain_t
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    Light gain range. Gain scales the ADC output and noise

    - - - - -
    Enumerator
    RM_OB1203_LIGHT_GAIN_1 

    Gain mode 1.

    -
    RM_OB1203_LIGHT_GAIN_3 

    Gain mode 3.

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    RM_OB1203_LIGHT_GAIN_6 

    Gain mode 6.

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    ◆ rm_ob1203_ppg_prox_gain_t

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    enum rm_ob1203_ppg_prox_gain_t
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    PPG and proximity gain range. Gain scales the ADC output and noise

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    Enumerator
    RM_OB1203_PPG_PROX_GAIN_1 

    Gain mode 1.

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    RM_OB1203_PPG_PROX_GAIN_1P5 

    Gain mode 1.5.

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    RM_OB1203_PPG_PROX_GAIN_2 

    Gain mode 2.

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    RM_OB1203_PPG_PROX_GAIN_4 

    Gain mode 4.

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    ◆ rm_ob1203_led_order_t

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    enum rm_ob1203_led_order_t
    -
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    LED order. Controls which LED is activated (PS, PPG1) or in which order the LEDs are activated (PPG2)

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    Enumerator
    RM_OB1203_LED_IR_FIRST_RED_SECOND 

    First LED : IR LED, second LED : red LED.

    -
    RM_OB1203_LED_RED_FIRST_IR_SECOND 

    First LED : red LED, second LED : IR LED.

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    ◆ rm_ob1203_light_interrupt_type_t

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    enum rm_ob1203_light_interrupt_type_t
    -
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    Light interrupt type

    - - - -
    Enumerator
    RM_OB1203_LIGHT_INTERRUPT_TYPE_THRESHOLD 

    Light threshold interrupt.

    -
    RM_OB1203_LIGHT_INTERRUPT_TYPE_VARIATION 

    Light variation interrupt.

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    ◆ rm_ob1203_light_interrupt_source_t

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    enum rm_ob1203_light_interrupt_source_t
    -
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    Light interrupt source

    - - - - - -
    Enumerator
    RM_OB1203_LIGHT_INTERRUPT_SOURCE_CLEAR_CHANNEL 

    Clear channel.

    -
    RM_OB1203_LIGHT_INTERRUPT_SOURCE_GREEN_CHANNEL 

    Green channel.

    -
    RM_OB1203_LIGHT_INTERRUPT_SOURCE_RED_CHANNEL 

    Red channel. CS mode only.

    -
    RM_OB1203_LIGHT_INTERRUPT_SOURCE_BLUE_CHANNEL 

    Blue channel. CS mode only.

    -
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    ◆ rm_ob1203_prox_interrupt_type_t

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    enum rm_ob1203_prox_interrupt_type_t
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    Proximity interrupt type

    - - - -
    Enumerator
    RM_OB1203_PROX_INTERRUPT_TYPE_NORMAL 

    Proximity normal interrupt.

    -
    RM_OB1203_PROX_INTERRUPT_TYPE_LOGIC 

    Proximity logic output interrupt.

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    ◆ rm_ob1203_ppg_interrupt_type_t

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    enum rm_ob1203_ppg_interrupt_type_t
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    PPG interrupt type

    - - - -
    Enumerator
    RM_OB1203_PPG_INTERRUPT_TYPE_DATA 

    PPG data interrupt.

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    RM_OB1203_PPG_INTERRUPT_TYPE_FIFO_AFULL 

    PPG FIFO almost full interrupt.

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    ◆ rm_ob1203_variance_threshold_t

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    enum rm_ob1203_variance_threshold_t
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    Variance threshold

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    Enumerator
    RM_OB1203_VARIANCE_THRESHOLD_8_COUNTS 

    New LS_DATA varies by ± 8 counts compared to previous result.

    -
    RM_OB1203_VARIANCE_THRESHOLD_16_COUNTS 

    New LS_DATA varies by ± 16 counts compared to previous result.

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    RM_OB1203_VARIANCE_THRESHOLD_32_COUNTS 

    New LS_DATA varies by ± 32 counts compared to previous result.

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    RM_OB1203_VARIANCE_THRESHOLD_64_COUNTS 

    New LS_DATA varies by ± 64 counts compared to previous result.

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    RM_OB1203_VARIANCE_THRESHOLD_128_COUNTS 

    New LS_DATA varies by ± 128 counts compared to previous result.

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    RM_OB1203_VARIANCE_THRESHOLD_256_COUNTS 

    New LS_DATA varies by ± 256 counts compared to previous result.

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    RM_OB1203_VARIANCE_THRESHOLD_512_COUNTS 

    New LS_DATA varies by ± 512 counts compared to previous result.

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    RM_OB1203_VARIANCE_THRESHOLD_1024_COUNTS 

    New LS_DATA varies by ± 1024 counts compared to previous result.

    -
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    ◆ rm_ob1203_sleep_after_interrupt_t

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    enum rm_ob1203_sleep_after_interrupt_t
    -
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    Sleep after interrupt

    - - - -
    Enumerator
    RM_OB1203_SLEEP_AFTER_INTERRUPT_DISABLE 

    Disable sleep after interrupt.

    -
    RM_OB1203_SLEEP_AFTER_INTERRUPT_ENABLE 

    Stop measurement after an interrupt occurs. After STATUS_0/STATUS_1 register is read, start measurement.

    -
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    ◆ rm_ob1203_moving_average_t

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    enum rm_ob1203_moving_average_t
    -
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    Moving average

    - - - -
    Enumerator
    RM_OB1203_MOVING_AVERAGE_DISABLE 

    Moving average is disabled for Proximity mode.

    -
    RM_OB1203_MOVING_AVERAGE_ENABLE 

    Moving average is enabled for Proximity mode. Proximity data is the average of the current and previous measurement. The moving average is applied after digital offset cancellation.

    -
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    ◆ rm_ob1203_power_save_mode_t

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    enum rm_ob1203_power_save_mode_t
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    Power save mode

    - - - -
    Enumerator
    RM_OB1203_POWER_SAVE_MODE_DISABLE 

    Power save mode is disabled for PPG mode.

    -
    RM_OB1203_POWER_SAVE_MODE_ENABLE 

    Power save mode is enabled for PPG mode. On power save mode, some analog circuitry powers down between individual PPG measurements if the idle time.

    -
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    ◆ rm_ob1203_analog_cancellation_t

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    enum rm_ob1203_analog_cancellation_t
    -
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    Analog cancellation

    - - - -
    Enumerator
    RM_OB1203_ANALOG_CANCELLATION_DISABLE 

    No offset cancellation.

    -
    RM_OB1203_ANALOG_CANCELLATION_ENABLE 

    50% offset of the full-scale value

    -
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    ◆ rm_ob1203_number_led_pulses_t

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    enum rm_ob1203_number_led_pulses_t
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    Number of LED pulses

    - - - - - - - -
    Enumerator
    RM_OB1203_NUM_LED_PULSES_1 

    1 pulse.

    -
    RM_OB1203_NUM_LED_PULSES_2 

    2 pulses.

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    RM_OB1203_NUM_LED_PULSES_4 

    4 pulses.

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    RM_OB1203_NUM_LED_PULSES_8 

    8 pulses.

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    RM_OB1203_NUM_LED_PULSES_16 

    16 pulses.

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    RM_OB1203_NUM_LED_PULSES_32 

    32 pulses.

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    ◆ rm_ob1203_number_averaged_samples_t

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    enum rm_ob1203_number_averaged_samples_t
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    Number of averaged samples

    - - - - - - - -
    Enumerator
    RM_OB1203_NUM_AVERAGED_SAMPLES_1 

    1 (No averaging).

    -
    RM_OB1203_NUM_AVERAGED_SAMPLES_2 

    2 consecutives samples are averaged.

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    RM_OB1203_NUM_AVERAGED_SAMPLES_4 

    4 consecutives samples are averaged.

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    RM_OB1203_NUM_AVERAGED_SAMPLES_8 

    8 consecutives samples are averaged.

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    RM_OB1203_NUM_AVERAGED_SAMPLES_16 

    16 consecutives samples are averaged.

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    RM_OB1203_NUM_AVERAGED_SAMPLES_32 

    32 consecutives samples are averaged.

    -
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    ◆ rm_ob1203_light_resolution_meas_period_t

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    enum rm_ob1203_light_resolution_meas_period_t
    -
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    Light resolution and measurement period

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    Enumerator
    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_25MS 

    Resolution : 13bit, measurement period : 25ms.

    -
    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_50MS 

    Resolution : 13bit, measurement period : 50ms.

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    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_100MS 

    Resolution : 13bit, measurement period : 100ms.

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    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_200MS 

    Resolution : 13bit, measurement period : 200ms.

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    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_500MS 

    Resolution : 13bit, measurement period : 500ms.

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    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_1000MS 

    Resolution : 13bit, measurement period : 1000ms.

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    RM_OB1203_LIGHT_RESOLUTION_13BIT_PERIOD_2000MS 

    Resolution : 13bit, measurement period : 2000ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_25MS 

    Resolution : 16bit, measurement period : 25ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_50MS 

    Resolution : 16bit, measurement period : 50ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_100MS 

    Resolution : 16bit, measurement period : 100ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_200MS 

    Resolution : 16bit, measurement period : 200ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_500MS 

    Resolution : 16bit, measurement period : 500ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_1000MS 

    Resolution : 16bit, measurement period : 1000ms.

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    RM_OB1203_LIGHT_RESOLUTION_16BIT_PERIOD_2000MS 

    Resolution : 16bit, measurement period : 2000ms.

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    RM_OB1203_LIGHT_RESOLUTION_17BIT_PERIOD_50MS 

    Resolution : 17bit, measurement period : 50ms.

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    RM_OB1203_LIGHT_RESOLUTION_17BIT_PERIOD_100MS 

    Resolution : 17bit, measurement period : 100ms.

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    RM_OB1203_LIGHT_RESOLUTION_17BIT_PERIOD_200MS 

    Resolution : 17bit, measurement period : 200ms.

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    RM_OB1203_LIGHT_RESOLUTION_17BIT_PERIOD_500MS 

    Resolution : 17bit, measurement period : 500ms.

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    RM_OB1203_LIGHT_RESOLUTION_17BIT_PERIOD_1000MS 

    Resolution : 17bit, measurement period : 1000ms.

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    RM_OB1203_LIGHT_RESOLUTION_17BIT_PERIOD_2000MS 

    Resolution : 17bit, measurement period : 2000ms.

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    RM_OB1203_LIGHT_RESOLUTION_18BIT_PERIOD_100MS 

    Resolution : 18bit, measurement period : 100ms.

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    RM_OB1203_LIGHT_RESOLUTION_18BIT_PERIOD_200MS 

    Resolution : 18bit, measurement period : 200ms.

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    RM_OB1203_LIGHT_RESOLUTION_18BIT_PERIOD_500MS 

    Resolution : 18bit, measurement period : 500ms.

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    RM_OB1203_LIGHT_RESOLUTION_18BIT_PERIOD_1000MS 

    Resolution : 18bit, measurement period : 1000ms.

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    RM_OB1203_LIGHT_RESOLUTION_18BIT_PERIOD_2000MS 

    Resolution : 18bit, measurement period : 2000ms.

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    RM_OB1203_LIGHT_RESOLUTION_19BIT_PERIOD_200MS 

    Resolution : 19bit, measurement period : 200ms.

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    RM_OB1203_LIGHT_RESOLUTION_19BIT_PERIOD_500MS 

    Resolution : 19bit, measurement period : 500ms.

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    RM_OB1203_LIGHT_RESOLUTION_19BIT_PERIOD_1000MS 

    Resolution : 19bit, measurement period : 1000ms.

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    RM_OB1203_LIGHT_RESOLUTION_19BIT_PERIOD_2000MS 

    Resolution : 19bit, measurement period : 2000ms.

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    RM_OB1203_LIGHT_RESOLUTION_20BIT_PERIOD_500MS 

    Resolution : 20bit, measurement period : 500ms.

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    RM_OB1203_LIGHT_RESOLUTION_20BIT_PERIOD_1000MS 

    Resolution : 20bit, measurement period : 1000ms.

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    RM_OB1203_LIGHT_RESOLUTION_20BIT_PERIOD_2000MS 

    Resolution : 20bit, measurement period : 2000ms.

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    ◆ rm_ob1203_prox_pulse_width_meas_period_t

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    enum rm_ob1203_prox_pulse_width_meas_period_t
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    Proximity pulse width and measurement period

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    Enumerator
    RM_OB1203_PROX_WIDTH_26US_PERIOD_3P125MS 

    Pulse width : 26us, measurement period : 3.125ms. Except for the number 32 of LED pulses.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_6P25MS 

    Pulse width : 26us, measurement period : 6.25ms.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_12P5MS 

    Pulse width : 26us, measurement period : 12.5ms.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_25MS 

    Pulse width : 26us, measurement period : 25ms.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_50MS 

    Pulse width : 26us, measurement period : 50ms.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_100MS 

    Pulse width : 26us, measurement period : 100ms.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_200MS 

    Pulse width : 26us, measurement period : 200ms.

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    RM_OB1203_PROX_WIDTH_26US_PERIOD_400MS 

    Pulse width : 26us, measurement period : 400ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_3P125MS 

    Pulse width : 42us, measurement period : 3.125ms. Except for the number 32 of LED pulses.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_6P25MS 

    Pulse width : 42us, measurement period : 6.25ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_12P5MS 

    Pulse width : 42us, measurement period : 12.5ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_25MS 

    Pulse width : 42us, measurement period : 25ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_50MS 

    Pulse width : 42us, measurement period : 50ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_100MS 

    Pulse width : 42us, measurement period : 100ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_200MS 

    Pulse width : 42us, measurement period : 200ms.

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    RM_OB1203_PROX_WIDTH_42US_PERIOD_400MS 

    Pulse width : 42us, measurement period : 400ms.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_3P125MS 

    Pulse width : 71us, measurement period : 3.125ms. Except for the number 16 and 32 of LED pulses.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_6P25MS 

    Pulse width : 71us, measurement period : 6.25ms. Except for the number 32 of LED pulses.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_12P5MS 

    Pulse width : 71us, measurement period : 12.5ms.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_25MS 

    Pulse width : 71us, measurement period : 25ms.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_50MS 

    Pulse width : 71us, measurement period : 50ms.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_100MS 

    Pulse width : 71us, measurement period : 100ms.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_200MS 

    Pulse width : 71us, measurement period : 200ms.

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    RM_OB1203_PROX_WIDTH_71US_PERIOD_400MS 

    Pulse width : 71us, measurement period : 400ms.

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    ◆ rm_ob1203_ppg_pulse_width_meas_period_t

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    enum rm_ob1203_ppg_pulse_width_meas_period_t
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    PPG pulse width and measurement period

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    Enumerator
    RM_OB1203_PPG_WIDTH_130US_PERIOD_0P3125MS 

    Pulse width : 130us, measurement period : 0.3125ms. PPG1 mode only.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_0P625MS 

    Pulse width : 130us, measurement period : 0.625ms.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_1MS 

    Pulse width : 130us, measurement period : 1ms.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_1P25MS 

    Pulse width : 130us, measurement period : 1.25ms.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_2P5MS 

    Pulse width : 130us, measurement period : 2.5ms.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_5MS 

    Pulse width : 130us, measurement period : 5ms.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_10MS 

    Pulse width : 130us, measurement period : 10ms.

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    RM_OB1203_PPG_WIDTH_130US_PERIOD_20MS 

    Pulse width : 130us, measurement period : 20ms.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_0P625MS 

    Pulse width : 247us, measurement period : 0.625ms. PPG1 mode only.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_1MS 

    Pulse width : 247us, measurement period : 1ms.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_1P25MS 

    Pulse width : 247us, measurement period : 1.25ms.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_2P5MS 

    Pulse width : 247us, measurement period : 2.5ms.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_5MS 

    Pulse width : 247us, measurement period : 5ms.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_10MS 

    Pulse width : 247us, measurement period : 10ms.

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    RM_OB1203_PPG_WIDTH_247US_PERIOD_20MS 

    Pulse width : 247us, measurement period : 20ms.

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    RM_OB1203_PPG_WIDTH_481US_PERIOD_1MS 

    Pulse width : 481us, measurement period : 1ms. PPG1 mode only.

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    RM_OB1203_PPG_WIDTH_481US_PERIOD_1P25MS 

    Pulse width : 481us, measurement period : 1.25ms. PPG1 mode only.

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    RM_OB1203_PPG_WIDTH_481US_PERIOD_2P5MS 

    Pulse width : 481us, measurement period : 2.5ms.

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    RM_OB1203_PPG_WIDTH_481US_PERIOD_5MS 

    Pulse width : 481us, measurement period : 5ms.

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    RM_OB1203_PPG_WIDTH_481US_PERIOD_10MS 

    Pulse width : 481us, measurement period : 10ms.

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    RM_OB1203_PPG_WIDTH_481US_PERIOD_20MS 

    Pulse width : 481us, measurement period : 20ms.

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    RM_OB1203_PPG_WIDTH_949US_PERIOD_2P5MS 

    Pulse width : 949us, measurement period : 2.5ms. PPG1 mode only.

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    RM_OB1203_PPG_WIDTH_949US_PERIOD_5MS 

    Pulse width : 949us, measurement period : 5ms.

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    RM_OB1203_PPG_WIDTH_949US_PERIOD_10MS 

    Pulse width : 949us, measurement period : 10ms.

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    RM_OB1203_PPG_WIDTH_949US_PERIOD_20MS 

    Pulse width : 949us, measurement period : 20ms.

    -
    - -
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    ◆ rm_ob1203_fifo_rollover_t

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    enum rm_ob1203_fifo_rollover_t
    -
    -

    FIFO Rollover

    - - - -
    Enumerator
    RM_OB1203_FIFO_ROLLOVER_DISABLE 

    In the event of a full FIFO, no more samples of PPG data are written into the FIFO; the samples from new measurements are lost.

    -
    RM_OB1203_FIFO_ROLLOVER_ENABLE 

    New PPG data will always be written to the FIFO, and the FIFO Write Pointer is incremented (rollover). If the FIFO is full, old data will be overwritten. The FIFO Overflow Counter counts the number of lost (overwritten) and respectively the number of new samples. The FIFO Read Pointer remains unchanged.

    -
    - -
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[ "RM_OB1203_FIFO_ROLLOVER_ENABLE", "group___r_m___o_b1203___a_p_i.html#gga41b9839d52cdeaa01260dc24932d6fe3a2673055a75c804ebb0186e805471c07b", null ] - ] ] -]; \ No newline at end of file diff --git a/group___r_m___z_m_o_d4_x_x_x.html b/group___r_m___z_m_o_d4_x_x_x.html index e810c71..ad1ac46 100644 --- a/group___r_m___z_m_o_d4_x_x_x.html +++ b/group___r_m___z_m_o_d4_x_x_x.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: ZMOD4XXX Gas Sensor (rm_zmod4xxx) +RZV Flexible Software Package Documentation: ZMOD4XXX Gas Sensor (rm_zmod4xxx) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    ZMOD4XXX Gas Sensor (rm_zmod4xxx)
    Modules
    +
    ZMOD4XXX Gas Sensor (rm_zmod4xxx)
    Modules » Sensor
    @@ -278,7 +346,7 @@

    Examples

    Basic Example

    These are basic examples of minimal use of ZMOD4XXX sensor implementation in an application.

    -

    IAQ 1st Gen. Continuous mode

    void rm_zmod4xxx_iaq_1st_gen_continuous_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_1st_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    while (1)
    {
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Iaq1stGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }

    IAQ 1st Gen. Low Power mode

    void rm_zmod4xxx_iaq_1st_gen_low_power_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_1st_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Iaq1stGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Delay required time. See Table 3 in the ZMOD4410 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_5475_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    IAQ 2nd Gen.

    void rm_zmod4xxx_iaq_2nd_gen_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_2nd_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if ((RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event) ||
    (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event))
    {
    /* Error during read of sensor status. Please reset device. */
    while (1)
    {
    ;
    }
    }
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Iaq2ndGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Delay required time. See Table 3 in the ZMOD4410 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_1990_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    IAQ 2nd Gen. ULP

    void rm_zmod4xxx_iaq_2nd_gen_ulp_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_2nd_data_t zmod4410_data;
    float temperature = ZMOD4XXX_DEFAULT_TEMPERATURE_20F;
    float humidity = ZMOD4XXX_DEFAULT_HUMIDITY_50F;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    /* First delay. See Table 4 in the ZMOD4410 Programming Manual. It should be longer than 1010 ms. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_1010_MS, BSP_DELAY_UNITS_MILLISECONDS);
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if ((RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event) ||
    (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event))
    {
    /* Error during read of sensor status or Measurement not completed due to unexpected reset. Please reset device. */
    while (1)
    {
    ;
    }
    }
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if ((RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event) ||
    (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event))
    {
    /* Check validness of ADC results:
    * - RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET : Unvalid ADC results due to an unexpected reset.
    * - RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT: Unvalid ADC results due a still running measurement while results readout.
    *//* Please reset device. */
    while (1)
    {
    ;
    }
    }
    /* Set the current temperature and humidity */
    err = RM_ZMOD4XXX_TemperatureAndHumiditySet(&g_zmod4xxx_ctrl, temperature, humidity);
    handle_error(err);
    err = RM_ZMOD4XXX_Iaq2ndGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Second delay. See Table 4 in the ZMOD4410 Programming Manual. The sum of the first and second delay should amount 90 seconds. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_90000_MS - ZMOD4XXX_WAIT_1010_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    Odor

    void rm_zmod4xxx_odor_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_odor_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    while (1)
    {
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_OdorDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }

    Sulfur Odor

    void rm_zmod4xxx_sulfur_odor_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_sulfur_odor_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_SulfurOdorDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Delay required time. See Table 6 in the ZMOD4410 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_1990_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    OAQ 1st Gen.

    void rm_zmod4xxx_oaq_1st_gen_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_oaq_1st_data_t zmod4510_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Oaq1stGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4510_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4510_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }

    OAQ 2nd Gen.

    void rm_zmod4xxx_oaq_2nd_gen_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_oaq_2nd_data_t zmod4510_data;
    float temperature = ZMOD4XXX_DEFAULT_TEMPERATURE_20F;
    float humidity = ZMOD4XXX_DEFAULT_HUMIDITY_50F;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    /* Delay required time. See Table 4 in the ZMOD4510 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_2000_MS, BSP_DELAY_UNITS_MILLISECONDS);
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if (RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event)
    {
    /* Error during read of sensor status or Measurement not completed due to unexpected reset. Please reset device. */
    while (1)
    {
    ;
    }
    }
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event)
    {
    /* Check validness of ADC results:
    * - RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT: Unvalid ADC results due a still running measurement while results readout.
    *//* Please reset device. */
    while (1)
    {
    ;
    }
    }
    /* Set the current temperature and humidity */
    err = RM_ZMOD4XXX_TemperatureAndHumiditySet(&g_zmod4xxx_ctrl, temperature, humidity);
    handle_error(err);
    err = RM_ZMOD4XXX_Oaq2ndGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4510_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4510_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }
    +

    IAQ 1st Gen. Continuous mode

    void rm_zmod4xxx_iaq_1st_gen_continuous_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_1st_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    while (1)
    {
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Iaq1stGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }

    IAQ 1st Gen. Low Power mode

    void rm_zmod4xxx_iaq_1st_gen_low_power_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_1st_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Iaq1stGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Delay required time. See Table 3 in the ZMOD4410 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_5475_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    IAQ 2nd Gen.

    void rm_zmod4xxx_iaq_2nd_gen_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_2nd_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if ((RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event) ||
    (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event))
    {
    /* Error during read of sensor status. Please reset device. */
    while (1)
    {
    ;
    }
    }
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Iaq2ndGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Delay required time. See Table 3 in the ZMOD4410 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_1990_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    IAQ 2nd Gen. ULP

    void rm_zmod4xxx_iaq_2nd_gen_ulp_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_iaq_2nd_data_t zmod4410_data;
    float temperature = ZMOD4XXX_DEFAULT_TEMPERATURE_20F;
    float humidity = ZMOD4XXX_DEFAULT_HUMIDITY_50F;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    /* First delay. See Table 4 in the ZMOD4410 Programming Manual. It should be longer than 1010 ms. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_1010_MS, BSP_DELAY_UNITS_MILLISECONDS);
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if ((RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event) ||
    (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event))
    {
    /* Error during read of sensor status or Measurement not completed due to unexpected reset. Please reset device. */
    while (1)
    {
    ;
    }
    }
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if ((RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event) ||
    (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event))
    {
    /* Check validness of ADC results:
    * - RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET : Unvalid ADC results due to an unexpected reset.
    * - RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT: Unvalid ADC results due a still running measurement while results readout.
    *//* Please reset device. */
    while (1)
    {
    ;
    }
    }
    /* Set the current temperature and humidity */
    err = RM_ZMOD4XXX_TemperatureAndHumiditySet(&g_zmod4xxx_ctrl, temperature, humidity);
    handle_error(err);
    err = RM_ZMOD4XXX_Iaq2ndGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Second delay. See Table 4 in the ZMOD4410 Programming Manual. The sum of the first and second delay should amount 90 seconds. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_90000_MS - ZMOD4XXX_WAIT_1010_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    Odor

    void rm_zmod4xxx_odor_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_odor_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    while (1)
    {
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_OdorDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }

    Sulfur Odor

    void rm_zmod4xxx_sulfur_odor_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_sulfur_odor_data_t zmod4410_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_SulfurOdorDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4410_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4410_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    /* Delay required time. See Table 6 in the ZMOD4410 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_1990_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    }

    OAQ 1st Gen.

    void rm_zmod4xxx_oaq_1st_gen_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_oaq_1st_data_t zmod4510_data;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_Oaq1stGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4510_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4510_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }

    OAQ 2nd Gen.

    void rm_zmod4xxx_oaq_2nd_gen_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    rm_zmod4xxx_raw_data_t raw_data;
    rm_zmod4xxx_oaq_2nd_data_t zmod4510_data;
    float temperature = ZMOD4XXX_DEFAULT_TEMPERATURE_20F;
    float humidity = ZMOD4XXX_DEFAULT_HUMIDITY_50F;
    /* Open the I2C bus if it is not already open. */
    rm_comms_i2c_bus_extended_cfg_t * p_extend =
    (rm_comms_i2c_bus_extended_cfg_t *) g_zmod4xxx_cfg.p_comms_instance->p_cfg->p_extend;
    i2c_master_instance_t * p_driver_instance = (i2c_master_instance_t *) p_extend->p_driver_instance;
    p_driver_instance->p_api->open(p_driver_instance->p_ctrl, p_driver_instance->p_cfg);
    #if BSP_CFG_RTOS
    /* Create a semaphore for blocking if a semaphore is not NULL */
    if (NULL != p_extend->p_blocking_semaphore)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_semaphore_create(p_extend->p_blocking_semaphore->p_semaphore_handle,
    p_extend->p_blocking_semaphore->p_semaphore_name,
    (ULONG) 0);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_blocking_semaphore->p_semaphore_handle) =
    xSemaphoreCreateCountingStatic((UBaseType_t) 1,
    (UBaseType_t) 0,
    p_extend->p_blocking_semaphore->p_semaphore_memory);
    #endif
    }
    /* Create a recursive mutex for bus lock if a recursive mutex is not NULL */
    if (NULL != p_extend->p_bus_recursive_mutex)
    {
    #if BSP_CFG_RTOS == 1 // AzureOS
    tx_mutex_create(p_extend->p_bus_recursive_mutex->p_mutex_handle,
    p_extend->p_bus_recursive_mutex->p_mutex_name,
    TX_INHERIT);
    #elif BSP_CFG_RTOS == 2 // FreeRTOS
    *(p_extend->p_bus_recursive_mutex->p_mutex_handle) =
    xSemaphoreCreateRecursiveMutexStatic(p_extend->p_bus_recursive_mutex->p_mutex_memory);
    #endif
    }
    #endif
    /* Reset ZMOD sensor (active low). Please change to the IO port connected to the RES_N pin of the ZMOD sensor on the customer board. */
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_LOW);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    R_IOPORT_PinWrite(&g_ioport_ctrl, BSP_IO_PORT_48_PIN_00, BSP_IO_LEVEL_HIGH);
    R_BSP_SoftwareDelay(10, BSP_DELAY_UNITS_MILLISECONDS);
    err = RM_ZMOD4XXX_Open(&g_zmod4xxx_ctrl, &g_zmod4xxx_cfg);
    /* Handle any errors. This function should be defined by the user. */
    handle_error(err);
    while (1)
    {
    #if ZMOD4XXX_IRQ_ENABLE
    g_zmod4xxx_irq_callback_flag = 0;
    #endif
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_MeasurementStart(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    /* Delay required time. See Table 4 in the ZMOD4510 Programming Manual. */
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_2000_MS, BSP_DELAY_UNITS_MILLISECONDS);
    g_zmod4xxx_i2c_callback_flag = 0;
    do
    {
    #if ZMOD4XXX_IRQ_ENABLE
    while (0U == g_zmod4xxx_irq_callback_flag)
    {
    }
    g_zmod4xxx_irq_callback_flag = 0;
    #else
    err = RM_ZMOD4XXX_StatusCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    #endif
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if (RM_ZMOD4XXX_EVENT_DEV_ERR_POWER_ON_RESET == g_zmod4xxx_i2c_callback_event)
    {
    /* Error during read of sensor status or Measurement not completed due to unexpected reset. Please reset device. */
    while (1)
    {
    ;
    }
    }
    err = RM_ZMOD4XXX_Read(&g_zmod4xxx_ctrl, &raw_data);
    if (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED)
    {
    R_BSP_SoftwareDelay(ZMOD4XXX_WAIT_50_MS, BSP_DELAY_UNITS_MILLISECONDS);
    }
    } while (err == FSP_ERR_SENSOR_MEASUREMENT_NOT_FINISHED);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    err = RM_ZMOD4XXX_DeviceErrorCheck(&g_zmod4xxx_ctrl);
    handle_error(err);
    while (0U == g_zmod4xxx_i2c_callback_flag)
    {
    }
    g_zmod4xxx_i2c_callback_flag = 0;
    if (RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT == g_zmod4xxx_i2c_callback_event)
    {
    /* Check validness of ADC results:
    * - RM_ZMOD4XXX_EVENT_DEV_ERR_ACCESS_CONFLICT: Unvalid ADC results due a still running measurement while results readout.
    *//* Please reset device. */
    while (1)
    {
    ;
    }
    }
    /* Set the current temperature and humidity */
    err = RM_ZMOD4XXX_TemperatureAndHumiditySet(&g_zmod4xxx_ctrl, temperature, humidity);
    handle_error(err);
    err = RM_ZMOD4XXX_Oaq2ndGenDataCalculate(&g_zmod4xxx_ctrl, &raw_data, &zmod4510_data);
    if (FSP_SUCCESS == err)
    {
    /* Describe the process by referring to zmod4510_data */
    }
    else if (FSP_ERR_SENSOR_IN_STABILIZATION == err)
    {
    /* Gas data is invalid. */
    }
    else
    {
    handle_error(err);
    }
    }
    }
    @@ -1013,7 +1081,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___r_m___z_m_o_d4_x_x_x___a_p_i.html b/group___r_m___z_m_o_d4_x_x_x___a_p_i.html index ab60317..95f7b8d 100644 --- a/group___r_m___z_m_o_d4_x_x_x___a_p_i.html +++ b/group___r_m___z_m_o_d4_x_x_x___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: ZMOD4XXX Middleware Interface +RZV Flexible Software Package Documentation: ZMOD4XXX Middleware Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -1029,7 +1097,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_s_p_i.html b/group___r_s_p_i.html index 8bce35b..07f4be1 100644 --- a/group___r_s_p_i.html +++ b/group___r_s_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Renesas Serial Peripheral Interface (r_rspi) +RZV Flexible Software Package Documentation: Renesas Serial Peripheral Interface (r_rspi) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@
    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    Renesas Serial Peripheral Interface (r_rspi)
    Modules
    +
    Renesas Serial Peripheral Interface (r_rspi)
    Modules » Connectivity

    Data Structures

    struct  rm_zmod4xxx_init_process_params_t
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    @@ -169,16 +237,18 @@

    Disabled

    + +
    Default (BSP) If selected code for parameter checking is included in the build.
    DMAC SupportMCU Specific OptionsIf enabled, DMAC instances will be included in the build for both transmission and reception.
    -

    Configurations for Driver > Connectivity > SPI Driver on r_rspi

    -This module can be added to the Stacks tab via New Stack > Driver > Connectivity > SPI Driver on r_rspi.
    +

    Configurations for Connectivity > SPI (r_rspi)

    +This module can be added to the Stacks tab via New Stack > Connectivity > SPI (r_rspi).

    - + + + + + + + @@ -343,10 +425,10 @@

    Configurations for Driver > Connectivity > SPI Driver on r_rspi

    Clock Configuration

    -

    The clock for this module is derived from the following peripheral clock for each MPU group:
    +

    The clock for this module is derived from the following peripheral clock for each MCU group:

    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_spi0 Module name.
    General > ChannelSelect between channel 0 and 20 Select the RSPI channel.
    General > ChannelChannel number must be a positive integer0 Select the RSPI channel.
    General > Operating Mode
    • @@ -300,6 +370,14 @@

      Configurations for Driver > Connectivity > SPI Driver on r_rspi

    		RSPI_DELAY_COUNT_1 Configure the number of RSPI clock cycles between each data frame.
    Extra > SSL Level Keep
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Select whether to negate the SSL level for each frame transfer.
    Extra > Receiver FIFO Trigger Level
    • 1
      • @@ -334,8 +412,12 @@

      Configurations for Driver > Connectivity > SPI Driver on r_rspi

    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
    Interrupts > Receive Interrupt EnableMCU Specific OptionsEnable the receive interrupt.
    Interrupts > Receive Interrupt PriorityValue must be an integer between 0 and 2558 Select the interrupt priority for all RSPI interrupts.
    Interrupts > Transmit Buffer Empty Interrupt EnableMCU Specific OptionsEnable the transmit buffer empty interrupt.
    Interrupts > Transmit Buffer Empty Interrupt PriorityValue must be an integer between 0 and 2558 Select the interrupt priority for all RSPI interrupts.
    Interrupts > Error Interrupt PriorityValue must be an integer between 0 and 2558 Select the interrupt priority for all RSPI interrupts.
    - +
    MPU GroupPeripheral Clock
    MCU GroupPeripheral Clock
    RZV2LP0CLK
    @@ -399,6 +481,8 @@

    Basic Example

      enum  rspi_mosi_idle_value_fixing_t   +enum  rspi_ssl_level_keep_t +  enum  rspi_delay_count_t   enum  rspi_tx_trigger_level_t @@ -488,6 +572,12 @@

    SPI Next-Access Delay Register Setting. +rspi_ssl_level_keep_t + +ssl_level_keep + +Select SSL signal level keep mode. + rspi_rx_trigger_level_t rx_trigger_level @@ -608,6 +698,27 @@

    +

    ◆ rspi_ssl_level_keep_t

    + +
    +
    + + + + +
    enum rspi_ssl_level_keep_t
    +
    +

    SSL Signal Level Keeping Enable/Disable.

    + + + +
    Enumerator
    RSPI_SSL_LEVEL_KEEP_DISABLE 

    Disable SSL Level Keep Mode.

    +
    RSPI_SSL_LEVEL_KEEP_ENABLE 

    Enable SSL Level Keep Mode.

    +
    +
    @@ -795,6 +906,7 @@

    FSP_ERR_ASSERTIONNULL pointer to control or destination parameters or transfer length is zero. FSP_ERR_NOT_OPENThe channel has not been opened. Open channel first. FSP_ERR_IN_USEA transfer is already in progress. + FSP_ERR_INVALID_ARGUMENTA bit length not supported by this device was assigned to the argument. @@ -849,6 +961,7 @@

    FSP_ERR_ASSERTIONNULL pointer to control or source parameters or transfer length is zero. FSP_ERR_NOT_OPENThe channel has not been opened. Open the channel first. FSP_ERR_IN_USEA transfer is already in progress. + FSP_ERR_INVALID_ARGUMENTA bit length not supported by this device was assigned to the argument. @@ -909,6 +1022,7 @@

    FSP_ERR_ASSERTIONNULL pointer to control, source or destination parameters or transfer length is zero. FSP_ERR_NOT_OPENThe channel has not been opened. Open the channel first. FSP_ERR_IN_USEA transfer is already in progress. + FSP_ERR_INVALID_ARGUMENTA bit length not supported by this device was assigned to the argument. @@ -972,18 +1086,18 @@

    -

    Calculates the SPBR register value and the BRDV bits for a desired bitrate. If the desired bitrate is faster than the maximum bitrate, than the bitrate is set to the maximum bitrate. If the desired bitrate is slower than the minimum bitrate, than an error is returned.

    +

    Calculates the SPBR register value and the BRDV bits for a desired bitrate. Calculates the SPBR register value and the BRDV bits for a desired bitrate. If the desired bitrate is faster than the maximum bitrate, then the bitrate is set to the maximum bitrate and an error is returned. If the desired bitrate is slower than the minimum bitrate, then an error is returned.

    Parameters
    - +
    [in]bitrateDesired bitrate
    [in]bitrateDesired bitrate.
    [out]spck_divMemory location to store bitrate register settings.
    Return values
    - - + +
    FSP_SUCCESSValid spbr and brdv values were calculated
    FSP_ERR_UNSUPPORTEDBitrate is not achievable
    FSP_SUCCESSValid spbr and brdv values were calculated.
    FSP_ERR_UNSUPPORTEDBitrate is out of the settable range.
    @@ -1046,7 +1160,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___r_s_p_i.js b/group___r_s_p_i.js index 2c67f16..f7cb758 100644 --- a/group___r_s_p_i.js +++ b/group___r_s_p_i.js @@ -11,6 +11,7 @@ var group___r_s_p_i = [ "spck_delay", "group___r_s_p_i.html#a0cbb7690023ca0e3a82dd9acf79e34f3", null ], [ "ssl_negation_delay", "group___r_s_p_i.html#ace6d2dd7ac73c2171a7c2f0edb11db22", null ], [ "next_access_delay", "group___r_s_p_i.html#a4a5671a7b1a0b31742f3fb3ffb832532", null ], + [ "ssl_level_keep", "group___r_s_p_i.html#ae3192998dbe33aee6614dd5f5850d289", null ], [ "rx_trigger_level", "group___r_s_p_i.html#a4d6543f22a352c931855cd85e19cfe45", null ], [ "tx_trigger_level", "group___r_s_p_i.html#ac9029124a35943dc5f347657d28d3c16", null ] ] ], @@ -36,6 +37,10 @@ var group___r_s_p_i = [ "RSPI_MOSI_IDLE_VALUE_FIXING_LOW", "group___r_s_p_i.html#ggae3deb1d097bc300a5ed42849ebb200c6a2a42bca9fb7a5f485d0c21c70d83c6bc", null ], [ "RSPI_MOSI_IDLE_VALUE_FIXING_HIGH", "group___r_s_p_i.html#ggae3deb1d097bc300a5ed42849ebb200c6a334fbae8188c8d89825231b5126c432d", null ] ] ], + [ "rspi_ssl_level_keep_t", "group___r_s_p_i.html#gaae19ba80f9290f4ad12e794cf1bac9f2", [ + [ "RSPI_SSL_LEVEL_KEEP_DISABLE", "group___r_s_p_i.html#ggaae19ba80f9290f4ad12e794cf1bac9f2ab841c4b6e56bf3a45f323d77f93b2d03", null ], + [ "RSPI_SSL_LEVEL_KEEP_ENABLE", "group___r_s_p_i.html#ggaae19ba80f9290f4ad12e794cf1bac9f2aabdf42d404217b46fab49e661dc6f128", null ] + ] ], [ "rspi_delay_count_t", "group___r_s_p_i.html#ga8f68c8c6c98ee871ad72bbb94c559775", [ [ "RSPI_DELAY_COUNT_1", "group___r_s_p_i.html#gga8f68c8c6c98ee871ad72bbb94c559775acf6c2af3c3fd7da891cd64c6ac082ed7", null ], [ "RSPI_DELAY_COUNT_2", "group___r_s_p_i.html#gga8f68c8c6c98ee871ad72bbb94c559775a113a034f110841c3f8fb0c726238c7ea", null ], diff --git a/group___r_t_c.html b/group___r_t_c.html new file mode 100644 index 0000000..6a0e52e --- /dev/null +++ b/group___r_t_c.html @@ -0,0 +1,867 @@ + + + + + + + +RZV Flexible Software Package Documentation: Realtime Clock (r_rtc) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Enumerations
    +
    +
    Realtime Clock (r_rtc)
    Modules » Timers
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_RTC_Open (rtc_ctrl_t *const p_ctrl, rtc_cfg_t const *const p_cfg)
     
    fsp_err_t R_RTC_Close (rtc_ctrl_t *const p_ctrl)
     
    fsp_err_t R_RTC_ClockSourceSet (rtc_ctrl_t *const p_ctrl)
     
    fsp_err_t R_RTC_CalendarTimeSet (rtc_ctrl_t *const p_ctrl, rtc_time_t *const p_time)
     
    fsp_err_t R_RTC_CalendarTimeGet (rtc_ctrl_t *const p_ctrl, rtc_time_t *const p_time)
     
    fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t *const p_ctrl, rtc_alarm_time_t *const p_alarm)
     
    fsp_err_t R_RTC_CalendarAlarmGet (rtc_ctrl_t *const p_ctrl, rtc_alarm_time_t *const p_alarm)
     
    fsp_err_t R_RTC_PeriodicIrqRateSet (rtc_ctrl_t *const p_ctrl, rtc_periodic_irq_select_t const rate)
     
    fsp_err_t R_RTC_ErrorAdjustmentSet (rtc_ctrl_t *const p_ctrl, rtc_error_adjustment_cfg_t const *const err_adj_cfg)
     
    fsp_err_t R_RTC_InfoGet (rtc_ctrl_t *const p_ctrl, rtc_info_t *const p_rtc_info)
     
    fsp_err_t R_RTC_CallbackSet (rtc_ctrl_t *const p_ctrl, void(*p_callback)(rtc_callback_args_t *), void const *const p_context, rtc_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the RTC peripheral on RZ MPUs. This module implements the RTC Interface.

    +

    +Overview

    +

    The RTC HAL module configures the RTC module and controls clock, calendar and alarm functions. A callback can be used to respond to the alarm and periodic interrupt.

    +

    +Features

    +
      +
    • RTC time and date get and set.
      • +
    • RTC time and date alarm get and set.
      • +
    • RTC alarm and periodic event notification.
      • +
    +

    The RTC HAL module supports three different interrupt types:

    +
      +
    • An alarm interrupt generated on a match of any combination of year, month, day, day of the week, hour, minute or second
      • +
    • A periodic interrupt generated every 2, 1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64, or 1/128 second(s)
      • +
    • A carry interrupt is used internally when reading time from the RTC calender to get accurant time readings.
      Note
      See section "Reading 64-Hz Counter and Time" of the User's Manual for more details.
      +
      +A user-defined callback function can be registered (in the rtc_api_t::open API call) and will be called from the interrupt service routine (ISR) for alarm and periodic interrupt. When called, it is passed a pointer to a structure (rtc_callback_args_t) that holds a user-defined context pointer and an indication of which type of interrupt was fired.
      • +
    +

    Date and Time validation

    +

    "Parameter Checking" needs to be enabled if date and time validation is required for calendarTimeSet and calendarAlarmSet APIs. If "Parameter Checking" is enabled, the 'day of the week' field is automatically calculated and updated by the driver for the provided date. When using the calendarAlarmSet API, only the fields which have their corresponding match flag set are written to the registers. Other register fields are reset to default value.

    +

    Clock error adjustment (Time Error Adjustment Function)

    +

    The time error adjustment function is used to correct errors, running fast or slow, in the time caused by variation in the precision of oscillation by the clock oscillator. Because 32,768 cycles of the clock oscillator constitute 1 second of operation when the clock oscillator is selected, the clock runs fast if the clock frequency is high and slow if the clock frequency is low. The time error adjustment functions include:

      +
    • Automatic adjustment
      • +
    • Adjustment by software
      • +
    +

    The error adjustment is reset every time RTC is reconfigured or time is set.

    +
    Note
    RTC driver configurations do not do error adjustment internally while initiliazing the driver. Application must make calls to the error adjustment api's for desired adjustment. See section "Time Error Adjustment + Function" of the User's Manual for more details on this feature
    +

    External Clock Bypass Mode

    +

    This MPU supports bypassing the RTC's oscillator circuit, which typically requires an AC clock signal from a crystal oscillator. However, a DC clock signal can be directly input via the RTXIN pin. Therefore the clock mode for the RTC can be changed as the follows:

      +
    • Crystal Oscillator Mode
      • +
    • External Clock Bypass Mode
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_rtc

    +The following build time configurations are defined in fsp_cfg/r_rtc_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Timers > Realtime Clock (r_rtc)

    +This module can be added to the Stacks tab via New Stack > Timers > Realtime Clock (r_rtc). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_rtc0 Module name.
    External Clock Bypass Mode
      +
    • +Crystal Oscillator
      • +
    • +External Clock Bypass
      • +
    +    		Crystal Oscillator Receive the clock from either a crystal oscillator or directly from a clock source by inputting it to the RTXIN pin only.
    Automatic Adjustment Mode
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled Enable/ Disable the Error Adjustment mode
    Automatic Adjustment Period
      +
    • +10 Seconds
      • +
    • +1 Minute
      • +
    • +NONE
      • +
    +    		10 Seconds Select the Error Adjustment Period for Automatic Adjustment
    Adjustment Type (Plus-Minus)
      +
    • +NONE
      • +
    • +Addition
      • +
    • +Subtraction
      • +
    +    		NONE Select the Error Adjustment type
    Error Adjustment ValueValue must be a positive integer less than equal to 630 Specify the Adjustment Value (the number of sub-clock cycles) from the prescaler
    CallbackName must be a valid C symbolNULL A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
    Alarm InterruptMCU Specific OptionsEnable the Alarm interrupt.
    Alarm Interrupt PriorityValue must be a non-negative integer12 Select the alarm interrupt priority.
    Period InterruptMCU Specific OptionsEnable the Periodic interrupt.
    Period Interrupt PriorityValue must be a non-negative integer12 Select the period interrupt priority.
    Carry Interrupt PriorityValue must be a non-negative integer12 Select the carry interrupt priority.
    +

    +

    +Interrupt Configuration

    +

    To activate interrupts for the RTC module, the desired interrupts must be enabled, The underlying implementation will be expected to handle any interrupts it can support and notify higher layers via callback.

    +

    +Pin Configuration

    +

    This module does not use I/O pins.

    +

    +Usage Notes

    +

    System Initialization

    +
      +
    • RTC driver does not start the clock. The application is responsible for ensuring required clocks are started and stable before accessing MCU peripheral registers.
      • +
    +
    Warning
    The 32,768Hz clock oscillator can take seconds to stabilize. The RZ startup code does not wait for the clock oscillator stabilization unless it is the main clock source. The application must ensure the clock oscillator is stable before starting operation.
    +
      +
    • Carry interrupt priority must be set to avoid incorrect time returned from calendarTimeGet API during roll-over.
      • +
    • Even when only running in Periodic Interrupt mode R_RTC_CalendarTimeSet must be called successfully to start the RTC.
      • +
    +

    +Limitations

    +

    Developers should be aware of the following limitations when using the RTC:

      +
    • R_RTC operates in 24-hour mode.
      • +
    • Binary-count mode is not supported.
      • +
    • The R_RTC_CalendarTimeGet() cannot be used from an interrupt that has higher priority than the carry interrupt. Also, it must not be called with interrupts disabled globally, as this API internally uses carry interrupt for its processing. API may return incorrect time if this is done.
      • +
    +

    +Examples

    +

    RTC Basic Example

    +

    This is a basic example of minimal use of the RTC in an application.

    +
    /* rtc_time_t is an alias for the C Standard time.h struct 'tm' */
    rtc_time_t set_time =
    {
    .tm_sec = 10,
    .tm_min = 11,
    .tm_hour = 12,
    .tm_mday = 6,
    .tm_wday = 3,
    .tm_mon = 11,
    .tm_year = YEARS_SINCE_1900,
    };
    rtc_time_t get_time;
    void rtc_example ()
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Open the RTC module */
    err = R_RTC_Open(&g_rtc0_ctrl, &g_rtc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Set the calendar time */
    R_RTC_CalendarTimeSet(&g_rtc0_ctrl, &set_time);
    /* Get the calendar time */
    R_RTC_CalendarTimeGet(&g_rtc0_ctrl, &get_time);
    }

    RTC Periodic interrupt example

    +

    This is an example of periodic interrupt in RTC.

    +
    void rtc_periodic_irq_example ()
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Open the RTC module*/
    err = R_RTC_Open(&g_rtc0_ctrl, &g_rtc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* R_RTC_CalendarTimeSet must be called at least once to start the RTC */
    R_RTC_CalendarTimeSet(&g_rtc0_ctrl, &set_time);
    /* Set the periodic interrupt rate to 1 second */
    R_RTC_PeriodicIrqRateSet(&g_rtc0_ctrl, RTC_PERIODIC_IRQ_SELECT_1_SECOND);
    /* Wait for the periodic interrupt */
    while (1)
    {
    /* Wait for interrupt */
    }
    }

    RTC Alarm interrupt example

    +

    This is an example of alarm interrupt in RTC.

    +
    void rtc_alarm_irq_example ()
    {
    fsp_err_t err = FSP_SUCCESS;
    /*Open the RTC module*/
    err = R_RTC_Open(&g_rtc0_ctrl, &g_rtc0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    R_RTC_CalendarTimeSet(&g_rtc0_ctrl, &set_time1.time);
    R_RTC_CalendarAlarmSet(&g_rtc0_ctrl, &set_time1);
    /* Wait for the Alarm interrupt */
    while (1)
    {
    /* Wait for interrupt */
    }
    }

    RTC Error Adjustment example

    +

    This is an example of modifying error adjustment in RTC.

    +
    void rtc_erroradj_example ()
    {
    fsp_err_t err = FSP_SUCCESS;
    /*Open the RTC module*/
    R_RTC_Open(&g_rtc0_ctrl, &g_rtc1_cfg);
    R_RTC_CalendarTimeSet(&g_rtc0_ctrl, &set_time1.time);
    /* Modify Error Adjustment after RTC is running */
    err = R_RTC_ErrorAdjustmentSet(&g_rtc0_ctrl, &err_cfg2);
    assert(FSP_SUCCESS == err);
    }
    + + + + + +

    +Data Structures

    struct  rtc_extended_cfg_t
     
    struct  rtc_instance_ctrl_t
     
    + + + +

    +Enumerations

    enum  rtc_clock_bypass_mode_t
     
    +

    Data Structure Documentation

    + +

    ◆ rtc_extended_cfg_t

    + +
    +
    + + + + +
    struct rtc_extended_cfg_t
    +
    +

    RTC extend configuration

    +
    + + + + + + + + + + +
    Data Fields
    +uint8_t +alarm1_ipl +Alarm 1 interrupt priority.
    +IRQn_Type +alarm1_irq +Alarm 1 interrupt vector.
    +rtc_clock_bypass_mode_t +clock_bypass_mode +Clock Bypass Mode.
    + +
    +
    + +

    ◆ rtc_instance_ctrl_t

    + +
    +
    + + + + +
    struct rtc_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when rtc_api_t::open is called

    +
    + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Whether or not driver is open.
     
    +const rtc_cfg_t * p_cfg
     Pointer to initial configurations.
     
    +volatile bool carry_isr_triggered
     Was the carry isr triggered.
     
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ rtc_clock_bypass_mode_t

    + +
    +
    + + + + +
    enum rtc_clock_bypass_mode_t
    +
    +

    RTC Clock Bypass Mode

    + +
    +
    +

    Function Documentation

    + +

    ◆ R_RTC_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_Open (rtc_ctrl_t *const p_ctrl,
    rtc_cfg_t const *const p_cfg 
    )
    +
    +

    Opens and configures the RTC driver module. Implements rtc_api_t::open. Configuration includes clock source, and interrupt callback function.

    +

    Example:

    /* Open the RTC module */
    err = R_RTC_Open(&g_rtc0_ctrl, &g_rtc0_cfg);
    Return values
    + + + + + +
    FSP_SUCCESSInitialization was successful and RTC has started.
    FSP_ERR_ASSERTIONInvalid p_ctrl or p_cfg pointer.
    FSP_ERR_ALREADY_OPENModule is already open.
    FSP_ERR_INVALID_ARGUMENTInvalid time parameter field.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_RTC_Close (rtc_ctrl_t *const p_ctrl)
    +
    +

    Close the RTC driver. Implements rtc_api_t::close

    +
    Return values
    + + + + +
    FSP_SUCCESSDe-Initialization was successful and RTC driver closed.
    FSP_ERR_ASSERTIONInvalid p_ctrl.
    FSP_ERR_NOT_OPENDriver not open already for close.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_ClockSourceSet()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_RTC_ClockSourceSet (rtc_ctrl_t *const p_ctrl)
    +
    +

    Implements rtc_api_t::clockSourceSet. Unsupported.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSInitialization was successful and RTC has started.
    FSP_ERR_ASSERTIONInvalid p_ctrl or p_cfg pointer.
    FSP_ERR_NOT_OPENDriver is not opened.
    FSP_ERR_INVALID_ARGUMENTInvalid clock source.
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_CalendarTimeSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_CalendarTimeSet (rtc_ctrl_t *const p_ctrl,
    rtc_time_t *const p_time 
    )
    +
    +

    Set the calendar time.

    +

    Implements rtc_api_t::calendarTimeSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSCalendar time set operation was successful.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open already for operation.
    FSP_ERR_INVALID_ARGUMENTInvalid time parameter field.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_CalendarTimeGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_CalendarTimeGet (rtc_ctrl_t *const p_ctrl,
    rtc_time_t *const p_time 
    )
    +
    +

    Get the calendar time.

    Warning
    Do not call this function from a critical section or from an interrupt with higher priority than the carry interrupt, or the time returned may be inaccurate.
    +

    Implements rtc_api_t::calendarTimeGet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCalendar time get operation was successful.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open already for operation.
    FSP_ERR_IRQ_BSP_DISABLEDUser IRQ parameter not valid
    +
    +
    + +
    +
    + +

    ◆ R_RTC_CalendarAlarmSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_CalendarAlarmSet (rtc_ctrl_t *const p_ctrl,
    rtc_alarm_time_t *const p_alarm 
    )
    +
    +

    Set the calendar alarm time.

    +

    Implements rtc_api_t::calendarAlarmSet.

    +
    Precondition
    The calendar counter must be running before the alarm can be set.
    +
    Return values
    + + + + + + +
    FSP_SUCCESSCalendar alarm time set operation was successful.
    FSP_ERR_INVALID_ARGUMENTInvalid time parameter field.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open already for operation.
    FSP_ERR_IRQ_BSP_DISABLEDUser IRQ parameter not valid
    +
    +
    + +
    +
    + +

    ◆ R_RTC_CalendarAlarmGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_CalendarAlarmGet (rtc_ctrl_t *const p_ctrl,
    rtc_alarm_time_t *const p_alarm 
    )
    +
    +

    Get the calendar alarm time.

    +

    Implements rtc_api_t::calendarAlarmGet

    +
    Return values
    + + + + +
    FSP_SUCCESSCalendar alarm time get operation was successful.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open already for operation.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_PeriodicIrqRateSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_PeriodicIrqRateSet (rtc_ctrl_t *const p_ctrl,
    rtc_periodic_irq_select_t const rate 
    )
    +
    +

    Set the periodic interrupt rate and enable periodic interrupt.

    +

    Implements rtc_api_t::periodicIrqRateSet

    +
    Note
    To start the RTC R_RTC_CalendarTimeSet must be called at least once.
    +

    Example:

    /* Set the periodic interrupt rate to 1 second */
    R_RTC_PeriodicIrqRateSet(&g_rtc0_ctrl, RTC_PERIODIC_IRQ_SELECT_1_SECOND);
    Return values
    + + + + + +
    FSP_SUCCESSThe periodic interrupt rate was successfully set.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open already for operation.
    FSP_ERR_IRQ_BSP_DISABLEDUser IRQ parameter not valid
    +
    +
    + +
    +
    + +

    ◆ R_RTC_ErrorAdjustmentSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_ErrorAdjustmentSet (rtc_ctrl_t *const p_ctrl,
    rtc_error_adjustment_cfg_t const *const err_adj_cfg 
    )
    +
    +

    This function sets time error adjustment

    +

    Implements rtc_api_t::errorAdjustmentSet

    +
    Return values
    + + + + + + +
    FSP_SUCCESSTime error adjustment successful.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open for operation.
    FSP_ERR_UNSUPPORTEDThe clock source is not sub-clock.
    FSP_ERR_INVALID_ARGUMENTInvalid error adjustment value.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_InfoGet (rtc_ctrl_t *const p_ctrl,
    rtc_info_t *const p_rtc_info 
    )
    +
    +

    Set RTC clock source and running status information ad store it in provided pointer p_rtc_info

    +

    Implements rtc_api_t::infoGet

    +
    Return values
    + + + + +
    FSP_SUCCESSGet information Successful.
    FSP_ERR_ASSERTIONInvalid input argument.
    FSP_ERR_NOT_OPENDriver not open already for operation.
    +
    +
    + +
    +
    + +

    ◆ R_RTC_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_RTC_CallbackSet (rtc_ctrl_t *const p_ctrl,
    void(*)(rtc_callback_args_t *) p_callback,
    void const *const p_context,
    rtc_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements rtc_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSBaud rate was successfully changed.
    FSP_ERR_ASSERTIONPointer to RTC control block is NULL or the RTC is not configured to use the internal clock.
    FSP_ERR_NOT_OPENThe control block has not been opened
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___r_t_c.js b/group___r_t_c.js new file mode 100644 index 0000000..7273b6f --- /dev/null +++ b/group___r_t_c.js @@ -0,0 +1,25 @@ +var group___r_t_c = +[ + [ "rtc_extended_cfg_t", "group___r_t_c.html#structrtc__extended__cfg__t", [ + [ "alarm1_ipl", "group___r_t_c.html#ac36b179a4311fe95bde1820384dd35cc", null ], + [ "alarm1_irq", "group___r_t_c.html#ae7f72a6fbe27e9a3ef60c99022798c9b", null ], + [ "clock_bypass_mode", "group___r_t_c.html#af6b87d21311028e2eb25ce5f2b90f73e", null ] + ] ], + [ "rtc_instance_ctrl_t", "group___r_t_c.html#structrtc__instance__ctrl__t", [ + [ "open", "group___r_t_c.html#a531f0ac7759fe0ec50841022ae9a9bfe", null ], + [ "p_cfg", "group___r_t_c.html#a02ff7a87b8c7fdf8ec2ecc4ad4a817c6", null ], + [ "carry_isr_triggered", "group___r_t_c.html#ad1e0ef1397b14d5d1571f960d536c50d", null ] + ] ], + [ "rtc_clock_bypass_mode_t", "group___r_t_c.html#ga17801e1ecb103e17bf1fd092c6a48461", null ], + [ "R_RTC_Open", "group___r_t_c.html#gae6b2cd0b0827d0fdef1dd148ddc354bb", null ], + [ "R_RTC_Close", "group___r_t_c.html#gac1135140182189d9c1defa5846a375c8", null ], + [ "R_RTC_ClockSourceSet", "group___r_t_c.html#gaa08e35bcfca849283de15698beb6b150", null ], + [ "R_RTC_CalendarTimeSet", "group___r_t_c.html#ga3bf6329a0ea01943e385499fcac01e1e", null ], + [ "R_RTC_CalendarTimeGet", "group___r_t_c.html#gaabcfafd522c18288ac274f6b56f76366", null ], + [ "R_RTC_CalendarAlarmSet", "group___r_t_c.html#ga5c39b02432cedcb7a29ae8bdc8fcefb8", null ], + [ "R_RTC_CalendarAlarmGet", "group___r_t_c.html#gacbb2641ed2236f071c001df6b025e0f2", null ], + [ "R_RTC_PeriodicIrqRateSet", "group___r_t_c.html#ga0fd1ee1e11ed683d7509f251bbd1f282", null ], + [ "R_RTC_ErrorAdjustmentSet", "group___r_t_c.html#ga6e0f357923c34057c8c938a52f6e8da8", null ], + [ "R_RTC_InfoGet", "group___r_t_c.html#ga311898f6b0ddd44d9b4c1b34defb0cf4", null ], + [ "R_RTC_CallbackSet", "group___r_t_c.html#gaa6b50d916a9243792c0ea8b13744d25f", null ] +]; \ No newline at end of file diff --git a/group___r_t_c___a_p_i.html b/group___r_t_c___a_p_i.html new file mode 100644 index 0000000..920b1ee --- /dev/null +++ b/group___r_t_c___a_p_i.html @@ -0,0 +1,1047 @@ + + + + + + + +RZV Flexible Software Package Documentation: RTC Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    RTC Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for accessing the Realtime Clock.

    +

    +Summary

    +

    The RTC Interface is for configuring Real Time Clock (RTC) functionality including alarm, periodic notiification and error adjustment.

    +

    The Real Time Clock Interface can be implemented by:

    + + + + + + + + + + + + + + + + +

    +Data Structures

    struct  rtc_callback_args_t
     
    struct  rtc_error_adjustment_cfg_t
     
    struct  rtc_alarm_time_t
     
    struct  rtc_info_t
     
    struct  rtc_cfg_t
     
    struct  rtc_api_t
     
    struct  rtc_instance_t
     
    + + + + + +

    +Typedefs

    typedef struct tm rtc_time_t
     
    typedef void rtc_ctrl_t
     
    + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  rtc_event_t
     
    enum  rtc_alarm_channel_t
     
    enum  rtc_clock_source_t
     
    enum  rtc_status_t
     
    enum  rtc_error_adjustment_t
     
    enum  rtc_error_adjustment_mode_t
     
    enum  rtc_error_adjustment_period_t
     
    enum  rtc_periodic_irq_select_t
     
    +

    Data Structure Documentation

    + +

    ◆ rtc_callback_args_t

    + +
    +
    + + + + +
    struct rtc_callback_args_t
    +
    +

    Callback function parameter data

    +
    + + + + + + + +
    Data Fields
    +rtc_event_t +event +The event can be used to identify what caused the callback (compare match or error).
    +void const * +p_context +Placeholder for user data.
    + +
    +
    + +

    ◆ rtc_error_adjustment_cfg_t

    + +
    +
    + + + + +
    struct rtc_error_adjustment_cfg_t
    +
    +

    Time error adjustment value configuration

    +
    + + + + + + + + + + + + + +
    Data Fields
    +rtc_error_adjustment_mode_t +adjustment_mode +Automatic Adjustment Enable/Disable.
    +rtc_error_adjustment_period_t +adjustment_period +Error Adjustment period.
    +rtc_error_adjustment_t +adjustment_type +Time error adjustment setting.
    +uint32_t +adjustment_value +Value of the prescaler for error adjustment.
    + +
    +
    + +

    ◆ rtc_alarm_time_t

    + +
    +
    + + + + +
    struct rtc_alarm_time_t
    +
    +

    Alarm time setting structure

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +rtc_time_t +time +Time structure.
    +bool +sec_match +Enable the alarm based on a match of the seconds field.
    +bool +min_match +Enable the alarm based on a match of the minutes field.
    +bool +hour_match +Enable the alarm based on a match of the hours field.
    +bool +mday_match +Enable the alarm based on a match of the days field.
    +bool +mon_match +Enable the alarm based on a match of the months field.
    +bool +year_match +Enable the alarm based on a match of the years field.
    +bool +dayofweek_match +Enable the alarm based on a match of the dayofweek field.
    +rtc_alarm_channel_t +channel +Select alarm 0 or alarm 1.
    + +
    +
    + +

    ◆ rtc_info_t

    + +
    +
    + + + + +
    struct rtc_info_t
    +
    +

    RTC Information Structure for information returned by infoGet()

    +
    + + + + + + + +
    Data Fields
    +rtc_clock_source_t +clock_source +Clock source for the RTC block.
    +rtc_status_t +status +RTC run status.
    + +
    +
    + +

    ◆ rtc_cfg_t

    + +
    +
    + + + + +
    struct rtc_cfg_t
    +
    +

    User configuration structure, used in open function

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +rtc_clock_source_t clock_source
     Clock source for the RTC block.
     
    +uint32_t freq_compare_value_loco
     The frequency comparison value for LOCO.
     
    +rtc_error_adjustment_cfg_t const *const p_err_cfg
     Pointer to Error Adjustment configuration.
     
    +uint8_t alarm_ipl
     Alarm interrupt priority.
     
    +IRQn_Type alarm_irq
     Alarm interrupt vector.
     
    +uint8_t periodic_ipl
     Periodic interrupt priority.
     
    +IRQn_Type periodic_irq
     Periodic interrupt vector.
     
    +uint8_t carry_ipl
     Carry interrupt priority.
     
    +IRQn_Type carry_irq
     Carry interrupt vector.
     
    +void(* p_callback )(rtc_callback_args_t *p_args)
     Called from the ISR.
     
    +void const * p_context
     User defined context passed into callback function.
     
    +void const * p_extend
     RTC hardware dependant configuration.
     
    + +
    +
    + +

    ◆ rtc_api_t

    + +
    +
    + + + + +
    struct rtc_api_t
    +
    +

    RTC driver structure. General RTC functions implemented at the HAL layer follow this API.

    +
    + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(rtc_ctrl_t *const p_ctrl, rtc_cfg_t const *const p_cfg)
     
    fsp_err_t(* close )(rtc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* clockSourceSet )(rtc_ctrl_t *const p_ctrl)
     
    fsp_err_t(* calendarTimeSet )(rtc_ctrl_t *const p_ctrl, rtc_time_t *const p_time)
     
    fsp_err_t(* calendarTimeGet )(rtc_ctrl_t *const p_ctrl, rtc_time_t *const p_time)
     
    fsp_err_t(* calendarAlarmSet )(rtc_ctrl_t *const p_ctrl, rtc_alarm_time_t *const p_alarm)
     
    fsp_err_t(* calendarAlarmGet )(rtc_ctrl_t *const p_ctrl, rtc_alarm_time_t *const p_alarm)
     
    fsp_err_t(* periodicIrqRateSet )(rtc_ctrl_t *const p_ctrl, rtc_periodic_irq_select_t const rate)
     
    fsp_err_t(* errorAdjustmentSet )(rtc_ctrl_t *const p_ctrl, rtc_error_adjustment_cfg_t const *const err_adj_cfg)
     
    fsp_err_t(* callbackSet )(rtc_ctrl_t *const p_ctrl, void(*p_callback)(rtc_callback_args_t *), void const *const p_context, rtc_callback_args_t *const p_callback_memory)
     
    fsp_err_t(* infoGet )(rtc_ctrl_t *const p_ctrl, rtc_info_t *const p_rtc_info)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::open) (rtc_ctrl_t *const p_ctrl, rtc_cfg_t const *const p_cfg)
    +
    +

    Open the RTC driver.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to RTC device handle
    [in]p_cfgPointer to the configuration structure
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::close) (rtc_ctrl_t *const p_ctrl)
    +
    +

    Close the RTC driver.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to RTC device handle.
    +
    +
    + +
    +
    + +

    ◆ clockSourceSet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::clockSourceSet) (rtc_ctrl_t *const p_ctrl)
    +
    +

    Sets the RTC clock source.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to RTC device handle
    +
    +
    + +
    +
    + +

    ◆ calendarTimeSet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::calendarTimeSet) (rtc_ctrl_t *const p_ctrl, rtc_time_t *const p_time)
    +
    +

    Set the calendar time and start the calender counter

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to RTC device handle
    [in]p_timePointer to a time structure that contains the time to set
    [in]clock_startFlag that starts the clock right after it is set
    +
    +
    + +
    +
    + +

    ◆ calendarTimeGet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::calendarTimeGet) (rtc_ctrl_t *const p_ctrl, rtc_time_t *const p_time)
    +
    +

    Get the calendar time.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to RTC device handle
    [out]p_timePointer to a time structure that contains the time to get
    +
    +
    + +
    +
    + +

    ◆ calendarAlarmSet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::calendarAlarmSet) (rtc_ctrl_t *const p_ctrl, rtc_alarm_time_t *const p_alarm)
    +
    +

    Set the calendar alarm time and enable the alarm interrupt.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to RTC device handle
    [in]p_alarmPointer to an alarm structure that contains the alarm time to set
    [in]irq_enable_flagEnable the ALARM irq if set
    +
    +
    + +
    +
    + +

    ◆ calendarAlarmGet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::calendarAlarmGet) (rtc_ctrl_t *const p_ctrl, rtc_alarm_time_t *const p_alarm)
    +
    +

    Get the calendar alarm time.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to RTC device handle
    [out]p_alarmPointer to an alarm structure to fill up with the alarm time
    +
    +
    + +
    +
    + +

    ◆ periodicIrqRateSet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::periodicIrqRateSet) (rtc_ctrl_t *const p_ctrl, rtc_periodic_irq_select_t const rate)
    +
    +

    Set the periodic irq rate

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to RTC device handle
    [in]rateRate of periodic interrupts
    +
    +
    + +
    +
    + +

    ◆ errorAdjustmentSet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::errorAdjustmentSet) (rtc_ctrl_t *const p_ctrl, rtc_error_adjustment_cfg_t const *const err_adj_cfg)
    +
    +

    Set time error adjustment.

    +
    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [in]err_adj_cfgPointer to the Error Adjustment Config
    +
    +
    + +
    +
    + +

    ◆ callbackSet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::callbackSet) (rtc_ctrl_t *const p_ctrl, void(*p_callback)(rtc_callback_args_t *), void const *const p_context, rtc_callback_args_t *const p_callback_memory)
    +
    +

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to the RTC control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_working_memoryPointer to volatile memory where callback structure can be allocated
    +
    +
    + +
    +
    + +

    ◆ infoGet

    + +
    +
    + + + + +
    fsp_err_t(* rtc_api_t::infoGet) (rtc_ctrl_t *const p_ctrl, rtc_info_t *const p_rtc_info)
    +
    +

    Return the currently configure clock source for the RTC

    +
    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control handle structure
    [out]p_rtc_infoPointer to RTC information structure
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ rtc_instance_t

    + +
    +
    + + + + +
    struct rtc_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +rtc_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +rtc_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +rtc_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ rtc_time_t

    + +
    +
    + + + + +
    typedef struct tm rtc_time_t
    +
    +

    Date and time structure defined in C standard library <time.h>

    + +
    +
    + +

    ◆ rtc_ctrl_t

    + +
    +
    + + + + +
    typedef void rtc_ctrl_t
    +
    +

    RTC control block. Allocate an instance specific control block to pass into the RTC API calls.

    Implemented as
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ rtc_event_t

    + +
    +
    + + + + +
    enum rtc_event_t
    +
    +

    Events that can trigger a callback function

    + + + + +
    Enumerator
    RTC_EVENT_ALARM_IRQ 

    Real Time Clock ALARM 0 IRQ.

    +
    RTC_EVENT_ALARM1_IRQ 

    Real Time Clock ALARM 1 IRQ.

    +
    RTC_EVENT_PERIODIC_IRQ 

    Real Time Clock PERIODIC IRQ.

    +
    + +
    +
    + +

    ◆ rtc_alarm_channel_t

    + +
    +
    + + + + +
    enum rtc_alarm_channel_t
    +
    +

    RTC alarm channel

    + +
    +
    + +

    ◆ rtc_clock_source_t

    + +
    +
    + + + + +
    enum rtc_clock_source_t
    +
    +

    Clock source for the RTC block

    + + + +
    Enumerator
    RTC_CLOCK_SOURCE_SUBCLK 

    Sub-clock oscillator.

    +
    RTC_CLOCK_SOURCE_LOCO 

    Low power On Chip Oscillator.

    +
    + +
    +
    + +

    ◆ rtc_status_t

    + +
    +
    + + + + +
    enum rtc_status_t
    +
    +

    RTC run state

    + + + +
    Enumerator
    RTC_STATUS_STOPPED 

    RTC counter is stopped.

    +
    RTC_STATUS_RUNNING 

    RTC counter is running.

    +
    + +
    +
    + +

    ◆ rtc_error_adjustment_t

    + +
    +
    + + + + +
    enum rtc_error_adjustment_t
    +
    +

    Time error adjustment settings

    + + + + +
    Enumerator
    RTC_ERROR_ADJUSTMENT_NONE 

    Adjustment is not performed.

    +
    RTC_ERROR_ADJUSTMENT_ADD_PRESCALER 

    Adjustment is performed by the addition to the prescaler.

    +
    RTC_ERROR_ADJUSTMENT_SUBTRACT_PRESCALER 

    Adjustment is performed by the subtraction from the prescaler.

    +
    + +
    +
    + +

    ◆ rtc_error_adjustment_mode_t

    + +
    +
    + + + + +
    enum rtc_error_adjustment_mode_t
    +
    +

    Time error adjustment mode settings

    + + + +
    Enumerator
    RTC_ERROR_ADJUSTMENT_MODE_MANUAL 

    Adjustment mode is set to manual.

    +
    RTC_ERROR_ADJUSTMENT_MODE_AUTOMATIC 

    Adjustment mode is set to automatic.

    +
    + +
    +
    + +

    ◆ rtc_error_adjustment_period_t

    + +
    +
    + + + + +
    enum rtc_error_adjustment_period_t
    +
    +

    Time error adjustment period settings

    + + + + +
    Enumerator
    RTC_ERROR_ADJUSTMENT_PERIOD_1_MINUTE 

    Adjustment period is set to every one minute.

    +
    RTC_ERROR_ADJUSTMENT_PERIOD_10_SECOND 

    Adjustment period is set to every ten second.

    +
    RTC_ERROR_ADJUSTMENT_PERIOD_NONE 

    Adjustment period not supported in manual mode.

    +
    + +
    +
    + +

    ◆ rtc_periodic_irq_select_t

    + +
    +
    + + + + +
    enum rtc_periodic_irq_select_t
    +
    +

    Periodic Interrupt select

    + + + + + + + + + + + +
    Enumerator
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_256_SECOND 

    A periodic irq is generated every 1/256 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_128_SECOND 

    A periodic irq is generated every 1/128 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_64_SECOND 

    A periodic irq is generated every 1/64 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_32_SECOND 

    A periodic irq is generated every 1/32 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_16_SECOND 

    A periodic irq is generated every 1/16 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_8_SECOND 

    A periodic irq is generated every 1/8 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_4_SECOND 

    A periodic irq is generated every 1/4 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_2_SECOND 

    A periodic irq is generated every 1/2 second.

    +
    RTC_PERIODIC_IRQ_SELECT_1_SECOND 

    A periodic irq is generated every 1 second.

    +
    RTC_PERIODIC_IRQ_SELECT_2_SECOND 

    A periodic irq is generated every 2 seconds.

    +
    + +
    +
    +
    +
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"RTC_ERROR_ADJUSTMENT_MODE_MANUAL", "group___r_t_c___a_p_i.html#gga4cbfe07cf288ae153c30b4fef99163e7a7b90f3b3332c2ba8fffd0921fddf1888", null ], + [ "RTC_ERROR_ADJUSTMENT_MODE_AUTOMATIC", "group___r_t_c___a_p_i.html#gga4cbfe07cf288ae153c30b4fef99163e7ae772455e50f01892e6dffabf509ae66c", null ] + ] ], + [ "rtc_error_adjustment_period_t", "group___r_t_c___a_p_i.html#gaa9758f6f29579df6e9f5c64ff486c097", [ + [ "RTC_ERROR_ADJUSTMENT_PERIOD_1_MINUTE", "group___r_t_c___a_p_i.html#ggaa9758f6f29579df6e9f5c64ff486c097a4c96e106ab367f0a811813e6077c3a8c", null ], + [ "RTC_ERROR_ADJUSTMENT_PERIOD_10_SECOND", "group___r_t_c___a_p_i.html#ggaa9758f6f29579df6e9f5c64ff486c097abb5d066f25aa8878ef57848e7a8a28aa", null ], + [ "RTC_ERROR_ADJUSTMENT_PERIOD_NONE", "group___r_t_c___a_p_i.html#ggaa9758f6f29579df6e9f5c64ff486c097afe53e47d736acd5bd710bc610d1fd8bc", null ] + ] ], + [ "rtc_periodic_irq_select_t", "group___r_t_c___a_p_i.html#gacbf0a3d09430a65ca1b3179819183f01", [ + [ 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"group___r_t_c___a_p_i.html#ggacbf0a3d09430a65ca1b3179819183f01a2d83137f7be0a550f9e8533090186f17", null ], + [ "RTC_PERIODIC_IRQ_SELECT_1_DIV_BY_2_SECOND", "group___r_t_c___a_p_i.html#ggacbf0a3d09430a65ca1b3179819183f01a5d684a2ff7ceabe98acb755095705f4e", null ], + [ "RTC_PERIODIC_IRQ_SELECT_1_SECOND", "group___r_t_c___a_p_i.html#ggacbf0a3d09430a65ca1b3179819183f01a35f83abe856065e723ec538a5e708a6d", null ], + [ "RTC_PERIODIC_IRQ_SELECT_2_SECOND", "group___r_t_c___a_p_i.html#ggacbf0a3d09430a65ca1b3179819183f01ac05b73777b54b84cc0ed8c6ee4013f33", null ] + ] ] +]; \ No newline at end of file diff --git a/group___s_c_i___b___i2_c.html b/group___s_c_i___b___i2_c.html new file mode 100644 index 0000000..1700f61 --- /dev/null +++ b/group___s_c_i___b___i2_c.html @@ -0,0 +1,825 @@ + + + + + + + +RZV Flexible Software Package Documentation: I2C Master (r_sci_b_i2c) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    + + + + + +   + + +
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    +Functions | +Data Structures | +Enumerations
    +
    +
    I2C Master (r_sci_b_i2c)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_SCI_B_I2C_Open (i2c_master_ctrl_t *const p_api_ctrl, i2c_master_cfg_t const *const p_cfg)
     
    fsp_err_t R_SCI_B_I2C_Close (i2c_master_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_SCI_B_I2C_Read (i2c_master_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes, bool const restart)
     
    fsp_err_t R_SCI_B_I2C_Write (i2c_master_ctrl_t *const p_api_ctrl, uint8_t *const p_src, uint32_t const bytes, bool const restart)
     
    fsp_err_t R_SCI_B_I2C_Abort (i2c_master_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_SCI_B_I2C_SlaveAddressSet (i2c_master_ctrl_t *const p_api_ctrl, uint32_t const slave, i2c_master_addr_mode_t const addr_mode)
     
    fsp_err_t R_SCI_B_I2C_CallbackSet (i2c_master_ctrl_t *const p_api_ctrl, void(*p_callback)(i2c_master_callback_args_t *), void const *const p_context, i2c_master_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_SCI_B_I2C_StatusGet (i2c_master_ctrl_t *const p_api_ctrl, i2c_master_status_t *p_status)
     
    +

    Detailed Description

    +

    Driver for the SCI_B peripheral on RZ MPUs. This module implements the I2C Master Interface.

    +

    +Overview

    +

    The Simple I2C master on SCI_B HAL module supports transactions with an I2C Slave device. Callbacks must be provided which would be invoked when a transmission or receive has been completed. The callback arguments will contain information about the transaction status, bytes transferred and a pointer to the user defined context.

    +

    +Features

    +
      +
    • Supports multiple transmission rates
        +
      • Standard Mode Support with up to 100 kHz transaction rate.
        • +
      • Fast Mode Support with up to 400 kHz transaction rate.
        • +
      +
      • +
    • SDA Delay in nanoseconds can be specified as a part of the configuration.
      • +
    • I2C Master Read from a slave device.
      • +
    • I2C Master Write to a slave device.
      • +
    • Abort any in-progress transactions.
      • +
    • Set the address of the slave device.
      • +
    • Non-blocking behavior is achieved by the use of callbacks.
      • +
    • Additional build-time features
        +
      • Optional (build time) DMAC support for read and write respectively.
        • +
      • Optional (build time) support for 10-bit slave addressing.
        • +
      +
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_sci_b_i2c

    +The following build time configurations are defined in fsp_cfg/r_sci_b_i2c_cfg.h:
    +

    + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    DMAC on Transmission and Reception
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, DMAC instances will be included in the build for both transmission and reception.
    10-bit slave addressing
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, the driver will support 10-bit slave addressing mode along with the default 7-bit slave addressing mode.
    +

    Configurations for Connectivity > I2C Master (r_sci_b_i2c)

    +This module can be added to the Stacks tab via New Stack > Connectivity > I2C Master (r_sci_b_i2c). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_i2c0 Module name.
    ChannelValue must be an integer between 0 and 90 Select the SCI channel.
    Slave Address Value must be a hex value0x00 Specify the slave address.
    Address Mode
      +
    • +7-Bit
      • +
    • +10-Bit
      • +
    +    		7-Bit Select the address mode.
    Rate
      +
    • +Standard
      • +
    • +Fast-mode
      • +
    +    		Standard Select the I2C data rate.
    +
    +If the requested transfer rate cannot be achieved, the settings with the largest possible transfer rate that is less than or equal to the requested transfer rate are used. The theoretical calculated transfer rate and SDA delay are printed in a comment in the generated sci_b_i2c_extended_cfg_t structure.
    SDA Output Delay (nano seconds)Must be a valid non-negative integer with maximum configurable value of 300300 Specify the SDA output delay in nanoseconds.
    Noise Filter Clock Select
      +
    • +The on-chip baud rate generator source clock divided by 1
      • +
    • +The on-chip baud rate generator source clock divided by 2
      • +
    • +The on-chip baud rate generator source clock divided by 4
      • +
    • +The on-chip baud rate generator source clock divided by 8
      • +
    +    		The on-chip baud rate generator source clock divided by 1 Select the on-chip baud rate generator source clock division setting for the digital noise filter
    Bit Rate Modulation
      +
    • +Enable
      • +
    • +Disable
      • +
    +    		Enable Enabling bitrate modulation reduces the percent error of the actual bitrate with respect to the requested baud rate. It does this by modulating the number of cycles per clock output pulse, so the clock is no longer a square wave.
    CallbackName must be a valid C symbolsci_b_i2c_master_callback A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
    Interrupt Priority LevelValue must be a non-negative integer12 Select the interrupt priority level. This is set for TXI, TEI, and RXI interrupts.
    RX InterruptMCU Specific OptionsEnable the RX interrupt. Should be enabled only with DMAC enabled.
    +

    +

    +Clock Configuration

    +

    The actual I2C transfer rate is derived from PLLCLN and will be calculated and set by the tooling depending on the selected transfer rate and the SDA delay. If the selected clock is configured in such a manner that the selected internal rate cannot be achieved, an error will be returned.

    +

    +Pin Configuration

    +

    The SCI_B I2C peripheral module uses pins on the MPU to communicate to external devices. I/O pins must be selected and configured as required by the external device. An I2C channel would consist of two pins - SDA and SCL for data/address and clock respectively.

    +

    +Usage Notes

    +

    +Interrupt Configuration

    +
      +
    • Receive buffer full (RXI), transmit buffer empty (TXI) and transmit end (TEI) interrupts for the selected channel used must be enabled in the properties of the selected device.
      • +
    • Set equal priority levels for all the interrupts mentioned above. Setting the interrupts to different priority levels could result in improper operation.
      • +
    +

    +SCI_B I2C Master Rate Calculation

    +
      +
    • The RZ Configuration editor calculates the internal baud-rate setting based on the configured transfer rate and SDA Delay. The closest possible baud-rate that can be achieved (less than or equal to the requested rate) is primarily determined by the value of the pull-up resistors for the SCL and SDA pins. It is not recommended to rely solely on the internal pull-up resistors for RZ MPU devices, as they can be quite large, such as 10K+ to 100K+. In such cases, the rise time would increase significantly. To comply with the I2C specification, specifically regarding the low level width and high level width, the actual frequency will be slowed down.
      • +
    • If a valid clock rate could not be calculated, an error is returned by the tool.
      • +
    +

    +Enabling DMAC with the SCI_B I2C

    +
      +
    • DMAC transfer support is configurable and is disabled from the build by default. SCI_B I2C driver provides two DMAC instances for transmission and reception respectively.
      • +
    • DMAC is helpful for minimizing interrupts during large transactions. Many I2C applications have shorter transactions. These applications will likely not see any improvement with DMAC. I2C often runs at a much slower speed than the CPU core clock. Some applications with longer transactions may prefer servicing the interrupts at the I2C bitrate to the overhead of bringing in the DMAC driver.
      • +
    • For further details on DMAC please refer Direct Memory Access Controller (r_dmac_b)
      • +
    +

    +Multiple Devices on the Bus

    +
      +
    • A single SCI_B I2C instance can be used to communicate with multiple slave devices on the same channel by using the SlaveAddressSet API.
      • +
    +

    +Restart

    +
      +
    • SCI_B_I2C can hold the the bus after an I2C transaction by issuing a repeated start condition.
      • +
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the r_sci_b_i2c in an application. This example shows how this driver can be used for basic read and write operations.

    +
    void basic_example (void)
    {
    fsp_err_t err;
    uint32_t timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    /* Initialize the I2C module */
    err = R_SCI_B_I2C_Open(&g_i2c_device_ctrl_1, &g_i2c_device_cfg_1);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Write some data to the transmit buffer */
    for (int i = 0; i < I2C_BUFFER_SIZE_BYTES; i++)
    {
    g_i2c_tx_buffer[i] = (uint8_t) i;
    }
    /* Send data to I2C slave */
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    err = R_SCI_B_I2C_Write(&g_i2c_device_ctrl_1, &g_i2c_tx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    assert(FSP_SUCCESS == err);
    /* Since there is nothing else to do, block until Callback triggers*/
    while ((I2C_MASTER_EVENT_TX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
    R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
    timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
    __BKPT(0);
    }
    /* Read data back from the I2C slave */
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    err = R_SCI_B_I2C_Read(&g_i2c_device_ctrl_1, &g_i2c_rx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    assert(FSP_SUCCESS == err);
    /* Since there is nothing else to do, block until Callback triggers*/
    while ((I2C_MASTER_EVENT_RX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
    R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
    timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
    __BKPT(0);
    }
    /* Verify the read data */
    if (0U != memcmp(g_i2c_tx_buffer, g_i2c_rx_buffer, I2C_BUFFER_SIZE_BYTES))
    {
    __BKPT(0);
    }
    }

    Multiple Slave devices on the same channel (bus)

    +

    This example demonstrates how a single SCI_B I2C driver can be used to communicate with different slave devices which are on the same channel.

    +
    void single_channel_multi_slave (void)
    {
    fsp_err_t err;
    uint32_t timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    err = R_SCI_B_I2C_Open(&g_i2c_device_ctrl_2, &g_i2c_device_cfg_2);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Clear the recieve buffer */
    memset(g_i2c_rx_buffer, '0', I2C_BUFFER_SIZE_BYTES);
    /* Read data from I2C slave */
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    err = R_SCI_B_I2C_Read(&g_i2c_device_ctrl_2, &g_i2c_rx_buffer[0], I2C_BUFFER_SIZE_BYTES, false);
    assert(FSP_SUCCESS == err);
    while ((I2C_MASTER_EVENT_RX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
    R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
    timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
    __BKPT(0);
    }
    /* Send data to I2C slave on the same channel */
    err = R_SCI_B_I2C_SlaveAddressSet(&g_i2c_device_ctrl_2, I2C_SLAVE_DISPLAY_ADAPTER, I2C_MASTER_ADDR_MODE_7BIT);
    assert(FSP_SUCCESS == err);
    g_i2c_tx_buffer[0] = (uint8_t) I2C_EXAMPLE_DATA_1;
    g_i2c_tx_buffer[1] = (uint8_t) I2C_EXAMPLE_DATA_2;
    g_i2c_callback_event = I2C_MASTER_EVENT_ABORTED;
    timeout_ms = I2C_TRANSACTION_BUSY_DELAY;
    err = R_SCI_B_I2C_Write(&g_i2c_device_ctrl_2, &g_i2c_tx_buffer[0], 2U, false);
    assert(FSP_SUCCESS == err);
    while ((I2C_MASTER_EVENT_TX_COMPLETE != g_i2c_callback_event) && timeout_ms)
    {
    R_BSP_SoftwareDelay(1U, BSP_DELAY_UNITS_MILLISECONDS);
    timeout_ms--;;
    }
    if (I2C_MASTER_EVENT_ABORTED == g_i2c_callback_event)
    {
    __BKPT(0);
    }
    }
    + + + + + + + +

    +Data Structures

    struct  sci_b_i2c_clock_settings_t
     
    struct  sci_b_i2c_instance_ctrl_t
     
    struct  sci_b_i2c_extended_cfg_t
     
    + + + +

    +Enumerations

    enum  sci_b_i2c_clock_source_t
     
    +

    Data Structure Documentation

    + +

    ◆ sci_b_i2c_clock_settings_t

    + +
    +
    + + + + +
    struct sci_b_i2c_clock_settings_t
    +
    +

    I2C clock settings

    +
    + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +bool +bitrate_modulation +Bit-rate Modulation Function enable or disable.
    +uint8_t +brr_value +Bit rate register settings.
    +uint8_t +clk_divisor_value +Clock Select settings.
    +uint8_t +mddr_value +Modulation Duty Register settings.
    +uint8_t +cycles_value +SDA Delay Output Cycles Select.
    +uint8_t +snfr_value +Noise Filter Setting Register value.
    +sci_b_i2c_clock_source_t +clock_source +Clock source (PCLK or SCISPICLK)
    + +
    +
    + +

    ◆ sci_b_i2c_instance_ctrl_t

    + +
    +
    + + + + +
    struct sci_b_i2c_instance_ctrl_t
    +
    +

    I2C control structure. DO NOT INITIALIZE.

    +
    +
    +
    + +

    ◆ sci_b_i2c_extended_cfg_t

    + +
    +
    + + + + +
    struct sci_b_i2c_extended_cfg_t
    +
    +

    SCI I2C extended configuration

    +
    + + + + +
    Data Fields
    +sci_b_i2c_clock_settings_t +clock_settings +I2C Clock settings.
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ sci_b_i2c_clock_source_t

    + +
    +
    + + + + +
    enum sci_b_i2c_clock_source_t
    +
    +

    SCI clock source

    + +
    +
    +

    Function Documentation

    + +

    ◆ R_SCI_B_I2C_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_Open (i2c_master_ctrl_t *const p_api_ctrl,
    i2c_master_cfg_t const *const p_cfg 
    )
    +
    +

    Opens the I2C device.

    +
    Return values
    + + + + + +
    FSP_SUCCESSRequested clock rate was set exactly.
    FSP_ERR_ALREADY_OPENModule is already open.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTChannel is not available on this MCU.
    FSP_ERR_ASSERTIONParameter check failure due to one or more reasons below:
      +
    1. p_api_ctrl or p_cfg is NULL.
      2. +
    2. extended parameter is NULL.
      3. +
    3. Callback parameter is NULL.
      4. +
    4. Clock rate requested is greater than 400KHz
      5. +
    5. Invalid IRQ number assigned
      6. +
    +
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_Close (i2c_master_ctrl_t *const p_api_ctrl)
    +
    +

    Closes the I2C device. Power down I2C peripheral.

    +

    This function will safely terminate any in-progress I2C transfer with the device. If a transfer is aborted, the user will be notified via callback with an abort event. Since the callback is optional, this function will also return a specific error code in this situation.

    +
    Return values
    + + + + +
    FSP_SUCCESSDevice closed without issue.
    FSP_ERR_ASSERTIONThe parameter p_ctrl is NULL.
    FSP_ERR_NOT_OPENDevice was not even opened.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_Read (i2c_master_ctrl_t *const p_api_ctrl,
    uint8_t *const p_dest,
    uint32_t const bytes,
    bool const restart 
    )
    +
    +

    Performs a read from the I2C device. The caller will be notified when the operation has completed (successfully) by an I2C_MASTER_EVENT_RX_COMPLETE in the callback.

    +
    Return values
    + + + + + +
    FSP_SUCCESSFunction executed without issue.
    FSP_ERR_ASSERTIONThe parameter p_ctrl, p_dest is NULL, bytes is 0.
    FSP_ERR_INVALID_SIZEProvided number of bytes more than uint16_t size (65535) while DTC is used for data transfer.
    FSP_ERR_NOT_OPENDevice was not even opened.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_Write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_Write (i2c_master_ctrl_t *const p_api_ctrl,
    uint8_t *const p_src,
    uint32_t const bytes,
    bool const restart 
    )
    +
    +

    Performs a write to the I2C device.

    +

    This function will fail if there is already an in-progress I2C transfer on the associated channel. Otherwise, the I2C write operation will begin. When no callback is provided by the user, this function performs a blocking write. Otherwise, the write operation is non-blocking and the caller will be notified when the operation has finished by an I2C_EVENT_TX_COMPLETE in the callback.

    +
    Return values
    + + + + + +
    FSP_SUCCESSFunction executed without issue.
    FSP_ERR_ASSERTIONp_ctrl, p_src is NULL.
    FSP_ERR_INVALID_SIZEProvided number of bytes more than uint16_t size (65535) while DTC is used for data transfer.
    FSP_ERR_NOT_OPENDevice was not even opened.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_Abort()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_Abort (i2c_master_ctrl_t *const p_api_ctrl)
    +
    +

    Aborts any in-progress transfer and forces the I2C peripheral into a ready state.

    +

    This function will safely terminate any in-progress I2C transfer with the device. If a transfer is aborted, the user will be notified via callback with an abort event. Since the callback is optional, this function will also return a specific error code in this situation.

    +
    Return values
    + + + + +
    FSP_SUCCESSTransaction was aborted without issue.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENDevice was not even opened.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_SlaveAddressSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_SlaveAddressSet (i2c_master_ctrl_t *const p_api_ctrl,
    uint32_t const slave,
    i2c_master_addr_mode_t const addr_mode 
    )
    +
    +

    Sets address and addressing mode of the slave device.

    +

    This function is used to set the device address and addressing mode of the slave without reconfiguring the entire bus.

    +
    Return values
    + + + + + +
    FSP_SUCCESSAddress of the slave is set correctly.
    FSP_ERR_ASSERTIONp_ctrl or address is NULL.
    FSP_ERR_NOT_OPENDevice was not even opened.
    FSP_ERR_IN_USEAn I2C Transaction is in progress.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_CallbackSet (i2c_master_ctrl_t *const p_api_ctrl,
    void(*)(i2c_master_callback_args_t *) p_callback,
    void const *const p_context,
    i2c_master_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements i2c_master_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_I2C_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_I2C_StatusGet (i2c_master_ctrl_t *const p_api_ctrl,
    i2c_master_status_t * p_status 
    )
    +
    +

    Provides driver status.

    +
    Return values
    + + + +
    FSP_SUCCESSStatus stored in p_status.
    FSP_ERR_ASSERTIONNULL pointer.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___s_c_i___b___i2_c.js b/group___s_c_i___b___i2_c.js new file mode 100644 index 0000000..72d9422 --- /dev/null +++ b/group___s_c_i___b___i2_c.js @@ -0,0 +1,25 @@ +var group___s_c_i___b___i2_c = +[ + [ "sci_b_i2c_clock_settings_t", "group___s_c_i___b___i2_c.html#structsci__b__i2c__clock__settings__t", [ + [ "bitrate_modulation", "group___s_c_i___b___i2_c.html#ac94d1da59cc2217ab818bd222134d3d5", null ], + [ "brr_value", "group___s_c_i___b___i2_c.html#a68f4a0d78c3d47e252f292aa0025b3a9", null ], + [ "clk_divisor_value", "group___s_c_i___b___i2_c.html#a3d3a9e1e75d107d851de3e84c4179161", null ], + [ "mddr_value", "group___s_c_i___b___i2_c.html#af010e505a82e39cbfbc3e2c0b99ce397", null ], + [ "cycles_value", "group___s_c_i___b___i2_c.html#a2f29638add1a4e0525c842c79b2806f5", null ], + [ "snfr_value", "group___s_c_i___b___i2_c.html#a02a85aeaa241753166390cb796c7ead4", null ], + [ "clock_source", "group___s_c_i___b___i2_c.html#abb1e023e83c78d6f4b07b07e172acfe2", null ] + ] ], + [ "sci_b_i2c_instance_ctrl_t", "group___s_c_i___b___i2_c.html#structsci__b__i2c__instance__ctrl__t", null ], + [ "sci_b_i2c_extended_cfg_t", "group___s_c_i___b___i2_c.html#structsci__b__i2c__extended__cfg__t", [ + [ "clock_settings", "group___s_c_i___b___i2_c.html#a076a2fea614be4cba22bc7e9a9e8f2bc", null ] + ] ], + [ "sci_b_i2c_clock_source_t", "group___s_c_i___b___i2_c.html#ga0209d1279b18f095fb8147fee7933c55", null ], + [ "R_SCI_B_I2C_Open", "group___s_c_i___b___i2_c.html#gae457daf3146cc92adfadc471b5bebd27", null ], + [ "R_SCI_B_I2C_Close", "group___s_c_i___b___i2_c.html#ga1d57041c70f924d2968792d59d1b980b", null ], + [ "R_SCI_B_I2C_Read", "group___s_c_i___b___i2_c.html#ga0d1ab3b59b204adb64bff01d4c83d10f", null ], + [ "R_SCI_B_I2C_Write", "group___s_c_i___b___i2_c.html#gaa214ca399eb4bb9cb198237f608b4767", null ], + [ "R_SCI_B_I2C_Abort", "group___s_c_i___b___i2_c.html#gadddbf1fa35661d53916faae95db97202", null ], + [ "R_SCI_B_I2C_SlaveAddressSet", "group___s_c_i___b___i2_c.html#ga286e5448d62d962610e1c7e104eb3fe9", null ], + [ "R_SCI_B_I2C_CallbackSet", "group___s_c_i___b___i2_c.html#gaa8c8d381f7c639650bf775c3eec125b9", null ], + [ "R_SCI_B_I2C_StatusGet", "group___s_c_i___b___i2_c.html#ga677766a68a258bb7a2e97090cff1c03b", null ] +]; \ No newline at end of file diff --git a/group___s_c_i___b___u_a_r_t.html b/group___s_c_i___b___u_a_r_t.html new file mode 100644 index 0000000..349aef3 --- /dev/null +++ b/group___s_c_i___b___u_a_r_t.html @@ -0,0 +1,1273 @@ + + + + + + + +RZV Flexible Software Package Documentation: UART (r_sci_b_uart) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
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    + + + + + + + +
    + +
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    + + +
    + +
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    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Enumerations
    +
    +
    UART (r_sci_b_uart)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_SCI_B_UART_Open (uart_ctrl_t *const p_api_ctrl, uart_cfg_t const *const p_cfg)
     
    fsp_err_t R_SCI_B_UART_Read (uart_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes)
     
    fsp_err_t R_SCI_B_UART_Write (uart_ctrl_t *const p_api_ctrl, uint8_t const *const p_src, uint32_t const bytes)
     
    fsp_err_t R_SCI_B_UART_BaudSet (uart_ctrl_t *const p_api_ctrl, void const *const p_baud_setting)
     
    fsp_err_t R_SCI_B_UART_InfoGet (uart_ctrl_t *const p_api_ctrl, uart_info_t *const p_info)
     
    fsp_err_t R_SCI_B_UART_Close (uart_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_SCI_B_UART_Abort (uart_ctrl_t *const p_api_ctrl, uart_dir_t communication_to_abort)
     
    fsp_err_t R_SCI_B_UART_BaudCalculate (uint32_t baudrate, bool bitrate_modulation, uint32_t baud_rate_error_x_1000, sci_b_baud_setting_t *const p_baud_setting)
     
    fsp_err_t R_SCI_B_UART_CallbackSet (uart_ctrl_t *const p_api_ctrl, void(*p_callback)(uart_callback_args_t *), void const *const p_context, uart_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_SCI_B_UART_ReadStop (uart_ctrl_t *const p_api_ctrl, uint32_t *remaining_bytes)
     
    +

    Detailed Description

    +

    Driver for the SCI peripheral on RZ MPUs. This module implements the UART Interface.

    +

    +Overview

    +

    +Features

    +

    The SCI UART module supports the following features:

    +
      +
    • Full-duplex UART communication
      • +
    • Interrupt-driven data transmission and reception
      • +
    • Invoking the user-callback function with an event code (RX/TX complete, TX data empty, RX char, error, etc)
      • +
    • Baud-rate change at run-time
      • +
    • Bit rate modulation and noise cancellation
      • +
    • CTS/RTS hardware flow control (with an associated pin)
      • +
    • RS-485 Half Duplex driver support with external RS-485 transceiver
      • +
    • Abort in-progress read/write operations
      • +
    • FIFO support on supported channels
      • +
    • Support Half Data Function
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_sci_b_uart

    +The following build time configurations are defined in fsp_cfg/r_sci_b_uart_cfg.h:
    +

    + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    FIFO Support
      +
    • +Enable
      • +
    • +Disable
      • +
    +    		Enable Enable FIFO support for the SCI_UART module.
    DMAC Support
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Enable DMAC Support for the SCI_UART module.
    Flow Control Support
      +
    • +Enable
      • +
    • +Disable
      • +
    +    		Disable Enable RS232 and RS-485 flow control support using a user provided pin.
    +

    Configurations for Connectivity > UART (r_sci_b_uart)

    +This module can be added to the Stacks tab via New Stack > Connectivity > UART (r_sci_b_uart). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_uart0 Module name.
    General > ChannelValue must be a non-negative integer0 Select the SCI channel.
    General > Data Bits
      +
    • +8bits
      • +
    • +7bits
      • +
    • +9bits
      • +
    +    		8bits Select the number of bits per word.
    General > Parity
      +
    • +None
      • +
    • +Odd
      • +
    • +Even
      • +
    +    		None Select the parity mode.
    General > Stop Bits
      +
    • +1bit
      • +
    • +2bits
      • +
    +    		1bit Select the number of stop bits.
    Baud > Baud RateValue must be an integer greater than 0115200 Enter the desired baud rate.
    +
    +If the requested baud rate cannot be achieved, the settings with the smallest percent error are used. The theoretical calculated baud rate and percent error are printed in a comment in the generated sci_b_baud_setting_t structure.
    Baud > Baud Rate Modulation
      +
    • +Disabled
      • +
    • +Enabled
      • +
    +    		Disabled Enabling baud rate modulation reduces the percent error of the actual baud rate with respect to the requested baud rate. It does this by modulating the number of cycles per clock, so some bits are slightly longer than others.
    Baud > Max Error (%)Must be a valid non-negative integer with a maximum configurable value of 1005 Maximum percent error allowed during baud calculation. This is used by the algorithm to determine whether or not to consider using less accurate alternative register settings.
    +
    +NOTE: The baud calculation does not show an error in the tool if this percent error was not achieved. The calculated percent error is recorded in a comment in the generated sci_b_baud_setting_t structure.
    Flow Control > CTS/RTS SelectionMCU Specific OptionsSelect either CTS or RTS function on the CTSn_RTSn pin of SCI channel n or select CTS function on CTSn pin and RTS function on CTSn_RTSn pin of SCI channel n (Available on selected MCUs and channels).
    Flow Control > Software RTS PortRefer to the RZV Configuration tool for available options.Disabled Specify the flow control pin port for the MCU.
    Flow Control > Software RTS Pin
      +
    • +Disabled
      • +
    • +0
      • +
    • +1
      • +
    • +2
      • +
    • +3
      • +
    • +4
      • +
    • +5
      • +
    • +6
      • +
    • +7
      • +
    +    		Disabled Specify the flow control pin for the MCU.
    Extra > RS-485 > DE Pin
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Enable or disable the DE pin for use in RS-485 half-duplex mode.
    Extra > RS-485 > DE Pin Polarity
      +
    • +Active Low
      • +
    • +Active High
      • +
    +    		Active High Select the polarity of the DE pin.
    Extra > RS-485 > DE Pin Assertion TimeMust be a valid integer greater than 0 and less than or equal to 31.1 Configure the time between assertion of the DE pin and the start of a write transfer. The time is specified in multiples of the SCI base clock period.
    Extra > RS-485 > DE Pin Negation TimeMust be a valid integer greater than 0 and less than or equal to 31.1 Configure the time between the end of a write transfer and the negation of the DE pin. The time is specified in multiples of the SCI base clock period.
    Extra > Clock Source
      +
    • +Internal Clock
      • +
    • +Internal Clock With Output on SCK
      • +
    • +External Clock 8x baud rate
      • +
    • +External Clock 16x baud rate
      • +
    +    		Internal Clock Selection of the clock source to be used in the baud-rate clock generator. When internal clock is used the baud rate can be output on the SCK pin.
    Extra > Start bit detection
      +
    • +Falling Edge
      • +
    • +Low Level
      • +
    +    		Falling Edge Start bit detected as falling edge or low level.
    Extra > Noise Filter
      +
    • +Enable
      • +
    • +Disable
      • +
    +    		Disable Enable the digital noise filter on RXDn pin. The digital noise filter block in SCI consists of two-stage flipflop circuits.
    Extra > Receive FIFO Trigger Level
      +
    • +One
      • +
    • +Max
      • +
    +    		Max Unused if DMAC is used for reception. Set to One to get a callback immediately when each byte is received. Set to Max to get a callback when FIFO is full or after 31 bit times with no data (fewer interrupts).
    Extra > Half Data Function
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Enable or disable the half data function.
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
    Interrupts > Receive Interrupt PriorityValue must be a non-negative integer12 Set the receive interrupt priority.
    Interrupts > Transmit Data Empty Interrupt PriorityValue must be a non-negative integer12 Set the transmit interrupt priority.
    Interrupts > Transmit End Interrupt PriorityValue must be a non-negative integer12 Set the transmit end interrupt priority.
    Interrupts > Error Interrupt PriorityValue must be a non-negative integer12 Set the error interrupt priority.
    +

    +

    +Clock Configuration

    +

    The clock for this module is derived from the following peripheral clock for each MCU group:
    +

    + + + + +
    MCU GroupPeripheral Clock
    RZV2HP5CLK
    +

    +

    The clock source for the baud-rate clock generator can be selected from the internal clock, the external clock times 8 or the external clock times 16. The external clock is supplied to the SCK pin.

    +

    +Pin Configuration

    +

    This module uses TXD and RXD to communicate to external devices. CTS or RTS can be controlled by the hardware. CTS or RTS or both (CTS and RTS) can be controlled by the hardware When the internal clock is the source for the baud-rate generator the SCK pin can be used to output a clock with the same frequency as the bit rate.In the current version, the TXD and RXD pins have an open-drain output as their default configuration. To enable the proper operation of the TX/RX pins, it is necessary to configure them to use CMOS.

    +

    +Usage Notes

    +
      +
    • When configured for Hardware CTS and Software RTS the configured flow control pin will be used for RTS. The pin will be set high inside of the receive ISR while data is being read. It will be set low when all data is read.
      • +
    • When configured for Hardware CTS and Hardware RTS the CSTn_RTSn pin will be used for RTS function and the CTSn pin will be used for CTS function on channel n.
      • +
    • The driver will follow correct hardware flow control function when CTSn_RTSn pin is connected to CTSn pin when "Hardware CTS and Hardware RTS" flow control is selected. The data will still be transferred when CTSn_RTSn and CTSn are disconnected as the CTSn pin is internally pulled low on the hardware when CTSn pin is configured as a peripheral pin for SCI module. Do not configure CTSn pin if the hardware flow control is not desired.
      • +
    +

    +Limitations

    +
      +
    • Reception is still enabled after uart_api_t::communicationAbort API is called. Any characters received after abort and before the next call to read will arrive via the callback function with event UART_EVENT_RX_CHAR.
      • +
    +

    +DMAC Limitations

    +
      +
    • DMAC support is available for reception, but labeled as [Not recommended]. This is because the UART bytes are received asynchronously. Bytes can be received between calls to R_SCI_B_UART_Read(). The logic required to combine bytes received through R_SCI_B_UART_Read() (UART_EVENT_RX_COMPLETE) and bytes received between calls (UART_EVENT_RX_CHAR) is complex. The UART_EVENT_RX_CHAR event would not be triggered when the DMAC is enabled for reception.
      • +
    +

    +Examples

    +

    SCI UART Example

    +
    uint8_t g_dest[TRANSFER_LENGTH];
    uint8_t g_src[TRANSFER_LENGTH];
    uint8_t g_out_of_band_received[TRANSFER_LENGTH];
    uint32_t g_transfer_complete = 0;
    uint32_t g_receive_complete = 0;
    uint32_t g_out_of_band_index = 0;
    void r_sci_b_uart_basic_example (void)
    {
    /* Initialize p_src to known data */
    for (uint32_t i = 0; i < TRANSFER_LENGTH; i++)
    {
    g_src[i] = (uint8_t) ('A' + (i % 26));
    }
    /* Open the transfer instance with initial configuration. */
    fsp_err_t err = R_SCI_B_UART_Open(&g_uart0_ctrl, &g_uart0_cfg);
    assert(FSP_SUCCESS == err);
    err = R_SCI_B_UART_Read(&g_uart0_ctrl, g_dest, TRANSFER_LENGTH);
    assert(FSP_SUCCESS == err);
    err = R_SCI_B_UART_Write(&g_uart0_ctrl, g_src, TRANSFER_LENGTH);
    assert(FSP_SUCCESS == err);
    while (!g_transfer_complete)
    {
    }
    while (!g_receive_complete)
    {
    }
    }
    void example_callback (uart_callback_args_t * p_args)
    {
    /* Handle the UART event */
    switch (p_args->event)
    {
    /* Received a character */
    case UART_EVENT_RX_CHAR:
    {
    /* Only put the next character in the receive buffer if there is space for it */
    if (sizeof(g_out_of_band_received) > g_out_of_band_index)
    {
    /* Write either the next one or two bytes depending on the receive data size */
    if (UART_DATA_BITS_8 >= g_uart0_cfg.data_bits)
    {
    g_out_of_band_received[g_out_of_band_index++] = (uint8_t) p_args->data;
    }
    else
    {
    uint16_t * p_dest = (uint16_t *) &g_out_of_band_received[g_out_of_band_index];
    *p_dest = (uint16_t) p_args->data;
    g_out_of_band_index += 2;
    }
    }
    break;
    }
    /* Receive complete */
    case UART_EVENT_RX_COMPLETE:
    {
    g_receive_complete = 1;
    break;
    }
    /* Transmit complete */
    case UART_EVENT_TX_COMPLETE:
    {
    g_transfer_complete = 1;
    break;
    }
    default:
    {
    }
    }
    }

    SCI UART Baud Set Example

    +
    #define SCI_B_UART_BAUDRATE_19200 (19200)
    #define SCI_B_UART_BAUDRATE_ERROR_PERCENT_5 (5000)
    void r_sci_b_uart_baud_example (void)
    {
    sci_b_baud_setting_t baud_setting;
    uint32_t baud_rate = SCI_B_UART_BAUDRATE_19200;
    bool enable_bitrate_modulation = false;
    uint32_t error_rate_x_1000 = SCI_B_UART_BAUDRATE_ERROR_PERCENT_5;
    fsp_err_t err = R_SCI_B_UART_BaudCalculate(baud_rate, enable_bitrate_modulation, error_rate_x_1000, &baud_setting);
    assert(FSP_SUCCESS == err);
    err = R_SCI_B_UART_BaudSet(&g_uart0_ctrl, (void *) &baud_setting);
    assert(FSP_SUCCESS == err);
    }
    + + + + + + + + + + + +

    +Data Structures

    struct  sci_b_uart_instance_ctrl_t
     
    struct  sci_b_baud_setting_t
     
    struct  sci_b_uart_rs485_setting_t
     
    struct  sci_b_uart_half_data_setting_t
     
    struct  sci_b_uart_extended_cfg_t
     
    + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  sci_b_clk_src_t
     
    enum  sci_b_uart_flow_control_t
     
    enum  sci_b_uart_rx_fifo_trigger_t
     
    enum  sci_b_uart_start_bit_detect_t
     
    enum  sci_b_uart_noise_cancellation_t
     
    enum  sci_b_uart_rs485_enable_t
     
    enum  sci_b_uart_rs485_de_polarity_t
     
    enum  sci_b_uart_half_data_enable_t
     
    +

    Data Structure Documentation

    + +

    ◆ sci_b_uart_instance_ctrl_t

    + +
    +
    + + + + +
    struct sci_b_uart_instance_ctrl_t
    +
    +

    UART instance control block.

    +
    +
    +
    + +

    ◆ sci_b_baud_setting_t

    + +
    +
    + + + + +
    struct sci_b_baud_setting_t
    +
    +

    Register settings to acheive a desired baud rate and modulation duty.

    +
    +
    +
    + +

    ◆ sci_b_uart_rs485_setting_t

    + +
    +
    + + + + +
    struct sci_b_uart_rs485_setting_t
    +
    +

    Configuration settings for controlling the DE signal for RS-485.

    +
    + + + + + + + + + + + + + +
    Data Fields
    +sci_b_uart_rs485_enable_t +enable +Enable the DE signal.
    +sci_b_uart_rs485_de_polarity_t +polarity +DE signal polarity.
    +uint8_t +assertion_time: 5 +Time in baseclock units after assertion of the DE signal and before the start of the write transfer.
    +uint8_t +negation_time: 5 +Time in baseclock units after the end of a write transfer and before the DE signal is negated.
    + +
    +
    + +

    ◆ sci_b_uart_half_data_setting_t

    + +
    +
    + + + + +
    struct sci_b_uart_half_data_setting_t
    +
    +

    Configuration settings for controlling the Half Data Function

    +
    + + + + +
    Data Fields
    +sci_b_uart_half_data_enable_t +enable +Enable the half data Function.
    + +
    +
    + +

    ◆ sci_b_uart_extended_cfg_t

    + +
    +
    + + + + +
    struct sci_b_uart_extended_cfg_t
    +
    +

    UART on SCI device Configuration

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +sci_b_clk_src_t +clock +The source clock for the baud-rate generator. If internal optionally output baud rate on SCK.
    +sci_b_uart_start_bit_detect_t +rx_edge_start +Start reception on falling edge.
    +sci_b_uart_noise_cancellation_t +noise_cancel +Noise cancellation setting.
    +sci_b_baud_setting_t * +p_baud_setting +Register settings for a desired baud rate.
    +sci_b_uart_rx_fifo_trigger_t +rx_fifo_trigger +Receive FIFO trigger level, unused if channel has no FIFO or if DTC or DMAC is used.
    +bsp_io_port_pin_t +flow_control_pin +UART Driver Enable pin.
    +sci_b_uart_flow_control_t +flow_control +CTS/RTS function of the SSn pin.
    +sci_b_uart_rs485_setting_t +rs485_setting +RS-485 settings.
    +sci_b_uart_half_data_setting_t +half_data_setting +Half Data Function settings.
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ sci_b_clk_src_t

    + +
    +
    + + + + +
    enum sci_b_clk_src_t
    +
    +

    Enumeration for SCI clock source

    + + + + + +
    Enumerator
    SCI_B_UART_CLOCK_INT 

    Use internal clock for baud generation.

    +
    SCI_B_UART_CLOCK_INT_WITH_BAUDRATE_OUTPUT 

    Use internal clock for baud generation and output on SCK.

    +
    SCI_B_UART_CLOCK_EXT8X 

    Use external clock 8x baud rate.

    +
    SCI_B_UART_CLOCK_EXT16X 

    Use external clock 16x baud rate.

    +
    + +
    +
    + +

    ◆ sci_b_uart_flow_control_t

    + +
    +
    + + + + +
    enum sci_b_uart_flow_control_t
    +
    +

    UART flow control mode definition

    + + + + + +
    Enumerator
    SCI_B_UART_FLOW_CONTROL_RTS 

    Use CTSn_RTSn pin for RTS.

    +
    SCI_B_UART_FLOW_CONTROL_CTS 

    Use CTSn_RTSn pin for CTS.

    +
    SCI_B_UART_FLOW_CONTROL_HARDWARE_CTSRTS 

    Use CTSn pin for CTS, CTSn_RTSn pin for RTS.

    +
    SCI_B_UART_FLOW_CONTROL_CTSRTS 

    Use CTSn_RTSn pin for CTS, external pin for RTS.

    +
    + +
    +
    + +

    ◆ sci_b_uart_rx_fifo_trigger_t

    + +
    +
    + + + + +
    enum sci_b_uart_rx_fifo_trigger_t
    +
    +

    Receive FIFO trigger configuration.

    + + + +
    Enumerator
    SCI_B_UART_RX_FIFO_TRIGGER_1 

    Callback after each byte is received without buffering.

    +
    SCI_B_UART_RX_FIFO_TRIGGER_MAX 

    Callback when FIFO is full or after 31 bit times with no data (fewer interrupts)

    +
    + +
    +
    + +

    ◆ sci_b_uart_start_bit_detect_t

    + +
    +
    + + + + +
    enum sci_b_uart_start_bit_detect_t
    +
    +

    Asynchronous Start Bit Edge Detection configuration.

    + + + +
    Enumerator
    SCI_B_UART_START_BIT_LOW_LEVEL 

    Detect low level on RXDn pin as start bit.

    +
    SCI_B_UART_START_BIT_FALLING_EDGE 

    Detect falling level on RXDn pin as start bit.

    +
    + +
    +
    + +

    ◆ sci_b_uart_noise_cancellation_t

    + +
    +
    + + + + +
    enum sci_b_uart_noise_cancellation_t
    +
    +

    Noise cancellation configuration.

    + + + +
    Enumerator
    SCI_B_UART_NOISE_CANCELLATION_DISABLE 

    Disable noise cancellation.

    +
    SCI_B_UART_NOISE_CANCELLATION_ENABLE 

    Enable noise cancellation.

    +
    + +
    +
    + +

    ◆ sci_b_uart_rs485_enable_t

    + +
    +
    + + + + +
    enum sci_b_uart_rs485_enable_t
    +
    +

    RS-485 Enable/Disable.

    + + + +
    Enumerator
    SCI_B_UART_RS485_DISABLE 

    RS-485 disabled.

    +
    SCI_B_UART_RS485_ENABLE 

    RS-485 enabled.

    +
    + +
    +
    + +

    ◆ sci_b_uart_rs485_de_polarity_t

    + +
    +
    + + + + +
    enum sci_b_uart_rs485_de_polarity_t
    +
    +

    The polarity of the RS-485 DE signal.

    + + + +
    Enumerator
    SCI_B_UART_RS485_DE_POLARITY_HIGH 

    The DE signal is high when a write transfer is in progress.

    +
    SCI_B_UART_RS485_DE_POLARITY_LOW 

    The DE signal is low when a write transfer is in progress.

    +
    + +
    +
    + +

    ◆ sci_b_uart_half_data_enable_t

    + +
    +
    + + + + +
    enum sci_b_uart_half_data_enable_t
    +
    +

    Half Data Function Enable/Disable.

    + + + +
    Enumerator
    SCI_B_UART_HALF_DATA_DISABLE 

    Half Data Function disabled.

    +
    SCI_B_UART_HALF_DATA_ENABLE 

    Half Data Function enabled.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_SCI_B_UART_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_Open (uart_ctrl_t *const p_api_ctrl,
    uart_cfg_t const *const p_cfg 
    )
    +
    +

    Configures the UART driver based on the input configurations. If reception is enabled at compile time, reception is enabled at the end of this function. Implements uart_api_t::open

    +
    Return values
    + + + + + + +
    FSP_SUCCESSChannel opened successfully.
    FSP_ERR_ASSERTIONPointer to UART control block or configuration structure is NULL.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe requested channel does not exist on this MCU.
    FSP_ERR_INVALID_ARGUMENTFlow control is enabled but flow control pin is not defined.
    FSP_ERR_ALREADY_OPENControl block has already been opened or channel is being used by another instance. Call close() then open() to reconfigure.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes. This function calls: +
    + +
    +
    + +

    ◆ R_SCI_B_UART_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_Read (uart_ctrl_t *const p_api_ctrl,
    uint8_t *const p_dest,
    uint32_t const bytes 
    )
    +
    +

    Receives user specified number of bytes into destination buffer pointer. Implements uart_api_t::read

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSData reception successfully ends.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL. Number of transfers outside the max or min boundary when transfer instance used
    FSP_ERR_INVALID_ARGUMENTDestination address or data size is not valid for 9-bit mode.
    FSP_ERR_NOT_OPENThe control block has not been opened
    FSP_ERR_IN_USEA previous read operation is still in progress.
    FSP_ERR_UNSUPPORTEDSCI_B_UART_CFG_RX_ENABLE is set to 0
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes. This function calls: +
    +
    Note
    If 9-bit data length is specified at R_SCI_B_UART_Open call, p_dest must be aligned 16-bit boundary.
    + +
    +
    + +

    ◆ R_SCI_B_UART_Write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_Write (uart_ctrl_t *const p_api_ctrl,
    uint8_t const *const p_src,
    uint32_t const bytes 
    )
    +
    +

    Transmits user specified number of bytes from the source buffer pointer. Implements uart_api_t::write

    +
    Return values
    + + + + + + + +
    FSP_SUCCESSData transmission finished successfully.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL. Number of transfers outside the max or min boundary when transfer instance used
    FSP_ERR_INVALID_ARGUMENTSource address or data size is not valid for 9-bit mode.
    FSP_ERR_NOT_OPENThe control block has not been opened
    FSP_ERR_IN_USEA UART transmission is in progress
    FSP_ERR_UNSUPPORTEDSCI_B_UART_CFG_TX_ENABLE is set to 0
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes. This function calls: +
    +
    Note
    If 9-bit data length is specified at R_SCI_B_UART_Open call, p_src must be aligned on a 16-bit boundary.
    + +
    +
    + +

    ◆ R_SCI_B_UART_BaudSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_BaudSet (uart_ctrl_t *const p_api_ctrl,
    void const *const p_baud_setting 
    )
    +
    +

    Updates the baud rate using the clock selected in Open. p_baud_setting is a pointer to a sci_b_baud_setting_t structure. Implements uart_api_t::baudSet

    +
    Warning
    This terminates any in-progress transmission.
    +
    Return values
    + + + + +
    FSP_SUCCESSBaud rate was successfully changed.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL or the UART is not configured to use the internal clock.
    FSP_ERR_NOT_OPENThe control block has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_UART_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_InfoGet (uart_ctrl_t *const p_api_ctrl,
    uart_info_t *const p_info 
    )
    +
    +

    Provides the driver information, including the maximum number of bytes that can be received or transmitted at a time. Implements uart_api_t::infoGet

    +
    Return values
    + + + + +
    FSP_SUCCESSInformation stored in provided p_info.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_UART_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_SCI_B_UART_Close (uart_ctrl_t *const p_api_ctrl)
    +
    +

    Aborts any in progress transfers. Disables interrupts, receiver, and transmitter. Closes lower level transfer drivers if used. Removes power. Implements uart_api_t::close

    +
    Return values
    + + + + +
    FSP_SUCCESSChannel successfully closed.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_UART_Abort()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_Abort (uart_ctrl_t *const p_api_ctrl,
    uart_dir_t communication_to_abort 
    )
    +
    +

    Provides API to abort ongoing transfer. Transmission is aborted after the current character is transmitted. Reception is still enabled after abort(). Any characters received after abort() and before the transfer is reset in the next call to read(), will arrive via the callback function with event UART_EVENT_RX_CHAR. Implements uart_api_t::communicationAbort

    +
    Return values
    + + + + + +
    FSP_SUCCESSUART transaction aborted successfully.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_UNSUPPORTEDThe requested Abort direction is unsupported.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes. This function calls: +
    + +
    +
    + +

    ◆ R_SCI_B_UART_BaudCalculate()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_BaudCalculate (uint32_t baudrate,
    bool bitrate_modulation,
    uint32_t baud_rate_error_x_1000,
    sci_b_baud_setting_t *const p_baud_setting 
    )
    +
    +

    Calculates baud rate register settings. Evaluates and determines the best possible settings set to the baud rate related registers.

    +
    Parameters
    + + + + + +
    [in]baudrateBaud rate [bps]. For example, 19200, 57600, 115200, etc.
    [in]bitrate_modulationEnable bitrate modulation
    [in]baud_rate_error_x_1000Max baud rate error. At most <baud_rate_percent_error> x 1000 required for module to function. Absolute max baud_rate_error is 15000 (15%).
    [out]p_baud_settingBaud setting information stored here if successful
    +
    +
    +
    Return values
    + + + + +
    FSP_SUCCESSBaud rate is set successfully
    FSP_ERR_ASSERTIONNull pointer
    FSP_ERR_INVALID_ARGUMENTBaud rate is '0', error in calculated baud rate is larger than requested max error, or requested max error in baud rate is larger than 15%.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_UART_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_CallbackSet (uart_ctrl_t *const p_api_ctrl,
    void(*)(uart_callback_args_t *) p_callback,
    void const *const p_context,
    uart_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements uart_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_SCI_B_UART_ReadStop()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCI_B_UART_ReadStop (uart_ctrl_t *const p_api_ctrl,
    uint32_t * remaining_bytes 
    )
    +
    +

    Provides API to abort ongoing read. Reception is still enabled after abort(). Any characters received after abort() and before the transfer is reset in the next call to read(), will arrive via the callback function with event UART_EVENT_RX_CHAR. Implements uart_api_t::readStop

    +
    Return values
    + + + + + +
    FSP_SUCCESSUART transaction aborted successfully.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_UNSUPPORTEDThe requested Abort direction is unsupported.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes. This function calls: +
    + +
    +
    +
    +
    + + + + + diff --git a/group___s_c_i___b___u_a_r_t.js b/group___s_c_i___b___u_a_r_t.js new file mode 100644 index 0000000..147a4e6 --- /dev/null +++ b/group___s_c_i___b___u_a_r_t.js @@ -0,0 +1,71 @@ +var group___s_c_i___b___u_a_r_t = +[ + [ "sci_b_uart_instance_ctrl_t", "group___s_c_i___b___u_a_r_t.html#structsci__b__uart__instance__ctrl__t", null ], + [ "sci_b_baud_setting_t", "group___s_c_i___b___u_a_r_t.html#structsci__b__baud__setting__t", null ], + [ "sci_b_uart_rs485_setting_t", "group___s_c_i___b___u_a_r_t.html#structsci__b__uart__rs485__setting__t", [ + [ "enable", "group___s_c_i___b___u_a_r_t.html#a99de4af724a14ceba347cb317614cc91", null ], + [ "polarity", "group___s_c_i___b___u_a_r_t.html#a10b4002e82c8ca1eee90e84e3cdff02d", null ], + [ "assertion_time", "group___s_c_i___b___u_a_r_t.html#ae2e7a853b139015cb777e556e9add242", null ], + [ "negation_time", "group___s_c_i___b___u_a_r_t.html#adeab6a6a24f0ccbf45a24fd0185f1e3b", null ] + ] ], + [ "sci_b_uart_half_data_setting_t", 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"sci_b_uart_rs485_enable_t", "group___s_c_i___b___u_a_r_t.html#gacab2c97394068299908eb68925eb9fc2", [ + [ "SCI_B_UART_RS485_DISABLE", "group___s_c_i___b___u_a_r_t.html#ggacab2c97394068299908eb68925eb9fc2aecd04009e4cd1a48fabc0df33c320e91", null ], + [ "SCI_B_UART_RS485_ENABLE", "group___s_c_i___b___u_a_r_t.html#ggacab2c97394068299908eb68925eb9fc2add22e1606ec4ab3accaa55c69d8f657a", null ] + ] ], + [ "sci_b_uart_rs485_de_polarity_t", "group___s_c_i___b___u_a_r_t.html#ga0563689caceebd791581b050e4961351", [ + [ "SCI_B_UART_RS485_DE_POLARITY_HIGH", "group___s_c_i___b___u_a_r_t.html#gga0563689caceebd791581b050e4961351a86f62195b4aa840c0d10ac01299fe4cd", null ], + [ "SCI_B_UART_RS485_DE_POLARITY_LOW", "group___s_c_i___b___u_a_r_t.html#gga0563689caceebd791581b050e4961351a18e7bfd946135c6768a8918b7d7dd954", null ] + ] ], + [ "sci_b_uart_half_data_enable_t", "group___s_c_i___b___u_a_r_t.html#ga3bcc863f7888e3aaee224f8854988414", [ + [ "SCI_B_UART_HALF_DATA_DISABLE", "group___s_c_i___b___u_a_r_t.html#gga3bcc863f7888e3aaee224f8854988414a637f7cea2b6601327efb3c85365a4dbd", null ], + [ "SCI_B_UART_HALF_DATA_ENABLE", "group___s_c_i___b___u_a_r_t.html#gga3bcc863f7888e3aaee224f8854988414a4e3532db5f60d5a8779e0a5b6f1813f4", null ] + ] ], + [ "R_SCI_B_UART_Open", "group___s_c_i___b___u_a_r_t.html#ga60643fd4c7b00970ad9d295302498f13", null ], + [ "R_SCI_B_UART_Read", "group___s_c_i___b___u_a_r_t.html#gaa0e296b71701a2d0045add3c75d2fdd7", null ], + [ "R_SCI_B_UART_Write", "group___s_c_i___b___u_a_r_t.html#gad8456e403e88d52e1e858b62e19a2d0b", null ], + [ "R_SCI_B_UART_BaudSet", "group___s_c_i___b___u_a_r_t.html#gad9ae4780db497c17ae0c1677573f0320", null ], + [ "R_SCI_B_UART_InfoGet", "group___s_c_i___b___u_a_r_t.html#gafe20c9d0e52f1186c60033a5a1910119", null ], + [ "R_SCI_B_UART_Close", "group___s_c_i___b___u_a_r_t.html#ga91e1364f8fd7b00073ccdb72a1bd34e9", null ], + [ "R_SCI_B_UART_Abort", "group___s_c_i___b___u_a_r_t.html#ga4c327408aaf082057bae8c89127e396c", null ], + [ "R_SCI_B_UART_BaudCalculate", "group___s_c_i___b___u_a_r_t.html#gaafe9521b01cb274f8c8e45a4f62b020f", null ], + [ "R_SCI_B_UART_CallbackSet", "group___s_c_i___b___u_a_r_t.html#gabc9e9188d0150ff75f69f3217312691f", null ], + [ "R_SCI_B_UART_ReadStop", "group___s_c_i___b___u_a_r_t.html#ga60ee90741cf1240c127d75acf9df50ed", null ] +]; \ No newline at end of file diff --git a/group___s_c_i_f___u_a_r_t.html b/group___s_c_i_f___u_a_r_t.html index 9142ee1..23ece20 100644 --- a/group___s_c_i_f___u_a_r_t.html +++ b/group___s_c_i_f___u_a_r_t.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Serial Communications Interface (SCIF) UART (r_scif_uart) +RZV Flexible Software Package Documentation: Serial Communications Interface (SCIF) UART (r_scif_uart) @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Functions | Data Structures | Enumerations
    -
    Serial Communications Interface (SCIF) UART (r_scif_uart)
    Modules
    +
    Serial Communications Interface (SCIF) UART (r_scif_uart)
    Modules » Connectivity
    @@ -117,6 +185,8 @@ + +
     
    fsp_err_t R_SCIF_UART_BaudCalculate (uart_ctrl_t *const p_api_ctrl, uint32_t baudrate, bool bitrate_modulation, uint32_t baud_rate_error_x_1000, scif_baud_setting_t *const p_baud_setting)
     
    fsp_err_t R_SCIF_UART_ReadStop (uart_ctrl_t *const p_api_ctrl, uint32_t *remaining_bytes)
     
    fsp_err_t R_SCIF_UART_CallbackSet (uart_ctrl_t *const p_api_ctrl, void(*p_callback)(uart_callback_args_t *), void const *const p_context, uart_callback_args_t *const p_callback_memory)
     
    @@ -155,23 +225,25 @@

    Default (BSP) If selected code for parameter checking is included in the build. +DMAC SupportMCU Specific OptionsEnable DMAC support for the SCIF_UART module. + RS485 Flow (Driver Enable) Control Support
    • -Enable
      • +Enabled
    • -Disable
      • +Disabled
    -Disable Enable RS485 flow (driver enable) control support using a user provided pin. +Disabled Enable RS485 flow (driver enable) control support using a user provided pin. -

    Configurations for Driver > Connectivity > UART Driver on r_scif_uart

    -This module can be added to the Stacks tab via New Stack > Driver > Connectivity > UART Driver on r_scif_uart.
    +

    Configurations for Connectivity > UART Driver on r_scif_uart

    +This module can be added to the Stacks tab via New Stack > Connectivity > UART Driver on r_scif_uart.

    - + - - - + - + - + + + + + + - + - + @@ -304,10 +336,12 @@

    Configurations for Driver > Connectivity > UART Driver on r_scif_uart<

    Clock Configuration

    -

    The clock for this module is derived from the following peripheral clock for each MPU group:
    +

    The clock for this module is derived from the following peripheral clock for each MCU group:

    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_uart0 Module name.
    General > ChannelChannel number does not exist0 Select the SCIF channel.
    General > ChannelChannel number must be a positive integer0 Select the SCIF channel.
    General > Data Bits
    • @@ -223,73 +295,33 @@

      Configurations for Driver > Connectivity > UART Driver on r_scif_uart<

    		RS232 Select the UART communication mode as either RS232 or RS485.
    Flow Control > RS485 Driver Enable PortRefer to the Configuration tool for available options.Disabled Specify the flow control pin port for the MPU.
    Flow Control > RS485 Driver Enable Pin
      -
    • -Disabled
      • -
    • -00
      • -
    • -01
      • -
    • -02
      • +
    		Flow Control > RS485 Driver Enable Pin Polarity
    • -03
      • +Active Low
    • -04
      • +Active High
    -    		Disabled Specify the flow control pin for the MPU.
    Active High Enabling baud rate modulation reduces the percent error of the actual baud rate with respect to the requested baud rate. It does this by modulating the number of cycles per clock, so some bits are slightly longer than others.
    Flow Control > RS232C Automatic Flow Control
      -
    • -Enabled
      • -
    • -Disabled
      • -
    -    		Disabled Enable RS232C automatic flow control.
    Flow Control > RS485 Driver Enable PortMCU Specific OptionsSpecify the flow control pin port for the MPU.
    Extra > Clock Source
      -
    • -Internal Clock
      • -
    • -Internal Clock With Output on SCK
      • -
    • -External Clock 8x baud rate
      • -
    • -External Clock 16x baud rate
      • -
    -    		Internal Clock Selection of the clock source to be used in the baud-rate clock generator. When internal clock is used the baud rate can be output on the SCK pin.
    Flow Control > RS485 Driver Enable PinMCU Specific OptionsSpecify the flow control pin for the MPU.
    Flow Control > RS232C Automatic Flow ControlMCU Specific OptionsEnable RS232C automatic flow control.
    Extra > Clock SourceMCU Specific OptionsSelection of the clock source to be used in the baud-rate clock generator. When internal clock is used the baud rate can be output on the SCK pin.
    Extra > Noise Filter
    • -Enable
      • +Enabled
    • -Disable
      • +Disabled
    -    		Disable Enable the digital noise filter on RXDn pin. The digital noise filter block in SCIF consists of two-stage flipflop circuits.
    Disabled Enable the digital noise filter on RXDn pin. The digital noise filter block in SCIF consists of two-stage flipflop circuits.
    Extra > Receive FIFO Trigger LevelRefer to the Configuration tool for available options.Max Set to One to get a callback immediately when each byte is received. Set to Max to get a callback when FIFO is full or after 15 bit times with no data (fewer interrupts).
    Extra > Receive FIFO Trigger LevelRefer to the RZV Configuration tool for available options.Max Set to One to get a callback immediately when each byte is received. Set to Max to get a callback when FIFO is full or after 15 bit times with no data (fewer interrupts).
    Extra > Receive FIFO RTS Trigger Level
      -
    • -1
      • -
    • -4
      • -
    • -6
      • -
    • -8
      • -
    • -10
      • -
    • -12
      • -
    • -14
      • -
    • -15
      • -
    -    		14 Trigger level for negative the RTS
    Extra > Receive FIFO RTS Trigger LevelMCU Specific OptionsTrigger level for negative the RTS
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
    - + + +
    MPU GroupPeripheral Clock
    MCU GroupPeripheral Clock
    RZV2HP1CLK
    RZV2LP0CLK
    @@ -334,6 +368,8 @@

    SCIF UART Example

      struct  scif_baud_setting_t   +struct  sci_uart_rs485_setting_t +  struct  scif_uart_extended_cfg_t   @@ -347,6 +383,10 @@

    SCIF UART Example

    + + + + @@ -383,9 +423,9 @@

    +struct scif_baud_setting_t +semr_baudrate_bits_b - - - + + +
     
    enum  scif_uart_noise_cancellation_t
     
    enum  sci_uart_rs485_enable_t
     
    enum  sci_uart_rs485_de_polarity_t
     
    enum  scif_uart_receive_trigger_t
     
    enum  scif_uart_rts_trigger_t
    Data Fields
    -struct scif_baud_setting_t -__unnamed__
    @@ -402,6 +442,42 @@

    +

    ◆ sci_uart_rs485_setting_t

    + +
    +
    + + + + +
    struct sci_uart_rs485_setting_t
    +
    +

    Configuration settings for controlling the DE signal for RS-485.

    +
    + + + + + + + + + + +
    Data Fields
    +sci_uart_rs485_enable_t +enable +Enable the DE signal.
    +sci_uart_rs485_de_polarity_t +polarity +DE signal polarity.
    +bsp_io_port_pin_t +de_control_pin +UART Driver Enable pin.
    +
    @@ -467,17 +543,17 @@

    UART communication mode selection.

    -bsp_io_port_pin_t -driver_enable_pin -UART Driver Enable pin.
    scif_uart_flow_control_t flow_control CTS/RTS function.
    +sci_uart_rs485_setting_t +rs485_setting +RS-485 settings.
    @@ -571,6 +647,48 @@

    +

    ◆ sci_uart_rs485_enable_t

    + +
    +
    + + + + +
    enum sci_uart_rs485_enable_t
    +
    +

    RS-485 Enable/Disable.

    + + + +
    Enumerator
    SCI_UART_RS485_DISABLE 

    RS-485 disabled.

    +
    SCI_UART_RS485_ENABLE 

    RS-485 enabled.

    +
    + +
    +
    + +

    ◆ sci_uart_rs485_de_polarity_t

    + +
    +
    + + + + +
    enum sci_uart_rs485_de_polarity_t
    +
    +

    The polarity of the RS-485 DE signal.

    + + + +
    Enumerator
    SCI_UART_RS485_DE_POLARITY_HIGH 

    The DE signal is high when a write transfer is in progress.

    +
    SCI_UART_RS485_DE_POLARITY_LOW 

    The DE signal is low when a write transfer is in progress.

    +
    +
    @@ -657,6 +775,8 @@

    SCIF_UART_RTS_TRIGGER_15 

    RTS trigger level = 15.

    +SCIF_UART_RTS_TRIGGER_DISABLE 

    Disable RTS trigger.

    +

    @@ -693,7 +813,8 @@

    FSP_SUCCESSChannel opened successfully. FSP_ERR_ASSERTIONPointer to UART control block or configuration structure is NULL. FSP_ERR_IP_CHANNEL_NOT_PRESENTThe requested channel does not exist on this MPU. - FSP_ERR_ALREADY_OPENControl block has already been opened or channel is being used by another instance. Call close() then open() to reconfigure. + FSP_ERR_ALREADY_OPENControl block has already been opened or channel is being used by another instance. Call close() then open() to reconfigure. + FSP_ERR_INVALID_ARGUMENTSetting for RS485 DE Control pin is invalid @@ -997,6 +1118,45 @@

    +

    ◆ R_SCIF_UART_ReadStop()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SCIF_UART_ReadStop (uart_ctrl_t *const p_api_ctrl,
    uint32_t * remaining_bytes 
    )
    +
    +

    Provides API to abort ongoing read. Reception is still enabled after abort(). Any characters received after abort() and before the transfer is reset in the next call to read(), will arrive via the callback function with event UART_EVENT_RX_CHAR. Implements uart_api_t::readStop

    +
    Return values
    + + + + + +
    FSP_SUCCESSUART transaction aborted successfully.
    FSP_ERR_ASSERTIONPointer to UART control block is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_UNSUPPORTEDThe requested Abort direction is unsupported.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes.
    +
    @@ -1055,7 +1215,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___s_c_i_f___u_a_r_t.js b/group___s_c_i_f___u_a_r_t.js index a4de306..6a3f1c4 100644 --- a/group___s_c_i_f___u_a_r_t.js +++ b/group___s_c_i_f___u_a_r_t.js @@ -5,6 +5,11 @@ var group___s_c_i_f___u_a_r_t = [ "brr", "group___s_c_i_f___u_a_r_t.html#acc601128ecd5e04fcc306b249a2bb7bf", null ], [ "mddr", "group___s_c_i_f___u_a_r_t.html#acbf8ff1fb27039b0240beceeff67d048", null ] ] ], + [ "sci_uart_rs485_setting_t", "group___s_c_i_f___u_a_r_t.html#structsci__uart__rs485__setting__t", [ + [ "enable", "group___s_c_i_f___u_a_r_t.html#a7ecf6bb47dcdafcd7e569695d0be405b", null ], + [ "polarity", "group___s_c_i_f___u_a_r_t.html#aafcbd1f2c02e2f81d81371bb9e6b895d", null ], + [ "de_control_pin", "group___s_c_i_f___u_a_r_t.html#a2e764fad5f11c412720a531a8e1b6815", null ] + ] ], [ "scif_uart_extended_cfg_t", "group___s_c_i_f___u_a_r_t.html#structscif__uart__extended__cfg__t", [ [ "bri_ipl", "group___s_c_i_f___u_a_r_t.html#a3fa97958f621b33bee457ec6bc136bed", null ], [ "bri_irq", "group___s_c_i_f___u_a_r_t.html#a172e0b3047c07502b68ff88471e787ee", null ], @@ -14,8 +19,8 @@ var group___s_c_i_f___u_a_r_t = [ "rx_fifo_trigger", "group___s_c_i_f___u_a_r_t.html#a1067241f2267052cd8240d136c0cba9c", null ], [ "rts_fifo_trigger", "group___s_c_i_f___u_a_r_t.html#a04920b030d567052f3b4efb1f85753e9", null ], [ "uart_mode", "group___s_c_i_f___u_a_r_t.html#a1c9c1ba263a956a8224a1156d6bc03a1", null ], - [ "driver_enable_pin", "group___s_c_i_f___u_a_r_t.html#aed0a20c432a538f3c20a83c50e76be3b", null ], - [ "flow_control", "group___s_c_i_f___u_a_r_t.html#aa761132ebac67c5cbbc3d6a505b97efe", null ] + [ "flow_control", "group___s_c_i_f___u_a_r_t.html#aa761132ebac67c5cbbc3d6a505b97efe", null ], + [ "rs485_setting", "group___s_c_i_f___u_a_r_t.html#a17bbc99632889e12269013e35f1dcfba", null ] ] ], [ "scif_clk_src_t", "group___s_c_i_f___u_a_r_t.html#gaa31fbf8041a381d6da9c454be58ad613", [ [ "SCIF_UART_CLOCK_INT", "group___s_c_i_f___u_a_r_t.html#ggaa31fbf8041a381d6da9c454be58ad613a51c6cc623adda130f372f24e12128e4b", null ], @@ -36,6 +41,14 @@ var group___s_c_i_f___u_a_r_t = [ "SCIF_UART_NOISE_CANCELLATION_DISABLE", "group___s_c_i_f___u_a_r_t.html#gga94601e39cbf40b77e5e4236385b58704ad882f64a494b61ff64e551ad3011a5b7", null ], [ "SCIF_UART_NOISE_CANCELLATION_ENABLE", "group___s_c_i_f___u_a_r_t.html#gga94601e39cbf40b77e5e4236385b58704ad3f821ad6438fb954b659c75d156d662", null ] ] ], + [ "sci_uart_rs485_enable_t", "group___s_c_i_f___u_a_r_t.html#ga9522502f434bcaa2bbaf9cb1321ce542", [ + [ "SCI_UART_RS485_DISABLE", "group___s_c_i_f___u_a_r_t.html#gga9522502f434bcaa2bbaf9cb1321ce542aa05bec8fad1420e777b184f55300b484", null ], + [ "SCI_UART_RS485_ENABLE", "group___s_c_i_f___u_a_r_t.html#gga9522502f434bcaa2bbaf9cb1321ce542acd3ee665f5225c5bb017bb64d33cf127", null ] + ] ], + [ "sci_uart_rs485_de_polarity_t", "group___s_c_i_f___u_a_r_t.html#ga0bd2440ef30f2feca9a2d129989bffce", [ + [ "SCI_UART_RS485_DE_POLARITY_HIGH", "group___s_c_i_f___u_a_r_t.html#gga0bd2440ef30f2feca9a2d129989bffcea7cfd9e1ff7eca0657388f7cf9ce708fc", null ], + [ "SCI_UART_RS485_DE_POLARITY_LOW", "group___s_c_i_f___u_a_r_t.html#gga0bd2440ef30f2feca9a2d129989bffceac1a061d1cb22d6b336e23185af20e089", null ] + ] ], [ "scif_uart_receive_trigger_t", "group___s_c_i_f___u_a_r_t.html#ga5d3f2e170b79de59f46ae864fc993e95", [ [ "SCIF_UART_RECEIVE_TRIGGER_ONE", "group___s_c_i_f___u_a_r_t.html#gga5d3f2e170b79de59f46ae864fc993e95ad8eb49bdf41e9867d8a6d0986b9343a6", null ], [ "SCIF_UART_RECEIVE_TRIGGER_QUARTER", "group___s_c_i_f___u_a_r_t.html#gga5d3f2e170b79de59f46ae864fc993e95ab85d375110c92593e11c02c28acf75a0", null ], @@ -65,7 +78,8 @@ var group___s_c_i_f___u_a_r_t = [ "SCIF_UART_RTS_TRIGGER_10", "group___s_c_i_f___u_a_r_t.html#ggaaee66fa30e6f9f0efb538ecb91a9ad89a94a36bf05c3529a4eb80aa4386fd1bf3", null ], [ "SCIF_UART_RTS_TRIGGER_12", "group___s_c_i_f___u_a_r_t.html#ggaaee66fa30e6f9f0efb538ecb91a9ad89ad0db387e28a0ed3d63add574f599e026", null ], [ "SCIF_UART_RTS_TRIGGER_14", "group___s_c_i_f___u_a_r_t.html#ggaaee66fa30e6f9f0efb538ecb91a9ad89afd80607e5a941b03255635196a53a004", null ], - [ "SCIF_UART_RTS_TRIGGER_15", "group___s_c_i_f___u_a_r_t.html#ggaaee66fa30e6f9f0efb538ecb91a9ad89a72f3e438f603dd31866ee7002856934a", null ] + [ "SCIF_UART_RTS_TRIGGER_15", "group___s_c_i_f___u_a_r_t.html#ggaaee66fa30e6f9f0efb538ecb91a9ad89a72f3e438f603dd31866ee7002856934a", null ], + [ "SCIF_UART_RTS_TRIGGER_DISABLE", "group___s_c_i_f___u_a_r_t.html#ggaaee66fa30e6f9f0efb538ecb91a9ad89a6568db3143c7183716313ed5b5825713", null ] ] ], [ "R_SCIF_UART_Open", "group___s_c_i_f___u_a_r_t.html#ga2a791c5e359c3fe2d85339fc3f915bc3", null ], [ "R_SCIF_UART_Read", "group___s_c_i_f___u_a_r_t.html#ga07a261385112a6909e86c441411e2e53", null ], @@ -75,5 +89,6 @@ var group___s_c_i_f___u_a_r_t = [ "R_SCIF_UART_Close", "group___s_c_i_f___u_a_r_t.html#ga0d573f7ffdec42630a06605b64c00482", null ], [ "R_SCIF_UART_Abort", "group___s_c_i_f___u_a_r_t.html#ga540d3842dd9db9c39e36c230583e29b1", null ], [ "R_SCIF_UART_BaudCalculate", "group___s_c_i_f___u_a_r_t.html#gad29ba19ecddc66108d794c93f9c1165f", null ], + [ "R_SCIF_UART_ReadStop", "group___s_c_i_f___u_a_r_t.html#gaef7c79f4e4ed3370d27f6cc73d744270", null ], [ "R_SCIF_UART_CallbackSet", "group___s_c_i_f___u_a_r_t.html#ga6880b7cd58a44c99fe197b1b0a14e737", null ] ]; \ No newline at end of file diff --git a/group___s_p_i___a_p_i.html b/group___s_p_i___a_p_i.html index ac45376..95a299e 100644 --- a/group___s_p_i___a_p_i.html +++ b/group___s_p_i___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: SPI Interface +RZV Flexible Software Package Documentation: SPI Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -104,7 +172,8 @@

    Summary

    Provides a common interface for communication using the SPI Protocol.

    Implemented by:

    - @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -105,8 +173,10 @@

    The general timer interface provides standard timer functionality including periodic mode, one-shot mode, PWM output, and free-running timer mode. After each timer cycle (overflow or underflow), an interrupt can be triggered.

    If an instance supports output compare mode, it is provided in the extension configuration timer_on_<instance>_cfg_t defined in r_<instance>.h.

    Implemented by:

    @@ -329,6 +398,7 @@

    Initialize a channel for SPI communication mode.

    Implemented as
    Parameters
    @@ -354,6 +424,7 @@

    Receive data from a SPI device.

    Implemented as
    Parameters
    @@ -381,6 +452,7 @@

    Transmit data to a SPI device.

    Implemented as
    Parameters
    @@ -408,6 +480,7 @@

    Simultaneously transmit data to a SPI device while receiving data from a SPI device (full duplex).

    Implemented as
    Parameters
    @@ -436,11 +509,12 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    Parameters
    - + @@ -463,6 +537,7 @@

    Remove power to the SPI channel designated by the handle and disable the associated interrupts.

    Implemented as
    Parameters
    @@ -526,8 +601,8 @@

    SPI control block. Allocate an instance specific control block to pass into the SPI API calls.

    Implemented as
    @@ -547,11 +622,63 @@

    Data bit width

    [in]p_api_ctrlPointer to the SPI control block.
    [in]p_ctrlPointer to the SPI control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_working_memoryPointer to volatile memory where callback structure can be allocated. Callback arguments allocated here are only valid during the callback.
    - + + + + + + + + + + + + + + + + + + + + + + + + + + - -
    Enumerator
    SPI_BIT_WIDTH_8_BITS 

    Data bit width is 8 bits byte.

    +
    Enumerator
    SPI_BIT_WIDTH_4_BITS 

    Data bit width is 4 bits (byte)

    +
    SPI_BIT_WIDTH_5_BITS 

    Data bit width is 5 bits (byte)

    +
    SPI_BIT_WIDTH_6_BITS 

    Data bit width is 6 bits (byte)

    +
    SPI_BIT_WIDTH_7_BITS 

    Data bit width is 7 bits (byte)

    +
    SPI_BIT_WIDTH_8_BITS 

    Data bit width is 8 bits (byte)

    +
    SPI_BIT_WIDTH_9_BITS 

    Data bit width is 9 bits (word)

    +
    SPI_BIT_WIDTH_10_BITS 

    Data bit width is 10 bits (word)

    +
    SPI_BIT_WIDTH_11_BITS 

    Data bit width is 11 bits (word)

    +
    SPI_BIT_WIDTH_12_BITS 

    Data bit width is 12 bits (word)

    +
    SPI_BIT_WIDTH_13_BITS 

    Data bit width is 13 bits (word)

    +
    SPI_BIT_WIDTH_14_BITS 

    Data bit width is 14 bits (word)

    +
    SPI_BIT_WIDTH_15_BITS 

    Data bit width is 15 bits (word)

    +
    SPI_BIT_WIDTH_16_BITS 

    Data bit width is 16 bits (word)

    +
    SPI_BIT_WIDTH_17_BITS 

    Data bit width is 17 bits (word)

    +
    SPI_BIT_WIDTH_18_BITS 

    Data bit width is 18 bits (word)

    +
    SPI_BIT_WIDTH_19_BITS 

    Data bit width is 19 bits (word)

    +
    SPI_BIT_WIDTH_20_BITS 

    Data bit width is 20 bits (longword)

    +
    SPI_BIT_WIDTH_21_BITS 

    Data bit width is 21 bits (word)

    +
    SPI_BIT_WIDTH_22_BITS 

    Data bit width is 22 bits (word)

    +
    SPI_BIT_WIDTH_23_BITS 

    Data bit width is 23 bits (longword)

    +
    SPI_BIT_WIDTH_24_BITS 

    Data bit width is 24 bits (longword)

    +
    SPI_BIT_WIDTH_25_BITS 

    Data bit width is 25 bits (longword)

    +
    SPI_BIT_WIDTH_26_BITS 

    Data bit width is 26 bits (word)

    +
    SPI_BIT_WIDTH_27_BITS 

    Data bit width is 27 bits (word)

    +
    SPI_BIT_WIDTH_28_BITS 

    Data bit width is 28 bits (word)

    +
    SPI_BIT_WIDTH_29_BITS 

    Data bit width is 29 bits (word)

    +
    SPI_BIT_WIDTH_30_BITS 

    Data bit width is 30 bits (longword)

    SPI_BIT_WIDTH_16_BITS 

    Data bit width is 16 bits word.

    +
    SPI_BIT_WIDTH_31_BITS 

    Data bit width is 31 bits (longword)

    SPI_BIT_WIDTH_32_BITS 

    Data bit width is 32 bits long word.

    +
    SPI_BIT_WIDTH_32_BITS 

    Data bit width is 32 bits (longword)

    @@ -701,7 +828,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.
    diff --git a/group___s_p_i___a_p_i.js b/group___s_p_i___a_p_i.js index 507486d..f1e7ce6 100644 --- a/group___s_p_i___a_p_i.js +++ b/group___s_p_i___a_p_i.js @@ -42,8 +42,34 @@ var group___s_p_i___a_p_i = ] ], [ "spi_ctrl_t", "group___s_p_i___a_p_i.html#gacb036be7f805dbb8d2092486d1aeb242", null ], [ "spi_bit_width_t", "group___s_p_i___a_p_i.html#ga6ba4a8eef274a5b227fc2ab6ee61f8fd", [ + [ "SPI_BIT_WIDTH_4_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda6a007a4d6a949aeb0ce52aa4f31d3b88", null ], + [ "SPI_BIT_WIDTH_5_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda3cca9398fbfe913a5c52cd7359864be6", null ], + [ "SPI_BIT_WIDTH_6_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdae5193130db6bdfdf9bb780abf606beb1", null ], + [ "SPI_BIT_WIDTH_7_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdae54951e7d79149bda93b99f18ea2e7a0", null ], [ "SPI_BIT_WIDTH_8_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdad6fa8af050db98465c43fd25fb8e8090", null ], + [ "SPI_BIT_WIDTH_9_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdaf0519b353e4cfb4440088212f4aca8cc", null ], + [ "SPI_BIT_WIDTH_10_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdaf1aefd864f4f60e49990d4fad936ce21", null ], + [ "SPI_BIT_WIDTH_11_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda88f58430f3fecf9a39ec42943e0bb733", null ], + [ "SPI_BIT_WIDTH_12_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda1a4f404e28d648b608c5711b5552090b", null ], + [ "SPI_BIT_WIDTH_13_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda75ce94ca33921b755ff60ae3cf781d2a", null ], + [ "SPI_BIT_WIDTH_14_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda8de43c8612ae97eaf447c95718e7f461", null ], + [ "SPI_BIT_WIDTH_15_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda05c6f46ea4bb0182d526a6bf451d68e1", null ], [ "SPI_BIT_WIDTH_16_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda62f8d41fec9f532ac41463037534e582", null ], + [ "SPI_BIT_WIDTH_17_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdaaf752ab8e386cd474ee33d83df10ad88", null ], + [ "SPI_BIT_WIDTH_18_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda0f15c66b4564dce0f4811d754186ad12", null ], + [ "SPI_BIT_WIDTH_19_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdaf8e4023bcac026b1d1930114105da401", null ], + [ "SPI_BIT_WIDTH_20_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdaa0e0e171fd2f36e3fa41cfb960842396", null ], + [ "SPI_BIT_WIDTH_21_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdad0a9bce1bfca6895716ee32d198f949d", null ], + [ "SPI_BIT_WIDTH_22_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda2b1e938b3bb827bcacb1a6d74f4c60f7", null ], + [ "SPI_BIT_WIDTH_23_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda303f3f218214fd2a69e4fc2511974024", null ], + [ "SPI_BIT_WIDTH_24_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda5696f5183bed267a4d0023bdc19bb357", null ], + [ "SPI_BIT_WIDTH_25_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda6d44c4678bc27af2e39a8a22e78e6cf0", null ], + [ "SPI_BIT_WIDTH_26_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda56b072a3333dd1637f9b1488f7fb208b", null ], + [ "SPI_BIT_WIDTH_27_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda8df31a66c303df4aba56807aae14c4c9", null ], + [ "SPI_BIT_WIDTH_28_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda11d6d5a759ae229607060f7cf6d8102d", null ], + [ "SPI_BIT_WIDTH_29_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda09bb056981764315ea1d3f979f453129", null ], + [ "SPI_BIT_WIDTH_30_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fda0b55867d8d019e07982c011e04f1f4ac", null ], + [ "SPI_BIT_WIDTH_31_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdabe79ca891b6f1b7b60317f5425a6b9cf", null ], [ "SPI_BIT_WIDTH_32_BITS", "group___s_p_i___a_p_i.html#gga6ba4a8eef274a5b227fc2ab6ee61f8fdaf69633d9ed10c0d07cea1ded1b562aed", null ] ] ], [ "spi_mode_t", "group___s_p_i___a_p_i.html#gac4b206a51636d91c5cffcbcee458c3cb", [ diff --git a/group___s_p_i___b.html b/group___s_p_i___b.html new file mode 100644 index 0000000..d027c4c --- /dev/null +++ b/group___s_p_i___b.html @@ -0,0 +1,1299 @@ + + + + + + + +RZV Flexible Software Package Documentation: SPI (r_spi_b) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures | +Enumerations
    +
    +
    SPI (r_spi_b)
    Modules » Connectivity
    +
    +
    + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_SPI_B_Open (spi_ctrl_t *p_api_ctrl, spi_cfg_t const *const p_cfg)
     
    fsp_err_t R_SPI_B_Read (spi_ctrl_t *const p_api_ctrl, void *p_dest, uint32_t const length, spi_bit_width_t const bit_width)
     
    fsp_err_t R_SPI_B_Write (spi_ctrl_t *const p_api_ctrl, void const *p_src, uint32_t const length, spi_bit_width_t const bit_width)
     
    fsp_err_t R_SPI_B_WriteRead (spi_ctrl_t *const p_api_ctrl, void const *p_src, void *p_dest, uint32_t const length, spi_bit_width_t const bit_width)
     
    fsp_err_t R_SPI_B_Close (spi_ctrl_t *const p_api_ctrl)
     
    fsp_err_t R_SPI_B_CalculateBitrate (uint32_t bitrate, spi_b_clock_source_t clock_source, rspck_div_setting_t *spck_div)
     
    fsp_err_t R_SPI_B_CallbackSet (spi_ctrl_t *const p_api_ctrl, void(*p_callback)(spi_callback_args_t *), void const *const p_context, spi_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the SPI peripheral on RZ MPUs. This module implements the SPI Interface.

    +

    +Overview

    +

    +Features

    +
      +
    • Standard SPI Modes
        +
      • Master or Slave Mode
        • +
      • 3-Wire (clock synchronous) or 4-Wire (SPI) Mode
        • +
      • Clock Polarity (CPOL)
          +
        • CPOL=0 SCLK is low when idle
          • +
        • CPOL=1 SCLK is high when idle
          • +
        +
        • +
      • Clock Phase (CPHA)
          +
        • CPHA=0 Data Sampled on the even edge of SCLK (Master Mode Only)
          • +
        • CPHA=1 Data Sampled on the odd edge of SCLK
          • +
        +
        • +
      • MSB/LSB first
        • +
      • 8- to 32-Bit data frames
          +
        • Hardware endian swap in 16-Bit and 32-Bit mode
          • +
        +
        • +
      • SSL level keep (burst transfer) supported
        • +
      +
      • +
    • Configurable bitrate
      • +
    • Supports Full Duplex or Transmit Only Mode
      • +
    • FIFO Support
      • +
    • DMAC Support
      • +
    • Callback Events
        +
      • Transfer Complete
        • +
      • RX Overflow Error (The SPI shift register is copied to the data register before previous data was read)
        • +
      • TX Underrun Error (No data to load into shift register for transmitting)
        • +
      • Parity Error (When parity is enabled and a parity error is detected)
        • +
      +
      • +
    +

    +Configuration

    +

    Build Time Configurations for r_spi_b

    +The following build time configurations are defined in fsp_cfg/r_spi_b_cfg.h:
    +

    + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    Enable Support for using DMAC
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Enabled If enabled, DMAC instances will be included in the build for both transmission and reception.
    Enable Transmitting from RXI Interrupt
      +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Disabled If enabled, all operations will be handled from the RX (receive) interrupt. This setting only provides a performance boost when DMAC is not used. In addition, Transmit Only mode is not supported when this configuration is enabled.
    +

    Configurations for Connectivity > SPI (r_spi_b)

    +This module can be added to the Stacks tab via New Stack > Connectivity > SPI (r_spi_b). Non-secure callable guard functions can be generated for this module by right clicking the module in the RA Configuration tool and checking the "Non-secure Callable" box.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_spi0 Module name.
    ChannelValue must be a non-negative integer0 Select the SPI channel.
    Receive Interrupt PriorityValue must be an integer between 0 and 25512 Select the interrupt priority for all SPI interrupts.
    Transmit Buffer Empty Interrupt PriorityValue must be an integer between 0 and 25512 Select the interrupt priority for all SPI interrupts.
    Transfer Complete Interrupt PriorityValue must be an integer between 0 and 25512 Select the interrupt priority for all SPI interrupts.
    Error Interrupt PriorityValue must be an integer between 0 and 25512 Select the interrupt priority for all SPI interrupts.
    Operating Mode
      +
    • +Master
      • +
    • +Slave
      • +
    +    		Master Select the SPI operating mode.
    Clock Phase
      +
    • +Data sampling on odd edge, data variation on even edge
      • +
    • +Data sampling on even edge, data variation on odd edge
      • +
    +    		Data sampling on odd edge, data variation on even edge Select the clock edge to sample data.
    Clock Polarity
      +
    • +Low when idle
      • +
    • +High when idle
      • +
    +    		Low when idle Select clock level when idle.
    Mode Fault Error
      +
    • +Enable
      • +
    • +Disable
      • +
    +    		Disable Detect master/slave mode conflicts.
    Bit Order
      +
    • +MSB First
      • +
    • +LSB First
      • +
    +    		MSB First Select the data bit order.
    CallbackName must be a valid C symbolspi_callback A user callback function can be provided. If this callback function is provided, it will be called from the interrupt service routine (ISR).
    SPI Mode
      +
    • +SPI Operation
      • +
    • +Clock Synchronous Operation
      • +
    +    		Clock Synchronous Operation Select the clock sync mode.
    Full or Transmit Only Mode
      +
    • +Full Duplex
      • +
    • +Transmit Only
      • +
    +    		Full Duplex Select Full Duplex or Transmit Only Mode.
    Slave Select Polarity
      +
    • +Active Low
      • +
    • +Active High
      • +
    +    		Active Low Select the slave select active level.
    Select SSL(Slave Select)
      +
    • +SSL0
      • +
    • +SSL1
      • +
    • +SSL2
      • +
    • +SSL3
      • +
    +    		SSL0 Select which slave to use.
    MOSI Idle State
      +
    • +MOSI Idle Value Fixing Disable
      • +
    • +MOSI Idle Value Fixing Low
      • +
    • +MOSI Idle Value Fixing High
      • +
    +    		MOSI Idle Value Fixing Disable Select the MOSI idle level if MOSI idle is enabled.
    Parity Mode
      +
    • +Disabled
      • +
    • +Odd
      • +
    • +Even
      • +
    +    		Disabled Select the parity mode if parity is enabled.
    Byte Swapping
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Select the byte swap mode for 16/32-Bit Data Frames.
    Clock Source
      +
    • +PCLKSPI
      • +
    • +PCLK
      • +
    +    		PCLK Select the clock source for communication.
    BitrateValue must be an integer greater than 016000000 Enter the desired bitrate, change the bitrate to a value supported by MCU. If the requested bitrate cannot be achieved, the settings with the largest possible value that is less than or equal to the requested bitrate is used. The theoretical bitrate is printed in a comment in the generated spi_extended_cfg_t structure.
    Clock Delay
      +
    • +1 Clock
      • +
    • +2 Clocks
      • +
    • +3 Clocks
      • +
    • +4 Clocks
      • +
    • +5 Clocks
      • +
    • +6 Clocks
      • +
    • +7 Clocks
      • +
    • +8 Clocks
      • +
    +    		1 Clock Configure the number of SPI clock cycles before each data frame.
    SSL Negation Delay
      +
    • +1 Clock
      • +
    • +2 Clocks
      • +
    • +3 Clocks
      • +
    • +4 Clocks
      • +
    • +5 Clocks
      • +
    • +6 Clocks
      • +
    • +7 Clocks
      • +
    • +8 Clocks
      • +
    +    		1 Clock Configure the number of SPI clock cycles after each data frame.
    Next Access Delay
      +
    • +1 Clock
      • +
    • +2 Clocks
      • +
    • +3 Clocks
      • +
    • +4 Clocks
      • +
    • +5 Clocks
      • +
    • +6 Clocks
      • +
    • +7 Clocks
      • +
    • +8 Clocks
      • +
    +    		1 Clock Configure the number of SPI clock cycles between each data frame.
    SSL Level Keep
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Select whether to negate the SSL level for each frame transfer.
    +

    +

    +Clock Configuration

    +

    The SPI peripheral uses the P0CLK for communication and internal operations. Both can be configured via the Clocks tab of the RZ Configuration editor.

    +

    +Pin Configuration

    +

    This module uses MOSI, MISO, RSPCK, and SSL pins to communicate with on board devices.

    +
    Note
    At high bitrates it may be necessary to configure the pins with IOPORT_CFG_DRIVE_HIGH to maintain signal integrity.
    +

    +Usage Notes

    +

    Performance

    +

    At high bitrates, interrupts may not be able to service transfers fast enough. In master mode this means there will be a delay between each data frame. In slave mode this could result in TX Underrun and RX Overflow errors.

    +

    In order to improve performance at high bitrates, it is recommended that the instance be configured to service transfers using the DMAC.

    +

    Another way to improve performance is to transfer the data in 16/32 bit wide data frames when possible. A typical use-case where this is possible is when reading/writing to a block device.

    +

    Transmit From RXI Interrupt

    +

    After every data frame the SPI peripheral generates a transmit buffer empty interrupt and a receive buffer full interrupt. It is possible to configure the driver to handle transmit buffer empty interrupts in the receive buffer full ISR. This only improves performance when the DMAC is not being used.

    +
    Note
    Configuring the module to use RX DMAC instance without also providing a TX DMAC instance results in an invalid configuration when RXI transmit is enabled.
    +
    +Transmit Only mode is not supported when Transmit from RXI is enabled.
    +

    Clock Auto-Stopping

    +

    In master mode, if the Receive Buffer Full Interrupts are not handled fast enough, instead of generating a RX Overflow error, the last clock cycle will be stretched until the receive buffer is read.

    +

    Parity Mode

    +

    When parity mode is configured, the LSB of each data frame is used as a parity bit. When odd parity is selected, the LSB is set such that there are an odd number of ones in the data frame. When even parity is selected, the LSB is set such that there are an even number of ones in the data frame.

    +

    +Limitations

    +

    Developers should be aware of the following limitations when using the SPI:

    +
      +
    • In master mode, the driver will only configure 4-Wire mode if the device supports SSL Level Keeping (SSLKP bit in SPCMD0) and will return FSP_ERR_UNSUPPORTED if configured for 4-Wire mode on devices without SSL Level Keeping. Without SSL Level Keeping, the SSL pin is toggled after every data frame. In most cases this is not desirable behavior so it is recommended that the SSL pin be driven in software if SSL Level Keeping is not present on the device.
      • +
    • The module does not support communicating with multiple slaves using different SSL pins. In order to achieve this, the module must either be closed and re-opened to change the SSL pin or drive SSL in software. It is recommended that SSL be driven in software when controlling multiple slave devices.
      • +
    • The SPI peripheral has a minimum 3 SPI CLK delay between each data frame.
      • +
    • The behavior for Byte Swap operation is not guaranteed for data frames other than 8-bit, 16-bit and 32bit.
      • +
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the SPI in an application.

    +
    static volatile bool g_transfer_complete = false;
    void spi_basic_example (void)
    {
    uint8_t tx_buffer[TRANSFER_SIZE];
    uint8_t rx_buffer[TRANSFER_SIZE];
    fsp_err_t err = FSP_SUCCESS;
    /* Initialize the SPI module. */
    err = R_SPI_B_Open(&g_spi_ctrl, &g_spi_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Start a write/read transfer */
    err = R_SPI_B_WriteRead(&g_spi_ctrl, tx_buffer, rx_buffer, TRANSFER_SIZE, SPI_BIT_WIDTH_8_BITS);
    assert(FSP_SUCCESS == err);
    /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
    while (false == g_transfer_complete)
    {
    ;
    }
    }
    static void r_spi_callback (spi_callback_args_t * p_args)
    {
    if (SPI_EVENT_TRANSFER_COMPLETE == p_args->event)
    {
    g_transfer_complete = true;
    }
    }

    Driving Software Slave Select Line

    +

    This is an example of communicating with multiple slave devices by asserting SSL in software.

    +
    void spi_software_ssl_example (void)
    {
    uint8_t tx_buffer[TRANSFER_SIZE];
    uint8_t rx_buffer[TRANSFER_SIZE];
    /* Configure Slave Select Line 1 */
    R_BSP_PinWrite(SLAVE_SELECT_LINE_1, BSP_IO_LEVEL_HIGH);
    /* Configure Slave Select Line 2 */
    R_BSP_PinWrite(SLAVE_SELECT_LINE_2, BSP_IO_LEVEL_HIGH);
    fsp_err_t err = FSP_SUCCESS;
    /* Initialize the SPI module. */
    err = R_SPI_B_Open(&g_spi_ctrl, &g_spi_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Assert Slave Select Line 1 */
    R_BSP_PinWrite(SLAVE_SELECT_LINE_1, BSP_IO_LEVEL_LOW);
    /* Start a write/read transfer */
    g_transfer_complete = false;
    err = R_SPI_B_WriteRead(&g_spi_ctrl, tx_buffer, rx_buffer, TRANSFER_SIZE, SPI_BIT_WIDTH_8_BITS);
    assert(FSP_SUCCESS == err);
    /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
    while (false == g_transfer_complete)
    {
    ;
    }
    /* De-assert Slave Select Line 1 */
    R_BSP_PinWrite(SLAVE_SELECT_LINE_1, BSP_IO_LEVEL_HIGH);
    /* Wait for minimum time required between transfers. */
    R_BSP_SoftwareDelay(SSL_NEXT_ACCESS_DELAY, BSP_DELAY_UNITS_MICROSECONDS);
    /* Assert Slave Select Line 2 */
    R_BSP_PinWrite(SLAVE_SELECT_LINE_2, BSP_IO_LEVEL_LOW);
    /* Start a write/read transfer */
    g_transfer_complete = false;
    err = R_SPI_B_WriteRead(&g_spi_ctrl, tx_buffer, rx_buffer, TRANSFER_SIZE, SPI_BIT_WIDTH_8_BITS);
    assert(FSP_SUCCESS == err);
    /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
    while (false == g_transfer_complete)
    {
    ;
    }
    /* De-assert Slave Select Line 2 */
    R_BSP_PinWrite(SLAVE_SELECT_LINE_2, BSP_IO_LEVEL_HIGH);
    }

    Configuring the SPI Clock Divider Registers

    +

    This example demonstrates how to set the SPI clock divisors at runtime.

    +
    void spi_bitrate_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    g_spi_cfg.p_extend = &g_spi_extended_cfg;
    /* Configure SPI Clock divider to achieve largest bitrate less than or equal to the desired bitrate. */
    err = R_SPI_B_CalculateBitrate(BITRATE, SPI_B_CLOCK_SOURCE_SCISPICLK, &(g_spi_extended_cfg.spck_div));
    assert(FSP_SUCCESS == err);
    /* Initialize the SPI module. */
    err = R_SPI_B_Open(&g_spi_ctrl, &g_spi_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    }
    + + + + + + + +

    +Data Structures

    struct  rspck_div_setting_t
     
    struct  spi_b_extended_cfg_t
     
    struct  spi_b_instance_ctrl_t
     
    + + + + + + + + + + + + + + + + + + + + + +

    +Enumerations

    enum  spi_b_ssl_mode_t
     
    enum  spi_b_communication_t
     
    enum  spi_b_ssl_polarity_t
     
    enum  spi_b_ssl_select_t
     
    enum  spi_b_mosi_idle_value_fixing_t
     
    enum  spi_b_parity_t
     
    enum  spi_b_byte_swap_t
     
    enum  spi_b_delay_count_t
     
    enum  spi_b_clock_source_t
     
    enum  spi_b_ssl_level_keep_t
     
    +

    Data Structure Documentation

    + +

    ◆ rspck_div_setting_t

    + +
    +
    + + + + +
    struct rspck_div_setting_t
    +
    +

    SPI Clock Divider settings.

    +
    + + + + + + + +
    Data Fields
    +uint8_t +spbr +SPBR register setting.
    +uint8_t +brdv: 2 +BRDV setting in SPCMD0.
    + +
    +
    + +

    ◆ spi_b_extended_cfg_t

    + +
    +
    + + + + +
    struct spi_b_extended_cfg_t
    +
    +

    Extended SPI interface configuration

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +spi_b_ssl_mode_t +spi_clksyn +Select SPI or Clock Synchronous mode operation.
    +spi_b_communication_t +spi_comm +Select full-duplex or transmit-only communication.
    +spi_b_ssl_polarity_t +ssl_polarity +Select SSLn signal polarity.
    +spi_b_ssl_select_t +ssl_select +Select which slave to use: 0-SSL0, 1-SSL1, 2-SSL2, 3-SSL3.
    +spi_b_mosi_idle_value_fixing_t +mosi_idle +Select MOSI idle fixed value and selection.
    +spi_b_parity_t +parity +Select parity and enable/disable parity.
    +spi_b_byte_swap_t +byte_swap +Select byte swap mode.
    +spi_b_clock_source_t +clock_source +Communication clock source (TCLK).
    +rspck_div_setting_t +spck_div +Register values for configuring the SPI Clock Divider.
    +spi_b_delay_count_t +spck_delay +SPI Clock Delay Register Setting.
    +spi_b_delay_count_t +ssl_negation_delay +SPI Slave Select Negation Delay Register Setting.
    +spi_b_delay_count_t +next_access_delay +SPI Next-Access Delay Register Setting.
    +spi_b_ssl_level_keep_t +ssl_level_keep +Select SSL signal level keep mode.
    + +
    +
    + +

    ◆ spi_b_instance_ctrl_t

    + +
    +
    + + + + +
    struct spi_b_instance_ctrl_t
    +
    +

    Channel control block. DO NOT INITIALIZE. Initialization occurs when spi_api_t::open is called.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +uint32_t open
     Indicates whether the open() API has been successfully called.
     
    +spi_cfg_t const * p_cfg
     Pointer to instance configuration.
     
    +R_SPI_B0_Type * p_regs
     Base register for this channel.
     
    +void const * p_tx_data
     Buffer to transmit.
     
    +void * p_rx_data
     Buffer to receive.
     
    +uint32_t tx_count
     Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
     
    +uint32_t rx_count
     Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
     
    +uint32_t count
     Number of Data Frames to transfer (8-bit, 16-bit, 32-bit)
     
    +spi_bit_width_t bit_width
     Bits per Data frame (8-bit, 16-bit, 32-bit)
     
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ spi_b_ssl_mode_t

    + +
    +
    + + + + +
    enum spi_b_ssl_mode_t
    +
    +

    3-Wire or 4-Wire mode.

    + + + +
    Enumerator
    SPI_B_SSL_MODE_SPI 

    SPI operation (4-wire method)

    +
    SPI_B_SSL_MODE_CLK_SYN 

    Clock Synchronous operation (3-wire method)

    +
    + +
    +
    + +

    ◆ spi_b_communication_t

    + +
    +
    + + + + +
    enum spi_b_communication_t
    +
    +

    Transmit Only (Half Duplex), or Full Duplex.

    + + + +
    Enumerator
    SPI_B_COMMUNICATION_FULL_DUPLEX 

    Full-Duplex synchronous serial communication.

    +
    SPI_B_COMMUNICATION_TRANSMIT_ONLY 

    Transit only serial communication.

    +
    + +
    +
    + +

    ◆ spi_b_ssl_polarity_t

    + +
    +
    + + + + +
    enum spi_b_ssl_polarity_t
    +
    +

    Slave Select Polarity.

    + + + +
    Enumerator
    SPI_B_SSLP_LOW 

    SSLP signal polarity active low.

    +
    SPI_B_SSLP_HIGH 

    SSLP signal polarity active high.

    +
    + +
    +
    + +

    ◆ spi_b_ssl_select_t

    + +
    +
    + + + + +
    enum spi_b_ssl_select_t
    +
    +

    The Slave Select Line

    + + + + + +
    Enumerator
    SPI_B_SSL_SELECT_SSL0 

    Select SSL0.

    +
    SPI_B_SSL_SELECT_SSL1 

    Select SSL1.

    +
    SPI_B_SSL_SELECT_SSL2 

    Select SSL2.

    +
    SPI_B_SSL_SELECT_SSL3 

    Select SSL3.

    +
    + +
    +
    + +

    ◆ spi_b_mosi_idle_value_fixing_t

    + +
    +
    + + + + +
    enum spi_b_mosi_idle_value_fixing_t
    +
    +

    MOSI Idle Behavior.

    + + + + +
    Enumerator
    SPI_B_MOSI_IDLE_VALUE_FIXING_DISABLE 

    MOSI output value=value set in MOIFV bit.

    +
    SPI_B_MOSI_IDLE_VALUE_FIXING_LOW 

    MOSIn level low during MOSI idling.

    +
    SPI_B_MOSI_IDLE_VALUE_FIXING_HIGH 

    MOSIn level high during MOSI idling.

    +
    + +
    +
    + +

    ◆ spi_b_parity_t

    + +
    +
    + + + + +
    enum spi_b_parity_t
    +
    +

    Parity Mode

    + + + + +
    Enumerator
    SPI_B_PARITY_MODE_DISABLE 

    Disable parity.

    +
    SPI_B_PARITY_MODE_ODD 

    Select even parity.

    +
    SPI_B_PARITY_MODE_EVEN 

    Select odd parity.

    +
    + +
    +
    + +

    ◆ spi_b_byte_swap_t

    + +
    +
    + + + + +
    enum spi_b_byte_swap_t
    +
    +

    Byte Swapping Enable/Disable.

    + + + +
    Enumerator
    SPI_B_BYTE_SWAP_DISABLE 

    Disable Byte swapping for 16/32-Bit transfers.

    +
    SPI_B_BYTE_SWAP_ENABLE 

    Enable Byte swapping for 16/32-Bit transfers.

    +
    + +
    +
    + +

    ◆ spi_b_delay_count_t

    + +
    +
    + + + + +
    enum spi_b_delay_count_t
    +
    +

    Delay count for SPI delay settings.

    + + + + + + + + + +
    Enumerator
    SPI_B_DELAY_COUNT_1 

    Set RSPCK delay count to 1 RSPCK.

    +
    SPI_B_DELAY_COUNT_2 

    Set RSPCK delay count to 2 RSPCK.

    +
    SPI_B_DELAY_COUNT_3 

    Set RSPCK delay count to 3 RSPCK.

    +
    SPI_B_DELAY_COUNT_4 

    Set RSPCK delay count to 4 RSPCK.

    +
    SPI_B_DELAY_COUNT_5 

    Set RSPCK delay count to 5 RSPCK.

    +
    SPI_B_DELAY_COUNT_6 

    Set RSPCK delay count to 6 RSPCK.

    +
    SPI_B_DELAY_COUNT_7 

    Set RSPCK delay count to 7 RSPCK.

    +
    SPI_B_DELAY_COUNT_8 

    Set RSPCK delay count to 8 RSPCK.

    +
    + +
    +
    + +

    ◆ spi_b_clock_source_t

    + +
    +
    + + + + +
    enum spi_b_clock_source_t
    +
    +

    SPI communication clock source.

    + +
    +
    + +

    ◆ spi_b_ssl_level_keep_t

    + +
    +
    + + + + +
    enum spi_b_ssl_level_keep_t
    +
    +

    SSL Signal Level Keeping Enable/Disable.

    + + + +
    Enumerator
    SPI_B_SSL_LEVEL_KEEP_DISABLE 

    Disable SSL Level Keep Mode.

    +
    SPI_B_SSL_LEVEL_KEEP_ENABLE 

    Enable SSL Level Keep Mode.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_SPI_B_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SPI_B_Open (spi_ctrl_t * p_api_ctrl,
    spi_cfg_t const *const p_cfg 
    )
    +
    +

    This functions initializes a channel for SPI communication mode. Implements spi_api_t::open.

    +

    This function performs the following tasks:

      +
    • Performs parameter checking and processes error conditions.
      • +
    • Configures the peripheral registers according to the configuration.
      • +
    • Initialize the control structure for use in other SPI Interface functions.
      • +
    +
    Return values
    + + + + + + +
    FSP_SUCCESSChannel initialized successfully.
    FSP_ERR_ALREADY_OPENInstance was already initialized.
    FSP_ERR_ASSERTIONAn invalid argument was given in the configuration structure.
    FSP_ERR_UNSUPPORTEDA requested setting is not possible on this device with the current build configuration.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe channel number is invalid.
    +
    +
    +
    Returns
    See Common Error Codes or functions called by this function for other possible return codes. This function calls: transfer_api_t::open
    +
    Note
    This function is reentrant.
    + +
    +
    + +

    ◆ R_SPI_B_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SPI_B_Read (spi_ctrl_t *const p_api_ctrl,
    void * p_dest,
    uint32_t const length,
    spi_bit_width_t const bit_width 
    )
    +
    +

    This function receives data from a SPI device. Implements spi_api_t::read.

    +

    The function performs the following tasks:

      +
    • Performs parameter checking and processes error conditions.
      • +
    • Sets up the instance to complete a SPI read operation.
      • +
    +
    Return values
    + + + + + +
    FSP_SUCCESSRead operation successfully completed.
    FSP_ERR_ASSERTIONNULL pointer to control or destination parameters or transfer length is zero.
    FSP_ERR_NOT_OPENThe channel has not been opened. Open channel first.
    FSP_ERR_IN_USEA transfer is already in progress.
    +
    +
    + +
    +
    + +

    ◆ R_SPI_B_Write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SPI_B_Write (spi_ctrl_t *const p_api_ctrl,
    void const * p_src,
    uint32_t const length,
    spi_bit_width_t const bit_width 
    )
    +
    +

    This function transmits data to a SPI device using the TX Only Communications Operation Mode. Implements spi_api_t::write.

    +

    The function performs the following tasks:

      +
    • Performs parameter checking and processes error conditions.
      • +
    • Sets up the instance to complete a SPI write operation.
      • +
    +
    Return values
    + + + + + +
    FSP_SUCCESSWrite operation successfully completed.
    FSP_ERR_ASSERTIONNULL pointer to control or source parameters or transfer length is zero.
    FSP_ERR_NOT_OPENThe channel has not been opened. Open the channel first.
    FSP_ERR_IN_USEA transfer is already in progress.
    +
    +
    + +
    +
    + +

    ◆ R_SPI_B_WriteRead()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SPI_B_WriteRead (spi_ctrl_t *const p_api_ctrl,
    void const * p_src,
    void * p_dest,
    uint32_t const length,
    spi_bit_width_t const bit_width 
    )
    +
    +

    This function simultaneously transmits and receive data. Implements spi_api_t::writeRead.

    +

    The function performs the following tasks:

      +
    • Performs parameter checking and processes error conditions.
      • +
    • Sets up the instance to complete a SPI writeRead operation.
      • +
    +
    Return values
    + + + + + +
    FSP_SUCCESSWrite operation successfully completed.
    FSP_ERR_ASSERTIONNULL pointer to control, source or destination parameters or transfer length is zero.
    FSP_ERR_NOT_OPENThe channel has not been opened. Open the channel first.
    FSP_ERR_IN_USEA transfer is already in progress.
    +
    +
    + +
    +
    + +

    ◆ R_SPI_B_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_SPI_B_Close (spi_ctrl_t *const p_api_ctrl)
    +
    +

    This function manages the closing of a channel by the following task. Implements spi_api_t::close.

    +

    Disables SPI operations by disabling the SPI bus.

      +
    • Disables the SPI peripheral.
      • +
    • Disables all the associated interrupts.
      • +
    • Update control structure so it will not work with SPI Interface functions.
      • +
    +
    Return values
    + + + + +
    FSP_SUCCESSChannel successfully closed.
    FSP_ERR_ASSERTIONA required pointer argument is NULL.
    FSP_ERR_NOT_OPENThe channel has not been opened. Open the channel first.
    +
    +
    + +
    +
    + +

    ◆ R_SPI_B_CalculateBitrate()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SPI_B_CalculateBitrate (uint32_t bitrate,
    spi_b_clock_source_t clock_source,
    rspck_div_setting_t * spck_div 
    )
    +
    +

    Calculates the SPBR register value and the BRDV bits for a desired bitrate. If the desired bitrate is faster than the maximum bitrate, than the bitrate is set to the maximum bitrate. If the desired bitrate is slower than the minimum bitrate, than an error is returned.

    +
    Parameters
    + + + + +
    [in]bitrateDesired bitrate
    [in]clock_sourceSPI communication clock source to be used
    [out]spck_divMemory location to store bitrate register settings.
    +
    +
    +
    Return values
    + + + +
    FSP_SUCCESSValid spbr and brdv values were calculated
    FSP_ERR_UNSUPPORTEDBitrate is not achievable
    +
    +
    + +
    +
    + +

    ◆ R_SPI_B_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_SPI_B_CallbackSet (spi_ctrl_t *const p_api_ctrl,
    void(*)(spi_callback_args_t *) p_callback,
    void const *const p_context,
    spi_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements spi_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___s_p_i___b.js b/group___s_p_i___b.js new file mode 100644 index 0000000..c1e1d59 --- /dev/null +++ b/group___s_p_i___b.js @@ -0,0 +1,87 @@ +var group___s_p_i___b = +[ + [ "rspck_div_setting_t", "group___s_p_i___b.html#structrspck__div__setting__t", [ + [ "spbr", "group___s_p_i___b.html#a67df9d0b11ff15890c138596faaa6c03", null ], + [ "brdv", "group___s_p_i___b.html#a6bc3a03629a2f20e5b468f6ca7f54697", null ] + ] ], + [ "spi_b_extended_cfg_t", "group___s_p_i___b.html#structspi__b__extended__cfg__t", [ + [ "spi_clksyn", "group___s_p_i___b.html#a399719eab6e46125db42de61d7fffe9d", null ], + [ "spi_comm", "group___s_p_i___b.html#a7e337db8e24ef889f9a1ccfec9d5a9e9", null ], + [ "ssl_polarity", "group___s_p_i___b.html#a5bc3997ed557ba51b18f3e7118601381", null ], + [ "ssl_select", "group___s_p_i___b.html#ab0743a388a256b112510805f0d0b3ac7", null ], + [ "mosi_idle", "group___s_p_i___b.html#ac63d012fd878d53e0f390837e604ca2f", null ], + [ "parity", "group___s_p_i___b.html#af73d771092b53a6fe3556e39064ba38e", null ], + [ "byte_swap", "group___s_p_i___b.html#af621a3a18d5499079a962d880cded254", null ], + [ "clock_source", "group___s_p_i___b.html#af6ddf830c6529dbf66c75a231242faa1", null ], + [ "spck_div", "group___s_p_i___b.html#a5e759f1a2e0e50733ffe773b84e009b0", null ], + [ "spck_delay", "group___s_p_i___b.html#aa76a96bdfe3843e023c076e906cdedbb", null ], + [ "ssl_negation_delay", "group___s_p_i___b.html#ad0e864b3954e9abc6b864bb20c56b146", null ], + [ "next_access_delay", "group___s_p_i___b.html#a91917729fb266000e5c493d9a4021c43", null ], + [ "ssl_level_keep", "group___s_p_i___b.html#a8ca3851c76d9a5c02dd07e24309660ff", null ] + ] ], + [ "spi_b_instance_ctrl_t", "group___s_p_i___b.html#structspi__b__instance__ctrl__t", [ + [ "open", "group___s_p_i___b.html#a63826f2e79dbe1834c3d99084558f71f", null ], + [ "p_cfg", "group___s_p_i___b.html#a4d55d0c12d644e533249a943486a9b17", null ], + [ "p_regs", "group___s_p_i___b.html#a73e08678d0e9902c81c88b6f6ca19c02", null ], + [ "p_tx_data", "group___s_p_i___b.html#a7f95eeca760420ef6d71e453f43e7154", null ], + [ "p_rx_data", "group___s_p_i___b.html#a0688f8d078659fb2901ffe44d64d3045", null ], + [ "tx_count", "group___s_p_i___b.html#a01bfd62b304e044b1cecefb0310c7823", null ], + [ "rx_count", "group___s_p_i___b.html#a11eb6d582a56acdabafd9c6d50ce18d6", null ], + [ "count", "group___s_p_i___b.html#a992f7cfe75bd98e8fe2c9120d0c7b26b", null ], + [ "bit_width", "group___s_p_i___b.html#a2ce9db0edb9ad0167232b35d5bc714dc", null ] + ] ], + [ "spi_b_ssl_mode_t", "group___s_p_i___b.html#gaacc78eca6792fd5aeb2aef6a458d8fb7", [ + [ "SPI_B_SSL_MODE_SPI", "group___s_p_i___b.html#ggaacc78eca6792fd5aeb2aef6a458d8fb7a0cad981405018e399b84bce877574709", null ], + [ "SPI_B_SSL_MODE_CLK_SYN", "group___s_p_i___b.html#ggaacc78eca6792fd5aeb2aef6a458d8fb7a7f839e42cba15c37a4698c894630739b", null ] + ] ], + [ "spi_b_communication_t", "group___s_p_i___b.html#gae6d270a0823aeddcacb4a5006546e391", [ + [ "SPI_B_COMMUNICATION_FULL_DUPLEX", "group___s_p_i___b.html#ggae6d270a0823aeddcacb4a5006546e391ae3954204fe4e76df8af7fcf26786f861", null ], + [ "SPI_B_COMMUNICATION_TRANSMIT_ONLY", "group___s_p_i___b.html#ggae6d270a0823aeddcacb4a5006546e391af257ec37578d4668398933881df14b13", null ] + ] ], + [ "spi_b_ssl_polarity_t", "group___s_p_i___b.html#gaaaaa1d37089a7f8d222de49d8295c116", [ + [ "SPI_B_SSLP_LOW", "group___s_p_i___b.html#ggaaaaa1d37089a7f8d222de49d8295c116a17d87ee36cef5eb5820a80a88de4138b", null ], + [ "SPI_B_SSLP_HIGH", "group___s_p_i___b.html#ggaaaaa1d37089a7f8d222de49d8295c116ace10a6e8df5d3a4140ac10cd1a0b293d", null ] + ] ], + [ "spi_b_ssl_select_t", "group___s_p_i___b.html#ga3d063bb158a1005df5c7bde81538b373", [ + [ "SPI_B_SSL_SELECT_SSL0", "group___s_p_i___b.html#gga3d063bb158a1005df5c7bde81538b373ad96087ca4208105609349dab7e3b2cc4", null ], + [ "SPI_B_SSL_SELECT_SSL1", "group___s_p_i___b.html#gga3d063bb158a1005df5c7bde81538b373a881b605b37191ce8363c1e34bae1bc23", null ], + [ "SPI_B_SSL_SELECT_SSL2", "group___s_p_i___b.html#gga3d063bb158a1005df5c7bde81538b373aeb71783e644812cc42d83f59780ac8e4", null ], + [ "SPI_B_SSL_SELECT_SSL3", "group___s_p_i___b.html#gga3d063bb158a1005df5c7bde81538b373a9c1720bf8ab08c5ba6f54fabaa2030f3", null ] + ] ], + [ "spi_b_mosi_idle_value_fixing_t", "group___s_p_i___b.html#ga566538943bf7a87f8ba8add6616d41db", [ + [ "SPI_B_MOSI_IDLE_VALUE_FIXING_DISABLE", "group___s_p_i___b.html#gga566538943bf7a87f8ba8add6616d41dba84ed2b07cb18a4e99da47e9d579d7186", null ], + [ "SPI_B_MOSI_IDLE_VALUE_FIXING_LOW", "group___s_p_i___b.html#gga566538943bf7a87f8ba8add6616d41dbadcee5907d986759f1f6d761c093bda65", null ], + [ "SPI_B_MOSI_IDLE_VALUE_FIXING_HIGH", "group___s_p_i___b.html#gga566538943bf7a87f8ba8add6616d41dba34d640ed44fb4472192b408225814c8e", null ] + ] ], + [ "spi_b_parity_t", "group___s_p_i___b.html#ga500334da91202c65f50e5ba4cef38dcf", [ + [ "SPI_B_PARITY_MODE_DISABLE", "group___s_p_i___b.html#gga500334da91202c65f50e5ba4cef38dcfa9a6b54da3fd6b5d0621e95e431582fde", null ], + [ "SPI_B_PARITY_MODE_ODD", "group___s_p_i___b.html#gga500334da91202c65f50e5ba4cef38dcfa7e2ae6f701908c5a9e8c2e791c985222", null ], + [ "SPI_B_PARITY_MODE_EVEN", "group___s_p_i___b.html#gga500334da91202c65f50e5ba4cef38dcfa9ce206b45bd35f5038a68ffc58573bdb", null ] + ] ], + [ "spi_b_byte_swap_t", "group___s_p_i___b.html#gac08d1276c78868e2844221679e6be657", [ + [ "SPI_B_BYTE_SWAP_DISABLE", "group___s_p_i___b.html#ggac08d1276c78868e2844221679e6be657a6d5c072358543e275822669ab01f3cce", null ], + [ "SPI_B_BYTE_SWAP_ENABLE", "group___s_p_i___b.html#ggac08d1276c78868e2844221679e6be657ac9e89947b2b88db4111a3338b6a0213d", null ] + ] ], + [ "spi_b_delay_count_t", "group___s_p_i___b.html#ga355039269814474fa2d7a016207df18e", [ + [ "SPI_B_DELAY_COUNT_1", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea731a04cd52441636e5caaebaae3ea515", null ], + [ "SPI_B_DELAY_COUNT_2", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea49b6fe18afd4d62f4aea24c3fdac48d2", null ], + [ "SPI_B_DELAY_COUNT_3", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea4e646f9d36c3b20d6cb0974e7741e3f5", null ], + [ "SPI_B_DELAY_COUNT_4", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea273da42218915f084f5167cf6d0605b8", null ], + [ "SPI_B_DELAY_COUNT_5", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea76b1672b4ffcee90924aa69e2faa407d", null ], + [ "SPI_B_DELAY_COUNT_6", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea679f5372399b3a86e5ba849f4db0504b", null ], + [ "SPI_B_DELAY_COUNT_7", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea93cd345b5c636461c54b93905fd35ba9", null ], + [ "SPI_B_DELAY_COUNT_8", "group___s_p_i___b.html#gga355039269814474fa2d7a016207df18ea54a1d1391831fd7afe9fa1839370665d", null ] + ] ], + [ "spi_b_clock_source_t", "group___s_p_i___b.html#gabb41b27e51f28d09548219c18435346b", null ], + [ "spi_b_ssl_level_keep_t", "group___s_p_i___b.html#ga8232020978a99300962810b2e9f9dc86", [ + [ "SPI_B_SSL_LEVEL_KEEP_DISABLE", "group___s_p_i___b.html#gga8232020978a99300962810b2e9f9dc86a74c4d474dc8844704917781a861159aa", null ], + [ "SPI_B_SSL_LEVEL_KEEP_ENABLE", "group___s_p_i___b.html#gga8232020978a99300962810b2e9f9dc86af7408a6172952573cc49aae43aff1a43", null ] + ] ], + [ "R_SPI_B_Open", "group___s_p_i___b.html#gab338db9c94dc09edc2ceddf87904845d", null ], + [ "R_SPI_B_Read", "group___s_p_i___b.html#gabcc557f95c75b12b462962f6c709e229", null ], + [ "R_SPI_B_Write", "group___s_p_i___b.html#ga2adf0b091362e84b71f1bd3a1d821f40", null ], + [ "R_SPI_B_WriteRead", "group___s_p_i___b.html#ga44658a0ea656e093e0eac61186aef274", null ], + [ "R_SPI_B_Close", "group___s_p_i___b.html#ga8e700b9cda9c467dde6090fb4c4a6969", null ], + [ "R_SPI_B_CalculateBitrate", "group___s_p_i___b.html#ga4312b8a1c4aee284f3007621403a0b6d", null ], + [ "R_SPI_B_CallbackSet", "group___s_p_i___b.html#ga588348788f8ed3f933befc5a1cbe9b90", null ] +]; \ No newline at end of file diff --git a/group___s_p_i___f_l_a_s_h___a_p_i.html b/group___s_p_i___f_l_a_s_h___a_p_i.html new file mode 100644 index 0000000..62c2270 --- /dev/null +++ b/group___s_p_i___f_l_a_s_h___a_p_i.html @@ -0,0 +1,1099 @@ + + + + + + + +RZV Flexible Software Package Documentation: SPI Flash Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    SPI Flash Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for accessing external SPI flash devices.

    +

    +Summary

    +

    The SPI flash API provides an interface that configures, writes, and erases sectors in SPI flash devices.

    +

    Implemented by:

    + + + + + + + + + + + + + + +

    +Data Structures

    struct  spi_flash_erase_command_t
     
    struct  spi_flash_direct_transfer_t
     
    struct  spi_flash_cfg_t
     
    struct  spi_flash_status_t
     
    struct  spi_flash_api_t
     
    struct  spi_flash_instance_t
     
    + + + +

    +Typedefs

    typedef void spi_flash_ctrl_t
     
    + + + + + + + + + + + + + +

    +Enumerations

    enum  spi_flash_read_mode_t
     
    enum  spi_flash_protocol_t
     
    enum  spi_flash_address_bytes_t
     
    enum  spi_flash_data_lines_t
     
    enum  spi_flash_dummy_clocks_t
     
    enum  spi_flash_direct_transfer_dir_t
     
    +

    Data Structure Documentation

    + +

    ◆ spi_flash_erase_command_t

    + +
    +
    + + + + +
    struct spi_flash_erase_command_t
    +
    +

    Structure to define an erase command and associated erase size.

    +
    + + + + + + + +
    Data Fields
    +uint16_t +command +Erase command.
    +uint32_t +size +Size of erase for associated command, set to SPI_FLASH_ERASE_SIZE_CHIP_ERASE for chip erase.
    + +
    +
    + +

    ◆ spi_flash_direct_transfer_t

    + +
    +
    + + + + +
    struct spi_flash_direct_transfer_t
    +
    +

    Structure to define a direct transfer.

    +
    + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +uint32_t +address +Starting address.
    +uint32_t +data +Data.
    +uint16_t +command +Transfer command.
    +uint8_t +dummy_cycles +Number of dummy cycles.
    +uint8_t +command_length +Command length.
    +uint8_t +address_length +Address lengrh.
    +uint8_t +data_length +Data length.
    + +
    +
    + +

    ◆ spi_flash_cfg_t

    + +
    +
    + + + + +
    struct spi_flash_cfg_t
    +
    +

    User configuration structure used by the open function

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +spi_flash_protocol_t +spi_protocol +Initial SPI protocol. SPI protocol can be changed in spi_flash_api_t::spiProtocolSet.
    +spi_flash_read_mode_t +read_mode +Read mode.
    +spi_flash_address_bytes_t +address_bytes +Number of bytes used to represent the address.
    +spi_flash_dummy_clocks_t +dummy_clocks +Number of dummy clocks to use for fast read operations.
    +spi_flash_data_lines_t +page_program_address_lines +

    Number of lines used to send address for page program command. This should either be 1 or match the number of lines used in the selected read mode.

    +
    +uint8_t +write_status_bit +Which bit determines write status.
    +uint8_t +write_enable_bit +Which bit determines write status.
    +uint32_t +page_size_bytes +Page size in bytes (maximum number of bytes for page program). Used to specify single continuous write size (bytes) in case of OSPI RAM.
    +uint8_t +page_program_command +Page program command.
    +uint8_t +write_enable_command +Command to enable write or erase, typically 0x06.
    +uint8_t +status_command +Command to read the write status.
    +uint8_t +read_command +Read command - OSPI SPI mode only.
    +uint8_t +xip_enter_command +Command to enter XIP mode.
    +uint8_t +xip_exit_command +Command to exit XIP mode.
    +uint8_t +erase_command_list_length +Length of erase command list.
    +spi_flash_erase_command_t const * +p_erase_command_list +List of all erase commands and associated sizes.
    +void const * +p_extend +Pointer to implementation specific extended configurations.
    + +
    +
    + +

    ◆ spi_flash_status_t

    + +
    +
    + + + + +
    struct spi_flash_status_t
    +
    +

    Status.

    +
    + + + + +
    Data Fields
    +bool +write_in_progress +

    Whether or not a write is in progress. This is determined by reading the spi_flash_cfg_t::write_status_bit from the spi_flash_cfg_t::status_command.

    +
    + +
    +
    + +

    ◆ spi_flash_api_t

    + +
    +
    + + + + +
    struct spi_flash_api_t
    +
    +

    SPI flash implementations follow this API.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(spi_flash_ctrl_t *p_ctrl, spi_flash_cfg_t const *const p_cfg)
     
    fsp_err_t(* directWrite )(spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint32_t const bytes, bool const read_after_write)
     
    fsp_err_t(* directRead )(spi_flash_ctrl_t *p_ctrl, uint8_t *const p_dest, uint32_t const bytes)
     
    fsp_err_t(* directTransfer )(spi_flash_ctrl_t *p_ctrl, spi_flash_direct_transfer_t *const p_transfer, spi_flash_direct_transfer_dir_t direction)
     
    fsp_err_t(* spiProtocolSet )(spi_flash_ctrl_t *p_ctrl, spi_flash_protocol_t spi_protocol)
     
    fsp_err_t(* write )(spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint8_t *const p_dest, uint32_t byte_count)
     
    fsp_err_t(* erase )(spi_flash_ctrl_t *p_ctrl, uint8_t *const p_device_address, uint32_t byte_count)
     
    fsp_err_t(* statusGet )(spi_flash_ctrl_t *p_ctrl, spi_flash_status_t *const p_status)
     
    fsp_err_t(* xipEnter )(spi_flash_ctrl_t *p_ctrl)
     
    fsp_err_t(* xipExit )(spi_flash_ctrl_t *p_ctrl)
     
    fsp_err_t(* bankSet )(spi_flash_ctrl_t *p_ctrl, uint32_t bank)
     
    fsp_err_t(* autoCalibrate )(spi_flash_ctrl_t *p_ctrl)
     
    fsp_err_t(* close )(spi_flash_ctrl_t *p_ctrl)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::open) (spi_flash_ctrl_t *p_ctrl, spi_flash_cfg_t const *const p_cfg)
    +
    +

    Open the SPI flash driver module.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to a driver handle
    [in]p_cfgPointer to a configuration structure
    +
    +
    + +
    +
    + +

    ◆ directWrite

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::directWrite) (spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint32_t const bytes, bool const read_after_write)
    +
    +

    Write raw data to the SPI flash.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to a driver handle
    [in]p_srcPointer to raw data to write, must include any required command/address
    [in]bytesNumber of bytes to write
    [in]read_after_writeIf true, the slave select remains asserted and the peripheral does not return to direct communications mode. If false, the slave select is deasserted and memory mapped access is possible after this function returns if the device is not busy.
    +
    +
    + +
    +
    + +

    ◆ directRead

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::directRead) (spi_flash_ctrl_t *p_ctrl, uint8_t *const p_dest, uint32_t const bytes)
    +
    +

    Read raw data from the SPI flash. Must follow a call to spi_flash_api_t::directWrite.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to a driver handle
    [out]p_destPointer to read raw data into
    [in]bytesNumber of bytes to read
    +
    +
    + +
    +
    + +

    ◆ directTransfer

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::directTransfer) (spi_flash_ctrl_t *p_ctrl, spi_flash_direct_transfer_t *const p_transfer, spi_flash_direct_transfer_dir_t direction)
    +
    +

    Direct Read/Write raw data to the SPI flash.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to a driver handle
    [in]p_dataPointer to command, address and data values and lengths
    [in]directionDirect Read/Write
    +
    +
    + +
    +
    + +

    ◆ spiProtocolSet

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::spiProtocolSet) (spi_flash_ctrl_t *p_ctrl, spi_flash_protocol_t spi_protocol)
    +
    +

    Change the SPI protocol in the driver. The application must change the SPI protocol on the device.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to a driver handle
    [in]spi_protocolDesired SPI protocol
    +
    +
    + +
    +
    + +

    ◆ write

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::write) (spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint8_t *const p_dest, uint32_t byte_count)
    +
    +

    Program a page of data to the flash.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to a driver handle
    [in]p_srcThe memory address of the data to write to the flash device
    [in]p_destThe location in the flash device address space to write the data to
    [in]byte_countThe number of bytes to write
    +
    +
    + +
    +
    + +

    ◆ erase

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::erase) (spi_flash_ctrl_t *p_ctrl, uint8_t *const p_device_address, uint32_t byte_count)
    +
    +

    Erase a certain number of bytes of the flash.

    Implemented as
    +
    +
    Parameters
    + + + + +
    [in]p_ctrlPointer to a driver handle
    [in]p_device_addressThe location in the flash device address space to start the erase from
    [in]byte_countThe number of bytes to erase. Set to SPI_FLASH_ERASE_SIZE_CHIP_ERASE to erase entire chip.
    +
    +
    + +
    +
    + +

    ◆ statusGet

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::statusGet) (spi_flash_ctrl_t *p_ctrl, spi_flash_status_t *const p_status)
    +
    +

    Get the write or erase status of the flash.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to a driver handle
    [out]p_statusCurrent status of the SPI flash device stored here.
    +
    +
    + +
    +
    + +

    ◆ xipEnter

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::xipEnter) (spi_flash_ctrl_t *p_ctrl)
    +
    +

    Enter XIP mode.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to a driver handle
    +
    +
    + +
    +
    + +

    ◆ xipExit

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::xipExit) (spi_flash_ctrl_t *p_ctrl)
    +
    +

    Exit XIP mode.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to a driver handle
    +
    +
    + +
    +
    + +

    ◆ bankSet

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::bankSet) (spi_flash_ctrl_t *p_ctrl, uint32_t bank)
    +
    +

    Select the bank to access. See implementation for details.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to a driver handle
    [in]bankThe bank number
    +
    +
    + +
    +
    + +

    ◆ autoCalibrate

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::autoCalibrate) (spi_flash_ctrl_t *p_ctrl)
    +
    +

    AutoCalibrate the SPI flash driver module. Expected to be used when auto-calibrating OSPI RAM device.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to a driver handle
    +
    +
    + +
    +
    + +

    ◆ close

    + +
    +
    + + + + +
    fsp_err_t(* spi_flash_api_t::close) (spi_flash_ctrl_t *p_ctrl)
    +
    +

    Close the SPI flash driver module.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to a driver handle
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ spi_flash_instance_t

    + +
    +
    + + + + +
    struct spi_flash_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +spi_flash_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +spi_flash_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +spi_flash_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ spi_flash_ctrl_t

    + +
    +
    + + + + +
    typedef void spi_flash_ctrl_t
    +
    +

    SPI flash control block. Allocate an instance specific control block to pass into the SPI flash API calls.

    Implemented as
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ spi_flash_read_mode_t

    + +
    +
    + + + + +
    enum spi_flash_read_mode_t
    +
    +

    Read mode.

    + + + + + + + +
    Enumerator
    SPI_FLASH_READ_MODE_STANDARD 

    Standard Read Mode (no dummy cycles)

    +
    SPI_FLASH_READ_MODE_FAST_READ 

    Fast Read Mode (dummy cycles between address and data)

    +
    SPI_FLASH_READ_MODE_FAST_READ_DUAL_OUTPUT 

    Fast Read Dual Output Mode (data on 2 lines)

    +
    SPI_FLASH_READ_MODE_FAST_READ_DUAL_IO 

    Fast Read Dual I/O Mode (address and data on 2 lines)

    +
    SPI_FLASH_READ_MODE_FAST_READ_QUAD_OUTPUT 

    Fast Read Quad Output Mode (data on 4 lines)

    +
    SPI_FLASH_READ_MODE_FAST_READ_QUAD_IO 

    Fast Read Quad I/O Mode (address and data on 4 lines)

    +
    + +
    +
    + +

    ◆ spi_flash_protocol_t

    + +
    +
    + + + + +
    enum spi_flash_protocol_t
    +
    +

    SPI protocol.

    + + + + + + + + + + + + +
    Enumerator
    SPI_FLASH_PROTOCOL_EXTENDED_SPI 

    Extended SPI mode (commands on 1 line)

    +
    SPI_FLASH_PROTOCOL_QPI 

    QPI mode (commands on 4 lines). Note that the application must ensure the device is in QPI mode.

    +
    SPI_FLASH_PROTOCOL_SOPI 

    SOPI mode (command and data on 8 lines). Note that the application must ensure the device is in SOPI mode.

    +
    SPI_FLASH_PROTOCOL_DOPI 

    DOPI mode (command and data on 8 lines, dual data rate). Note that the application must ensure the device is in DOPI mode.

    +
    SPI_FLASH_PROTOCOL_1S_1S_1S 

    1S-1S-1S protocol

    +
    SPI_FLASH_PROTOCOL_4S_4D_4D 

    4S-4D-4D protocol

    +
    SPI_FLASH_PROTOCOL_8D_8D_8D 

    8D-8D-8D protocol

    +
    SPI_FLASH_PROTOCOL_1S_2S_2S 

    1S-2S-2S protocol

    +
    SPI_FLASH_PROTOCOL_2S_2S_2S 

    2S-2S-2S protocol

    +
    SPI_FLASH_PROTOCOL_1S_4S_4S 

    1S-4S-4S protocol

    +
    SPI_FLASH_PROTOCOL_4S_4S_4S 

    4S-4S-4S protocol

    +
    + +
    +
    + +

    ◆ spi_flash_address_bytes_t

    + +
    +
    + + + + +
    enum spi_flash_address_bytes_t
    +
    +

    Number of bytes in the address.

    + + + + +
    Enumerator
    SPI_FLASH_ADDRESS_BYTES_3 

    3 address bytes

    +
    SPI_FLASH_ADDRESS_BYTES_4 

    4 address bytes with standard commands. If this option is selected, the application must issue the EN4B command using spi_flash_api_t::directWrite() if required by the device.

    +
    SPI_FLASH_ADDRESS_BYTES_4_4BYTE_READ_CODE 

    4 address bytes using standard 4-byte command set.

    +
    + +
    +
    + +

    ◆ spi_flash_data_lines_t

    + +
    +
    + + + + +
    enum spi_flash_data_lines_t
    +
    +

    Number of data lines used.

    + + + + +
    Enumerator
    SPI_FLASH_DATA_LINES_1 

    1 data line

    +
    SPI_FLASH_DATA_LINES_2 

    2 data lines

    +
    SPI_FLASH_DATA_LINES_4 

    4 data lines

    +
    + +
    +
    + +

    ◆ spi_flash_dummy_clocks_t

    + +
    +
    + + + + +
    enum spi_flash_dummy_clocks_t
    +
    +

    Number of dummy cycles for fast read operations.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Enumerator
    SPI_FLASH_DUMMY_CLOCKS_0 

    0 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_1 

    1 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_2 

    2 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_3 

    3 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_4 

    4 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_5 

    5 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_6 

    6 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_7 

    7 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_8 

    8 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_9 

    9 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_10 

    10 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_11 

    11 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_12 

    12 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_13 

    13 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_14 

    14 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_15 

    15 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_16 

    16 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_17 

    17 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_18 

    18 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_19 

    19 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_20 

    20 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_21 

    21 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_22 

    22 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_23 

    23 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_24 

    24 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_25 

    25 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_26 

    26 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_27 

    27 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_28 

    28 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_29 

    29 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_30 

    30 dummy clocks

    +
    SPI_FLASH_DUMMY_CLOCKS_31 

    31 dummy clocks

    +
    + +
    +
    + +

    ◆ spi_flash_direct_transfer_dir_t

    + +
    +
    + + + + +
    enum spi_flash_direct_transfer_dir_t
    +
    +

    Direct Read and Write direction

    + +
    +
    +
    +
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    -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    - +

    + +
    + - - - - -
    + + + +   + + + +
    + + + + + +

    @@ -400,8 +470,10 @@

    Initial configuration.

    Implemented as
    Parameters
    @@ -426,8 +498,10 @@

    Start the counter.

    Implemented as
    Parameters
    @@ -451,8 +525,10 @@

    Stop the counter.

    Implemented as
    Parameters
    @@ -476,8 +552,10 @@

    Reset the counter to the initial value.

    Implemented as
    Parameters
    @@ -501,8 +579,10 @@

    Enables input capture.

    Implemented as
    Parameters
    @@ -526,8 +606,10 @@

    Disables input capture.

    Implemented as
    Parameters
    @@ -552,8 +634,10 @@

    Set the time until the timer expires. See implementation for details of period update timing.

    Implemented as
    Note
    Timer expiration may or may not generate a CPU interrupt based on how the timer is configured in timer_api_t::open.
    @@ -580,8 +664,10 @@

    Sets the number of counts for the pin level to be high. If the timer is counting, the updated duty cycle is reflected after the next timer expiration.

    Implemented as
    Parameters
    @@ -607,8 +693,10 @@

    Stores timer information in p_info.

    Implemented as
    Parameters
    @@ -633,8 +721,10 @@

    Get the current counter value and timer state and store it in p_status.

    Implemented as
    Parameters
    @@ -659,8 +749,10 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    Parameters
    @@ -687,8 +779,10 @@

    Allows driver to be reconfigured and may reduce power consumption.

    Implemented as
    Parameters
    @@ -752,8 +846,10 @@

    Timer control block. Allocate an instance specific control block to pass into the timer API calls.

    Implemented as
    @@ -783,6 +879,18 @@

    TIMER_EVENT_TROUGH 

    Timer trough event (counter is 0, triangle-wave PWM only.

    TIMER_EVENT_OUTPUT_COMPARE_0 

    An output has occurred on signal 0.

    +
    TIMER_EVENT_OUTPUT_COMPARE_1 

    An output has occurred on signal 1.

    +
    TIMER_EVENT_DEAD_TIME 

    Dead time event.

    +
    TIMER_EVENT_CAPTURE_U 

    A capture has occurred on signal U.

    +
    TIMER_EVENT_CAPTURE_V 

    A capture has occurred on signal V.

    +
    TIMER_EVENT_CAPTURE_W 

    A capture has occurred on signal W.

    +
    @@ -848,10 +956,14 @@

    TIMER_MODE_PWM 

    Timer generates saw-wave PWM output.

    +TIMER_MODE_ONE_SHOT_PULSE 

    Saw-wave one-shot pulse mode (fixed buffer operation).

    + TIMER_MODE_TRIANGLE_WAVE_SYMMETRIC_PWM 

    Timer generates symmetric triangle-wave PWM output.

    TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM 

    Timer generates asymmetric triangle-wave PWM output.

    +TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM_MODE3 

    Timer generates Asymmetric Triangle-wave PWM output. In PWM mode 3, the duty cycle does not need to be updated at each tough/crest interrupt. Instead, the trough and crest duty cycle values can be set once and only need to be updated when the application needs to change the duty cycle.

    +

    @@ -908,6 +1020,8 @@

    TIMER_SOURCE_DIV_256 

    Timer clock source divided by 256.

    +TIMER_SOURCE_DIV_512 

    Timer clock source divided by 512.

    + TIMER_SOURCE_DIV_1024 

    Timer clock source divided by 1024.

    @@ -920,7 +1034,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___t_i_m_e_r___a_p_i.js b/group___t_i_m_e_r___a_p_i.js index f5e0d56..8fa1e22 100644 --- a/group___t_i_m_e_r___a_p_i.js +++ b/group___t_i_m_e_r___a_p_i.js @@ -51,7 +51,13 @@ var group___t_i_m_e_r___a_p_i = [ "TIMER_EVENT_CREST", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba73d4afde72c0b28a768c8e6d25c050f8", null ], [ "TIMER_EVENT_CAPTURE_A", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba4bc1252f63147f4a01f7b7ba88afac1d", null ], [ "TIMER_EVENT_CAPTURE_B", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91ebab7b635fbf34ede5a3e2f55b5a60ac21b", null ], - [ "TIMER_EVENT_TROUGH", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba83cb2de8ac629fcd95525e94b94089f0", null ] + [ "TIMER_EVENT_TROUGH", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba83cb2de8ac629fcd95525e94b94089f0", null ], + [ "TIMER_EVENT_OUTPUT_COMPARE_0", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba5935edbb3d0b6d8b6f74a8402e758adf", null ], + [ "TIMER_EVENT_OUTPUT_COMPARE_1", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba1618c4f47f889499fe72ef5a3c2cf4eb", null ], + [ "TIMER_EVENT_DEAD_TIME", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba83346d837d9c89b9b1bed8c9a0078660", null ], + [ "TIMER_EVENT_CAPTURE_U", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91ebadc420bfc9860b5d461f10e557f9bb043", null ], + [ "TIMER_EVENT_CAPTURE_V", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba25cd94f46448cd5938f32c6a25438091", null ], + [ "TIMER_EVENT_CAPTURE_W", "group___t_i_m_e_r___a_p_i.html#ggac3bee51f7c9078f794c5ac19522f91eba58d231c0801a39b29b761e77dbdae2cf", null ] ] ], [ "timer_variant_t", "group___t_i_m_e_r___a_p_i.html#gaa3525eef2e1fa1bc8809b2d3aaf0de5d", [ [ "TIMER_VARIANT_32_BIT", "group___t_i_m_e_r___a_p_i.html#ggaa3525eef2e1fa1bc8809b2d3aaf0de5da7dddd2791567467dc7bcf74ca2fc2cbb", null ], @@ -65,8 +71,10 @@ var group___t_i_m_e_r___a_p_i = [ "TIMER_MODE_PERIODIC", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2a78838cf8d728f8c64bb8012d522d1e2e", null ], [ "TIMER_MODE_ONE_SHOT", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2a140f07675d67258a7ca9a95a9a793e3a", null ], [ "TIMER_MODE_PWM", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2aca44e952a6930f39ac05393522392eac", null ], + [ "TIMER_MODE_ONE_SHOT_PULSE", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2afe99f13968cabc479896dfd0bc67fb6a", null ], [ "TIMER_MODE_TRIANGLE_WAVE_SYMMETRIC_PWM", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2a6a3c462f9e9cc1b26ab68f38efd79b14", null ], - [ "TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2a204001ad413e9ad0db08a66d004a555a", null ] + [ "TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2a204001ad413e9ad0db08a66d004a555a", null ], + [ "TIMER_MODE_TRIANGLE_WAVE_ASYMMETRIC_PWM_MODE3", "group___t_i_m_e_r___a_p_i.html#gga6d4cd64aed5c0009ac26803efc9c13b2aa2eb9fa5372856039d5d53dfbbbe6040", null ] ] ], [ "timer_direction_t", "group___t_i_m_e_r___a_p_i.html#ga8d600bb7885c5490bb7e8f989aa2ff83", [ [ "TIMER_DIRECTION_DOWN", "group___t_i_m_e_r___a_p_i.html#gga8d600bb7885c5490bb7e8f989aa2ff83a6a5c25392297a9e6adcc2a31d210e654", null ], @@ -82,6 +90,7 @@ var group___t_i_m_e_r___a_p_i = [ "TIMER_SOURCE_DIV_64", "group___t_i_m_e_r___a_p_i.html#gga820b425b44d7b551afd1797ecca7a5ada1cc7525fed9c5374c3a530e17453e670", null ], [ "TIMER_SOURCE_DIV_128", "group___t_i_m_e_r___a_p_i.html#gga820b425b44d7b551afd1797ecca7a5ada8828520a3958955a4e2835785787c801", null ], [ "TIMER_SOURCE_DIV_256", "group___t_i_m_e_r___a_p_i.html#gga820b425b44d7b551afd1797ecca7a5ada6680e947eb6455f9d0ee007645ea707d", null ], + [ "TIMER_SOURCE_DIV_512", "group___t_i_m_e_r___a_p_i.html#gga820b425b44d7b551afd1797ecca7a5ada2bcc6bb5346907da7e45b74449588132", null ], [ "TIMER_SOURCE_DIV_1024", "group___t_i_m_e_r___a_p_i.html#gga820b425b44d7b551afd1797ecca7a5adaee99148dc7c32f0764c7cb3b3e45ca30", null ] ] ] ]; \ No newline at end of file diff --git a/group___t_r_a_n_s_f_e_r___a_p_i.html b/group___t_r_a_n_s_f_e_r___a_p_i.html index 0575da1..4ff78d8 100644 --- a/group___t_r_a_n_s_f_e_r___a_p_i.html +++ b/group___t_r_a_n_s_f_e_r___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Transfer Interface +RZV Flexible Software Package Documentation: Transfer Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + + + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -103,7 +171,9 @@

    Summary

    The transfer interface supports background data transfer (no CPU intervention).

    -

    Implemented by:

    +

    Implemented by:

    @@ -203,36 +273,100 @@

    Data Structures

    +union transfer_info_t +void const *volatile +Source pointer.

    Source address.

    + +void *volatile +Destination pointer.

    Destination address.

    + + + + + + + + + + + + + +volatile uint32_t + + + + + + + + + + + + + + +
    Data Fields
    -union transfer_info_t __unnamed__
    -void const *volatile p_src -Source pointer.
    -void *volatile p_dest -Destination pointer.
    volatile uint16_t num_blocks -

    Number of blocks to transfer when using TRANSFER_MODE_BLOCK (both DTC an DMAC) and TRANSFER_MODE_REPEAT (DMAC only), unused in other modes.

    +

    Number of blocks to transfer when using TRANSFER_MODE_BLOCK (both DTC an DMAC) or TRANSFER_MODE_REPEAT (DMAC only) or TRANSFER_MODE_REPEAT_BLOCK (DMAC only), unused in other modes.

    +
    +volatile uint16_t +length +

    Length of each transfer. Range limited for TRANSFER_MODE_BLOCK, TRANSFER_MODE_REPEAT, and TRANSFER_MODE_REPEAT_BLOCK see HAL driver for details.

    +

    The total number of transfer bytes.

    +
    +transfer_addr_mode_t +dest_addr_mode +

    Select what happens to destination address after each transfer.

    +
    +transfer_addr_mode_t +src_addr_mode +

    Select what happens to source address after each transfer.

    +
    +transfer_mode_t +mode +

    Select mode from transfer_mode_t.

    -volatile uint16_t length -

    Length of each transfer. Range limited for TRANSFER_MODE_BLOCK and TRANSFER_MODE_REPEAT, see HAL driver for details.

    +

    The total number of transfer bytes.

    +
    +transfer_size_t +src_size +

    Select source data size to transfer at once.

    +
    +transfer_size_t +dest_size +

    Select destination data size to transfer at once.

    +
    +void const * +p_next1_src +

    Next1 Register set settings

    +
    +void * +p_next1_dest +
    +uint32_t +next1_length
    @@ -301,6 +435,8 @@

    &   fsp_err_t(* close )(transfer_ctrl_t *const p_ctrl)   +fsp_err_t(* reload )(transfer_ctrl_t *const p_ctrl, void const *p_src, void *p_dest, uint32_t const num_transfers) + 

    Field Documentation

    @@ -314,7 +450,10 @@

    -

    Initial configuration.

    Implemented as
    +

    Initial configuration.

    Implemented as
    +
    Parameters
    @@ -336,7 +475,10 @@

    -

    Reconfigure the transfer. Enable the transfer if p_info is valid.

    Implemented as
    +

    Reconfigure the transfer. Enable the transfer if p_info is valid.

    Implemented as
    +
    Parameters

    [in,out]p_ctrlPointer to control block. Must be declared by user. Elements set here.
    @@ -358,7 +500,10 @@

    -

    Reset source address pointer, destination address pointer, and/or length, keeping all other settings the same. Enable the transfer if p_src, p_dest, and length are valid.

    Implemented as
    +

    Reset source address pointer, destination address pointer, and/or length, keeping all other settings the same. Enable the transfer if p_src, p_dest, and length are valid.

    Implemented as
    +
    Parameters

    [in,out]p_ctrlPointer to control block. Must be declared by user. Elements set here.
    @@ -382,7 +527,10 @@

    -

    Enable transfer. Transfers occur after the activation source event (or when transfer_api_t::softwareStart is called if ELC_EVENT_ELC_NONE is chosen as activation source).

    Implemented as
    +

    Enable transfer. Transfers occur after the activation source event (or when transfer_api_t::softwareStart is called if no peripheral event is chosen as activation source).

    Implemented as
    +
    Parameters

    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    @@ -403,8 +551,11 @@

    -

    Disable transfer. Transfers do not occur after the activation source event (or when transfer_api_t::softwareStart is called if ELC_EVENT_ELC_NONE is chosen as the DMAC activation source).

    Note
    If a transfer is in progress, it will be completed. Subsequent transfer requests do not cause a transfer.
    -
    Implemented as
    +

    Disable transfer. Transfers do not occur after the activation source event (or when transfer_api_t::softwareStart is called if no peripheral event is chosen as the DMAC activation source).

    Note
    If a transfer is in progress, it will be completed. Subsequent transfer requests do not cause a transfer.
    +
    Implemented as
    +
    Parameters

    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    @@ -425,9 +576,12 @@

    -

    Start transfer in software.

    Warning
    Only works if ELC_EVENT_ELC_NONE is chosen as the DMAC activation source.
    +

    Start transfer in software.

    Warning
    Only works if no peripheral event is chosen as the DMAC activation source.
    Note
    Not supported for DTC.
    -
    Implemented as
    +
    Implemented as
    +
    Parameters

    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    @@ -452,8 +606,11 @@

    Note
    Not supported for DTC.
    Only applies for transfers started with TRANSFER_START_MODE_REPEAT.
    -
    Warning
    Only works if ELC_EVENT_ELC_NONE is chosen as the DMAC activation source.
    -
    Implemented as
    +
    Warning
    Only works if no peripheral event is chosen as the DMAC activation source.
    +
    Implemented as
    +
    Parameters

    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    @@ -474,7 +631,10 @@

    -

    Provides information about this transfer.

    Implemented as
    +

    Provides information about this transfer.

    Implemented as
    +
    Parameters

    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    @@ -496,10 +656,40 @@

    -

    Releases hardware lock. This allows a transfer to be reconfigured using transfer_api_t::open.

    Implemented as
    +

    Releases hardware lock. This allows a transfer to be reconfigured using transfer_api_t::open.

    Implemented as
    +
    +
    Parameters
    +

    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    + +
    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    +
    +
    + +

    +
    + +

    ◆ reload

    + +
    +
    + + + + +
    fsp_err_t(* transfer_api_t::reload) (transfer_ctrl_t *const p_ctrl, void const *p_src, void *p_dest, uint32_t const num_transfers)
    +
    +

    To update next transfer information without interruption during transfer. Allow further transfer continuation.

    Implemented as
    +
    Parameters
    + + +
    [in]p_ctrlControl block set in transfer_api_t::open call for this transfer.
    [in]p_srcPointer to source. Set to NULL if source pointer should not change.
    [in]p_destPointer to destination. Set to NULL if destination pointer should not change.
    [in]num_transfersTransfer length in normal mode or block mode.
    @@ -558,8 +748,7 @@

    Transfer control block. Allocate an instance specific control block to pass into the transfer API calls.

    Implemented as
    @@ -579,11 +768,21 @@

    Transfer mode describes what will happen when a transfer request occurs.

    - + + + + - - +
    Enumerator
    TRANSFER_MODE_NORMAL 

    In normal mode, each transfer request causes a transfer of transfer_size_t from the source pointer to the destination pointer. The transfer length is decremented and the source and address pointers are updated according to transfer_addr_mode_t. After the transfer length reaches 0, transfer requests will not cause any further transfers.

    +
    Enumerator
    TRANSFER_MODE_NORMAL 

    In normal mode, each transfer request causes a transfer of transfer_size_t from the source pointer to the destination pointer. The transfer length is decremented and the source and address pointers are updated according to transfer_addr_mode_t. After the transfer length reaches 0, transfer requests will not cause any further transfers.

    +
    TRANSFER_MODE_REPEAT 

    Repeat mode is like normal mode, except that when the transfer length reaches 0, the pointer to the repeat area and the transfer length will be reset to their initial values. If DMAC is used, the transfer repeats only transfer_info_t::num_blocks times. After the transfer repeats transfer_info_t::num_blocks times, transfer requests will not cause any further transfers. If DTC is used, the transfer repeats continuously (no limit to the number of repeat transfers).

    +
    TRANSFER_MODE_BLOCK 

    In block mode, each transfer request causes transfer_info_t::length transfers of transfer_size_t. After each individual transfer, the source and destination pointers are updated according to transfer_addr_mode_t. After the block transfer is complete, transfer_info_t::num_blocks is decremented. After the transfer_info_t::num_blocks reaches 0, transfer requests will not cause any further transfers.

    +
    TRANSFER_MODE_REPEAT_BLOCK 

    In addition to block mode features, repeat-block mode supports a ring buffer of blocks and offsets within a block (to split blocks into arrays of their first data, second data, etc.)

    +
    TRANSFER_MODE_NORMAL 

    Normal mode.

    TRANSFER_MODE_REPEAT 

    Repeat mode is like normal mode, except that when the transfer length reaches 0, the pointer to the repeat area and the transfer length will be reset to their initial values. If DMAC is used, the transfer repeats only transfer_info_t::num_blocks times. After the transfer repeats transfer_info_t::num_blocks times, transfer requests will not cause any further transfers. If DTC is used, the transfer repeats continuously (no limit to the number of repeat transfers).

    +
    TRANSFER_MODE_BLOCK 

    Block mode.

    TRANSFER_MODE_BLOCK 

    In block mode, each transfer request causes transfer_info_t::length transfers of transfer_size_t. After each individual transfer, the source and destination pointers are updated according to transfer_addr_mode_t. After the block transfer is complete, transfer_info_t::num_blocks is decremented. After the transfer_info_t::num_blocks reaches 0, transfer requests will not cause any further transfers.

    +
    TRANSFER_MODE_NORMAL 

    Normal mode.

    +
    TRANSFER_MODE_BLOCK 

    Block mode.

    @@ -602,11 +801,43 @@

    Transfer size specifies the size of each individual transfer. Total transfer length = transfer_size_t * transfer_length_t

    - + + + + + + - - + + + + + + + + + +
    Enumerator
    TRANSFER_SIZE_1_BYTE 

    Each transfer transfers a 8-bit value.

    +
    Enumerator
    TRANSFER_SIZE_1_BYTE 

    Each transfer transfers a 8-bit value.

    +
    TRANSFER_SIZE_2_BYTE 

    Each transfer transfers a 16-bit value.

    +
    TRANSFER_SIZE_4_BYTE 

    Each transfer transfers a 32-bit value.

    +
    TRANSFER_SIZE_1_BYTE 

    Each transfer transfers a 8-bit value.

    +
    TRANSFER_SIZE_2_BYTE 

    Each transfer transfers a 16-bit value.

    +
    TRANSFER_SIZE_4_BYTE 

    Each transfer transfers a 32-bit value.

    +
    TRANSFER_SIZE_8_BYTE 

    Each transfer transfers a 64-bit value.

    TRANSFER_SIZE_2_BYTE 

    Each transfer transfers a 16-bit value.

    +
    TRANSFER_SIZE_16_BYTE 

    Each transfer transfers a 128-bit value.

    TRANSFER_SIZE_4_BYTE 

    Each transfer transfers a 32-bit value.

    +
    TRANSFER_SIZE_32_BYTE 

    Each transfer transfers a 256-bit value.

    +
    TRANSFER_SIZE_64_BYTE 

    Each transfer transfers a 512-bit value.

    +
    TRANSFER_SIZE_128_BYTE 

    Each transfer transfers a 1024-bit value.

    +
    TRANSFER_SIZE_1_BYTE 

    Each transfer transfers a 8-bit value.

    +
    TRANSFER_SIZE_2_BYTE 

    Each transfer transfers a 16-bit value.

    +
    TRANSFER_SIZE_4_BYTE 

    Each transfer transfers a 32-bit value.

    +
    TRANSFER_SIZE_8_BYTE 

    Each transfer transfers a 64-bit value.

    +
    TRANSFER_SIZE_16_BYTE 

    Each transfer transfers a 128-bit value.

    +
    TRANSFER_SIZE_32_BYTE 

    Each transfer transfers a 256-bit value.

    +
    TRANSFER_SIZE_64_BYTE 

    Each transfer transfers a 512-bit value.

    +
    TRANSFER_SIZE_128_BYTE 

    Each transfer transfers a 1024-bit value.

    @@ -625,13 +856,21 @@

    Address mode specifies whether to modify (increment or decrement) pointer after each transfer.

    - + + + + - - -
    Enumerator
    TRANSFER_ADDR_MODE_FIXED 

    Address pointer remains fixed after each transfer.

    +
    Enumerator
    TRANSFER_ADDR_MODE_FIXED 

    Address pointer remains fixed after each transfer.

    +
    TRANSFER_ADDR_MODE_OFFSET 

    Offset is added to the address pointer after each transfer.

    +
    TRANSFER_ADDR_MODE_INCREMENTED 

    Address pointer is incremented by associated transfer_size_t after each transfer.

    +
    TRANSFER_ADDR_MODE_DECREMENTED 

    Address pointer is decremented by associated transfer_size_t after each transfer.

    +
    TRANSFER_ADDR_MODE_INCREMENTED 

    Address pointer is incremented by associated transfer_size_t after each transfer.

    TRANSFER_ADDR_MODE_OFFSET 

    Offset is added to the address pointer after each transfer.

    +
    TRANSFER_ADDR_MODE_FIXED 

    Address pointer remains fixed after each transfer.

    TRANSFER_ADDR_MODE_INCREMENTED 

    Address pointer is incremented by associated transfer_size_t after each transfer.

    +
    TRANSFER_ADDR_MODE_INCREMENTED 

    Address pointer is incremented by associated transfer_size_t after each transfer.

    TRANSFER_ADDR_MODE_DECREMENTED 

    Address pointer is decremented by associated transfer_size_t after each transfer.

    +
    TRANSFER_ADDR_MODE_FIXED 

    Address pointer remains fixed after each transfer.

    @@ -648,11 +887,11 @@

    -

    Repeat area options (source or destination). In TRANSFER_MODE_REPEAT, the selected pointer returns to its original value after transfer_info_t::length transfers. In TRANSFER_MODE_BLOCK, the selected pointer returns to its original value after each transfer.

    +

    Repeat area options (source or destination). In TRANSFER_MODE_REPEAT, the selected pointer returns to its original value after transfer_info_t::length transfers. In TRANSFER_MODE_BLOCK and TRANSFER_MODE_REPEAT_BLOCK, the selected pointer returns to its original value after each transfer.

    - -
    Enumerator
    TRANSFER_REPEAT_AREA_DESTINATION 

    Destination area repeated in TRANSFER_MODE_REPEAT or TRANSFER_MODE_BLOCK.

    +
    Enumerator
    TRANSFER_REPEAT_AREA_DESTINATION 

    Destination area repeated in TRANSFER_MODE_REPEAT or TRANSFER_MODE_BLOCK or TRANSFER_MODE_REPEAT_BLOCK.

    TRANSFER_REPEAT_AREA_SOURCE 

    Source area repeated in TRANSFER_MODE_REPEAT or TRANSFER_MODE_BLOCK.

    +
    TRANSFER_REPEAT_AREA_SOURCE 

    Source area repeated in TRANSFER_MODE_REPEAT or TRANSFER_MODE_BLOCK or TRANSFER_MODE_REPEAT_BLOCK.

    @@ -729,7 +968,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

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    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Functions | +Data Structures | +Enumerations
    +
    +
    Temperature Sensor Unit (r_tsu_b)
    Modules » Analog
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_TSU_B_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)
     
    fsp_err_t R_TSU_B_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_channel_cfg)
     
    fsp_err_t R_TSU_B_ScanStart (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_TSU_B_ScanGroupStart (adc_ctrl_t *p_ctrl, adc_group_mask_t group_id)
     
    fsp_err_t R_TSU_B_ScanStop (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_TSU_B_StatusGet (adc_ctrl_t *p_ctrl, adc_status_t *p_status)
     
    fsp_err_t R_TSU_B_Read (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint16_t *const p_data)
     
    fsp_err_t R_TSU_B_Read32 (adc_ctrl_t *p_ctrl, adc_channel_t const reg_id, uint32_t *const p_data)
     
    fsp_err_t R_TSU_B_Close (adc_ctrl_t *p_ctrl)
     
    fsp_err_t R_TSU_B_InfoGet (adc_ctrl_t *p_ctrl, adc_info_t *p_adc_info)
     
    fsp_err_t R_TSU_B_Calibrate (adc_ctrl_t *const p_ctrl, void const *p_extend)
     
    fsp_err_t R_TSU_B_OffsetSet (adc_ctrl_t *const p_ctrl, adc_channel_t const reg_id, int32_t offset)
     
    fsp_err_t R_TSU_B_CallbackSet (adc_ctrl_t *const p_api_ctrl, void(*p_callback)(adc_callback_args_t *), void const *const p_context, adc_callback_args_t *const p_callback_memory)
     
    fsp_err_t R_TSU_B_CalculateTemperature (adc_ctrl_t *p_ctrl, uint16_t temperature_code, float *const p_temperature)
     
    +

    Detailed Description

    +

    Driver for the TSU peripheral on RZ microprocessor. This module implements the ADC Interface.

    +

    +Overview

    +

    +Features

    +

    The TSU module supports the following features: *1

    +
      +
    • Temperature code reading function
      • +
    • Temperature code averaging function
      • +
    • Comparison with the upper and lower limit settings
      • +
    • Interrupt function
      • +
    • Conversion start trigger (by software and by an ELC trigger)
      • +
    • Single scan
      • +
    +

    *1 This driver only supports Cortex-M33.

    +

    +Configuration

    +

    Build Time Configurations for r_tsu_b

    +The following build time configurations are defined in fsp_cfg/r_tsu_b_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Analog > ADC Driver on r_tsu_b

    +This module can be added to the Stacks tab via New Stack > Analog > ADC Driver on r_tsu_b.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_tsu0 Module name
    General > UnitUnit must be a non-negative integer0 Specifies the TSU_B Unit to be used.
    General > Average Count
      +
    • +1(Latest read data)
      • +
    • +2
      • +
    • +4
      • +
    • +8
      • +
    +    		1(Latest read data) Average Count Setting.
    General > Trigger mode
      +
    • +Software
      • +
    • +ELC Trigger
      • +
    +    		Software Select the trigger mode.
    General > ELC EventMCU Specific OptionsSpecifies the ELC trigger to be used for this unit.
    Comparison Function > Compare Mode
      +
    • +Disabled
      • +
    • +Outside the range of the setting values
      • +
    • +Within the range of the setting values
      • +
    +    		Disabled Select the compare mode.
    Comparison Function > Lower Limit ValueValue must be between -40 and 12515 Lower Limit Setting (degrees Celsius).
    Comparison Function > Upper Limit ValueValue must be between -40 and 12525 Upper Limit Setting (degrees Celsius).
    Interrupts > CallbackName must be a valid C symbolNULL A user callback function can be provided here. If this callback function is provided, it is called from the interrupt service routine (ISR)
    Interrupts > Conversion Complete Interrupt EnableMCU Specific OptionsEnable or disable the conversion complete interrupt.
    Interrupts > Conversion Complete Interrupt PriorityValue must be between 0 and 25512 Select the interrupt priority for Conversion complete.
    Interrupts > Comparison Result Interrupt EnableMCU Specific OptionsEnable or disable the Comparison Result interrupt.
    Interrupts > Comparison Result Interrupt PriorityValue must be between 0 and 25512 Select the interrupt priority for Comparison Result.
    +

    +

    +Clock Configuration

    +

    The TSU_B clock is OSC. Fix the clock frequency of this unit to 24 MHz.

    +

    +Pin Configuration

    +

    This module does not use I/O pins.

    +

    +Usage Notes

    +

    Using the Temperature Sensor with the TSU

    +

    The TSU_B HAL module supports reading the data from the on-chip temperature sensor. The value returned by the sensor can be converted to degrees Celsius by calling R_TSU_B_CalculateTemperature.

    +

    Comparison function

    +

    This function compares the averaged temperature code and the values set by the LLIM[11:0] bits of the lower limit setting register and the ULIM[11:0] bits of the upper limit setting register. When a value meets the configured condition an interrupt can be produced.

    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the TSU_B in an application.

    +
    const tsu_b_extended_cfg_t g_tsu0_cfg_extend =
    {
    .average_count = TSU_B_AVERAGE_OFF,
    .comparison_mode = TSU_B_COMPARE_CFG_DISABLE,
    .compare_ref_low = 0,
    .compare_ref_high = 0,
    .compare_irq = FSP_INVALID_VECTOR,
    .compare_ipl = 12,
    };
    const adc_cfg_t g_tsu0_cfg =
    {
    .unit = 0,
    .mode = ADC_MODE_SINGLE_SCAN,
    .resolution = ADC_RESOLUTION_12_BIT,
    .alignment = (adc_alignment_t) ADC_ALIGNMENT_RIGHT,
    .trigger = ADC_TRIGGER_SOFTWARE,
    .p_callback = tsu_b_callback,
    .p_context = NULL,
    .p_extend = &g_tsu0_cfg_extend,
    .scan_end_irq = TSU0_S12TSUADI_IRQn,
    .scan_end_ipl = (12),
    };
    volatile bool scan_complete_flag = false;
    void tsu_b_callback (adc_callback_args_t * p_args)
    {
    FSP_PARAMETER_NOT_USED(p_args);
    scan_complete_flag = true;
    }
    void tsu_b_basic_example (void)
    {
    uint32_t calibration_data1;
    uint32_t calibration_data2;
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_TSU_B_Open(&g_tsu0_ctrl, &g_tsu0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Get Calibration data from the MCU if available. */
    adc_info_t tsu_info;
    err = R_TSU_B_InfoGet(&g_tsu0_ctrl, &tsu_info);
    assert(FSP_SUCCESS == err);
    calibration_data1 = tsu_info.calibration_data1;
    calibration_data2 = tsu_info.calibration_data2;
    /* Check the calibration data because of if the calibration data is an incorrect value, the temperature cannot be calculated correctly. */
    if ((calibration_data1 < TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT) || (calibration_data1 > TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT) || (calibration_data2 < TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT) || (calibration_data2 > TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT))
    {
    __BKPT(0);
    }
    /* In software trigger mode, start a scan by calling R_TSU_B_ScanStart(). In other modes, enable external
    * triggers by calling R_TSU_B_ScanStart(). */
    err = R_TSU_B_ScanStart(&g_tsu0_ctrl);
    assert(FSP_SUCCESS == err);
    /* Wait for conversion to complete. */
    while (!scan_complete_flag)
    {
    /* Wait for callback to set flag. */
    }
    /* Read converted data. */
    uint16_t conversion_result;
    err = R_TSU_B_Read(&g_tsu0_ctrl, 0, &conversion_result);
    assert(FSP_SUCCESS == err);
    /* Calculate temperature. */
    float temperature;
    err = R_TSU_B_CalculateTemperature(&g_tsu0_ctrl, conversion_result, &temperature);
    assert(FSP_SUCCESS == err);
    }

    Compare Example

    +

    This example shows how to configure the compare function at runtime as well as how to handle events and obtain comparison results through a callback.

    +
    const tsu_b_extended_cfg_t g_tsu0_cfg_extend =
    {
    .average_count = TSU_B_AVERAGE_EIGHT,
    .comparison_mode = TSU_B_COMPARE_CFG_INSIDE,
    .compare_ref_low = 20,
    .compare_ref_high = 30,
    .compare_irq = TSU0_S12TSUADCMPI_IRQn,
    .compare_ipl = (12),
    };
    const adc_cfg_t g_tsu0_cfg =
    {
    .unit = 0,
    .mode = ADC_MODE_SINGLE_SCAN,
    .resolution = ADC_RESOLUTION_12_BIT,
    .alignment = (adc_alignment_t) ADC_ALIGNMENT_RIGHT,
    .trigger = ADC_TRIGGER_SOFTWARE,
    .p_callback = tsu_b_compare_callback,
    .p_context = NULL,
    .p_extend = &g_tsu_cfg_extend,
    .scan_end_irq = FSP_INVALID_VECTOR,
    .scan_end_ipl = (12),
    };
    fsp_err_t err = FSP_SUCCESS;
    void tsu_b_compare_callback (adc_callback_args_t * const p_unused)
    {
    (void) p_unused;
    /* Read converted data. */
    uint16_t conversion_result;
    float temperature;
    /* Read converted data. */
    err = R_TSU_B_Read(&g_tsu0_ctrl, 0, &conversion_result);
    assert(FSP_SUCCESS == err);
    /* Calculate temperature. */
    err = R_TSU_B_CalculateTemperature(&g_tsu0_ctrl, conversion_result, &temperature);
    assert(FSP_SUCCESS == err);
    }
    void tsu_b_compare_example (void)
    {
    uint32_t calibration_data1;
    uint32_t calibration_data2;
    /* Initializes the module. */
    err = R_TSU_B_Open(&g_tsu0_ctrl, &g_tsu0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Get Calibration data from the MCU if available. */
    adc_info_t tsu_info;
    err = R_TSU_B_InfoGet(&g_tsu0_ctrl, &tsu_info);
    assert(FSP_SUCCESS == err);
    calibration_data1 = tsu_info.calibration_data1;
    calibration_data2 = tsu_info.calibration_data2;
    /* Check the calibration data because of if the calibration data is an incorrect value, the temperature cannot be calculated correctly. */
    if ((calibration_data1 < TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT) || (calibration_data1 > TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT) || (calibration_data2 < TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT) || (calibration_data2 > TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT))
    {
    __BKPT(0);
    }
    /* In software trigger mode, start a scan by calling R_TSU_B_ScanStart(). In other modes, enable external
    * triggers by calling R_TSU_B_ScanStart(). */
    err = R_TSU_B_ScanStart(&g_tsu0_ctrl);
    assert(FSP_SUCCESS == err);
    while (1)
    ;
    }

    Get temperature Example

    +

    This example shows how to get the temperature multiple times and average it to calculate the temperature.

    +
    #define TSU_B_EXAMPLE_CONVERSION_COUNT (4)
    #define TSU_B_EXAMPLE_TEMPERATURE_LOWER_LIMIT (-41)
    #define TSU_B_EXAMPLE_TEMPERATURE_UPPER_LIMIT (125)
    #define TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT (411)
    #define TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT (3651)
    #define TSU_B_EXAMPLE_TEMPERATURE_POSITIVE_ERROR (5)
    #define TSU_B_EXAMPLE_TEMPERATURE_NEGATIVE_ERROR (-5)
    const tsu_b_extended_cfg_t g_tsu0_cfg_extend =
    {
    .average_count = TSU_B_AVERAGE_EIGHT,
    .comparison_mode = TSU_B_COMPARE_CFG_DISABLE,
    .compare_ref_low = 0,
    .compare_ref_high = 0,
    .compare_irq = FSP_INVALID_VECTOR,
    .compare_ipl = 12,
    };
    const adc_cfg_t g_tsu0_cfg =
    {
    .unit = 0,
    .mode = ADC_MODE_SINGLE_SCAN,
    .resolution = ADC_RESOLUTION_12_BIT,
    .alignment = (adc_alignment_t) ADC_ALIGNMENT_RIGHT,
    .trigger = ADC_TRIGGER_SOFTWARE,
    .p_callback = tsu_b_callback,
    .p_context = NULL,
    .p_extend = &g_tsu0_cfg_extend,
    .scan_end_irq = TSU0_S12TSUADI_IRQn,
    .scan_end_ipl = (12),
    };
    volatile bool scan_complete_flag = false;
    void tsu_b_callback (adc_callback_args_t * p_args)
    {
    FSP_PARAMETER_NOT_USED(p_args);
    scan_complete_flag = true;
    }
    volatile bool timer_overflow_flag = false;
    void gpt_callback (timer_callback_args_t * p_args)
    {
    FSP_PARAMETER_NOT_USED(p_args);
    timer_overflow_flag = true;
    }
    void tsu_b_get_temperature_example (void)
    {
    uint32_t calibration_data1;
    uint32_t calibration_data2;
    uint8_t conversion_count = 0;
    float temperature_sum = 0.0;
    float Tj;
    uint16_t conversion_result[TSU_B_EXAMPLE_CONVERSION_COUNT];
    float temperature[TSU_B_EXAMPLE_CONVERSION_COUNT];
    fsp_err_t err = FSP_SUCCESS;
    /* Initializes the module. */
    err = R_TSU_B_Open(&g_tsu0_ctrl, &g_tsu0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Get Calibration data from the MCU if available. */
    adc_info_t tsu_info;
    err = R_TSU_B_InfoGet(&g_tsu0_ctrl, &tsu_info);
    assert(FSP_SUCCESS == err);
    calibration_data1 = tsu_info.calibration_data1;
    calibration_data2 = tsu_info.calibration_data2;
    /* Check the calibration data because of if the calibration data is an incorrect value, the temperature cannot be calculated correctly. */
    if ((calibration_data1 < TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT) || (calibration_data1 > TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT) || (calibration_data2 < TSU_B_EXAMPLE_CALIBRATION_DATA_LOWER_LIMIT) || (calibration_data2 > TSU_B_EXAMPLE_CALIBRATION_DATA_UPPER_LIMIT))
    {
    __BKPT(0);
    }
    while(conversion_count < TSU_B_EXAMPLE_CONVERSION_COUNT)
    {
    if(conversion_count == 0)
    {
    /* Initializes the GPT module. Set the period to 500ms. (This value becomes the temperature acquisition interval and can be changed by the user.) */
    err = R_GPT_Open(&g_timer0_ctrl, &g_timer0_cfg);
    assert(FSP_SUCCESS == err);
    /* Start the timer. */
    err = R_GPT_Start(&g_timer0_ctrl);
    assert(FSP_SUCCESS == err);
    }
    while (!timer_overflow_flag)
    {
    /* Wait for callback to set flag. */
    }
    timer_overflow_flag = false;
    /* In software trigger mode, start a scan by calling R_TSU_B_ScanStart(). */
    err = R_TSU_B_ScanStart(&g_tsu0_ctrl);
    assert(FSP_SUCCESS == err);
    /* Wait for conversion to complete. */
    while (!scan_complete_flag)
    {
    /* Wait for callback to set flag. */
    }
    scan_complete_flag = false;
    /* Read converted data. */
    err = R_TSU_B_Read(&g_tsu0_ctrl, 0, &conversion_result[conversion_count]);
    assert(FSP_SUCCESS == err);
    /* Calculate temperature. */
    err = R_TSU_B_CalculateTemperature(&g_tsu0_ctrl, conversion_result[conversion_count], &temperature[conversion_count]);
    assert(FSP_SUCCESS == err);
    /* Confirm that it is within the range of +125 degrees Celsius to -41 degrees Celsius and calculate the average value. */
    if((temperature[conversion_count] > TSU_B_EXAMPLE_TEMPERATURE_LOWER_LIMIT) && (temperature[conversion_count] < TSU_B_EXAMPLE_TEMPERATURE_UPPER_LIMIT))
    {
    temperature_sum += temperature[conversion_count];
    conversion_count++;
    }
    else
    {
    break;
    }
    }
    Tj = temperature_sum / TSU_B_EXAMPLE_CONVERSION_COUNT;
    /* Check that the initial value and Tj are within the error range. */
    if ((TSU_B_EXAMPLE_TEMPERATURE_POSITIVE_ERROR < (Tj - temperature[0])) || (TSU_B_EXAMPLE_TEMPERATURE_NEGATIVE_ERROR > (Tj - temperature[0])))
    {
    __BKPT(0);
    }
    }
    + + + + + +

    +Data Structures

    struct  tsu_b_extended_cfg_t
     
    struct  tsu_b_instance_ctrl_t
     
    + + + + + +

    +Enumerations

    enum  tsu_b_average_t
     
    enum  tsu_b_compare_cfg_t
     
    +

    Data Structure Documentation

    + +

    ◆ tsu_b_extended_cfg_t

    + +
    +
    + + + + +
    struct tsu_b_extended_cfg_t
    +
    +

    Extended configuration structure for ADC.

    +
    + + + + + + + + + + + + + + + + + + + +
    Data Fields
    +tsu_b_average_t +average_count +Average counts.
    +tsu_b_compare_cfg_t +comparison_mode +TSU_B compare function configuration.
    +int16_t +compare_ref_low +Lower reference value.
    +int16_t +compare_ref_high +Upper reference value.
    +IRQn_Type +compare_irq +IRQ number for Comparison Result Interrupts.
    +uint8_t +compare_ipl +Priority for Comparison Result Interrupts.
    + +
    +
    + +

    ◆ tsu_b_instance_ctrl_t

    + +
    +
    + + + + +
    struct tsu_b_instance_ctrl_t
    +
    +

    TSU_B instance control block. DO NOT INITIALIZE. Initialized in adc_api_t::open().

    +
    +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ tsu_b_average_t

    + +
    +
    + + + + +
    enum tsu_b_average_t
    +
    +

    TSU_B data sample addition and averaging options

    + + + + + +
    Enumerator
    TSU_B_AVERAGE_OFF 

    Latest read data.

    +
    TSU_B_AVERAGE_TWO 

    Average two samples.

    +
    TSU_B_AVERAGE_FOUR 

    Average four samples.

    +
    TSU_B_AVERAGE_EIGHT 

    Average eight samples.

    +
    + +
    +
    + +

    ◆ tsu_b_compare_cfg_t

    + +
    +
    + + + + +
    enum tsu_b_compare_cfg_t
    +
    +

    TSU_B comparison settings

    + + + + +
    Enumerator
    TSU_B_COMPARE_CFG_DISABLE 

    Compare function is disabled.

    +
    TSU_B_COMPARE_CFG_OUTSIDE 

    Comparison Mode: Outside.

    +
    TSU_B_COMPARE_CFG_INSIDE 

    Comparison Mode: Inside.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_TSU_B_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_Open (adc_ctrl_t * p_ctrl,
    adc_cfg_t const *const p_cfg 
    )
    +
    +

    Initializes the TSU_B module and applies configurations.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSModule is ready for use.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_ALREADY_OPENThe instance control structure has already been opened.
    FSP_ERR_IRQ_BSP_DISABLEDA callback is provided, but the interrupt is not enabled.
    FSP_ERR_INVALID_HW_CONDITIONCalibration data is invalid value, so TSU_B is in invalid condition.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_ScanCfg()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_ScanCfg (adc_ctrl_t * p_ctrl,
    void const *const p_channel_cfg 
    )
    +
    +

    adc_api_t::scanCfg is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_ScanStart()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_TSU_B_ScanStart (adc_ctrl_t * p_ctrl)
    +
    +

    Starts a software scan or enables the hardware trigger for a scan depending on how the triggers were configured in the R_TSU_B_Open call. If the unit was configured for ELC or external hardware triggering, then this function allows the trigger signal to get to the TSU_B unit. The function is not able to control the generation of the trigger itself. If the unit was configured for software triggering, then this function starts the software triggered scan.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSScan started (software trigger) or hardware triggers enabled.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENTSU_B is not open.
    FSP_ERR_NOT_INITIALIZEDTSU_B is not initialized.
    FSP_ERR_IN_USEAnother scan is still in progress (software trigger).
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_ScanGroupStart()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_ScanGroupStart (adc_ctrl_t * p_ctrl,
    adc_group_mask_t group_id 
    )
    +
    +

    adc_api_t::scanGroupStart is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_ScanStop()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_TSU_B_ScanStop (adc_ctrl_t * p_ctrl)
    +
    +

    Disables the unit from being triggered by the hardware trigger (ELC or external) based on what type of trigger the unit was configured for in the R_TSU_B_Open function. Stopping a hardware triggered scan via this function does not abort an ongoing scan, but prevents the next scan from occurring.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSHardware triggers disabled.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENTSU_B is not open.
    FSP_ERR_NOT_INITIALIZEDTSU_B is not initialized.
    FSP_ERR_INVALID_MODENot valid for software triggers.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_StatusGet (adc_ctrl_t * p_ctrl,
    adc_status_t * p_status 
    )
    +
    +

    Get current TSU_B status and store it in provided pointer p_status. Provides the status of any scan process that was started, including scans started by ELC or external triggers.

    +
    Return values
    + + + + +
    FSP_SUCCESSModule status stored in the provided pointer p_status
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_Read()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_Read (adc_ctrl_t * p_ctrl,
    adc_channel_t const reg_id,
    uint16_t *const p_data 
    )
    +
    +

    Reads conversion results from a sensor.

    +
    Return values
    + + + + + +
    FSP_SUCCESSData read into provided p_data.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENTSU_B is not open.
    FSP_ERR_NOT_INITIALIZEDTSU_B is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_Read32()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_Read32 (adc_ctrl_t * p_ctrl,
    adc_channel_t const reg_id,
    uint32_t *const p_data 
    )
    +
    +

    adc_api_t::read32 is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_TSU_B_Close (adc_ctrl_t * p_ctrl)
    +
    +

    This function ends any scan in progress, disables interrupts, and removes power to the A/D peripheral.

    +
    Return values
    + + + + +
    FSP_SUCCESSModule closed.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENUnit is not open.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_InfoGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_InfoGet (adc_ctrl_t * p_ctrl,
    adc_info_t * p_adc_info 
    )
    +
    +

    Get the calibration data for the sensor.

    +
    Return values
    + + + + +
    FSP_SUCCESSInformation stored in p_adc_info.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENTSU_B is not open.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_Calibrate()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_Calibrate (adc_ctrl_t *const p_ctrl,
    void const * p_extend 
    )
    +
    +

    adc_api_t::calibrate is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_OffsetSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_OffsetSet (adc_ctrl_t *const p_ctrl,
    adc_channel_t const reg_id,
    int32_t offset 
    )
    +
    +

    adc_api_t::offsetSet is not supported.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDFunction not supported in this implementation.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_CallbackSet (adc_ctrl_t *const p_api_ctrl,
    void(*)(adc_callback_args_t *) p_callback,
    void const *const p_context,
    adc_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements adc_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    + +

    ◆ R_TSU_B_CalculateTemperature()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_TSU_B_CalculateTemperature (adc_ctrl_t * p_ctrl,
    uint16_t temperature_code,
    float *const p_temperature 
    )
    +
    +

    The value returned from the sensor can be converted into degrees Celsius.

    +
    Return values
    + + + + + +
    FSP_SUCCESSData calculate into provided p_temp.
    FSP_ERR_ASSERTIONAn input argument is invalid.
    FSP_ERR_NOT_OPENTSU_B is not open.
    FSP_ERR_NOT_INITIALIZEDTSU_B is not initialized.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___t_s_u___b.js b/group___t_s_u___b.js new file mode 100644 index 0000000..f8be386 --- /dev/null +++ b/group___t_s_u___b.js @@ -0,0 +1,37 @@ +var group___t_s_u___b = +[ + [ "tsu_b_extended_cfg_t", "group___t_s_u___b.html#structtsu__b__extended__cfg__t", [ + [ "average_count", "group___t_s_u___b.html#a525f475e04de0b02bf01105495f9f474", null ], + [ "comparison_mode", "group___t_s_u___b.html#a3906e15e289a42557f63f5514c81f8d1", null ], + [ "compare_ref_low", "group___t_s_u___b.html#a1fce1fbc4e5f916220040a4146e27c49", null ], + [ "compare_ref_high", "group___t_s_u___b.html#a22491b611c1958bb5405b05b2a7a3feb", null ], + [ "compare_irq", "group___t_s_u___b.html#a3fc59fe6297b3d440cb73510eaf7f21b", null ], + [ "compare_ipl", "group___t_s_u___b.html#a06b6e82fcee558ee4548f37d8620a1f4", null ] + ] ], + [ "tsu_b_instance_ctrl_t", "group___t_s_u___b.html#structtsu__b__instance__ctrl__t", null ], + [ "tsu_b_average_t", "group___t_s_u___b.html#ga5ab9606f8b75e848e5743dd79d08aa29", [ + [ "TSU_B_AVERAGE_OFF", "group___t_s_u___b.html#gga5ab9606f8b75e848e5743dd79d08aa29a0c5fc7fe1db6dc27007a10395c080d74", null ], + [ "TSU_B_AVERAGE_TWO", "group___t_s_u___b.html#gga5ab9606f8b75e848e5743dd79d08aa29a77418279f9f52d5ca8ffa8418e42d8bf", null ], + [ "TSU_B_AVERAGE_FOUR", "group___t_s_u___b.html#gga5ab9606f8b75e848e5743dd79d08aa29af001e8665548dd625eff4fe09f1d0102", null ], + [ "TSU_B_AVERAGE_EIGHT", "group___t_s_u___b.html#gga5ab9606f8b75e848e5743dd79d08aa29afa39988bdc4f045e0cae55754afe8d14", null ] + ] ], + [ "tsu_b_compare_cfg_t", "group___t_s_u___b.html#gae1e53473fd2f49e840ce26b43131aa29", [ + [ "TSU_B_COMPARE_CFG_DISABLE", "group___t_s_u___b.html#ggae1e53473fd2f49e840ce26b43131aa29a21127683f9dd0b510c15ebab44d7bf8a", null ], + [ "TSU_B_COMPARE_CFG_OUTSIDE", "group___t_s_u___b.html#ggae1e53473fd2f49e840ce26b43131aa29ab9a284ff26dcbb57af3e9278b7882702", null ], + [ "TSU_B_COMPARE_CFG_INSIDE", "group___t_s_u___b.html#ggae1e53473fd2f49e840ce26b43131aa29aabcb24a3f71042eff1118cb3ebf8b318", null ] + ] ], + [ "R_TSU_B_Open", "group___t_s_u___b.html#ga97e39892fa51e09d3809f600781f3b98", null ], + [ "R_TSU_B_ScanCfg", "group___t_s_u___b.html#ga978c60f17aa8a2184140272e7588474e", null ], + [ "R_TSU_B_ScanStart", "group___t_s_u___b.html#ga39f1ed741b28eab45f1712935f3883e4", null ], + [ "R_TSU_B_ScanGroupStart", "group___t_s_u___b.html#gaef9ec32a8de4e4286e10f0c87efd450d", null ], + [ "R_TSU_B_ScanStop", "group___t_s_u___b.html#ga874a931c003bbe50ad12e6da4d87143f", null ], + [ "R_TSU_B_StatusGet", "group___t_s_u___b.html#ga15204e44f60f3f948c5b13983635742b", null ], + [ "R_TSU_B_Read", "group___t_s_u___b.html#gada13a2179de16db6073f307afae1e612", null ], + [ "R_TSU_B_Read32", "group___t_s_u___b.html#ga1b591622c668393be2a471acb5af0a09", null ], + [ "R_TSU_B_Close", "group___t_s_u___b.html#gab85e848ca49caaa929dd77dc8921e29f", null ], + [ "R_TSU_B_InfoGet", "group___t_s_u___b.html#ga5e8b4241a1e5e499da79c839aad0628e", null ], + [ "R_TSU_B_Calibrate", "group___t_s_u___b.html#ga11361111b88fa7e72cb9014d440c3ff1", null ], + [ "R_TSU_B_OffsetSet", "group___t_s_u___b.html#gac01f0a25e022187d5a10913234c6dd8e", null ], + [ "R_TSU_B_CallbackSet", "group___t_s_u___b.html#gabfa2e53113bbd7e12dea5dabf227903c", null ], + [ "R_TSU_B_CalculateTemperature", "group___t_s_u___b.html#ga7b164d0defb1b364c993b138a3ca0524", null ] +]; \ No newline at end of file diff --git a/group___u_a_r_t___a_p_i.html b/group___u_a_r_t___a_p_i.html index 481e9e0..c78c80f 100644 --- a/group___u_a_r_t___a_p_i.html +++ b/group___u_a_r_t___a_p_i.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: UART Interface +RZV Flexible Software Package Documentation: UART Interface @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Data Structures | @@ -111,7 +179,8 @@

  • CTS/RTS hardware flow control support (with an associated IOPORT pin)

    • Implemented by:

    + +

    @@ -364,6 +433,8 @@

    χ

     
    fsp_err_t(* close )(uart_ctrl_t *const p_ctrl)
     
    fsp_err_t(* readStop )(uart_ctrl_t *const p_ctrl, uint32_t *remaining_bytes)
     

    Field Documentation

    @@ -379,6 +450,7 @@

    Open UART device.

    Implemented as
    Parameters
    @@ -404,6 +476,7 @@

    Read from UART device. The read buffer is used until the read is complete. When a transfer is complete, the callback is called with event UART_EVENT_RX_COMPLETE. Bytes received outside an active transfer are received in the callback function with event UART_EVENT_RX_CHAR. The maximum transfer size is reported by infoGet().

    Implemented as
    Parameters
    @@ -430,6 +503,7 @@

    Write to UART device. The write buffer is used until write is complete. Do not overwrite write buffer contents until the write is finished. When the write is complete (all bytes are fully transmitted on the wire), the callback called with event UART_EVENT_TX_COMPLETE. The maximum transfer size is reported by infoGet().

    Implemented as
    Parameters
    @@ -457,6 +531,7 @@

    Warning
    Calling this API aborts any in-progress transmission and disables reception until the new baud settings have been applied.

    Implemented as
    Parameters
    @@ -482,6 +557,7 @@

    Get the driver specific information.

    Implemented as
    Parameters
    @@ -507,6 +583,7 @@

    Abort ongoing transfer.

    Implemented as
    Parameters
    @@ -532,6 +609,7 @@

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    • R_SCIF_Uart_CallbackSet()
      • +
    • R_SCI_B_Uart_CallbackSet()
    Parameters
    @@ -559,11 +637,38 @@

    Close UART device.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to the UART control block.
    +
    +
    + +

    +
    + +

    ◆ readStop

    + +
    +
    + + + + +
    fsp_err_t(* uart_api_t::readStop) (uart_ctrl_t *const p_ctrl, uint32_t *remaining_bytes)
    +
    +

    Stop ongoing read and return the number of bytes remaining in the read.

    Implemented as
    Parameters
    +
    [in]p_ctrlPointer to the UART control block.
    [in,out]remaining_bytesPointer to location to store remaining bytes for read.
    @@ -622,7 +727,8 @@

    UART control block. Allocate an instance specific control block to pass into the UART API calls.

    Implemented as
    @@ -675,11 +781,11 @@

    UART Data bit length definition

    - - -
    Enumerator
    UART_DATA_BITS_8 

    Data bits 8-bit.

    +
    Enumerator
    UART_DATA_BITS_9 

    Data bits 9-bit.

    UART_DATA_BITS_7 

    Data bits 7-bit.

    +
    UART_DATA_BITS_8 

    Data bits 8-bit.

    UART_DATA_BITS_9 

    Data bits 9-bit.

    +
    UART_DATA_BITS_7 

    Data bits 7-bit.

    @@ -758,7 +864,7 @@

      -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.

    diff --git a/group___u_a_r_t___a_p_i.js b/group___u_a_r_t___a_p_i.js index 75f4537..92caac6 100644 --- a/group___u_a_r_t___a_p_i.js +++ b/group___u_a_r_t___a_p_i.js @@ -37,7 +37,8 @@ var group___u_a_r_t___a_p_i = [ "infoGet", "group___u_a_r_t___a_p_i.html#aa6d5231c2b45a6479fc513d087924a50", null ], [ "communicationAbort", "group___u_a_r_t___a_p_i.html#af4aeab25d6aa83e0d47307043c053d11", null ], [ "callbackSet", "group___u_a_r_t___a_p_i.html#a51b74df27fb26e85700d9524cdfc7c01", null ], - [ "close", "group___u_a_r_t___a_p_i.html#a4e7e47514702ff0e3515280590dd9659", null ] + [ "close", "group___u_a_r_t___a_p_i.html#a4e7e47514702ff0e3515280590dd9659", null ], + [ "readStop", "group___u_a_r_t___a_p_i.html#acb47c360a2ac4ddd36e53f0a4ad71b92", null ] ] ], [ "uart_instance_t", "group___u_a_r_t___a_p_i.html#structuart__instance__t", [ [ "p_ctrl", "group___u_a_r_t___a_p_i.html#ae01cedb63e8739651eb14d0ccc9b54a4", null ], @@ -56,9 +57,9 @@ var group___u_a_r_t___a_p_i = [ "UART_EVENT_TX_DATA_EMPTY", "group___u_a_r_t___a_p_i.html#ggaf739f04f788018b4b59fb7ad75da0a8da03e2fd44218712f18f3cceb0a0ad7442", null ] ] ], [ "uart_data_bits_t", "group___u_a_r_t___a_p_i.html#gadc68b8fd9ded3990f84129df23fee798", [ + [ "UART_DATA_BITS_9", "group___u_a_r_t___a_p_i.html#ggadc68b8fd9ded3990f84129df23fee798a57a012c58e476a76ed8f54db28d94810", null ], [ "UART_DATA_BITS_8", "group___u_a_r_t___a_p_i.html#ggadc68b8fd9ded3990f84129df23fee798ad768185f3773e2d5953b28f3345561db", null ], - [ "UART_DATA_BITS_7", "group___u_a_r_t___a_p_i.html#ggadc68b8fd9ded3990f84129df23fee798a317e473e32315f1632829d176fbfd545", null ], - [ "UART_DATA_BITS_9", "group___u_a_r_t___a_p_i.html#ggadc68b8fd9ded3990f84129df23fee798a57a012c58e476a76ed8f54db28d94810", null ] + [ "UART_DATA_BITS_7", "group___u_a_r_t___a_p_i.html#ggadc68b8fd9ded3990f84129df23fee798a317e473e32315f1632829d176fbfd545", null ] ] ], [ "uart_parity_t", "group___u_a_r_t___a_p_i.html#ga6bcc37e31dd40c204b4ac6f6189e8878", [ [ "UART_PARITY_OFF", "group___u_a_r_t___a_p_i.html#gga6bcc37e31dd40c204b4ac6f6189e8878acdbc0c60cf74e4febad92afc44b88641", null ], diff --git a/group___w_d_t.html b/group___w_d_t.html new file mode 100644 index 0000000..4e5bb36 --- /dev/null +++ b/group___w_d_t.html @@ -0,0 +1,613 @@ + + + + + + + +RZV Flexible Software Package Documentation: Watchdog (r_wdt) + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Functions | +Data Structures
    +
    +
    Watchdog (r_wdt)
    Modules » Monitoring
    +
    +
    + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_WDT_Refresh (wdt_ctrl_t *const p_ctrl)
     
    fsp_err_t R_WDT_Open (wdt_ctrl_t *const p_ctrl, wdt_cfg_t const *const p_cfg)
     
    fsp_err_t R_WDT_StatusClear (wdt_ctrl_t *const p_ctrl, const wdt_status_t status)
     
    fsp_err_t R_WDT_StatusGet (wdt_ctrl_t *const p_ctrl, wdt_status_t *const p_status)
     
    fsp_err_t R_WDT_CounterGet (wdt_ctrl_t *const p_ctrl, uint32_t *const p_count)
     
    fsp_err_t R_WDT_TimeoutGet (wdt_ctrl_t *const p_ctrl, wdt_timeout_values_t *const p_timeout)
     
    fsp_err_t R_WDT_CallbackSet (wdt_ctrl_t *const p_ctrl, void(*p_callback)(wdt_callback_args_t *), void const *const p_context, wdt_callback_args_t *const p_callback_memory)
     
    +

    Detailed Description

    +

    Driver for the WDT peripheral on RZ MPUs. This module implements the WDT Interface.

    +

    +Overview

    +

    The watchdog timer is used to recover from unexpected errors in an application. The watchdog timer must be refreshed periodically in the permitted count window by the application. If the count is allowed to underflow or refresh occurs outside of the valid refresh period, the WDT resets the device or generates an IRQ.

    +
    +r_wdt_operation_example.png +
    +Watchdog Timer Operation Example
    +

    +Features

    +

    The WDT HAL module has the following key features:

      +
    • When the WDT underflows or is refreshed outside of the permitted refresh window, one of the following events can occur:
        +
      • Resetting of the device
        • +
      • Generation of an IRQ
        • +
      +
      • +
    • The WDT can be started from the application.
      • +
    +

    +Configuration

    +

    When using register start mode, configure the watchdog timer on the Stacks tab.

    +

    Build Time Configurations for r_wdt

    +The following build time configurations are defined in fsp_cfg/r_wdt_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Monitoring > Watchdog (r_wdt)

    +This module can be added to the Stacks tab via New Stack > Monitoring > Watchdog (r_wdt).
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    NameName must be a valid C symbolg_wdt0 Module name.
    ChannelMCU Specific OptionsCheck User's Manual: Hardware to see which CPU a channel is for.
    TimeoutMCU Specific OptionsSelect the watchdog timeout in cycles.
    Clock Division RatioMCU Specific OptionsSelect the watchdog clock divisor.
    Window Start PositionMCU Specific OptionsSelect the allowed watchdog refresh start point in %.
    Window End PositionMCU Specific OptionsSelect the allowed watchdog refresh end point in %.
    WDT CountingMCU Specific OptionsSelect to enable or disable WDT counting. It is recommended to set "WDT Counting" to "Disabled" to avoid unintentional WDT interrupt occurs when debugging the user program.
    System ResetMCU Specific OptionsSelect to enable or disable system reset due to a request by WDT.
    WDTUDFOUT AssertionMCU Specific OptionsSelect to enable or disable the assertion of WDTUDFOUT due to a request by WDT.
    Cold ResetMCU Specific OptionsSelect to enable or disable the cold reset due to a request by WDT.
    Underflow Interrupt EnableMCU Specific OptionsEnable the WDT underflow interrupt.
    Underflow Interrupt PriorityValue must be an integer between 0 and 2558 Select the underflow interrupt priority.
    WDT CallbackName must be a valid C symbolNULL A user callback function must be provided if the WDT is configured to generate an NMI when the timer underflows or a refresh error occurs. If this callback function is provided, it will be called from the NMI handler each time the watchdog triggers.
    +

    +

    +Clock Configuration

    +

    The WDT clock is based on the OSCCLK frequency. You can not set the OSCCLK frequency using the Clocks tab of the RZ Configuration editor or by using the CGC Interface at run-time. The maximum timeout period with OSCCLK running at 24 MHz is approximately 0.175 seconds.

    +

    +Pin Configuration

    +

    This WDT uses the following pin.

      +
    • WDTUDF_PERROUT: Watchdog timer counter underflow signal output.
      • +
    +

    +Usage Notes

    +

    Period Calculation

    +

    The WDT operates from OSCCLK. With a OSCCLK of 24 MHz, the maximum time from the last refresh to device reset or IRQ generation will be just over 0.175 seconds as detailed below.

    +

    OSCCLK = 24 MHz
    +Clock division ratio = OSCCLK / 256
    +Timeout period = 16384 cycles
    +WDT clock frequency = 24 MHz / 256 = 93.750 kHz
    +Cycle time = 1 / 93.750 kHz = 10.667 us
    +Timeout = 10.667 us x 16384 cycles = 0.175 seconds

    +

    +Limitations

    +

    Developers should be aware of the following limitations when using the WDT:

    +
      +
    • If the WDT is configured to stop the counter in low power mode, then your application must restart the watchdog by calling R_WDT_Refresh() after the MCU wakes from low power mode.
      • +
    • When WDT counting starts, it keeps running even if the user program is stopped at a breakpoint by the debugger. Then an unintentional WDT interrupt occurs. To avoid such cases, it is recommended to set "WDT Counting" to "Disabled" when debugging.
      • +
    +

    WDT Interrupt

    +

    WDT interrupt to CPU are prohibited in specific core.

    + + + + + + + +
    DeviceCore WDT interrupt to CPU
    RZ/V2HCM33 Prohibited
    CR8 Not prohibited
    +

    +Examples

    +

    WDT Basic Example

    +

    This is a basic example of minimal use of the WDT in an application.

    +
    void wdt_basic_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* In auto start mode, the WDT starts counting immediately when the MCU is powered on. */
    /* Initializes the module. */
    err = R_WDT_Open(&g_wdt0_ctrl, &g_wdt0_cfg);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* In register start mode, start the watchdog by calling R_WDT_Refresh. */
    err = R_WDT_Refresh(&g_wdt0_ctrl);
    assert(FSP_SUCCESS == err);
    while (true)
    {
    /* Application work here. */
    /* Refresh before the counter underflows to prevent reset or NMI. */
    err = R_WDT_Refresh(&g_wdt0_ctrl);
    assert(FSP_SUCCESS == err);
    }
    }

    WDT Advanced Example

    +

    This example demonstrates using a start window and gives an example callback to handle an IRQ generated by an underflow or refresh error.

    +
    #define WDT_TIMEOUT_COUNTS (16384U)
    #define WDT_MAX_COUNTER (WDT_TIMEOUT_COUNTS - 1U)
    #define WDT_START_WINDOW_75 ((WDT_MAX_COUNTER * 3) / 4)
    /* Example callback called when a watchdog NMI occurs. */
    void wdt_callback (wdt_callback_args_t * p_args)
    {
    FSP_PARAMETER_NOT_USED(p_args);
    fsp_err_t err = FSP_SUCCESS;
    /* (Optional) Determine the source of the NMI. */
    wdt_status_t status = WDT_STATUS_NO_ERROR;
    err = R_WDT_StatusGet(&g_wdt0_ctrl, &status);
    assert(FSP_SUCCESS == err);
    /* (Optional) Log source of NMI and any other debug information. */
    /* (Optional) Clear the error flags. */
    err = R_WDT_StatusClear(&g_wdt0_ctrl, status);
    assert(FSP_SUCCESS == err);
    /* Call R_WDT_Refresh() to continue using the watchdog after an error. */
    err = R_WDT_Refresh(&g_wdt0_ctrl);
    assert(FSP_SUCCESS == err);
    }
    void wdt_advanced_example (void)
    {
    fsp_err_t err = FSP_SUCCESS;
    /* Enable system reset due to WDT. */
    wdt_extended_cfg_t g_wdt0_cfg_extend_0 =
    {
    .channel = 0,
    .wdt_counting_enable = true,
    .system_reset_enable = true,
    .wdtudfout_assertion_enable = false,
    .cold_reset_enable = false,
    .underflow_ipl = 8,
    .underflow_irq = FSP_INVALID_VECTOR,
    };
    const wdt_cfg_t g_wdt0_cfg_0 =
    {
    .timeout = WDT_TIMEOUT_16384,
    .clock_division = WDT_CLOCK_DIVISION_256,
    .window_start = WDT_WINDOW_START_100,
    .window_end = WDT_WINDOW_END_0,
    .reset_control = WDT_RESET_CONTROL_NMI,
    .stop_control = WDT_STOP_CONTROL_DISABLE,
    .p_callback = NULL,
    .p_context = NULL,
    .p_extend = &g_wdt0_cfg_extend_0,
    };
    /* (Optional) Check if the error system reset flag for WDT is set to know if the system is
    * recovering from a WDT reset. */
    if (R_CPG->CPG_ERROR_RST2 & R_CPG_CPG_ERROR_RST2_ERROR_RST0_Msk)
    {
    R_CPG->CPG_ERROR_RST2 = R_CPG_CPG_ERROR_RST2_ERROR_RST0_Msk | R_CPG_CPG_ERROR_RST2_ERROR_RST0_WEN_Msk;
    }
    /* Open the module. */
    err = R_WDT_Open(&g_wdt0_ctrl, &g_wdt0_cfg_0);
    /* Handle any errors. This function should be defined by the user. */
    assert(FSP_SUCCESS == err);
    /* Initialize other application code. */
    /* (Register start mode) Call R_WDT_Refresh() to start the WDT in register
    * start mode. Do not call R_WDT_Refresh() in auto start mode unless the
    * counter is in the acceptable refresh window. */
    err = R_WDT_Refresh(&g_wdt0_ctrl);
    assert(FSP_SUCCESS == err);
    while (true)
    {
    /* Application work here. */
    /* (Optional) If there is a chance the application takes less time than
    * the start window, verify the WDT counter is past the start window
    * before refreshing the WDT. */
    uint32_t wdt_counter = 0U;
    do
    {
    /* Read the current WDT counter value. */
    err = R_WDT_CounterGet(&g_wdt0_ctrl, &wdt_counter);
    assert(FSP_SUCCESS == err);
    } while (wdt_counter >= WDT_START_WINDOW_75);
    /* Refresh before the counter underflows to prevent reset or NMI. */
    err = R_WDT_Refresh(&g_wdt0_ctrl);
    assert(FSP_SUCCESS == err);
    }
    }
    + + + + + +

    +Data Structures

    struct  wdt_instance_ctrl_t
     
    struct  wdt_extended_cfg_t
     
    +

    Data Structure Documentation

    + +

    ◆ wdt_instance_ctrl_t

    + +
    +
    + + + + +
    struct wdt_instance_ctrl_t
    +
    +

    WDT private control block. DO NOT MODIFY. Initialization occurs when R_WDT_Open() is called.

    +
    +
    +
    + +

    ◆ wdt_extended_cfg_t

    + +
    +
    + + + + +
    struct wdt_extended_cfg_t
    +
    +

    WDT configuration extension. This extension is required.

    +
    +
    +
    +

    Function Documentation

    + +

    ◆ R_WDT_Refresh()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_WDT_Refresh (wdt_ctrl_t *const p_ctrl)
    +
    +

    Refresh the watchdog timer. Implements wdt_api_t::refresh.

    +

    In addition to refreshing the watchdog counter this function can be used to start the counter in register start mode.

    +

    Example:

    /* Refresh before the counter underflows to prevent reset or NMI. */
    err = R_WDT_Refresh(&g_wdt0_ctrl);
    assert(FSP_SUCCESS == err);
    Return values
    + + + + +
    FSP_SUCCESSWDT successfully refreshed.
    FSP_ERR_ASSERTIONp_ctrl is NULL.
    FSP_ERR_NOT_OPENInstance control block is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_WDT_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_WDT_Open (wdt_ctrl_t *const p_ctrl,
    wdt_cfg_t const *const p_cfg 
    )
    +
    +

    Configures the WDT driver based on the input configurations. This function sets the callback function, the timeout count value, and enables the overflow interrupt. Implements wdt_api_t::open.

    +

    This function should only be called once as WDT configuration registers can only be written to once so subsequent calls will have no effect.

    +

    Example:

    /* Initializes the module. */
    err = R_WDT_Open(&g_wdt0_ctrl, &g_wdt0_cfg);
    Return values
    + + + + +
    FSP_SUCCESSWDT successfully configured.
    FSP_ERR_ASSERTIONNull pointer, or one or more configuration options is invalid.
    FSP_ERR_ALREADY_OPENModule is already open. This module can only be opened once.
    +
    +
    + +
    +
    + +

    ◆ R_WDT_StatusClear()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_WDT_StatusClear (wdt_ctrl_t *const p_ctrl,
    const wdt_status_t status 
    )
    +
    +

    Clear the WDT status and error flags. Implements wdt_api_t::statusClear.

    +

    Example:

    /* (Optional) Clear the error flags. */
    err = R_WDT_StatusClear(&g_wdt0_ctrl, status);
    assert(FSP_SUCCESS == err);
    Return values
    + + + + +
    FSP_SUCCESSWDT flag(s) successfully cleared.
    FSP_ERR_ASSERTIONNull pointer as a parameter.
    FSP_ERR_NOT_OPENInstance control block is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_WDT_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_WDT_StatusGet (wdt_ctrl_t *const p_ctrl,
    wdt_status_t *const p_status 
    )
    +
    +

    Read the WDT status flags. Implements wdt_api_t::statusGet.

    +

    Indicates both status and error conditions.

    +

    Example:

    /* (Optional) Determine the source of the NMI. */
    wdt_status_t status = WDT_STATUS_NO_ERROR;
    err = R_WDT_StatusGet(&g_wdt0_ctrl, &status);
    assert(FSP_SUCCESS == err);
    Return values
    + + + + +
    FSP_SUCCESSWDT status successfully read.
    FSP_ERR_ASSERTIONNull pointer as a parameter.
    FSP_ERR_NOT_OPENInstance control block is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_WDT_CounterGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_WDT_CounterGet (wdt_ctrl_t *const p_ctrl,
    uint32_t *const p_count 
    )
    +
    +

    Read the current count value of the WDT. Implements wdt_api_t::counterGet.

    +

    Example:

    /* Read the current WDT counter value. */
    err = R_WDT_CounterGet(&g_wdt0_ctrl, &wdt_counter);
    assert(FSP_SUCCESS == err);
    Return values
    + + + + +
    FSP_SUCCESSWDT current count successfully read.
    FSP_ERR_ASSERTIONNull pointer passed as a parameter.
    FSP_ERR_NOT_OPENInstance control block is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_WDT_TimeoutGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_WDT_TimeoutGet (wdt_ctrl_t *const p_ctrl,
    wdt_timeout_values_t *const p_timeout 
    )
    +
    +

    Read timeout information for the watchdog timer. Implements wdt_api_t::timeoutGet.

    +
    Return values
    + + + + +
    FSP_SUCCESSWDT timeout information retrieved successfully.
    FSP_ERR_ASSERTIONNull Pointer.
    FSP_ERR_NOT_OPENInstance control block is not initialized.
    +
    +
    + +
    +
    + +

    ◆ R_WDT_CallbackSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_WDT_CallbackSet (wdt_ctrl_t *const p_ctrl,
    void(*)(wdt_callback_args_t *) p_callback,
    void const *const p_context,
    wdt_callback_args_t *const p_callback_memory 
    )
    +
    +

    Updates the user callback and has option of providing memory for callback structure. Implements wdt_api_t::callbackSet

    +
    Return values
    + + + + + +
    FSP_SUCCESSCallback updated successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENThe control block has not been opened.
    FSP_ERR_NO_CALLBACK_MEMORYp_callback is non-secure and p_callback_memory is either secure or NULL.
    +
    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___w_d_t.js b/group___w_d_t.js new file mode 100644 index 0000000..09cfffa --- /dev/null +++ b/group___w_d_t.js @@ -0,0 +1,12 @@ +var group___w_d_t = +[ + [ "wdt_instance_ctrl_t", "group___w_d_t.html#structwdt__instance__ctrl__t", null ], + [ "wdt_extended_cfg_t", "group___w_d_t.html#structwdt__extended__cfg__t", null ], + [ "R_WDT_Refresh", "group___w_d_t.html#gaff080d0dcc993cfbe7e99771396feffb", null ], + [ "R_WDT_Open", "group___w_d_t.html#gad64d0778fd0ceccb13a7287bb0d1fca8", null ], + [ "R_WDT_StatusClear", "group___w_d_t.html#gacd5b9ff42df96b9fd4603dda47b946cb", null ], + [ "R_WDT_StatusGet", "group___w_d_t.html#ga17bf328598042575cbe4f126f59bbc1b", null ], + [ "R_WDT_CounterGet", "group___w_d_t.html#gaf6b4f726ecfe6795c7887dc1226450ca", null ], + [ "R_WDT_TimeoutGet", "group___w_d_t.html#gac6e98a5b526d81651da1ffeda3f70263", null ], + [ "R_WDT_CallbackSet", "group___w_d_t.html#ga602ed1a63b61c46df822059ab6a5395e", null ] +]; \ No newline at end of file diff --git a/group___w_d_t___a_p_i.html b/group___w_d_t___a_p_i.html new file mode 100644 index 0000000..4f458d6 --- /dev/null +++ b/group___w_d_t___a_p_i.html @@ -0,0 +1,798 @@ + + + + + + + +RZV Flexible Software Package Documentation: WDT Interface + + + + + + + + + + + + + + + + + + + +
    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
    +
    + +
    + + + + + +   + + +
    +
    +
    +
    + + + +
    +
    + +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + + + +
    + +
    +
    +
    +
    +
    +Data Structures | +Typedefs | +Enumerations
    +
    +
    WDT Interface
    Interfaces
    +
    +
    +

    Detailed Description

    +

    Interface for watch dog timer functions.

    +

    +Summary

    +

    The WDT interface for the Watchdog Timer (WDT) peripheral provides watchdog functionality including resetting the device or generating an interrupt.

    +

    The watchdog timer interface can be implemented by:

    + + + + + + + + + + + + +

    +Data Structures

    struct  wdt_callback_args_t
     
    struct  wdt_timeout_values_t
     
    struct  wdt_cfg_t
     
    struct  wdt_api_t
     
    struct  wdt_instance_t
     
    + + + +

    +Typedefs

    typedef void wdt_ctrl_t
     
    + + + + + + + + + + + + + + + +

    +Enumerations

    enum  wdt_timeout_t
     
    enum  wdt_clock_division_t
     
    enum  wdt_window_start_t
     
    enum  wdt_window_end_t
     
    enum  wdt_reset_control_t
     
    enum  wdt_stop_control_t
     
    enum  wdt_status_t
     
    +

    Data Structure Documentation

    + +

    ◆ wdt_callback_args_t

    + +
    +
    + + + + +
    struct wdt_callback_args_t
    +
    +

    Callback function parameter data

    +
    + + + + +
    Data Fields
    +void const * +p_context +Placeholder for user data. Set in wdt_api_t::open function in wdt_cfg_t.
    + +
    +
    + +

    ◆ wdt_timeout_values_t

    + +
    +
    + + + + +
    struct wdt_timeout_values_t
    +
    +

    WDT timeout data. Used to return frequency of WDT clock and timeout period

    +
    + + + + + + + +
    Data Fields
    +uint32_t +clock_frequency_hz +Frequency of watchdog clock after divider.
    +uint32_t +timeout_clocks +Timeout period in units of watchdog clock ticks.
    + +
    +
    + +

    ◆ wdt_cfg_t

    + +
    +
    + + + + +
    struct wdt_cfg_t
    +
    +

    WDT configuration parameters.

    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    Data Fields

    +wdt_timeout_t timeout
     Timeout period.
     
    +wdt_clock_division_t clock_division
     Clock divider.
     
    +wdt_window_start_t window_start
     Refresh permitted window start position.
     
    +wdt_window_end_t window_end
     Refresh permitted window end position.
     
    +wdt_reset_control_t reset_control
     Select NMI or reset generated on underflow.
     
    +wdt_stop_control_t stop_control
     Select whether counter operates in sleep mode.
     
    +void(* p_callback )(wdt_callback_args_t *p_args)
     Callback provided when a WDT NMI ISR occurs.
     
    void const * p_context
     
    +void const * p_extend
     Placeholder for user extension.
     
    +

    Field Documentation

    + +

    ◆ p_context

    + +
    +
    + + + + +
    void const* wdt_cfg_t::p_context
    +
    +

    Placeholder for user data. Passed to the user callback in wdt_callback_args_t.

    + +
    +
    + +
    +
    + +

    ◆ wdt_api_t

    + +
    +
    + + + + +
    struct wdt_api_t
    +
    +

    WDT functions implemented at the HAL layer will follow this API.

    +
    + + + + + + + + + + + + + + + +

    Data Fields

    fsp_err_t(* open )(wdt_ctrl_t *const p_ctrl, wdt_cfg_t const *const p_cfg)
     
    fsp_err_t(* refresh )(wdt_ctrl_t *const p_ctrl)
     
    fsp_err_t(* statusGet )(wdt_ctrl_t *const p_ctrl, wdt_status_t *const p_status)
     
    fsp_err_t(* statusClear )(wdt_ctrl_t *const p_ctrl, const wdt_status_t status)
     
    fsp_err_t(* counterGet )(wdt_ctrl_t *const p_ctrl, uint32_t *const p_count)
     
    fsp_err_t(* timeoutGet )(wdt_ctrl_t *const p_ctrl, wdt_timeout_values_t *const p_timeout)
     
    fsp_err_t(* callbackSet )(wdt_ctrl_t *const p_api_ctrl, void(*p_callback)(wdt_callback_args_t *), void const *const p_context, wdt_callback_args_t *const p_callback_memory)
     
    +

    Field Documentation

    + +

    ◆ open

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::open) (wdt_ctrl_t *const p_ctrl, wdt_cfg_t const *const p_cfg)
    +
    +

    Initialize the WDT in register start mode. In auto-start mode with NMI output it registers the NMI callback.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [in]p_cfgPointer to pin configuration structure.
    +
    +
    + +
    +
    + +

    ◆ refresh

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::refresh) (wdt_ctrl_t *const p_ctrl)
    +
    +

    Refresh the watchdog timer.

    Implemented as
    +
    +
    Parameters
    + + +
    [in]p_ctrlPointer to control structure.
    +
    +
    + +
    +
    + +

    ◆ statusGet

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::statusGet) (wdt_ctrl_t *const p_ctrl, wdt_status_t *const p_status)
    +
    +

    Read the status of the WDT.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [out]p_statusPointer to variable to return status information through.
    +
    +
    + +
    +
    + +

    ◆ statusClear

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::statusClear) (wdt_ctrl_t *const p_ctrl, const wdt_status_t status)
    +
    +

    Clear the status flags of the WDT.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [in]statusStatus condition(s) to clear.
    +
    +
    + +
    +
    + +

    ◆ counterGet

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::counterGet) (wdt_ctrl_t *const p_ctrl, uint32_t *const p_count)
    +
    +

    Read the current WDT counter value.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [out]p_countPointer to variable to return current WDT counter value.
    +
    +
    + +
    +
    + +

    ◆ timeoutGet

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::timeoutGet) (wdt_ctrl_t *const p_ctrl, wdt_timeout_values_t *const p_timeout)
    +
    +

    Read the watchdog timeout values.

    Implemented as
    +
    +
    Parameters
    + + + +
    [in]p_ctrlPointer to control structure.
    [out]p_timeoutPointer to structure to return timeout values.
    +
    +
    + +
    +
    + +

    ◆ callbackSet

    + +
    +
    + + + + +
    fsp_err_t(* wdt_api_t::callbackSet) (wdt_ctrl_t *const p_api_ctrl, void(*p_callback)(wdt_callback_args_t *), void const *const p_context, wdt_callback_args_t *const p_callback_memory)
    +
    +

    Specify callback function and optional context pointer and working memory pointer.

    Implemented as
    +
    +
    Parameters
    + + + + + +
    [in]p_ctrlPointer to the WDT control block.
    [in]p_callbackCallback function
    [in]p_contextPointer to send to callback function
    [in]p_working_memoryPointer to volatile memory where callback structure can be allocated. Callback arguments allocated here are only valid during the callback.
    +
    +
    + +
    +
    + +
    +
    + +

    ◆ wdt_instance_t

    + +
    +
    + + + + +
    struct wdt_instance_t
    +
    +

    This structure encompasses everything that is needed to use an instance of this interface.

    +
    + + + + + + + + + + +
    Data Fields
    +wdt_ctrl_t * +p_ctrl +Pointer to the control structure for this instance.
    +wdt_cfg_t const * +p_cfg +Pointer to the configuration structure for this instance.
    +wdt_api_t const * +p_api +Pointer to the API structure for this instance.
    + +
    +
    +

    Typedef Documentation

    + +

    ◆ wdt_ctrl_t

    + +
    +
    + + + + +
    typedef void wdt_ctrl_t
    +
    +

    WDT control block. Allocate an instance specific control block to pass into the WDT API calls.

    Implemented as
    +
    + +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ wdt_timeout_t

    + +
    +
    + + + + +
    enum wdt_timeout_t
    +
    +

    WDT time-out periods.

    + + + + + + + + +
    Enumerator
    WDT_TIMEOUT_128 

    128 clock cycles

    +
    WDT_TIMEOUT_512 

    512 clock cycles

    +
    WDT_TIMEOUT_1024 

    1024 clock cycles

    +
    WDT_TIMEOUT_2048 

    2048 clock cycles

    +
    WDT_TIMEOUT_4096 

    4096 clock cycles

    +
    WDT_TIMEOUT_8192 

    8192 clock cycles

    +
    WDT_TIMEOUT_16384 

    16384 clock cycles

    +
    + +
    +
    + +

    ◆ wdt_clock_division_t

    + +
    +
    + + + + +
    enum wdt_clock_division_t
    +
    +

    WDT clock division ratio.

    + + + + + + + + + + + +
    Enumerator
    WDT_CLOCK_DIVISION_1 

    CLK/1.

    +
    WDT_CLOCK_DIVISION_4 

    CLK/4.

    +
    WDT_CLOCK_DIVISION_16 

    CLK/16.

    +
    WDT_CLOCK_DIVISION_32 

    CLK/32.

    +
    WDT_CLOCK_DIVISION_64 

    CLK/64.

    +
    WDT_CLOCK_DIVISION_128 

    CLK/128.

    +
    WDT_CLOCK_DIVISION_256 

    CLK/256.

    +
    WDT_CLOCK_DIVISION_512 

    CLK/512.

    +
    WDT_CLOCK_DIVISION_2048 

    CLK/2048.

    +
    WDT_CLOCK_DIVISION_8192 

    CLK/8192.

    +
    + +
    +
    + +

    ◆ wdt_window_start_t

    + +
    +
    + + + + +
    enum wdt_window_start_t
    +
    +

    WDT refresh permitted period window start position.

    + + + + + +
    Enumerator
    WDT_WINDOW_START_25 

    Start position = 25%.

    +
    WDT_WINDOW_START_50 

    Start position = 50%.

    +
    WDT_WINDOW_START_75 

    Start position = 75%.

    +
    WDT_WINDOW_START_100 

    Start position = 100%.

    +
    + +
    +
    + +

    ◆ wdt_window_end_t

    + +
    +
    + + + + +
    enum wdt_window_end_t
    +
    +

    WDT refresh permitted period window end position.

    + + + + + +
    Enumerator
    WDT_WINDOW_END_75 

    End position = 75%.

    +
    WDT_WINDOW_END_50 

    End position = 50%.

    +
    WDT_WINDOW_END_25 

    End position = 25%.

    +
    WDT_WINDOW_END_0 

    End position = 0%.

    +
    + +
    +
    + +

    ◆ wdt_reset_control_t

    + +
    +
    + + + + +
    enum wdt_reset_control_t
    +
    +

    WDT Counter underflow and refresh error control.

    + + + +
    Enumerator
    WDT_RESET_CONTROL_NMI 

    NMI request when counter underflows.

    +
    WDT_RESET_CONTROL_RESET 

    Reset request when counter underflows.

    +
    + +
    +
    + +

    ◆ wdt_stop_control_t

    + +
    +
    + + + + +
    enum wdt_stop_control_t
    +
    +

    WDT Counter operation in sleep mode.

    + + + +
    Enumerator
    WDT_STOP_CONTROL_DISABLE 

    Count will not stop when device enters sleep mode.

    +
    WDT_STOP_CONTROL_ENABLE 

    Count will automatically stop when device enters sleep mode.

    +
    + +
    +
    + +

    ◆ wdt_status_t

    + +
    +
    + + + + +
    enum wdt_status_t
    +
    +

    WDT status

    + + + + + + +
    Enumerator
    WDT_STATUS_NO_ERROR 

    No status flags set.

    +
    WDT_STATUS_UNDERFLOW 

    Underflow flag set.

    +
    WDT_STATUS_REFRESH_ERROR 

    Refresh error flag set. Refresh outside of permitted window.

    +
    WDT_STATUS_UNDERFLOW_AND_REFRESH_ERROR 

    Underflow and refresh error flags set.

    +
    WDT_STATUS_OVERFLOW 

    Overflow flag set.

    +
    + +
    +
    +
    +
    + + + + + diff --git a/group___w_d_t___a_p_i.js b/group___w_d_t___a_p_i.js new file mode 100644 index 0000000..0bb4cc4 --- /dev/null +++ b/group___w_d_t___a_p_i.js @@ -0,0 +1,84 @@ +var group___w_d_t___a_p_i = +[ + [ "wdt_callback_args_t", "group___w_d_t___a_p_i.html#structwdt__callback__args__t", [ + [ "p_context", "group___w_d_t___a_p_i.html#a64eb19cb40d1c2e0d7a81d773289af4d", null ] + ] ], + [ "wdt_timeout_values_t", "group___w_d_t___a_p_i.html#structwdt__timeout__values__t", [ + [ "clock_frequency_hz", "group___w_d_t___a_p_i.html#a4afd304a6d5116ff17d004a9db0b68de", null ], + [ "timeout_clocks", "group___w_d_t___a_p_i.html#a3f910dce98e58fc8a05152a21f404f74", null ] + ] ], + [ "wdt_cfg_t", "group___w_d_t___a_p_i.html#structwdt__cfg__t", [ + [ "timeout", "group___w_d_t___a_p_i.html#a32ddaf9b3fd7bab2b654e660588ac680", null ], + [ "clock_division", "group___w_d_t___a_p_i.html#aa7829044aff936488b3e21bbd127ab76", null ], + [ "window_start", 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    +
    + + + + + + + + +
    +
    RZV Flexible Software Package Documentation +  Release v2.0.0 +
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    +Functions | +Data Structures | +Enumerations
    +
    +
    Expanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi)
    Modules » Storage
    +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Functions

    fsp_err_t R_XSPI_QSPI_Open (spi_flash_ctrl_t *p_ctrl, spi_flash_cfg_t const *const p_cfg)
     
    fsp_err_t R_XSPI_QSPI_Close (spi_flash_ctrl_t *p_ctrl)
     
    fsp_err_t R_XSPI_QSPI_DirectWrite (spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint32_t const bytes, bool const read_after_write)
     
    fsp_err_t R_XSPI_QSPI_DirectRead (spi_flash_ctrl_t *p_ctrl, uint8_t *const p_dest, uint32_t const bytes)
     
    fsp_err_t R_XSPI_QSPI_SpiProtocolSet (spi_flash_ctrl_t *p_ctrl, spi_flash_protocol_t spi_protocol)
     
    fsp_err_t R_XSPI_QSPI_XipEnter (spi_flash_ctrl_t *p_ctrl)
     
    fsp_err_t R_XSPI_QSPI_XipExit (spi_flash_ctrl_t *p_ctrl)
     
    fsp_err_t R_XSPI_QSPI_Write (spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint8_t *const p_dest, uint32_t byte_count)
     
    fsp_err_t R_XSPI_QSPI_Erase (spi_flash_ctrl_t *p_ctrl, uint8_t *const p_device_address, uint32_t byte_count)
     
    fsp_err_t R_XSPI_QSPI_StatusGet (spi_flash_ctrl_t *p_ctrl, spi_flash_status_t *const p_status)
     
    fsp_err_t R_XSPI_QSPI_BankSet (spi_flash_ctrl_t *p_ctrl, uint32_t bank)
     
    fsp_err_t R_XSPI_QSPI_DirectTransfer (spi_flash_ctrl_t *p_ctrl, spi_flash_direct_transfer_t *const p_transfer, spi_flash_direct_transfer_dir_t direction)
     
    fsp_err_t R_XSPI_QSPI_AutoCalibrate (spi_flash_ctrl_t *p_ctrl)
     
    +

    Detailed Description

    +

    Driver for the xSPI peripheral on RZ microprocessor. This module implements the SPI Flash Interface.

    +

    +Overview

    +

    +Features

    +

    The xSPI QSPI driver has the following key features:

      +
    • Memory mapped read access to the QSPI flash
      • +
    • Programming the QSPI flash device
      • +
    • Erasing the QSPI flash device
      • +
    • Sending device specific commands and reading back responses, not
      • +
    • Supports each xSPI protocol
      • +
    • Entering and exiting XIP mode
      • +
    • 3 or 4 byte addressing
      • +
    • Supports combination function during write access of memory-mapping mode
      • +
    • Configurable prefetch function during read transaction in memory-mapping mode
      • +
    +
    Note
    The available chip select lines may differ between devices. A full list of selectable chip select lines is available in the User's Manual for your device.
    +

    +Configuration

    +

    Build Time Configurations for r_xspi_qspi

    +The following build time configurations are defined in driver/r_xspi_qspi_cfg.h:
    +

    + + + + +
    ConfigurationOptionsDefaultDescription
    Parameter Checking Enable
      +
    • +Default (BSP)
      • +
    • +Enabled
      • +
    • +Disabled
      • +
    +    		Default (BSP) If selected code for parameter checking is included in the build.
    +

    Configurations for Storage > QSPI Driver on r_xspi_qspi

    +This module can be added to the Stacks tab via New Stack > Storage > QSPI Driver on r_xspi_qspi.
    +

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    ConfigurationOptionsDefaultDescription
    General > NameName must be a valid C symbolg_qspi0 Module name.
    General > unitUnit should be 00 Specify the xSPI unit number.
    General > Chip Select
      +
    • +Chip Select 0
      • +
    • +Chip Select 1
      • +
    +    		Chip Select 0 Specify the XSPI chip select line to use.
    General > SPI Protocol
      +
    • +1S-1S-1S
      • +
    • +4S-4D-4D
      • +
    • +1S-2S-2S
      • +
    • +2S-2S-2S
      • +
    • +1S-4S-4S
      • +
    • +4S-4S-4S
      • +
    +    		1S-1S-1S Select the initial SPI protocol. SPI protocol can be changed in R_XSPI_QSPI_SpiProtocolSet().
    General > Address Bytes
      +
    • +3
      • +
    • +4
      • +
    +    		3 Select the number of address bytes. If 4-byte mode is selected, the application must issue the EN4B command using R_XSPI_QSPI_DirectTransfer().
    General > Dummy Clocks for ReadRefer to the RZV Configuration tool for available options.0 Select the number of dummy clocks for read operations.
    General > Prefetch Function
      +
    • +Disable
      • +
    • +Enable
      • +
    +    		Disable Prefetch function settings.
    Command Definitions > Page Program CommandMust be an 8-bit QSPI command0x02 The command to program a page.
    Command Definitions > Read CommandMust be an 8-bit QSPI command0x03 The command to read.
    Command Definitions > Write Enable CommandMust be an 8-bit QSPI command0x06 The command to enable write.
    Command Definitions > Status CommandMust be an 8-bit QSPI command0x05 The command to query the status of a write or erase command.
    Command Definitions > Write Status BitMust be an integer between 0 and 70 Which bit contains the write in progress status returned from the Write Status Command.
    Command Definitions > Sector Erase CommandMust be an 8-bit QSPI command0x20 The command to erase a sector. Set Sector Erase Size to 0 if unused.
    Command Definitions > Sector Erase SizeMust be an integer greater than or equal to 04096 The sector erase size. Set Sector Erase Size to 0 if Sector Erase is not supported.
    Command Definitions > Block Erase CommandMust be an 8-bit QSPI command0xD8 The command to erase a block. Set Block Erase Size to 0 if unused.
    Command Definitions > Block Erase SizeMust be an integer greater than or equal to 065536 The block erase size. Set Block Erase Size to 0 if Block Erase is not supported.
    Command Definitions > Block Erase 32KB CommandMust be an 8-bit QSPI command0x52 The command to erase a 32KB block. Set Block Erase Size to 0 if unused.
    Command Definitions > Block Erase 32KB SizeMust be an integer greater than or equal to 032768 The block erase 32KB size. Set Block Erase 32KB Size to 0 if Block Erase 32KB is not supported.
    Command Definitions > Chip Erase CommandMust be an 8-bit QSPI command0xC7 The command to erase the entire chip. Set Chip Erase Command to 0 if unused.
    Command Definitions > XIP Enter M7-M0Must be an 8-bit QSPI command0x20 How to set M7-M0 to enter XIP mode.
    Command Definitions > XIP Exit M7-M0Must be an 8-bit QSPI command0xFF How to set M7-M0 exit XIP mode.
    Bus Timing > CS minimum idle termRefer to the RZV Configuration tool for available options.7 CYCLES Define the CS minimum idle term.
    Bus Timing > CS asserting extension
      +
    • +No Extension
      • +
    • +Extend 1 cycle
      • +
    +    		No Extension Define the CS asserting extension
    Bus Timing > CS negating extension
      +
    • +No Extension
      • +
    • +Extend 1 cycle
      • +
    +    		No Extension Define the CS negating extension
    Extra > Stop controller on close
      +
    • +True
      • +
    • +False
      • +
    +    		False Define to stop controller on close
    Extra > Pre initialize functionName must be a valid C symbolNULL Function name or "NULL"
    Extra > Post initialize functionName must be a valid C symbolNULL Function name or "NULL"
    +

    +

    +Clock Configuration

    +

    The QSPI clock is derived from XSPI_CLKn. You can set the clock frequency using the Clocks tab of the FSP Configuration editor or by using the CGC Interface at run-time.

    +

    +Pin Configuration

    +

    The following pins are available to connect to an external QSPI device:

      +
    • XSPIn_CKP: QSPI clock output
      • +
    • XSPIn_CS0, XSPIn_CS1: QSPI slave select
      • +
    • XSPIn_IO0: Data 0 I/O
      • +
    • XSPIn_IO1: Data 1 I/O
      • +
    • XSPIn_IO2: Data 2 I/O
      • +
    • XSPIn_IO3: Data 3 I/O
      • +
    +
    Note
    It is recommended to configure the pins with IOPORT_CFG_DRIVE_HIGH.
    +

    +Usage Notes

    +

    +xSPI_QSPI Memory Mapped Access

    +

    After R_XSPI_QSPI_Open() completes successfully, the QSPI flash device contents are mapped to address 0x70000000(Non-secure External address space) or 0x60000000(Secure External address space).

    +

    The address map for the external address space xSPI is as follows:

    + + + + + + + + + + + +
    Address Space
    0x60000000 to 0x67FFFFFF CS0 Secure space
    0x68000000 to 0x6FFFFFFF CS1 Secure space
    0x70000000 to 0x77FFFFFF CS0 Non-secure space
    0x78000000 to 0x7FFFFFFF CS1 Non-secure space
    +

    +Examples

    +

    Basic Example

    +

    This is a basic example of minimal use of the QSPI in an application. When using the section definition in the example below, the user must define it separately in the linker configuration file.

    +
    #define QSPI_EXAMPLE_DATA_LENGTH (1024)
    #define QSPI_EXAMPLE_ERASE_SIZE (4096)
    #define QSPI_EXAMPLE_WRITE_SIZE (64)
    uint8_t g_dest[QSPI_EXAMPLE_DATA_LENGTH];
    uint8_t * gp_src = (uint8_t *) BSP_FEATURE_XSPI_START_ADDRESS;
    void r_qspi_basic_example (void)
    {
    fsp_err_t err;
    /* Open the QSPI instance. */
    err = R_XSPI_QSPI_Open(&g_qspi0_ctrl, &g_qspi0_cfg);
    handle_error(err);
    /* (Optional) Send device specific initialization commands. */
    r_qspi_example_init();
    /* After R_XSPI_QSPI_Open() and any required device specific initialization, data can be read directly from the QSPI flash. */
    memcpy(&g_dest[0], gp_src, QSPI_EXAMPLE_DATA_LENGTH);
    /* After R_XSPI_QSPI_Open() and any required device specific initialization, sector can be erase from the QSPI flash.
    * The erase size must exactly match one of the settings in the configurator.
    */
    err = R_XSPI_QSPI_Erase(&g_qspi0_ctrl, gp_src, QSPI_EXAMPLE_ERASE_SIZE);
    handle_error(err);
    /* After R_XSPI_QSPI_Open() and any required device specific initialization, page can be write to the QSPI flash.
    * The write size must be less than or equal to the page size or 64 bytes, whichever is smaller.
    */
    err = R_XSPI_QSPI_Write(&g_qspi0_ctrl, &g_dest[0], gp_src, QSPI_EXAMPLE_WRITE_SIZE);
    handle_error(err);
    }

    Initialization Command Structure Example

    +

    This is an example of the types of commands that can be used to initialize the QSPI.

    +
    /* Example for Adesto/Dialog/Renesas AT25SL/AT25QL QSPI flash. Not suitable for AT25SF/AT25QF. */
    #define QSPI_COMMAND_WRITE_ENABLE (0x06U)
    #define QSPI_COMMAND_WRITE_STATUS_REGISTER (0x01U)
    #define QSPI_COMMAND_ENTER_QPI_MODE (0x38U)
    #define QSPI_EXAMPLE_STATUS_REGISTER_1 (0x00U)
    #define QSPI_EXAMPLE_STATUS_REGISTER_2 (0x02U)
    static void r_qspi_example_init (void)
    {
    fsp_err_t err;
    spi_flash_direct_transfer_t qspi_direct_transfer =
    {
    .command = QSPI_COMMAND_WRITE_ENABLE,
    .address = 0U,
    .data = 0U,
    .command_length = 1U,
    .address_length = 0U,
    .data_length = 0U,
    .dummy_cycles = 0U
    };
    /* Send the Write Enable (WREN) command to enable writing to the status register */
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
    handle_error(err);
    /* Example for write status register command that take two value. Values are set in the data field.
    * For the AT25QL, set QE to 1 and other bits to their default setting.
    */
    qspi_direct_transfer.command = QSPI_COMMAND_WRITE_STATUS_REGISTER;
    qspi_direct_transfer.data = QSPI_EXAMPLE_STATUS_REGISTER_2 << 8 | QSPI_EXAMPLE_STATUS_REGISTER_1;
    qspi_direct_transfer.data_length = 2U;
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
    handle_error(err);
    /* Wait for complete to update. */
    spi_flash_status_t status;
    do
    {
    err = R_XSPI_QSPI_StatusGet(&g_qspi0_ctrl, &status);
    handle_error(err);
    } while (true == status.write_in_progress);
    /* Execute the Enable QPI command to enter QSPI mode. After entering QPI mode on the device, change the SPI
    * protocol to QPI mode on the MCU peripheral. */
    qspi_direct_transfer.command = QSPI_COMMAND_ENTER_QPI_MODE;
    qspi_direct_transfer.data = 0U;
    qspi_direct_transfer.data_length = 0U;
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
    handle_error(err);
    (void) R_XSPI_QSPI_SpiProtocolSet(&g_qspi0_ctrl, SPI_FLASH_PROTOCOL_4S_4S_4S);
    }

    Reading Status Register Example (R_XSPI_QSPI_DirectTransfer)

    +

    This is an example of using R_XSPI_QSPI_DirectTransfer to send the read status register command and read back the status register from the device.

    +
    #define QSPI_COMMAND_READ_STATUS_REGISTER (0x05U)
    void r_qspi_direct_example (void)
    {
    spi_flash_direct_transfer_t qspi_direct_transfer =
    {
    .command = QSPI_COMMAND_READ_STATUS_REGISTER,
    .address = 0U,
    .data = 0U,
    .command_length = 1U,
    .address_length = 0U,
    .data_length = 1U,
    .dummy_cycles = 0U
    };
    /* Open the QSPI instance. */
    fsp_err_t err = R_XSPI_QSPI_Open(&g_qspi0_ctrl, &g_qspi0_cfg);
    handle_error(err);
    /* Read the Status Register */
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
    handle_error(err);
    /* Status register contents are available in variable 'qspi_direct_transfer.data'. */
    }

    Querying Device Size Example (R_XSPI_QSPI_DirectTransfer)

    +

    This is an example of using R_XSPI_QSPI_DirectTransfer to query the device size.

    +
    #define QSPI_EXAMPLE_COMMAND_READ_ID (0x9F)
    #define QSPI_EXAMPLE_COMMAND_READ_SFDP (0x5A)
    void r_qspi_size_example (void)
    {
    /* Many QSPI devices support more than one way to query the device size. Consult the datasheet for your
    * QSPI device to determine which of these methods are supported (if any). */
    uint32_t device_size_bytes;
    fsp_err_t err;
    #ifdef QSPI_EXAMPLE_COMMAND_READ_ID
    spi_flash_direct_transfer_t qspi_rdid_direct_transfer =
    {
    .command = QSPI_EXAMPLE_COMMAND_READ_ID,
    .address = 0U,
    .data = 0U,
    .command_length = 1U,
    .address_length = 0U,
    .data_length = 3U,
    .dummy_cycles = 0U
    };
    /* This example shows how to get the device size by reading the manufacturer ID. */
    /* Read 3 bytes. The third byte often represents the size of the QSPI, where the size of the QSPI = 2 ^ N. */
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_rdid_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
    handle_error(err);
    device_size_bytes = 1U << (qspi_rdid_direct_transfer.data >> 16);
    FSP_PARAMETER_NOT_USED(device_size_bytes);
    #endif
    #ifdef QSPI_EXAMPLE_COMMAND_READ_SFDP
    spi_flash_direct_transfer_t qspi_rdsfdp_direct_transfer =
    {
    .command = QSPI_EXAMPLE_COMMAND_READ_SFDP,
    .address = 0x00000CU,
    .data = 0U,
    .command_length = 1U,
    .address_length = 3U,
    .data_length = 3U,
    .dummy_cycles = 8U
    };
    /* Read the Parameter Table Pointer (PTP) of 1st Parameter header to locate the JEDEC flash parameters table.
    * Reference JESD216 "Serial Flash Discoverable Parameters (SFDP)". */
    /* Send the standard 0x5A command followed by 3 address bytes (1st Parameter header's PTP is at address 0xC).
    * 3 byte address of JEDEC flash parameters are read back and stored in qspi_rdsfdp_direct_transfer.data */
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_rdsfdp_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
    handle_error(err);
    /* Read the JEDEC flash parameters' memory density. */
    /* Send the standard 0x5A command followed by 3 address bytes of Flash memory density (offset 0x04 from JEDEC
    * flash parameters address). Read 4 bytes. */
    qspi_rdsfdp_direct_transfer.command = QSPI_EXAMPLE_COMMAND_READ_SFDP;
    qspi_rdsfdp_direct_transfer.address = qspi_rdsfdp_direct_transfer.data + 0x04;
    qspi_rdsfdp_direct_transfer.data = 0U;
    qspi_rdsfdp_direct_transfer.command_length = 1U;
    qspi_rdsfdp_direct_transfer.address_length = 3U;
    qspi_rdsfdp_direct_transfer.data_length = 4U;
    qspi_rdsfdp_direct_transfer.dummy_cycles = 8U;
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_rdsfdp_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_READ);
    handle_error(err);
    /* Calculate device size based on memory density */
    uint32_t memory_density = qspi_rdsfdp_direct_transfer.data;
    if ((1U << 31) & memory_density)
    {
    /* For densities 4 gigabits and above, bit-31 is set to 1b. The field 30:0 defines 'N' where the density is
    * computed as 2^N bits (N must be >= 32). This code subtracts 3 from N to divide by 8 to get the size in
    * bytes instead of bits. */
    device_size_bytes = 1U << ((memory_density & ~(1U << 31)) - 3U);
    }
    else
    {
    /* For densities 2 gigabits or less, bit-31 is set to 0b. The field 30:0 defines the size in bits. This
    * code divides the memory density by 8 to get the size in bytes instead of bits. */
    device_size_bytes = (memory_density / 8) + 1;
    }
    FSP_PARAMETER_NOT_USED(device_size_bytes);
    #endif
    }
    + + + +

    +Data Structures

    struct  xspi_qspi_instance_ctrl_t
     
    + + + + + + + + + + + + + +

    +Enumerations

    enum  xspi_qspi_chip_select_t
     
    enum  xspi_qspi_memory_size_t
     
    enum  xspi_qspi_command_interval_clocks_t
     
    enum  xspi_qspi_cs_pullup_clocks_t
     
    enum  xspi_qspi_cs_pulldown_clocks_t
     
    enum  xspi_qspi_prefetch_function_t
     
    +

    Data Structure Documentation

    + +

    ◆ xspi_qspi_instance_ctrl_t

    + +
    +
    + + + + +
    struct xspi_qspi_instance_ctrl_t
    +
    +

    Instance control block. DO NOT INITIALIZE. Initialization occurs when spi_flash_api_t::open is called

    +
    +
    +
    +

    Enumeration Type Documentation

    + +

    ◆ xspi_qspi_chip_select_t

    + +
    +
    + + + + +
    enum xspi_qspi_chip_select_t
    +
    + + + +
    Enumerator
    XSPI_QSPI_CHIP_SELECT_0 

    Device connected to Chip-Select 0.

    +
    XSPI_QSPI_CHIP_SELECT_1 

    Device connected to Chip-Select 1.

    +
    + +
    +
    + +

    ◆ xspi_qspi_memory_size_t

    + +
    +
    + + + + +
    enum xspi_qspi_memory_size_t
    +
    + + + + + + + + +
    Enumerator
    XSPI_QSPI_MEMORY_SIZE_1MB 

    Memory size 1MB.

    +
    XSPI_QSPI_MEMORY_SIZE_2MB 

    Memory size 2MB.

    +
    XSPI_QSPI_MEMORY_SIZE_4MB 

    Memory size 4MB.

    +
    XSPI_QSPI_MEMORY_SIZE_8MB 

    Memory size 8MB.

    +
    XSPI_QSPI_MEMORY_SIZE_16MB 

    Memory size 16MB.

    +
    XSPI_QSPI_MEMORY_SIZE_32MB 

    Memory size 32MB.

    +
    XSPI_QSPI_MEMORY_SIZE_64MB 

    Memory size 64MB.

    +
    + +
    +
    + +

    ◆ xspi_qspi_command_interval_clocks_t

    + +
    +
    + + + + +
    enum xspi_qspi_command_interval_clocks_t
    +
    + + + + + + + + + + + + + + + + + +
    Enumerator
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_1 

    1 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_2 

    2 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_3 

    3 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_4 

    4 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_5 

    5 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_6 

    6 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_7 

    7 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_8 

    8 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_9 

    9 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_10 

    10 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_11 

    11 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_12 

    12 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_13 

    13 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_14 

    14 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_15 

    15 interval clocks

    +
    XSPI_QSPI_COMMAND_INTERVAL_CLOCKS_16 

    16 interval clocks

    +
    + +
    +
    + +

    ◆ xspi_qspi_cs_pullup_clocks_t

    + +
    +
    + + + + +
    enum xspi_qspi_cs_pullup_clocks_t
    +
    + + + +
    Enumerator
    XSPI_QSPI_CS_PULLUP_CLOCKS_NO_EXTENSION 

    CS asserting No extension.

    +
    XSPI_QSPI_CS_PULLUP_CLOCKS_1 

    CS asserting Extend 1 cycle.

    +
    + +
    +
    + +

    ◆ xspi_qspi_cs_pulldown_clocks_t

    + +
    +
    + + + + +
    enum xspi_qspi_cs_pulldown_clocks_t
    +
    + + + +
    Enumerator
    XSPI_QSPI_CS_PULLDOWN_CLOCKS_NO_EXTENSION 

    CS negating No extension.

    +
    XSPI_QSPI_CS_PULLDOWN_CLOCKS_1 

    CS negating Extend 1 cycle.

    +
    + +
    +
    + +

    ◆ xspi_qspi_prefetch_function_t

    + +
    +
    + + + + +
    enum xspi_qspi_prefetch_function_t
    +
    + + + +
    Enumerator
    XSPI_QSPI_PREFETCH_FUNCTION_DISABLE 

    Prefetch function disable.

    +
    XSPI_QSPI_PREFETCH_FUNCTION_ENABLE 

    Prefetch function enable.

    +
    + +
    +
    +

    Function Documentation

    + +

    ◆ R_XSPI_QSPI_Open()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_Open (spi_flash_ctrl_t * p_ctrl,
    spi_flash_cfg_t const *const p_cfg 
    )
    +
    +

    Open the QSPI driver module. After the driver is open, the QSPI can be accessed like internal flash memory starting at address 0x60000000 or 0x40000000.

    +

    Implements spi_flash_api_t::open.

    +

    Example:

    /* Open the QSPI instance. */
    err = R_XSPI_QSPI_Open(&g_qspi0_ctrl, &g_qspi0_cfg);
    handle_error(err);
    Return values
    + + + + + +
    FSP_SUCCESSConfiguration was successful.
    FSP_ERR_ASSERTIONThe parameter p_instance_ctrl or p_cfg is NULL.
    FSP_ERR_ALREADY_OPENDriver has already been opened with the same p_instance_ctrl.
    FSP_ERR_IP_CHANNEL_NOT_PRESENTThe requested channel does not exist on this MCU.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_Close()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_Close (spi_flash_ctrl_t * p_ctrl)
    +
    +

    Close the QSPI driver module.

    +

    Implements spi_flash_api_t::close.

    +
    Return values
    + + + + +
    FSP_SUCCESSConfiguration was successful.
    FSP_ERR_ASSERTIONp_instance_ctrl is NULL.
    FSP_ERR_NOT_OPENDriver is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_DirectWrite()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_DirectWrite (spi_flash_ctrl_t * p_ctrl,
    uint8_t const *const p_src,
    uint32_t const bytes,
    bool const read_after_write 
    )
    +
    +

    Writes raw data directly to the QSPI.

    +

    Implements spi_flash_api_t::directWrite.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_DirectRead()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_DirectRead (spi_flash_ctrl_t * p_ctrl,
    uint8_t *const p_dest,
    uint32_t const bytes 
    )
    +
    +

    Reads raw data directly from the QSPI.

    +

    Implements spi_flash_api_t::directRead.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_SpiProtocolSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_SpiProtocolSet (spi_flash_ctrl_t * p_ctrl,
    spi_flash_protocol_t spi_protocol 
    )
    +
    +

    Sets the SPI protocol.

    +

    Implements spi_flash_api_t::spiProtocolSet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSSPI protocol updated on MCU peripheral.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENDriver is not opened.
    FSP_ERR_INVALID_ARGUMENTInvalid SPI protocol requested.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_XipEnter()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_XipEnter (spi_flash_ctrl_t * p_ctrl)
    +
    +

    Enters XIP (execute in place) mode.

    +

    Implements spi_flash_api_t::xipEnter.

    +
    Return values
    + + + + +
    FSP_SUCCESSThe flash was programmed successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENDriver is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_XipExit()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_XipExit (spi_flash_ctrl_t * p_ctrl)
    +
    +

    Exits XIP (execute in place) mode.

    +

    Implements spi_flash_api_t::xipExit.

    +
    Return values
    + + + + +
    FSP_SUCCESSThe flash was programmed successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENDriver is not opened.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_Write()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_Write (spi_flash_ctrl_t * p_ctrl,
    uint8_t const *const p_src,
    uint8_t *const p_dest,
    uint32_t byte_count 
    )
    +
    +

    Program a page of data to the flash.

    +

    Implements spi_flash_api_t::write.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSThe flash was programmed successfully.
    FSP_ERR_ASSERTIONp_instance_ctrl, p_dest or p_src is NULL, or byte_count crosses a page boundary.
    FSP_ERR_NOT_OPENDriver is not opened.
    FSP_ERR_INVALID_MODEThis function can't be called when XIP mode is enabled.
    FSP_ERR_DEVICE_BUSYThe device is busy.
    +
    +
    +
    Note
    In this API, data can be written up to 64 bytes at a time.
    + +
    +
    + +

    ◆ R_XSPI_QSPI_Erase()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_Erase (spi_flash_ctrl_t * p_ctrl,
    uint8_t *const p_device_address,
    uint32_t byte_count 
    )
    +
    +

    Erase a block or sector of flash. The byte_count must exactly match one of the erase sizes defined in spi_flash_cfg_t. For chip erase, byte_count must be SPI_FLASH_ERASE_SIZE_CHIP_ERASE.

    +

    Implements spi_flash_api_t::erase.

    +
    Return values
    + + + + + + +
    FSP_SUCCESSThe command to erase the flash was executed successfully.
    FSP_ERR_ASSERTIONp_instance_ctrl or p_device_address is NULL, or byte_count doesn't match an erase size defined in spi_flash_cfg_t, or device is in XIP mode.
    FSP_ERR_NOT_OPENDriver is not opened.
    FSP_ERR_INVALID_MODEThis function can't be called when XIP mode is enabled.
    FSP_ERR_DEVICE_BUSYThe device is busy.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_StatusGet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_StatusGet (spi_flash_ctrl_t * p_ctrl,
    spi_flash_status_t *const p_status 
    )
    +
    +

    Gets the write or erase status of the flash.

    +

    Implements spi_flash_api_t::statusGet.

    +
    Return values
    + + + + + +
    FSP_SUCCESSThe write status is in p_status.
    FSP_ERR_ASSERTIONp_instance_ctrl or p_status is NULL.
    FSP_ERR_NOT_OPENDriver is not opened.
    FSP_ERR_INVALID_MODEThis function can't be called when XIP mode is enabled.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_BankSet()

    + +
    +
    + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_BankSet (spi_flash_ctrl_t * p_ctrl,
    uint32_t bank 
    )
    +
    +

    Selects the bank to access.

    +

    Implements spi_flash_api_t::bankSet.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_DirectTransfer()

    + +
    +
    + + + + + + + + + + + + + + + + + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_DirectTransfer (spi_flash_ctrl_t * p_ctrl,
    spi_flash_direct_transfer_t *const p_transfer,
    spi_flash_direct_transfer_dir_t direction 
    )
    +
    +

    Read/Write raw data directly with the SerialFlash.

    +

    Implements spi_flash_api_t::directTransfer.

    +

    Example:

    /* Send the Write Enable (WREN) command to enable writing to the status register */
    err = R_XSPI_QSPI_DirectTransfer(&g_qspi0_ctrl, &qspi_direct_transfer, SPI_FLASH_DIRECT_TRANSFER_DIR_WRITE);
    handle_error(err);
    Return values
    + + + + + +
    FSP_SUCCESSThe flash was programmed successfully.
    FSP_ERR_ASSERTIONA required pointer is NULL.
    FSP_ERR_NOT_OPENDriver is not opened.
    FSP_ERR_INVALID_MODEThis function must be called after R_XSPI_QSPI_DirectWrite with read_after_write set to true.
    +
    +
    + +
    +
    + +

    ◆ R_XSPI_QSPI_AutoCalibrate()

    + +
    +
    + + + + + + + + +
    fsp_err_t R_XSPI_QSPI_AutoCalibrate (spi_flash_ctrl_t * p_ctrl)
    +
    +

    AutoCalibrate the SPI flash driver module.

    +

    Implements spi_flash_api_t::autoCalibrate.

    +
    Return values
    + + +
    FSP_ERR_UNSUPPORTEDAPI not supported.
    +
    +
    + +
    +
    +
    +
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"group___x_s_p_i___q_s_p_i.html#ga384be6c60819abe2478a7b35c9a7a98e", null ], + [ "R_XSPI_QSPI_DirectTransfer", "group___x_s_p_i___q_s_p_i.html#ga5e5bf2c3854fb149c7ac6f96fce9ee98", null ], + [ "R_XSPI_QSPI_AutoCalibrate", "group___x_s_p_i___q_s_p_i.html#ga6fceaa55b924ce5ecf7a00a962b5d529", null ] +]; \ No newline at end of file diff --git a/index.html b/index.html index 5971050..a93067e 100644 --- a/index.html +++ b/index.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: Introduction +RZV Flexible Software Package Documentation: Introduction @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
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    Introduction
    @@ -110,19 +178,19 @@

    Overview

    -

    This manual describes how to use the Renesas Flexible Software Package (FSP) for writing applications for the RZ microprocessors.

    +

    This manual describes how to use the Renesas Flexible Software Package (FSP) for writing applications for the RA microcontroller series.

    Using this Manual

    This manual provides a wide variety of information, so it can be helpful to know where to start. Here is a short description of each main section and how they can be used.

    -

    Starting Development - Provides a step by step guide on how to use e2 studio and FSP to develop a project for RZ MPUs. This is a good place to start to get up to speed quickly and efficiently.

    +

    Starting Development - Provides a step by step guide on how to use e2 studio and FSP to develop a project for RA MCUs. This is a good place to start to get up to speed quickly and efficiently.

    FSP Architecture - Provides useful background material on key FSP concepts such as Modules, Stacks, and API standards. Reference this section to extend or refresh your knowledge of FSP concepts.

    -

    API Reference - Provides detailed information on each module and interface including features, API functions, configuration settings, usage notes, function prototypes and code examples. Board Support Package (BSP) related API functions are also included.

    +

    API Reference - Provides detailed information on each module and interface including features, API functions, configuration settings, usage notes, function prototypes and code examples. Board Support Package (BSP) related API functions are also included.

    Documentation Standard

    Each Modules section user guide outlines the following:

    • Features: A bullet list of high level features provided by the module.
      • -
    • Configuration: A description of module specific configurations available in the RZ Configuration editor.
      • +
    • Configuration: A description of module specific configurations available in the RA Configuration editor.
    • Usage Notes: Module specific documentation and limitations.
    • Examples: Example code provided to help the user get started.
    • API Reference: Usage notes for each API in the module, including the function prototype and hyperlinks to the interface documentation for parameter definitions.
      • @@ -147,20 +215,20 @@

      FSP provides uniform and intuitive APIs that are well documented. Each module is supported with detailed user documentation including example code.

      Scalability

      -

      FSP modules can be used on any MPU in the RZ microprocessors, provided the MPU has any peripherals required by the module.

      +

      FSP modules can be used on any MCU in the RA family, provided the MCU has any peripherals required by the module.

      Build Time Configurations

      FSP modules also have build time configurations that can be used to optimize the size of the module for the feature set required by the application.

      e2 studio IDE

      -

      FSP provides a host of efficiency enhancing tools for developing projects targeting the Renesas RZ microprocessors. The e2 studio IDE provides a familiar development cockpit from which the key steps of project creation, module selection and configuration, code development, code generation, and debugging are all managed.

      +

      FSP provides a host of efficiency enhancing tools for developing projects targeting the Renesas RA series of MCU devices. The e2 studio IDE provides a familiar development cockpit from which the key steps of project creation, module selection and configuration, code development, code generation, and debugging are all managed.

    diff --git a/modules.html b/modules.html index 74f5765..585b189 100644 --- a/modules.html +++ b/modules.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: API Reference +RZV Flexible Software Package Documentation: API Reference @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
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    API Reference
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    [detail level 123]
    - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
     ▼BSPCommon code shared by FSP drivers
     Common Error Codes
     ▼MPU Board Support PackageThe BSP is responsible for getting the MPU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, interrupts and C runtime environment
     RZV2L
     BSP I/O accessThis module provides basic read/write access to port pins
     ▼ModulesModules are the smallest unit of software available in the FSP. Each module implements one interface
     Controller Area Network - Flexible Data (r_canfd)Driver for the CANFD peripheral on RZ MPUs. This module implements the CAN Interface
     General PWM Timer (r_gpt)Driver for the GPT peripheral on RZ MPUs. This module implements the Timer Interface
     General Timer (r_gtm)Driver for the GTM peripherals on RZ MPUs. This module implements the Timer Interface
     External IRQ (r_intc_irq)Driver for the INTC_IRQ peripheral on RZ/V2L. This module implements the External IRQ Interface
     I/O Ports (r_ioport)Driver for the I/O Ports peripheral on RZ MPUs. This module implements the I/O Port Interface
     Message Handling Unit for non secure channels (r_mhu_ns)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels)
     Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get)
     Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set)
     Message Handling Unit for secure channels (r_mhu_s)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels)
     Port Output Enable for GPT (r_poeg)Driver for the POEG peripheral on RZ MPUs. This module implements the POEG Interface
     I2C Master on RIIC (r_riic_master)Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Master Interface
     Renesas Serial Peripheral Interface (r_rspi)Driver for the RSPI peripheral on RZ MPUs. This module implements the SPI Interface
     Serial Communications Interface (SCIF) UART (r_scif_uart)Driver for the SCIF peripheral on RZ MPUs. This module implements the UART Interface
     I2C Communication Device (rm_comms_i2c)Middleware to implement the I2C communications interface. This module implements the Communicatons Middleware Interface
     FreeRTOS Port (rm_freertos_port)FreeRTOS port for RZ MPUs
     HS300X Temperature/Humidity Sensor (rm_hs300x)Middleware to implement the HS300X sensor interface. This module implements the HS300X Middleware Interface
     HS400X Temperature/Humidity Sensor (rm_hs400x)Middleware to implement the HS400X sensor interface. This module implements the HS400X Middleware Interface
     OB1203 Light/Proximity/PPG Sensor (rm_ob1203)Middleware to implement the OB1203 sensor interface. This module implements the OB1203 Middleware Interface
     ZMOD4XXX Gas Sensor (rm_zmod4xxx)Middleware to implement the ZMOD4XXX sensor interface. This module implements the ZMOD4XXX Middleware Interface
     ▼InterfacesThe FSP interfaces provide APIs for common functionality. They can be implemented by one or more modules. Modules can use other modules as dependencies using this interface layer
     CAN InterfaceInterface for CAN peripheral
     External IRQ InterfaceInterface for detecting external interrupts
     I2C Master InterfaceInterface for I2C master communication
     I/O Port InterfaceInterface for accessing I/O ports and configuring I/O functionality
     MHU Interface (for secure and non secure channels)Interface for Message Handling Unit
     MHU Interface (Software Interrupt Get)Interface for Message Handling Unit (Software Interrupt Get)
     MHU Interface (Software Interrupt Set)Interface for Message Handling Unit (Software Interrupt Set)
     POEG InterfaceInterface for the Port Output Enable for GPT
     SPI InterfaceInterface for SPI communications
     Timer InterfaceInterface for timer functions
     Transfer InterfaceInterface for data transfer functions
     UART InterfaceInterface for UART communications
     Communicatons Middleware InterfaceInterface for Communications Middleware functions
     HS300X Middleware InterfaceInterface for HS300X Middleware functions
     HS400X Middleware InterfaceInterface for HS400X Middleware functions
     OB1203 Middleware InterfaceInterface for OB1203 Middleware functions
     ZMOD4XXX Middleware InterfaceInterface for ZMOD4XXX Middleware functions
     ▼MPU Board Support PackageThe BSP is responsible for getting the MCU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, clocks, interrupts, C runtime environment, and stack monitor
     RZV2H
     RZV2L
     BSP I/O accessThis module provides basic read/write access to port pins
     ▼ModulesModules are the smallest unit of software available in the FSP. Each module implements one interface
     ▼AnalogAnalog Modules
     Analog to Digital Converter (r_adc_c)Driver for the ADC peripheral on RZ MPUs. This module implements the ADC Interface
     Analog to Digital Converter (r_adc_e)Driver for the and ADC12 peripherals on RZ microprocessor. This module implements the ADC Interface
     Temperature Sensor Unit (r_tsu_b)Driver for the TSU peripheral on RZ microprocessor. This module implements the ADC Interface
     ▼ConnectivityConnectivity Modules
     Controller Area Network - Flexible Data (r_canfd)Driver for the CANFD peripheral on RZ MPUs. This module implements the CAN Interface
     I3C (r_i3c_b)Driver for the I3C peripheral on RZ MPU. This module implements the I3C Interface
     Message Handling Unit for non secure channels (r_mhu_b_ns)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels)
     Message Handling Unit for non-secure software interrupt receive (r_mhu_b_ns_swint_get)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get)
     Message Handling Unit for non-secure software interrupt generation (r_mhu_b_ns_swint_set)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set)
     Message Handling Unit for secure channels (r_mhu_b_s)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels)
     Message Handling Unit for non secure channels (r_mhu_ns)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels)
     Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Get)
     Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (Software Interrupt Set)
     Message Handling Unit for secure channels (r_mhu_s)Driver for the MHU peripherals on RZ MPUs. This module implements the MHU Interface (for secure and non secure channels)
     PDM Interface (r_pdm)Driver for the PDM peripheral on RZ MPUs. This module implements the PDM Interface
     I2C Master on RIIC (r_riic_master)Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Master Interface
     I2C Slave (r_riic_slave)Driver for the RIIC peripheral on RZ MPUs. This module implements the I2C Slave Interface
     Renesas Serial Peripheral Interface (r_rspi)Driver for the RSPI peripheral on RZ MPUs. This module implements the SPI Interface
     I2C Master (r_sci_b_i2c)Driver for the SCI_B peripheral on RZ MPUs. This module implements the I2C Master Interface
     UART (r_sci_b_uart)Driver for the SCI peripheral on RZ MPUs. This module implements the UART Interface
     Serial Communications Interface (SCIF) UART (r_scif_uart)Driver for the SCIF peripheral on RZ MPUs. This module implements the UART Interface
     SPI (r_spi_b)Driver for the SPI peripheral on RZ MPUs. This module implements the SPI Interface
     I2C Communication Device (rm_comms_i2c)Middleware to implement the I2C communications interface. This module implements the Communicatons Middleware Interface
     ▼InputInput Modules
     External IRQ (r_intc_irq)Driver for the INTC_IRQ peripheral on RZ MPUs. This module implements the External IRQ Interface
     External IRQ (r_intc_nmi)Driver for the INTC_NMI peripheral on RZ MPUs. This module implements the External IRQ Interface
     External IRQ (r_intc_tint)Driver for the Interrupt Controller peripheral on RZ MPUs. This module implements the External IRQ Interface
     ▼MonitoringMonitoring Modules
     CRC (r_crc)Driver for the CRC peripheral on RZ MPUs. This module implements the CRC Interface
     Watchdog (r_wdt)Driver for the WDT peripheral on RZ MPUs. This module implements the WDT Interface
     ▼RTOSRTOS Modules
     FreeRTOS Port (rm_freertos_port)FreeRTOS port for RZ MPUs
     ▼SensorSensor Modules
     HS300X Temperature/Humidity Sensor (rm_hs300x)Middleware to implement the HS300X sensor interface. This module implements the HS300X Middleware Interface
     HS400X Temperature/Humidity Sensor (rm_hs400x)Middleware to implement the HS400X sensor interface. This module implements the HS400X Middleware Interface
     ZMOD4XXX Gas Sensor (rm_zmod4xxx)Middleware to implement the ZMOD4XXX sensor interface. This module implements the ZMOD4XXX Middleware Interface
     ▼StorageStorage Modules
     Expanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi)Driver for the xSPI peripheral on RZ microprocessor. This module implements the SPI Flash Interface
     ▼SystemSystem Modules
     Event Link Controller (r_elc)Driver for the ELC peripheral on RZ microprocessor. This module implements the ELC Interface
     I/O Ports (r_ioport)Driver for the I/O Ports peripheral on RZ MPUs. This module implements the I/O Port Interface
     ▼TimersTimers Modules
     Compare Match Timer W (r_cmtw)Driver for the CMTW peripheral on RZ MPUs. This module implements the Timer Interface
     General PWM Timer (r_gpt)Driver for the GPT peripheral on RZ MPUs. This module implements the Timer Interface
     General Timer (r_gtm)Driver for the GTM peripherals on RZ MPUs. This module implements the Timer Interface
     Multi-Function Timer Pulse Unit 3 (r_mtu3)Driver for the MTU3 peripherals on RZ microprocessor. This module implements the Timer Interface
     Port Output Enable for GPT (r_poeg)Driver for the POEG peripheral on RZ MPUs. This module implements the POEG Interface
     Realtime Clock (r_rtc)Driver for the RTC peripheral on RZ MPUs. This module implements the RTC Interface
     ▼TransferTransfer Modules
     Direct Memory Access Controller (r_dmac_b)Driver for the DMAC peripheral on RZ MPUs. This module implements the Transfer Interface
     ▼InterfacesThe FSP interfaces provide APIs for common functionality. They can be implemented by one or more modules. Modules can use other modules as dependencies using this interface layer
     ADC InterfaceInterface for A/D Converters
     CAN InterfaceInterface for CAN peripheral
     CRC InterfaceInterface for cyclic redundancy checking
     ELC InterfaceInterface for the Event Link Controller
     External IRQ InterfaceInterface for detecting external interrupts
     I2C Master InterfaceInterface for I2C master communication
     I2C Slave InterfaceInterface for I2C slave communication
     I3C InterfaceInterface for I3C
     I/O Port InterfaceInterface for accessing I/O ports and configuring I/O functionality
     MHU Interface (for secure and non secure channels)Interface for Message Handling Unit
     MHU Interface (Software Interrupt Get)Interface for Message Handling Unit (Software Interrupt Get)
     MHU Interface (Software Interrupt Set)Interface for Message Handling Unit (Software Interrupt Set)
     PDM InterfaceInterface for PDM audio communication
     POEG InterfaceInterface for the Port Output Enable for GPT
     RTC InterfaceInterface for accessing the Realtime Clock
     SPI InterfaceInterface for SPI communications
     SPI Flash InterfaceInterface for accessing external SPI flash devices
     Timer InterfaceInterface for timer functions
     Transfer InterfaceInterface for data transfer functions
     UART InterfaceInterface for UART communications
     WDT InterfaceInterface for watch dog timer functions
     Communicatons Middleware InterfaceInterface for Communications Middleware functions
     HS300X Middleware InterfaceInterface for HS300X Middleware functions
     HS400X Middleware InterfaceInterface for HS400X Middleware functions
     ZMOD4XXX Middleware InterfaceInterface for ZMOD4XXX Middleware functions
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    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
    RZV Flexible Software Package Documentation +  Release v2.0.0
    -
    - +
    + +
    + - - - - -
    + +     + +   + + + +
    @@ -74,6 +78,53 @@ + + + + + +
    + + +
    + +
    +
    +
    Starting Development
    @@ -107,7 +175,7 @@ diff --git a/r_elc_concept.svg b/r_elc_concept.svg new file mode 100644 index 0000000..41d3a49 --- /dev/null +++ b/r_elc_concept.svg @@ -0,0 +1,4 @@ + + + +
    I/O Ports
    I/O Ports
    CMTW
    CMTW
    GTM
    GTM
    DMAC
    DMAC
    WDT
    WDT
    RSPI
    RSPI
    RSCI
    RSCI
    RTC
    RTC
    RIIC
    RIIC
    ELC
    ELC
    I/O Ports
    I/O Ports
    GPT
    GPT
    ADC
    ADC
    TSU
    TSU
    GBETH
    GBETH
    ADC
    ADC
    SCIF
    SCIF
    GPT
    GPT
    I3C
    I3C
    GBETH
    GBETH
    ISU
    ISU
    DRP-AI
    DRP-AI
    DRP1
    DRP1
    Software
    Software    Text is not SVG - cannot display     \ No newline at end of file diff --git a/r_elc_eventset.svg b/r_elc_eventset.svg new file mode 100644 index 0000000..e13e0d5 --- /dev/null +++ b/r_elc_eventset.svg @@ -0,0 +1,4 @@ + + + +
    ELC_PERIPHERAL_ADC
    ELC_PERIPHERAL_ADC
    GPT00 Overflow
    GPT00 Overflow
    GPT00 Underflow
    GPT00 Underflow
    · · ·
    · · ·
    GPT00 Match F
    GPT00 Match F
    · · ·
    · · ·
    GPT00 Match D
    GPT00 Match D
    GPT00 Match E
    GPT00 Match E
    ADC Start Conversion
    ADC Start Conver...
    ELC_EVENT_GPT00_COUNTER_OVERFLOW
    ELC_EVENT_GPT00_COUNTER_OVERFLOW
    Selected event
    Selected event
    Available events
    Available events
    Peripheral function
    Peripheral function
    ELC
    ELC    Text is not SVG - cannot display     \ No newline at end of file diff --git a/r_i3c_device_table.svg b/r_i3c_device_table.svg new file mode 100644 index 0000000..3f1a5b4 --- /dev/null +++ b/r_i3c_device_table.svg @@ -0,0 +1,3 @@ + + +
    Device Index 0
    Device Index 0

    Device Table Entries

    • Static/Dynamic Address
    • Accept/Reject Interrupt Requests
    • Accept/Reject Mastership Requests
    • IBI Payload Requirement
    • Device Type (I3C / Legacy I2C)

    Device Table Entries...

    Extended Device Table Entry

    • Static/Dynamic Address
    • Device Type (I3C / Legacy I3C)
    Extended Device Table Entry...
    Device Index 1
    Device Index 1
    Device Index 2
    Device Index 2
    Device Index 3
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    + +
    + + diff --git a/search/groups_f.js b/search/groups_f.js new file mode 100644 index 0000000..e64b452 --- /dev/null +++ b/search/groups_f.js @@ -0,0 +1,5 @@ +var searchData= +[ + ['watchdog_20_28r_5fwdt_29',['Watchdog (r_wdt)',['../group___w_d_t.html',1,'']]], + ['wdt_20interface',['WDT Interface',['../group___w_d_t___a_p_i.html',1,'']]] +]; diff --git a/search/lunr.js b/search/lunr.js new file mode 100644 index 0000000..94eacb6 --- /dev/null +++ b/search/lunr.js @@ -0,0 +1,3475 @@ +/** + * lunr - http://lunrjs.com - A bit like Solr, but much smaller and not as bright - 2.3.9 + * Copyright (C) 2020 Oliver Nightingale + * @license MIT + */ + +;(function(){ + +/** + * A convenience function for configuring and constructing + * a new lunr Index. + * + * A lunr.Builder instance is created and the pipeline setup + * with a trimmer, stop word filter and stemmer. + * + * This builder object is yielded to the configuration function + * that is passed as a parameter, allowing the list of fields + * and other builder parameters to be customised. + * + * All documents _must_ be added within the passed config function. + * + * @example + * var idx = lunr(function () { + * this.field('title') + * this.field('body') + * this.ref('id') + * + * documents.forEach(function (doc) { + * this.add(doc) + * }, this) + * }) + * + * @see {@link lunr.Builder} + * @see {@link lunr.Pipeline} + * @see {@link lunr.trimmer} + * @see {@link lunr.stopWordFilter} + * @see {@link lunr.stemmer} + * @namespace {function} lunr + */ +var lunr = function (config) { + var builder = new lunr.Builder + + builder.pipeline.add( + lunr.trimmer, + lunr.stopWordFilter, + lunr.stemmer + ) + + builder.searchPipeline.add( + lunr.stemmer + ) + + config.call(builder, builder) + return builder.build() +} + +lunr.version = "2.3.9" +/*! + * lunr.utils + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A namespace containing utils for the rest of the lunr library + * @namespace lunr.utils + */ +lunr.utils = {} + +/** + * Print a warning message to the console. + * + * @param {String} message The message to be printed. + * @memberOf lunr.utils + * @function + */ +lunr.utils.warn = (function (global) { + /* eslint-disable no-console */ + return function (message) { + if (global.console && console.warn) { + console.warn(message) + } + } + /* eslint-enable no-console */ +})(this) + +/** + * Convert an object to a string. + * + * In the case of `null` and `undefined` the function returns + * the empty string, in all other cases the result of calling + * `toString` on the passed object is returned. + * + * @param {Any} obj The object to convert to a string. + * @return {String} string representation of the passed object. + * @memberOf lunr.utils + */ +lunr.utils.asString = function (obj) { + if (obj === void 0 || obj === null) { + return "" + } else { + return obj.toString() + } +} + +/** + * Clones an object. + * + * Will create a copy of an existing object such that any mutations + * on the copy cannot affect the original. + * + * Only shallow objects are supported, passing a nested object to this + * function will cause a TypeError. + * + * Objects with primitives, and arrays of primitives are supported. + * + * @param {Object} obj The object to clone. + * @return {Object} a clone of the passed object. + * @throws {TypeError} when a nested object is passed. + * @memberOf Utils + */ +lunr.utils.clone = function (obj) { + if (obj === null || obj === undefined) { + return obj + } + + var clone = Object.create(null), + keys = Object.keys(obj) + + for (var i = 0; i < keys.length; i++) { + var key = keys[i], + val = obj[key] + + if (Array.isArray(val)) { + clone[key] = val.slice() + continue + } + + if (typeof val === 'string' || + typeof val === 'number' || + typeof val === 'boolean') { + clone[key] = val + continue + } + + throw new TypeError("clone is not deep and does not support nested objects") + } + + return clone +} +lunr.FieldRef = function (docRef, fieldName, stringValue) { + this.docRef = docRef + this.fieldName = fieldName + this._stringValue = stringValue +} + +lunr.FieldRef.joiner = "/" + +lunr.FieldRef.fromString = function (s) { + var n = s.indexOf(lunr.FieldRef.joiner) + + if (n === -1) { + throw "malformed field ref string" + } + + var fieldRef = s.slice(0, n), + docRef = s.slice(n + 1) + + return new lunr.FieldRef (docRef, fieldRef, s) +} + +lunr.FieldRef.prototype.toString = function () { + if (this._stringValue == undefined) { + this._stringValue = this.fieldName + lunr.FieldRef.joiner + this.docRef + } + + return this._stringValue +} +/*! + * lunr.Set + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A lunr set. + * + * @constructor + */ +lunr.Set = function (elements) { + this.elements = Object.create(null) + + if (elements) { + this.length = elements.length + + for (var i = 0; i < this.length; i++) { + this.elements[elements[i]] = true + } + } else { + this.length = 0 + } +} + +/** + * A complete set that contains all elements. + * + * @static + * @readonly + * @type {lunr.Set} + */ +lunr.Set.complete = { + intersect: function (other) { + return other + }, + + union: function () { + return this + }, + + contains: function () { + return true + } +} + +/** + * An empty set that contains no elements. + * + * @static + * @readonly + * @type {lunr.Set} + */ +lunr.Set.empty = { + intersect: function () { + return this + }, + + union: function (other) { + return other + }, + + contains: function () { + return false + } +} + +/** + * Returns true if this set contains the specified object. + * + * @param {object} object - Object whose presence in this set is to be tested. + * @returns {boolean} - True if this set contains the specified object. + */ +lunr.Set.prototype.contains = function (object) { + return !!this.elements[object] +} + +/** + * Returns a new set containing only the elements that are present in both + * this set and the specified set. + * + * @param {lunr.Set} other - set to intersect with this set. + * @returns {lunr.Set} a new set that is the intersection of this and the specified set. + */ + +lunr.Set.prototype.intersect = function (other) { + var a, b, elements, intersection = [] + + if (other === lunr.Set.complete) { + return this + } + + if (other === lunr.Set.empty) { + return other + } + + if (this.length < other.length) { + a = this + b = other + } else { + a = other + b = this + } + + elements = Object.keys(a.elements) + + for (var i = 0; i < elements.length; i++) { + var element = elements[i] + if (element in b.elements) { + intersection.push(element) + } + } + + return new lunr.Set (intersection) +} + +/** + * Returns a new set combining the elements of this and the specified set. + * + * @param {lunr.Set} other - set to union with this set. + * @return {lunr.Set} a new set that is the union of this and the specified set. + */ + +lunr.Set.prototype.union = function (other) { + if (other === lunr.Set.complete) { + return lunr.Set.complete + } + + if (other === lunr.Set.empty) { + return this + } + + return new lunr.Set(Object.keys(this.elements).concat(Object.keys(other.elements))) +} +/** + * A function to calculate the inverse document frequency for + * a posting. This is shared between the builder and the index + * + * @private + * @param {object} posting - The posting for a given term + * @param {number} documentCount - The total number of documents. + */ +lunr.idf = function (posting, documentCount) { + var documentsWithTerm = 0 + + for (var fieldName in posting) { + if (fieldName == '_index') continue // Ignore the term index, its not a field + documentsWithTerm += Object.keys(posting[fieldName]).length + } + + var x = (documentCount - documentsWithTerm + 0.5) / (documentsWithTerm + 0.5) + + return Math.log(1 + Math.abs(x)) +} + +/** + * A token wraps a string representation of a token + * as it is passed through the text processing pipeline. + * + * @constructor + * @param {string} [str=''] - The string token being wrapped. + * @param {object} [metadata={}] - Metadata associated with this token. + */ +lunr.Token = function (str, metadata) { + this.str = str || "" + this.metadata = metadata || {} +} + +/** + * Returns the token string that is being wrapped by this object. + * + * @returns {string} + */ +lunr.Token.prototype.toString = function () { + return this.str +} + +/** + * A token update function is used when updating or optionally + * when cloning a token. + * + * @callback lunr.Token~updateFunction + * @param {string} str - The string representation of the token. + * @param {Object} metadata - All metadata associated with this token. + */ + +/** + * Applies the given function to the wrapped string token. + * + * @example + * token.update(function (str, metadata) { + * return str.toUpperCase() + * }) + * + * @param {lunr.Token~updateFunction} fn - A function to apply to the token string. + * @returns {lunr.Token} + */ +lunr.Token.prototype.update = function (fn) { + this.str = fn(this.str, this.metadata) + return this +} + +/** + * Creates a clone of this token. Optionally a function can be + * applied to the cloned token. + * + * @param {lunr.Token~updateFunction} [fn] - An optional function to apply to the cloned token. + * @returns {lunr.Token} + */ +lunr.Token.prototype.clone = function (fn) { + fn = fn || function (s) { return s } + return new lunr.Token (fn(this.str, this.metadata), this.metadata) +} +/*! + * lunr.tokenizer + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A function for splitting a string into tokens ready to be inserted into + * the search index. Uses `lunr.tokenizer.separator` to split strings, change + * the value of this property to change how strings are split into tokens. + * + * This tokenizer will convert its parameter to a string by calling `toString` and + * then will split this string on the character in `lunr.tokenizer.separator`. + * Arrays will have their elements converted to strings and wrapped in a lunr.Token. + * + * Optional metadata can be passed to the tokenizer, this metadata will be cloned and + * added as metadata to every token that is created from the object to be tokenized. + * + * @static + * @param {?(string|object|object[])} obj - The object to convert into tokens + * @param {?object} metadata - Optional metadata to associate with every token + * @returns {lunr.Token[]} + * @see {@link lunr.Pipeline} + */ +lunr.tokenizer = function (obj, metadata) { + if (obj == null || obj == undefined) { + return [] + } + + if (Array.isArray(obj)) { + return obj.map(function (t) { + return new lunr.Token( + lunr.utils.asString(t).toLowerCase(), + lunr.utils.clone(metadata) + ) + }) + } + + var str = obj.toString().toLowerCase(), + len = str.length, + tokens = [] + + for (var sliceEnd = 0, sliceStart = 0; sliceEnd <= len; sliceEnd++) { + var char = str.charAt(sliceEnd), + sliceLength = sliceEnd - sliceStart + + if ((char.match(lunr.tokenizer.separator) || sliceEnd == len)) { + + if (sliceLength > 0) { + var tokenMetadata = lunr.utils.clone(metadata) || {} + tokenMetadata["position"] = [sliceStart, sliceLength] + tokenMetadata["index"] = tokens.length + + tokens.push( + new lunr.Token ( + str.slice(sliceStart, sliceEnd), + tokenMetadata + ) + ) + } + + sliceStart = sliceEnd + 1 + } + + } + + return tokens +} + +/** + * The separator used to split a string into tokens. Override this property to change the behaviour of + * `lunr.tokenizer` behaviour when tokenizing strings. By default this splits on whitespace and hyphens. + * + * @static + * @see lunr.tokenizer + */ +lunr.tokenizer.separator = /[\s\-]+/ +/*! + * lunr.Pipeline + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.Pipelines maintain an ordered list of functions to be applied to all + * tokens in documents entering the search index and queries being ran against + * the index. + * + * An instance of lunr.Index created with the lunr shortcut will contain a + * pipeline with a stop word filter and an English language stemmer. Extra + * functions can be added before or after either of these functions or these + * default functions can be removed. + * + * When run the pipeline will call each function in turn, passing a token, the + * index of that token in the original list of all tokens and finally a list of + * all the original tokens. + * + * The output of functions in the pipeline will be passed to the next function + * in the pipeline. To exclude a token from entering the index the function + * should return undefined, the rest of the pipeline will not be called with + * this token. + * + * For serialisation of pipelines to work, all functions used in an instance of + * a pipeline should be registered with lunr.Pipeline. Registered functions can + * then be loaded. If trying to load a serialised pipeline that uses functions + * that are not registered an error will be thrown. + * + * If not planning on serialising the pipeline then registering pipeline functions + * is not necessary. + * + * @constructor + */ +lunr.Pipeline = function () { + this._stack = [] +} + +lunr.Pipeline.registeredFunctions = Object.create(null) + +/** + * A pipeline function maps lunr.Token to lunr.Token. A lunr.Token contains the token + * string as well as all known metadata. A pipeline function can mutate the token string + * or mutate (or add) metadata for a given token. + * + * A pipeline function can indicate that the passed token should be discarded by returning + * null, undefined or an empty string. This token will not be passed to any downstream pipeline + * functions and will not be added to the index. + * + * Multiple tokens can be returned by returning an array of tokens. Each token will be passed + * to any downstream pipeline functions and all will returned tokens will be added to the index. + * + * Any number of pipeline functions may be chained together using a lunr.Pipeline. + * + * @interface lunr.PipelineFunction + * @param {lunr.Token} token - A token from the document being processed. + * @param {number} i - The index of this token in the complete list of tokens for this document/field. + * @param {lunr.Token[]} tokens - All tokens for this document/field. + * @returns {(?lunr.Token|lunr.Token[])} + */ + +/** + * Register a function with the pipeline. + * + * Functions that are used in the pipeline should be registered if the pipeline + * needs to be serialised, or a serialised pipeline needs to be loaded. + * + * Registering a function does not add it to a pipeline, functions must still be + * added to instances of the pipeline for them to be used when running a pipeline. + * + * @param {lunr.PipelineFunction} fn - The function to check for. + * @param {String} label - The label to register this function with + */ +lunr.Pipeline.registerFunction = function (fn, label) { + if (label in this.registeredFunctions) { + lunr.utils.warn('Overwriting existing registered function: ' + label) + } + + fn.label = label + lunr.Pipeline.registeredFunctions[fn.label] = fn +} + +/** + * Warns if the function is not registered as a Pipeline function. + * + * @param {lunr.PipelineFunction} fn - The function to check for. + * @private + */ +lunr.Pipeline.warnIfFunctionNotRegistered = function (fn) { + var isRegistered = fn.label && (fn.label in this.registeredFunctions) + + if (!isRegistered) { + lunr.utils.warn('Function is not registered with pipeline. This may cause problems when serialising the index.\n', fn) + } +} + +/** + * Loads a previously serialised pipeline. + * + * All functions to be loaded must already be registered with lunr.Pipeline. + * If any function from the serialised data has not been registered then an + * error will be thrown. + * + * @param {Object} serialised - The serialised pipeline to load. + * @returns {lunr.Pipeline} + */ +lunr.Pipeline.load = function (serialised) { + var pipeline = new lunr.Pipeline + + serialised.forEach(function (fnName) { + var fn = lunr.Pipeline.registeredFunctions[fnName] + + if (fn) { + pipeline.add(fn) + } else { + throw new Error('Cannot load unregistered function: ' + fnName) + } + }) + + return pipeline +} + +/** + * Adds new functions to the end of the pipeline. + * + * Logs a warning if the function has not been registered. + * + * @param {lunr.PipelineFunction[]} functions - Any number of functions to add to the pipeline. + */ +lunr.Pipeline.prototype.add = function () { + var fns = Array.prototype.slice.call(arguments) + + fns.forEach(function (fn) { + lunr.Pipeline.warnIfFunctionNotRegistered(fn) + this._stack.push(fn) + }, this) +} + +/** + * Adds a single function after a function that already exists in the + * pipeline. + * + * Logs a warning if the function has not been registered. + * + * @param {lunr.PipelineFunction} existingFn - A function that already exists in the pipeline. + * @param {lunr.PipelineFunction} newFn - The new function to add to the pipeline. + */ +lunr.Pipeline.prototype.after = function (existingFn, newFn) { + lunr.Pipeline.warnIfFunctionNotRegistered(newFn) + + var pos = this._stack.indexOf(existingFn) + if (pos == -1) { + throw new Error('Cannot find existingFn') + } + + pos = pos + 1 + this._stack.splice(pos, 0, newFn) +} + +/** + * Adds a single function before a function that already exists in the + * pipeline. + * + * Logs a warning if the function has not been registered. + * + * @param {lunr.PipelineFunction} existingFn - A function that already exists in the pipeline. + * @param {lunr.PipelineFunction} newFn - The new function to add to the pipeline. + */ +lunr.Pipeline.prototype.before = function (existingFn, newFn) { + lunr.Pipeline.warnIfFunctionNotRegistered(newFn) + + var pos = this._stack.indexOf(existingFn) + if (pos == -1) { + throw new Error('Cannot find existingFn') + } + + this._stack.splice(pos, 0, newFn) +} + +/** + * Removes a function from the pipeline. + * + * @param {lunr.PipelineFunction} fn The function to remove from the pipeline. + */ +lunr.Pipeline.prototype.remove = function (fn) { + var pos = this._stack.indexOf(fn) + if (pos == -1) { + return + } + + this._stack.splice(pos, 1) +} + +/** + * Runs the current list of functions that make up the pipeline against the + * passed tokens. + * + * @param {Array} tokens The tokens to run through the pipeline. + * @returns {Array} + */ +lunr.Pipeline.prototype.run = function (tokens) { + var stackLength = this._stack.length + + for (var i = 0; i < stackLength; i++) { + var fn = this._stack[i] + var memo = [] + + for (var j = 0; j < tokens.length; j++) { + var result = fn(tokens[j], j, tokens) + + if (result === null || result === void 0 || result === '') continue + + if (Array.isArray(result)) { + for (var k = 0; k < result.length; k++) { + memo.push(result[k]) + } + } else { + memo.push(result) + } + } + + tokens = memo + } + + return tokens +} + +/** + * Convenience method for passing a string through a pipeline and getting + * strings out. This method takes care of wrapping the passed string in a + * token and mapping the resulting tokens back to strings. + * + * @param {string} str - The string to pass through the pipeline. + * @param {?object} metadata - Optional metadata to associate with the token + * passed to the pipeline. + * @returns {string[]} + */ +lunr.Pipeline.prototype.runString = function (str, metadata) { + var token = new lunr.Token (str, metadata) + + return this.run([token]).map(function (t) { + return t.toString() + }) +} + +/** + * Resets the pipeline by removing any existing processors. + * + */ +lunr.Pipeline.prototype.reset = function () { + this._stack = [] +} + +/** + * Returns a representation of the pipeline ready for serialisation. + * + * Logs a warning if the function has not been registered. + * + * @returns {Array} + */ +lunr.Pipeline.prototype.toJSON = function () { + return this._stack.map(function (fn) { + lunr.Pipeline.warnIfFunctionNotRegistered(fn) + + return fn.label + }) +} +/*! + * lunr.Vector + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A vector is used to construct the vector space of documents and queries. These + * vectors support operations to determine the similarity between two documents or + * a document and a query. + * + * Normally no parameters are required for initializing a vector, but in the case of + * loading a previously dumped vector the raw elements can be provided to the constructor. + * + * For performance reasons vectors are implemented with a flat array, where an elements + * index is immediately followed by its value. E.g. [index, value, index, value]. This + * allows the underlying array to be as sparse as possible and still offer decent + * performance when being used for vector calculations. + * + * @constructor + * @param {Number[]} [elements] - The flat list of element index and element value pairs. + */ +lunr.Vector = function (elements) { + this._magnitude = 0 + this.elements = elements || [] +} + + +/** + * Calculates the position within the vector to insert a given index. + * + * This is used internally by insert and upsert. If there are duplicate indexes then + * the position is returned as if the value for that index were to be updated, but it + * is the callers responsibility to check whether there is a duplicate at that index + * + * @param {Number} insertIdx - The index at which the element should be inserted. + * @returns {Number} + */ +lunr.Vector.prototype.positionForIndex = function (index) { + // For an empty vector the tuple can be inserted at the beginning + if (this.elements.length == 0) { + return 0 + } + + var start = 0, + end = this.elements.length / 2, + sliceLength = end - start, + pivotPoint = Math.floor(sliceLength / 2), + pivotIndex = this.elements[pivotPoint * 2] + + while (sliceLength > 1) { + if (pivotIndex < index) { + start = pivotPoint + } + + if (pivotIndex > index) { + end = pivotPoint + } + + if (pivotIndex == index) { + break + } + + sliceLength = end - start + pivotPoint = start + Math.floor(sliceLength / 2) + pivotIndex = this.elements[pivotPoint * 2] + } + + if (pivotIndex == index) { + return pivotPoint * 2 + } + + if (pivotIndex > index) { + return pivotPoint * 2 + } + + if (pivotIndex < index) { + return (pivotPoint + 1) * 2 + } +} + +/** + * Inserts an element at an index within the vector. + * + * Does not allow duplicates, will throw an error if there is already an entry + * for this index. + * + * @param {Number} insertIdx - The index at which the element should be inserted. + * @param {Number} val - The value to be inserted into the vector. + */ +lunr.Vector.prototype.insert = function (insertIdx, val) { + this.upsert(insertIdx, val, function () { + throw "duplicate index" + }) +} + +/** + * Inserts or updates an existing index within the vector. + * + * @param {Number} insertIdx - The index at which the element should be inserted. + * @param {Number} val - The value to be inserted into the vector. + * @param {function} fn - A function that is called for updates, the existing value and the + * requested value are passed as arguments + */ +lunr.Vector.prototype.upsert = function (insertIdx, val, fn) { + this._magnitude = 0 + var position = this.positionForIndex(insertIdx) + + if (this.elements[position] == insertIdx) { + this.elements[position + 1] = fn(this.elements[position + 1], val) + } else { + this.elements.splice(position, 0, insertIdx, val) + } +} + +/** + * Calculates the magnitude of this vector. + * + * @returns {Number} + */ +lunr.Vector.prototype.magnitude = function () { + if (this._magnitude) return this._magnitude + + var sumOfSquares = 0, + elementsLength = this.elements.length + + for (var i = 1; i < elementsLength; i += 2) { + var val = this.elements[i] + sumOfSquares += val * val + } + + return this._magnitude = Math.sqrt(sumOfSquares) +} + +/** + * Calculates the dot product of this vector and another vector. + * + * @param {lunr.Vector} otherVector - The vector to compute the dot product with. + * @returns {Number} + */ +lunr.Vector.prototype.dot = function (otherVector) { + var dotProduct = 0, + a = this.elements, b = otherVector.elements, + aLen = a.length, bLen = b.length, + aVal = 0, bVal = 0, + i = 0, j = 0 + + while (i < aLen && j < bLen) { + aVal = a[i], bVal = b[j] + if (aVal < bVal) { + i += 2 + } else if (aVal > bVal) { + j += 2 + } else if (aVal == bVal) { + dotProduct += a[i + 1] * b[j + 1] + i += 2 + j += 2 + } + } + + return dotProduct +} + +/** + * Calculates the similarity between this vector and another vector. + * + * @param {lunr.Vector} otherVector - The other vector to calculate the + * similarity with. + * @returns {Number} + */ +lunr.Vector.prototype.similarity = function (otherVector) { + return this.dot(otherVector) / this.magnitude() || 0 +} + +/** + * Converts the vector to an array of the elements within the vector. + * + * @returns {Number[]} + */ +lunr.Vector.prototype.toArray = function () { + var output = new Array (this.elements.length / 2) + + for (var i = 1, j = 0; i < this.elements.length; i += 2, j++) { + output[j] = this.elements[i] + } + + return output +} + +/** + * A JSON serializable representation of the vector. + * + * @returns {Number[]} + */ +lunr.Vector.prototype.toJSON = function () { + return this.elements +} +/* eslint-disable */ +/*! + * lunr.stemmer + * Copyright (C) 2020 Oliver Nightingale + * Includes code from - http://tartarus.org/~martin/PorterStemmer/js.txt + */ + +/** + * lunr.stemmer is an english language stemmer, this is a JavaScript + * implementation of the PorterStemmer taken from http://tartarus.org/~martin + * + * @static + * @implements {lunr.PipelineFunction} + * @param {lunr.Token} token - The string to stem + * @returns {lunr.Token} + * @see {@link lunr.Pipeline} + * @function + */ +lunr.stemmer = (function(){ + var step2list = { + "ational" : "ate", + "tional" : "tion", + "enci" : "ence", + "anci" : "ance", + "izer" : "ize", + "bli" : "ble", + "alli" : "al", + "entli" : "ent", + "eli" : "e", + "ousli" : "ous", + "ization" : "ize", + "ation" : "ate", + "ator" : "ate", + "alism" : "al", + "iveness" : "ive", + "fulness" : "ful", + "ousness" : "ous", + "aliti" : "al", + "iviti" : "ive", + "biliti" : "ble", + "logi" : "log" + }, + + step3list = { + "icate" : "ic", + "ative" : "", + "alize" : "al", + "iciti" : "ic", + "ical" : "ic", + "ful" : "", + "ness" : "" + }, + + c = "[^aeiou]", // consonant + v = "[aeiouy]", // vowel + C = c + "[^aeiouy]*", // consonant sequence + V = v + "[aeiou]*", // vowel sequence + + mgr0 = "^(" + C + ")?" + V + C, // [C]VC... is m>0 + meq1 = "^(" + C + ")?" + V + C + "(" + V + ")?$", // [C]VC[V] is m=1 + mgr1 = "^(" + C + ")?" + V + C + V + C, // [C]VCVC... is m>1 + s_v = "^(" + C + ")?" + v; // vowel in stem + + var re_mgr0 = new RegExp(mgr0); + var re_mgr1 = new RegExp(mgr1); + var re_meq1 = new RegExp(meq1); + var re_s_v = new RegExp(s_v); + + var re_1a = /^(.+?)(ss|i)es$/; + var re2_1a = /^(.+?)([^s])s$/; + var re_1b = /^(.+?)eed$/; + var re2_1b = /^(.+?)(ed|ing)$/; + var re_1b_2 = /.$/; + var re2_1b_2 = /(at|bl|iz)$/; + var re3_1b_2 = new RegExp("([^aeiouylsz])\\1$"); + var re4_1b_2 = new RegExp("^" + C + v + "[^aeiouwxy]$"); + + var re_1c = /^(.+?[^aeiou])y$/; + var re_2 = /^(.+?)(ational|tional|enci|anci|izer|bli|alli|entli|eli|ousli|ization|ation|ator|alism|iveness|fulness|ousness|aliti|iviti|biliti|logi)$/; + + var re_3 = /^(.+?)(icate|ative|alize|iciti|ical|ful|ness)$/; + + var re_4 = /^(.+?)(al|ance|ence|er|ic|able|ible|ant|ement|ment|ent|ou|ism|ate|iti|ous|ive|ize)$/; + var re2_4 = /^(.+?)(s|t)(ion)$/; + + var re_5 = /^(.+?)e$/; + var re_5_1 = /ll$/; + var re3_5 = new RegExp("^" + C + v + "[^aeiouwxy]$"); + + var porterStemmer = function porterStemmer(w) { + var stem, + suffix, + firstch, + re, + re2, + re3, + re4; + + if (w.length < 3) { return w; } + + firstch = w.substr(0,1); + if (firstch == "y") { + w = firstch.toUpperCase() + w.substr(1); + } + + // Step 1a + re = re_1a + re2 = re2_1a; + + if (re.test(w)) { w = w.replace(re,"$1$2"); } + else if (re2.test(w)) { w = w.replace(re2,"$1$2"); } + + // Step 1b + re = re_1b; + re2 = re2_1b; + if (re.test(w)) { + var fp = re.exec(w); + re = re_mgr0; + if (re.test(fp[1])) { + re = re_1b_2; + w = w.replace(re,""); + } + } else if (re2.test(w)) { + var fp = re2.exec(w); + stem = fp[1]; + re2 = re_s_v; + if (re2.test(stem)) { + w = stem; + re2 = re2_1b_2; + re3 = re3_1b_2; + re4 = re4_1b_2; + if (re2.test(w)) { w = w + "e"; } + else if (re3.test(w)) { re = re_1b_2; w = w.replace(re,""); } + else if (re4.test(w)) { w = w + "e"; } + } + } + + // Step 1c - replace suffix y or Y by i if preceded by a non-vowel which is not the first letter of the word (so cry -> cri, by -> by, say -> say) + re = re_1c; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + w = stem + "i"; + } + + // Step 2 + re = re_2; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + suffix = fp[2]; + re = re_mgr0; + if (re.test(stem)) { + w = stem + step2list[suffix]; + } + } + + // Step 3 + re = re_3; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + suffix = fp[2]; + re = re_mgr0; + if (re.test(stem)) { + w = stem + step3list[suffix]; + } + } + + // Step 4 + re = re_4; + re2 = re2_4; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + re = re_mgr1; + if (re.test(stem)) { + w = stem; + } + } else if (re2.test(w)) { + var fp = re2.exec(w); + stem = fp[1] + fp[2]; + re2 = re_mgr1; + if (re2.test(stem)) { + w = stem; + } + } + + // Step 5 + re = re_5; + if (re.test(w)) { + var fp = re.exec(w); + stem = fp[1]; + re = re_mgr1; + re2 = re_meq1; + re3 = re3_5; + if (re.test(stem) || (re2.test(stem) && !(re3.test(stem)))) { + w = stem; + } + } + + re = re_5_1; + re2 = re_mgr1; + if (re.test(w) && re2.test(w)) { + re = re_1b_2; + w = w.replace(re,""); + } + + // and turn initial Y back to y + + if (firstch == "y") { + w = firstch.toLowerCase() + w.substr(1); + } + + return w; + }; + + return function (token) { + return token.update(porterStemmer); + } +})(); + +lunr.Pipeline.registerFunction(lunr.stemmer, 'stemmer') +/*! + * lunr.stopWordFilter + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.generateStopWordFilter builds a stopWordFilter function from the provided + * list of stop words. + * + * The built in lunr.stopWordFilter is built using this generator and can be used + * to generate custom stopWordFilters for applications or non English languages. + * + * @function + * @param {Array} token The token to pass through the filter + * @returns {lunr.PipelineFunction} + * @see lunr.Pipeline + * @see lunr.stopWordFilter + */ +lunr.generateStopWordFilter = function (stopWords) { + var words = stopWords.reduce(function (memo, stopWord) { + memo[stopWord] = stopWord + return memo + }, {}) + + return function (token) { + if (token && words[token.toString()] !== token.toString()) return token + } +} + +/** + * lunr.stopWordFilter is an English language stop word list filter, any words + * contained in the list will not be passed through the filter. + * + * This is intended to be used in the Pipeline. If the token does not pass the + * filter then undefined will be returned. + * + * @function + * @implements {lunr.PipelineFunction} + * @params {lunr.Token} token - A token to check for being a stop word. + * @returns {lunr.Token} + * @see {@link lunr.Pipeline} + */ +lunr.stopWordFilter = lunr.generateStopWordFilter([ + 'a', + 'able', + 'about', + 'across', + 'after', + 'all', + 'almost', + 'also', + 'am', + 'among', + 'an', + 'and', + 'any', + 'are', + 'as', + 'at', + 'be', + 'because', + 'been', + 'but', + 'by', + 'can', + 'cannot', + 'could', + 'dear', + 'did', + 'do', + 'does', + 'either', + 'else', + 'ever', + 'every', + 'for', + 'from', + 'get', + 'got', + 'had', + 'has', + 'have', + 'he', + 'her', + 'hers', + 'him', + 'his', + 'how', + 'however', + 'i', + 'if', + 'in', + 'into', + 'is', + 'it', + 'its', + 'just', + 'least', + 'let', + 'like', + 'likely', + 'may', + 'me', + 'might', + 'most', + 'must', + 'my', + 'neither', + 'no', + 'nor', + 'not', + 'of', + 'off', + 'often', + 'on', + 'only', + 'or', + 'other', + 'our', + 'own', + 'rather', + 'said', + 'say', + 'says', + 'she', + 'should', + 'since', + 'so', + 'some', + 'than', + 'that', + 'the', + 'their', + 'them', + 'then', + 'there', + 'these', + 'they', + 'this', + 'tis', + 'to', + 'too', + 'twas', + 'us', + 'wants', + 'was', + 'we', + 'were', + 'what', + 'when', + 'where', + 'which', + 'while', + 'who', + 'whom', + 'why', + 'will', + 'with', + 'would', + 'yet', + 'you', + 'your' +]) + +lunr.Pipeline.registerFunction(lunr.stopWordFilter, 'stopWordFilter') +/*! + * lunr.trimmer + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.trimmer is a pipeline function for trimming non word + * characters from the beginning and end of tokens before they + * enter the index. + * + * This implementation may not work correctly for non latin + * characters and should either be removed or adapted for use + * with languages with non-latin characters. + * + * @static + * @implements {lunr.PipelineFunction} + * @param {lunr.Token} token The token to pass through the filter + * @returns {lunr.Token} + * @see lunr.Pipeline + */ +lunr.trimmer = function (token) { + return token.update(function (s) { + return s.replace(/^\W+/, '').replace(/\W+$/, '') + }) +} + +lunr.Pipeline.registerFunction(lunr.trimmer, 'trimmer') +/*! + * lunr.TokenSet + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * A token set is used to store the unique list of all tokens + * within an index. Token sets are also used to represent an + * incoming query to the index, this query token set and index + * token set are then intersected to find which tokens to look + * up in the inverted index. + * + * A token set can hold multiple tokens, as in the case of the + * index token set, or it can hold a single token as in the + * case of a simple query token set. + * + * Additionally token sets are used to perform wildcard matching. + * Leading, contained and trailing wildcards are supported, and + * from this edit distance matching can also be provided. + * + * Token sets are implemented as a minimal finite state automata, + * where both common prefixes and suffixes are shared between tokens. + * This helps to reduce the space used for storing the token set. + * + * @constructor + */ +lunr.TokenSet = function () { + this.final = false + this.edges = {} + this.id = lunr.TokenSet._nextId + lunr.TokenSet._nextId += 1 +} + +/** + * Keeps track of the next, auto increment, identifier to assign + * to a new tokenSet. + * + * TokenSets require a unique identifier to be correctly minimised. + * + * @private + */ +lunr.TokenSet._nextId = 1 + +/** + * Creates a TokenSet instance from the given sorted array of words. + * + * @param {String[]} arr - A sorted array of strings to create the set from. + * @returns {lunr.TokenSet} + * @throws Will throw an error if the input array is not sorted. + */ +lunr.TokenSet.fromArray = function (arr) { + var builder = new lunr.TokenSet.Builder + + for (var i = 0, len = arr.length; i < len; i++) { + builder.insert(arr[i]) + } + + builder.finish() + return builder.root +} + +/** + * Creates a token set from a query clause. + * + * @private + * @param {Object} clause - A single clause from lunr.Query. + * @param {string} clause.term - The query clause term. + * @param {number} [clause.editDistance] - The optional edit distance for the term. + * @returns {lunr.TokenSet} + */ +lunr.TokenSet.fromClause = function (clause) { + if ('editDistance' in clause) { + return lunr.TokenSet.fromFuzzyString(clause.term, clause.editDistance) + } else { + return lunr.TokenSet.fromString(clause.term) + } +} + +/** + * Creates a token set representing a single string with a specified + * edit distance. + * + * Insertions, deletions, substitutions and transpositions are each + * treated as an edit distance of 1. + * + * Increasing the allowed edit distance will have a dramatic impact + * on the performance of both creating and intersecting these TokenSets. + * It is advised to keep the edit distance less than 3. + * + * @param {string} str - The string to create the token set from. + * @param {number} editDistance - The allowed edit distance to match. + * @returns {lunr.Vector} + */ +lunr.TokenSet.fromFuzzyString = function (str, editDistance) { + var root = new lunr.TokenSet + + var stack = [{ + node: root, + editsRemaining: editDistance, + str: str + }] + + while (stack.length) { + var frame = stack.pop() + + // no edit + if (frame.str.length > 0) { + var char = frame.str.charAt(0), + noEditNode + + if (char in frame.node.edges) { + noEditNode = frame.node.edges[char] + } else { + noEditNode = new lunr.TokenSet + frame.node.edges[char] = noEditNode + } + + if (frame.str.length == 1) { + noEditNode.final = true + } + + stack.push({ + node: noEditNode, + editsRemaining: frame.editsRemaining, + str: frame.str.slice(1) + }) + } + + if (frame.editsRemaining == 0) { + continue + } + + // insertion + if ("*" in frame.node.edges) { + var insertionNode = frame.node.edges["*"] + } else { + var insertionNode = new lunr.TokenSet + frame.node.edges["*"] = insertionNode + } + + if (frame.str.length == 0) { + insertionNode.final = true + } + + stack.push({ + node: insertionNode, + editsRemaining: frame.editsRemaining - 1, + str: frame.str + }) + + // deletion + // can only do a deletion if we have enough edits remaining + // and if there are characters left to delete in the string + if (frame.str.length > 1) { + stack.push({ + node: frame.node, + editsRemaining: frame.editsRemaining - 1, + str: frame.str.slice(1) + }) + } + + // deletion + // just removing the last character from the str + if (frame.str.length == 1) { + frame.node.final = true + } + + // substitution + // can only do a substitution if we have enough edits remaining + // and if there are characters left to substitute + if (frame.str.length >= 1) { + if ("*" in frame.node.edges) { + var substitutionNode = frame.node.edges["*"] + } else { + var substitutionNode = new lunr.TokenSet + frame.node.edges["*"] = substitutionNode + } + + if (frame.str.length == 1) { + substitutionNode.final = true + } + + stack.push({ + node: substitutionNode, + editsRemaining: frame.editsRemaining - 1, + str: frame.str.slice(1) + }) + } + + // transposition + // can only do a transposition if there are edits remaining + // and there are enough characters to transpose + if (frame.str.length > 1) { + var charA = frame.str.charAt(0), + charB = frame.str.charAt(1), + transposeNode + + if (charB in frame.node.edges) { + transposeNode = frame.node.edges[charB] + } else { + transposeNode = new lunr.TokenSet + frame.node.edges[charB] = transposeNode + } + + if (frame.str.length == 1) { + transposeNode.final = true + } + + stack.push({ + node: transposeNode, + editsRemaining: frame.editsRemaining - 1, + str: charA + frame.str.slice(2) + }) + } + } + + return root +} + +/** + * Creates a TokenSet from a string. + * + * The string may contain one or more wildcard characters (*) + * that will allow wildcard matching when intersecting with + * another TokenSet. + * + * @param {string} str - The string to create a TokenSet from. + * @returns {lunr.TokenSet} + */ +lunr.TokenSet.fromString = function (str) { + var node = new lunr.TokenSet, + root = node + + /* + * Iterates through all characters within the passed string + * appending a node for each character. + * + * When a wildcard character is found then a self + * referencing edge is introduced to continually match + * any number of any characters. + */ + for (var i = 0, len = str.length; i < len; i++) { + var char = str[i], + final = (i == len - 1) + + if (char == "*") { + node.edges[char] = node + node.final = final + + } else { + var next = new lunr.TokenSet + next.final = final + + node.edges[char] = next + node = next + } + } + + return root +} + +/** + * Converts this TokenSet into an array of strings + * contained within the TokenSet. + * + * This is not intended to be used on a TokenSet that + * contains wildcards, in these cases the results are + * undefined and are likely to cause an infinite loop. + * + * @returns {string[]} + */ +lunr.TokenSet.prototype.toArray = function () { + var words = [] + + var stack = [{ + prefix: "", + node: this + }] + + while (stack.length) { + var frame = stack.pop(), + edges = Object.keys(frame.node.edges), + len = edges.length + + if (frame.node.final) { + /* In Safari, at this point the prefix is sometimes corrupted, see: + * https://github.com/olivernn/lunr.js/issues/279 Calling any + * String.prototype method forces Safari to "cast" this string to what + * it's supposed to be, fixing the bug. */ + frame.prefix.charAt(0) + words.push(frame.prefix) + } + + for (var i = 0; i < len; i++) { + var edge = edges[i] + + stack.push({ + prefix: frame.prefix.concat(edge), + node: frame.node.edges[edge] + }) + } + } + + return words +} + +/** + * Generates a string representation of a TokenSet. + * + * This is intended to allow TokenSets to be used as keys + * in objects, largely to aid the construction and minimisation + * of a TokenSet. As such it is not designed to be a human + * friendly representation of the TokenSet. + * + * @returns {string} + */ +lunr.TokenSet.prototype.toString = function () { + // NOTE: Using Object.keys here as this.edges is very likely + // to enter 'hash-mode' with many keys being added + // + // avoiding a for-in loop here as it leads to the function + // being de-optimised (at least in V8). From some simple + // benchmarks the performance is comparable, but allowing + // V8 to optimize may mean easy performance wins in the future. + + if (this._str) { + return this._str + } + + var str = this.final ? '1' : '0', + labels = Object.keys(this.edges).sort(), + len = labels.length + + for (var i = 0; i < len; i++) { + var label = labels[i], + node = this.edges[label] + + str = str + label + node.id + } + + return str +} + +/** + * Returns a new TokenSet that is the intersection of + * this TokenSet and the passed TokenSet. + * + * This intersection will take into account any wildcards + * contained within the TokenSet. + * + * @param {lunr.TokenSet} b - An other TokenSet to intersect with. + * @returns {lunr.TokenSet} + */ +lunr.TokenSet.prototype.intersect = function (b) { + var output = new lunr.TokenSet, + frame = undefined + + var stack = [{ + qNode: b, + output: output, + node: this + }] + + while (stack.length) { + frame = stack.pop() + + // NOTE: As with the #toString method, we are using + // Object.keys and a for loop instead of a for-in loop + // as both of these objects enter 'hash' mode, causing + // the function to be de-optimised in V8 + var qEdges = Object.keys(frame.qNode.edges), + qLen = qEdges.length, + nEdges = Object.keys(frame.node.edges), + nLen = nEdges.length + + for (var q = 0; q < qLen; q++) { + var qEdge = qEdges[q] + + for (var n = 0; n < nLen; n++) { + var nEdge = nEdges[n] + + if (nEdge == qEdge || qEdge == '*') { + var node = frame.node.edges[nEdge], + qNode = frame.qNode.edges[qEdge], + final = node.final && qNode.final, + next = undefined + + if (nEdge in frame.output.edges) { + // an edge already exists for this character + // no need to create a new node, just set the finality + // bit unless this node is already final + next = frame.output.edges[nEdge] + next.final = next.final || final + + } else { + // no edge exists yet, must create one + // set the finality bit and insert it + // into the output + next = new lunr.TokenSet + next.final = final + frame.output.edges[nEdge] = next + } + + stack.push({ + qNode: qNode, + output: next, + node: node + }) + } + } + } + } + + return output +} +lunr.TokenSet.Builder = function () { + this.previousWord = "" + this.root = new lunr.TokenSet + this.uncheckedNodes = [] + this.minimizedNodes = {} +} + +lunr.TokenSet.Builder.prototype.insert = function (word) { + var node, + commonPrefix = 0 + + if (word < this.previousWord) { + throw new Error ("Out of order word insertion") + } + + for (var i = 0; i < word.length && i < this.previousWord.length; i++) { + if (word[i] != this.previousWord[i]) break + commonPrefix++ + } + + this.minimize(commonPrefix) + + if (this.uncheckedNodes.length == 0) { + node = this.root + } else { + node = this.uncheckedNodes[this.uncheckedNodes.length - 1].child + } + + for (var i = commonPrefix; i < word.length; i++) { + var nextNode = new lunr.TokenSet, + char = word[i] + + node.edges[char] = nextNode + + this.uncheckedNodes.push({ + parent: node, + char: char, + child: nextNode + }) + + node = nextNode + } + + node.final = true + this.previousWord = word +} + +lunr.TokenSet.Builder.prototype.finish = function () { + this.minimize(0) +} + +lunr.TokenSet.Builder.prototype.minimize = function (downTo) { + for (var i = this.uncheckedNodes.length - 1; i >= downTo; i--) { + var node = this.uncheckedNodes[i], + childKey = node.child.toString() + + if (childKey in this.minimizedNodes) { + node.parent.edges[node.char] = this.minimizedNodes[childKey] + } else { + // Cache the key for this node since + // we know it can't change anymore + node.child._str = childKey + + this.minimizedNodes[childKey] = node.child + } + + this.uncheckedNodes.pop() + } +} +/*! + * lunr.Index + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * An index contains the built index of all documents and provides a query interface + * to the index. + * + * Usually instances of lunr.Index will not be created using this constructor, instead + * lunr.Builder should be used to construct new indexes, or lunr.Index.load should be + * used to load previously built and serialized indexes. + * + * @constructor + * @param {Object} attrs - The attributes of the built search index. + * @param {Object} attrs.invertedIndex - An index of term/field to document reference. + * @param {Object} attrs.fieldVectors - Field vectors + * @param {lunr.TokenSet} attrs.tokenSet - An set of all corpus tokens. + * @param {string[]} attrs.fields - The names of indexed document fields. + * @param {lunr.Pipeline} attrs.pipeline - The pipeline to use for search terms. + */ +lunr.Index = function (attrs) { + this.invertedIndex = attrs.invertedIndex + this.fieldVectors = attrs.fieldVectors + this.tokenSet = attrs.tokenSet + this.fields = attrs.fields + this.pipeline = attrs.pipeline +} + +/** + * A result contains details of a document matching a search query. + * @typedef {Object} lunr.Index~Result + * @property {string} ref - The reference of the document this result represents. + * @property {number} score - A number between 0 and 1 representing how similar this document is to the query. + * @property {lunr.MatchData} matchData - Contains metadata about this match including which term(s) caused the match. + */ + +/** + * Although lunr provides the ability to create queries using lunr.Query, it also provides a simple + * query language which itself is parsed into an instance of lunr.Query. + * + * For programmatically building queries it is advised to directly use lunr.Query, the query language + * is best used for human entered text rather than program generated text. + * + * At its simplest queries can just be a single term, e.g. `hello`, multiple terms are also supported + * and will be combined with OR, e.g `hello world` will match documents that contain either 'hello' + * or 'world', though those that contain both will rank higher in the results. + * + * Wildcards can be included in terms to match one or more unspecified characters, these wildcards can + * be inserted anywhere within the term, and more than one wildcard can exist in a single term. Adding + * wildcards will increase the number of documents that will be found but can also have a negative + * impact on query performance, especially with wildcards at the beginning of a term. + * + * Terms can be restricted to specific fields, e.g. `title:hello`, only documents with the term + * hello in the title field will match this query. Using a field not present in the index will lead + * to an error being thrown. + * + * Modifiers can also be added to terms, lunr supports edit distance and boost modifiers on terms. A term + * boost will make documents matching that term score higher, e.g. `foo^5`. Edit distance is also supported + * to provide fuzzy matching, e.g. 'hello~2' will match documents with hello with an edit distance of 2. + * Avoid large values for edit distance to improve query performance. + * + * Each term also supports a presence modifier. By default a term's presence in document is optional, however + * this can be changed to either required or prohibited. For a term's presence to be required in a document the + * term should be prefixed with a '+', e.g. `+foo bar` is a search for documents that must contain 'foo' and + * optionally contain 'bar'. Conversely a leading '-' sets the terms presence to prohibited, i.e. it must not + * appear in a document, e.g. `-foo bar` is a search for documents that do not contain 'foo' but may contain 'bar'. + * + * To escape special characters the backslash character '\' can be used, this allows searches to include + * characters that would normally be considered modifiers, e.g. `foo\~2` will search for a term "foo~2" instead + * of attempting to apply a boost of 2 to the search term "foo". + * + * @typedef {string} lunr.Index~QueryString + * @example Simple single term query + * hello + * @example Multiple term query + * hello world + * @example term scoped to a field + * title:hello + * @example term with a boost of 10 + * hello^10 + * @example term with an edit distance of 2 + * hello~2 + * @example terms with presence modifiers + * -foo +bar baz + */ + +/** + * Performs a search against the index using lunr query syntax. + * + * Results will be returned sorted by their score, the most relevant results + * will be returned first. For details on how the score is calculated, please see + * the {@link https://lunrjs.com/guides/searching.html#scoring|guide}. + * + * For more programmatic querying use lunr.Index#query. + * + * @param {lunr.Index~QueryString} queryString - A string containing a lunr query. + * @throws {lunr.QueryParseError} If the passed query string cannot be parsed. + * @returns {lunr.Index~Result[]} + */ +lunr.Index.prototype.search = function (queryString) { + return this.query(function (query) { + var parser = new lunr.QueryParser(queryString, query) + parser.parse() + }) +} + +/** + * A query builder callback provides a query object to be used to express + * the query to perform on the index. + * + * @callback lunr.Index~queryBuilder + * @param {lunr.Query} query - The query object to build up. + * @this lunr.Query + */ + +/** + * Performs a query against the index using the yielded lunr.Query object. + * + * If performing programmatic queries against the index, this method is preferred + * over lunr.Index#search so as to avoid the additional query parsing overhead. + * + * A query object is yielded to the supplied function which should be used to + * express the query to be run against the index. + * + * Note that although this function takes a callback parameter it is _not_ an + * asynchronous operation, the callback is just yielded a query object to be + * customized. + * + * @param {lunr.Index~queryBuilder} fn - A function that is used to build the query. + * @returns {lunr.Index~Result[]} + */ +lunr.Index.prototype.query = function (fn) { + // for each query clause + // * process terms + // * expand terms from token set + // * find matching documents and metadata + // * get document vectors + // * score documents + + var query = new lunr.Query(this.fields), + matchingFields = Object.create(null), + queryVectors = Object.create(null), + termFieldCache = Object.create(null), + requiredMatches = Object.create(null), + prohibitedMatches = Object.create(null) + + /* + * To support field level boosts a query vector is created per + * field. An empty vector is eagerly created to support negated + * queries. + */ + for (var i = 0; i < this.fields.length; i++) { + queryVectors[this.fields[i]] = new lunr.Vector + } + + fn.call(query, query) + + for (var i = 0; i < query.clauses.length; i++) { + /* + * Unless the pipeline has been disabled for this term, which is + * the case for terms with wildcards, we need to pass the clause + * term through the search pipeline. A pipeline returns an array + * of processed terms. Pipeline functions may expand the passed + * term, which means we may end up performing multiple index lookups + * for a single query term. + */ + var clause = query.clauses[i], + terms = null, + clauseMatches = lunr.Set.empty + + if (clause.usePipeline) { + terms = this.pipeline.runString(clause.term, { + fields: clause.fields + }) + } else { + terms = [clause.term] + } + + for (var m = 0; m < terms.length; m++) { + var term = terms[m] + + /* + * Each term returned from the pipeline needs to use the same query + * clause object, e.g. the same boost and or edit distance. The + * simplest way to do this is to re-use the clause object but mutate + * its term property. + */ + clause.term = term + + /* + * From the term in the clause we create a token set which will then + * be used to intersect the indexes token set to get a list of terms + * to lookup in the inverted index + */ + var termTokenSet = lunr.TokenSet.fromClause(clause), + expandedTerms = this.tokenSet.intersect(termTokenSet).toArray() + + /* + * If a term marked as required does not exist in the tokenSet it is + * impossible for the search to return any matches. We set all the field + * scoped required matches set to empty and stop examining any further + * clauses. + */ + if (expandedTerms.length === 0 && clause.presence === lunr.Query.presence.REQUIRED) { + for (var k = 0; k < clause.fields.length; k++) { + var field = clause.fields[k] + requiredMatches[field] = lunr.Set.empty + } + + break + } + + for (var j = 0; j < expandedTerms.length; j++) { + /* + * For each term get the posting and termIndex, this is required for + * building the query vector. + */ + var expandedTerm = expandedTerms[j], + posting = this.invertedIndex[expandedTerm], + termIndex = posting._index + + for (var k = 0; k < clause.fields.length; k++) { + /* + * For each field that this query term is scoped by (by default + * all fields are in scope) we need to get all the document refs + * that have this term in that field. + * + * The posting is the entry in the invertedIndex for the matching + * term from above. + */ + var field = clause.fields[k], + fieldPosting = posting[field], + matchingDocumentRefs = Object.keys(fieldPosting), + termField = expandedTerm + "/" + field, + matchingDocumentsSet = new lunr.Set(matchingDocumentRefs) + + /* + * if the presence of this term is required ensure that the matching + * documents are added to the set of required matches for this clause. + * + */ + if (clause.presence == lunr.Query.presence.REQUIRED) { + clauseMatches = clauseMatches.union(matchingDocumentsSet) + + if (requiredMatches[field] === undefined) { + requiredMatches[field] = lunr.Set.complete + } + } + + /* + * if the presence of this term is prohibited ensure that the matching + * documents are added to the set of prohibited matches for this field, + * creating that set if it does not yet exist. + */ + if (clause.presence == lunr.Query.presence.PROHIBITED) { + if (prohibitedMatches[field] === undefined) { + prohibitedMatches[field] = lunr.Set.empty + } + + prohibitedMatches[field] = prohibitedMatches[field].union(matchingDocumentsSet) + + /* + * Prohibited matches should not be part of the query vector used for + * similarity scoring and no metadata should be extracted so we continue + * to the next field + */ + continue + } + + /* + * The query field vector is populated using the termIndex found for + * the term and a unit value with the appropriate boost applied. + * Using upsert because there could already be an entry in the vector + * for the term we are working with. In that case we just add the scores + * together. + */ + queryVectors[field].upsert(termIndex, clause.boost, function (a, b) { return a + b }) + + /** + * If we've already seen this term, field combo then we've already collected + * the matching documents and metadata, no need to go through all that again + */ + if (termFieldCache[termField]) { + continue + } + + for (var l = 0; l < matchingDocumentRefs.length; l++) { + /* + * All metadata for this term/field/document triple + * are then extracted and collected into an instance + * of lunr.MatchData ready to be returned in the query + * results + */ + var matchingDocumentRef = matchingDocumentRefs[l], + matchingFieldRef = new lunr.FieldRef (matchingDocumentRef, field), + metadata = fieldPosting[matchingDocumentRef], + fieldMatch + + if ((fieldMatch = matchingFields[matchingFieldRef]) === undefined) { + matchingFields[matchingFieldRef] = new lunr.MatchData (expandedTerm, field, metadata) + } else { + fieldMatch.add(expandedTerm, field, metadata) + } + + } + + termFieldCache[termField] = true + } + } + } + + /** + * If the presence was required we need to update the requiredMatches field sets. + * We do this after all fields for the term have collected their matches because + * the clause terms presence is required in _any_ of the fields not _all_ of the + * fields. + */ + if (clause.presence === lunr.Query.presence.REQUIRED) { + for (var k = 0; k < clause.fields.length; k++) { + var field = clause.fields[k] + requiredMatches[field] = requiredMatches[field].intersect(clauseMatches) + } + } + } + + /** + * Need to combine the field scoped required and prohibited + * matching documents into a global set of required and prohibited + * matches + */ + var allRequiredMatches = lunr.Set.complete, + allProhibitedMatches = lunr.Set.empty + + for (var i = 0; i < this.fields.length; i++) { + var field = this.fields[i] + + if (requiredMatches[field]) { + allRequiredMatches = allRequiredMatches.intersect(requiredMatches[field]) + } + + if (prohibitedMatches[field]) { + allProhibitedMatches = allProhibitedMatches.union(prohibitedMatches[field]) + } + } + + var matchingFieldRefs = Object.keys(matchingFields), + results = [], + matches = Object.create(null) + + /* + * If the query is negated (contains only prohibited terms) + * we need to get _all_ fieldRefs currently existing in the + * index. This is only done when we know that the query is + * entirely prohibited terms to avoid any cost of getting all + * fieldRefs unnecessarily. + * + * Additionally, blank MatchData must be created to correctly + * populate the results. + */ + if (query.isNegated()) { + matchingFieldRefs = Object.keys(this.fieldVectors) + + for (var i = 0; i < matchingFieldRefs.length; i++) { + var matchingFieldRef = matchingFieldRefs[i] + var fieldRef = lunr.FieldRef.fromString(matchingFieldRef) + matchingFields[matchingFieldRef] = new lunr.MatchData + } + } + + for (var i = 0; i < matchingFieldRefs.length; i++) { + /* + * Currently we have document fields that match the query, but we + * need to return documents. The matchData and scores are combined + * from multiple fields belonging to the same document. + * + * Scores are calculated by field, using the query vectors created + * above, and combined into a final document score using addition. + */ + var fieldRef = lunr.FieldRef.fromString(matchingFieldRefs[i]), + docRef = fieldRef.docRef + + if (!allRequiredMatches.contains(docRef)) { + continue + } + + if (allProhibitedMatches.contains(docRef)) { + continue + } + + var fieldVector = this.fieldVectors[fieldRef], + score = queryVectors[fieldRef.fieldName].similarity(fieldVector), + docMatch + + if ((docMatch = matches[docRef]) !== undefined) { + docMatch.score += score + docMatch.matchData.combine(matchingFields[fieldRef]) + } else { + var match = { + ref: docRef, + score: score, + matchData: matchingFields[fieldRef] + } + matches[docRef] = match + results.push(match) + } + } + + /* + * Sort the results objects by score, highest first. + */ + return results.sort(function (a, b) { + return b.score - a.score + }) +} + +/** + * Prepares the index for JSON serialization. + * + * The schema for this JSON blob will be described in a + * separate JSON schema file. + * + * @returns {Object} + */ +lunr.Index.prototype.toJSON = function () { + var invertedIndex = Object.keys(this.invertedIndex) + .sort() + .map(function (term) { + return [term, this.invertedIndex[term]] + }, this) + + var fieldVectors = Object.keys(this.fieldVectors) + .map(function (ref) { + return [ref, this.fieldVectors[ref].toJSON()] + }, this) + + return { + version: lunr.version, + fields: this.fields, + fieldVectors: fieldVectors, + invertedIndex: invertedIndex, + pipeline: this.pipeline.toJSON() + } +} + +/** + * Loads a previously serialized lunr.Index + * + * @param {Object} serializedIndex - A previously serialized lunr.Index + * @returns {lunr.Index} + */ +lunr.Index.load = function (serializedIndex) { + var attrs = {}, + fieldVectors = {}, + serializedVectors = serializedIndex.fieldVectors, + invertedIndex = Object.create(null), + serializedInvertedIndex = serializedIndex.invertedIndex, + tokenSetBuilder = new lunr.TokenSet.Builder, + pipeline = lunr.Pipeline.load(serializedIndex.pipeline) + + if (serializedIndex.version != lunr.version) { + lunr.utils.warn("Version mismatch when loading serialised index. Current version of lunr '" + lunr.version + "' does not match serialized index '" + serializedIndex.version + "'") + } + + for (var i = 0; i < serializedVectors.length; i++) { + var tuple = serializedVectors[i], + ref = tuple[0], + elements = tuple[1] + + fieldVectors[ref] = new lunr.Vector(elements) + } + + for (var i = 0; i < serializedInvertedIndex.length; i++) { + var tuple = serializedInvertedIndex[i], + term = tuple[0], + posting = tuple[1] + + tokenSetBuilder.insert(term) + invertedIndex[term] = posting + } + + tokenSetBuilder.finish() + + attrs.fields = serializedIndex.fields + + attrs.fieldVectors = fieldVectors + attrs.invertedIndex = invertedIndex + attrs.tokenSet = tokenSetBuilder.root + attrs.pipeline = pipeline + + return new lunr.Index(attrs) +} +/*! + * lunr.Builder + * Copyright (C) 2020 Oliver Nightingale + */ + +/** + * lunr.Builder performs indexing on a set of documents and + * returns instances of lunr.Index ready for querying. + * + * All configuration of the index is done via the builder, the + * fields to index, the document reference, the text processing + * pipeline and document scoring parameters are all set on the + * builder before indexing. + * + * @constructor + * @property {string} _ref - Internal reference to the document reference field. + * @property {string[]} _fields - Internal reference to the document fields to index. + * @property {object} invertedIndex - The inverted index maps terms to document fields. + * @property {object} documentTermFrequencies - Keeps track of document term frequencies. + * @property {object} documentLengths - Keeps track of the length of documents added to the index. + * @property {lunr.tokenizer} tokenizer - Function for splitting strings into tokens for indexing. + * @property {lunr.Pipeline} pipeline - The pipeline performs text processing on tokens before indexing. + * @property {lunr.Pipeline} searchPipeline - A pipeline for processing search terms before querying the index. + * @property {number} documentCount - Keeps track of the total number of documents indexed. + * @property {number} _b - A parameter to control field length normalization, setting this to 0 disabled normalization, 1 fully normalizes field lengths, the default value is 0.75. + * @property {number} _k1 - A parameter to control how quickly an increase in term frequency results in term frequency saturation, the default value is 1.2. + * @property {number} termIndex - A counter incremented for each unique term, used to identify a terms position in the vector space. + * @property {array} metadataWhitelist - A list of metadata keys that have been whitelisted for entry in the index. + */ +lunr.Builder = function () { + this._ref = "id" + this._fields = Object.create(null) + this._documents = Object.create(null) + this.invertedIndex = Object.create(null) + this.fieldTermFrequencies = {} + this.fieldLengths = {} + this.tokenizer = lunr.tokenizer + this.pipeline = new lunr.Pipeline + this.searchPipeline = new lunr.Pipeline + this.documentCount = 0 + this._b = 0.75 + this._k1 = 1.2 + this.termIndex = 0 + this.metadataWhitelist = [] +} + +/** + * Sets the document field used as the document reference. Every document must have this field. + * The type of this field in the document should be a string, if it is not a string it will be + * coerced into a string by calling toString. + * + * The default ref is 'id'. + * + * The ref should _not_ be changed during indexing, it should be set before any documents are + * added to the index. Changing it during indexing can lead to inconsistent results. + * + * @param {string} ref - The name of the reference field in the document. + */ +lunr.Builder.prototype.ref = function (ref) { + this._ref = ref +} + +/** + * A function that is used to extract a field from a document. + * + * Lunr expects a field to be at the top level of a document, if however the field + * is deeply nested within a document an extractor function can be used to extract + * the right field for indexing. + * + * @callback fieldExtractor + * @param {object} doc - The document being added to the index. + * @returns {?(string|object|object[])} obj - The object that will be indexed for this field. + * @example Extracting a nested field + * function (doc) { return doc.nested.field } + */ + +/** + * Adds a field to the list of document fields that will be indexed. Every document being + * indexed should have this field. Null values for this field in indexed documents will + * not cause errors but will limit the chance of that document being retrieved by searches. + * + * All fields should be added before adding documents to the index. Adding fields after + * a document has been indexed will have no effect on already indexed documents. + * + * Fields can be boosted at build time. This allows terms within that field to have more + * importance when ranking search results. Use a field boost to specify that matches within + * one field are more important than other fields. + * + * @param {string} fieldName - The name of a field to index in all documents. + * @param {object} attributes - Optional attributes associated with this field. + * @param {number} [attributes.boost=1] - Boost applied to all terms within this field. + * @param {fieldExtractor} [attributes.extractor] - Function to extract a field from a document. + * @throws {RangeError} fieldName cannot contain unsupported characters '/' + */ +lunr.Builder.prototype.field = function (fieldName, attributes) { + if (/\//.test(fieldName)) { + throw new RangeError ("Field '" + fieldName + "' contains illegal character '/'") + } + + this._fields[fieldName] = attributes || {} +} + +/** + * A parameter to tune the amount of field length normalisation that is applied when + * calculating relevance scores. A value of 0 will completely disable any normalisation + * and a value of 1 will fully normalise field lengths. The default is 0.75. Values of b + * will be clamped to the range 0 - 1. + * + * @param {number} number - The value to set for this tuning parameter. + */ +lunr.Builder.prototype.b = function (number) { + if (number < 0) { + this._b = 0 + } else if (number > 1) { + this._b = 1 + } else { + this._b = number + } +} + +/** + * A parameter that controls the speed at which a rise in term frequency results in term + * frequency saturation. The default value is 1.2. Setting this to a higher value will give + * slower saturation levels, a lower value will result in quicker saturation. + * + * @param {number} number - The value to set for this tuning parameter. + */ +lunr.Builder.prototype.k1 = function (number) { + this._k1 = number +} + +/** + * Adds a document to the index. + * + * Before adding fields to the index the index should have been fully setup, with the document + * ref and all fields to index already having been specified. + * + * The document must have a field name as specified by the ref (by default this is 'id') and + * it should have all fields defined for indexing, though null or undefined values will not + * cause errors. + * + * Entire documents can be boosted at build time. Applying a boost to a document indicates that + * this document should rank higher in search results than other documents. + * + * @param {object} doc - The document to add to the index. + * @param {object} attributes - Optional attributes associated with this document. + * @param {number} [attributes.boost=1] - Boost applied to all terms within this document. + */ +lunr.Builder.prototype.add = function (doc, attributes) { + var docRef = doc[this._ref], + fields = Object.keys(this._fields) + + this._documents[docRef] = attributes || {} + this.documentCount += 1 + + for (var i = 0; i < fields.length; i++) { + var fieldName = fields[i], + extractor = this._fields[fieldName].extractor, + field = extractor ? extractor(doc) : doc[fieldName], + tokens = this.tokenizer(field, { + fields: [fieldName] + }), + terms = this.pipeline.run(tokens), + fieldRef = new lunr.FieldRef (docRef, fieldName), + fieldTerms = Object.create(null) + + this.fieldTermFrequencies[fieldRef] = fieldTerms + this.fieldLengths[fieldRef] = 0 + + // store the length of this field for this document + this.fieldLengths[fieldRef] += terms.length + + // calculate term frequencies for this field + for (var j = 0; j < terms.length; j++) { + var term = terms[j] + + if (fieldTerms[term] == undefined) { + fieldTerms[term] = 0 + } + + fieldTerms[term] += 1 + + // add to inverted index + // create an initial posting if one doesn't exist + if (this.invertedIndex[term] == undefined) { + var posting = Object.create(null) + posting["_index"] = this.termIndex + this.termIndex += 1 + + for (var k = 0; k < fields.length; k++) { + posting[fields[k]] = Object.create(null) + } + + this.invertedIndex[term] = posting + } + + // add an entry for this term/fieldName/docRef to the invertedIndex + if (this.invertedIndex[term][fieldName][docRef] == undefined) { + this.invertedIndex[term][fieldName][docRef] = Object.create(null) + } + + // store all whitelisted metadata about this token in the + // inverted index + for (var l = 0; l < this.metadataWhitelist.length; l++) { + var metadataKey = this.metadataWhitelist[l], + metadata = term.metadata[metadataKey] + + if (this.invertedIndex[term][fieldName][docRef][metadataKey] == undefined) { + this.invertedIndex[term][fieldName][docRef][metadataKey] = [] + } + + this.invertedIndex[term][fieldName][docRef][metadataKey].push(metadata) + } + } + + } +} + +/** + * Calculates the average document length for this index + * + * @private + */ +lunr.Builder.prototype.calculateAverageFieldLengths = function () { + + var fieldRefs = Object.keys(this.fieldLengths), + numberOfFields = fieldRefs.length, + accumulator = {}, + documentsWithField = {} + + for (var i = 0; i < numberOfFields; i++) { + var fieldRef = lunr.FieldRef.fromString(fieldRefs[i]), + field = fieldRef.fieldName + + documentsWithField[field] || (documentsWithField[field] = 0) + documentsWithField[field] += 1 + + accumulator[field] || (accumulator[field] = 0) + accumulator[field] += this.fieldLengths[fieldRef] + } + + var fields = Object.keys(this._fields) + + for (var i = 0; i < fields.length; i++) { + var fieldName = fields[i] + accumulator[fieldName] = accumulator[fieldName] / documentsWithField[fieldName] + } + + this.averageFieldLength = accumulator +} + +/** + * Builds a vector space model of every document using lunr.Vector + * + * @private + */ +lunr.Builder.prototype.createFieldVectors = function () { + var fieldVectors = {}, + fieldRefs = Object.keys(this.fieldTermFrequencies), + fieldRefsLength = fieldRefs.length, + termIdfCache = Object.create(null) + + for (var i = 0; i < fieldRefsLength; i++) { + var fieldRef = lunr.FieldRef.fromString(fieldRefs[i]), + fieldName = fieldRef.fieldName, + fieldLength = this.fieldLengths[fieldRef], + fieldVector = new lunr.Vector, + termFrequencies = this.fieldTermFrequencies[fieldRef], + terms = Object.keys(termFrequencies), + termsLength = terms.length + + + var fieldBoost = this._fields[fieldName].boost || 1, + docBoost = this._documents[fieldRef.docRef].boost || 1 + + for (var j = 0; j < termsLength; j++) { + var term = terms[j], + tf = termFrequencies[term], + termIndex = this.invertedIndex[term]._index, + idf, score, scoreWithPrecision + + if (termIdfCache[term] === undefined) { + idf = lunr.idf(this.invertedIndex[term], this.documentCount) + termIdfCache[term] = idf + } else { + idf = termIdfCache[term] + } + + score = idf * ((this._k1 + 1) * tf) / (this._k1 * (1 - this._b + this._b * (fieldLength / this.averageFieldLength[fieldName])) + tf) + score *= fieldBoost + score *= docBoost + scoreWithPrecision = Math.round(score * 1000) / 1000 + // Converts 1.23456789 to 1.234. + // Reducing the precision so that the vectors take up less + // space when serialised. Doing it now so that they behave + // the same before and after serialisation. Also, this is + // the fastest approach to reducing a number's precision in + // JavaScript. + + fieldVector.insert(termIndex, scoreWithPrecision) + } + + fieldVectors[fieldRef] = fieldVector + } + + this.fieldVectors = fieldVectors +} + +/** + * Creates a token set of all tokens in the index using lunr.TokenSet + * + * @private + */ +lunr.Builder.prototype.createTokenSet = function () { + this.tokenSet = lunr.TokenSet.fromArray( + Object.keys(this.invertedIndex).sort() + ) +} + +/** + * Builds the index, creating an instance of lunr.Index. + * + * This completes the indexing process and should only be called + * once all documents have been added to the index. + * + * @returns {lunr.Index} + */ +lunr.Builder.prototype.build = function () { + this.calculateAverageFieldLengths() + this.createFieldVectors() + this.createTokenSet() + + return new lunr.Index({ + invertedIndex: this.invertedIndex, + fieldVectors: this.fieldVectors, + tokenSet: this.tokenSet, + fields: Object.keys(this._fields), + pipeline: this.searchPipeline + }) +} + +/** + * Applies a plugin to the index builder. + * + * A plugin is a function that is called with the index builder as its context. + * Plugins can be used to customise or extend the behaviour of the index + * in some way. A plugin is just a function, that encapsulated the custom + * behaviour that should be applied when building the index. + * + * The plugin function will be called with the index builder as its argument, additional + * arguments can also be passed when calling use. The function will be called + * with the index builder as its context. + * + * @param {Function} plugin The plugin to apply. + */ +lunr.Builder.prototype.use = function (fn) { + var args = Array.prototype.slice.call(arguments, 1) + args.unshift(this) + fn.apply(this, args) +} +/** + * Contains and collects metadata about a matching document. + * A single instance of lunr.MatchData is returned as part of every + * lunr.Index~Result. + * + * @constructor + * @param {string} term - The term this match data is associated with + * @param {string} field - The field in which the term was found + * @param {object} metadata - The metadata recorded about this term in this field + * @property {object} metadata - A cloned collection of metadata associated with this document. + * @see {@link lunr.Index~Result} + */ +lunr.MatchData = function (term, field, metadata) { + var clonedMetadata = Object.create(null), + metadataKeys = Object.keys(metadata || {}) + + // Cloning the metadata to prevent the original + // being mutated during match data combination. + // Metadata is kept in an array within the inverted + // index so cloning the data can be done with + // Array#slice + for (var i = 0; i < metadataKeys.length; i++) { + var key = metadataKeys[i] + clonedMetadata[key] = metadata[key].slice() + } + + this.metadata = Object.create(null) + + if (term !== undefined) { + this.metadata[term] = Object.create(null) + this.metadata[term][field] = clonedMetadata + } +} + +/** + * An instance of lunr.MatchData will be created for every term that matches a + * document. However only one instance is required in a lunr.Index~Result. This + * method combines metadata from another instance of lunr.MatchData with this + * objects metadata. + * + * @param {lunr.MatchData} otherMatchData - Another instance of match data to merge with this one. + * @see {@link lunr.Index~Result} + */ +lunr.MatchData.prototype.combine = function (otherMatchData) { + var terms = Object.keys(otherMatchData.metadata) + + for (var i = 0; i < terms.length; i++) { + var term = terms[i], + fields = Object.keys(otherMatchData.metadata[term]) + + if (this.metadata[term] == undefined) { + this.metadata[term] = Object.create(null) + } + + for (var j = 0; j < fields.length; j++) { + var field = fields[j], + keys = Object.keys(otherMatchData.metadata[term][field]) + + if (this.metadata[term][field] == undefined) { + this.metadata[term][field] = Object.create(null) + } + + for (var k = 0; k < keys.length; k++) { + var key = keys[k] + + if (this.metadata[term][field][key] == undefined) { + this.metadata[term][field][key] = otherMatchData.metadata[term][field][key] + } else { + this.metadata[term][field][key] = this.metadata[term][field][key].concat(otherMatchData.metadata[term][field][key]) + } + + } + } + } +} + +/** + * Add metadata for a term/field pair to this instance of match data. + * + * @param {string} term - The term this match data is associated with + * @param {string} field - The field in which the term was found + * @param {object} metadata - The metadata recorded about this term in this field + */ +lunr.MatchData.prototype.add = function (term, field, metadata) { + if (!(term in this.metadata)) { + this.metadata[term] = Object.create(null) + this.metadata[term][field] = metadata + return + } + + if (!(field in this.metadata[term])) { + this.metadata[term][field] = metadata + return + } + + var metadataKeys = Object.keys(metadata) + + for (var i = 0; i < metadataKeys.length; i++) { + var key = metadataKeys[i] + + if (key in this.metadata[term][field]) { + this.metadata[term][field][key] = this.metadata[term][field][key].concat(metadata[key]) + } else { + this.metadata[term][field][key] = metadata[key] + } + } +} +/** + * A lunr.Query provides a programmatic way of defining queries to be performed + * against a {@link lunr.Index}. + * + * Prefer constructing a lunr.Query using the {@link lunr.Index#query} method + * so the query object is pre-initialized with the right index fields. + * + * @constructor + * @property {lunr.Query~Clause[]} clauses - An array of query clauses. + * @property {string[]} allFields - An array of all available fields in a lunr.Index. + */ +lunr.Query = function (allFields) { + this.clauses = [] + this.allFields = allFields +} + +/** + * Constants for indicating what kind of automatic wildcard insertion will be used when constructing a query clause. + * + * This allows wildcards to be added to the beginning and end of a term without having to manually do any string + * concatenation. + * + * The wildcard constants can be bitwise combined to select both leading and trailing wildcards. + * + * @constant + * @default + * @property {number} wildcard.NONE - The term will have no wildcards inserted, this is the default behaviour + * @property {number} wildcard.LEADING - Prepend the term with a wildcard, unless a leading wildcard already exists + * @property {number} wildcard.TRAILING - Append a wildcard to the term, unless a trailing wildcard already exists + * @see lunr.Query~Clause + * @see lunr.Query#clause + * @see lunr.Query#term + * @example query term with trailing wildcard + * query.term('foo', { wildcard: lunr.Query.wildcard.TRAILING }) + * @example query term with leading and trailing wildcard + * query.term('foo', { + * wildcard: lunr.Query.wildcard.LEADING | lunr.Query.wildcard.TRAILING + * }) + */ + +lunr.Query.wildcard = new String ("*") +lunr.Query.wildcard.NONE = 0 +lunr.Query.wildcard.LEADING = 1 +lunr.Query.wildcard.TRAILING = 2 + +/** + * Constants for indicating what kind of presence a term must have in matching documents. + * + * @constant + * @enum {number} + * @see lunr.Query~Clause + * @see lunr.Query#clause + * @see lunr.Query#term + * @example query term with required presence + * query.term('foo', { presence: lunr.Query.presence.REQUIRED }) + */ +lunr.Query.presence = { + /** + * Term's presence in a document is optional, this is the default value. + */ + OPTIONAL: 1, + + /** + * Term's presence in a document is required, documents that do not contain + * this term will not be returned. + */ + REQUIRED: 2, + + /** + * Term's presence in a document is prohibited, documents that do contain + * this term will not be returned. + */ + PROHIBITED: 3 +} + +/** + * A single clause in a {@link lunr.Query} contains a term and details on how to + * match that term against a {@link lunr.Index}. + * + * @typedef {Object} lunr.Query~Clause + * @property {string[]} fields - The fields in an index this clause should be matched against. + * @property {number} [boost=1] - Any boost that should be applied when matching this clause. + * @property {number} [editDistance] - Whether the term should have fuzzy matching applied, and how fuzzy the match should be. + * @property {boolean} [usePipeline] - Whether the term should be passed through the search pipeline. + * @property {number} [wildcard=lunr.Query.wildcard.NONE] - Whether the term should have wildcards appended or prepended. + * @property {number} [presence=lunr.Query.presence.OPTIONAL] - The terms presence in any matching documents. + */ + +/** + * Adds a {@link lunr.Query~Clause} to this query. + * + * Unless the clause contains the fields to be matched all fields will be matched. In addition + * a default boost of 1 is applied to the clause. + * + * @param {lunr.Query~Clause} clause - The clause to add to this query. + * @see lunr.Query~Clause + * @returns {lunr.Query} + */ +lunr.Query.prototype.clause = function (clause) { + if (!('fields' in clause)) { + clause.fields = this.allFields + } + + if (!('boost' in clause)) { + clause.boost = 1 + } + + if (!('usePipeline' in clause)) { + clause.usePipeline = true + } + + if (!('wildcard' in clause)) { + clause.wildcard = lunr.Query.wildcard.NONE + } + + if ((clause.wildcard & lunr.Query.wildcard.LEADING) && (clause.term.charAt(0) != lunr.Query.wildcard)) { + clause.term = "*" + clause.term + } + + if ((clause.wildcard & lunr.Query.wildcard.TRAILING) && (clause.term.slice(-1) != lunr.Query.wildcard)) { + clause.term = "" + clause.term + "*" + } + + if (!('presence' in clause)) { + clause.presence = lunr.Query.presence.OPTIONAL + } + + this.clauses.push(clause) + + return this +} + +/** + * A negated query is one in which every clause has a presence of + * prohibited. These queries require some special processing to return + * the expected results. + * + * @returns boolean + */ +lunr.Query.prototype.isNegated = function () { + for (var i = 0; i < this.clauses.length; i++) { + if (this.clauses[i].presence != lunr.Query.presence.PROHIBITED) { + return false + } + } + + return true +} + +/** + * Adds a term to the current query, under the covers this will create a {@link lunr.Query~Clause} + * to the list of clauses that make up this query. + * + * The term is used as is, i.e. no tokenization will be performed by this method. Instead conversion + * to a token or token-like string should be done before calling this method. + * + * The term will be converted to a string by calling `toString`. Multiple terms can be passed as an + * array, each term in the array will share the same options. + * + * @param {object|object[]} term - The term(s) to add to the query. + * @param {object} [options] - Any additional properties to add to the query clause. + * @returns {lunr.Query} + * @see lunr.Query#clause + * @see lunr.Query~Clause + * @example adding a single term to a query + * query.term("foo") + * @example adding a single term to a query and specifying search fields, term boost and automatic trailing wildcard + * query.term("foo", { + * fields: ["title"], + * boost: 10, + * wildcard: lunr.Query.wildcard.TRAILING + * }) + * @example using lunr.tokenizer to convert a string to tokens before using them as terms + * query.term(lunr.tokenizer("foo bar")) + */ +lunr.Query.prototype.term = function (term, options) { + if (Array.isArray(term)) { + term.forEach(function (t) { this.term(t, lunr.utils.clone(options)) }, this) + return this + } + + var clause = options || {} + clause.term = term.toString() + + this.clause(clause) + + return this +} +lunr.QueryParseError = function (message, start, end) { + this.name = "QueryParseError" + this.message = message + this.start = start + this.end = end +} + +lunr.QueryParseError.prototype = new Error +lunr.QueryLexer = function (str) { + this.lexemes = [] + this.str = str + this.length = str.length + this.pos = 0 + this.start = 0 + this.escapeCharPositions = [] +} + +lunr.QueryLexer.prototype.run = function () { + var state = lunr.QueryLexer.lexText + + while (state) { + state = state(this) + } +} + +lunr.QueryLexer.prototype.sliceString = function () { + var subSlices = [], + sliceStart = this.start, + sliceEnd = this.pos + + for (var i = 0; i < this.escapeCharPositions.length; i++) { + sliceEnd = this.escapeCharPositions[i] + subSlices.push(this.str.slice(sliceStart, sliceEnd)) + sliceStart = sliceEnd + 1 + } + + subSlices.push(this.str.slice(sliceStart, this.pos)) + this.escapeCharPositions.length = 0 + + return subSlices.join('') +} + +lunr.QueryLexer.prototype.emit = function (type) { + this.lexemes.push({ + type: type, + str: this.sliceString(), + start: this.start, + end: this.pos + }) + + this.start = this.pos +} + +lunr.QueryLexer.prototype.escapeCharacter = function () { + this.escapeCharPositions.push(this.pos - 1) + this.pos += 1 +} + +lunr.QueryLexer.prototype.next = function () { + if (this.pos >= this.length) { + return lunr.QueryLexer.EOS + } + + var char = this.str.charAt(this.pos) + this.pos += 1 + return char +} + +lunr.QueryLexer.prototype.width = function () { + return this.pos - this.start +} + +lunr.QueryLexer.prototype.ignore = function () { + if (this.start == this.pos) { + this.pos += 1 + } + + this.start = this.pos +} + +lunr.QueryLexer.prototype.backup = function () { + this.pos -= 1 +} + +lunr.QueryLexer.prototype.acceptDigitRun = function () { + var char, charCode + + do { + char = this.next() + charCode = char.charCodeAt(0) + } while (charCode > 47 && charCode < 58) + + if (char != lunr.QueryLexer.EOS) { + this.backup() + } +} + +lunr.QueryLexer.prototype.more = function () { + return this.pos < this.length +} + +lunr.QueryLexer.EOS = 'EOS' +lunr.QueryLexer.FIELD = 'FIELD' +lunr.QueryLexer.TERM = 'TERM' +lunr.QueryLexer.EDIT_DISTANCE = 'EDIT_DISTANCE' +lunr.QueryLexer.BOOST = 'BOOST' +lunr.QueryLexer.PRESENCE = 'PRESENCE' + +lunr.QueryLexer.lexField = function (lexer) { + lexer.backup() + lexer.emit(lunr.QueryLexer.FIELD) + lexer.ignore() + return lunr.QueryLexer.lexText +} + +lunr.QueryLexer.lexTerm = function (lexer) { + if (lexer.width() > 1) { + lexer.backup() + lexer.emit(lunr.QueryLexer.TERM) + } + + lexer.ignore() + + if (lexer.more()) { + return lunr.QueryLexer.lexText + } +} + +lunr.QueryLexer.lexEditDistance = function (lexer) { + lexer.ignore() + lexer.acceptDigitRun() + lexer.emit(lunr.QueryLexer.EDIT_DISTANCE) + return lunr.QueryLexer.lexText +} + +lunr.QueryLexer.lexBoost = function (lexer) { + lexer.ignore() + lexer.acceptDigitRun() + lexer.emit(lunr.QueryLexer.BOOST) + return lunr.QueryLexer.lexText +} + +lunr.QueryLexer.lexEOS = function (lexer) { + if (lexer.width() > 0) { + lexer.emit(lunr.QueryLexer.TERM) + } +} + +// This matches the separator used when tokenising fields +// within a document. These should match otherwise it is +// not possible to search for some tokens within a document. +// +// It is possible for the user to change the separator on the +// tokenizer so it _might_ clash with any other of the special +// characters already used within the search string, e.g. :. +// +// This means that it is possible to change the separator in +// such a way that makes some words unsearchable using a search +// string. +lunr.QueryLexer.termSeparator = lunr.tokenizer.separator + +lunr.QueryLexer.lexText = function (lexer) { + while (true) { + var char = lexer.next() + + if (char == lunr.QueryLexer.EOS) { + return lunr.QueryLexer.lexEOS + } + + // Escape character is '\' + if (char.charCodeAt(0) == 92) { + lexer.escapeCharacter() + continue + } + + if (char == ":") { + return lunr.QueryLexer.lexField + } + + if (char == "~") { + lexer.backup() + if (lexer.width() > 0) { + lexer.emit(lunr.QueryLexer.TERM) + } + return lunr.QueryLexer.lexEditDistance + } + + if (char == "^") { + lexer.backup() + if (lexer.width() > 0) { + lexer.emit(lunr.QueryLexer.TERM) + } + return lunr.QueryLexer.lexBoost + } + + // "+" indicates term presence is required + // checking for length to ensure that only + // leading "+" are considered + if (char == "+" && lexer.width() === 1) { + lexer.emit(lunr.QueryLexer.PRESENCE) + return lunr.QueryLexer.lexText + } + + // "-" indicates term presence is prohibited + // checking for length to ensure that only + // leading "-" are considered + if (char == "-" && lexer.width() === 1) { + lexer.emit(lunr.QueryLexer.PRESENCE) + return lunr.QueryLexer.lexText + } + + if (char.match(lunr.QueryLexer.termSeparator)) { + return lunr.QueryLexer.lexTerm + } + } +} + +lunr.QueryParser = function (str, query) { + this.lexer = new lunr.QueryLexer (str) + this.query = query + this.currentClause = {} + this.lexemeIdx = 0 +} + +lunr.QueryParser.prototype.parse = function () { + this.lexer.run() + this.lexemes = this.lexer.lexemes + + var state = lunr.QueryParser.parseClause + + while (state) { + state = state(this) + } + + return this.query +} + +lunr.QueryParser.prototype.peekLexeme = function () { + return this.lexemes[this.lexemeIdx] +} + +lunr.QueryParser.prototype.consumeLexeme = function () { + var lexeme = this.peekLexeme() + this.lexemeIdx += 1 + return lexeme +} + +lunr.QueryParser.prototype.nextClause = function () { + var completedClause = this.currentClause + this.query.clause(completedClause) + this.currentClause = {} +} + +lunr.QueryParser.parseClause = function (parser) { + var lexeme = parser.peekLexeme() + + if (lexeme == undefined) { + return + } + + switch (lexeme.type) { + case lunr.QueryLexer.PRESENCE: + return lunr.QueryParser.parsePresence + case lunr.QueryLexer.FIELD: + return lunr.QueryParser.parseField + case lunr.QueryLexer.TERM: + return lunr.QueryParser.parseTerm + default: + var errorMessage = "expected either a field or a term, found " + lexeme.type + + if (lexeme.str.length >= 1) { + errorMessage += " with value '" + lexeme.str + "'" + } + + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } +} + +lunr.QueryParser.parsePresence = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + switch (lexeme.str) { + case "-": + parser.currentClause.presence = lunr.Query.presence.PROHIBITED + break + case "+": + parser.currentClause.presence = lunr.Query.presence.REQUIRED + break + default: + var errorMessage = "unrecognised presence operator'" + lexeme.str + "'" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + var errorMessage = "expecting term or field, found nothing" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.FIELD: + return lunr.QueryParser.parseField + case lunr.QueryLexer.TERM: + return lunr.QueryParser.parseTerm + default: + var errorMessage = "expecting term or field, found '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseField = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + if (parser.query.allFields.indexOf(lexeme.str) == -1) { + var possibleFields = parser.query.allFields.map(function (f) { return "'" + f + "'" }).join(', '), + errorMessage = "unrecognised field '" + lexeme.str + "', possible fields: " + possibleFields + + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + parser.currentClause.fields = [lexeme.str] + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + var errorMessage = "expecting term, found nothing" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + return lunr.QueryParser.parseTerm + default: + var errorMessage = "expecting term, found '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseTerm = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + parser.currentClause.term = lexeme.str.toLowerCase() + + if (lexeme.str.indexOf("*") != -1) { + parser.currentClause.usePipeline = false + } + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + parser.nextClause() + return + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + parser.nextClause() + return lunr.QueryParser.parseTerm + case lunr.QueryLexer.FIELD: + parser.nextClause() + return lunr.QueryParser.parseField + case lunr.QueryLexer.EDIT_DISTANCE: + return lunr.QueryParser.parseEditDistance + case lunr.QueryLexer.BOOST: + return lunr.QueryParser.parseBoost + case lunr.QueryLexer.PRESENCE: + parser.nextClause() + return lunr.QueryParser.parsePresence + default: + var errorMessage = "Unexpected lexeme type '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseEditDistance = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + var editDistance = parseInt(lexeme.str, 10) + + if (isNaN(editDistance)) { + var errorMessage = "edit distance must be numeric" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + parser.currentClause.editDistance = editDistance + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + parser.nextClause() + return + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + parser.nextClause() + return lunr.QueryParser.parseTerm + case lunr.QueryLexer.FIELD: + parser.nextClause() + return lunr.QueryParser.parseField + case lunr.QueryLexer.EDIT_DISTANCE: + return lunr.QueryParser.parseEditDistance + case lunr.QueryLexer.BOOST: + return lunr.QueryParser.parseBoost + case lunr.QueryLexer.PRESENCE: + parser.nextClause() + return lunr.QueryParser.parsePresence + default: + var errorMessage = "Unexpected lexeme type '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + +lunr.QueryParser.parseBoost = function (parser) { + var lexeme = parser.consumeLexeme() + + if (lexeme == undefined) { + return + } + + var boost = parseInt(lexeme.str, 10) + + if (isNaN(boost)) { + var errorMessage = "boost must be numeric" + throw new lunr.QueryParseError (errorMessage, lexeme.start, lexeme.end) + } + + parser.currentClause.boost = boost + + var nextLexeme = parser.peekLexeme() + + if (nextLexeme == undefined) { + parser.nextClause() + return + } + + switch (nextLexeme.type) { + case lunr.QueryLexer.TERM: + parser.nextClause() + return lunr.QueryParser.parseTerm + case lunr.QueryLexer.FIELD: + parser.nextClause() + return lunr.QueryParser.parseField + case lunr.QueryLexer.EDIT_DISTANCE: + return lunr.QueryParser.parseEditDistance + case lunr.QueryLexer.BOOST: + return lunr.QueryParser.parseBoost + case lunr.QueryLexer.PRESENCE: + parser.nextClause() + return lunr.QueryParser.parsePresence + default: + var errorMessage = "Unexpected lexeme type '" + nextLexeme.type + "'" + throw new lunr.QueryParseError (errorMessage, nextLexeme.start, nextLexeme.end) + } +} + + /** + * export the module via AMD, CommonJS or as a browser global + * Export code from https://github.com/umdjs/umd/blob/master/returnExports.js + */ + ;(function (root, factory) { + if (typeof define === 'function' && define.amd) { + // AMD. Register as an anonymous module. + define(factory) + } else if (typeof exports === 'object') { + /** + * Node. Does not work with strict CommonJS, but + * only CommonJS-like enviroments that support module.exports, + * like Node. + */ + module.exports = factory() + } else { + // Browser globals (root is window) + root.lunr = factory() + } + }(this, function () { + /** + * Just return a value to define the module export. + * This example returns an object, but the module + * can return a function as the exported value. + */ + return lunr + })) +})(); diff --git a/search/lunr_index.js b/search/lunr_index.js new file mode 100644 index 0000000..960a75c --- /dev/null +++ b/search/lunr_index.js @@ -0,0 +1,2 @@ +const LUNR_DATA = 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Reference","p":"\n\n\nDirectories\n\n","l":"dir_84c7fb9f0dcc21548e48474f264aea02.html"},"38":{"t":"RZV Flexible Software Package Documentation: rzv Directory Reference","p":"\n","l":"dir_95eeafea5658a8126e4bc90eb700647f.html"},"39":{"t":"RZV Flexible Software Package Documentation: r_riic_master Directory Reference","p":"\n","l":"dir_9cbdcb69bcc54f3441d7a76e98f4e6ec.html"},"40":{"t":"RZV Flexible Software Package Documentation: r_intc_irq Directory Reference","p":"\n","l":"dir_9d0f4eda9809e1b4226dcabb06a7c394.html"},"41":{"t":"RZV Flexible Software Package Documentation: rm_freertos_port Directory Reference","p":"\n\n\nDirectories\n\n","l":"dir_9d98a930a89b8b1d2a23c7a61715f686.html"},"42":{"t":"RZV Flexible Software Package Documentation: Device Directory Reference","p":"\n","l":"dir_a08e3dca3559ee45a5c2783e6ada2cb6.html"},"43":{"t":"RZV Flexible Software Package Documentation: rm_zmod4xxx Directory Reference","p":"\n\n\nFiles\nfile  zmod4xxx_types.h\n zmod4xxx types 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Documentation: instances Directory Reference","p":"\n","l":"dir_e0a869f431b6ce5473c65d6d660a25bf.html"},"58":{"t":"RZV Flexible Software Package Documentation: r_mhu_ns_swint_set Directory Reference","p":"\n","l":"dir_e5ca85ea1ccd07fa77fb7d7e0afba852.html"},"59":{"t":"RZV Flexible Software Package Documentation: r_wdt Directory Reference","p":"\n","l":"dir_e78364d727f48d053dd661e77157bdd2.html"},"60":{"t":"RZV Flexible Software Package Documentation: Source Directory Reference","p":"\n\n\nDirectories\n\n","l":"dir_e97f6630d2e378a043db5877972b5388.html"},"61":{"t":"RZV Flexible Software Package Documentation: r_gtm Directory Reference","p":"\n","l":"dir_eaee7091e5d22fe78f0323925da6e7d1.html"},"62":{"t":"RZV Flexible Software Package Documentation: src Directory Reference","p":"\n\n\nDirectories\ndirectory  bsp\n \ndirectory  rm_freertos_port\n \n\n","l":"dir_eb65a6deadbac0d81f62867562dbf7fc.html"},"63":{"t":"RZV Flexible Software Package Documentation: RENESAS Directory Reference","p":"\n","l":"dir_ee0097b7fe886da56342dc3e35d00ea9.html"},"64":{"t":"RZV Flexible Software Package Documentation: r_intc_nmi Directory Reference","p":"\n","l":"dir_ef127bf948e71f51410c3749fe1f2ea1.html"},"65":{"t":"RZV Flexible Software Package Documentation: r_elc Directory Reference","p":"\n","l":"dir_f2f0e3675ce1e9a82b93eda44a42fb28.html"},"66":{"t":"RZV Flexible Software Package Documentation: inc Directory Reference","p":"\n\n\nDirectories\n\n","l":"dir_f5e136908169532a193d9a3b7213f49a.html"},"67":{"t":"RZV Flexible Software Package Documentation: ADC Interface","p":"\nDetailed Description\nInterface for A/D Converters. \n\nSummary\nThe ADC interface provides standard ADC functionality including one-shot mode (single scan), continuous scan and group scan. It also allows configuration of hardware and software triggers for starting scans. After ...","l":"group___a_d_c___a_p_i.html"},"68":{"t":"RZV Flexible Software Package Documentation: Analog to Digital Converter (r_adc_c)","p":"\n\n\nFunctions\nfsp_err_t R_ADC_C_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)\n \nfsp_err_t R_ADC_C_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_channel_cfg)\n \nfsp_err_t R_ADC_C_InfoGet (adc_ctrl_t *p_ctrl, adc_info_t *p_adc_info)\n \nfsp_err_t R_ADC_C_ScanStart (ad ...","l":"group___a_d_c___c.html"},"69":{"t":"RZV Flexible Software Package Documentation: Analog to Digital Converter (r_adc_e)","p":"\n\n\nFunctions\nfsp_err_t R_ADC_E_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)\n \nfsp_err_t R_ADC_E_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_channel_cfg)\n \nfsp_err_t R_ADC_E_InfoGet (adc_ctrl_t *p_ctrl, adc_info_t *p_adc_info)\n \nfsp_err_t R_ADC_E_ScanStart (ad ...","l":"group___a_d_c___e.html"},"70":{"t":"RZV Flexible Software Package Documentation: BSP I/O access","p":"\n\n\nFunctions\n__STATIC_INLINE uint32_t R_BSP_PinRead (bsp_io_port_pin_t pin)\n \n__STATIC_INLINE void R_BSP_PinWrite (bsp_io_port_pin_t pin, bsp_io_level_t level)\n \n__STATIC_INLINE void R_BSP_PinAccessEnable (void)\n \n__STATIC_INLINE void R_BSP_PinAccessDisable (void)\n \n__STATIC ...","l":"group___b_s_p___i_o.html"},"71":{"t":"RZV Flexible Software Package Documentation: MPU Board Support Package","p":"\n\n\nFunctions\nfsp_err_t R_FSP_VersionGet (fsp_pack_version_t *const p_version)\n \nvoid Reset_Handler_NS (void)\n \nvoid Default_Handler (void)\n \nvoid NMI_Handler_NS (void)\n \nvoid Reset_Handler_S (void)\n \nvoid Default_Handler_S (void)\n \nvoid NMI_Handler_S (void)\n \nvoid SecureFaul ...","l":"group___b_s_p___m_c_u.html"},"72":{"t":"RZV Flexible Software Package Documentation: RZV2H","p":"\nDetailed Description\nBuild Time Configurations for rzv2h_fsp\nThe following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:\n\n\nConfigurationOptionsDefaultDescription \n\n \n\n\nEnumerations\nenum  elc_event_t \n \n\nEnumeration Type Documentation\n\n◆ elc_even ...","l":"group___b_s_p___m_c_u___r_z_v2_h.html"},"73":{"t":"RZV Flexible Software Package Documentation: RZV2L","p":"\nDetailed Description\nBuild Time Configurations for rzv2l_fsp\nThe following build time configurations are defined in fsp_cfg/bsp/bsp_mcu_family_cfg.h:\n\n\nConfigurationOptionsDefaultDescription \n\n \n","l":"group___b_s_p___m_c_u___r_z_v2_l.html"},"74":{"t":"RZV Flexible Software Package Documentation: CAN Interface","p":"\nDetailed Description\nInterface for CAN peripheral. \n\nSummary\nThe CAN interface provides common APIs for CAN HAL drivers. CAN interface supports following features.\nFull-duplex CAN communication\nGeneric CAN parameter setting\nInterrupt driven transmit/receive processing\nCallb ...","l":"group___c_a_n___a_p_i.html"},"75":{"t":"RZV Flexible Software Package Documentation: Controller Area Network - Flexible Data (r_canfd)","p":"\n\n\nFunctions\nfsp_err_t R_CANFD_Open (can_ctrl_t *const p_api_ctrl, can_cfg_t const *const p_cfg)\n \nfsp_err_t R_CANFD_Close (can_ctrl_t *const p_api_ctrl)\n \nfsp_err_t R_CANFD_Write (can_ctrl_t *const p_api_ctrl, uint32_t const buffer, can_frame_t *const p_frame)\n \nfsp_err_t R ...","l":"group___c_a_n_f_d.html"},"76":{"t":"RZV Flexible Software Package Documentation: Compare Match Timer W (r_cmtw)","p":"\n\n\nFunctions\nfsp_err_t R_CMTW_Close (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_CMTW_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)\n \nfsp_err_t R_CMTW_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)\n \nfsp_e ...","l":"group___c_m_t_w.html"},"77":{"t":"RZV Flexible Software Package Documentation: CRC (r_crc)","p":"\n\n\nFunctions\nfsp_err_t R_CRC_Open (crc_ctrl_t *const p_ctrl, crc_cfg_t const *const p_cfg)\n \nfsp_err_t R_CRC_Close (crc_ctrl_t *const p_ctrl)\n \nfsp_err_t R_CRC_Calculate (crc_ctrl_t *const p_ctrl, crc_input_t *const p_crc_input, uint32_t *calculatedValue)\n \nfsp_err_t R_CRC_C ...","l":"group___c_r_c.html"},"78":{"t":"RZV Flexible Software Package Documentation: CRC Interface","p":"\nDetailed Description\nInterface for cyclic redundancy checking. \n\nSummary\nThe CRC (Cyclic Redundancy Check) calculator generates CRC codes using five different polynomials including 8 bit, 16 bit, and 32 bit variations. Calculation can be performed by sending data to the blo ...","l":"group___c_r_c___a_p_i.html"},"79":{"t":"RZV Flexible Software Package Documentation: Direct Memory Access Controller (r_dmac_b)","p":"\n\n\nFunctions\nfsp_err_t R_DMAC_B_Open (transfer_ctrl_t *const p_api_ctrl, transfer_cfg_t const *const p_cfg)\n \nfsp_err_t R_DMAC_B_Reconfigure (transfer_ctrl_t *const p_api_ctrl, transfer_info_t *p_info)\n \nfsp_err_t R_DMAC_B_Reset (transfer_ctrl_t *const p_api_ctrl, void const ...","l":"group___d_m_a_c___b.html"},"80":{"t":"RZV Flexible Software Package Documentation: Event Link Controller (r_elc)","p":"\n\n\nFunctions\nfsp_err_t R_ELC_Open (elc_ctrl_t *const p_ctrl, elc_cfg_t const *const p_cfg)\n \nfsp_err_t R_ELC_Close (elc_ctrl_t *const p_ctrl)\n \nfsp_err_t R_ELC_SoftwareEventGenerate (elc_ctrl_t *const p_ctrl, elc_software_event_t event_number)\n \nfsp_err_t R_ELC_LinkSet (elc_ ...","l":"group___e_l_c.html"},"81":{"t":"RZV Flexible Software Package Documentation: ELC Interface","p":"\nDetailed Description\nInterface for the Event Link Controller. \n\n\nData Structures\nstruct  elc_cfg_t\n \nstruct  elc_api_t\n \nstruct  elc_instance_t\n \n\n\nTypedefs\ntypedef void elc_ctrl_t\n \n\n\nEnumerations\nenum  elc_peripheral_t \n \nenum  elc_software_event_t \n \n\nData Structure Docu ...","l":"group___e_l_c___a_p_i.html"},"82":{"t":"RZV Flexible Software Package Documentation: External IRQ Interface","p":"\nDetailed Description\nInterface for detecting external interrupts. \n\nSummary\nThe External IRQ Interface is for configuring interrupts to fire when a trigger condition is detected on an external IRQ pin.\nThe External IRQ Interface can be implemented by:\nExternal IRQ (r_intc_n ...","l":"group___e_x_t_e_r_n_a_l___i_r_q___a_p_i.html"},"83":{"t":"RZV Flexible Software Package Documentation: General PWM Timer (r_gpt)","p":"\n\n\nFunctions\nfsp_err_t R_GPT_Open (timer_ctrl_t *const p_ctrl, timer_cfg_t const *const p_cfg)\n \nfsp_err_t R_GPT_Stop (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_GPT_Start (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_GPT_Reset (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_GPT_Enab ...","l":"group___g_p_t.html"},"84":{"t":"RZV Flexible Software Package Documentation: General Timer (r_gtm)","p":"\n\n\nFunctions\nfsp_err_t R_GTM_Close (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_GTM_PeriodSet (timer_ctrl_t *const p_ctrl, uint32_t const period_counts)\n \nfsp_err_t R_GTM_DutyCycleSet (timer_ctrl_t *const p_ctrl, uint32_t const duty_cycle_counts, uint32_t const pin)\n \nfsp_err_ ...","l":"group___g_t_m.html"},"85":{"t":"RZV Flexible Software Package Documentation: I2C Master Interface","p":"\nDetailed Description\nInterface for I2C master communication. \n\nSummary\nThe I2C master interface provides a common API for I2C HAL drivers. The I2C master interface supports:\nInterrupt driven transmit/receive processing\nCallback function support which can return an event cod ...","l":"group___i2_c___m_a_s_t_e_r___a_p_i.html"},"86":{"t":"RZV Flexible Software Package Documentation: I2C Slave Interface","p":"\nDetailed Description\nInterface for I2C slave communication. \n\nSummary\nThe I2C slave interface provides a common API for I2C HAL drivers. The I2C slave interface supports:\nInterrupt driven transmit/receive processing\nCallback function support which returns a event codes\n\nImp ...","l":"group___i2_c___s_l_a_v_e___a_p_i.html"},"87":{"t":"RZV Flexible Software Package Documentation: I3C Interface","p":"\nDetailed Description\nInterface for I3C. \n\nSummary\nThe I3C interface provides APIs and definitions for I3C communication.\n\nKnown Implementations\nI3C (r_i3c_b) \n\n\nData Structures\nstruct  i3c_device_status_t\n \nstruct  i3c_slave_info_t\n \nstruct  i3c_device_table_cfg_t\n \nstruct ...","l":"group___i3_c___a_p_i.html"},"88":{"t":"RZV Flexible Software Package Documentation: I3C (r_i3c_b)","p":"\n\n\nFunctions\nfsp_err_t R_I3C_B_Open (i3c_ctrl_t *const p_api_ctrl, i3c_cfg_t const *const p_cfg)\n \nfsp_err_t R_I3C_B_Enable (i3c_ctrl_t *const p_api_ctrl)\n \nfsp_err_t R_I3C_B_DeviceCfgSet (i3c_ctrl_t *const p_api_ctrl, i3c_device_cfg_t const *const p_device_cfg)\n \nfsp_err_t  ...","l":"group___i3_c___b.html"},"89":{"t":"RZV Flexible Software Package Documentation: External IRQ (r_intc_irq)","p":"\n\n\nFunctions\nfsp_err_t R_INTC_IRQ_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl, external_irq_cfg_t const *const p_cfg)\n \nfsp_err_t R_INTC_IRQ_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)\n \nfsp_err_t R_INTC_IRQ_ExternalIrqDisable (external_irq_ctrl_t *c ...","l":"group___i_n_t_c___i_r_q.html"},"90":{"t":"RZV Flexible Software Package Documentation: External IRQ (r_intc_nmi)","p":"\n\n\nFunctions\nfsp_err_t R_INTC_NMI_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl, external_irq_cfg_t const *const p_cfg)\n \nfsp_err_t R_INTC_NMI_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)\n \nfsp_err_t R_INTC_NMI_ExternalIrqDisable (external_irq_ctrl_t *c ...","l":"group___i_n_t_c___n_m_i.html"},"91":{"t":"RZV Flexible Software Package Documentation: External IRQ (r_intc_tint)","p":"\n\n\nFunctions\nfsp_err_t R_INTC_TINT_ExternalIrqOpen (external_irq_ctrl_t *const p_api_ctrl, external_irq_cfg_t const *const p_cfg)\n \nfsp_err_t R_INTC_TINT_ExternalIrqEnable (external_irq_ctrl_t *const p_api_ctrl)\n \nfsp_err_t R_INTC_TINT_ExternalIrqDisable (external_irq_ctrl_t ...","l":"group___i_n_t_c___t_i_n_t.html"},"92":{"t":"RZV Flexible Software Package Documentation: I/O Ports (r_ioport)","p":"\n\n\nFunctions\nfsp_err_t R_IOPORT_Open (ioport_ctrl_t *const p_ctrl, const ioport_cfg_t *p_cfg)\n \nfsp_err_t R_IOPORT_Close (ioport_ctrl_t *const p_ctrl)\n \nfsp_err_t R_IOPORT_PinsCfg (ioport_ctrl_t *const p_ctrl, const ioport_cfg_t *p_cfg)\n \nfsp_err_t R_IOPORT_PinCfg (ioport_ct ...","l":"group___i_o_p_o_r_t.html"},"93":{"t":"RZV Flexible Software Package Documentation: I/O Port Interface","p":"\nDetailed Description\nInterface for accessing I/O ports and configuring I/O functionality. \n\nSummary\nThe IOPort shared interface provides the ability to access the IOPorts of a device at both bit and port level. Port and pin direction can be changed.\nIOPORT Interface descrip ...","l":"group___i_o_p_o_r_t___a_p_i.html"},"94":{"t":"RZV Flexible Software Package Documentation: MHU Interface (for secure and non secure channels)","p":"\nDetailed Description\nInterface for Message Handling Unit. \n\nSummary\nThe Message Handling Unit interface provides a common API for MHU HAL drivers. The Message Handling Unit interface supports:\nMessage communication between Cortex-A55 and Cortex-M33.\n32-bit data can be commu ...","l":"group___m_h_u___a_p_i.html"},"95":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for non secure channels (r_mhu_b_ns)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_B_NS_Open (mhu_ctrl_t *p_ctrl, mhu_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_B_NS_MsgSend (mhu_ctrl_t *const p_ctrl, uint32_t const msg)\n \nfsp_err_t R_MHU_B_NS_Close (mhu_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_B_NS_CallbackSet (mhu_ctrl_t *con ...","l":"group___m_h_u___b___n_s.html"},"96":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt receive (r_mhu_b_ns_swint_get)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_B_NS_SWINT_GET_Open (mhu_ns_swint_get_ctrl_t *p_ctrl, mhu_ns_swint_get_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_B_NS_SWINT_GET_Close (mhu_ns_swint_get_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_B_NS_SWINT_GET_CallbackSet (mhu_ns_swint_get_ctrl_t ...","l":"group___m_h_u___b___n_s___s_w_i_n_t___g_e_t.html"},"97":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt generation (r_mhu_b_ns_swint_set)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_B_NS_SWINT_SET_Open (mhu_ns_swint_set_ctrl_t *p_ctrl, mhu_ns_swint_set_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_B_NS_SWINT_SET_InterruptSet (mhu_ns_swint_set_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_B_NS_SWINT_SET_Close (mhu_ns_swint_set_ctrl_t ...","l":"group___m_h_u___b___n_s___s_w_i_n_t___s_e_t.html"},"98":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for secure channels (r_mhu_b_s)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_B_S_Open (mhu_ctrl_t *p_ctrl, mhu_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_B_S_MsgSend (mhu_ctrl_t *const p_ctrl, uint32_t const msg)\n \nfsp_err_t R_MHU_B_S_Close (mhu_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_B_S_CallbackSet (mhu_ctrl_t *const p ...","l":"group___m_h_u___b___s.html"},"99":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for non secure channels (r_mhu_ns)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_NS_Open (mhu_ctrl_t *p_ctrl, mhu_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_NS_MsgSend (mhu_ctrl_t *const p_ctrl, uint32_t const msg)\n \nfsp_err_t R_MHU_NS_Close (mhu_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_NS_CallbackSet (mhu_ctrl_t *const p_api ...","l":"group___m_h_u___n_s.html"},"100":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt receive (r_mhu_ns_swint_get)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_NS_SWINT_GET_Open (mhu_ns_swint_get_ctrl_t *p_ctrl, mhu_ns_swint_get_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_NS_SWINT_GET_Close (mhu_ns_swint_get_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_NS_SWINT_GET_CallbackSet (mhu_ns_swint_get_ctrl_t *const ...","l":"group___m_h_u___n_s___s_w_i_n_t___g_e_t.html"},"101":{"t":"RZV Flexible Software Package Documentation: MHU Interface (Software Interrupt Get)","p":"\nDetailed Description\nInterface for Message Handling Unit (Software Interrupt Get) \n\nSummary\nThe Message Handling Unit (Software Interrupt Get) interface provides a common API for MHU HAL drivers. The Message Handling Unit (Software Interrupt Get) interface supports:\nReceive ...","l":"group___m_h_u___n_s___s_w_i_n_t___g_e_t___a_p_i.html"},"102":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for non-secure software interrupt generation (r_mhu_ns_swint_set)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_NS_SWINT_SET_Open (mhu_ns_swint_set_ctrl_t *p_ctrl, mhu_ns_swint_set_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_NS_SWINT_SET_InterruptSet (mhu_ns_swint_set_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_NS_SWINT_SET_Close (mhu_ns_swint_set_ctrl_t *cons ...","l":"group___m_h_u___n_s___s_w_i_n_t___s_e_t.html"},"103":{"t":"RZV Flexible Software Package Documentation: MHU Interface (Software Interrupt Set)","p":"\nDetailed Description\nInterface for Message Handling Unit (Software Interrupt Set) \n\nSummary\nThe Message Handling Unit (Software Interrupt Set) interface provides a common API for MHU HAL drivers. The Message Handling Unit (Software Interrupt Set) interface supports:\nGenerat ...","l":"group___m_h_u___n_s___s_w_i_n_t___s_e_t___a_p_i.html"},"104":{"t":"RZV Flexible Software Package Documentation: Message Handling Unit for secure channels (r_mhu_s)","p":"\n\n\nFunctions\nfsp_err_t R_MHU_S_Open (mhu_ctrl_t *p_ctrl, mhu_cfg_t const *const p_cfg)\n \nfsp_err_t R_MHU_S_MsgSend (mhu_ctrl_t *const p_ctrl, uint32_t const msg)\n \nfsp_err_t R_MHU_S_Close (mhu_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MHU_S_CallbackSet (mhu_ctrl_t *const p_api_ctr ...","l":"group___m_h_u___s.html"},"105":{"t":"RZV Flexible Software Package Documentation: Multi-Function Timer Pulse Unit 3 (r_mtu3)","p":"\n\n\nFunctions\nfsp_err_t R_MTU3_Open (timer_ctrl_t *const p_ctrl, timer_cfg_t const *const p_cfg)\n \nfsp_err_t R_MTU3_Stop (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MTU3_Start (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MTU3_Reset (timer_ctrl_t *const p_ctrl)\n \nfsp_err_t R_MTU3 ...","l":"group___m_t_u3.html"},"106":{"t":"RZV Flexible Software Package Documentation: PDM Interface (r_pdm)","p":"\n\n\nFunctions\nfsp_err_t R_PDM_Open (pdm_ctrl_t *const p_ctrl, pdm_cfg_t const *const p_cfg)\n \nfsp_err_t R_PDM_Start (pdm_ctrl_t *const p_ctrl, void *const p_buffer, size_t const buffer_size, uint32_t const number_of_data_to_callback)\n \nfsp_err_t R_PDM_Stop (pdm_ctrl_t *const ...","l":"group___p_d_m.html"},"107":{"t":"RZV Flexible Software Package Documentation: PDM Interface","p":"\nDetailed Description\nInterface for PDM audio communication. \n\nSummary\nThe pulse-density modulation(PDM) interface provides APIs and definitions for PDM audio communication.\n\nKnown Implementations\nPDM Interface (r_pdm) \n\n\nData Structures\nstruct  pdm_callback_args_t\n \nstruct ...","l":"group___p_d_m___a_p_i.html"},"108":{"t":"RZV Flexible Software Package Documentation: Port Output Enable for GPT (r_poeg)","p":"\n\n\nFunctions\nfsp_err_t R_POEG_Open (poeg_ctrl_t *const p_ctrl, poeg_cfg_t const *const p_cfg)\n \nfsp_err_t R_POEG_StatusGet (poeg_ctrl_t *const p_ctrl, poeg_status_t *const p_status)\n \nfsp_err_t R_POEG_CallbackSet (poeg_ctrl_t *const p_ctrl, void(*p_callback)(poeg_callback_ar ...","l":"group___p_o_e_g.html"},"109":{"t":"RZV Flexible Software Package Documentation: POEG Interface","p":"\nDetailed Description\nInterface for the Port Output Enable for GPT. \nDefines the API and data structures for the Port Output Enable for GPT (POEG) interface.\n\nSummary\nThe POEG disables GPT output pins based on configurable events.\nImplemented by: Port Output Enable for GPT ( ...","l":"group___p_o_e_g___a_p_i.html"},"110":{"t":"RZV Flexible Software Package Documentation: Analog","p":"\nDetailed Description\nAnalog Modules. \n\n\nModules\n Analog to Digital Converter (r_adc_c)\n Driver for the ADC peripheral on RZ MPUs. This module implements the ADC Interface. \n \n Analog to Digital Converter (r_adc_e)\n Driver for the and ADC12 peripherals on RZ microprocessor. ...","l":"group___r_e_n_e_s_a_s___a_n_a_l_o_g___m_o_d_u_l_e_s.html"},"111":{"t":"RZV Flexible Software Package Documentation: BSP","p":"\nDetailed Description\nCommon code shared by FSP drivers. \n\n\nModules\n Common Error Codes\n \n MPU Board Support Package\n The BSP is responsible for getting the MCU from reset to the user's application. Before reaching the user's application, the BSP sets up the stacks, heap, cl ...","l":"group___r_e_n_e_s_a_s___c_o_m_m_o_n.html"},"112":{"t":"RZV Flexible Software Package Documentation: Connectivity","p":"\nDetailed Description\nConnectivity Modules. \n\n\nModules\n Controller Area Network - Flexible Data (r_canfd)\n Driver for the CANFD peripheral on RZ MPUs. This module implements the CAN Interface. \n \n I3C (r_i3c_b)\n Driver for the I3C peripheral on RZ MPU. This module implements ...","l":"group___r_e_n_e_s_a_s___c_o_n_n_e_c_t_i_v_i_t_y___m_o_d_u_l_e_s.html"},"113":{"t":"RZV Flexible Software Package Documentation: Common Error Codes","p":"\nDetailed Description\nAll FSP modules share these common error codes. \n\n\nData Structures\nunion  fsp_version_t\n \nstruct  fsp_version_t.__unnamed__\n \n\n\nMacros\n#define FSP_PARAMETER_NOT_USED(p)\n \n#define FSP_CPP_HEADER\n \n#define FSP_HEADER\n \n#define FSP_SECURE_ARGUMENT\n \n\n\nEnum ...","l":"group___r_e_n_e_s_a_s___e_r_r_o_r___c_o_d_e_s.html"},"114":{"t":"RZV Flexible Software Package Documentation: Input","p":"\nDetailed Description\nInput Modules. \n\n\nModules\n External IRQ (r_intc_irq)\n Driver for the INTC_IRQ peripheral on RZ MPUs. This module implements the External IRQ Interface. \n \n External IRQ (r_intc_nmi)\n Driver for the INTC_NMI peripheral on RZ MPUs. This module implements ...","l":"group___r_e_n_e_s_a_s___i_n_p_u_t___m_o_d_u_l_e_s.html"},"115":{"t":"RZV Flexible Software Package Documentation: Interfaces","p":"\nDetailed Description\nThe FSP interfaces provide APIs for common functionality. They can be implemented by one or more modules. Modules can use other modules as dependencies using this interface layer. \n\n\nModules\n ADC Interface\n Interface for A/D Converters. \n \n CAN Interfac ...","l":"group___r_e_n_e_s_a_s___i_n_t_e_r_f_a_c_e_s.html"},"116":{"t":"RZV Flexible Software Package Documentation: Modules","p":"\nDetailed Description\nModules are the smallest unit of software available in the FSP. Each module implements one interface. \nFor more information on FSP Modules and Interfaces review fsp-modules, fsp-stacks and fsp-interfaces in the FSP Architecutre section of this manual.\nN ...","l":"group___r_e_n_e_s_a_s___m_o_d_u_l_e_s.html"},"117":{"t":"RZV Flexible Software Package Documentation: Monitoring","p":"\nDetailed Description\nMonitoring Modules. \n\n\nModules\n CRC (r_crc)\n Driver for the CRC peripheral on RZ MPUs. This module implements the CRC Interface. \n \n Watchdog (r_wdt)\n Driver for the WDT peripheral on RZ MPUs. This module implements the WDT Interface. \n \n\n","l":"group___r_e_n_e_s_a_s___m_o_n_i_t_o_r_i_n_g___m_o_d_u_l_e_s.html"},"118":{"t":"RZV Flexible Software Package Documentation: RTOS","p":"\nDetailed Description\nRTOS Modules. \n\n\nModules\n FreeRTOS Port (rm_freertos_port)\n FreeRTOS port for RZ MPUs. \n \n\n","l":"group___r_e_n_e_s_a_s___r_t_o_s___m_o_d_u_l_e_s.html"},"119":{"t":"RZV Flexible Software Package Documentation: Sensor","p":"\nDetailed Description\nSensor Modules. \n\n\nModules\n HS300X Temperature/Humidity Sensor (rm_hs300x)\n Middleware to implement the HS300X sensor interface. This module implements the HS300X Middleware Interface. \n \n HS400X Temperature/Humidity Sensor (rm_hs400x)\n Middleware to im ...","l":"group___r_e_n_e_s_a_s___s_e_n_s_o_r___m_o_d_u_l_e_s.html"},"120":{"t":"RZV Flexible Software Package Documentation: Storage","p":"\nDetailed Description\nStorage Modules. \n\n\nModules\n Expanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi)\n Driver for the xSPI peripheral on RZ microprocessor. This module implements the SPI Flash Interface. \n \n\n","l":"group___r_e_n_e_s_a_s___s_t_o_r_a_g_e___m_o_d_u_l_e_s.html"},"121":{"t":"RZV Flexible Software Package Documentation: System","p":"\nDetailed Description\nSystem Modules. \n\n\nModules\n Event Link Controller (r_elc)\n Driver for the ELC peripheral on RZ microprocessor. This module implements the ELC Interface. \n \n I/O Ports (r_ioport)\n Driver for the I/O Ports peripheral on RZ MPUs. This module implements the ...","l":"group___r_e_n_e_s_a_s___s_y_s_t_e_m___m_o_d_u_l_e_s.html"},"122":{"t":"RZV Flexible Software Package Documentation: Timers","p":"\nDetailed Description\nTimers Modules. \n\n\nModules\n Compare Match Timer W (r_cmtw)\n Driver for the CMTW peripheral on RZ MPUs. This module implements the Timer Interface. \n \n General PWM Timer (r_gpt)\n Driver for the GPT peripheral on RZ MPUs. This module implements the Timer ...","l":"group___r_e_n_e_s_a_s___t_i_m_e_r_s___m_o_d_u_l_e_s.html"},"123":{"t":"RZV Flexible Software Package Documentation: Transfer","p":"\nDetailed Description\nTransfer Modules. \n\n\nModules\n Direct Memory Access Controller (r_dmac_b)\n Driver for the DMAC peripheral on RZ MPUs. This module implements the Transfer Interface. \n \n\n","l":"group___r_e_n_e_s_a_s___t_r_a_n_s_f_e_r___m_o_d_u_l_e_s.html"},"124":{"t":"RZV Flexible Software Package Documentation: I2C Master on RIIC (r_riic_master)","p":"\n\n\nFunctions\nfsp_err_t R_RIIC_MASTER_Open (i2c_master_ctrl_t *const p_api_ctrl, i2c_master_cfg_t const *const p_cfg)\n \nfsp_err_t R_RIIC_MASTER_Read (i2c_master_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes, bool const restart)\n \nfsp_err_t R_RIIC_MASTE ...","l":"group___r_i_i_c___m_a_s_t_e_r.html"},"125":{"t":"RZV Flexible Software Package Documentation: I2C Slave (r_riic_slave)","p":"\n\n\nFunctions\nfsp_err_t R_RIIC_SLAVE_Open (i2c_slave_ctrl_t *const p_api_ctrl, i2c_slave_cfg_t const *const p_cfg)\n \nfsp_err_t R_RIIC_SLAVE_Read (i2c_slave_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes)\n \nfsp_err_t R_RIIC_SLAVE_Write (i2c_slave_ctrl_t ...","l":"group___r_i_i_c___s_l_a_v_e.html"},"126":{"t":"RZV Flexible Software Package Documentation: Communicatons Middleware Interface","p":"\nDetailed Description\nInterface for Communications Middleware functions. \n\nSummary\nThe Communications interface provides multiple communications functionality.\nThe Communications interface can be implemented by:\nI2C Communication Device (rm_comms_i2c) \n\n\n\nData Structures\nstr ...","l":"group___r_m___c_o_m_m_s___a_p_i.html"},"127":{"t":"RZV Flexible Software Package Documentation: I2C Communication Device (rm_comms_i2c)","p":"\n\n\nFunctions\nfsp_err_t RM_COMMS_I2C_Open (rm_comms_ctrl_t *const p_api_ctrl, rm_comms_cfg_t const *const p_cfg)\n Opens and configures the Communications Middle module. Implements rm_comms_api_t::open. More...\n \nfsp_err_t RM_COMMS_I2C_Close (rm_comms_ctrl_t *const p_api_ctrl ...","l":"group___r_m___c_o_m_m_s___i2_c.html"},"128":{"t":"RZV Flexible Software Package Documentation: FreeRTOS Port (rm_freertos_port)","p":"\nFreeRTOS port for RZ MPUs. \n\nOverview\nNoteThe FreeRTOS Port does not provide any interfaces to the user. Consult the FreeRTOS documentation at https://www.freertos.org/Documentation for further information.\n\nThere are no usage notes and examples in this documentation.\n\nWhen ...","l":"group___r_m___f_r_e_e_r_t_o_s___p_o_r_t.html"},"129":{"t":"RZV Flexible Software Package Documentation: HS300X Temperature/Humidity Sensor (rm_hs300x)","p":"\n\n\nFunctions\nfsp_err_t RM_HS300X_Open (rm_hs300x_ctrl_t *const p_api_ctrl, rm_hs300x_cfg_t const *const p_cfg)\n Opens and configures the HS300X Middle module. Implements rm_hs300x_api_t::open. More...\n \nfsp_err_t RM_HS300X_Close (rm_hs300x_ctrl_t *const p_api_ctrl)\n Disable ...","l":"group___r_m___h_s300_x.html"},"130":{"t":"RZV Flexible Software Package Documentation: HS300X Middleware Interface","p":"\nDetailed Description\nInterface for HS300X Middleware functions. \n\nSummary\nThe HS300X interface provides HS300X functionality.\nThe HS300X interface can be implemented by:\nHS300X Temperature/Humidity Sensor (rm_hs300x) \n\n\n\nData Structures\nstruct  rm_hs300x_callback_args_t\n \ns ...","l":"group___r_m___h_s300_x___a_p_i.html"},"131":{"t":"RZV Flexible Software Package Documentation: HS400X Temperature/Humidity Sensor (rm_hs400x)","p":"\n\n\nFunctions\nfsp_err_t RM_HS400X_Open (rm_hs400x_ctrl_t *const p_api_ctrl, rm_hs400x_cfg_t const *const p_cfg)\n Opens and configures the HS400X middleware module. Implements rm_hs400x_api_t::open. More...\n \nfsp_err_t RM_HS400X_Close (rm_hs400x_ctrl_t *const p_api_ctrl)\n Dis ...","l":"group___r_m___h_s400_x.html"},"132":{"t":"RZV Flexible Software Package Documentation: HS400X Middleware Interface","p":"\nDetailed Description\nInterface for HS400X Middleware functions. \n\nSummary\nThe HS400X interface provides HS400X functionality.\nThe HS400X interface can be implemented by:\nHS400X Temperature/Humidity Sensor (rm_hs400x) \n\n\n\nData Structures\nstruct  rm_hs400x_callback_args_t\n \ns ...","l":"group___r_m___h_s400_x___a_p_i.html"},"133":{"t":"RZV Flexible Software Package Documentation: ZMOD4XXX Gas Sensor (rm_zmod4xxx)","p":"\n\n\nFunctions\nfsp_err_t RM_ZMOD4XXX_Open (rm_zmod4xxx_ctrl_t *const p_api_ctrl, rm_zmod4xxx_cfg_t const *const p_cfg)\n This function should be called when start a measurement and when measurement data is stale data. Sends the slave address to the zmod4xxx and start a measurem ...","l":"group___r_m___z_m_o_d4_x_x_x.html"},"134":{"t":"RZV Flexible Software Package Documentation: ZMOD4XXX Middleware Interface","p":"\nDetailed Description\nInterface for ZMOD4XXX Middleware functions. \n\nSummary\nThe ZMOD4XXX interface provides ZMOD4XXX functionality.\nThe ZMOD4XXX interface can be implemented by:\nZMOD4XXX Gas Sensor (rm_zmod4xxx) \n\n\n\nData Structures\nstruct  rm_zmod4xxx_callback_args_t\n \nstru ...","l":"group___r_m___z_m_o_d4_x_x_x___a_p_i.html"},"135":{"t":"RZV Flexible Software Package Documentation: Renesas Serial Peripheral Interface (r_rspi)","p":"\n\n\nFunctions\nfsp_err_t R_RSPI_Open (spi_ctrl_t *p_api_ctrl, spi_cfg_t const *const p_cfg)\n \nfsp_err_t R_RSPI_Read (spi_ctrl_t *const p_api_ctrl, void *p_dest, uint32_t const length, spi_bit_width_t const bit_width)\n \nfsp_err_t R_RSPI_Write (spi_ctrl_t *const p_api_ctrl, void ...","l":"group___r_s_p_i.html"},"136":{"t":"RZV Flexible Software Package Documentation: Realtime Clock (r_rtc)","p":"\n\n\nFunctions\nfsp_err_t R_RTC_Open (rtc_ctrl_t *const p_ctrl, rtc_cfg_t const *const p_cfg)\n \nfsp_err_t R_RTC_Close (rtc_ctrl_t *const p_ctrl)\n \nfsp_err_t R_RTC_ClockSourceSet (rtc_ctrl_t *const p_ctrl)\n \nfsp_err_t R_RTC_CalendarTimeSet (rtc_ctrl_t *const p_ctrl, rtc_time_t * ...","l":"group___r_t_c.html"},"137":{"t":"RZV Flexible Software Package Documentation: RTC Interface","p":"\nDetailed Description\nInterface for accessing the Realtime Clock. \n\nSummary\nThe RTC Interface is for configuring Real Time Clock (RTC) functionality including alarm, periodic notiification and error adjustment.\nThe Real Time Clock Interface can be implemented by:\nRealtime Cl ...","l":"group___r_t_c___a_p_i.html"},"138":{"t":"RZV Flexible Software Package Documentation: I2C Master (r_sci_b_i2c)","p":"\n\n\nFunctions\nfsp_err_t R_SCI_B_I2C_Open (i2c_master_ctrl_t *const p_api_ctrl, i2c_master_cfg_t const *const p_cfg)\n \nfsp_err_t R_SCI_B_I2C_Close (i2c_master_ctrl_t *const p_api_ctrl)\n \nfsp_err_t R_SCI_B_I2C_Read (i2c_master_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, ui ...","l":"group___s_c_i___b___i2_c.html"},"139":{"t":"RZV Flexible Software Package Documentation: UART (r_sci_b_uart)","p":"\n\n\nFunctions\nfsp_err_t R_SCI_B_UART_Open (uart_ctrl_t *const p_api_ctrl, uart_cfg_t const *const p_cfg)\n \nfsp_err_t R_SCI_B_UART_Read (uart_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes)\n \nfsp_err_t R_SCI_B_UART_Write (uart_ctrl_t *const p_api_ctrl, u ...","l":"group___s_c_i___b___u_a_r_t.html"},"140":{"t":"RZV Flexible Software Package Documentation: Serial Communications Interface (SCIF) UART (r_scif_uart)","p":"\n\n\nFunctions\nfsp_err_t R_SCIF_UART_Open (uart_ctrl_t *const p_api_ctrl, uart_cfg_t const *const p_cfg)\n \nfsp_err_t R_SCIF_UART_Read (uart_ctrl_t *const p_api_ctrl, uint8_t *const p_dest, uint32_t const bytes)\n \nfsp_err_t R_SCIF_UART_Write (uart_ctrl_t *const p_api_ctrl, uint ...","l":"group___s_c_i_f___u_a_r_t.html"},"141":{"t":"RZV Flexible Software Package Documentation: SPI Interface","p":"\nDetailed Description\nInterface for SPI communications. \n\nSummary\nProvides a common interface for communication using the SPI Protocol.\nImplemented by:\nRenesas Serial Peripheral Interface (r_rspi)\nSPI (r_spi_b) \n\n\n\nData Structures\nstruct  spi_callback_args_t\n \nstruct  spi_wr ...","l":"group___s_p_i___a_p_i.html"},"142":{"t":"RZV Flexible Software Package Documentation: SPI (r_spi_b)","p":"\n\n\nFunctions\nfsp_err_t R_SPI_B_Open (spi_ctrl_t *p_api_ctrl, spi_cfg_t const *const p_cfg)\n \nfsp_err_t R_SPI_B_Read (spi_ctrl_t *const p_api_ctrl, void *p_dest, uint32_t const length, spi_bit_width_t const bit_width)\n \nfsp_err_t R_SPI_B_Write (spi_ctrl_t *const p_api_ctrl, v ...","l":"group___s_p_i___b.html"},"143":{"t":"RZV Flexible Software Package Documentation: SPI Flash Interface","p":"\nDetailed Description\nInterface for accessing external SPI flash devices. \n\nSummary\nThe SPI flash API provides an interface that configures, writes, and erases sectors in SPI flash devices.\nImplemented by:\nExpanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi) \n\n\n\nDa ...","l":"group___s_p_i___f_l_a_s_h___a_p_i.html"},"144":{"t":"RZV Flexible Software Package Documentation: Timer Interface","p":"\nDetailed Description\nInterface for timer functions. \n\nSummary\nThe general timer interface provides standard timer functionality including periodic mode, one-shot mode, PWM output, and free-running timer mode. After each timer cycle (overflow or underflow), an interrupt can ...","l":"group___t_i_m_e_r___a_p_i.html"},"145":{"t":"RZV Flexible Software Package Documentation: Transfer Interface","p":"\nDetailed Description\nInterface for data transfer functions. \n\nSummary\nThe transfer interface supports background data transfer (no CPU intervention).\nImplemented by:\nDirect Memory Access Controller (r_dmac_b) \n\n\n\nData Structures\nstruct  transfer_properties_t\n \nstruct  trans ...","l":"group___t_r_a_n_s_f_e_r___a_p_i.html"},"146":{"t":"RZV Flexible Software Package Documentation: Temperature Sensor Unit (r_tsu_b)","p":"\n\n\nFunctions\nfsp_err_t R_TSU_B_Open (adc_ctrl_t *p_ctrl, adc_cfg_t const *const p_cfg)\n \nfsp_err_t R_TSU_B_ScanCfg (adc_ctrl_t *p_ctrl, void const *const p_channel_cfg)\n \nfsp_err_t R_TSU_B_ScanStart (adc_ctrl_t *p_ctrl)\n \nfsp_err_t R_TSU_B_ScanGroupStart (adc_ctrl_t *p_ctrl, ...","l":"group___t_s_u___b.html"},"147":{"t":"RZV Flexible Software Package Documentation: UART Interface","p":"\nDetailed Description\nInterface for UART communications. \n\nSummary\nThe UART interface provides common APIs for UART HAL drivers. The UART interface supports the following features:\nFull-duplex UART communication\nInterrupt driven transmit/receive processing\nCallback function ...","l":"group___u_a_r_t___a_p_i.html"},"148":{"t":"RZV Flexible Software Package Documentation: Watchdog (r_wdt)","p":"\n\n\nFunctions\nfsp_err_t R_WDT_Refresh (wdt_ctrl_t *const p_ctrl)\n \nfsp_err_t R_WDT_Open (wdt_ctrl_t *const p_ctrl, wdt_cfg_t const *const p_cfg)\n \nfsp_err_t R_WDT_StatusClear (wdt_ctrl_t *const p_ctrl, const wdt_status_t status)\n \nfsp_err_t R_WDT_StatusGet (wdt_ctrl_t *const ...","l":"group___w_d_t.html"},"149":{"t":"RZV Flexible Software Package Documentation: WDT Interface","p":"\nDetailed Description\nInterface for watch dog timer functions. \n\nSummary\nThe WDT interface for the Watchdog Timer (WDT) peripheral provides watchdog functionality including resetting the device or generating an interrupt.\nThe watchdog timer interface can be implemented by:\nW ...","l":"group___w_d_t___a_p_i.html"},"150":{"t":"RZV Flexible Software Package Documentation: Expanded Serial Peripheral Interface (xSPI) QSPI (r_xspi_qspi)","p":"\n\n\nFunctions\nfsp_err_t R_XSPI_QSPI_Open (spi_flash_ctrl_t *p_ctrl, spi_flash_cfg_t const *const p_cfg)\n \nfsp_err_t R_XSPI_QSPI_Close (spi_flash_ctrl_t *p_ctrl)\n \nfsp_err_t R_XSPI_QSPI_DirectWrite (spi_flash_ctrl_t *p_ctrl, uint8_t const *const p_src, uint32_t const bytes, bo ...","l":"group___x_s_p_i___q_s_p_i.html"},"151":{"t":"RZV Flexible Software Package Documentation: Introduction","p":"\nTable of Contents\nOverview\nUsing this Manual\nDocumentation Standard\nIntroduction to FSPPurpose\nQuality\nEase of Use\nScalability\nBuild Time Configurations\ne2 studio IDE\n\n\n\n\n\nOverview\nThis manual describes how to use the Renesas Flexible Software Package (FSP) for writing appl ...","l":"index.html"},"152":{"t":"RZV Flexible Software Package Documentation: API Reference","p":"\nThis section includes the FSP API Reference for the Module and Interface level functions.\n[detail level 123]\n ▼BSPCommon code shared by FSP drivers \n Common Error Codes\n ▼MPU Board Support PackageThe BSP is responsible for getting the MCU from reset to the user's applicatio ...","l":"modules.html"},"153":{"t":"RZV Flexible Software Package Documentation: Starting Development","p":"\nThis section includes tutorials to help get started with the Renesas e2 studio IDE.\n\n Starting Development\n FSP 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Flexible Software Package Documentation: MPURegionSettings_t Struct Reference","p":"\n\nSettings to define an MPU region. \n More...\n\n#include \n\n\nData Fields\nuint32_t ulRBAR\n \nuint32_t ulRLAR\n \n\nDetailed Description\nSettings to define an MPU region. \nField Documentation\n\n◆ ulRBAR\n\n\n\n \n \n uint32_t MPURegionSettings_t::ulRBAR\n ...","l":"struct_m_p_u_region_settings__t.html"},"288":{"t":"RZV Flexible Software Package Documentation: algorithm_version Struct Reference","p":"\n\nVariables that describe the library version. \n More...\n\n#include \nDetailed Description\nVariables that describe the library version. \nThe documentation for this struct was generated from the following file:\nzmod4xxx_types.h\n\n","l":"structalgorithm__version.html"},"289":{"t":"RZV Flexible Software Package Documentation: xMPU_SETTINGS Struct Reference","p":"\n\nMPU settings as stored in the TCB. \n More...\n\n#include \n\n\nData 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else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var idxChar = searchValue.substr(0, 1).toLowerCase(); + if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair + { + idxChar = searchValue.substr(0, 2); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); + if (idx!=-1) + { + var hexCode=idx.toString(16); + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + 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evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e    ' + + title + '
    ' + + preview + '' + '

    '); // TJ Added "pos" + if (pos.length != 0) { + html.push(result); + } + } + if (html.length) { + return html.join(""); + } + else { + return "

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    zmod4xxx_conf Struct Reference
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    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
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    zmod4xxx_conf_str Struct Reference
    @@ -111,7 +179,7 @@ diff --git a/structzmod4xxx__dev__t.html b/structzmod4xxx__dev__t.html index 2eaeff8..50b92c4 100644 --- a/structzmod4xxx__dev__t.html +++ b/structzmod4xxx__dev__t.html @@ -5,7 +5,7 @@ -RZ/V Flexible Software Package Documentation: zmod4xxx_dev_t Struct Reference +RZV Flexible Software Package Documentation: zmod4xxx_dev_t Struct Reference @@ -19,6 +19,10 @@ + + + + @@ -32,24 +36,24 @@ Logo -
    RZ/V Flexible Software Package Documentation -  Release v1.1.0 +
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    Data Fields
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    • zmod4xxx_dev_t
      • -
    • RZ/V FSP Release v1.1.0 API Reference Copyright © (2023) Renesas Electronics Corporation. All Rights Reserved.
      • +
    • FSP Release v2.0.0 User's Manual Copyright © (2024) Renesas Electronics Corporation. All Rights Reserved.