diff --git a/CHANGELOG.md b/CHANGELOG.md index 162cb0d..1b164a9 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -4,6 +4,7 @@ ### script * fix Priority Limit Calculation in Priority Mode and Mixed Mode (https://github.com/reserve85/HoymilesZeroExport/issues/228) * added a "Debug" Reader and DTU just for debugging. +* Log the real "error message" in Function WaitForAck ### config * added a "Debug" Reader and DTU just for debugging. diff --git a/HoymilesZeroExport.py b/HoymilesZeroExport.py index b8cb085..9e44678 100644 --- a/HoymilesZeroExport.py +++ b/HoymilesZeroExport.py @@ -370,7 +370,6 @@ def SetLimit(pLimit): if not DTU.WaitForAck(i, SET_LIMIT_TIMEOUT_SECONDS): SetLimit.LastLimitAck = False LASTLIMITACKNOWLEDGED[i] = False - except: logger.error("Exception at SetLimit") SetLimit.LastLimitAck = False @@ -1090,8 +1089,11 @@ def WaitForAck(self, pInverterId: int, pTimeoutInS: int): else: logger.info('Ahoy: Inverter "%s": Limit timeout!', NAME[pInverterId]) return ack - except: - logger.info('Ahoy: Inverter "%s": Limit timeout!', NAME[pInverterId]) + except Exception as e: + if hasattr(e, 'message'): + logger.error('Ahoy: Inverter "%s" WaitForAck: "%s"', NAME[pInverterId], e.message) + else: + logger.error('Ahoy: Inverter "%s" WaitForAck: "%s"', NAME[pInverterId], e) return False def SetLimit(self, pInverterId: int, pLimit: int): @@ -1227,8 +1229,11 @@ def WaitForAck(self, pInverterId: int, pTimeoutInS: int): else: logger.info('OpenDTU: Inverter "%s": Limit timeout!', NAME[pInverterId]) return ack - except: - logger.info('OpenDTU: Inverter "%s": Limit timeout!', NAME[pInverterId]) + except Exception as e: + if hasattr(e, 'message'): + logger.error('OpenDTU: Inverter "%s" WaitForAck: "%s"', NAME[pInverterId], e.message) + else: + logger.error('OpenDTU: Inverter "%s" WaitForAck: "%s"', NAME[pInverterId], e) return False def SetLimit(self, pInverterId: int, pLimit: int):