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User Publications |
These are a selected set of publications and works that use BOOM. If you are interested in adding a paper/work that uses BOOM to this list, please reach out to the BOOM developers.
Jiyong Yu, Lucas Hsiung, Mohamad El Hajj and Christopher Fletcher. Data Oblivious ISA Extensions for Side Channel-Resistant and High Performance Computing. In Proceedings of 26th Network and Distributed System Security Symposium. San Diego, CA. February 2019.
Abdullah Owahid and Eugene John. Wasted dynamic power and correlation to instruction set architecture for CPU throttling. The Journal of Supercomputing. October 2018.
A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension
Karyofyllis Patsidis, Dimitris Konstantinou, Chrysostomos Nicopoulos and Giorgos Dimitrakopoulos. A low-cost synthesizable RISC-V dual-issue processor core leveraging the compressed Instruction Set Extension. Journal on Microprocessors and Microsystems: Embedded Hardware Design. September 2018.
DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles
Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach and Krste Asanovic. DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. 28th International Conference on Field Programmable Logic and Applications. Dublin, Ireland. August 2018.
Rafael Tonetto, Gabriel Nazar and Antonio Beck. Precise evaluation of the fault sensitivity of OoO superscalar processors. Design, Automation and Test in Europe Conference and Exhibition. Dresden, Germany. March 2018.
Donggyu Kim, Christopher Celio, David Biancolin, Jonathan Bachrach and Krste Asanovic. Evaluation of RISC-V RTL with FPGA-Accelerated Simulation. 1st Workshop on Computer Architecture Research with RISC-V. Boston, MA. October 2017.
Alec Roelke and Mircea Stan. RISC5: Implementing the RISC-V ISA in gem5. 1st Workshop on Computer Architecture Research with RISC-V. Boston, MA. October 2017.
Hussam Amrouch, Behnam Khaleghi and Jorg Henkel. Optimizing temperature guardbands. Design, Automation and Test in Europe Conference and Exhibition. Lausanne, Switzerland. March 2017.
Donggyu Kim, Adam Izraelevitz, Christopher Celio, Hokeun Kim, Brian Zimmer, Yunsup Lee, Jonathan Bachrach and Krste Asanovic. Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL. 43rd Annual International Symposium on Computer Architecture. Seoul, South Korea. June 2016.