Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

target/riscv: Reject size 2 soft breakpoints when C extension not supported #908

Merged
merged 1 commit into from
Sep 7, 2023
Merged

target/riscv: Reject size 2 soft breakpoints when C extension not supported #908

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 8 additions & 6 deletions src/target/riscv/riscv.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1198,15 +1198,17 @@ static int riscv_add_breakpoint(struct target *target, struct breakpoint *breakp
LOG_TARGET_DEBUG(target, "@0x%" TARGET_PRIxADDR, breakpoint->address);
assert(breakpoint);
if (breakpoint->type == BKPT_SOFT) {
/** @todo check RVC for size/alignment */
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

@timsifive I think this patch is added due to there is a todo here, is it possible to check whether 16bit instruction execute ok without any exception, such as test c.nop, if no exception, compress instruction is supported, otherwise no.

if (!(breakpoint->length == 4 || breakpoint->length == 2)) {
LOG_TARGET_ERROR(target, "Invalid breakpoint length %d", breakpoint->length);
const bool c_extension_supported = riscv_supports_extension(target, 'C');
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

There is a code size reduction isa called Zc*(ratified), see https://github.com/riscv/riscv-code-size-reduction

If Zc extension is used, the instruction can be also 16 bit, so this check by just riscv_supports_extension(target, 'C') maybe not correct, since as described here riscvarchive/riscv-code-size-reduction#144 (comment), this misa.c only set when all normal compress instruction are implemented, but in some case, for example, rv32imaf_zca, it will not set misa.c bit, but it still contains 16 bit instruction, so I think sw breakpoint can still set here, so the check by misa.c bit is not enough.

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

also here riscv-software-src/riscv-isa-sim#1172

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Hi @MarekVCodasip @timsifive @tariqkurd-repo , is there any feedback on my comments regarding the new added Zc* extensions will affect this compress instructions existing checking.

Copy link

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Implementing Zca and not C will not set misa.C
I think you actually need to specify C to set it
Is that your understanding @aswaterman ?

Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Implementing Zca and not C will not set misa.C I think you actually need to specify C to set it Is that your understanding @aswaterman ?

If I implement rv32imaf_zca_zcb_zcf_zcmp_zcmt it contains all C required zca_zcf will the misa.C bit be set? This riscv_supports_extension function only use the misa.C bit to check whether compressed instructions are supported.

if (!(breakpoint->length == 4 || (breakpoint->length == 2 && c_extension_supported))) {
LOG_TARGET_ERROR(target, "Invalid breakpoint length %d, supported lengths: %s", breakpoint->length,
c_extension_supported ? "2, 4" : "4");
return ERROR_FAIL;
}
MarekVCodasip marked this conversation as resolved.
Show resolved Hide resolved

if (0 != (breakpoint->address % 2)) {
LOG_TARGET_ERROR(target, "Invalid breakpoint alignment for address 0x%" TARGET_PRIxADDR,
breakpoint->address);
const unsigned int required_align = c_extension_supported ? 2 : 4;
if ((breakpoint->address % required_align) != 0) {
LOG_TARGET_ERROR(target, "Invalid breakpoint alignment for address 0x%" TARGET_PRIxADDR
", required alignment: %u", breakpoint->address, required_align);
return ERROR_FAIL;
}

Expand Down
Loading