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target/riscv: Handle sbbusyerror in read_memory_bus_v1 #957

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merged 1 commit into from
Nov 16, 2023
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@timsifive timsifive commented Nov 7, 2023

The existing code didn't seem to work right at all. I have spike modifications that exercise these new cases. I'll merge those once this has merged.

Maybe this helps with #880.

Change-Id: I89bd336f34f1b208a76f25b6b41fe3877800765b

@timsifive timsifive marked this pull request as ready for review November 7, 2023 20:54
@JanMatCodasip
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I will be able to take a closer look Friday morning.

JanMatCodasip
JanMatCodasip previously approved these changes Nov 15, 2023
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I have checked this change visually. The fixes look all right to me, thank you.

@timsifive Do I understand correctly that you aim to add some sort of "system bus stress mode" into Spike?

src/target/riscv/riscv-013.c Show resolved Hide resolved
The existing code didn't seem to work right at all. I have spike
modifications that exercise these new cases. I'll merge those once this
has merged.

Change-Id: I89bd336f34f1b208a76f25b6b41fe3877800765b
Signed-off-by: Tim Newsome <[email protected]>
@timsifive timsifive merged commit d5ea55c into riscv Nov 16, 2023
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@timsifive timsifive deleted the sbbusyerror branch November 16, 2023 17:39
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2 participants