From 13fb359e88f86578b9b7e4bfd080fd841348ad5f Mon Sep 17 00:00:00 2001 From: Zeeshan Dildar Date: Thu, 7 Nov 2024 10:29:54 +0100 Subject: [PATCH] Fixed the overlapping operands to resolve the illegal instruction exception issue (#501) Co-authored-by: Umer Shahid --- riscv-test-suite/rv32i_m/Zvk/src/vsha2ms-e32.vv-01.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/riscv-test-suite/rv32i_m/Zvk/src/vsha2ms-e32.vv-01.S b/riscv-test-suite/rv32i_m/Zvk/src/vsha2ms-e32.vv-01.S index 69eb7d71e..5f79acf7e 100644 --- a/riscv-test-suite/rv32i_m/Zvk/src/vsha2ms-e32.vv-01.S +++ b/riscv-test-suite/rv32i_m/Zvk/src/vsha2ms-e32.vv-01.S @@ -70,7 +70,7 @@ TEST_CASE_WVV(4, 32, VINST, v15, 2*4, v14, 3*4, v18, 8*4) //sig[116*4] inst_8: -TEST_CASE_WVV(4, 32, VINST, v16, 0*4, v17, 4*4, v16, 0*4) +TEST_CASE_WVV(4, 32, VINST, v18, 0*4, v17, 4*4, v16, 0*4) //sig[120*4] inst_9: