From 1cfe6683b2cf23bb01ba2d4ff0b98e700749c039 Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Tue, 8 Nov 2022 12:27:24 +0500 Subject: [PATCH 1/7] Test cases for Smepmp Kindly review these files in each file test motive and expected output is written in addition testplan is also provided which is being followed --- .../rv32i_m/privilege/src/ePMP_01.S | 60 ++++++++ .../rv32i_m/privilege/src/ePMP_02.S | 70 +++++++++ .../rv32i_m/privilege/src/ePMP_03.S | 86 +++++++++++ .../rv32i_m/privilege/src/ePMP_04.S | 86 +++++++++++ .../rv32i_m/privilege/src/ePMP_05.S | 63 ++++++++ .../rv32i_m/privilege/src/ePMP_06.S | 136 ++++++++++++++++++ .../rv32i_m/privilege/src/ePMP_07.S | 89 ++++++++++++ .../rv32i_m/privilege/src/ePMP_08.S | 125 ++++++++++++++++ 8 files changed, 715 insertions(+) create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S new file mode 100644 index 000000000..ee216a3ce --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S @@ -0,0 +1,60 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests the reset value of mseccfg csr +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_01) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + csrr x2,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S new file mode 100644 index 000000000..60bfa2182 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S @@ -0,0 +1,70 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests the permissions of csrw, csrr, csrs and csrc in M mode +// It should allow all above instruction to execute because mseccfg is a machine mode csr and we are accessing it in M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_02) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + LI(x2,0) //Load a value 0 in x2 which is used later on + csrw mseccfg,x2 //write mseccfg to know whether csrw is permitted + csrr x3,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + csrs mseccfg,x2 //set mseccfg to know whether csrs is permitted + csrr x3,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + csrc mseccfg,x2 //clear mseccfg to know whether csrc is permitted + csrr x3,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S new file mode 100644 index 000000000..440304d23 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S @@ -0,0 +1,86 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests the permissions of csrw, csrr, csrs and csrc in S mode +// It should generate trap_illegal_instruction because mseccfg is a machine mode csr +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_03) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- + csrw satp, zero //Disable address translation. + LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS clear and permission is read,write and execute + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //---------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + //-------------------------In S mode now------------------------------------------ + + nop + LI(x2,0) //Load a value 0 in x2 which is used later on + csrw mseccfg,x2 //write mseccfg to know whether csrw is permitted + csrr x3,mseccfg //Read the value of mseccfg + + csrs mseccfg,x2 //set mseccfg to know whether csrs is permitted + csrr x3,mseccfg //Read the value of mseccfg + + csrc mseccfg,x2 //clear mseccfg to know whether csrc is permitted + csrr x3,mseccfg //Read the value of mseccfg + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S new file mode 100644 index 000000000..52a175d25 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S @@ -0,0 +1,86 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests the permissions of csrw, csrr, csrs and csrc in U mode +// It should generate trap_illegal_instruction because mseccfg is a machine mode csr +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_04) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- + csrw satp, zero //Disable address translation. + LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS clear and permission is read,write and execute + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //---------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + //-------------------------In U mode now------------------------------------------ + + nop + LI(x2,0) //Load a value 0 in x2 which is used later on + csrw mseccfg,x2 //write mseccfg to know whether csrw is permitted + csrr x3,mseccfg //Read the value of mseccfg + + csrs mseccfg,x2 //set mseccfg to know whether csrs is permitted + csrr x3,mseccfg //Read the value of mseccfg + + csrc mseccfg,x2 //clear mseccfg to know whether csrc is permitted + csrr x3,mseccfg //Read the value of mseccfg + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S new file mode 100644 index 000000000..8c0c0fdfc --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S @@ -0,0 +1,63 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests when we write to the reserved fields of mseccfg it should not write there +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_05) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + LI(x2,7) //Load a value 7 in x2 which signifies first 3 valid bits of mseccfg + not x2,x2 //set 1's to all other fields except first 3 fields + csrw mseccfg,x2 //write mseccfg to know whether fields are written + csrr x3,mseccfg //Read the value of mseccfg to verify whether fields are written + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S new file mode 100644 index 000000000..a5e0ff667 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S @@ -0,0 +1,136 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests if we set (mseccfg.RLB=0 and at least one pmpcfg.L=1) then mseccfg.RLB canot be written\modified +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_06) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + LI(x2,0) //Load a value 0 in x2 which is later used to write the mseccfg csr + RVTEST_SIGUPD(x13,x2) //Update the signature + csrw mseccfg, x2 //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared + csrr x3,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + //------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- + + csrw satp, zero //Disable address translation. + LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS SET and permission is read,write and execute + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------- Region configured ---------------------------------------- + + //------------------ Configuring a pmp region 1------------------------------------- + + LI(x4, 0x20004005) //Starting address 80010010 upto 80010020 is configured + csrw pmpaddr1, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_R | PMP_W | PMP_X | PMP_NAPOT) //LOCKED BIT IS SET and permission is read,write and execute + slli x6,x6,8 //shifting left 8 bits to set configuration for pmpaddr1 + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------- Region configured ---------------------------------------- + + //------------------ Configuring a pmp region 2------------------------------------- + + LI(x4, 0x2000400D) //Starting address 80010030 upto 80010040 is configured + csrw pmpaddr2, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_R | PMP_W | PMP_X | PMP_NAPOT) //LOCKED BIT IS SET and permission is read,write and execute + slli x6,x6,16 //shifting left 16 bits to set configuration for pmpaddr2 + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------- Region configured ---------------------------------------- + + //------------------ Configuring a pmp region 3------------------------------------- + + LI(x4, 0x20004011) //Starting address 80010044 and from this 4 bytes are configured + csrw pmpaddr3, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_R | PMP_W | PMP_X | PMP_NA4) //LOCKED BIT IS SET and permission is read,write and execute + slli x6,x6,24 //shifting left 24 bits to set configuration for pmpaddr1 + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------- Region configured ---------------------------------------- + + nop + csrr x8, mseccfg //Verify the value to double check mseccfg is zero + RVTEST_SIGUPD(x13,x8) //Update the signature + LI(x9,4) //load x9 with value 4 to set mseccfg.RLB which is at bit 3 in mseccfg + csrw mseccfg, x9 //Setting mseccfg.RLB + csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is still unset(If it is, then test is passed) + RVTEST_SIGUPD(x13,x10) //Update the signature + + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S new file mode 100644 index 000000000..4ac5df362 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S @@ -0,0 +1,89 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests if we set (mseccfg.RLB=0 and pmpcfg.L=0) then mseccfg.RLB can be written\modified +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_07) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + LI(x2,0) //Load a value 0 in x2 which is later used to write the mseccfg csr + RVTEST_SIGUPD(x13,x2) //Update the signature + csrw mseccfg, x2 //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared + csrr x3,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + +//------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- + + csrw satp, zero //Disable address translation. + LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS clear and permission is read,write and execute + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + + //--------------------- Region configured ---------------------------------------- + + nop + csrr x8, mseccfg //Verify the value to double check mseccfg is zero + RVTEST_SIGUPD(x13,x8) //Update the signature + LI(x9,4) //load x9 with value 4 to set mseccfg.RLB which is at bit 3 in mseccfg + csrw mseccfg, x9 //Setting mseccfg.RLB + csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is set now(If it is,then test is passed) + RVTEST_SIGUPD(x13,x10) //Update the signature + + + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S new file mode 100644 index 000000000..871bc64e7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S @@ -0,0 +1,125 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if we set (mseccfg.RLB=1 and pmpcfg.L=1) then pmp rules may be removed/modified and +//pmp entries may be edited + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_08) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 +main: + + LI(x1,0x44444444) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + LI(x2,4) //Load a value 4 in x2 to set mseccfg.RLB + RVTEST_SIGUPD(x13,x2) //Update the signature + csrw mseccfg, x2 //Writing 4 to mseccfg and in specific mseccfg.RLB is set + csrr x3,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + //------------------ Configuring a pmp region 0------------------------------------- + + csrw satp, zero //Disable address translation. + LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + csrw pmpaddr0, x4 //write pmpaddr0 to define PMP region from 0 upto 0x80010000 + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + LI(x6, PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS set and permission is read,write and execute + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------- Region configured ---------------------------------------- + + //------------------ Configuring a pmp region 1------------------------------------- + + LI(x4, 0x20004005) //Starting address 80010010 upto 80010020 is configured + csrw pmpaddr1, x4 //write pmpaddr1 to define PMP region consisting of 16 bytes from 80010010 upto 80010020 + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + LI(x6, PMP_L | PMP_X | PMP_NAPOT) //LOCKED BIT IS SET and permission is execute + slli x6,x6,8 //shifting left 8 bits to set configuration for pmpaddr1 + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------- Region configured ---------------------------------------- + + LI(x7,0x80010010) //Load the address of pmp region 1 + sw x1,0(x7) //Perform writes in first 4 bytes. It should trap because no writes permission + sw x1,4(x7) //Perform writes in next 4 bytes. It should trap because no writes permission + sw x1,8(x7) //Perform writes in next 4 bytes. It should trap because no writes permission + sw x1,12(x7) //Perform writes in next 4 bytes. It should trap because no writes permission + nop + lw x1,0(x7) //Perform read in first 4 bytes. It should trap because no reads permission + lw x1,4(x7) //Perform read in next 4 bytes. It should trap because no read permission + lw x1,8(x7) //Perform read in next 4 bytes. It should trap because no read permission + lw x1,12(x7) //Perform read in next 4 bytes. It should trap because no read permission + + LI(x8,0xFFFFFF00) + csrc pmpcfg0,x8 //clears the configuration of pmpaddr1(region1) + LI(x10, PMP_L | PMP_W | PMP_R | PMP_X | PMP_NAPOT) //Updated configuration LOCKED BIT IS SET and permission is read, write and execute + slli x10,x10,8 //shifting left 8 bits to set configuration for pmpaddr1 + csrs pmpcfg0, x10 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x11) //Update the signature + nop + + sw x1,0(x7) //Perform writes in first 4 bytes. It should not trap now + sw x1,4(x7) //Perform writes in next 4 bytes. It should not trap now + sw x1,8(x7) //Perform writes in next 4 bytes. It should not trap now + sw x1,12(x7) //Perform writes in next 4 bytes. It should not trap now + nop + lw x1,0(x7) //Perform read in first 4 bytes. It should not trap now + lw x1,4(x7) //Perform read in next 4 bytes. It should not trap now + lw x1,8(x7) //Perform read in next 4 bytes. It should not trap now + lw x1,12(x7) //Perform read in next 4 bytes. It should not trap now + nop + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END From 8f02dda0a3e5d0f5349e290b638e1fb6898c71c4 Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Fri, 11 Nov 2022 14:36:25 +0500 Subject: [PATCH 2/7] Smepmp tests Kindly review these files in each file test motive and expected output is written in addition link of the testplan is also provided which is being followed --- .../rv32i_m/privilege/src/ePMP_01.S | 9 +- .../rv32i_m/privilege/src/ePMP_02.S | 30 +-- .../rv32i_m/privilege/src/ePMP_03.S | 104 +++++++-- .../rv32i_m/privilege/src/ePMP_04.S | 106 +++++++-- .../rv32i_m/privilege/src/ePMP_05.S | 17 +- .../rv32i_m/privilege/src/ePMP_06.S | 127 ++++++----- .../rv32i_m/privilege/src/ePMP_07.S | 100 ++++++-- .../rv32i_m/privilege/src/ePMP_08.S | 214 +++++++++++++----- 8 files changed, 529 insertions(+), 178 deletions(-) diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S index ee216a3ce..8cc4ceaac 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S @@ -24,10 +24,13 @@ RVTEST_SIGBASE( x13,signature_x13_1) .option nopic .attribute unaligned_access, 0 .attribute stack_align, 16 - .align 2 + .align 2 + +#define test_value 0x44444444 + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature csrr x2,mseccfg //Read the value of mseccfg @@ -57,4 +60,4 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S index 60bfa2182..ef271111f 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S @@ -24,24 +24,26 @@ RVTEST_SIGBASE( x13,signature_x13_1) .option nopic .attribute unaligned_access, 0 .attribute stack_align, 16 - .align 2 + .align 2 + +#define test_value 0x44444444 + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature - LI(x2,0) //Load a value 0 in x2 which is used later on - csrw mseccfg,x2 //write mseccfg to know whether csrw is permitted - csrr x3,mseccfg //Read the value of mseccfg - RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + csrw mseccfg,zero //write mseccfg to know whether csrw is permitted + csrr x2,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - csrs mseccfg,x2 //set mseccfg to know whether csrs is permitted - csrr x3,mseccfg //Read the value of mseccfg - RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + csrs mseccfg,zero //set mseccfg to know whether csrs is permitted + csrr x2,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - csrc mseccfg,x2 //clear mseccfg to know whether csrc is permitted - csrr x3,mseccfg //Read the value of mseccfg - RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + csrc mseccfg,zero //clear mseccfg to know whether csrc is permitted + csrr x2,mseccfg //Read the value of mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value #endif @@ -67,4 +69,4 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S index 440304d23..13b64f30f 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S @@ -25,41 +25,112 @@ RVTEST_SIGBASE( x13,signature_x13_1) .attribute unaligned_access, 0 .attribute stack_align, 16 .align 2 + +#define test_value 0x44444444 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-----------------------------------------------------------------Descritption of all regions---------------------------------------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled and PMP TOR type is configured | | with RWX enabled and PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + + +//------------------ Configuring 2 regions as mentioned above-------------------------------- csrw satp, zero //Disable address translation. - LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS clear and permission is read,write and execute + + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature //---------------------------------------------------------------------------------- - + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - //-------------------------In S mode now------------------------------------------ + //-------------------------In S mode now--------------------------------------------- + + nop + csrw mseccfg,zero //write mseccfg to know whether csrw is permitted(should trap bcz it is M mode csr) + csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + csrs mseccfg,zero //set mseccfg to know whether csrs is permitted(should trap bcz it is M mode csr) + csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + + csrc mseccfg,zero //clear mseccfg to know whether csrc is permitted(should trap bcz it is M mode csr) + csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) nop - LI(x2,0) //Load a value 0 in x2 which is used later on - csrw mseccfg,x2 //write mseccfg to know whether csrw is permitted - csrr x3,mseccfg //Read the value of mseccfg - csrs mseccfg,x2 //set mseccfg to know whether csrs is permitted - csrr x3,mseccfg //Read the value of mseccfg + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) + .fill 3*(XLEN/32),4,0x12345678 + - csrc mseccfg,x2 //clear mseccfg to know whether csrc is permitted - csrr x3,mseccfg //Read the value of mseccfg +exit: - #endif # --------------------------------------------------------------------------------------------- # HALT @@ -83,4 +154,5 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +PMP_region_High: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S index 52a175d25..76f115ed0 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S @@ -25,41 +25,112 @@ RVTEST_SIGBASE( x13,signature_x13_1) .attribute unaligned_access, 0 .attribute stack_align, 16 .align 2 + +#define test_value 0x44444444 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled and PMP TOR type is configured | | with RWX enabled and PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + + +//------------------ Configuring 2 regions as mentioned above-------------------------------- csrw satp, zero //Disable address translation. - LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS clear and permission is read,write and execute + + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature //---------------------------------------------------------------------------------- - + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode - //-------------------------In U mode now------------------------------------------ + //-------------------------In U mode now--------------------------------------------- + + nop + csrw mseccfg,zero //write mseccfg to know whether csrw is permitted(should trap bcz it is M mode csr) + csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + csrs mseccfg,zero //set mseccfg to know whether csrs is permitted(should trap bcz it is M mode csr) + csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + + csrc mseccfg,zero //clear mseccfg to know whether csrc is permitted(should trap bcz it is M mode csr) + csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) nop - LI(x2,0) //Load a value 0 in x2 which is used later on - csrw mseccfg,x2 //write mseccfg to know whether csrw is permitted - csrr x3,mseccfg //Read the value of mseccfg - csrs mseccfg,x2 //set mseccfg to know whether csrs is permitted - csrr x3,mseccfg //Read the value of mseccfg + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) + .fill 3*(XLEN/32),4,0x12345678 + + +exit: - csrc mseccfg,x2 //clear mseccfg to know whether csrc is permitted - csrr x3,mseccfg //Read the value of mseccfg - - #endif # --------------------------------------------------------------------------------------------- # HALT @@ -83,4 +154,5 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +PMP_region_High: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S index 8c0c0fdfc..d8826ef7c 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S @@ -25,15 +25,22 @@ RVTEST_SIGBASE( x13,signature_x13_1) .attribute unaligned_access, 0 .attribute stack_align, 16 .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature - LI(x2,7) //Load a value 7 in x2 which signifies first 3 valid bits of mseccfg - not x2,x2 //set 1's to all other fields except first 3 fields + LI(x2,setRLB | setMMWP | setMML) //Set immidiate as all legal values of mseccfg + not x2,x2 //set 1's to all other fields except first 3 valid fields of mseccfg csrw mseccfg,x2 //write mseccfg to know whether fields are written - csrr x3,mseccfg //Read the value of mseccfg to verify whether fields are written + csrr x3,mseccfg //Read the value of mseccfg to verify whether fields are written(It should remain zero bcz we have written to reserve fields) RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value @@ -60,4 +67,4 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S index a5e0ff667..e4a081729 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S @@ -25,90 +25,112 @@ RVTEST_SIGBASE( x13,signature_x13_1) .attribute unaligned_access, 0 .attribute stack_align, 16 .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - LI(x2,0) //Load a value 0 in x2 which is later used to write the mseccfg csr - RVTEST_SIGUPD(x13,x2) //Update the signature - csrw mseccfg, x2 //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared - csrr x3,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY - //------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- - +//----------------------------------------------------------------------------------------------------------------------- + + csrw mseccfg, zero //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled with lock is set,PMP TOR is configured | | with RWX enabled and PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L |PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + + +//------------------ Configuring 2 regions as mentioned above-------------------------------------------------- csrw satp, zero //Disable address translation. - LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS SET and permission is read,write and execute - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------- Region configured ---------------------------------------- - - //------------------ Configuring a pmp region 1------------------------------------- - - LI(x4, 0x20004005) //Starting address 80010010 upto 80010020 is configured - csrw pmpaddr1, x4 //Updated pmpaddr0 to define PMP region consisting + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting csrr x5, pmpaddr1 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_R | PMP_W | PMP_X | PMP_NAPOT) //LOCKED BIT IS SET and permission is read,write and execute - slli x6,x6,8 //shifting left 8 bits to set configuration for pmpaddr1 - csrs pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------- Region configured ---------------------------------------- - - //------------------ Configuring a pmp region 2------------------------------------- - - LI(x4, 0x2000400D) //Starting address 80010030 upto 80010040 is configured - csrw pmpaddr2, x4 //Updated pmpaddr0 to define PMP region consisting + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr2 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_R | PMP_W | PMP_X | PMP_NAPOT) //LOCKED BIT IS SET and permission is read,write and execute - slli x6,x6,16 //shifting left 16 bits to set configuration for pmpaddr2 - csrs pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------- Region configured ---------------------------------------- - - //------------------ Configuring a pmp region 3------------------------------------- - - LI(x4, 0x20004011) //Starting address 80010044 and from this 4 bytes are configured - csrw pmpaddr3, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - LI(x6, PMP_R | PMP_W | PMP_X | PMP_NA4) //LOCKED BIT IS SET and permission is read,write and execute - slli x6,x6,24 //shifting left 24 bits to set configuration for pmpaddr1 - csrs pmpcfg0, x6 + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 + csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------- Region configured ---------------------------------------- - + //--------------------------------------------------------------------------------------------------------- + nop csrr x8, mseccfg //Verify the value to double check mseccfg is zero RVTEST_SIGUPD(x13,x8) //Update the signature - LI(x9,4) //load x9 with value 4 to set mseccfg.RLB which is at bit 3 in mseccfg + LI(x9,setRLB) //load x9 with value to set mseccfg.RLB which is at bit 3 in mseccfg csrw mseccfg, x9 //Setting mseccfg.RLB csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is still unset(If it is, then test is passed) RVTEST_SIGUPD(x13,x10) //Update the signature + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) + .fill 3*(XLEN/32),4,0x12345678 +exit: #endif # --------------------------------------------------------------------------------------------- @@ -133,4 +155,5 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +PMP_region_High: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S index 4ac5df362..d222f0466 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S @@ -25,43 +25,112 @@ RVTEST_SIGBASE( x13,signature_x13_1) .attribute unaligned_access, 0 .attribute stack_align, 16 .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - LI(x2,0) //Load a value 0 in x2 which is later used to write the mseccfg csr - RVTEST_SIGUPD(x13,x2) //Update the signature - csrw mseccfg, x2 //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared - csrr x3,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY -//------------------ Configuring a pmp region 0 (This region is for instruction memory instructions are placed in this region)----------- +//----------------------------------------------------------------------------------------------------------------------- + csrw mseccfg, zero //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + + +//------------------ Configuring 2 regions as mentioned above-------------------------------------------------- csrw satp, zero //Disable address translation. - LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS clear and permission is read,write and execute + + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------- Region configured ---------------------------------------- - + //--------------------------------------------------------------------------------------------------------- + nop csrr x8, mseccfg //Verify the value to double check mseccfg is zero RVTEST_SIGUPD(x13,x8) //Update the signature - LI(x9,4) //load x9 with value 4 to set mseccfg.RLB which is at bit 3 in mseccfg + LI(x9,setRLB) //load x9 with value to set mseccfg.RLB which is at bit 3 in mseccfg csrw mseccfg, x9 //Setting mseccfg.RLB - csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is set now(If it is,then test is passed) + csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is still unset(If it is, then test is passed) RVTEST_SIGUPD(x13,x10) //Update the signature + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) + .fill 3*(XLEN/32),4,0x12345678 +exit: #endif # --------------------------------------------------------------------------------------------- @@ -86,4 +155,5 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END \ No newline at end of file +PMP_region_High: +RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S index 871bc64e7..83fb581a8 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S @@ -21,83 +21,184 @@ rvtest_entry_point: RVMODEL_BOOT RVTEST_CODE_BEGIN #ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_08) + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_07) RVTEST_SIGBASE( x13,signature_x13_1) .option nopic .attribute unaligned_access, 0 .attribute stack_align, 16 .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +#define clear_cf_of_Region3 0xFFFFFF00 + + main: - LI(x1,0x44444444) //Load a value in a register which signifies we are in main + LI(x1,test_value) //Load a value in a register which signifies we are in main RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - LI(x2,4) //Load a value 4 in x2 to set mseccfg.RLB - RVTEST_SIGUPD(x13,x2) //Update the signature - csrw mseccfg, x2 //Writing 4 to mseccfg and in specific mseccfg.RLB is set - csrr x3,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value - - //------------------ Configuring a pmp region 0------------------------------------- - + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and with lock clear PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +TEST_FOR_EXECUTION |````````````````````````````````````````````````````````````````````````````` | RAM_LOCATION_FOR_TEST |````````````````````````````````````````````````````````````````````````````` | + | [Region2] from TEST_FOR_EXECUTION till exit | | [Region3] from RAM_LOCATION_FOR_TEST till TEST_FOR_EXECUTION | + | with X enabled and lock is clear and PMP TOR type is configured | | with X enabled and lock is set and PMP TOR type is configured | + till | this is the region contains our testing code for checkings RWX on region 3 | till | this is the region from where we will perform RWX to check our cfg and tests | + |for this purpose we have loaded TEST_FOR_EXECUTION addres into | |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres into | + exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | TEST_FOR_EXECUTION | pmpaddr5 and TEST_FOR_EXECUTION into pmpaddr6, pmpcfg1 [24:16] are used for cfg + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +# define PMPADDRESS3 TEST_FOR_EXECUTION // value to be loaded pmpaddr3 to declare region2 start +# define PMPADDRESS4 exit // value to be loaded pmpaddr4 to declare region2 end +# define PMPREGION2 ((( PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr5 to declare region3 start +#define PMPADDRESS6 TEST_FOR_EXECUTION // value to be loaded pmpaddr6 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 +#define NEW_PMPREGION3 (((PMP_L | PMP_R | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test + +//------------------ Configuring 3 regions as mentioned above-------------------------------------------------- csrw satp, zero //Disable address translation. - LI(x4, 0x20004000) //Starting address 0 upto 0x80010000 is configured - csrw pmpaddr0, x4 //write pmpaddr0 to define PMP region from 0 upto 0x80010000 + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - LI(x6, PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR) //LOCKED BIT IS set and permission is read,write and execute - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------- Region configured ---------------------------------------- + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap - //------------------ Configuring a pmp region 1------------------------------------- - - LI(x4, 0x20004005) //Starting address 80010010 upto 80010020 is configured - csrw pmpaddr1, x4 //write pmpaddr1 to define PMP region consisting of 16 bytes from 80010010 upto 80010020 + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting csrr x5, pmpaddr1 //Verify its value by reading back nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LI(x6, PMP_L | PMP_X | PMP_NAPOT) //LOCKED BIT IS SET and permission is execute - slli x6,x6,8 //shifting left 8 bits to set configuration for pmpaddr1 - csrs pmpcfg0, x6 + + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS3) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 + csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------- Region configured ---------------------------------------- - - LI(x7,0x80010010) //Load the address of pmp region 1 - sw x1,0(x7) //Perform writes in first 4 bytes. It should trap because no writes permission - sw x1,4(x7) //Perform writes in next 4 bytes. It should trap because no writes permission - sw x1,8(x7) //Perform writes in next 4 bytes. It should trap because no writes permission - sw x1,12(x7) //Perform writes in next 4 bytes. It should trap because no writes permission - nop - lw x1,0(x7) //Perform read in first 4 bytes. It should trap because no reads permission - lw x1,4(x7) //Perform read in next 4 bytes. It should trap because no read permission - lw x1,8(x7) //Perform read in next 4 bytes. It should trap because no read permission - lw x1,12(x7) //Perform read in next 4 bytes. It should trap because no read permission - - LI(x8,0xFFFFFF00) - csrc pmpcfg0,x8 //clears the configuration of pmpaddr1(region1) - LI(x10, PMP_L | PMP_W | PMP_R | PMP_X | PMP_NAPOT) //Updated configuration LOCKED BIT IS SET and permission is read, write and execute - slli x10,x10,8 //shifting left 8 bits to set configuration for pmpaddr1 - csrs pmpcfg0, x10 - csrr x11,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x11) //Update the signature + LI(x6, PMPREGION2 | PMPREGION3) //Permission for Region 2 is X with L is clear and for Region 3 is X with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + LI(x2,test_value) nop + jal TEST_FOR_EXECUTION //Jump from here to our testing code will generate load and store access fault bcz we do not have a RW permission for region3 + LI(x8,clear_cf_of_Region3) + csrc pmpcfg1, x8 //Clear the configuration of region3 + LI(x9,NEW_PMPREGION3) + csrs pmpcfg1, x9 //Update the configuration to give RW permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + jal TEST_FOR_EXECUTION //Jump from here to our testing code will now not generate load and store access fault bcz we have updated the permission for region3 - sw x1,0(x7) //Perform writes in first 4 bytes. It should not trap now - sw x1,4(x7) //Perform writes in next 4 bytes. It should not trap now - sw x1,8(x7) //Perform writes in next 4 bytes. It should not trap now - sw x1,12(x7) //Perform writes in next 4 bytes. It should not trap now - nop - lw x1,0(x7) //Perform read in first 4 bytes. It should not trap now - lw x1,4(x7) //Perform read in next 4 bytes. It should not trap now - lw x1,8(x7) //Perform read in next 4 bytes. It should not trap now - lw x1,12(x7) //Perform read in next 4 bytes. It should not trap now - nop + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 4*(XLEN/32),4,0x12345678 +TEST_FOR_EXECUTION: //This is the region which contains code for testing our RAM_LOCATION_FOR_TEST region + LA(x11,RAM_LOCATION_FOR_TEST) + sw x2,0(x11) + nop + lw x12,0(x11) + nop + ret +exit: #endif # --------------------------------------------------------------------------------------------- @@ -122,4 +223,5 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif +PMP_region_High: RVMODEL_DATA_END From 95eda5b5e0a1ac84e7c361bd2b54c3ef89c5c29f Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Wed, 16 Nov 2022 13:56:48 +0500 Subject: [PATCH 3/7] ePMP_08 is updated added generic RWX macro --- .../rv32i_m/privilege/src/ePMP_08.S | 57 ++++++++++++------- 1 file changed, 36 insertions(+), 21 deletions(-) diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S index 83fb581a8..6ff6c7edd 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S @@ -44,6 +44,23 @@ RVTEST_SIGBASE( x13,signature_x13_1) #define clear_cf_of_Region3 0xFFFFFF00 +//------------------------------This macro is used for testing the RWX for region 3(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + main: @@ -71,7 +88,7 @@ main: csrr x2,mseccfg //Verify its value by reading back RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value -/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- Region0 Region1 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | @@ -83,12 +100,12 @@ main: . Region2 Region3 -TEST_FOR_EXECUTION |````````````````````````````````````````````````````````````````````````````` | RAM_LOCATION_FOR_TEST |````````````````````````````````````````````````````````````````````````````` | - | [Region2] from TEST_FOR_EXECUTION till exit | | [Region3] from RAM_LOCATION_FOR_TEST till TEST_FOR_EXECUTION | - | with X enabled and lock is clear and PMP TOR type is configured | | with X enabled and lock is set and PMP TOR type is configured | - till | this is the region contains our testing code for checkings RWX on region 3 | till | this is the region from where we will perform RWX to check our cfg and tests | - |for this purpose we have loaded TEST_FOR_EXECUTION addres into | |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres into | - exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | TEST_FOR_EXECUTION | pmpaddr5 and TEST_FOR_EXECUTION into pmpaddr6, pmpcfg1 [24:16] are used for cfg +RETURN_INSTRUCTION |````````````````````````````````````````````````````````````````````````````` | RAM_LOCATION_FOR_TEST |````````````````````````````````````````````````````````````````````````````` | + | [Region2] from RETURN_INSTRUCTION till exit | | [Region3] from RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with X enabled and lock is clear and PMP TOR type is configured | | with nothing enabled and lock is set and PMP TOR type is configured | + till | this is the region contains return instruction, for this we used region 3 | till | this is the region from where we will perform RWX to check our cfg and tests | + |for this purpose we have loaded RETURN_INSTRUCTION addres into | |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres into | + exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | RETURN_INSTRUCTION | pmpaddr5 and RETURN_INSTRUCTION into pmpaddr6, pmpcfg1 [24:16] are used for cfg ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ @@ -99,13 +116,13 @@ TEST_FOR_EXECUTION |``````````````````````````````````````````````````````````` #define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end #define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 -# define PMPADDRESS3 TEST_FOR_EXECUTION // value to be loaded pmpaddr3 to declare region2 start +# define PMPADDRESS3 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region2 start # define PMPADDRESS4 exit // value to be loaded pmpaddr4 to declare region2 end # define PMPREGION2 ((( PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 #define PMPADDRESS5 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr5 to declare region3 start -#define PMPADDRESS6 TEST_FOR_EXECUTION // value to be loaded pmpaddr6 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 +#define PMPADDRESS6 RETURN_INSTRUCTION // value to be loaded pmpaddr6 to declare region3 end +#define PMPREGION3 (((PMP_L |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 #define NEW_PMPREGION3 (((PMP_L | PMP_R | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test //------------------ Configuring 3 regions as mentioned above-------------------------------------------------- @@ -180,24 +197,22 @@ TEST_FOR_EXECUTION |``````````````````````````````````````````````````````````` LI(x2,test_value) nop - jal TEST_FOR_EXECUTION //Jump from here to our testing code will generate load and store access fault bcz we do not have a RW permission for region3 + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX) LI(x8,clear_cf_of_Region3) - csrc pmpcfg1, x8 //Clear the configuration of region3 + csrc pmpcfg1, x8 //Clear the configuration of region3 LI(x9,NEW_PMPREGION3) - csrs pmpcfg1, x9 //Update the configuration to give RW permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) - jal TEST_FOR_EXECUTION //Jump from here to our testing code will now not generate load and store access fault bcz we have updated the permission for region3 + csrs pmpcfg1, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST j exit RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 4*(XLEN/32),4,0x12345678 -TEST_FOR_EXECUTION: //This is the region which contains code for testing our RAM_LOCATION_FOR_TEST region - LA(x11,RAM_LOCATION_FOR_TEST) - sw x2,0(x11) - nop - lw x12,0(x11) - nop + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: ret + exit: #endif From bc1621413aeeb912512ae3a3e4fd31cef0d58cc6 Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Mon, 5 Dec 2022 12:09:01 +0500 Subject: [PATCH 4/7] Written test of ePMP From file ePMP09.S to ePMP_46.S from the test plan attach in each file --- .../rv32i_m/privilege/src/ePMP_09.S | 81 +++++ .../rv32i_m/privilege/src/ePMP_10.S | 217 +++++++++++++ .../rv32i_m/privilege/src/ePMP_11.S | 293 ++++++++++++++++++ .../rv32i_m/privilege/src/ePMP_12.S | 267 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_13.S | 268 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_14.S | 275 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_15.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_16.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_17.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_18.S | 276 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_19.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_20.S | 276 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_21.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_22.S | 276 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_23.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_24.S | 275 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_25.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_26.S | 275 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_27.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_28.S | 275 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_29.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_30.S | 276 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_31.S | 273 ++++++++++++++++ .../rv32i_m/privilege/src/ePMP_32.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_33.S | 278 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_34.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_35.S | 278 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_36.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_37.S | 278 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_38.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_39.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_40.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_41.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_42.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_43.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_44.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_45.S | 277 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_46.S | 277 +++++++++++++++++ 38 files changed, 10222 insertions(+) create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S new file mode 100644 index 000000000..86b63f06b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S @@ -0,0 +1,81 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +//This assembly file tests if we set mseccfg.MMWP=1 once, then mseccfg.MMWP cannot be written\modified +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_09) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define clear_mseccfg 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + + LI(x2,setMMWP) //Load a value to set MMWP bit in mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + csrw mseccfg,x2 //Write mseccfg with MMWP bit set + csrr x3,mseccfg //Read back to confirm its value + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + csrw mseccfg,zero //write zero to mseccfg csr + csrr x3,mseccfg //Read back to confirm its value(If it remains same, it signifies test is passing else if it is changed or modified then test is failing) + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x2,clear_mseccfg) + RVTEST_SIGUPD(x13,x2) //Update the signature + csrc mseccfg,x2 //Try to clear mseccfg + csrr x3,mseccfg //Read back to confirm its value(If it remains same, it signifies test is passing else if it is changed or modified then test is failing) + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S new file mode 100644 index 000000000..5fbab0fe0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S @@ -0,0 +1,217 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests "If mseccfg.MMWP=1 then default PMP policy for M-mode when accessing memory regions that don’t +//have a matching PMP rule, to denied instead of ignored." + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_10) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 3(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ + + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and with lock clear PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + + . Region2 +RETURN_INSTRUCTION |````````````````````````````````````````````````````````````````````````````` | + | [Region2] from RETURN_INSTRUCTION till exit | + | with X enabled and lock is clear and PMP TOR type is configured | + till | this is the region contains return instruction, for this we used region 3 | + |for this purpose we have loaded RETURN_INSTRUCTION addres into | + exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` + +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +# define PMPADDRESS3 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region2 start +# define PMPADDRESS4 exit // value to be loaded pmpaddr4 to declare region2 end +# define PMPREGION2 ((( PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +//------------------ Configuring 3 regions as mentioned above and setting MMWP-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS3) //Starting address RETURN_INSTRUCTION is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS4) //Ending address exit is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 + csrw pmpcfg0, x6 //Write the configuration in correspondind CSR + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMMWP) + csrw mseccfg, x2 //Setting mseccfg.MMWP + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x6, PMPREGION2 ) //Permission for Region 2 is X with L is clear + csrw pmpcfg1, x6 //Write the configuration in correspondind CSR + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz region is not configured with mseccfg.MMWP set) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S new file mode 100644 index 000000000..898f9e65d --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S @@ -0,0 +1,293 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests If (mseccfg.MMWP=0 and mseccfg.MML=1) then PMP policy for S/U-mode when accessing +//memory regions that don’t have a matching PMP rule, to denied. + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_11) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +#define clear_cf_of_Region0 0xFF00FFFF + +//------------------------------This macro is used for testing the RWX for region 3(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | + | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and with lock clear PMP TOR type is configured | + till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +RETURN_INSTRUCTION |````````````````````````````````````````````````````````````````````````````` | RAM_LOCATION_FOR_TEST |````````````````````````````````````````````````````````````````````````````` | + | [Region2] from RETURN_INSTRUCTION till exit | | [Region3] from RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with X enabled and lock is clear and PMP TOR type is configured | | with nothing enabled and lock is set and PMP TOR type is configured | + till | this is the region contains return instruction, for this we used region 3 | till | this is the region from where we will perform RWX to check our cfg and tests | + |for this purpose we have loaded RETURN_INSTRUCTION addres into | |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres into | + exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | RETURN_INSTRUCTION | pmpaddr5 and RETURN_INSTRUCTION into pmpaddr6, pmpcfg1 [24:16] are used for cfg + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 +#define NEW_PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 1 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region2 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 2 +#define NEW_PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region3 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region3 end +#define PMPREGION4 (((PMP_L | PMP_W | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 3 +#define NEW_PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test + + +//------------------ Configuring 3 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS3) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS7) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + // RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is X with L is clear and for Region 3 is X with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + //RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 2 is X with L is clear and for Region 3 is X with lock set + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + //RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + //RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + //LI(x8,clear_cf_of_Region0) + //csrc pmpcfg0, x8 //Clear the configuration of region3 + LI(x9,NEW_PMPREGION0|NEW_PMPREGION1) + csrw pmpcfg0, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + nop + LI(x9,NEW_PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + nop + LI(x9,NEW_PMPREGION4) + csrw pmpcfg2, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + nop + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + LI(x2,test_value) + + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX) + // LI(x8,clear_cf_of_Region3) + // csrc pmpcfg1, x8 //Clear the configuration of region3 + // LI(x9,NEW_PMPREGION3) + // csrs pmpcfg1, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + // VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST + nop + // RVTEST_GOTO_MMODE + nop + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S new file mode 100644 index 000000000..b9e304705 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S @@ -0,0 +1,267 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests If (mseccfg.MMWP=0 and mseccfg.MML=1) then PMP policy for M-mode when accessing +//memory regions that don’t have a matching PMP rule, for R/W, to ignore. + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_12) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS exitLabel + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \exitLabel // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | + | with RX enabled and with lock set PMP TOR type is configured which signifies| + till |it is a locked read execute region for m mode,here trap handler code which req| + |execute perm lies that is why execute region is configured, we have loaded | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region1 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region1 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region3 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region3 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +//------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LA(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + + nop + LI(x2,test_value) + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST exit //macro is called with address as RAM_LOCATION_FOR_TEST and exittlabel as exit (Read and write is permitted in M mode if region is not configured with MML set) + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S new file mode 100644 index 000000000..0de3a230d --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S @@ -0,0 +1,268 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests If (mseccfg.MMWP=0 and mseccfg.MML=1) then PMP policy for M-mode when accessing +//memory regions that don’t have a matching PMP rule, for X, to denied. + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_13) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS exitLabel + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \exitLabel // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | + | with RX enabled and with lock set PMP TOR type is configured which signifies| + till |it is a locked read execute region for m mode,here trap handler code which req| + |execute perm lies that is why execute region is configured, we have loaded | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region1 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region1 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region3 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region3 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +//------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LA(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x2,test_value) + jal RAM_LOCATION_FOR_TEST + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S new file mode 100644 index 000000000..ee8f223ce --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S @@ -0,0 +1,275 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +//This assembly file tests if we set mseccfg.MML=1 once, then mseccfg.MML cannot be written\modified +// + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_14) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +#define clear_mseccfg 0xFFFFFFFF +//------------------------------This macro is used for testing the RWX for region (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS exitLabel + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \exitLabel // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | + | with RX enabled and with lock set PMP TOR type is configured which signifies| + till |it is a locked read execute region for m mode,here trap handler code which req| + |execute perm lies that is why execute region is configured, we have loaded | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region1 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region1 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region3 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region3 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +//------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop //Added nop in case of trap + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + nop //Added nop in case of trap + RVTEST_SIGUPD(x13,x5) //Update the signature + nop + + LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LA(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + csrw mseccfg,zero + csrr x3,mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x2,clear_mseccfg) + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + csrc mseccfg,x2 + csrr x3,mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S new file mode 100644 index 000000000..69e6e5d27 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests, if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region + //and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_15) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with nothing enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted and execute is not) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S new file mode 100644 index 000000000..affd9efc2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_16) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with nothing enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 no permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S new file mode 100644 index 000000000..8d2a3855e --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests, if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an Inaccessible region + //and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_17) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted and execute is not) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S new file mode 100644 index 000000000..a6ca4bc69 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S @@ -0,0 +1,276 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an execute only region for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_18) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with X enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_TOR | PMP_X)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 X for S mode + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RW trap bcz permission is not to do RW for S mode and X is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S new file mode 100644 index 000000000..ac02a2cb9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, +//and read and write for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_19) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is read,write for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is permitted and execute is not) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S new file mode 100644 index 000000000..a17f63da7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S @@ -0,0 +1,276 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, +//and read only region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_20) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with W enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 R permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give WX trap bcz permission is not to do WX for S mode and R is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S new file mode 100644 index 000000000..29f099fd4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, + //read and write for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_21) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is read,write for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is permitted and execute is not) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S new file mode 100644 index 000000000..4a2e3f0c9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S @@ -0,0 +1,276 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, +// read and write for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_22) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with WX enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RW permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give X trap bcz permission is not to do X for S mode and RW is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S new file mode 100644 index 000000000..a304253fd --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_23) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with R enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write,execute is not permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S new file mode 100644 index 000000000..4f32d650a --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S @@ -0,0 +1,275 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is a read only region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_24) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with R enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 R permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give WX trap bcz permission is not to do WX for S mode and R is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S new file mode 100644 index 000000000..407ea5d08 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_25) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S new file mode 100644 index 000000000..bfef4a4a0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S @@ -0,0 +1,275 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is a read and execute region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_26) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with RX enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_R |PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RX permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give W trap bcz permission is not to do W for S mode and RX is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S new file mode 100644 index 000000000..82eb99ab6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_11) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RW enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted ) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S new file mode 100644 index 000000000..27441adcc --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S @@ -0,0 +1,275 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is a read and write region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_28) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with RW enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_R |PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RW permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give X trap bcz permission is not to do X for S mode and RW is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S new file mode 100644 index 000000000..85dc2b62b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_29) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RWX enabled and lock is clear PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S new file mode 100644 index 000000000..10f5647ee --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S @@ -0,0 +1,276 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is a read,write and execute region +//for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_30) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with RWX enabled and lock is clear PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RWX permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give no trap bcz permission is to do RWX for S mode ) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S new file mode 100644 index 000000000..a0dd3c1b8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S @@ -0,0 +1,273 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_31) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with nothing enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S new file mode 100644 index 000000000..4c12d442c --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is a locked Inaccessible region +// and access Exception should be thrown for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_32) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with nothing enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 no permissions + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode ) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S new file mode 100644 index 000000000..f7593a58d --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S @@ -0,0 +1,278 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is a locked execute only region +// for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_33) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is X for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is not permitted, execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S new file mode 100644 index 000000000..bb2d15182 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is an Inaccessible region +// and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_34) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with X enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 X permissions with L set + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S new file mode 100644 index 000000000..f2bb8d010 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S @@ -0,0 +1,278 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, + //execute only for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_35) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is X for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is not permitted, execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S new file mode 100644 index 000000000..7ee6fb0b2 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, +//execute only for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_36) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with W enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 W and L are set + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RW trap bcz permission is not to do RW for S mode and X is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S new file mode 100644 index 000000000..f77d492b7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S @@ -0,0 +1,278 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, +// read and execute for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_37) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is RX for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(write is not permitted, Read and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S new file mode 100644 index 000000000..a2f6b57a7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, +// execute only for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_38) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with WX enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 WX is set with locked + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RW trap bcz permission is not to do RW for S mode and X is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S new file mode 100644 index 000000000..d2f55ef20 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is a locked read only region +// for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_39) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with R enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is R for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute and write is not permitted, read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S new file mode 100644 index 000000000..d3b9ef80f --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_40) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with R enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 R is set with locked + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S new file mode 100644 index 000000000..d552e50ba --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is an +// Inaccessible region and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_41) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with RX enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RX is set with locked + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S new file mode 100644 index 000000000..c5adc3849 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is a locked read and execute region +// for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_42) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R |PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is RX for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(write is not permitted,Read and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S new file mode 100644 index 000000000..990d7c77c --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is a locked read and write region +// for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_43) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RW enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is RW for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is permitted, execute is not permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S new file mode 100644 index 000000000..e8d9098cf --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is an Inaccessible region +// and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_44) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with RW enabled and lock is SET PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R |PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RW is set with lock + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S new file mode 100644 index 000000000..63a8c33fe --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region + //and read only region for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_45) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RWX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L |PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is R for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute and write is not permitted, read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S new file mode 100644 index 000000000..6acda7e1d --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S @@ -0,0 +1,277 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region +// and read only region for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_46) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | + |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + |with lock set PMP TOR type is configured which signifies it is a locked read | | with RWX enabled and lock is set PMP TOR type is configured which | + till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 + + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start +#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end +#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 + + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 + nop + LI(x9,PMPREGION3|PMPREGION2) + csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes + nop + LI(x9,PMPREGION4|PMPREGION5) + csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RWX is set with locked + nop + //--------------------------------------------------------------------------------------------------------- + + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give WX trap bcz permission is not to do WX for S mode and R is successful for S mode) + nop + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file From cea82950fdb5af6f1b2cea065d17ad44122a68fe Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Mon, 5 Dec 2022 13:58:19 +0500 Subject: [PATCH 5/7] Written test of ePMP From file ePMP47.S to ePMP_54.S from the test plan attach in each file --- .../rv32i_m/privilege/src/ePMP_47.S | 271 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_48.S | 271 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_49.S | 271 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_50.S | 271 +++++++++++++++++ .../rv32i_m/privilege/src/ePMP_51.S | 274 ++++++++++++++++++ .../rv32i_m/privilege/src/ePMP_52.S | 274 ++++++++++++++++++ .../rv32i_m/privilege/src/ePMP_53.S | 274 ++++++++++++++++++ .../rv32i_m/privilege/src/ePMP_54.S | 274 ++++++++++++++++++ 8 files changed, 2180 insertions(+) create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S new file mode 100644 index 000000000..a35032f0a --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S @@ -0,0 +1,271 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_47) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region 5 is X with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S new file mode 100644 index 000000000..7f201cb99 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S @@ -0,0 +1,271 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=0)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_48) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region W with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S new file mode 100644 index 000000000..f75c3c274 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S @@ -0,0 +1,271 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_49) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W| PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region WX with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S new file mode 100644 index 000000000..58060c1e5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S @@ -0,0 +1,271 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=1,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_50) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region RX with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S new file mode 100644 index 000000000..ba0377434 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S @@ -0,0 +1,274 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_51) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region X with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S new file mode 100644 index 000000000..0026dd8d4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S @@ -0,0 +1,274 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=0)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_52) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region W with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S new file mode 100644 index 000000000..9989f374f --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S @@ -0,0 +1,274 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_53) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region WX with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S new file mode 100644 index 000000000..7852778db --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S @@ -0,0 +1,274 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=1,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_54) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- + Region0 Region1 + 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| + | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | + |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | + till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | + |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | + RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| + `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` + + + . Region2 Region3 +Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | + | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | + | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | + till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | + |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| +PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` + + Region4 Region5 + rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | + | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | + | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is set PMP TOR type is configured which | + till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | + |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | + PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | + ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start +#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end +#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 + +#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start +#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end +#define PMPREGION5 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 + +//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr8 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr9 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr10 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything + csrw pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION5) //Permission for Region RX with locked for M mode + csrs pmpcfg2, x6 + csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file From 711108e0499080c5fc6c51516b4de92b79861349 Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Mon, 5 Dec 2022 14:02:14 +0500 Subject: [PATCH 6/7] Written test of ePMP From file ePMP_51.S to ePMP_54.S from the test plan attach in each file --- riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S | 4 ++-- riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S | 4 ++-- riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S | 4 ++-- riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S index ba0377434..2f7b22c83 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S @@ -8,8 +8,8 @@ // // //This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=0,X=1)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges #define rvtest_strap_routine #include "model_test.h" diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S index 0026dd8d4..f3c2382c0 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S @@ -8,8 +8,8 @@ // // //This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=0)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges #define rvtest_strap_routine #include "model_test.h" diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S index 9989f374f..aa7938a42 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S @@ -8,8 +8,8 @@ // // //This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=1)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges #define rvtest_strap_routine #include "model_test.h" diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S index 7852778db..c517816f6 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S @@ -8,8 +8,8 @@ // // //This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=1,W=0,X=1)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges #define rvtest_strap_routine #include "model_test.h" From 020141b238f08bfdbe2021aae3424f10337f5882 Mon Sep 17 00:00:00 2001 From: Hamza Khan Date: Mon, 12 Dec 2022 13:06:46 +0500 Subject: [PATCH 7/7] Added support of ePMP In each file test motive and expected output is written, in addition the link of the testplan is also provided which is being followed --- riscv-test-suite/env/encoding.h | 2 + .../privilege/src/{ => ePMP32}/ePMP_01.S | 2 +- .../privilege/src/{ => ePMP32}/ePMP_02.S | 2 +- .../privilege/src/{ => ePMP32}/ePMP_03.S | 71 ++--- .../privilege/src/{ => ePMP32}/ePMP_04.S | 73 ++--- .../privilege/src/{ => ePMP32}/ePMP_05.S | 3 +- .../rv32i_m/privilege/src/ePMP32/ePMP_06.S | 136 ++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_07.S | 136 ++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_08.S | 201 ++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_09.S | 134 ++++++++ .../privilege/src/{ => ePMP32}/ePMP_10.S | 67 +--- .../privilege/src/ePMP32/ePMP_11_SMode.S | 228 ++++++++++++++ .../privilege/src/ePMP32/ePMP_11_UMode.S | 228 ++++++++++++++ .../privilege/src/{ => ePMP32}/ePMP_12.S | 86 ++--- .../privilege/src/{ => ePMP32}/ePMP_13.S | 128 +++----- .../privilege/src/{ => ePMP32}/ePMP_14.S | 135 +++----- .../rv32i_m/privilege/src/ePMP32/ePMP_15.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_16_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_16_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_17.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_18_SMode.S | 237 ++++++++++++++ .../privilege/src/ePMP32/ePMP_18_UMode.S | 237 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_19.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_20_SMode.S | 237 ++++++++++++++ .../privilege/src/ePMP32/ePMP_20_UMode.S | 237 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_21.S | 231 ++++++++++++++ .../privilege/src/ePMP32/ePMP_22_SMode.S | 237 ++++++++++++++ .../privilege/src/ePMP32/ePMP_22_UMode.S | 237 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_23.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_24_SMode.S | 236 ++++++++++++++ .../privilege/src/ePMP32/ePMP_24_UMode.S | 236 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_25.S | 234 ++++++++++++++ .../privilege/src/ePMP32/ePMP_26_SMode.S | 236 ++++++++++++++ .../privilege/src/ePMP32/ePMP_26_UMode.S | 236 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_27.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_28_SMode.S | 236 ++++++++++++++ .../privilege/src/ePMP32/ePMP_28_UMode.S | 236 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_29.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_30_SMode.S | 237 ++++++++++++++ .../privilege/src/ePMP32/ePMP_30_UMode.S | 237 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_31.S | 230 ++++++++++++++ .../privilege/src/ePMP32/ePMP_32_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_32_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_33.S | 234 ++++++++++++++ .../privilege/src/ePMP32/ePMP_34_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_34_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_35.S | 234 ++++++++++++++ .../privilege/src/ePMP32/ePMP_36_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_36_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_37.S | 234 ++++++++++++++ .../privilege/src/ePMP32/ePMP_38_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_38_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_39.S | 233 ++++++++++++++ .../privilege/src/ePMP32/ePMP_40_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_40_UMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_41_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_41_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_42.S | 233 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_43.S | 233 ++++++++++++++ .../privilege/src/ePMP32/ePMP_44_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_44_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_45.S | 233 ++++++++++++++ .../privilege/src/ePMP32/ePMP_46_SMode.S | 238 ++++++++++++++ .../privilege/src/ePMP32/ePMP_46_UMode.S | 238 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_47.S | 230 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_48.S | 230 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_49.S | 230 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_50.S | 230 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_51.S | 234 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_52.S | 234 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_53.S | 234 ++++++++++++++ .../rv32i_m/privilege/src/ePMP32/ePMP_54.S | 234 ++++++++++++++ .../rv32i_m/privilege/src/ePMP_06.S | 159 ---------- .../rv32i_m/privilege/src/ePMP_07.S | 159 ---------- .../rv32i_m/privilege/src/ePMP_08.S | 242 --------------- .../rv32i_m/privilege/src/ePMP_09.S | 81 ----- .../rv32i_m/privilege/src/ePMP_11.S | 293 ------------------ .../rv32i_m/privilege/src/ePMP_15.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_16.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_17.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_18.S | 276 ----------------- .../rv32i_m/privilege/src/ePMP_19.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_20.S | 276 ----------------- .../rv32i_m/privilege/src/ePMP_21.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_22.S | 276 ----------------- .../rv32i_m/privilege/src/ePMP_23.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_24.S | 275 ---------------- .../rv32i_m/privilege/src/ePMP_25.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_26.S | 275 ---------------- .../rv32i_m/privilege/src/ePMP_27.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_28.S | 275 ---------------- .../rv32i_m/privilege/src/ePMP_29.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_30.S | 276 ----------------- .../rv32i_m/privilege/src/ePMP_31.S | 273 ---------------- .../rv32i_m/privilege/src/ePMP_32.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_33.S | 278 ----------------- .../rv32i_m/privilege/src/ePMP_34.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_35.S | 278 ----------------- .../rv32i_m/privilege/src/ePMP_36.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_37.S | 278 ----------------- .../rv32i_m/privilege/src/ePMP_38.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_39.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_40.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_41.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_42.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_43.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_44.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_45.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_46.S | 277 ----------------- .../rv32i_m/privilege/src/ePMP_47.S | 271 ---------------- .../rv32i_m/privilege/src/ePMP_48.S | 271 ---------------- .../rv32i_m/privilege/src/ePMP_49.S | 271 ---------------- .../rv32i_m/privilege/src/ePMP_50.S | 271 ---------------- .../rv32i_m/privilege/src/ePMP_51.S | 274 ---------------- .../rv32i_m/privilege/src/ePMP_52.S | 274 ---------------- .../rv32i_m/privilege/src/ePMP_53.S | 274 ---------------- .../rv32i_m/privilege/src/ePMP_54.S | 274 ---------------- 117 files changed, 14405 insertions(+), 12323 deletions(-) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_01.S (99%) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_02.S (99%) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_03.S (51%) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_04.S (50%) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_05.S (95%) create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_06.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_07.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_08.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_09.S rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_10.S (59%) create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_UMode.S rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_12.S (60%) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_13.S (51%) rename riscv-test-suite/rv32i_m/privilege/src/{ => ePMP32}/ePMP_14.S (51%) create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_15.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_17.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_19.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_21.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_23.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_25.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_27.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_29.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_31.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_33.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_35.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_37.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_39.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_42.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_43.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_45.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_SMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_UMode.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_47.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_48.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_49.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_50.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_51.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_52.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_53.S create mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_54.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S delete mode 100644 riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S diff --git a/riscv-test-suite/env/encoding.h b/riscv-test-suite/env/encoding.h index 9d6d8f180..ee1d804a0 100644 --- a/riscv-test-suite/env/encoding.h +++ b/riscv-test-suite/env/encoding.h @@ -848,6 +848,7 @@ #define CSR_PMPADDR13 0x3bd #define CSR_PMPADDR14 0x3be #define CSR_PMPADDR15 0x3bf +#define CSR_MSECCFG 0x747 #define CSR_TSELECT 0x7a0 #define CSR_TDATA1 0x7a1 #define CSR_TDATA2 0x7a2 @@ -1342,6 +1343,7 @@ DECLARE_CSR(pmpaddr12, CSR_PMPADDR12) DECLARE_CSR(pmpaddr13, CSR_PMPADDR13) DECLARE_CSR(pmpaddr14, CSR_PMPADDR14) DECLARE_CSR(pmpaddr15, CSR_PMPADDR15) +DECLARE_CSR(mseccfg, CSR_MSECCFG) DECLARE_CSR(tselect, CSR_TSELECT) DECLARE_CSR(tdata1, CSR_TDATA1) DECLARE_CSR(tdata2, CSR_TDATA2) diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_01.S similarity index 99% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_01.S index 8cc4ceaac..40fa21307 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_01.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_01.S @@ -60,4 +60,4 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_02.S similarity index 99% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_02.S index ef271111f..4616625cb 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_02.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_02.S @@ -69,4 +69,4 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_03.S similarity index 51% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_03.S index 13b64f30f..b1127cf57 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_03.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_03.S @@ -27,6 +27,7 @@ RVTEST_SIGBASE( x13,signature_x13_1) .align 2 #define test_value 0x44444444 +#define EntireMemorySpace 0xFFFFFFFF #define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) #define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) @@ -36,7 +37,6 @@ RVTEST_SIGBASE( x13,signature_x13_1) #define PMP2_CFG_SHIFT 16 #define PMP3_CFG_SHIFT 24 - main: LI(x1,test_value) //Load a value in a register which signifies we are in main @@ -58,69 +58,50 @@ main: //----------------------------------------------------------------------------------------------------------------------- -/*-----------------------------------------------------------------Descritption of all regions---------------------------------------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled and PMP TOR type is configured | | with RWX enabled and PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - -#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 +/*-------------------------------Descritption of all regions used------------------------------------------------------ +{Region 0}-------->[Entire memory sapce] + [With Read,Write and execute permissions enable for that region and Lock is clear] -//------------------ Configuring 2 regions as mentioned above-------------------------------- - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap +------------------------------------------------------------------------------------------------------------------*/ - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap +#define PMPADDRESS0 EntireMemorySpace // value to be loaded in pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap +//------------------ Configuring 1 region as mentioned above-------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x2, PMPADDRESS0) // Starting address 0 upto whole memory is configured + srl x2, x2, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x2 // Updated pmpaddr0 to define PMP region consisting + csrr x3, pmpaddr0 // Verify its value by reading back + RVTEST_SIGUPD(x13,x3) // Update the signature + + LI(x4, PMPREGION0 ) //Permission for Region 0 is loaded + csrw pmpcfg0, x4 + csrr x5,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature //---------------------------------------------------------------------------------- RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + //-------------------------In S mode now--------------------------------------------- nop csrw mseccfg,zero //write mseccfg to know whether csrw is permitted(should trap bcz it is M mode csr) csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + RVTEST_SIGUPD(x13,x3) //Update the signature csrs mseccfg,zero //set mseccfg to know whether csrs is permitted(should trap bcz it is M mode csr) csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + RVTEST_SIGUPD(x13,x3) //Update the signature csrc mseccfg,zero //clear mseccfg to know whether csrc is permitted(should trap bcz it is M mode csr) csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + RVTEST_SIGUPD(x13,x3) //Update the signature + nop j exit @@ -155,4 +136,4 @@ gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif PMP_region_High: -RVMODEL_DATA_END +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_04.S similarity index 50% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_04.S index 76f115ed0..3be0cf981 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_04.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_04.S @@ -27,6 +27,7 @@ RVTEST_SIGBASE( x13,signature_x13_1) .align 2 #define test_value 0x44444444 +#define EntireMemorySpace 0xFFFFFFFF #define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) #define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) @@ -36,7 +37,6 @@ RVTEST_SIGBASE( x13,signature_x13_1) #define PMP2_CFG_SHIFT 16 #define PMP3_CFG_SHIFT 24 - main: LI(x1,test_value) //Load a value in a register which signifies we are in main @@ -58,74 +58,55 @@ main: //----------------------------------------------------------------------------------------------------------------------- -/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled and PMP TOR type is configured | | with RWX enabled and PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - -#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 +/*-------------------------------Descritption of all regions used------------------------------------------------- `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` +{Region 0}-------->[Entire memory sapce] + [With Read,Write and execute permissions enable for that region and Lock is clear] -//------------------ Configuring 2 regions as mentioned above-------------------------------- - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap +------------------------------------------------------------------------------------------------------------------*/ - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap +#define PMPADDRESS0 EntireMemorySpace // value to be loaded in pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap +//------------------ Configuring 1 region as mentioned above-------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x2, PMPADDRESS0) // Starting address 0 upto whole memory is configured + srl x2, x2, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x2 // Updated pmpaddr0 to define PMP region consisting + csrr x3, pmpaddr0 // Verify its value by reading back + RVTEST_SIGUPD(x13,x3) // Update the signature + + LI(x4, PMPREGION0 ) //Permission for Region 0 is loaded + csrw pmpcfg0, x4 + csrr x5,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature //---------------------------------------------------------------------------------- RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + //-------------------------In U mode now--------------------------------------------- nop csrw mseccfg,zero //write mseccfg to know whether csrw is permitted(should trap bcz it is M mode csr) csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + RVTEST_SIGUPD(x13,x3) //Update the signature csrs mseccfg,zero //set mseccfg to know whether csrs is permitted(should trap bcz it is M mode csr) csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + RVTEST_SIGUPD(x13,x3) //Update the signature csrc mseccfg,zero //clear mseccfg to know whether csrc is permitted(should trap bcz it is M mode csr) csrr x3,mseccfg //Read the value of mseccfg(should trap bcz it is M mode csr) + RVTEST_SIGUPD(x13,x3) //Update the signature + nop j exit -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) .fill 3*(XLEN/32),4,0x12345678 @@ -155,4 +136,4 @@ gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif PMP_region_High: -RVMODEL_DATA_END +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_05.S similarity index 95% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_05.S index d8826ef7c..884089190 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_05.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_05.S @@ -38,6 +38,7 @@ main: RVTEST_SIGUPD(x13,x1) //Update the signature LI(x2,setRLB | setMMWP | setMML) //Set immidiate as all legal values of mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value not x2,x2 //set 1's to all other fields except first 3 valid fields of mseccfg csrw mseccfg,x2 //write mseccfg to know whether fields are written csrr x3,mseccfg //Read the value of mseccfg to verify whether fields are written(It should remain zero bcz we have written to reserve fields) @@ -67,4 +68,4 @@ mtrap_sigptr: gpr_save: .fill 24*(XLEN/32),4,0xc9a8b7f1 #endif -RVMODEL_DATA_END +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_06.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_06.S new file mode 100644 index 000000000..38309d151 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_06.S @@ -0,0 +1,136 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests if we set (mseccfg.RLB=0 and at least one pmpcfg.L=1) then mseccfg.RLB canot be written\modified +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_06) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define EntireMemorySpace 0xFFFFFFFF + + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + csrw mseccfg, zero //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +/*-------------------------------Descritption of all regions used------------------------------------------------- ```` + +{Region 0}-------->[Entire memory sapce] + [With Read,Write and execute permissions enable for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 EntireMemorySpace // value to be loaded in pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +//------------------ Configuring 1 region as mentioned above-------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x2, PMPADDRESS0) // Starting address 0 upto whole memory is configured + srl x2, x2, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x2 // Updated pmpaddr0 to define PMP region consisting + csrr x3, pmpaddr0 // Verify its value by reading back + RVTEST_SIGUPD(x13,x3) // Update the signature + + LI(x4, PMPREGION0 ) //Permission for Region 0 is loaded + csrw pmpcfg0, x4 + csrr x5,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x5) //Update the signature + + //---------------------------------------------------------------------------------- + + csrr x6, mseccfg //Verify the value to double check mseccfg is zero + RVTEST_SIGUPD(x13,x6) //Update the signature + LI(x7,setRLB) //load x7 with value to set mseccfg.RLB which is at bit 3 in mseccfg + csrw mseccfg, x7 //Setting mseccfg.RLB + csrr x8, mseccfg //Read back the value of mseccfg to verify RLB is still unset(If it is, then test is passed) + RVTEST_SIGUPD(x13,x8) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) + .fill 3*(XLEN/32),4,0x12345678 + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_07.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_07.S new file mode 100644 index 000000000..6ef8312d1 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_07.S @@ -0,0 +1,136 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// This assembly file tests if we set (mseccfg.RLB=0 and pmpcfg.L=0) then mseccfg.RLB can be written\modified +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_07) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define EntireMemorySpace 0xFFFFFFFF + + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + csrw mseccfg, zero //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[Entire memory sapce] + [With Read,Write and execute permissions enable for that region and Lock is clear] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 EntireMemorySpace // value to be loaded in pmpaddr0 to declare region0 +#define PMPREGION0 ((( PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +//------------------ Configuring 1 region as mentioned above-------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x2, PMPADDRESS0) // Starting address 0 upto whole memory is configured + srl x2, x2, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x2 // Updated pmpaddr0 to define PMP region consisting + csrr x3, pmpaddr0 // Verify its value by reading back + RVTEST_SIGUPD(x13,x3) // Update the signature + + LI(x4, PMPREGION0 ) //Permission for Region 0 is loaded + csrw pmpcfg0, x4 + csrr x5,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x5) //Update the signature + + //---------------------------------------------------------------------------------- + + csrr x6, mseccfg //Verify the value to double check mseccfg is zero + RVTEST_SIGUPD(x13,x6) //Update the signature + LI(x7,setRLB) //load x7 with value to set mseccfg.RLB which is at bit 3 in mseccfg + csrw mseccfg, x7 //Setting mseccfg.RLB + csrr x8, mseccfg //Read back the value of mseccfg to verify RLB is set now(If it is, then test is passed) + RVTEST_SIGUPD(x13,x8) //Update the signature + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) + .fill 3*(XLEN/32),4,0x12345678 + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_08.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_08.S new file mode 100644 index 000000000..b334f0c06 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_08.S @@ -0,0 +1,201 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if we set (mseccfg.RLB=1 and pmpcfg.L=1) then pmp rules may be removed/modified and +//pmp entries may be edited + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_08) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +#define clear_cf_of_Region0 0x00FFFFFF + +//------------------------------This macro is used for testing the RWX for region 3(region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read,Write and execute permissions not enabled for that region and Lock is set] [Old configuration] + [With Read,Write and execute permissions enabled for that region and Lock is set] [New configuration] + +{Region 1}-------->[Entire memory sapce] + [With Read,Write and execute permissions enable for that region and Lock is clear] + +------------------------------------------------------------------------------------------------------------------*/ +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare start of region0 +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded in pmpaddr1 to declare end of region0 +#define PMPREGION0 (((PMP_L |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_R | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) //New Configuration for region 0 which will be used later to check our test + + +#define PMPADDRESS2 Start // Value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 EntireMemorySpace // Value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + + +//------------------ Configuring 2 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion 0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address Start is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address EntireMemorySpace is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region0 and Region 1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + LI(x2,test_value) + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX) + + LI(x8,clear_cf_of_Region0) + RVTEST_SIGUPD(x13,x8) //Update the signature + csrc pmpcfg0, x8 //Clear the configuration of region0 + csrr x9,pmpcfg0 //Read to confirm configuration is cleared properly + RVTEST_SIGUPD(x13,x9) //Update the signature + + LI(x9,NEW_PMPREGION0) + csrs pmpcfg0, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) + csrr x9,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x9) //Update the signature + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Now no RWX trap) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_09.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_09.S new file mode 100644 index 000000000..1a6e7f36e --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_09.S @@ -0,0 +1,134 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +//This assembly file tests if we set mseccfg.MMWP=1 once, then mseccfg.MMWP cannot be written\modified +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_09) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define clear_mseccfg 0xFFFFFFFF +#define EntireMemorySpace 0xFFFFFFFF + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------------ + +{Region 0}-------->[Entire memory sapce] + [With Read,Write and execute permissions enable for that region and Lock is clear] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 EntireMemorySpace // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + +//------------------ Configuring 1 region as mentioned above-------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) // Starting address 0 upto whole memory is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 // Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 // Verify its value by reading back + RVTEST_SIGUPD(x13,x5) // Update the signature + + LI(x6, PMPREGION0 ) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//---------------------------------------------------------------------------------------------- + + LI(x2,setMMWP) //Load a value to set MMWP bit in mseccfg + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + csrw mseccfg,x2 //Write mseccfg with MMWP bit set + csrr x3,mseccfg //Read back to confirm its value + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + csrw mseccfg,zero //write zero to mseccfg csr + csrr x3,mseccfg //Read back to confirm its value(If it remains same, it signifies test is passing else if it is changed or modified then test is failing) + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + + LI(x2,clear_mseccfg) + RVTEST_SIGUPD(x13,x2) //Update the signature + csrc mseccfg,x2 //Try to clear mseccfg + csrr x3,mseccfg //Read back to confirm its value(If it remains same, it signifies test is passing else if it is changed or modified then test is failing) + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_10.S similarity index 59% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_10.S index 5fbab0fe0..b0144c640 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_10.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_10.S @@ -82,50 +82,33 @@ main: //------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and with lock clear PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - - . Region2 -RETURN_INSTRUCTION |````````````````````````````````````````````````````````````````````````````` | - | [Region2] from RETURN_INSTRUCTION till exit | - | with X enabled and lock is clear and PMP TOR type is configured | - till | this is the region contains return instruction, for this we used region 3 | - |for this purpose we have loaded RETURN_INSTRUCTION addres into | - exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` - -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[0 till RAM_LOCATION_FOR_TEST] + [With Read,Write and execute permissions enabled for that region and Lock is clear] + +{Region 1}-------->[RETURN_INSTRUCTION till PMP_region_High] + [With Read,Write and execute permissions enable for that region and Lock is clear] + +------------------------------------------------------------------------------------------------------------------*/ #define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 #define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region1 start #define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end #define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 -# define PMPADDRESS3 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region2 start -# define PMPADDRESS4 exit // value to be loaded pmpaddr4 to declare region2 end -# define PMPREGION2 ((( PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -//------------------ Configuring 3 regions as mentioned above and setting MMWP-------------------------------------------------- +//------------------ Configuring 2 regions as mentioned above and setting MMWP-------------------------------------------------- csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 + LA(x4, PMPADDRESS1) //Starting address RETURN_INSTRUCTION is loaded for reigion 1 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting csrr x5, pmpaddr1 //Verify its value by reading back @@ -141,23 +124,7 @@ RETURN_INSTRUCTION |``````````````````````````````````````````````````````````` RVTEST_SIGUPD(x13,x5) //Update the signature nop //Added nop in case of trap - LA(x4, PMPADDRESS3) //Starting address RETURN_INSTRUCTION is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS4) //Ending address exit is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region0 and and Region1 is loaded csrw pmpcfg0, x6 //Write the configuration in correspondind CSR csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature @@ -166,12 +133,6 @@ RETURN_INSTRUCTION |``````````````````````````````````````````````````````````` csrw mseccfg, x2 //Setting mseccfg.MMWP csrr x2,mseccfg //Verify its value by reading back RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x6, PMPREGION2 ) //Permission for Region 2 is X with L is clear - csrw pmpcfg1, x6 //Write the configuration in correspondind CSR - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------------------------------------------------------------------------------------------- diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_SMode.S new file mode 100644 index 000000000..688d6201b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_SMode.S @@ -0,0 +1,228 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests If (mseccfg.MMWP=0 and mseccfg.MML=1) then PMP policy for S/U-mode when accessing +//memory regions that don’t have a matching PMP rule, to denied. + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_11_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[0 till RAM_LOCATION_FOR_TEST] + [With Write and execute permissions enabled for that region and Lock is set] [Before MML set] + [With Execute permissions enabled for S/U mode for that region and Lock is set] [After MML set] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode and Execute for S/U for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for S/U mode for that region and Lock is clear] + +{Region 3}-------->[RETURN_INSTRUCTION till PMP_region_High] + [With Read and Execute permissions enabled for M mode and Execute for S/U for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 PMP_region_High // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region0 and Region1 is loaded + csrr x2,pmpcfg0 + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,PMPREGION3|PMPREGION2) //Permission for Region0 and Region1 is loaded + csrw pmpcfg1, x9 + csrr x2,pmpcfg1 + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +//----------------------------------------------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST (will get RWX trap for S/U mode if region is not configured with MML set) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_UMode.S new file mode 100644 index 000000000..c8336ae21 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_11_UMode.S @@ -0,0 +1,228 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests If (mseccfg.MMWP=0 and mseccfg.MML=1) then PMP policy for S/U-mode when accessing +//memory regions that don’t have a matching PMP rule, to denied. + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_11_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[0 till RAM_LOCATION_FOR_TEST] + [With Write and execute permissions enabled for that region and Lock is set] [Before MML set] + [With Execute permissions enabled for S/U mode for that region and Lock is set] [After MML set] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode and Execute for S/U for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for S/U mode for that region and Lock is clear] + +{Region 3}-------->[RETURN_INSTRUCTION till PMP_region_High] + [With Read and Execute permissions enabled for M mode and Execute for S/U for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 +#define NEW_PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 + + +#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start +#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start +#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end +#define PMPREGION2 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start +# define PMPADDRESS6 PMP_region_High // value to be loaded pmpaddr6 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,NEW_PMPREGION0| PMPREGION1) + csrw pmpcfg0, x9 //Permission for Region0 and Region1 is loaded + csrr x2,pmpcfg0 + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + + LI(x9,PMPREGION3|PMPREGION2) //Permission for Region0 and Region1 is loaded + csrw pmpcfg1, x9 + csrr x2,pmpcfg1 + RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + +//----------------------------------------------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + + LI(x2,test_value) + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST (will get RWX trap for S/U mode if region is not configured with MML set) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_12.S similarity index 60% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_12.S index b9e304705..7c45c888a 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_12.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_12.S @@ -81,35 +81,22 @@ main: //----------------------------------------------------------------------------------------------------------------------- -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | - | with RX enabled and with lock set PMP TOR type is configured which signifies| - till |it is a locked read execute region for m mode,here trap handler code which req| - |execute perm lies that is why execute region is configured, we have loaded | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[0 till RAM_LOCATION_FOR_TEST] + [With Write and execute permissions enabled for that region and Lock is set] [Before MML set] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] [After MML set] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[RETURN_INSTRUCTION till PMP_region_High] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ #define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 #define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 @@ -123,16 +110,14 @@ PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are #define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region1 end #define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region2 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region3 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region3 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start +# define PMPADDRESS6 PMP_region_High // value to be loaded pmpaddr6 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 //------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting @@ -181,7 +166,7 @@ PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are RVTEST_SIGUPD(x13,x5) //Update the signature nop - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 3 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr6 //Verify its value by reading back @@ -189,45 +174,24 @@ PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are RVTEST_SIGUPD(x13,x5) //Update the signature nop - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 and Region1 is loaded csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region2 and Region2 is loaded csrw pmpcfg1, x6 csrr x7,pmpcfg1 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - LA(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------------------------------------------------------------------------------------------- LI(x2,setMML) csrw mseccfg, x2 //Setting mseccfg.MML csrr x2,mseccfg //Verify its value by reading back + RVTEST_SIGUPD(x13,x2) //Update the signature - nop - LI(x2,test_value) nop VERIFICATION_RWX RAM_LOCATION_FOR_TEST exit //macro is called with address as RAM_LOCATION_FOR_TEST and exittlabel as exit (Read and write is permitted in M mode if region is not configured with MML set) diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_13.S similarity index 51% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_13.S index 0de3a230d..6c8f15e77 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_13.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_13.S @@ -81,35 +81,22 @@ main: //----------------------------------------------------------------------------------------------------------------------- -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | - | with RX enabled and with lock set PMP TOR type is configured which signifies| - till |it is a locked read execute region for m mode,here trap handler code which req| - |execute perm lies that is why execute region is configured, we have loaded | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[0 till RAM_LOCATION_FOR_TEST] + [With Write and execute permissions enabled for that region and Lock is set] [Before MML set] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] [After MML set] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[RETURN_INSTRUCTION till PMP_region_High] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ #define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 #define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 @@ -123,31 +110,25 @@ PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are #define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region1 end #define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region2 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region3 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region3 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start +# define PMPADDRESS6 PMP_region_High // value to be loaded pmpaddr6 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 //------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 srl x4, x4, PMP_SHIFT // Shift right by 2 times @@ -161,78 +142,49 @@ PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr3 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr4 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 and Region1 is loaded csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region2 and Region2 is loaded csrw pmpcfg1, x6 csrr x7,pmpcfg1 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - LA(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------------------------------------------------------------------------------------------- LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML + csrw mseccfg, x2 //Setting mseccfg.MML csrr x2,mseccfg //Verify its value by reading back - nop + RVTEST_SIGUPD(x13,x2) //Update the signature - LI(x2,test_value) - jal RAM_LOCATION_FOR_TEST + nop + jal RAM_LOCATION_FOR_TEST //jump to RAM_LOCATION_FOR_TEST to check execute permissions for region that is not configured for m mode j exit -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions .fill 1*(XLEN/32),4,0x13 addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_14.S similarity index 51% rename from riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S rename to riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_14.S index ee8f223ce..e0beaeede 100644 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_14.S +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_14.S @@ -28,6 +28,7 @@ RVTEST_SIGBASE( x13,signature_x13_1) .align 2 #define test_value 0x44444444 +#define clear_mseccfg 0xFFFFFFFF #define setRLB 4 #define setMMWP 2 @@ -41,7 +42,6 @@ RVTEST_SIGBASE( x13,signature_x13_1) #define PMP2_CFG_SHIFT 16 #define PMP3_CFG_SHIFT 24 -#define clear_mseccfg 0xFFFFFFFF //------------------------------This macro is used for testing the RWX for region (region under test)------------------ #define NOP 0x13 @@ -81,35 +81,22 @@ main: //----------------------------------------------------------------------------------------------------------------------- -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | - | with RX enabled and with lock set PMP TOR type is configured which signifies| - till |it is a locked read execute region for m mode,here trap handler code which req| - |execute perm lies that is why execute region is configured, we have loaded | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[0 till RAM_LOCATION_FOR_TEST] + [With Write and execute permissions enabled for that region and Lock is set] [Before MML set] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] [After MML set] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[RETURN_INSTRUCTION till PMP_region_High] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ #define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 #define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 @@ -123,119 +110,83 @@ PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are #define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region1 end #define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region2 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region3 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region3 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 +# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region2 start +# define PMPADDRESS6 PMP_region_High // value to be loaded pmpaddr6 to declare region2 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 //------------------ Configuring 4 regions as mentioned above-------------------------------------------------- + csrw satp, zero //Disable address translation. + LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr3 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 srl x4, x4, PMP_SHIFT // Shift right by 2 times csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting csrr x5, pmpaddr4 //Verify its value by reading back - nop //Added nop in case of trap RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 + + LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + + LA(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 and Region1 is loaded csrw pmpcfg0, x6 csrr x7,pmpcfg0 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set + LA(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region2 and Region2 is loaded csrw pmpcfg1, x6 csrr x7,pmpcfg1 //Read to confirm configuration is set properly RVTEST_SIGUPD(x13,x7) //Update the signature - LA(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - //--------------------------------------------------------------------------------------------------------- - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.RLB + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML csrr x2,mseccfg //Verify its value by reading back RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value csrw mseccfg,zero csrr x3,mseccfg - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value LI(x2,clear_mseccfg) - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + RVTEST_SIGUPD(x13,x2) //Update the signature with csrc mseccfg,x2 csrr x3,mseccfg - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value + RVTEST_SIGUPD(x13,x3) //Update the signature with the csr value j exit diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_15.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_15.S new file mode 100644 index 000000000..d0d788188 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_15.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests, if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region + //and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_15) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_SMode.S new file mode 100644 index 000000000..dde9e09d3 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_16_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_UMode.S new file mode 100644 index 000000000..0e1f72369 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_16_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_16_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_17.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_17.S new file mode 100644 index 000000000..c85219cd8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_17.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests, if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an Inaccessible region + //and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_17) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_SMode.S new file mode 100644 index 000000000..1ef48280f --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_SMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an execute only region for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_18_Smode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is not permitted for S/U mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_UMode.S new file mode 100644 index 000000000..430bbc49c --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_18_UMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an execute only region for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_18_Umode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is not permitted for S/U mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_19.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_19.S new file mode 100644 index 000000000..029485171 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_19.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, +//and read and write for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_19) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Reand and Write permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read and write is permitted for m mode But execute is not so will cause trap on exection) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_SMode.S new file mode 100644 index 000000000..acf612484 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_SMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, +//and read only region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_20_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and execute is not permitted for S/U mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_UMode.S new file mode 100644 index 000000000..0e4da0e4c --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_20_UMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, +//and read only region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_20_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and execute is not permitted for S/U mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_21.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_21.S new file mode 100644 index 000000000..1c14009f8 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_21.S @@ -0,0 +1,231 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, + //read and write for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_21) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and Write permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read and is permitted for m mode and execute is not so will cause trap on execution) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_SMode.S new file mode 100644 index 000000000..02eabb416 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_SMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, +// read and write for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_22_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and write permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute is not permitted for S/U mode and Read and write is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_UMode.S new file mode 100644 index 000000000..c584ad26a --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_22_UMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, +// read and write for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_22_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and write permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute is not permitted for S/U mode and Read and write is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_23.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_23.S new file mode 100644 index 000000000..6d2f817c9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_23.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_23) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_SMode.S new file mode 100644 index 000000000..4108d0bf7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_SMode.S @@ -0,0 +1,236 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is a read only region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_24_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and execute is not permitted for S/U mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_UMode.S new file mode 100644 index 000000000..8a9f51b0d --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_24_UMode.S @@ -0,0 +1,236 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is a read only region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_24_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and execute is not permitted for S/U mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_25.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_25.S new file mode 100644 index 000000000..68698fd5a --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_25.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_25) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_SMode.S new file mode 100644 index 000000000..acff41bed --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_SMode.S @@ -0,0 +1,236 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is a read and execute region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_26_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write is not permitted for S/U mode and Read and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_UMode.S new file mode 100644 index 000000000..0a28bdeac --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_26_UMode.S @@ -0,0 +1,236 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is a read and execute region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_26_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write is not permitted for S/U mode and Read and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_27.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_27.S new file mode 100644 index 000000000..f6e82e10b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_27.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_27) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_W |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_SMode.S new file mode 100644 index 000000000..4541ea3a7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_SMode.S @@ -0,0 +1,236 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is a read and write region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_28_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and write permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute is not permitted for S/U mode and Read and write is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_UMode.S new file mode 100644 index 000000000..0357af6e4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_28_UMode.S @@ -0,0 +1,236 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is a read and write region for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_28_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and write permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute is not permitted for S/U mode and Read and write is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_29.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_29.S new file mode 100644 index 000000000..a076439f4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_29.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_29) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_SMode.S new file mode 100644 index 000000000..207daa4fd --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_SMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is a read,write and execute region +//for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_30_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read, write and execution permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_UMode.S new file mode 100644 index 000000000..3acdad150 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_30_UMode.S @@ -0,0 +1,237 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is a read,write and execute region +//for S/U mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_30_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read, write and execution permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_31.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_31.S new file mode 100644 index 000000000..0d15b327b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_31.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is an Inaccessible region +// and access Exception should be thrown for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_31) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for m mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_SMode.S new file mode 100644 index 000000000..a0aed7716 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_32_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_UMode.S new file mode 100644 index 000000000..7c695b059 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_32_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for S/U mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_32_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_33.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_33.S new file mode 100644 index 000000000..031bf7697 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_33.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is a locked execute only region +// for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_33) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Execute permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_X |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST( Read, write is not permitted for m mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_SMode.S new file mode 100644 index 000000000..d4f11f1fd --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is an Inaccessible region +// and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_34_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_UMode.S new file mode 100644 index 000000000..c5025c14a --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_34_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is an Inaccessible region +// and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_34_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_35.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_35.S new file mode 100644 index 000000000..79a8d4924 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_35.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, + //execute only for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_35) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Execute permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST( Read, write is not permitted for m mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_SMode.S new file mode 100644 index 000000000..0d4b43ee6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, +//execute only for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_36_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read and write is not permitted for S/U mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_UMode.S new file mode 100644 index 000000000..85b81929d --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_36_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, +//execute only for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_36_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read and write is not permitted for S/U mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_37.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_37.S new file mode 100644 index 000000000..5e3d58e2a --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_37.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, +// read and execute for M mode + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_37) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and Execute permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST( Write is not permitted for m mode and Read, execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_SMode.S new file mode 100644 index 000000000..da17d5f1e --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, +// execute only for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_38_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read and write is not permitted for S/U mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_UMode.S new file mode 100644 index 000000000..663eb7199 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_38_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, +// execute only for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_38_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With execute permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read and write is not permitted for S/U mode and execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_39.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_39.S new file mode 100644 index 000000000..7e387be31 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_39.S @@ -0,0 +1,233 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is a locked read only region +// for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_39) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST( Write and execute is not permitted for m mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_SMode.S new file mode 100644 index 000000000..4d179892f --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_40_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_UMode.S new file mode 100644 index 000000000..9ace6108b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_40_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is an Inaccessible region +//and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_40_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_SMode.S new file mode 100644 index 000000000..9fe44c277 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is an +// Inaccessible region and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_41_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_UMode.S new file mode 100644 index 000000000..d569903b9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_41_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is an +// Inaccessible region and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_41_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_42.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_42.S new file mode 100644 index 000000000..6a121c141 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_42.S @@ -0,0 +1,233 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is a locked read and execute region +// for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_42) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and execute permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST( Write is not permitted for m mode and Read, execute is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_43.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_43.S new file mode 100644 index 000000000..8b65ca33b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_43.S @@ -0,0 +1,233 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is a locked read and write region +// for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_43) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read and write permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST( Execute is not permitted for m mode and Read, write is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_SMode.S new file mode 100644 index 000000000..e23fc40cc --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is an Inaccessible region +// and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_44_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_UMode.S new file mode 100644 index 000000000..af6e050cf --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_44_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is an Inaccessible region +// and access Exception should be thrown for for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_44_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With no permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted for S/U mode) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_45.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_45.S new file mode 100644 index 000000000..74ca48bb0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_45.S @@ -0,0 +1,233 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region + //and read only region for M mode +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_45) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for M mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W | PMP_X |PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + //--------------------------------------------------------------------------------------------------------- + + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and Execute is not permitted for m mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_SMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_SMode.S new file mode 100644 index 000000000..a90c147a9 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_SMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region +// and read only region for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_46_SMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Smode // GO into S mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and execute is not permitted for S/U mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_UMode.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_UMode.S new file mode 100644 index 000000000..9858dcd2b --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_46_UMode.S @@ -0,0 +1,238 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region +// and read only region for S/U mode +// +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_46_UMode) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [With Read permission is enabled for S/U mode for that region] [Testing region for RWX permissions] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M and S/U mode for that region and Lock is clear] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set][Old configuration] + [With Read, Execute permissions enabled for M mode and Execute only for S/U mode for that region and Lock is set][New configuration] +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 +# define NEW_PMPREGION3 ((( PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION3) //Permission for Region3 is loaded + csrw pmpcfg1, x6 + csrr x9,pmpcfg1 //Read to confirm configuration is set properly + + LI(x10,setMML) + csrs mseccfg, x10 //Setting mseccfg.MML + csrr x10,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is loaded + csrw pmpcfg0, x6 + csrr x11,pmpcfg0 //Read to confirm configuration is set properly + + LI(x6, PMPREGION2 | NEW_PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x12,pmpcfg1 //Read to confirm configuration is set properly + + RVTEST_SIGUPD(x13,x9) //Update the signature + RVTEST_SIGUPD(x13,x10) //Update the signature with mseccfg value + RVTEST_SIGUPD(x13,x11) //Update the signature with configuration of region 0 and 1 + RVTEST_SIGUPD(x13,x12) //Update the signature with configuration of region 2 and 3 + + //--------------------------------------------------------------------------------------------------------- + + RVTEST_GOTO_LOWER_MODE Umode // GO into U mode + nop + VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Write and execute is not permitted for S/U mode and Read is permitted) + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_47.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_47.S new file mode 100644 index 000000000..de4069de6 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_47.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_47) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=0,X=1)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_48.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_48.S new file mode 100644 index 000000000..7884ca019 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_48.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=0)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_48) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=0)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_49.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_49.S new file mode 100644 index 000000000..4fbb980b0 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_49.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_49) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=1)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_50.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_50.S new file mode 100644 index 000000000..09201f108 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_50.S @@ -0,0 +1,230 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=1,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg +// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_50) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=1,W=0,X=1)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrw mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_51.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_51.S new file mode 100644 index 000000000..94b7ff4d7 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_51.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_51) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=0,X=1)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_52.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_52.S new file mode 100644 index 000000000..94c4d3ab5 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_52.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=0)and +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_52) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=0)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_53.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_53.S new file mode 100644 index 000000000..1c15984c4 --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_53.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=1)and +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_53) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=1)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_54.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_54.S new file mode 100644 index 000000000..dd6c8a8ad --- /dev/null +++ b/riscv-test-suite/rv32i_m/privilege/src/ePMP32/ePMP_54.S @@ -0,0 +1,234 @@ +// ----------- +// Copyright (c) 2020. RISC-V International. All rights reserved. +// SPDX-License-Identifier: BSD-3-Clause +// ----------- +// +// This test belongs to ePMP Test plan developed by 10xEngineers +// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing +// +// +//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=1,W=0,X=1)and +// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg +// changed for M-mode-only or a locked Shared-Region rule with executable privileges + +#define rvtest_strap_routine +#include "model_test.h" +#include "arch_test.h" +RVTEST_ISA("RV32I") +# Test code region +.section .text.init +.globl rvtest_entry_point +rvtest_entry_point: +RVMODEL_BOOT +RVTEST_CODE_BEGIN +#ifdef TEST_CASE_1 + RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_54) +RVTEST_SIGBASE( x13,signature_x13_1) + .option nopic + .attribute unaligned_access, 0 + .attribute stack_align, 16 + .align 2 + +#define test_value 0x44444444 +#define Start 0x00000000 +#define EntireMemorySpace 0xFFFFFFFF + +#define setRLB 4 +#define setMMWP 2 +#define setMML 1 + +#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) +#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) + +#define PMP0_CFG_SHIFT 0 +#define PMP1_CFG_SHIFT 8 +#define PMP2_CFG_SHIFT 16 +#define PMP3_CFG_SHIFT 24 + +//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ + +#define NOP 0x13 +.macro VERIFICATION_RWX ADDRESS + LA(a5, \ADDRESS) //Fetch the address to be checked + lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) + nop // Added nop in case of trap + // WRITING new value to memory region TRAP if the WRITability is blocked + LI(a4, NOP) // Load the new value (NOP Instruction ID) + sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) + nop // Added nop in case of trap + lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) + nop // Added nop in case of trap + jal \ADDRESS // Test for execution, an instruction is placed at this address +.endm +//----------------------------------------------------------------------------------------------------------------------- + + +main: + + LI(x1,test_value) //Load a value in a register which signifies we are in main + RVTEST_SIGUPD(x13,x1) //Update the signature + +//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- + + .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 + .rept 4 // START OF LOOP(Repeat 4 times) + csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) + .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg + .endr // END OF LOOP BODY + // Loop to SET ALL pmpaddr REGs to zero + .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 + .rept 16 // START OF LOOP(Repeat 16 times) + csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) + .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg + .endr // END OF LOOP BODY + +//----------------------------------------------------------------------------------------------------------------------- + + LI(x2,setRLB) + csrw mseccfg, x2 //Setting mseccfg.RLB + csrr x2,mseccfg //Verify its value by reading back + +/*-------------------------------Descritption of all regions used------------------------------------------------- + +{Region 0}-------->[RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION] + [Adding an executable region (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=1,W=0,X=1)] + +{Region 1}-------->[exit_cleanup till tohost] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +{Region 2}-------->[Mclr_Msw_int till PMP_region_High] + [With Read and Write permissions enabled for M mode for that region and Lock is set] + +{Region 3}-------->[Start till EntireMemorySpace] + [With Read and Execute permissions enabled for M mode for that region and Lock is set] + +------------------------------------------------------------------------------------------------------------------*/ + +#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded in pmpaddr0 to declare region0 start +#define PMPADDRESS1 RETURN_INSTRUCTION // value to be loaded pmpaddr1 to declare region0 end +#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 0 + +#define PMPADDRESS2 exit_cleanup // value to be loaded in pmpaddr2 to declare region1 start +#define PMPADDRESS3 tohost // value to be loaded in pmpaddr3 to declare region1 end +#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 1 + +#define PMPADDRESS4 Mclr_Msw_int // value to be loaded in pmpaddr4 to declare region2 start +#define PMPADDRESS5 PMP_region_High // value to be loaded in pmpaddr5 to declare region2 end +#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP1_CFG_SHIFT) // Configuration for region 2 + +# define PMPADDRESS6 Start // value to be loaded in pmpaddr6 to declare region3 start +# define PMPADDRESS7 EntireMemorySpace // value to be loaded in pmpaddr7 to declare region3 end +# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP3_CFG_SHIFT) // Configuration for region 3 + + +//------------------ Configuring 4 regions and setting mseccfg.MML as mentioned above-------------------------------------------------- + + csrw satp, zero //Disable address translation. + + LA(x4, PMPADDRESS0) //Starting address RAM_LOCATION_FOR_TEST is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting + csrr x5, pmpaddr0 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS1) //Ending address RETURN_INSTRUCTION is loaded for reigion0 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting + csrr x5, pmpaddr1 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS2) //Starting address exit_cleanup is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting + csrr x5, pmpaddr2 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS3) //Ending address tohost is loaded for region 1 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr3, x4 //Updated pmpaddr3 to define PMP region consisting + csrr x5, pmpaddr3 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS4) //Starting address Mclr_Msw_int is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr4, x4 //Updated pmpaddr4 to define PMP region consisting + csrr x5, pmpaddr4 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 2 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr5, x4 //Updated pmpaddr5 to define PMP region consisting + csrr x5, pmpaddr5 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS6) //Starting address Start is loaded for region 3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr6, x4 //Updated pmpaddr6 to define PMP region consisting + csrr x5, pmpaddr6 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LA(x4, PMPADDRESS7) //Ending address EntireMemorySpace is loaded for region3 + srl x4, x4, PMP_SHIFT // Shift right by 2 times + csrw pmpaddr7, x4 //Updated pmpaddr7 to define PMP region consisting + csrr x5, pmpaddr7 //Verify its value by reading back + RVTEST_SIGUPD(x13,x5) //Update the signature + + LI(x6, PMPREGION1) //Permission for Region1 is loaded + csrw pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + + LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 and region 3 is loaded + csrw pmpcfg1, x6 + csrr x7,pmpcfg1 //Read to confirm configuration is set properly + RVTEST_SIGUPD(x13,x7) //Update the signature + +//--------------------------------------------------------------------------------------------------------- + + LI(x2,setMML) + csrs mseccfg, x2 //Setting mseccfg.MML + csrr x2,mseccfg //Verify its value by reading back + nop + + LI(x6, PMPREGION0) //Permission for Region 0 is loaded + csrs pmpcfg0, x6 + csrr x7,pmpcfg0 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region + RVTEST_SIGUPD(x13,x7) //Update the signature + + + j exit + +RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions + .fill 1*(XLEN/32),4,0x13 + addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION + +RETURN_INSTRUCTION: + ret + +exit: + +#endif + # --------------------------------------------------------------------------------------------- + # HALT +RVTEST_CODE_END +RVMODEL_HALT +RVTEST_DATA_BEGIN +.align 4 +rvtest_data: +.word 0xdeadcafe +RVTEST_DATA_END +RVMODEL_DATA_BEGIN +signature_x13_0: + .fill 0*(XLEN/32),4,0x12345678 +signature_x13_1: + .fill 128*(XLEN/32),4,0xcafebeef +#ifdef rvtest_mtrap_routine +mtrap_sigptr: + .fill 256*(XLEN/32),4,0xdeadbeef +#endif +#ifdef rvtest_gpr_save +gpr_save: + .fill 24*(XLEN/32),4,0xc9a8b7f1 +#endif +PMP_region_High: +RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S deleted file mode 100644 index e4a081729..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_06.S +++ /dev/null @@ -1,159 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// This assembly file tests if we set (mseccfg.RLB=0 and at least one pmpcfg.L=1) then mseccfg.RLB canot be written\modified -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_06) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - csrw mseccfg, zero //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - -/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled with lock is set,PMP TOR is configured | | with RWX enabled and PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L |PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - -#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - - -//------------------ Configuring 2 regions as mentioned above-------------------------------------------------- - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - nop - csrr x8, mseccfg //Verify the value to double check mseccfg is zero - RVTEST_SIGUPD(x13,x8) //Update the signature - LI(x9,setRLB) //load x9 with value to set mseccfg.RLB which is at bit 3 in mseccfg - csrw mseccfg, x9 //Setting mseccfg.RLB - csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is still unset(If it is, then test is passed) - RVTEST_SIGUPD(x13,x10) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) - .fill 3*(XLEN/32),4,0x12345678 - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S deleted file mode 100644 index d222f0466..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_07.S +++ /dev/null @@ -1,159 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// This assembly file tests if we set (mseccfg.RLB=0 and pmpcfg.L=0) then mseccfg.RLB can be written\modified -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_07) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - csrw mseccfg, zero //Writing 0 to mseccfg and in specific mseccfg.RLB is cleared - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - -/*-----------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - -#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - - -//------------------ Configuring 2 regions as mentioned above-------------------------------------------------- - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - nop - csrr x8, mseccfg //Verify the value to double check mseccfg is zero - RVTEST_SIGUPD(x13,x8) //Update the signature - LI(x9,setRLB) //load x9 with value to set mseccfg.RLB which is at bit 3 in mseccfg - csrw mseccfg, x9 //Setting mseccfg.RLB - csrr x10, mseccfg //Read back the value of mseccfg to verify RLB is still unset(If it is, then test is passed) - RVTEST_SIGUPD(x13,x10) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions (IN later files) - .fill 3*(XLEN/32),4,0x12345678 - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S deleted file mode 100644 index 6ff6c7edd..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_08.S +++ /dev/null @@ -1,242 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if we set (mseccfg.RLB=1 and pmpcfg.L=1) then pmp rules may be removed/modified and -//pmp entries may be edited - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_07) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -#define clear_cf_of_Region3 0xFFFFFF00 - -//------------------------------This macro is used for testing the RWX for region 3(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) - csrw mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and with lock clear PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -RETURN_INSTRUCTION |````````````````````````````````````````````````````````````````````````````` | RAM_LOCATION_FOR_TEST |````````````````````````````````````````````````````````````````````````````` | - | [Region2] from RETURN_INSTRUCTION till exit | | [Region3] from RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with X enabled and lock is clear and PMP TOR type is configured | | with nothing enabled and lock is set and PMP TOR type is configured | - till | this is the region contains return instruction, for this we used region 3 | till | this is the region from where we will perform RWX to check our cfg and tests | - |for this purpose we have loaded RETURN_INSTRUCTION addres into | |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres into | - exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | RETURN_INSTRUCTION | pmpaddr5 and RETURN_INSTRUCTION into pmpaddr6, pmpcfg1 [24:16] are used for cfg - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - -#define PMPADDRESS1 rvtest_code_end // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -# define PMPADDRESS3 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region2 start -# define PMPADDRESS4 exit // value to be loaded pmpaddr4 to declare region2 end -# define PMPREGION2 ((( PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr5 to declare region3 start -#define PMPADDRESS6 RETURN_INSTRUCTION // value to be loaded pmpaddr6 to declare region3 end -#define PMPREGION3 (((PMP_L |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 -#define NEW_PMPREGION3 (((PMP_L | PMP_R | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test - -//------------------ Configuring 3 regions as mentioned above-------------------------------------------------- - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS3) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3) //Permission for Region 2 is X with L is clear and for Region 3 is X with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - LI(x2,test_value) - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX) - LI(x8,clear_cf_of_Region3) - csrc pmpcfg1, x8 //Clear the configuration of region3 - LI(x9,NEW_PMPREGION3) - csrs pmpcfg1, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S deleted file mode 100644 index 86b63f06b..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_09.S +++ /dev/null @@ -1,81 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -//This assembly file tests if we set mseccfg.MMWP=1 once, then mseccfg.MMWP cannot be written\modified -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_09) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 -#define clear_mseccfg 0xFFFFFFFF - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - - LI(x2,setMMWP) //Load a value to set MMWP bit in mseccfg - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - csrw mseccfg,x2 //Write mseccfg with MMWP bit set - csrr x3,mseccfg //Read back to confirm its value - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - csrw mseccfg,zero //write zero to mseccfg csr - csrr x3,mseccfg //Read back to confirm its value(If it remains same, it signifies test is passing else if it is changed or modified then test is failing) - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x2,clear_mseccfg) - RVTEST_SIGUPD(x13,x2) //Update the signature - csrc mseccfg,x2 //Try to clear mseccfg - csrr x3,mseccfg //Read back to confirm its value(If it remains same, it signifies test is passing else if it is changed or modified then test is failing) - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S deleted file mode 100644 index 898f9e65d..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_11.S +++ /dev/null @@ -1,293 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests If (mseccfg.MMWP=0 and mseccfg.MML=1) then PMP policy for S/U-mode when accessing -//memory regions that don’t have a matching PMP rule, to denied. - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_11) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -#define clear_cf_of_Region0 0xFF00FFFF - -//------------------------------This macro is used for testing the RWX for region 3(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) - csrw mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| rvtest_code_end |````````````````````````````````````````````````````````````````````````````` | - | [Region0] from 0 till RAM_LOCATION_FOR_TEST | | [Region1] from rvtest_code_end till PMP_region_High | - | with RWX enabled with lock is clear,PMP TOR is configured | | with RWX enabled and with lock clear PMP TOR type is configured | - till |because this is the part of code memory containing our code | till |because this is the part of of our signatures and other stuff | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |for this purpose we have loaded rvtest_code_end addres into | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is pmpcfg0 csr | PMP_region_High | pmpaddr1 and PMP_region_High into pmpaddr2, pmpcfg0 [24:16] are used for cfg | - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -RETURN_INSTRUCTION |````````````````````````````````````````````````````````````````````````````` | RAM_LOCATION_FOR_TEST |````````````````````````````````````````````````````````````````````````````` | - | [Region2] from RETURN_INSTRUCTION till exit | | [Region3] from RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with X enabled and lock is clear and PMP TOR type is configured | | with nothing enabled and lock is set and PMP TOR type is configured | - till | this is the region contains return instruction, for this we used region 3 | till | this is the region from where we will perform RWX to check our cfg and tests | - |for this purpose we have loaded RETURN_INSTRUCTION addres into | |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres into | - exit | pmpaddr3 and exit into pmpaddr4, pmpcfg1 [7:0] are used for cfg | RETURN_INSTRUCTION | pmpaddr5 and RETURN_INSTRUCTION into pmpaddr6, pmpcfg1 [24:16] are used for cfg - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 -#define NEW_PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 1 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region2 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region2 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 2 -#define NEW_PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region3 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region3 end -#define PMPREGION4 (((PMP_L | PMP_W | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 3 -#define NEW_PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 3 which will be used later to check our test - - -//------------------ Configuring 3 regions as mentioned above-------------------------------------------------- - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS1) //Starting address rvtest_code_end is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS2) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS3) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop //Added nop in case of trap - - LA(x4, PMPADDRESS5) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS6) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS7) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - nop //Added nop in case of trap - RVTEST_SIGUPD(x13,x5) //Update the signature - nop - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RWX with L clear and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - // RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is X with L is clear and for Region 3 is X with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - //RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 2 is X with L is clear and for Region 3 is X with lock set - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - //RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back - //RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - //LI(x8,clear_cf_of_Region0) - //csrc pmpcfg0, x8 //Clear the configuration of region3 - LI(x9,NEW_PMPREGION0|NEW_PMPREGION1) - csrw pmpcfg0, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) - nop - LI(x9,NEW_PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) - nop - LI(x9,NEW_PMPREGION4) - csrw pmpcfg2, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) - nop - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - LI(x2,test_value) - - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX) - // LI(x8,clear_cf_of_Region3) - // csrc pmpcfg1, x8 //Clear the configuration of region3 - // LI(x9,NEW_PMPREGION3) - // csrs pmpcfg1, x9 //Update the configuration to give RWX permission (If it is done then our test is passing as we are able to change the configuration of region3 despite being locked using RLB set) - // VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST - nop - // RVTEST_GOTO_MMODE - nop - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S deleted file mode 100644 index 69e6e5d27..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_15.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests, if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region - //and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_15) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with nothing enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted and execute is not) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S deleted file mode 100644 index affd9efc2..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_16.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=0) then it is an Inaccessible region -//and access Exception should be thrown for S/U mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_16) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with nothing enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 no permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S deleted file mode 100644 index 8d2a3855e..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_17.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests, if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an Inaccessible region - //and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_17) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Neither Read, write nor execute is permitted and execute is not) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S deleted file mode 100644 index a6ca4bc69..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_18.S +++ /dev/null @@ -1,276 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=0,X=1) then it is an execute only region for S/U mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_18) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with X enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_TOR | PMP_X)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 X for S mode - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RW trap bcz permission is not to do RW for S mode and X is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S deleted file mode 100644 index ac02a2cb9..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_19.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, -//and read and write for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_19) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is read,write for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is permitted and execute is not) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S deleted file mode 100644 index a17f63da7..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_20.S +++ /dev/null @@ -1,276 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=0) then it is a shared data region, -//and read only region for S/U mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_20) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with W enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 R permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give WX trap bcz permission is not to do WX for S mode and R is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S deleted file mode 100644 index 29f099fd4..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_21.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, - //read and write for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_21) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is read,write for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is permitted and execute is not) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S deleted file mode 100644 index 4a2e3f0c9..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_22.S +++ /dev/null @@ -1,276 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=0,W=1,X=1) then it is a shared data region, -// read and write for S/U mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_22) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with WX enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RW permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give X trap bcz permission is not to do X for S mode and RW is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S deleted file mode 100644 index a304253fd..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_23.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is an Inaccessible region -// and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_23) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with R enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write,execute is not permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S deleted file mode 100644 index 4f32d650a..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_24.S +++ /dev/null @@ -1,275 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=0) then it is a read only region for S/U mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_24) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with R enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 R permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give WX trap bcz permission is not to do WX for S mode and R is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S deleted file mode 100644 index 407ea5d08..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_25.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is an Inaccessible region -// and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_25) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S deleted file mode 100644 index bfef4a4a0..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_26.S +++ /dev/null @@ -1,275 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=0,X=1) then it is a read and execute region for S/U mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_26) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with RX enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_R |PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RX permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give W trap bcz permission is not to do W for S mode and RX is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S deleted file mode 100644 index 82eb99ab6..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_27.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is an Inaccessible region -// and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_11) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RW enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted ) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S deleted file mode 100644 index 27441adcc..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_28.S +++ /dev/null @@ -1,275 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=0) then it is a read and write region for S/U mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_28) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with RW enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_R |PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RW permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give X trap bcz permission is not to do X for S mode and RW is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S deleted file mode 100644 index 85dc2b62b..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_29.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is an Inaccessible region -// and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_29) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RWX enabled and lock is clear PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S deleted file mode 100644 index 10f5647ee..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_30.S +++ /dev/null @@ -1,276 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=0) and (R=1,W=1,X=1) then it is a read,write and execute region -//for S/U mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_30) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with RWX enabled and lock is clear PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RWX permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give no trap bcz permission is to do RWX for S mode ) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S deleted file mode 100644 index a0dd3c1b8..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_31.S +++ /dev/null @@ -1,273 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is an Inaccessible region -// and access Exception should be thrown for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_31) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with nothing enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is nothing for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write and execute is not permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S deleted file mode 100644 index 4c12d442c..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_32.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=0) then it is a locked Inaccessible region -// and access Exception should be thrown for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_32) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with nothing enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 no permissions - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode ) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S deleted file mode 100644 index f7593a58d..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_33.S +++ /dev/null @@ -1,278 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is a locked execute only region -// for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_33) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is X for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is not permitted, execute is permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S deleted file mode 100644 index bb2d15182..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_34.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=0,X=1) then it is an Inaccessible region -// and access Exception should be thrown for for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_34) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with X enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 X permissions with L set - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S deleted file mode 100644 index f2bb8d010..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_35.S +++ /dev/null @@ -1,278 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, - //execute only for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_35) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is X for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is not permitted, execute is permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S deleted file mode 100644 index 7ee6fb0b2..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_36.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=0) then it is a locked shared code region, -//execute only for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_36) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with W enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 W and L are set - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RW trap bcz permission is not to do RW for S mode and X is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S deleted file mode 100644 index f77d492b7..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_37.S +++ /dev/null @@ -1,278 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, -// read and execute for M mode - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_37) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is RX for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(write is not permitted, Read and execute is permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S deleted file mode 100644 index a2f6b57a7..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_38.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=0,W=1,X=1) then it is a locked shared code region, -// execute only for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_38) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with WX enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 WX is set with locked - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RW trap bcz permission is not to do RW for S mode and X is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S deleted file mode 100644 index d2f55ef20..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_39.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is a locked read only region -// for M mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_39) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with R enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is R for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute and write is not permitted, read is permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S deleted file mode 100644 index d3b9ef80f..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_40.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=0) then it is an Inaccessible region -//and access Exception should be thrown for for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_40) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with R enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 R is set with locked - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S deleted file mode 100644 index d552e50ba..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_41.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is an -// Inaccessible region and access Exception should be thrown for for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_41) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with RX enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RX is set with locked - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S deleted file mode 100644 index c5adc3849..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_42.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=0,X=1) then it is a locked read and execute region -// for M mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_42) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R |PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is RX for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(write is not permitted,Read and execute is permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S deleted file mode 100644 index 990d7c77c..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_43.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is a locked read and write region -// for M mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_43) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RW enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is RW for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Read, write is permitted, execute is not permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S deleted file mode 100644 index e8d9098cf..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_44.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=0) then it is an Inaccessible region -// and access Exception should be thrown for for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_44) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with RW enabled and lock is SET PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R |PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RW is set with lock - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give RWX trap bcz permission is not to do RWX for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S deleted file mode 100644 index 63a8c33fe..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_45.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region - //and read only region for M mode -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_45) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RWX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L |PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is R for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - //--------------------------------------------------------------------------------------------------------- - - - LI(x2,test_value) - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(Execute and write is not permitted, read is permitted) - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S deleted file mode 100644 index 6acda7e1d..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_46.S +++ /dev/null @@ -1,277 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -// This assembly file tests if(mseccfg.MML=1 and pmpcfg.L=1) and (R=1,W=1,X=1) then it is a locked share data region -// and read only region for S/U mode -// -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_46) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region 5(region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - - LI(x2,setRLB) //To add an executable region after MML set we need RLB set that is why set here - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with WX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region for Mmode and execute | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | region for S/U ,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for all mode we perform store operations here that is why read, | till | after performing execution check of a testing region,that is why executable | - |write perm for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High with RX enabled and | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - |with lock set PMP TOR type is configured which signifies it is a locked read | | with RWX enabled and lock is set PMP TOR type is configured which | - till |execute region for m mode and execute for S/U,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 -#define NEW_PMPREGION0 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //New Configuration for region 0 to make the code executable for all modes - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 1 - - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_X | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -#define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr3 to declare region3 start -#define PMPADDRESS6 exit // value to be loaded pmpaddr4 to declare region3 end -#define PMPREGION3 (((PMP_L | PMP_W |PMP_X |PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) //Configuration for region 3 - - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr5 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr6 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_X | PMP_W |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) //Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr7 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr8 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 6 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 ) //Permission for Region 0 is RX with L set for m mode - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - RVTEST_SIGUPD(x13,x2) //Update the signature with the csr value - - LI(x9,NEW_PMPREGION0| PMPREGION1) - csrw pmpcfg0, x9 //Permission for Region 0 is RX with L set for m mode and X for S/U mode, same for region 1 - nop - LI(x9,PMPREGION3|PMPREGION2) - csrw pmpcfg1, x9 //Permission for Region 3 is RX with L set for m mode and X for S/U mode, For region 1 RW for all modes - nop - LI(x9,PMPREGION4|PMPREGION5) - csrw pmpcfg2, x9 //Permission for Region 4 is RX with L set for m mode and X for S/U mode, For region 5 RWX is set with locked - nop - //--------------------------------------------------------------------------------------------------------- - - - RVTEST_GOTO_LOWER_MODE Smode // GO into S mode - nop - VERIFICATION_RWX RAM_LOCATION_FOR_TEST //macro is called with address as RAM_LOCATION_FOR_TEST(CALLING from here will give WX trap bcz permission is not to do WX for S mode and R is successful for S mode) - nop - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S deleted file mode 100644 index a35032f0a..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_47.S +++ /dev/null @@ -1,271 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=0,X=1)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_47) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region 5 is X with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S deleted file mode 100644 index 7f201cb99..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_48.S +++ /dev/null @@ -1,271 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=0)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_48) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region W with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S deleted file mode 100644 index f75c3c274..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_49.S +++ /dev/null @@ -1,271 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=0,W=1,X=1)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_49) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W| PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region WX with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S deleted file mode 100644 index 58060c1e5..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_50.S +++ /dev/null @@ -1,271 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=0 and pmpcfg.L=1) (R=1,W=0,X=1)and -// now perform pmpcfg writes such pmpcfg writes are ignored, leaving pmpcfg -// unchanged for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_50) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrw mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region RX with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should not be written which is what spec says when MML is set we cannot add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S deleted file mode 100644 index 2f7b22c83..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_51.S +++ /dev/null @@ -1,274 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=0,X=1)and -// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg -// changed for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_51) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - LI(x2,setRLB) - csrw mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with X enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region X with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S deleted file mode 100644 index f3c2382c0..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_52.S +++ /dev/null @@ -1,274 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=0)and -// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg -// changed for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_52) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - LI(x2,setRLB) - csrw mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with W enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region W with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S deleted file mode 100644 index aa7938a42..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_53.S +++ /dev/null @@ -1,274 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=0,W=1,X=1)and -// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg -// changed for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_53) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - LI(x2,setRLB) - csrw mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with WX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_W | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region WX with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file diff --git a/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S b/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S deleted file mode 100644 index c517816f6..000000000 --- a/riscv-test-suite/rv32i_m/privilege/src/ePMP_54.S +++ /dev/null @@ -1,274 +0,0 @@ -// ----------- -// Copyright (c) 2020. RISC-V International. All rights reserved. -// SPDX-License-Identifier: BSD-3-Clause -// ----------- -// -// This test belongs to ePMP Test plan developed by 10xEngineers -// which can be found here: https://docs.google.com/spreadsheets/d/1dDeSlpOrtMDFhkv7ysAbCgCjOKVzhhvxCY83DirL92w/edit?usp=sharing -// -// -//This assembly file tests,Set (mseccfg.MML=1, mseccfg.RLB=1 and pmpcfg.L=1) (R=1,W=0,X=1)and -// now perform pmpcfg writes such pmpcfg writes are not ignored now, leaving pmpcfg -// changed for M-mode-only or a locked Shared-Region rule with executable privileges - -#define rvtest_strap_routine -#include "model_test.h" -#include "arch_test.h" -RVTEST_ISA("RV32I") -# Test code region -.section .text.init -.globl rvtest_entry_point -rvtest_entry_point: -RVMODEL_BOOT -RVTEST_CODE_BEGIN -#ifdef TEST_CASE_1 - RVTEST_CASE(1,"//check ISA:=regex(.*32.*); check ISA:=regex(.*I.*Zicsr.*); def rvtest_mtrap_routine=True; def TEST_CASE_1=True",ePMP_test_54) -RVTEST_SIGBASE( x13,signature_x13_1) - .option nopic - .attribute unaligned_access, 0 - .attribute stack_align, 16 - .align 2 - -#define test_value 0x44444444 - -#define setRLB 4 -#define setMMWP 2 -#define setMML 1 - -#define PMPCFG0 0x3A0 // Address of pmpcfg0 (HAS BEEN USED WHILE ITERATING THE LOOP) -#define PMPADDR0 0x3B0 // Address of pmpaddr0 (HAS BEEN USED WHILE ITERATING THE LOOP) - -#define PMP0_CFG_SHIFT 0 -#define PMP1_CFG_SHIFT 8 -#define PMP2_CFG_SHIFT 16 -#define PMP3_CFG_SHIFT 24 - -//------------------------------This macro is used for testing the RWX for region5 (region under test)------------------ - -#define NOP 0x13 -.macro VERIFICATION_RWX ADDRESS - LA(a5, \ADDRESS) //Fetch the address to be checked - lw a4,0(a5) // Load data from it (CHECK FOR READ) ; (NOT TRAP => R enabled) - nop // Added nop in case of trap - // WRITING new value to memory region TRAP if the WRITability is blocked - LI(a4, NOP) // Load the new value (NOP Instruction ID) - sw a4,0(a5) // Store the new value (NOT TRAP => W enabled) - nop // Added nop in case of trap - lw a4,0(a5) // Reload for verification (CHECK IF DATA HAS BEEN UPDATED SUCCESSFULLY) - nop // Added nop in case of trap - jal \ADDRESS // Test for execution, an instruction is placed at this address -.endm -//----------------------------------------------------------------------------------------------------------------------- - - -main: - - LI(x1,test_value) //Load a value in a register which signifies we are in main - RVTEST_SIGUPD(x13,x1) //Update the signature - -//------------------------------Loop to initialize all pmpaddr and pmpcfg CSR(s) to zero-------------------------------- - - .set pmpcfgi, PMPCFG0 // Initialize an iterating variable with the address of pmpcfg0 - .rept 4 // START OF LOOP(Repeat 4 times) - csrw pmpcfgi , x0 // Set all pmpcfg regs to zero (initial value) - .set pmpcfgi, pmpcfgi+1 // increment variable to next pmpcfg reg - .endr // END OF LOOP BODY - // Loop to SET ALL pmpaddr REGs to zero - .set pmpaddri, PMPADDR0 // Initialize an iterating variable with the address of pmpaddr0 - .rept 16 // START OF LOOP(Repeat 16 times) - csrw pmpaddri, x0 // Set all pmpaddr regs to zero (initial value) - .set pmpaddri, pmpaddri+1 // increment variable pmpaddri to the next pmpaddr reg - .endr // END OF LOOP BODY - -//----------------------------------------------------------------------------------------------------------------------- - LI(x2,setRLB) - csrw mseccfg, x2 //Setting mseccfg.RLB - csrr x2,mseccfg //Verify its value by reading back - -/*------------------------------------------------------------------------------------------Descritption of all regions used--------------------------------------------------------------------------- - Region0 Region1 - 0 |````````````````````````````````````````````````````````````| exit_cleanup |`````````````````````````````````````````````````````````````````````````````````````````| - | [Region0] from 0 till RAM_LOCATION_FOR_TEST with RX enable| | [Region1] from exit_cleanup till tohost label with RX enable with lock is set,PMP TOR | - |with lock is set,PMP TOR is configured which signifies it is| | is configured which signifies it is a locked read/execute region | - till |a locked read/execute region for Mmode,this is codeMEMregion| till | for Mmode,this is exit logic which needs to have execute permissions that is | - |for this purpose we have loaded RAM_LOCATION_FOR_TEST addres| |why executable region is configutedfor this purpose we have loaded exit_cleanup addres | - RAM_LOCATION_FOR_TEST |into pmpaddr0 and its corresponding cfg is set pmpcfg0[7:0 | tohost | into pmpaddr1 and tohost label addr in pmpaddr2 and its corresponding cfg is pmpcfg0 csr| - `````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````````````````` - - - . Region2 Region3 -Mclr_Msw_int |````````````````````````````````````````````````````````````````````````````` | RETURN_INSTRUCTION|````````````````````````````````````````````````````````````````````````````` | - | [Region2] from Mclr_Msw_int till PMP_region_High with RW enabled and lock is| | [Region3] from RETURN_INSTRUCTION till exit with RX enabled and lock is set | - | set and PMP TOR type is configured which signifies it is a lock read write | | here lies out return instruction from which we have to return to main code | - till | region for Mmode we perform store operations here that is why read,write perm| till | after performing execution check of a testing region,that is why executable | - |for this purpose we have loaded Mclr_Msw_int addres into | |region is configuted for this purpose we have loaded RETURN_INSTRUCTION addres| -PMP_region_High | pmpaddr3 and PMP_region_High into pmpaddr4, pmpcfg1 [7:0] are used for cfg | exit | into pmpaddr5 and exit label addr in pmpaddr6 and its corresponding pmpcfg1 csr | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` - - Region4 Region5 - rvtest_code_end |````````````````````````````````````````````````````````````````````````````` |RAM_LOCATION_FOR_TEST|````````````````````````````````````````````````````````````````````````````` | - | [Region4] from rvtest_code_end till PMP_region_High | | [Region5] from(Testing region) RAM_LOCATION_FOR_TEST till RETURN_INSTRUCTION | - | with RX enabled and with lock set PMP TOR type is configured which signifies| | with RX enabled and lock is set PMP TOR type is configured which | - till |it is a locked read execute region for m mode,here trap handler code which req| till |signifies it is an inaccessible region for m mode, for this purpose | - |execute perm lies that is why execute region is configured, we have loaded | |, we have loaded RAM_LOCATION_FOR_TEST label address in pmpaddr9 and | - PMP_region_High | pmpaddr7 and PMP_region_High into pmpaddr8, pmpcfg2 [7:0] are used for cfg | RETURN_INSTRUCTION | RETURN_INSTRUCTION into pmpaddr10, pmpcfg2 [24:16] are used for cfg | - ``````````````````````````````````````````````````````````````````````````````` ``````````````````````````````````````````````````````````````````````````````` -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#define PMPADDRESS0 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr0 to declare region0 -#define PMPREGION0 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 0 - - -#define PMPADDRESS1 exit_cleanup // value to be loaded pmpaddr1 to declare region1 start -#define PMPADDRESS2 tohost // value to be loaded pmpaddr2 to declare region1 end -#define PMPREGION1 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 1 - -#define PMPADDRESS3 Mclr_Msw_int // value to be loaded pmpaddr3 to declare region2 start -#define PMPADDRESS4 PMP_region_High // value to be loaded pmpaddr4 to declare region2 end -#define PMPREGION2 (((PMP_L | PMP_R | PMP_W | PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 2 - -# define PMPADDRESS5 RETURN_INSTRUCTION // value to be loaded pmpaddr5 to declare region3 start -# define PMPADDRESS6 exit // value to be loaded pmpaddr6 to declare region3 end -# define PMPREGION3 ((( PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 3 - -#define PMPADDRESS7 rvtest_code_end // value to be loaded pmpaddr7 to declare region4 start -#define PMPADDRESS8 PMP_region_High // value to be loaded pmpaddr8 to declare region4 end -#define PMPREGION4 (((PMP_L | PMP_R | PMP_X |PMP_TOR)&0xFF)<< PMP0_CFG_SHIFT) // Configuration for region 4 - -#define PMPADDRESS9 RAM_LOCATION_FOR_TEST // value to be loaded pmpaddr9 to declare region5 start -#define PMPADDRESS10 RETURN_INSTRUCTION // value to be loaded pmpaddr10 to declare region5 end -#define PMPREGION5 (((PMP_L | PMP_R | PMP_X | PMP_TOR)&0xFF)<< PMP2_CFG_SHIFT) // Configuration for region 5 - -//------------------ Configuring 5 regions as mentioned above-------------------------------------------------- - - csrw satp, zero //Disable address translation. - LA(x4, PMPADDRESS0) //Starting address 0 upto RAM_LOCATION_FOR_TEST is configured - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr0, x4 //Updated pmpaddr0 to define PMP region consisting - csrr x5, pmpaddr0 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS1) //Starting address exit_cleanup is loaded for reigion 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr1, x4 //Updated pmpaddr1 to define PMP region consisting - csrr x5, pmpaddr1 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS2) //Ending address tohost is loaded for region 1 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr2, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr2 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS3) //Starting address Mclr_Msw_int is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr3, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr3 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS4) //Ending address PMP_region_High is loaded for region 2 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr4, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr4 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS5) //Starting address RETURN_INSTRUCTION is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr5, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr5 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS6) //Ending address exit is loaded for region 3 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr6, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr6 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS7) //Starting address rvtest_code_end is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr7, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr7 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS8) //Ending address PMP_region_High is loaded for region 4 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr8, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr8 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS9) //Starting address RAM_LOCATION_FOR_TEST is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr9, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr9 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LA(x4, PMPADDRESS10) //Ending address RETURN_INSTRUCTION is loaded for region 5 - srl x4, x4, PMP_SHIFT // Shift right by 2 times - csrw pmpaddr10, x4 //Updated pmpaddr2 to define PMP region consisting - csrr x5, pmpaddr10 //Verify its value by reading back - RVTEST_SIGUPD(x13,x5) //Update the signature - - LI(x6, PMPREGION0 | PMPREGION1) //Permission for Region 0 is RX with L set and same for region 1 - csrw pmpcfg0, x6 - csrr x7,pmpcfg0 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION2 | PMPREGION3 ) //Permission for Region 2 is RW with L is set and for Region 3 is RX with lock set - csrw pmpcfg1, x6 - csrr x7,pmpcfg1 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - - LI(x6, PMPREGION4 ) //Permission for Region 4 is RX with L is set and region 5 has no permissions for anything - csrw pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration is set properly - RVTEST_SIGUPD(x13,x7) //Update the signature - -//--------------------------------------------------------------------------------------------------------- - - - LI(x2,setMML) - csrs mseccfg, x2 //Setting mseccfg.MML - csrr x2,mseccfg //Verify its value by reading back - nop - - LI(x6, PMPREGION5) //Permission for Region RX with locked for M mode - csrs pmpcfg2, x6 - csrr x7,pmpcfg2 //Read to confirm configuration should be written which is what spec says when MML is set with RLB set we can add an executable region - RVTEST_SIGUPD(x13,x7) //Update the signature - - j exit - -RAM_LOCATION_FOR_TEST: //This is the region which will be used to test RWX permissions - .fill 1*(XLEN/32),4,0x13 - addi x9,x9,0x01 // A TEST INSTRUCTION TO TEST THE EXECUTION CHECK ON PMP REGION - -RETURN_INSTRUCTION: - ret - -exit: - -#endif - # --------------------------------------------------------------------------------------------- - # HALT -RVTEST_CODE_END -RVMODEL_HALT -RVTEST_DATA_BEGIN -.align 4 -rvtest_data: -.word 0xdeadcafe -RVTEST_DATA_END -RVMODEL_DATA_BEGIN -signature_x13_0: - .fill 0*(XLEN/32),4,0x12345678 -signature_x13_1: - .fill 128*(XLEN/32),4,0xcafebeef -#ifdef rvtest_mtrap_routine -mtrap_sigptr: - .fill 256*(XLEN/32),4,0xdeadbeef -#endif -#ifdef rvtest_gpr_save -gpr_save: - .fill 24*(XLEN/32),4,0xc9a8b7f1 -#endif -PMP_region_High: -RVMODEL_DATA_END \ No newline at end of file