From 9bf14f6a68a129d95b4a29609ffc6e4f471b262f Mon Sep 17 00:00:00 2001 From: Abdul Wadood Date: Tue, 25 Jul 2023 21:50:30 +0500 Subject: [PATCH] Add test cases in RV64 Signed-off-by: Abdul Wadood --- sample_cgfs/rv64ia.cgf | 162 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 162 insertions(+) diff --git a/sample_cgfs/rv64ia.cgf b/sample_cgfs/rv64ia.cgf index 974ddda5..aa368acc 100644 --- a/sample_cgfs/rv64ia.cgf +++ b/sample_cgfs/rv64ia.cgf @@ -1,3 +1,165 @@ +amoadd.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amoadd.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amoand.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amoand.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amoswap.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amoswap.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amoxor.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amoxor.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amoor.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amoor.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amomin.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amomin.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amominu.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amominu.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_unsgn] + abstract_comb: + <<: [*rs2val_walking_unsgn] + +amomax.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amomax.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_sgn] + abstract_comb: + <<: [*rs2val_walking] + +amomaxu.w: + config: + - check ISA:=regex(.*I.*A.*) + mnemonics: + amomaxu.w: 0 + rs1: + <<: *all_regs_mx0 + rs2: + <<: *all_regs + rd: + <<: *all_regs + op_comb: + <<: [*ramofmt_op_comb] + val_comb: + <<: [*base_rs2val_unsgn] + abstract_comb: + <<: [*rs2val_walking_unsgn] + amoadd.d: config: - check ISA:=regex(.*I.*A.*)