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updated the yaml
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anuani21 committed Jul 22, 2024
1 parent 8fbc329 commit a9b88b7
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2 changes: 1 addition & 1 deletion riscv_ctg/data/fd.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -1532,7 +1532,7 @@ flw:
sz: '4'
val_template: "''"
load_instr: "flw"
rs1_op_data: *all_fregs
rs1_op_data: *all_regs_mx0
rd_op_data: *all_fregs
xlen: [32,64]
std_op:
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