Typos

riscv-software-src · Dec 21, 2024 · 8ed86f8 · 8ed86f8
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commit 8ed86f8
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diff --git a/arch/certificate_model/MC200-32.yaml b/arch/certificate_model/MC200-32.yaml
@@ -22,7 +22,7 @@ revision_history:
     changes:
       - First created
 
-description: |
+introduction: |
   MC200 is an intermedicate RISC-V microcontroller that adds the following mandatory extensions to the MC100-series:
 
   * U extension (User-mode privilege level)

diff --git a/arch/certificate_model/MC300-32.yaml b/arch/certificate_model/MC300-32.yaml
@@ -22,7 +22,7 @@ revision_history:
     changes:
       - First created
 
-description: |
+introduction: |
   MC300 is an advanced RISC-V microcontroller that adds the following mandatory extensions to the MC200-series:
 
   * S extension (Supervisor-mode privilege level)

diff --git a/arch/certificate_model/MockCertificateModel.yaml b/arch/certificate_model/MockCertificateModel.yaml
@@ -25,8 +25,8 @@ revision_history:
     changes:
       - Also created to test CRDs
 
-description: |
-  Mock CRD description:
+introduction: |
+  Mock CRD introduction:
 
   * Hello
   * Bob!