diff --git a/arch/csr/Zihpm/hpmcounter10.yaml b/arch/csr/Zihpm/hpmcounter10.yaml index bc959df75..5ee6a16d8 100644 --- a/arch/csr/Zihpm/hpmcounter10.yaml +++ b/arch/csr/Zihpm/hpmcounter10.yaml @@ -10,8 +10,16 @@ hpmcounter10: description: | Alias for M-mode CSR `mhpmcounter10`. - Privilege mode access is controlled with `mcounteren.HPM10`, `scounteren.HPM10`, and `hcounteren.HPM10` as follows: + Privilege mode access is controlled with `mcounteren.HPM10` + <%- if ext?(:S) -%> + , `scounteren.HPM10` + <%- if ext?(:H) -%> + , and `hcounteren.HPM10` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM10`# .2+h! [.rotate]#`scounteren.HPM10`# .2+h! [.rotate]#`hcounteren.HPM10`# @@ -24,6 +32,28 @@ hpmcounter10: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM10`# .2+h! [.rotate]#`scounteren.HPM10`# + 2+^.>h! `hpmcounter10` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM10`# + ^.>h! `hpmcounter10` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter11.yaml b/arch/csr/Zihpm/hpmcounter11.yaml index ba2e296f7..66ae6d1ae 100644 --- a/arch/csr/Zihpm/hpmcounter11.yaml +++ b/arch/csr/Zihpm/hpmcounter11.yaml @@ -10,8 +10,16 @@ hpmcounter11: description: | Alias for M-mode CSR `mhpmcounter11`. - Privilege mode access is controlled with `mcounteren.HPM11`, `scounteren.HPM11`, and `hcounteren.HPM11` as follows: + Privilege mode access is controlled with `mcounteren.HPM11` + <%- if ext?(:S) -%> + , `scounteren.HPM11` + <%- if ext?(:H) -%> + , and `hcounteren.HPM11` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM11`# .2+h! [.rotate]#`scounteren.HPM11`# .2+h! [.rotate]#`hcounteren.HPM11`# @@ -24,6 +32,28 @@ hpmcounter11: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM11`# .2+h! [.rotate]#`scounteren.HPM11`# + 2+^.>h! `hpmcounter11` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM11`# + ^.>h! `hpmcounter11` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter12.yaml b/arch/csr/Zihpm/hpmcounter12.yaml index a0450caf7..f985bf3d7 100644 --- a/arch/csr/Zihpm/hpmcounter12.yaml +++ b/arch/csr/Zihpm/hpmcounter12.yaml @@ -10,8 +10,16 @@ hpmcounter12: description: | Alias for M-mode CSR `mhpmcounter12`. - Privilege mode access is controlled with `mcounteren.HPM12`, `scounteren.HPM12`, and `hcounteren.HPM12` as follows: + Privilege mode access is controlled with `mcounteren.HPM12` + <%- if ext?(:S) -%> + , `scounteren.HPM12` + <%- if ext?(:H) -%> + , and `hcounteren.HPM12` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM12`# .2+h! [.rotate]#`scounteren.HPM12`# .2+h! [.rotate]#`hcounteren.HPM12`# @@ -24,6 +32,28 @@ hpmcounter12: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM12`# .2+h! [.rotate]#`scounteren.HPM12`# + 2+^.>h! `hpmcounter12` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM12`# + ^.>h! `hpmcounter12` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter13.yaml b/arch/csr/Zihpm/hpmcounter13.yaml index d178692ff..dd7671dfb 100644 --- a/arch/csr/Zihpm/hpmcounter13.yaml +++ b/arch/csr/Zihpm/hpmcounter13.yaml @@ -10,8 +10,16 @@ hpmcounter13: description: | Alias for M-mode CSR `mhpmcounter13`. - Privilege mode access is controlled with `mcounteren.HPM13`, `scounteren.HPM13`, and `hcounteren.HPM13` as follows: + Privilege mode access is controlled with `mcounteren.HPM13` + <%- if ext?(:S) -%> + , `scounteren.HPM13` + <%- if ext?(:H) -%> + , and `hcounteren.HPM13` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM13`# .2+h! [.rotate]#`scounteren.HPM13`# .2+h! [.rotate]#`hcounteren.HPM13`# @@ -24,6 +32,28 @@ hpmcounter13: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM13`# .2+h! [.rotate]#`scounteren.HPM13`# + 2+^.>h! `hpmcounter13` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM13`# + ^.>h! `hpmcounter13` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter14.yaml b/arch/csr/Zihpm/hpmcounter14.yaml index c7287986a..45ac93060 100644 --- a/arch/csr/Zihpm/hpmcounter14.yaml +++ b/arch/csr/Zihpm/hpmcounter14.yaml @@ -10,8 +10,16 @@ hpmcounter14: description: | Alias for M-mode CSR `mhpmcounter14`. - Privilege mode access is controlled with `mcounteren.HPM14`, `scounteren.HPM14`, and `hcounteren.HPM14` as follows: + Privilege mode access is controlled with `mcounteren.HPM14` + <%- if ext?(:S) -%> + , `scounteren.HPM14` + <%- if ext?(:H) -%> + , and `hcounteren.HPM14` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM14`# .2+h! [.rotate]#`scounteren.HPM14`# .2+h! [.rotate]#`hcounteren.HPM14`# @@ -24,6 +32,28 @@ hpmcounter14: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM14`# .2+h! [.rotate]#`scounteren.HPM14`# + 2+^.>h! `hpmcounter14` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM14`# + ^.>h! `hpmcounter14` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter15.yaml b/arch/csr/Zihpm/hpmcounter15.yaml index 39b19756a..bed80094b 100644 --- a/arch/csr/Zihpm/hpmcounter15.yaml +++ b/arch/csr/Zihpm/hpmcounter15.yaml @@ -10,8 +10,16 @@ hpmcounter15: description: | Alias for M-mode CSR `mhpmcounter15`. - Privilege mode access is controlled with `mcounteren.HPM15`, `scounteren.HPM15`, and `hcounteren.HPM15` as follows: + Privilege mode access is controlled with `mcounteren.HPM15` + <%- if ext?(:S) -%> + , `scounteren.HPM15` + <%- if ext?(:H) -%> + , and `hcounteren.HPM15` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM15`# .2+h! [.rotate]#`scounteren.HPM15`# .2+h! [.rotate]#`hcounteren.HPM15`# @@ -24,6 +32,28 @@ hpmcounter15: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM15`# .2+h! [.rotate]#`scounteren.HPM15`# + 2+^.>h! `hpmcounter15` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM15`# + ^.>h! `hpmcounter15` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter16.yaml b/arch/csr/Zihpm/hpmcounter16.yaml index df3f05b38..6640920f4 100644 --- a/arch/csr/Zihpm/hpmcounter16.yaml +++ b/arch/csr/Zihpm/hpmcounter16.yaml @@ -10,8 +10,16 @@ hpmcounter16: description: | Alias for M-mode CSR `mhpmcounter16`. - Privilege mode access is controlled with `mcounteren.HPM16`, `scounteren.HPM16`, and `hcounteren.HPM16` as follows: + Privilege mode access is controlled with `mcounteren.HPM16` + <%- if ext?(:S) -%> + , `scounteren.HPM16` + <%- if ext?(:H) -%> + , and `hcounteren.HPM16` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM16`# .2+h! [.rotate]#`scounteren.HPM16`# .2+h! [.rotate]#`hcounteren.HPM16`# @@ -24,6 +32,28 @@ hpmcounter16: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM16`# .2+h! [.rotate]#`scounteren.HPM16`# + 2+^.>h! `hpmcounter16` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM16`# + ^.>h! `hpmcounter16` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter17.yaml b/arch/csr/Zihpm/hpmcounter17.yaml index 06f68bf37..44ef7a681 100644 --- a/arch/csr/Zihpm/hpmcounter17.yaml +++ b/arch/csr/Zihpm/hpmcounter17.yaml @@ -10,8 +10,16 @@ hpmcounter17: description: | Alias for M-mode CSR `mhpmcounter17`. - Privilege mode access is controlled with `mcounteren.HPM17`, `scounteren.HPM17`, and `hcounteren.HPM17` as follows: + Privilege mode access is controlled with `mcounteren.HPM17` + <%- if ext?(:S) -%> + , `scounteren.HPM17` + <%- if ext?(:H) -%> + , and `hcounteren.HPM17` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM17`# .2+h! [.rotate]#`scounteren.HPM17`# .2+h! [.rotate]#`hcounteren.HPM17`# @@ -24,6 +32,28 @@ hpmcounter17: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM17`# .2+h! [.rotate]#`scounteren.HPM17`# + 2+^.>h! `hpmcounter17` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM17`# + ^.>h! `hpmcounter17` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter18.yaml b/arch/csr/Zihpm/hpmcounter18.yaml index fc1233114..4323e5148 100644 --- a/arch/csr/Zihpm/hpmcounter18.yaml +++ b/arch/csr/Zihpm/hpmcounter18.yaml @@ -10,8 +10,16 @@ hpmcounter18: description: | Alias for M-mode CSR `mhpmcounter18`. - Privilege mode access is controlled with `mcounteren.HPM18`, `scounteren.HPM18`, and `hcounteren.HPM18` as follows: + Privilege mode access is controlled with `mcounteren.HPM18` + <%- if ext?(:S) -%> + , `scounteren.HPM18` + <%- if ext?(:H) -%> + , and `hcounteren.HPM18` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM18`# .2+h! [.rotate]#`scounteren.HPM18`# .2+h! [.rotate]#`hcounteren.HPM18`# @@ -24,6 +32,28 @@ hpmcounter18: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM18`# .2+h! [.rotate]#`scounteren.HPM18`# + 2+^.>h! `hpmcounter18` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM18`# + ^.>h! `hpmcounter18` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter19.yaml b/arch/csr/Zihpm/hpmcounter19.yaml index d33d000b2..aae753ffe 100644 --- a/arch/csr/Zihpm/hpmcounter19.yaml +++ b/arch/csr/Zihpm/hpmcounter19.yaml @@ -10,8 +10,16 @@ hpmcounter19: description: | Alias for M-mode CSR `mhpmcounter19`. - Privilege mode access is controlled with `mcounteren.HPM19`, `scounteren.HPM19`, and `hcounteren.HPM19` as follows: + Privilege mode access is controlled with `mcounteren.HPM19` + <%- if ext?(:S) -%> + , `scounteren.HPM19` + <%- if ext?(:H) -%> + , and `hcounteren.HPM19` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM19`# .2+h! [.rotate]#`scounteren.HPM19`# .2+h! [.rotate]#`hcounteren.HPM19`# @@ -24,6 +32,28 @@ hpmcounter19: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM19`# .2+h! [.rotate]#`scounteren.HPM19`# + 2+^.>h! `hpmcounter19` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM19`# + ^.>h! `hpmcounter19` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter20.yaml b/arch/csr/Zihpm/hpmcounter20.yaml index 8dce4bb25..5e7548137 100644 --- a/arch/csr/Zihpm/hpmcounter20.yaml +++ b/arch/csr/Zihpm/hpmcounter20.yaml @@ -10,8 +10,16 @@ hpmcounter20: description: | Alias for M-mode CSR `mhpmcounter20`. - Privilege mode access is controlled with `mcounteren.HPM20`, `scounteren.HPM20`, and `hcounteren.HPM20` as follows: + Privilege mode access is controlled with `mcounteren.HPM20` + <%- if ext?(:S) -%> + , `scounteren.HPM20` + <%- if ext?(:H) -%> + , and `hcounteren.HPM20` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM20`# .2+h! [.rotate]#`scounteren.HPM20`# .2+h! [.rotate]#`hcounteren.HPM20`# @@ -24,6 +32,28 @@ hpmcounter20: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM20`# .2+h! [.rotate]#`scounteren.HPM20`# + 2+^.>h! `hpmcounter20` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM20`# + ^.>h! `hpmcounter20` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter21.yaml b/arch/csr/Zihpm/hpmcounter21.yaml index ed880d2f9..18d57e613 100644 --- a/arch/csr/Zihpm/hpmcounter21.yaml +++ b/arch/csr/Zihpm/hpmcounter21.yaml @@ -10,8 +10,16 @@ hpmcounter21: description: | Alias for M-mode CSR `mhpmcounter21`. - Privilege mode access is controlled with `mcounteren.HPM21`, `scounteren.HPM21`, and `hcounteren.HPM21` as follows: + Privilege mode access is controlled with `mcounteren.HPM21` + <%- if ext?(:S) -%> + , `scounteren.HPM21` + <%- if ext?(:H) -%> + , and `hcounteren.HPM21` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM21`# .2+h! [.rotate]#`scounteren.HPM21`# .2+h! [.rotate]#`hcounteren.HPM21`# @@ -24,6 +32,28 @@ hpmcounter21: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM21`# .2+h! [.rotate]#`scounteren.HPM21`# + 2+^.>h! `hpmcounter21` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM21`# + ^.>h! `hpmcounter21` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter22.yaml b/arch/csr/Zihpm/hpmcounter22.yaml index 1d7d0021f..0542aabdf 100644 --- a/arch/csr/Zihpm/hpmcounter22.yaml +++ b/arch/csr/Zihpm/hpmcounter22.yaml @@ -10,8 +10,16 @@ hpmcounter22: description: | Alias for M-mode CSR `mhpmcounter22`. - Privilege mode access is controlled with `mcounteren.HPM22`, `scounteren.HPM22`, and `hcounteren.HPM22` as follows: + Privilege mode access is controlled with `mcounteren.HPM22` + <%- if ext?(:S) -%> + , `scounteren.HPM22` + <%- if ext?(:H) -%> + , and `hcounteren.HPM22` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM22`# .2+h! [.rotate]#`scounteren.HPM22`# .2+h! [.rotate]#`hcounteren.HPM22`# @@ -24,6 +32,28 @@ hpmcounter22: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM22`# .2+h! [.rotate]#`scounteren.HPM22`# + 2+^.>h! `hpmcounter22` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM22`# + ^.>h! `hpmcounter22` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter23.yaml b/arch/csr/Zihpm/hpmcounter23.yaml index 880fc5ecb..8e1182118 100644 --- a/arch/csr/Zihpm/hpmcounter23.yaml +++ b/arch/csr/Zihpm/hpmcounter23.yaml @@ -10,8 +10,16 @@ hpmcounter23: description: | Alias for M-mode CSR `mhpmcounter23`. - Privilege mode access is controlled with `mcounteren.HPM23`, `scounteren.HPM23`, and `hcounteren.HPM23` as follows: + Privilege mode access is controlled with `mcounteren.HPM23` + <%- if ext?(:S) -%> + , `scounteren.HPM23` + <%- if ext?(:H) -%> + , and `hcounteren.HPM23` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM23`# .2+h! [.rotate]#`scounteren.HPM23`# .2+h! [.rotate]#`hcounteren.HPM23`# @@ -24,6 +32,28 @@ hpmcounter23: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM23`# .2+h! [.rotate]#`scounteren.HPM23`# + 2+^.>h! `hpmcounter23` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM23`# + ^.>h! `hpmcounter23` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter24.yaml b/arch/csr/Zihpm/hpmcounter24.yaml index 786acaef9..49cbfc328 100644 --- a/arch/csr/Zihpm/hpmcounter24.yaml +++ b/arch/csr/Zihpm/hpmcounter24.yaml @@ -10,8 +10,16 @@ hpmcounter24: description: | Alias for M-mode CSR `mhpmcounter24`. - Privilege mode access is controlled with `mcounteren.HPM24`, `scounteren.HPM24`, and `hcounteren.HPM24` as follows: + Privilege mode access is controlled with `mcounteren.HPM24` + <%- if ext?(:S) -%> + , `scounteren.HPM24` + <%- if ext?(:H) -%> + , and `hcounteren.HPM24` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM24`# .2+h! [.rotate]#`scounteren.HPM24`# .2+h! [.rotate]#`hcounteren.HPM24`# @@ -24,6 +32,28 @@ hpmcounter24: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM24`# .2+h! [.rotate]#`scounteren.HPM24`# + 2+^.>h! `hpmcounter24` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM24`# + ^.>h! `hpmcounter24` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter25.yaml b/arch/csr/Zihpm/hpmcounter25.yaml index dc5f12f64..a50d5e613 100644 --- a/arch/csr/Zihpm/hpmcounter25.yaml +++ b/arch/csr/Zihpm/hpmcounter25.yaml @@ -10,8 +10,16 @@ hpmcounter25: description: | Alias for M-mode CSR `mhpmcounter25`. - Privilege mode access is controlled with `mcounteren.HPM25`, `scounteren.HPM25`, and `hcounteren.HPM25` as follows: + Privilege mode access is controlled with `mcounteren.HPM25` + <%- if ext?(:S) -%> + , `scounteren.HPM25` + <%- if ext?(:H) -%> + , and `hcounteren.HPM25` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM25`# .2+h! [.rotate]#`scounteren.HPM25`# .2+h! [.rotate]#`hcounteren.HPM25`# @@ -24,6 +32,28 @@ hpmcounter25: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM25`# .2+h! [.rotate]#`scounteren.HPM25`# + 2+^.>h! `hpmcounter25` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM25`# + ^.>h! `hpmcounter25` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter26.yaml b/arch/csr/Zihpm/hpmcounter26.yaml index 5f15a64f4..1efbdc4a6 100644 --- a/arch/csr/Zihpm/hpmcounter26.yaml +++ b/arch/csr/Zihpm/hpmcounter26.yaml @@ -10,8 +10,16 @@ hpmcounter26: description: | Alias for M-mode CSR `mhpmcounter26`. - Privilege mode access is controlled with `mcounteren.HPM26`, `scounteren.HPM26`, and `hcounteren.HPM26` as follows: + Privilege mode access is controlled with `mcounteren.HPM26` + <%- if ext?(:S) -%> + , `scounteren.HPM26` + <%- if ext?(:H) -%> + , and `hcounteren.HPM26` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM26`# .2+h! [.rotate]#`scounteren.HPM26`# .2+h! [.rotate]#`hcounteren.HPM26`# @@ -24,6 +32,28 @@ hpmcounter26: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM26`# .2+h! [.rotate]#`scounteren.HPM26`# + 2+^.>h! `hpmcounter26` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM26`# + ^.>h! `hpmcounter26` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter27.yaml b/arch/csr/Zihpm/hpmcounter27.yaml index ba17798b1..d941d382f 100644 --- a/arch/csr/Zihpm/hpmcounter27.yaml +++ b/arch/csr/Zihpm/hpmcounter27.yaml @@ -10,8 +10,16 @@ hpmcounter27: description: | Alias for M-mode CSR `mhpmcounter27`. - Privilege mode access is controlled with `mcounteren.HPM27`, `scounteren.HPM27`, and `hcounteren.HPM27` as follows: + Privilege mode access is controlled with `mcounteren.HPM27` + <%- if ext?(:S) -%> + , `scounteren.HPM27` + <%- if ext?(:H) -%> + , and `hcounteren.HPM27` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM27`# .2+h! [.rotate]#`scounteren.HPM27`# .2+h! [.rotate]#`hcounteren.HPM27`# @@ -24,6 +32,28 @@ hpmcounter27: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM27`# .2+h! [.rotate]#`scounteren.HPM27`# + 2+^.>h! `hpmcounter27` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM27`# + ^.>h! `hpmcounter27` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter28.yaml b/arch/csr/Zihpm/hpmcounter28.yaml index 08144307a..875eb2b7b 100644 --- a/arch/csr/Zihpm/hpmcounter28.yaml +++ b/arch/csr/Zihpm/hpmcounter28.yaml @@ -10,8 +10,16 @@ hpmcounter28: description: | Alias for M-mode CSR `mhpmcounter28`. - Privilege mode access is controlled with `mcounteren.HPM28`, `scounteren.HPM28`, and `hcounteren.HPM28` as follows: + Privilege mode access is controlled with `mcounteren.HPM28` + <%- if ext?(:S) -%> + , `scounteren.HPM28` + <%- if ext?(:H) -%> + , and `hcounteren.HPM28` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM28`# .2+h! [.rotate]#`scounteren.HPM28`# .2+h! [.rotate]#`hcounteren.HPM28`# @@ -24,6 +32,28 @@ hpmcounter28: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM28`# .2+h! [.rotate]#`scounteren.HPM28`# + 2+^.>h! `hpmcounter28` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM28`# + ^.>h! `hpmcounter28` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter29.yaml b/arch/csr/Zihpm/hpmcounter29.yaml index 7932e47b7..6cb554ad6 100644 --- a/arch/csr/Zihpm/hpmcounter29.yaml +++ b/arch/csr/Zihpm/hpmcounter29.yaml @@ -10,8 +10,16 @@ hpmcounter29: description: | Alias for M-mode CSR `mhpmcounter29`. - Privilege mode access is controlled with `mcounteren.HPM29`, `scounteren.HPM29`, and `hcounteren.HPM29` as follows: + Privilege mode access is controlled with `mcounteren.HPM29` + <%- if ext?(:S) -%> + , `scounteren.HPM29` + <%- if ext?(:H) -%> + , and `hcounteren.HPM29` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM29`# .2+h! [.rotate]#`scounteren.HPM29`# .2+h! [.rotate]#`hcounteren.HPM29`# @@ -24,6 +32,28 @@ hpmcounter29: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM29`# .2+h! [.rotate]#`scounteren.HPM29`# + 2+^.>h! `hpmcounter29` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM29`# + ^.>h! `hpmcounter29` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter3.yaml b/arch/csr/Zihpm/hpmcounter3.yaml index 3da922465..03f1037f0 100644 --- a/arch/csr/Zihpm/hpmcounter3.yaml +++ b/arch/csr/Zihpm/hpmcounter3.yaml @@ -10,8 +10,16 @@ hpmcounter3: description: | Alias for M-mode CSR `mhpmcounter3`. - Privilege mode access is controlled with `mcounteren.HPM3`, `scounteren.HPM3`, and `hcounteren.HPM3` as follows: + Privilege mode access is controlled with `mcounteren.HPM3` + <%- if ext?(:S) -%> + , `scounteren.HPM3` + <%- if ext?(:H) -%> + , and `hcounteren.HPM3` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM3`# .2+h! [.rotate]#`scounteren.HPM3`# .2+h! [.rotate]#`hcounteren.HPM3`# @@ -24,6 +32,28 @@ hpmcounter3: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM3`# .2+h! [.rotate]#`scounteren.HPM3`# + 2+^.>h! `hpmcounter3` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM3`# + ^.>h! `hpmcounter3` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter30.yaml b/arch/csr/Zihpm/hpmcounter30.yaml index 57f25add0..881a4b757 100644 --- a/arch/csr/Zihpm/hpmcounter30.yaml +++ b/arch/csr/Zihpm/hpmcounter30.yaml @@ -10,8 +10,16 @@ hpmcounter30: description: | Alias for M-mode CSR `mhpmcounter30`. - Privilege mode access is controlled with `mcounteren.HPM30`, `scounteren.HPM30`, and `hcounteren.HPM30` as follows: + Privilege mode access is controlled with `mcounteren.HPM30` + <%- if ext?(:S) -%> + , `scounteren.HPM30` + <%- if ext?(:H) -%> + , and `hcounteren.HPM30` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM30`# .2+h! [.rotate]#`scounteren.HPM30`# .2+h! [.rotate]#`hcounteren.HPM30`# @@ -24,6 +32,28 @@ hpmcounter30: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM30`# .2+h! [.rotate]#`scounteren.HPM30`# + 2+^.>h! `hpmcounter30` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM30`# + ^.>h! `hpmcounter30` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter31.yaml b/arch/csr/Zihpm/hpmcounter31.yaml index bbc3644a1..b865815d6 100644 --- a/arch/csr/Zihpm/hpmcounter31.yaml +++ b/arch/csr/Zihpm/hpmcounter31.yaml @@ -10,8 +10,16 @@ hpmcounter31: description: | Alias for M-mode CSR `mhpmcounter31`. - Privilege mode access is controlled with `mcounteren.HPM31`, `scounteren.HPM31`, and `hcounteren.HPM31` as follows: + Privilege mode access is controlled with `mcounteren.HPM31` + <%- if ext?(:S) -%> + , `scounteren.HPM31` + <%- if ext?(:H) -%> + , and `hcounteren.HPM31` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM31`# .2+h! [.rotate]#`scounteren.HPM31`# .2+h! [.rotate]#`hcounteren.HPM31`# @@ -24,6 +32,28 @@ hpmcounter31: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM31`# .2+h! [.rotate]#`scounteren.HPM31`# + 2+^.>h! `hpmcounter31` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM31`# + ^.>h! `hpmcounter31` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter4.yaml b/arch/csr/Zihpm/hpmcounter4.yaml index a9829efda..5eefd5031 100644 --- a/arch/csr/Zihpm/hpmcounter4.yaml +++ b/arch/csr/Zihpm/hpmcounter4.yaml @@ -10,8 +10,16 @@ hpmcounter4: description: | Alias for M-mode CSR `mhpmcounter4`. - Privilege mode access is controlled with `mcounteren.HPM4`, `scounteren.HPM4`, and `hcounteren.HPM4` as follows: + Privilege mode access is controlled with `mcounteren.HPM4` + <%- if ext?(:S) -%> + , `scounteren.HPM4` + <%- if ext?(:H) -%> + , and `hcounteren.HPM4` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM4`# .2+h! [.rotate]#`scounteren.HPM4`# .2+h! [.rotate]#`hcounteren.HPM4`# @@ -24,6 +32,28 @@ hpmcounter4: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM4`# .2+h! [.rotate]#`scounteren.HPM4`# + 2+^.>h! `hpmcounter4` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM4`# + ^.>h! `hpmcounter4` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter5.yaml b/arch/csr/Zihpm/hpmcounter5.yaml index 584552fcb..dd388b8d1 100644 --- a/arch/csr/Zihpm/hpmcounter5.yaml +++ b/arch/csr/Zihpm/hpmcounter5.yaml @@ -10,8 +10,16 @@ hpmcounter5: description: | Alias for M-mode CSR `mhpmcounter5`. - Privilege mode access is controlled with `mcounteren.HPM5`, `scounteren.HPM5`, and `hcounteren.HPM5` as follows: + Privilege mode access is controlled with `mcounteren.HPM5` + <%- if ext?(:S) -%> + , `scounteren.HPM5` + <%- if ext?(:H) -%> + , and `hcounteren.HPM5` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM5`# .2+h! [.rotate]#`scounteren.HPM5`# .2+h! [.rotate]#`hcounteren.HPM5`# @@ -24,6 +32,28 @@ hpmcounter5: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM5`# .2+h! [.rotate]#`scounteren.HPM5`# + 2+^.>h! `hpmcounter5` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM5`# + ^.>h! `hpmcounter5` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter6.yaml b/arch/csr/Zihpm/hpmcounter6.yaml index 2cfacb8dd..bab5a0317 100644 --- a/arch/csr/Zihpm/hpmcounter6.yaml +++ b/arch/csr/Zihpm/hpmcounter6.yaml @@ -10,8 +10,16 @@ hpmcounter6: description: | Alias for M-mode CSR `mhpmcounter6`. - Privilege mode access is controlled with `mcounteren.HPM6`, `scounteren.HPM6`, and `hcounteren.HPM6` as follows: + Privilege mode access is controlled with `mcounteren.HPM6` + <%- if ext?(:S) -%> + , `scounteren.HPM6` + <%- if ext?(:H) -%> + , and `hcounteren.HPM6` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM6`# .2+h! [.rotate]#`scounteren.HPM6`# .2+h! [.rotate]#`hcounteren.HPM6`# @@ -24,6 +32,28 @@ hpmcounter6: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM6`# .2+h! [.rotate]#`scounteren.HPM6`# + 2+^.>h! `hpmcounter6` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM6`# + ^.>h! `hpmcounter6` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter7.yaml b/arch/csr/Zihpm/hpmcounter7.yaml index a82e46388..d38c201f8 100644 --- a/arch/csr/Zihpm/hpmcounter7.yaml +++ b/arch/csr/Zihpm/hpmcounter7.yaml @@ -10,8 +10,16 @@ hpmcounter7: description: | Alias for M-mode CSR `mhpmcounter7`. - Privilege mode access is controlled with `mcounteren.HPM7`, `scounteren.HPM7`, and `hcounteren.HPM7` as follows: + Privilege mode access is controlled with `mcounteren.HPM7` + <%- if ext?(:S) -%> + , `scounteren.HPM7` + <%- if ext?(:H) -%> + , and `hcounteren.HPM7` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM7`# .2+h! [.rotate]#`scounteren.HPM7`# .2+h! [.rotate]#`hcounteren.HPM7`# @@ -24,6 +32,28 @@ hpmcounter7: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM7`# .2+h! [.rotate]#`scounteren.HPM7`# + 2+^.>h! `hpmcounter7` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM7`# + ^.>h! `hpmcounter7` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter8.yaml b/arch/csr/Zihpm/hpmcounter8.yaml index ed3e0504f..3e6346621 100644 --- a/arch/csr/Zihpm/hpmcounter8.yaml +++ b/arch/csr/Zihpm/hpmcounter8.yaml @@ -10,8 +10,16 @@ hpmcounter8: description: | Alias for M-mode CSR `mhpmcounter8`. - Privilege mode access is controlled with `mcounteren.HPM8`, `scounteren.HPM8`, and `hcounteren.HPM8` as follows: + Privilege mode access is controlled with `mcounteren.HPM8` + <%- if ext?(:S) -%> + , `scounteren.HPM8` + <%- if ext?(:H) -%> + , and `hcounteren.HPM8` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM8`# .2+h! [.rotate]#`scounteren.HPM8`# .2+h! [.rotate]#`hcounteren.HPM8`# @@ -24,6 +32,28 @@ hpmcounter8: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM8`# .2+h! [.rotate]#`scounteren.HPM8`# + 2+^.>h! `hpmcounter8` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM8`# + ^.>h! `hpmcounter8` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounter9.yaml b/arch/csr/Zihpm/hpmcounter9.yaml index 83ab36be1..85f1d8994 100644 --- a/arch/csr/Zihpm/hpmcounter9.yaml +++ b/arch/csr/Zihpm/hpmcounter9.yaml @@ -10,8 +10,16 @@ hpmcounter9: description: | Alias for M-mode CSR `mhpmcounter9`. - Privilege mode access is controlled with `mcounteren.HPM9`, `scounteren.HPM9`, and `hcounteren.HPM9` as follows: + Privilege mode access is controlled with `mcounteren.HPM9` + <%- if ext?(:S) -%> + , `scounteren.HPM9` + <%- if ext?(:H) -%> + , and `hcounteren.HPM9` + <%- end -%> + <%- end -%> + as follows: + <%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM9`# .2+h! [.rotate]#`scounteren.HPM9`# .2+h! [.rotate]#`hcounteren.HPM9`# @@ -24,6 +32,28 @@ hpmcounter9: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM9`# .2+h! [.rotate]#`scounteren.HPM9`# + 2+^.>h! `hpmcounter9` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM9`# + ^.>h! `hpmcounter9` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/hpmcounterN.layout b/arch/csr/Zihpm/hpmcounterN.layout index fd7c99ea7..e9c5c93b9 100644 --- a/arch/csr/Zihpm/hpmcounterN.layout +++ b/arch/csr/Zihpm/hpmcounterN.layout @@ -8,8 +8,16 @@ hpmcounter<%= hpm_num %>: description: | Alias for M-mode CSR `mhpmcounter<%= hpm_num %>`. - Privilege mode access is controlled with `mcounteren.HPM<%= hpm_num %>`, `scounteren.HPM<%= hpm_num %>`, and `hcounteren.HPM<%= hpm_num %>` as follows: + Privilege mode access is controlled with `mcounteren.HPM<%= hpm_num %>` + <%%- if ext?(:S) -%> + , `scounteren.HPM<%= hpm_num %>` + <%%- if ext?(:H) -%> + , and `hcounteren.HPM<%= hpm_num %>` + <%%- end -%> + <%%- end -%> + as follows: + <%%- if ext?(:H) -%> [%autowidth,cols="1,1,1,1,1,1,1",separator="!"] !=== .2+h![.rotate]#`mcounteren.HPM<%= hpm_num %>`# .2+h! [.rotate]#`scounteren.HPM<%= hpm_num %>`# .2+h! [.rotate]#`hcounteren.HPM<%= hpm_num %>`# @@ -22,6 +30,28 @@ hpmcounter<%= hpm_num %>: ! 1 ! 0 ! 1 ! read-only ! `IllegalInstruction` ! read-only ! `VirtualInstruction` ! 1 ! 1 ! 1 ! read-only ! read-only ! read-only ! read-only !=== + <%%- elsif ext?(:S) -%> + [%autowidth,cols="1,1,1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM<%= hpm_num %>`# .2+h! [.rotate]#`scounteren.HPM<%= hpm_num %>`# + 2+^.>h! `hpmcounter<%= hpm_num %>` behavior + .^h! S-mode .^h! U-mode + + ! 0 ! - ! `IllegalInstruction` ! `IllegalInstruction` + ! 1 ! 0 ! read-only ! `IllegalInstruction` + ! 1 ! 1 ! read-only ! read-only + !=== + <%%- else -%> + [%autowidth,cols="1,1",separator="!"] + !=== + .2+h![.rotate]#`mcounteren.HPM<%= hpm_num %>`# + ^.>h! `hpmcounter<%= hpm_num %>` behavior + .^h! U-mode + + ! 0 ! `IllegalInstruction` + ! 1 ! read-only + !=== + <%%- end -%> priv_mode: U length: 64 definedBy: Zihpm diff --git a/arch/csr/Zihpm/mhpmcounter10.yaml b/arch/csr/Zihpm/mhpmcounter10.yaml index 563ec1664..fd79cd717 100644 --- a/arch/csr/Zihpm/mhpmcounter10.yaml +++ b/arch/csr/Zihpm/mhpmcounter10.yaml @@ -15,7 +15,7 @@ mhpmcounter10: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 7 -%> + <%- if HPM_COUNTER_EN[10] -%> Performance counter for event selected in `mhpmevent10.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter10: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 7) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 7) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[10]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[10]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 7) { + if (HPM_COUNTER_EN[10]) { return read_hpm_counter(10); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter11.yaml b/arch/csr/Zihpm/mhpmcounter11.yaml index 40ad6788d..c7bb51197 100644 --- a/arch/csr/Zihpm/mhpmcounter11.yaml +++ b/arch/csr/Zihpm/mhpmcounter11.yaml @@ -15,7 +15,7 @@ mhpmcounter11: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 8 -%> + <%- if HPM_COUNTER_EN[11] -%> Performance counter for event selected in `mhpmevent11.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter11: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 8) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 8) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[11]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[11]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 8) { + if (HPM_COUNTER_EN[11]) { return read_hpm_counter(11); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter12.yaml b/arch/csr/Zihpm/mhpmcounter12.yaml index 09d83529e..e1635db3a 100644 --- a/arch/csr/Zihpm/mhpmcounter12.yaml +++ b/arch/csr/Zihpm/mhpmcounter12.yaml @@ -15,7 +15,7 @@ mhpmcounter12: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 9 -%> + <%- if HPM_COUNTER_EN[12] -%> Performance counter for event selected in `mhpmevent12.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter12: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 9) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 9) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[12]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[12]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 9) { + if (HPM_COUNTER_EN[12]) { return read_hpm_counter(12); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter13.yaml b/arch/csr/Zihpm/mhpmcounter13.yaml index 1e11532da..a8484ee33 100644 --- a/arch/csr/Zihpm/mhpmcounter13.yaml +++ b/arch/csr/Zihpm/mhpmcounter13.yaml @@ -15,7 +15,7 @@ mhpmcounter13: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 10 -%> + <%- if HPM_COUNTER_EN[13] -%> Performance counter for event selected in `mhpmevent13.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter13: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 10) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 10) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[13]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[13]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 10) { + if (HPM_COUNTER_EN[13]) { return read_hpm_counter(13); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter14.yaml b/arch/csr/Zihpm/mhpmcounter14.yaml index a0bb95f6f..4229c80a4 100644 --- a/arch/csr/Zihpm/mhpmcounter14.yaml +++ b/arch/csr/Zihpm/mhpmcounter14.yaml @@ -15,7 +15,7 @@ mhpmcounter14: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 11 -%> + <%- if HPM_COUNTER_EN[14] -%> Performance counter for event selected in `mhpmevent14.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter14: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 11) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 11) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[14]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[14]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 11) { + if (HPM_COUNTER_EN[14]) { return read_hpm_counter(14); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter15.yaml b/arch/csr/Zihpm/mhpmcounter15.yaml index 0cc42d9c9..4cb857dbf 100644 --- a/arch/csr/Zihpm/mhpmcounter15.yaml +++ b/arch/csr/Zihpm/mhpmcounter15.yaml @@ -15,7 +15,7 @@ mhpmcounter15: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 12 -%> + <%- if HPM_COUNTER_EN[15] -%> Performance counter for event selected in `mhpmevent15.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter15: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 12) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 12) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[15]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[15]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 12) { + if (HPM_COUNTER_EN[15]) { return read_hpm_counter(15); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter16.yaml b/arch/csr/Zihpm/mhpmcounter16.yaml index 3fcf2cb44..78232bd7e 100644 --- a/arch/csr/Zihpm/mhpmcounter16.yaml +++ b/arch/csr/Zihpm/mhpmcounter16.yaml @@ -15,7 +15,7 @@ mhpmcounter16: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 13 -%> + <%- if HPM_COUNTER_EN[16] -%> Performance counter for event selected in `mhpmevent16.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter16: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 13) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 13) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[16]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[16]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 13) { + if (HPM_COUNTER_EN[16]) { return read_hpm_counter(16); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter17.yaml b/arch/csr/Zihpm/mhpmcounter17.yaml index 0b52a9ebb..33b5acdb3 100644 --- a/arch/csr/Zihpm/mhpmcounter17.yaml +++ b/arch/csr/Zihpm/mhpmcounter17.yaml @@ -15,7 +15,7 @@ mhpmcounter17: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 14 -%> + <%- if HPM_COUNTER_EN[17] -%> Performance counter for event selected in `mhpmevent17.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter17: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 14) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 14) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[17]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[17]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 14) { + if (HPM_COUNTER_EN[17]) { return read_hpm_counter(17); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter18.yaml b/arch/csr/Zihpm/mhpmcounter18.yaml index 66d09f631..66d0cf473 100644 --- a/arch/csr/Zihpm/mhpmcounter18.yaml +++ b/arch/csr/Zihpm/mhpmcounter18.yaml @@ -15,7 +15,7 @@ mhpmcounter18: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 15 -%> + <%- if HPM_COUNTER_EN[18] -%> Performance counter for event selected in `mhpmevent18.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter18: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 15) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 15) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[18]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[18]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 15) { + if (HPM_COUNTER_EN[18]) { return read_hpm_counter(18); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter19.yaml b/arch/csr/Zihpm/mhpmcounter19.yaml index d735cd9bf..01efae8bb 100644 --- a/arch/csr/Zihpm/mhpmcounter19.yaml +++ b/arch/csr/Zihpm/mhpmcounter19.yaml @@ -15,7 +15,7 @@ mhpmcounter19: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 16 -%> + <%- if HPM_COUNTER_EN[19] -%> Performance counter for event selected in `mhpmevent19.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter19: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 16) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 16) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[19]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[19]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 16) { + if (HPM_COUNTER_EN[19]) { return read_hpm_counter(19); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter20.yaml b/arch/csr/Zihpm/mhpmcounter20.yaml index 853923e36..3060d9408 100644 --- a/arch/csr/Zihpm/mhpmcounter20.yaml +++ b/arch/csr/Zihpm/mhpmcounter20.yaml @@ -15,7 +15,7 @@ mhpmcounter20: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 17 -%> + <%- if HPM_COUNTER_EN[20] -%> Performance counter for event selected in `mhpmevent20.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter20: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 17) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 17) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[20]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[20]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 17) { + if (HPM_COUNTER_EN[20]) { return read_hpm_counter(20); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter21.yaml b/arch/csr/Zihpm/mhpmcounter21.yaml index 34e299c90..68df120f8 100644 --- a/arch/csr/Zihpm/mhpmcounter21.yaml +++ b/arch/csr/Zihpm/mhpmcounter21.yaml @@ -15,7 +15,7 @@ mhpmcounter21: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 18 -%> + <%- if HPM_COUNTER_EN[21] -%> Performance counter for event selected in `mhpmevent21.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter21: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 18) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 18) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[21]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[21]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 18) { + if (HPM_COUNTER_EN[21]) { return read_hpm_counter(21); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter22.yaml b/arch/csr/Zihpm/mhpmcounter22.yaml index ea831f981..81bc2f8f2 100644 --- a/arch/csr/Zihpm/mhpmcounter22.yaml +++ b/arch/csr/Zihpm/mhpmcounter22.yaml @@ -15,7 +15,7 @@ mhpmcounter22: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 19 -%> + <%- if HPM_COUNTER_EN[22] -%> Performance counter for event selected in `mhpmevent22.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter22: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 19) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 19) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[22]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[22]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 19) { + if (HPM_COUNTER_EN[22]) { return read_hpm_counter(22); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter23.yaml b/arch/csr/Zihpm/mhpmcounter23.yaml index ba5817bf1..1d3b3b20d 100644 --- a/arch/csr/Zihpm/mhpmcounter23.yaml +++ b/arch/csr/Zihpm/mhpmcounter23.yaml @@ -15,7 +15,7 @@ mhpmcounter23: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 20 -%> + <%- if HPM_COUNTER_EN[23] -%> Performance counter for event selected in `mhpmevent23.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter23: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 20) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 20) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[23]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[23]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 20) { + if (HPM_COUNTER_EN[23]) { return read_hpm_counter(23); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter24.yaml b/arch/csr/Zihpm/mhpmcounter24.yaml index 4d73d1889..10bd445df 100644 --- a/arch/csr/Zihpm/mhpmcounter24.yaml +++ b/arch/csr/Zihpm/mhpmcounter24.yaml @@ -15,7 +15,7 @@ mhpmcounter24: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 21 -%> + <%- if HPM_COUNTER_EN[24] -%> Performance counter for event selected in `mhpmevent24.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter24: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 21) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 21) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[24]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[24]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 21) { + if (HPM_COUNTER_EN[24]) { return read_hpm_counter(24); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter25.yaml b/arch/csr/Zihpm/mhpmcounter25.yaml index 77f75e8ba..1e65759d4 100644 --- a/arch/csr/Zihpm/mhpmcounter25.yaml +++ b/arch/csr/Zihpm/mhpmcounter25.yaml @@ -15,7 +15,7 @@ mhpmcounter25: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 22 -%> + <%- if HPM_COUNTER_EN[25] -%> Performance counter for event selected in `mhpmevent25.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter25: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 22) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 22) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[25]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[25]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 22) { + if (HPM_COUNTER_EN[25]) { return read_hpm_counter(25); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter26.yaml b/arch/csr/Zihpm/mhpmcounter26.yaml index 88dd15793..69f568a86 100644 --- a/arch/csr/Zihpm/mhpmcounter26.yaml +++ b/arch/csr/Zihpm/mhpmcounter26.yaml @@ -15,7 +15,7 @@ mhpmcounter26: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 23 -%> + <%- if HPM_COUNTER_EN[26] -%> Performance counter for event selected in `mhpmevent26.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter26: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 23) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 23) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[26]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[26]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 23) { + if (HPM_COUNTER_EN[26]) { return read_hpm_counter(26); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter27.yaml b/arch/csr/Zihpm/mhpmcounter27.yaml index 72333cf55..135e23c6c 100644 --- a/arch/csr/Zihpm/mhpmcounter27.yaml +++ b/arch/csr/Zihpm/mhpmcounter27.yaml @@ -15,7 +15,7 @@ mhpmcounter27: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 24 -%> + <%- if HPM_COUNTER_EN[27] -%> Performance counter for event selected in `mhpmevent27.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter27: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 24) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 24) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[27]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[27]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 24) { + if (HPM_COUNTER_EN[27]) { return read_hpm_counter(27); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter28.yaml b/arch/csr/Zihpm/mhpmcounter28.yaml index 412c224bf..2f93c6685 100644 --- a/arch/csr/Zihpm/mhpmcounter28.yaml +++ b/arch/csr/Zihpm/mhpmcounter28.yaml @@ -15,7 +15,7 @@ mhpmcounter28: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 25 -%> + <%- if HPM_COUNTER_EN[28] -%> Performance counter for event selected in `mhpmevent28.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter28: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 25) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 25) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[28]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[28]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 25) { + if (HPM_COUNTER_EN[28]) { return read_hpm_counter(28); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter29.yaml b/arch/csr/Zihpm/mhpmcounter29.yaml index f0a6065a6..bf4a80ac4 100644 --- a/arch/csr/Zihpm/mhpmcounter29.yaml +++ b/arch/csr/Zihpm/mhpmcounter29.yaml @@ -15,7 +15,7 @@ mhpmcounter29: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 26 -%> + <%- if HPM_COUNTER_EN[29] -%> Performance counter for event selected in `mhpmevent29.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter29: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 26) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 26) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[29]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[29]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 26) { + if (HPM_COUNTER_EN[29]) { return read_hpm_counter(29); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter3.yaml b/arch/csr/Zihpm/mhpmcounter3.yaml index dc5114ad1..2f99be52b 100644 --- a/arch/csr/Zihpm/mhpmcounter3.yaml +++ b/arch/csr/Zihpm/mhpmcounter3.yaml @@ -15,7 +15,7 @@ mhpmcounter3: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 0 -%> + <%- if HPM_COUNTER_EN[3] -%> Performance counter for event selected in `mhpmevent3.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter3: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 0) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 0) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[3]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[3]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 0) { + if (HPM_COUNTER_EN[3]) { return read_hpm_counter(3); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter30.yaml b/arch/csr/Zihpm/mhpmcounter30.yaml index 632156bca..5bc4612a9 100644 --- a/arch/csr/Zihpm/mhpmcounter30.yaml +++ b/arch/csr/Zihpm/mhpmcounter30.yaml @@ -15,7 +15,7 @@ mhpmcounter30: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 27 -%> + <%- if HPM_COUNTER_EN[30] -%> Performance counter for event selected in `mhpmevent30.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter30: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 27) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 27) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[30]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[30]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 27) { + if (HPM_COUNTER_EN[30]) { return read_hpm_counter(30); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter31.yaml b/arch/csr/Zihpm/mhpmcounter31.yaml index fe9ba262a..99be6af23 100644 --- a/arch/csr/Zihpm/mhpmcounter31.yaml +++ b/arch/csr/Zihpm/mhpmcounter31.yaml @@ -15,7 +15,7 @@ mhpmcounter31: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 28 -%> + <%- if HPM_COUNTER_EN[31] -%> Performance counter for event selected in `mhpmevent31.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter31: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 28) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 28) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[31]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[31]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 28) { + if (HPM_COUNTER_EN[31]) { return read_hpm_counter(31); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter4.yaml b/arch/csr/Zihpm/mhpmcounter4.yaml index aec5021ac..ae9349ba8 100644 --- a/arch/csr/Zihpm/mhpmcounter4.yaml +++ b/arch/csr/Zihpm/mhpmcounter4.yaml @@ -15,7 +15,7 @@ mhpmcounter4: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 1 -%> + <%- if HPM_COUNTER_EN[4] -%> Performance counter for event selected in `mhpmevent4.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter4: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 1) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 1) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[4]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[4]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 1) { + if (HPM_COUNTER_EN[4]) { return read_hpm_counter(4); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter5.yaml b/arch/csr/Zihpm/mhpmcounter5.yaml index 2d4b4d174..7ff8e4943 100644 --- a/arch/csr/Zihpm/mhpmcounter5.yaml +++ b/arch/csr/Zihpm/mhpmcounter5.yaml @@ -15,7 +15,7 @@ mhpmcounter5: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 2 -%> + <%- if HPM_COUNTER_EN[5] -%> Performance counter for event selected in `mhpmevent5.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter5: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 2) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 2) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[5]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[5]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 2) { + if (HPM_COUNTER_EN[5]) { return read_hpm_counter(5); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter6.yaml b/arch/csr/Zihpm/mhpmcounter6.yaml index 042206c72..6187f5842 100644 --- a/arch/csr/Zihpm/mhpmcounter6.yaml +++ b/arch/csr/Zihpm/mhpmcounter6.yaml @@ -15,7 +15,7 @@ mhpmcounter6: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 3 -%> + <%- if HPM_COUNTER_EN[6] -%> Performance counter for event selected in `mhpmevent6.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter6: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 3) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 3) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[6]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[6]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 3) { + if (HPM_COUNTER_EN[6]) { return read_hpm_counter(6); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter7.yaml b/arch/csr/Zihpm/mhpmcounter7.yaml index 452273b4b..0aa38dac9 100644 --- a/arch/csr/Zihpm/mhpmcounter7.yaml +++ b/arch/csr/Zihpm/mhpmcounter7.yaml @@ -15,7 +15,7 @@ mhpmcounter7: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 4 -%> + <%- if HPM_COUNTER_EN[7] -%> Performance counter for event selected in `mhpmevent7.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter7: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 4) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 4) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[7]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[7]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 4) { + if (HPM_COUNTER_EN[7]) { return read_hpm_counter(7); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter8.yaml b/arch/csr/Zihpm/mhpmcounter8.yaml index 0489a60bf..76b1b7025 100644 --- a/arch/csr/Zihpm/mhpmcounter8.yaml +++ b/arch/csr/Zihpm/mhpmcounter8.yaml @@ -15,7 +15,7 @@ mhpmcounter8: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 5 -%> + <%- if HPM_COUNTER_EN[8] -%> Performance counter for event selected in `mhpmevent8.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter8: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 5) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 5) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[8]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[8]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 5) { + if (HPM_COUNTER_EN[8]) { return read_hpm_counter(8); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounter9.yaml b/arch/csr/Zihpm/mhpmcounter9.yaml index e2283e469..9e0404d34 100644 --- a/arch/csr/Zihpm/mhpmcounter9.yaml +++ b/arch/csr/Zihpm/mhpmcounter9.yaml @@ -15,7 +15,7 @@ mhpmcounter9: COUNT: location: 63-0 description: | - <%- if NUM_HPM_COUNTERS > 6 -%> + <%- if HPM_COUNTER_EN[9] -%> Performance counter for event selected in `mhpmevent9.EVENT`. Increments every time event occurs unless: @@ -38,10 +38,10 @@ mhpmcounter9: Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%- end -%> - type(): 'return (NUM_HPM_COUNTERS > 6) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > 6) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[9]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[9]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= 6) { + if (HPM_COUNTER_EN[9]) { return read_hpm_counter(9); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmcounterN.layout b/arch/csr/Zihpm/mhpmcounterN.layout index ca792d0ad..9c28bd638 100644 --- a/arch/csr/Zihpm/mhpmcounterN.layout +++ b/arch/csr/Zihpm/mhpmcounterN.layout @@ -13,7 +13,7 @@ COUNT: location: 63-0 description: | - <%%- if NUM_HPM_COUNTERS > <%= hpm_num - 3 %> -%> + <%%- if HPM_COUNTER_EN[<%= hpm_num %>] -%> Performance counter for event selected in `mhpmevent<%= hpm_num %>.EVENT`. Increments every time event occurs unless: @@ -36,10 +36,10 @@ Unimplemented performance counter. Must be read-only 0 (access does not cause trap). <%%- end -%> - type(): 'return (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) ? CsrFieldType::RWH : CsrFieldType::RO;' - reset_value(): 'return (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) ? UNDEFINED_LEGAL : 0;' + type(): 'return (HPM_COUNTER_EN[<%= hpm_num %>]) ? CsrFieldType::RWH : CsrFieldType::RO;' + reset_value(): 'return (HPM_COUNTER_EN[<%= hpm_num %>]) ? UNDEFINED_LEGAL : 0;' sw_read(): | - if (NUM_HPM_COUNTERS <= <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return read_hpm_counter(<%= hpm_num %>); } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent10.yaml b/arch/csr/Zihpm/mhpmevent10.yaml index 132a07efe..9b9aa276a 100644 --- a/arch/csr/Zihpm/mhpmevent10.yaml +++ b/arch/csr/Zihpm/mhpmevent10.yaml @@ -29,13 +29,13 @@ mhpmevent10: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter10 overflows. type(): | - if (NUM_HPM_COUNTERS > 7) { + if (HPM_COUNTER_EN[10]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 7) { + if (HPM_COUNTER_EN[10]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent10: location: 62 description: When set, mhpmcounter10 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 7) { + if (HPM_COUNTER_EN[10]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 7) { + if (HPM_COUNTER_EN[10]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent10: location: 61 description: When set, mhpmcounter10 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[10] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[10] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent10: location: 60 description: When set, mhpmcounter10 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[10] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[10] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent10: location: 59 description: When set, mhpmcounter10 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[10]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[10] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent10: location: 58 description: When set, mhpmcounter10 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[10] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 7) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[10]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent10: location: 57-0 description: Event selector for performance counter `mhpmcounter10`. type(): | - if (NUM_HPM_COUNTERS > 7) { + if (HPM_COUNTER_EN[10]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 7) { + if (HPM_COUNTER_EN[10]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent11.yaml b/arch/csr/Zihpm/mhpmevent11.yaml index 4167e7319..a7ed14484 100644 --- a/arch/csr/Zihpm/mhpmevent11.yaml +++ b/arch/csr/Zihpm/mhpmevent11.yaml @@ -29,13 +29,13 @@ mhpmevent11: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter11 overflows. type(): | - if (NUM_HPM_COUNTERS > 8) { + if (HPM_COUNTER_EN[11]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 8) { + if (HPM_COUNTER_EN[11]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent11: location: 62 description: When set, mhpmcounter11 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 8) { + if (HPM_COUNTER_EN[11]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 8) { + if (HPM_COUNTER_EN[11]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent11: location: 61 description: When set, mhpmcounter11 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[11] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[11] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent11: location: 60 description: When set, mhpmcounter11 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[11] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[11] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent11: location: 59 description: When set, mhpmcounter11 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[11]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[11] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent11: location: 58 description: When set, mhpmcounter11 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[11] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 8) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[11]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent11: location: 57-0 description: Event selector for performance counter `mhpmcounter11`. type(): | - if (NUM_HPM_COUNTERS > 8) { + if (HPM_COUNTER_EN[11]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 8) { + if (HPM_COUNTER_EN[11]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent12.yaml b/arch/csr/Zihpm/mhpmevent12.yaml index 9411b84e3..dad913b88 100644 --- a/arch/csr/Zihpm/mhpmevent12.yaml +++ b/arch/csr/Zihpm/mhpmevent12.yaml @@ -29,13 +29,13 @@ mhpmevent12: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter12 overflows. type(): | - if (NUM_HPM_COUNTERS > 9) { + if (HPM_COUNTER_EN[12]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 9) { + if (HPM_COUNTER_EN[12]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent12: location: 62 description: When set, mhpmcounter12 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 9) { + if (HPM_COUNTER_EN[12]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 9) { + if (HPM_COUNTER_EN[12]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent12: location: 61 description: When set, mhpmcounter12 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[12] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[12] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent12: location: 60 description: When set, mhpmcounter12 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[12] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[12] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent12: location: 59 description: When set, mhpmcounter12 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[12]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[12] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent12: location: 58 description: When set, mhpmcounter12 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[12] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 9) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[12]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent12: location: 57-0 description: Event selector for performance counter `mhpmcounter12`. type(): | - if (NUM_HPM_COUNTERS > 9) { + if (HPM_COUNTER_EN[12]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 9) { + if (HPM_COUNTER_EN[12]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent13.yaml b/arch/csr/Zihpm/mhpmevent13.yaml index 4a5c661ea..b6536f22a 100644 --- a/arch/csr/Zihpm/mhpmevent13.yaml +++ b/arch/csr/Zihpm/mhpmevent13.yaml @@ -29,13 +29,13 @@ mhpmevent13: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter13 overflows. type(): | - if (NUM_HPM_COUNTERS > 10) { + if (HPM_COUNTER_EN[13]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 10) { + if (HPM_COUNTER_EN[13]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent13: location: 62 description: When set, mhpmcounter13 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 10) { + if (HPM_COUNTER_EN[13]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 10) { + if (HPM_COUNTER_EN[13]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent13: location: 61 description: When set, mhpmcounter13 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[13] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[13] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent13: location: 60 description: When set, mhpmcounter13 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[13] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[13] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent13: location: 59 description: When set, mhpmcounter13 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[13]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[13] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent13: location: 58 description: When set, mhpmcounter13 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[13] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 10) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[13]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent13: location: 57-0 description: Event selector for performance counter `mhpmcounter13`. type(): | - if (NUM_HPM_COUNTERS > 10) { + if (HPM_COUNTER_EN[13]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 10) { + if (HPM_COUNTER_EN[13]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent14.yaml b/arch/csr/Zihpm/mhpmevent14.yaml index 3d335522e..2fdda62cb 100644 --- a/arch/csr/Zihpm/mhpmevent14.yaml +++ b/arch/csr/Zihpm/mhpmevent14.yaml @@ -29,13 +29,13 @@ mhpmevent14: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter14 overflows. type(): | - if (NUM_HPM_COUNTERS > 11) { + if (HPM_COUNTER_EN[14]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 11) { + if (HPM_COUNTER_EN[14]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent14: location: 62 description: When set, mhpmcounter14 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 11) { + if (HPM_COUNTER_EN[14]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 11) { + if (HPM_COUNTER_EN[14]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent14: location: 61 description: When set, mhpmcounter14 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[14] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[14] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent14: location: 60 description: When set, mhpmcounter14 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[14] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[14] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent14: location: 59 description: When set, mhpmcounter14 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[14]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[14] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent14: location: 58 description: When set, mhpmcounter14 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[14] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 11) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[14]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent14: location: 57-0 description: Event selector for performance counter `mhpmcounter14`. type(): | - if (NUM_HPM_COUNTERS > 11) { + if (HPM_COUNTER_EN[14]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 11) { + if (HPM_COUNTER_EN[14]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent15.yaml b/arch/csr/Zihpm/mhpmevent15.yaml index 770be811b..89c7455d6 100644 --- a/arch/csr/Zihpm/mhpmevent15.yaml +++ b/arch/csr/Zihpm/mhpmevent15.yaml @@ -29,13 +29,13 @@ mhpmevent15: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter15 overflows. type(): | - if (NUM_HPM_COUNTERS > 12) { + if (HPM_COUNTER_EN[15]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 12) { + if (HPM_COUNTER_EN[15]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent15: location: 62 description: When set, mhpmcounter15 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 12) { + if (HPM_COUNTER_EN[15]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 12) { + if (HPM_COUNTER_EN[15]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent15: location: 61 description: When set, mhpmcounter15 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[15] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[15] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent15: location: 60 description: When set, mhpmcounter15 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[15] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[15] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent15: location: 59 description: When set, mhpmcounter15 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[15]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[15] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent15: location: 58 description: When set, mhpmcounter15 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[15] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 12) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[15]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent15: location: 57-0 description: Event selector for performance counter `mhpmcounter15`. type(): | - if (NUM_HPM_COUNTERS > 12) { + if (HPM_COUNTER_EN[15]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 12) { + if (HPM_COUNTER_EN[15]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent16.yaml b/arch/csr/Zihpm/mhpmevent16.yaml index 279d877c8..94751333a 100644 --- a/arch/csr/Zihpm/mhpmevent16.yaml +++ b/arch/csr/Zihpm/mhpmevent16.yaml @@ -29,13 +29,13 @@ mhpmevent16: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter16 overflows. type(): | - if (NUM_HPM_COUNTERS > 13) { + if (HPM_COUNTER_EN[16]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 13) { + if (HPM_COUNTER_EN[16]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent16: location: 62 description: When set, mhpmcounter16 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 13) { + if (HPM_COUNTER_EN[16]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 13) { + if (HPM_COUNTER_EN[16]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent16: location: 61 description: When set, mhpmcounter16 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[16] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[16] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent16: location: 60 description: When set, mhpmcounter16 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[16] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[16] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent16: location: 59 description: When set, mhpmcounter16 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[16]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[16] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent16: location: 58 description: When set, mhpmcounter16 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[16] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 13) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[16]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent16: location: 57-0 description: Event selector for performance counter `mhpmcounter16`. type(): | - if (NUM_HPM_COUNTERS > 13) { + if (HPM_COUNTER_EN[16]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 13) { + if (HPM_COUNTER_EN[16]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent17.yaml b/arch/csr/Zihpm/mhpmevent17.yaml index 4e4c445b5..000a002f9 100644 --- a/arch/csr/Zihpm/mhpmevent17.yaml +++ b/arch/csr/Zihpm/mhpmevent17.yaml @@ -29,13 +29,13 @@ mhpmevent17: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter17 overflows. type(): | - if (NUM_HPM_COUNTERS > 14) { + if (HPM_COUNTER_EN[17]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 14) { + if (HPM_COUNTER_EN[17]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent17: location: 62 description: When set, mhpmcounter17 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 14) { + if (HPM_COUNTER_EN[17]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 14) { + if (HPM_COUNTER_EN[17]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent17: location: 61 description: When set, mhpmcounter17 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[17] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[17] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent17: location: 60 description: When set, mhpmcounter17 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[17] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[17] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent17: location: 59 description: When set, mhpmcounter17 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[17]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[17] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent17: location: 58 description: When set, mhpmcounter17 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[17] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 14) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[17]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent17: location: 57-0 description: Event selector for performance counter `mhpmcounter17`. type(): | - if (NUM_HPM_COUNTERS > 14) { + if (HPM_COUNTER_EN[17]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 14) { + if (HPM_COUNTER_EN[17]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent18.yaml b/arch/csr/Zihpm/mhpmevent18.yaml index cebd5ce0c..a8262c7b9 100644 --- a/arch/csr/Zihpm/mhpmevent18.yaml +++ b/arch/csr/Zihpm/mhpmevent18.yaml @@ -29,13 +29,13 @@ mhpmevent18: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter18 overflows. type(): | - if (NUM_HPM_COUNTERS > 15) { + if (HPM_COUNTER_EN[18]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 15) { + if (HPM_COUNTER_EN[18]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent18: location: 62 description: When set, mhpmcounter18 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 15) { + if (HPM_COUNTER_EN[18]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 15) { + if (HPM_COUNTER_EN[18]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent18: location: 61 description: When set, mhpmcounter18 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[18] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[18] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent18: location: 60 description: When set, mhpmcounter18 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[18] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[18] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent18: location: 59 description: When set, mhpmcounter18 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[18]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[18] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent18: location: 58 description: When set, mhpmcounter18 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[18] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 15) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[18]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent18: location: 57-0 description: Event selector for performance counter `mhpmcounter18`. type(): | - if (NUM_HPM_COUNTERS > 15) { + if (HPM_COUNTER_EN[18]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 15) { + if (HPM_COUNTER_EN[18]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent19.yaml b/arch/csr/Zihpm/mhpmevent19.yaml index 347c92ca3..78e97c64d 100644 --- a/arch/csr/Zihpm/mhpmevent19.yaml +++ b/arch/csr/Zihpm/mhpmevent19.yaml @@ -29,13 +29,13 @@ mhpmevent19: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter19 overflows. type(): | - if (NUM_HPM_COUNTERS > 16) { + if (HPM_COUNTER_EN[19]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 16) { + if (HPM_COUNTER_EN[19]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent19: location: 62 description: When set, mhpmcounter19 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 16) { + if (HPM_COUNTER_EN[19]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 16) { + if (HPM_COUNTER_EN[19]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent19: location: 61 description: When set, mhpmcounter19 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[19] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[19] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent19: location: 60 description: When set, mhpmcounter19 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[19] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[19] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent19: location: 59 description: When set, mhpmcounter19 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[19]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[19] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent19: location: 58 description: When set, mhpmcounter19 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[19] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 16) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[19]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent19: location: 57-0 description: Event selector for performance counter `mhpmcounter19`. type(): | - if (NUM_HPM_COUNTERS > 16) { + if (HPM_COUNTER_EN[19]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 16) { + if (HPM_COUNTER_EN[19]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent20.yaml b/arch/csr/Zihpm/mhpmevent20.yaml index 77e149650..81a4e7d63 100644 --- a/arch/csr/Zihpm/mhpmevent20.yaml +++ b/arch/csr/Zihpm/mhpmevent20.yaml @@ -29,13 +29,13 @@ mhpmevent20: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter20 overflows. type(): | - if (NUM_HPM_COUNTERS > 17) { + if (HPM_COUNTER_EN[20]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 17) { + if (HPM_COUNTER_EN[20]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent20: location: 62 description: When set, mhpmcounter20 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 17) { + if (HPM_COUNTER_EN[20]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 17) { + if (HPM_COUNTER_EN[20]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent20: location: 61 description: When set, mhpmcounter20 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[20] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[20] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent20: location: 60 description: When set, mhpmcounter20 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[20] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[20] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent20: location: 59 description: When set, mhpmcounter20 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[20]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[20] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent20: location: 58 description: When set, mhpmcounter20 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[20] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 17) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[20]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent20: location: 57-0 description: Event selector for performance counter `mhpmcounter20`. type(): | - if (NUM_HPM_COUNTERS > 17) { + if (HPM_COUNTER_EN[20]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 17) { + if (HPM_COUNTER_EN[20]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent21.yaml b/arch/csr/Zihpm/mhpmevent21.yaml index f9438e831..eb541bf4d 100644 --- a/arch/csr/Zihpm/mhpmevent21.yaml +++ b/arch/csr/Zihpm/mhpmevent21.yaml @@ -29,13 +29,13 @@ mhpmevent21: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter21 overflows. type(): | - if (NUM_HPM_COUNTERS > 18) { + if (HPM_COUNTER_EN[21]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 18) { + if (HPM_COUNTER_EN[21]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent21: location: 62 description: When set, mhpmcounter21 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 18) { + if (HPM_COUNTER_EN[21]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 18) { + if (HPM_COUNTER_EN[21]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent21: location: 61 description: When set, mhpmcounter21 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[21] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[21] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent21: location: 60 description: When set, mhpmcounter21 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[21] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[21] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent21: location: 59 description: When set, mhpmcounter21 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[21]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[21] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent21: location: 58 description: When set, mhpmcounter21 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[21] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 18) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[21]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent21: location: 57-0 description: Event selector for performance counter `mhpmcounter21`. type(): | - if (NUM_HPM_COUNTERS > 18) { + if (HPM_COUNTER_EN[21]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 18) { + if (HPM_COUNTER_EN[21]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent22.yaml b/arch/csr/Zihpm/mhpmevent22.yaml index 7a3542f99..0f9db52cc 100644 --- a/arch/csr/Zihpm/mhpmevent22.yaml +++ b/arch/csr/Zihpm/mhpmevent22.yaml @@ -29,13 +29,13 @@ mhpmevent22: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter22 overflows. type(): | - if (NUM_HPM_COUNTERS > 19) { + if (HPM_COUNTER_EN[22]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 19) { + if (HPM_COUNTER_EN[22]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent22: location: 62 description: When set, mhpmcounter22 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 19) { + if (HPM_COUNTER_EN[22]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 19) { + if (HPM_COUNTER_EN[22]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent22: location: 61 description: When set, mhpmcounter22 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[22] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[22] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent22: location: 60 description: When set, mhpmcounter22 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[22] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[22] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent22: location: 59 description: When set, mhpmcounter22 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[22]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[22] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent22: location: 58 description: When set, mhpmcounter22 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[22] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 19) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[22]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent22: location: 57-0 description: Event selector for performance counter `mhpmcounter22`. type(): | - if (NUM_HPM_COUNTERS > 19) { + if (HPM_COUNTER_EN[22]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 19) { + if (HPM_COUNTER_EN[22]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent23.yaml b/arch/csr/Zihpm/mhpmevent23.yaml index 3e64d4361..b99603a7e 100644 --- a/arch/csr/Zihpm/mhpmevent23.yaml +++ b/arch/csr/Zihpm/mhpmevent23.yaml @@ -29,13 +29,13 @@ mhpmevent23: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter23 overflows. type(): | - if (NUM_HPM_COUNTERS > 20) { + if (HPM_COUNTER_EN[23]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 20) { + if (HPM_COUNTER_EN[23]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent23: location: 62 description: When set, mhpmcounter23 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 20) { + if (HPM_COUNTER_EN[23]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 20) { + if (HPM_COUNTER_EN[23]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent23: location: 61 description: When set, mhpmcounter23 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[23] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[23] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent23: location: 60 description: When set, mhpmcounter23 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[23] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[23] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent23: location: 59 description: When set, mhpmcounter23 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[23]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[23] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent23: location: 58 description: When set, mhpmcounter23 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[23] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 20) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[23]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent23: location: 57-0 description: Event selector for performance counter `mhpmcounter23`. type(): | - if (NUM_HPM_COUNTERS > 20) { + if (HPM_COUNTER_EN[23]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 20) { + if (HPM_COUNTER_EN[23]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent24.yaml b/arch/csr/Zihpm/mhpmevent24.yaml index 57a7e7f81..9cec7fbf5 100644 --- a/arch/csr/Zihpm/mhpmevent24.yaml +++ b/arch/csr/Zihpm/mhpmevent24.yaml @@ -29,13 +29,13 @@ mhpmevent24: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter24 overflows. type(): | - if (NUM_HPM_COUNTERS > 21) { + if (HPM_COUNTER_EN[24]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 21) { + if (HPM_COUNTER_EN[24]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent24: location: 62 description: When set, mhpmcounter24 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 21) { + if (HPM_COUNTER_EN[24]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 21) { + if (HPM_COUNTER_EN[24]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent24: location: 61 description: When set, mhpmcounter24 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[24] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[24] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent24: location: 60 description: When set, mhpmcounter24 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[24] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[24] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent24: location: 59 description: When set, mhpmcounter24 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[24]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[24] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent24: location: 58 description: When set, mhpmcounter24 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[24] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 21) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[24]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent24: location: 57-0 description: Event selector for performance counter `mhpmcounter24`. type(): | - if (NUM_HPM_COUNTERS > 21) { + if (HPM_COUNTER_EN[24]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 21) { + if (HPM_COUNTER_EN[24]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent25.yaml b/arch/csr/Zihpm/mhpmevent25.yaml index d4c5b7965..e3d51ef24 100644 --- a/arch/csr/Zihpm/mhpmevent25.yaml +++ b/arch/csr/Zihpm/mhpmevent25.yaml @@ -29,13 +29,13 @@ mhpmevent25: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter25 overflows. type(): | - if (NUM_HPM_COUNTERS > 22) { + if (HPM_COUNTER_EN[25]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 22) { + if (HPM_COUNTER_EN[25]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent25: location: 62 description: When set, mhpmcounter25 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 22) { + if (HPM_COUNTER_EN[25]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 22) { + if (HPM_COUNTER_EN[25]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent25: location: 61 description: When set, mhpmcounter25 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[25] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[25] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent25: location: 60 description: When set, mhpmcounter25 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[25] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[25] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent25: location: 59 description: When set, mhpmcounter25 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[25]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[25] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent25: location: 58 description: When set, mhpmcounter25 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[25] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 22) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[25]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent25: location: 57-0 description: Event selector for performance counter `mhpmcounter25`. type(): | - if (NUM_HPM_COUNTERS > 22) { + if (HPM_COUNTER_EN[25]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 22) { + if (HPM_COUNTER_EN[25]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent26.yaml b/arch/csr/Zihpm/mhpmevent26.yaml index 14bb82886..91e5694cd 100644 --- a/arch/csr/Zihpm/mhpmevent26.yaml +++ b/arch/csr/Zihpm/mhpmevent26.yaml @@ -29,13 +29,13 @@ mhpmevent26: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter26 overflows. type(): | - if (NUM_HPM_COUNTERS > 23) { + if (HPM_COUNTER_EN[26]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 23) { + if (HPM_COUNTER_EN[26]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent26: location: 62 description: When set, mhpmcounter26 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 23) { + if (HPM_COUNTER_EN[26]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 23) { + if (HPM_COUNTER_EN[26]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent26: location: 61 description: When set, mhpmcounter26 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[26] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[26] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent26: location: 60 description: When set, mhpmcounter26 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[26] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[26] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent26: location: 59 description: When set, mhpmcounter26 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[26]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[26] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent26: location: 58 description: When set, mhpmcounter26 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[26] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 23) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[26]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent26: location: 57-0 description: Event selector for performance counter `mhpmcounter26`. type(): | - if (NUM_HPM_COUNTERS > 23) { + if (HPM_COUNTER_EN[26]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 23) { + if (HPM_COUNTER_EN[26]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent27.yaml b/arch/csr/Zihpm/mhpmevent27.yaml index d4c75f946..2efa2aa15 100644 --- a/arch/csr/Zihpm/mhpmevent27.yaml +++ b/arch/csr/Zihpm/mhpmevent27.yaml @@ -29,13 +29,13 @@ mhpmevent27: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter27 overflows. type(): | - if (NUM_HPM_COUNTERS > 24) { + if (HPM_COUNTER_EN[27]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 24) { + if (HPM_COUNTER_EN[27]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent27: location: 62 description: When set, mhpmcounter27 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 24) { + if (HPM_COUNTER_EN[27]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 24) { + if (HPM_COUNTER_EN[27]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent27: location: 61 description: When set, mhpmcounter27 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[27] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[27] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent27: location: 60 description: When set, mhpmcounter27 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[27] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[27] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent27: location: 59 description: When set, mhpmcounter27 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[27]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[27] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent27: location: 58 description: When set, mhpmcounter27 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[27] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 24) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[27]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent27: location: 57-0 description: Event selector for performance counter `mhpmcounter27`. type(): | - if (NUM_HPM_COUNTERS > 24) { + if (HPM_COUNTER_EN[27]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 24) { + if (HPM_COUNTER_EN[27]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent28.yaml b/arch/csr/Zihpm/mhpmevent28.yaml index ed87acc75..598830d3f 100644 --- a/arch/csr/Zihpm/mhpmevent28.yaml +++ b/arch/csr/Zihpm/mhpmevent28.yaml @@ -29,13 +29,13 @@ mhpmevent28: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter28 overflows. type(): | - if (NUM_HPM_COUNTERS > 25) { + if (HPM_COUNTER_EN[28]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 25) { + if (HPM_COUNTER_EN[28]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent28: location: 62 description: When set, mhpmcounter28 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 25) { + if (HPM_COUNTER_EN[28]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 25) { + if (HPM_COUNTER_EN[28]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent28: location: 61 description: When set, mhpmcounter28 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[28] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[28] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent28: location: 60 description: When set, mhpmcounter28 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[28] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[28] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent28: location: 59 description: When set, mhpmcounter28 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[28]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[28] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent28: location: 58 description: When set, mhpmcounter28 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[28] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 25) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[28]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent28: location: 57-0 description: Event selector for performance counter `mhpmcounter28`. type(): | - if (NUM_HPM_COUNTERS > 25) { + if (HPM_COUNTER_EN[28]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 25) { + if (HPM_COUNTER_EN[28]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent29.yaml b/arch/csr/Zihpm/mhpmevent29.yaml index 2f7403ea6..dc4f13f7a 100644 --- a/arch/csr/Zihpm/mhpmevent29.yaml +++ b/arch/csr/Zihpm/mhpmevent29.yaml @@ -29,13 +29,13 @@ mhpmevent29: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter29 overflows. type(): | - if (NUM_HPM_COUNTERS > 26) { + if (HPM_COUNTER_EN[29]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 26) { + if (HPM_COUNTER_EN[29]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent29: location: 62 description: When set, mhpmcounter29 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 26) { + if (HPM_COUNTER_EN[29]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 26) { + if (HPM_COUNTER_EN[29]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent29: location: 61 description: When set, mhpmcounter29 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[29] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[29] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent29: location: 60 description: When set, mhpmcounter29 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[29] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[29] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent29: location: 59 description: When set, mhpmcounter29 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[29]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[29] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent29: location: 58 description: When set, mhpmcounter29 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[29] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 26) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[29]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent29: location: 57-0 description: Event selector for performance counter `mhpmcounter29`. type(): | - if (NUM_HPM_COUNTERS > 26) { + if (HPM_COUNTER_EN[29]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 26) { + if (HPM_COUNTER_EN[29]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent3.yaml b/arch/csr/Zihpm/mhpmevent3.yaml index d9cf28353..5845c4d66 100644 --- a/arch/csr/Zihpm/mhpmevent3.yaml +++ b/arch/csr/Zihpm/mhpmevent3.yaml @@ -29,13 +29,13 @@ mhpmevent3: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter3 overflows. type(): | - if (NUM_HPM_COUNTERS > 0) { + if (HPM_COUNTER_EN[3]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 0) { + if (HPM_COUNTER_EN[3]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent3: location: 62 description: When set, mhpmcounter3 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 0) { + if (HPM_COUNTER_EN[3]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 0) { + if (HPM_COUNTER_EN[3]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent3: location: 61 description: When set, mhpmcounter3 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[3] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[3] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent3: location: 60 description: When set, mhpmcounter3 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[3] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[3] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent3: location: 59 description: When set, mhpmcounter3 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[3]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[3] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent3: location: 58 description: When set, mhpmcounter3 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[3] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 0) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[3]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent3: location: 57-0 description: Event selector for performance counter `mhpmcounter3`. type(): | - if (NUM_HPM_COUNTERS > 0) { + if (HPM_COUNTER_EN[3]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 0) { + if (HPM_COUNTER_EN[3]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent30.yaml b/arch/csr/Zihpm/mhpmevent30.yaml index c19c9ec53..ee4825762 100644 --- a/arch/csr/Zihpm/mhpmevent30.yaml +++ b/arch/csr/Zihpm/mhpmevent30.yaml @@ -29,13 +29,13 @@ mhpmevent30: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter30 overflows. type(): | - if (NUM_HPM_COUNTERS > 27) { + if (HPM_COUNTER_EN[30]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 27) { + if (HPM_COUNTER_EN[30]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent30: location: 62 description: When set, mhpmcounter30 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 27) { + if (HPM_COUNTER_EN[30]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 27) { + if (HPM_COUNTER_EN[30]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent30: location: 61 description: When set, mhpmcounter30 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[30] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[30] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent30: location: 60 description: When set, mhpmcounter30 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[30] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[30] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent30: location: 59 description: When set, mhpmcounter30 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[30]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[30] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent30: location: 58 description: When set, mhpmcounter30 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[30] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 27) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[30]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent30: location: 57-0 description: Event selector for performance counter `mhpmcounter30`. type(): | - if (NUM_HPM_COUNTERS > 27) { + if (HPM_COUNTER_EN[30]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 27) { + if (HPM_COUNTER_EN[30]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent31.yaml b/arch/csr/Zihpm/mhpmevent31.yaml index 06f0471cd..cc70a44e1 100644 --- a/arch/csr/Zihpm/mhpmevent31.yaml +++ b/arch/csr/Zihpm/mhpmevent31.yaml @@ -29,13 +29,13 @@ mhpmevent31: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter31 overflows. type(): | - if (NUM_HPM_COUNTERS > 28) { + if (HPM_COUNTER_EN[31]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 28) { + if (HPM_COUNTER_EN[31]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent31: location: 62 description: When set, mhpmcounter31 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 28) { + if (HPM_COUNTER_EN[31]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 28) { + if (HPM_COUNTER_EN[31]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent31: location: 61 description: When set, mhpmcounter31 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[31] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[31] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent31: location: 60 description: When set, mhpmcounter31 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[31] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[31] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent31: location: 59 description: When set, mhpmcounter31 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[31]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[31] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent31: location: 58 description: When set, mhpmcounter31 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[31] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 28) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[31]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent31: location: 57-0 description: Event selector for performance counter `mhpmcounter31`. type(): | - if (NUM_HPM_COUNTERS > 28) { + if (HPM_COUNTER_EN[31]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 28) { + if (HPM_COUNTER_EN[31]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent4.yaml b/arch/csr/Zihpm/mhpmevent4.yaml index e8ab47b4f..c73bbe523 100644 --- a/arch/csr/Zihpm/mhpmevent4.yaml +++ b/arch/csr/Zihpm/mhpmevent4.yaml @@ -29,13 +29,13 @@ mhpmevent4: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter4 overflows. type(): | - if (NUM_HPM_COUNTERS > 1) { + if (HPM_COUNTER_EN[4]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 1) { + if (HPM_COUNTER_EN[4]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent4: location: 62 description: When set, mhpmcounter4 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 1) { + if (HPM_COUNTER_EN[4]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 1) { + if (HPM_COUNTER_EN[4]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent4: location: 61 description: When set, mhpmcounter4 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[4] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[4] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent4: location: 60 description: When set, mhpmcounter4 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[4] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[4] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent4: location: 59 description: When set, mhpmcounter4 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[4]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[4] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent4: location: 58 description: When set, mhpmcounter4 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[4] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 1) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[4]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent4: location: 57-0 description: Event selector for performance counter `mhpmcounter4`. type(): | - if (NUM_HPM_COUNTERS > 1) { + if (HPM_COUNTER_EN[4]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 1) { + if (HPM_COUNTER_EN[4]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent5.yaml b/arch/csr/Zihpm/mhpmevent5.yaml index 02a2c8876..4cbb559ef 100644 --- a/arch/csr/Zihpm/mhpmevent5.yaml +++ b/arch/csr/Zihpm/mhpmevent5.yaml @@ -29,13 +29,13 @@ mhpmevent5: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter5 overflows. type(): | - if (NUM_HPM_COUNTERS > 2) { + if (HPM_COUNTER_EN[5]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 2) { + if (HPM_COUNTER_EN[5]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent5: location: 62 description: When set, mhpmcounter5 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 2) { + if (HPM_COUNTER_EN[5]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 2) { + if (HPM_COUNTER_EN[5]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent5: location: 61 description: When set, mhpmcounter5 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[5] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[5] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent5: location: 60 description: When set, mhpmcounter5 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[5] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[5] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent5: location: 59 description: When set, mhpmcounter5 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[5]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[5] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent5: location: 58 description: When set, mhpmcounter5 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[5] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 2) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[5]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent5: location: 57-0 description: Event selector for performance counter `mhpmcounter5`. type(): | - if (NUM_HPM_COUNTERS > 2) { + if (HPM_COUNTER_EN[5]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 2) { + if (HPM_COUNTER_EN[5]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent6.yaml b/arch/csr/Zihpm/mhpmevent6.yaml index 2832b7a9e..19ff52e3b 100644 --- a/arch/csr/Zihpm/mhpmevent6.yaml +++ b/arch/csr/Zihpm/mhpmevent6.yaml @@ -29,13 +29,13 @@ mhpmevent6: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter6 overflows. type(): | - if (NUM_HPM_COUNTERS > 3) { + if (HPM_COUNTER_EN[6]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 3) { + if (HPM_COUNTER_EN[6]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent6: location: 62 description: When set, mhpmcounter6 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 3) { + if (HPM_COUNTER_EN[6]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 3) { + if (HPM_COUNTER_EN[6]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent6: location: 61 description: When set, mhpmcounter6 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[6] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[6] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent6: location: 60 description: When set, mhpmcounter6 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[6] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[6] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent6: location: 59 description: When set, mhpmcounter6 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[6]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[6] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent6: location: 58 description: When set, mhpmcounter6 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[6] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 3) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[6]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent6: location: 57-0 description: Event selector for performance counter `mhpmcounter6`. type(): | - if (NUM_HPM_COUNTERS > 3) { + if (HPM_COUNTER_EN[6]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 3) { + if (HPM_COUNTER_EN[6]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent7.yaml b/arch/csr/Zihpm/mhpmevent7.yaml index 38b8f36ec..5fdc99825 100644 --- a/arch/csr/Zihpm/mhpmevent7.yaml +++ b/arch/csr/Zihpm/mhpmevent7.yaml @@ -29,13 +29,13 @@ mhpmevent7: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter7 overflows. type(): | - if (NUM_HPM_COUNTERS > 4) { + if (HPM_COUNTER_EN[7]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 4) { + if (HPM_COUNTER_EN[7]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent7: location: 62 description: When set, mhpmcounter7 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 4) { + if (HPM_COUNTER_EN[7]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 4) { + if (HPM_COUNTER_EN[7]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent7: location: 61 description: When set, mhpmcounter7 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[7] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[7] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent7: location: 60 description: When set, mhpmcounter7 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[7] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[7] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent7: location: 59 description: When set, mhpmcounter7 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[7]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[7] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent7: location: 58 description: When set, mhpmcounter7 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[7] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 4) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[7]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent7: location: 57-0 description: Event selector for performance counter `mhpmcounter7`. type(): | - if (NUM_HPM_COUNTERS > 4) { + if (HPM_COUNTER_EN[7]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 4) { + if (HPM_COUNTER_EN[7]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent8.yaml b/arch/csr/Zihpm/mhpmevent8.yaml index 8a6eece30..659dd56aa 100644 --- a/arch/csr/Zihpm/mhpmevent8.yaml +++ b/arch/csr/Zihpm/mhpmevent8.yaml @@ -29,13 +29,13 @@ mhpmevent8: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter8 overflows. type(): | - if (NUM_HPM_COUNTERS > 5) { + if (HPM_COUNTER_EN[8]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 5) { + if (HPM_COUNTER_EN[8]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent8: location: 62 description: When set, mhpmcounter8 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 5) { + if (HPM_COUNTER_EN[8]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 5) { + if (HPM_COUNTER_EN[8]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent8: location: 61 description: When set, mhpmcounter8 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[8] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[8] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent8: location: 60 description: When set, mhpmcounter8 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[8] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[8] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent8: location: 59 description: When set, mhpmcounter8 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[8]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[8] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent8: location: 58 description: When set, mhpmcounter8 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[8] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 5) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[8]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent8: location: 57-0 description: Event selector for performance counter `mhpmcounter8`. type(): | - if (NUM_HPM_COUNTERS > 5) { + if (HPM_COUNTER_EN[8]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 5) { + if (HPM_COUNTER_EN[8]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmevent9.yaml b/arch/csr/Zihpm/mhpmevent9.yaml index 7a3c36849..fc73dbea8 100644 --- a/arch/csr/Zihpm/mhpmevent9.yaml +++ b/arch/csr/Zihpm/mhpmevent9.yaml @@ -29,13 +29,13 @@ mhpmevent9: A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter9 overflows. type(): | - if (NUM_HPM_COUNTERS > 6) { + if (HPM_COUNTER_EN[9]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 6) { + if (HPM_COUNTER_EN[9]) { return UNDEFINED_LEGAL; } else { return 0; @@ -45,13 +45,13 @@ mhpmevent9: location: 62 description: When set, mhpmcounter9 does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > 6) { + if (HPM_COUNTER_EN[9]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 6) { + if (HPM_COUNTER_EN[9]) { return UNDEFINED_LEGAL; } else { return 0; @@ -61,13 +61,13 @@ mhpmevent9: location: 61 description: When set, mhpmcounter9 does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[9] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[9] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -77,13 +77,13 @@ mhpmevent9: location: 60 description: When set, mhpmcounter9 does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[9] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[9] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -93,13 +93,13 @@ mhpmevent9: location: 59 description: When set, mhpmcounter9 does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[9]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[9] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -109,13 +109,13 @@ mhpmevent9: location: 58 description: When set, mhpmcounter9 does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[9] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > 6) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[9]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -125,13 +125,13 @@ mhpmevent9: location: 57-0 description: Event selector for performance counter `mhpmcounter9`. type(): | - if (NUM_HPM_COUNTERS > 6) { + if (HPM_COUNTER_EN[9]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > 6) { + if (HPM_COUNTER_EN[9]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/Zihpm/mhpmeventN.layout b/arch/csr/Zihpm/mhpmeventN.layout index e8e5a6df5..b91651b23 100644 --- a/arch/csr/Zihpm/mhpmeventN.layout +++ b/arch/csr/Zihpm/mhpmeventN.layout @@ -27,13 +27,13 @@ A Local Counter Overflow Interrupt (LCOFI) is generated when OF is clear and mhpmcounter<%= hpm_num %> overflows. type(): | - if (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return CsrFieldType::RWH; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return UNDEFINED_LEGAL; } else { return 0; @@ -43,13 +43,13 @@ location: 62 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in M-mode. type(): | - if (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return UNDEFINED_LEGAL; } else { return 0; @@ -59,13 +59,13 @@ location: 61 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in (H)S-mode. type(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { + if (HPM_COUNTER_EN[<%= hpm_num %>] && implemented?(ExtensionName::S) && (CSR[misa].S == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::S)) { + if (HPM_COUNTER_EN[<%= hpm_num %>] && implemented?(ExtensionName::S)) { return UNDEFINED_LEGAL; } else { return 0; @@ -75,13 +75,13 @@ location: 60 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in U-mode. type(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { + if (HPM_COUNTER_EN[<%= hpm_num %>] && implemented?(ExtensionName::U) && (CSR[misa].U == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::U)) { + if (HPM_COUNTER_EN[<%= hpm_num %>] && implemented?(ExtensionName::U)) { return UNDEFINED_LEGAL; } else { return 0; @@ -91,13 +91,13 @@ location: 59 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in VS-mode. type(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if ((HPM_COUNTER_EN[<%= hpm_num %>]) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::H)) { + if (HPM_COUNTER_EN[<%= hpm_num %>] && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -107,13 +107,13 @@ location: 58 description: When set, mhpmcounter<%= hpm_num %> does not increment while the hart in operating in VU-mode. type(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { + if (HPM_COUNTER_EN[<%= hpm_num %>] && implemented?(ExtensionName::H) && (CSR[misa].H == 1'b1)) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if ((NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) && implemented?(ExtensionName::H)) { + if ((HPM_COUNTER_EN[<%= hpm_num %>]) && implemented?(ExtensionName::H)) { return UNDEFINED_LEGAL; } else { return 0; @@ -123,13 +123,13 @@ location: 57-0 description: Event selector for performance counter `mhpmcounter<%= hpm_num %>`. type(): | - if (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return CsrFieldType::RW; } else { return CsrFieldType::RO; } reset_value(): | - if (NUM_HPM_COUNTERS > <%= hpm_num - 3 %>) { + if (HPM_COUNTER_EN[<%= hpm_num %>]) { return UNDEFINED_LEGAL; } else { return 0; diff --git a/arch/csr/hstatus.yaml b/arch/csr/hstatus.yaml index b8ec96ea6..3edd63c22 100644 --- a/arch/csr/hstatus.yaml +++ b/arch/csr/hstatus.yaml @@ -217,20 +217,20 @@ hstatus: Since the CPU does not support big endian in VS-mode, this is hardwired to 0. <%- elsif VS_MODE_ENDIANESS == 'big' -%> Since the CPU does not support litte endian in VS-mode, this is hardwired to 1. - <%- end -%><%# VS_MODE_ENDIANESS == 'flex' -%> + <%- end -%><%# VS_MODE_ENDIANESS == 'dynamic' -%> type(): | - if (VS_MODE_ENDIANESS < 2) { - # mode is fixed as either little or big endian - return CsrFieldType::RO; - } else { + if (VS_MODE_ENDIANESS == "dynamic") { # mode is mutable return CsrFieldType::RW; + } else { + # mode is fixed as either little or big endian + return CsrFieldType::RO; } reset_value(): | - if (VS_MODE_ENDIANESS == 0) { + if (VS_MODE_ENDIANESS == "little") { # little endian return 0; - } else if (VS_MODE_ENDIANESS == 1) { + } else if (VS_MODE_ENDIANESS == "big") { # big endian return 1; } else { diff --git a/arch/csr/mcause.yaml b/arch/csr/mcause.yaml index eb34c6f52..942974902 100644 --- a/arch/csr/mcause.yaml +++ b/arch/csr/mcause.yaml @@ -29,18 +29,14 @@ mcause: sw_write(csr_value): | # the write only holds if the INT/CODE combination is valid if (csr_value.INT == 1) { - <%- interrupt_codes.each do |num, name| -%> - if (csr_value.CODE == <%= num %>) { + if (valid_interrupt_code?(csr_value.CODE)) { return 1; } - <%- end -%> return ILLEGAL_WLRL; } else { - <%- exception_codes.each do |num, name| -%> - if (csr_value.CODE == <%= num %>) { - return 0; + if (valid_exception_code?(csr_value.CODE)) { + return 1; } - <%- end -%> return ILLEGAL_WLRL; } CODE: @@ -76,17 +72,13 @@ mcause: sw_write(csr_value): | # the write only holds if the INT/CODE combination is valid if (csr_value.INT == 1) { - <%- interrupt_codes.each do |num, name| -%> - if (csr_value.CODE == <%= num %>) { - return <%= num %>; + if (valid_interrupt_code?(csr_value.CODE)) { + return csr_value.CODE; } - <%- end -%> return ILLEGAL_WLRL; } else { - <%- exception_codes.each do |num, name| -%> - if (csr_value.CODE == <%= num %>) { - return <%= num %>; + if (valid_exception_code?(csr_value.CODE)) { + return csr_value.CODE; } - <%- end -%> return ILLEGAL_WLRL; } diff --git a/arch/csr/misa.yaml b/arch/csr/misa.yaml index 9b1a535a1..8d0e7a38f 100644 --- a/arch/csr/misa.yaml +++ b/arch/csr/misa.yaml @@ -22,7 +22,7 @@ misa: Writing 0 to this field will cause all atomic instructions to raise an `IllegalInstruction` exception. <%- end -%> type(): | - return MUTABLE_MISA_A ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::A) && MUTABLE_MISA_A) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::A) ? 1 : 0; B: @@ -34,7 +34,7 @@ misa: Writing 0 to this field will cause all bitmanip instructions to raise an `IllegalInstruction` exception. <%- end -%> type(): | - return MUTABLE_MISA_B ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::B) && MUTABLE_MISA_B) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::B) ? 1 : 0; C: @@ -47,7 +47,7 @@ misa: Additionally, IALIGN becomes 32. <%- end -%> type(): | - return MUTABLE_MISA_C ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::C) && MUTABLE_MISA_C) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::C) ? 1 : 0; D: @@ -61,7 +61,7 @@ misa: Additionally, the upper 32-bits of the f registers will read as zero. <%- end -%> type(): | - return MUTABLE_MISA_D ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::D) && MUTABLE_MISA_D) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::D) ? 1 : 0; F: @@ -75,7 +75,7 @@ misa: Writing 0 to this field with `misa.D` set will result in UNDEFINED behavior. <%- end -%> type(): | - return MUTABLE_MISA_F ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::F) && MUTABLE_MISA_F) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::F) ? 1 : 0; sw_write(csr_value): | @@ -92,7 +92,10 @@ misa: description: | Indicates support for all of the following extensions: `I`, `A`, `M`, `F`, 'D'. type(): | - if (MUTABLE_MISA_A || MUTABLE_MISA_M || MUTABLE_MISA_F || MUTABLE_MISA_D) { + if ((implemented?(ExtensionName::A) && MUTABLE_MISA_A) || + (implemented?(ExtensionName::M) && MUTABLE_MISA_M) || + (implemented?(ExtensionName::F) && MUTABLE_MISA_F) || + (implemented?(ExtensionName::D) && MUTABLE_MISA_D)) { return CsrFieldType::ROH; } else { return CsrFieldType::RO; @@ -112,7 +115,7 @@ misa: Writing 0 to this field will cause all attempts to enter VS- or VU- mode, execute a hypervisor instruction, or access a hypervisor CSR to raise an `IllegalInstruction` fault. <%- end -%> type(): | - return MUTABLE_MISA_H ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::H) && MUTABLE_MISA_H) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::H) ? 1 : 0; I: @@ -130,7 +133,7 @@ misa: Writing 0 to this field will cause all attempts to execute an integer multiply or divide instruction to raise an `IllegalInstruction` exception. <%- end -%> type(): | - return MUTABLE_MISA_M ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::M) && MUTABLE_MISA_M) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::M) ? 1 : 0; S: @@ -138,7 +141,7 @@ misa: description: | Indicates support for the `S` (supervisor mode) extension. type(): | - return MUTABLE_MISA_S ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::S) && MUTABLE_MISA_S) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::S) ? 1 : 0; U: @@ -146,7 +149,7 @@ misa: description: | Indicates support for the `U` (user mode) extension. type(): | - return MUTABLE_MISA_U ? CsrFieldType::RW : CsrFieldType::RO; + return (implemented?(ExtensionName::U) && MUTABLE_MISA_U) ? CsrFieldType::RW : CsrFieldType::RO; reset_value(): | return implemented?(ExtensionName::U) ? 1 : 0; V: diff --git a/arch/csr/mstatus.yaml b/arch/csr/mstatus.yaml index d7b7e1617..c79799b67 100644 --- a/arch/csr/mstatus.yaml +++ b/arch/csr/mstatus.yaml @@ -57,18 +57,18 @@ mstatus: Controls the endianness of data M-mode (0 = little, 1 = big). Instructions are always little endian, regardless of the data setting. - <%- if M_MODE_ENDIANESS == 0 -%> + <%- if M_MODE_ENDIANESS == "little" -%> Since the CPU does not support big endian, this is hardwired to 0. - <%- elsif M_MODE_ENDIANESS == 1 -%> + <%- elsif M_MODE_ENDIANESS == "bit" -%> Since the CPU does not support litte endian, this is hardwired to 1. - <%- end -%><%# M_MODE_ENDIANESS == 2 -%> + <%- end -%><%# M_MODE_ENDIANESS == "dynamic" -%> type(): | - return (M_MODE_ENDIANESS < 2) ? CsrFieldType::RO : CsrFieldType::RW; + return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; # if endianess is mutable, MBE comes out of reset in little-endian mode reset_value(): | - return (M_MODE_ENDIANESS == 1) ? 1 : 0; + return (M_MODE_ENDIANESS == "big") ? 1 : 0; SBE: location: 36 @@ -80,18 +80,24 @@ mstatus: Controls the endianness of S-mode (0 = little, 1 = big). Instructions are always little endian, regardless of the data setting. - <%- if S_MODE_ENDIANESS == 0 -%> + <%- if S_MODE_ENDIANESS == "little" -%> Since the CPU does not support big endian, this is hardwired to 0. - <%- elsif S_MODE_ENDIANESS == 1 -%> + <%- elsif S_MODE_ENDIANESS == "big" -%> Since the CPU does not support litte endian, this is hardwired to 1. - <%- end -%><%# S_MODE_ENDIANESS == 2 -%> + <%- end -%><%# S_MODE_ENDIANESS == "dynamic" -%> type(): | - return (S_MODE_ENDIANESS < 2) ? CsrFieldType::RO : CsrFieldType::RW; + return (S_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; # if endianess is mutable, MBE comes out of reset in little-endian mode reset_value(): | - return (S_MODE_ENDIANESS == 1) ? 1 : 0; + if (S_MODE_ENDIANESS == "little") { + return 0; + } else if (S_MODE_ENDIANESS == "big") { + return 1; + } else { + return UNDEFINED_LEGAL; + } SXL: location: 35-34 base: 64 @@ -435,18 +441,23 @@ mstatus: Controls the endianness of U-mode (0 = little, 1 = big). Instructions are always little endian, regardless of the data setting. - <%- if U_MODE_ENDIANESS == 0 -%> + <%- if U_MODE_ENDIANESS == "little" -%> Since the CPU does not support big endian in U-mode, this is hardwired to 0. - <%- elsif U_MODE_ENDIANESS == 1 -%> + <%- elsif U_MODE_ENDIANESS == "big" -%> Since the CPU does not support litte endian in U-mode, this is hardwired to 1. - <%- end -%><%# U_MODE_ENDIANESS == 2 -%> + <%- end -%><%# U_MODE_ENDIANESS == "dynamic" -%> type(): | - return (U_MODE_ENDIANESS == 3264) ? CsrFieldType::RW : CsrFieldType::RO; + return (U_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; - # if UXL is dynamic, then reset value is undefined reset_value(): | - return (U_MODE_ENDIANESS == 2) ? UNDEFINED_LEGAL : 0; + if (U_MODE_ENDIANESS == "little") { + return 0; + } else if (U_MODE_ENDIANESS == "big") { + return 1; + } else { + return UNDEFINED_LEGAL; + } SPIE: location: 5 diff --git a/arch/csr/mstatush.yaml b/arch/csr/mstatush.yaml index d9f10b5b8..7f1527978 100644 --- a/arch/csr/mstatush.yaml +++ b/arch/csr/mstatush.yaml @@ -33,32 +33,22 @@ mstatush: MBE: location: 5 description: | - *M-mode Big Endian* - - Controls the endianness of data M-mode (0 = little, 1 = big). - Instructions are always little endian, regardless of the data setting. - - <%- if M_MODE_ENDIANESS == 0 -%> - Since the CPU does not support big endian, this is hardwired to 0. - <%- elsif M_MODE_ENDIANESS == 1 -%> - Since the CPU does not support litte endian, this is hardwired to 1. - <%- end -%><%# M_MODE_ENDIANESS == 2 -%> - type(): 'return (M_MODE_ENDIANESS == 2) ? CsrFieldType::RW : CsrFieldType::RO;' - reset_value(): 'return (M_MODE_ENDIANESS == 1) ? 1 : 0;' - + see `mstatus.MBE` + type(): 'return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' + reset_value(): 'return (M_MODE_ENDIANESS == "big") ? 1 : 0;' + alias: mstatus.MBE SBE: location: 4 definedBy: S description: | - *S-mode Big Endian* - - Controls the endianness of S-mode (0 = little, 1 = big). - Instructions are always little endian, regardless of the data setting. + see `mstatus.SBE` + type(): 'return (S_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO;' + reset_value(): | + if (S_MODE_ENDIANESS == "little") { + return 0; + } else if (S_MODE_ENDIANESS == "big") { + return 1; + } else { + return UNDEFINED_LEGAL; + } - <%- if S_MODE_ENDIANESS == 0 -%> - Since the CPU does not support big endian, this is hardwired to 0. - <%- elsif S_MODE_ENDIANESS == 1 -%> - Since the CPU does not support litte endian, this is hardwired to 1. - <%- end -%><%# S_MODE_ENDIANESS == 2 -%> - type(): 'return (S_MODE_ENDIANESS == 2) ? CsrFieldType::RW : CsrFieldType::RO;' - reset_value(): 'return (S_MODE_ENDIANESS == 1) ? 1 : UNDEFINED_LEGAL;' diff --git a/arch/csr/scause.yaml b/arch/csr/scause.yaml index 0b5dfcce8..50c405490 100644 --- a/arch/csr/scause.yaml +++ b/arch/csr/scause.yaml @@ -29,18 +29,14 @@ scause: # the write only holds if the INT/CODE combination is valid # otherwise, the old value is retained if (csr_value.INT == 1) { - <%- interrupt_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { + if (valid_interrupt_code?(csr_value.CODE)) { return 1; } - <%- end -%> return ILLEGAL_WLRL; } else { - <%- exception_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { - return 0; + if (valid_exception_code?(csr_value.CODE)) { + return 1; } - <%- end -%> return ILLEGAL_WLRL; } reset_value: UNDEFINED_LEGAL @@ -77,18 +73,14 @@ scause: # the write only holds if the INT/CODE combination is valid # otherwise, the old value is retained if (csr_value.INT == 1) { - <%- interrupt_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { - return <%= num %>; + if (valid_interrupt_code?(csr_value.CODE)) { + return csr_value.CODE; } - <%- end -%> return ILLEGAL_WLRL; } else { - <%- exception_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { - return <%= num %>; + if (valid_exception_code?(csr_value.CODE)) { + return csr_value.CODE; } - <%- end -%> return ILLEGAL_WLRL; } reset_value: UNDEFINED_LEGAL diff --git a/arch/csr/vscause.yaml b/arch/csr/vscause.yaml index 5142b3daa..d0193b878 100644 --- a/arch/csr/vscause.yaml +++ b/arch/csr/vscause.yaml @@ -29,18 +29,14 @@ vscause: # the write only holds if the INT/CODE combination is valid # otherwise, the old value is retained if (csr_value.INT == 1) { - <%- interrupt_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { + if (valid_interrupt_code?(csr_value.CODE)) { return 1; } - <%- end -%> return ILLEGAL_WLRL; } else { - <%- exception_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { - return 0; + if (valid_exception_code?(csr_value.CODE)) { + return 1; } - <%- end -%> return ILLEGAL_WLRL; } reset_value: UNDEFINED_LEGAL @@ -77,18 +73,14 @@ vscause: # the write only holds if the INT/CODE combination is valid # otherwise, the old value is retained if (csr_value.INT == 1) { - <%- interrupt_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { - return <%= num %>; + if (valid_interrupt_code?(csr_value.CODE)) { + return csr_value.CODE; } - <%- end -%> return ILLEGAL_WLRL; } else { - <%- exception_codes.each do |num, _name| -%> - if (csr_value.CODE == <%= num %>) { - return <%= num %>; + if (valid_exception_code?(csr_value.CODE)) { + return csr_value.CODE; } - <%- end -%> return ILLEGAL_WLRL; } reset_value: UNDEFINED_LEGAL diff --git a/arch/csr/vsstatus.yaml b/arch/csr/vsstatus.yaml index 8bf37f4d3..d982caa87 100644 --- a/arch/csr/vsstatus.yaml +++ b/arch/csr/vsstatus.yaml @@ -14,7 +14,7 @@ vsstatus: Unlike the relationship between `sstatus` and `mstatus`, none of the bits in `vsstatus` are aliases of another field. - definedBy: I + definedBy: H fields: SD: location: 63 @@ -154,16 +154,25 @@ vsstatus: *VU-mode Big Endian* Controls the endianness of VU-mode (0 = little, 1 = big). - <%- if VU_MODE_ENDIANESS == 0 -%> + <%- if VU_MODE_ENDIANESS == "little" -%> Since the CPU does not support big endian, this is hardwired to 0. - <%- elsif VU_MODE_ENDIANESS == 1 -%> + <%- elsif VU_MODE_ENDIANESS == "big" -%> Since the CPU does not support big endian, this is hardwired to 1. - <%- end -%><%# VU_MODE_ENDIANESS == 2 -%> + <%- end -%><%# VU_MODE_ENDIANESS == "dynamic" -%> type(): | - return (VU_MODE_ENDIANESS == 2) ? CsrFieldType::RW : CsrFieldType::RO; + return (VU_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; definedBy: S reset_value(): | - return (VU_MODE_ENDIANESS == 2) ? UNDEFINED_LEGAL : VU_MODE_ENDIANESS; + if (VU_MODE_ENDIANESS == "little") { + # little endian + return 0; + } else if (VU_MODE_ENDIANESS == "big") { + # big endian + return 1; + } else { + # mutable + return UNDEFINED_LEGAL; + } SPIE: location: 5 description: | diff --git a/arch/ext/A.yaml b/arch/ext/A.yaml index a398f119b..986679c1d 100644 --- a/arch/ext/A.yaml +++ b/arch/ext/A.yaml @@ -74,4 +74,56 @@ A: and cannot be observed to happen before any earlier memory operations or after any later memory operations in the same RISC-V hart and to the same address domain. + params: + MISALIGNED_AMO: + description: | + whether or not the implementation supports misaligned atomics in main memory + schema: + type: boolean + LRSC_RESERVATION_STRATEGY: + description: | + Strategy used to handle reservation sets. + * "reserve naturally-aligned 64-byte region": Always reserve the 64-byte block containing the LR/SC address + * "reserve naturally-aligned 128-byte region": Always reserve the 128-byte block containing the LR/SC address + * "reserve exactly enough to cover the access": Always reserve exactly the LR/SC access, and no more + * "custom": Custom behavior, leading to an 'unpredictable' call on any LR/SC + schema: + type: string + enum: + - reserve naturally-aligned 64-byte region + - reserve naturally-aligned 128-byte region + - reserve exactly enough to cover the access + - custom + LRSC_FAIL_ON_VA_SYNONYM: + description: | + Whether or not an `sc.l`/`sc.d` will fail if its VA does not match the VA of the prior + `lr.l`/`lr.d`, even if the physical address of the SC and LR are the same + schema: + type: boolean + LRSC_MISALIGNED_BEHAVIOR: + description: | + What to do when an LR/SC address is misaligned and MISALIGNED_AMO == false. + + * 'always raise misaligned exception': self-explainitory + * 'always raise access fault': self-explainitory + * 'custom': Custom behavior; misaligned LR/SC may sometimes raise a misaligned exception and sometimes raise a access fault. Will lead to an 'unpredictable' call on any misaligned LR/SC access + schema: + type: string + enum: + - always raise misaligned exception + - always raise access fault + - custom + LRSC_FAIL_ON_NON_EXACT_LRSC: + description: | + Whether or not a Store Conditional fails if its physical address and size do not + exactly match the physical address and size of the last Load Reserved in program order + (independent of whether or not the SC is in the current reservation set) + schema: + type: boolean + MUTABLE_MISA_A: + description: | + When the `A` extensions is supported, indicates whether or not + the extension can be disabled in the `misa.A` bit. + schema: + type: boolean diff --git a/arch/ext/B.yaml b/arch/ext/B.yaml index 799052c57..cfa39eefe 100644 --- a/arch/ext/B.yaml +++ b/arch/ext/B.yaml @@ -29,4 +29,9 @@ B: the implementation supports the instructions provided by the `Zba`, `Zbb`, and `Zbs` extensions. When `misa.B` is 0, it indicates that the implementation may not support one or more of the `Zba`, `Zbb`, or `Zbs` extensions. - + params: + MUTABLE_MISA_B: + description: | + Indicates whether or not the `B` extension can be disabled with the `misa.B` bit. + schema: + type: boolean diff --git a/arch/ext/C.yaml b/arch/ext/C.yaml index 6a119d8f8..bf1b66cf4 100644 --- a/arch/ext/C.yaml +++ b/arch/ext/C.yaml @@ -286,4 +286,10 @@ C: !`f8` !`f9` !`f10` !`f11` !`f12` !`f13`!`f14` !`f15` !`fs0` !`fs1` !`fa0` !`fa1` !`fa2`!`fa3` !`fa4` !`fa5` !=== - |=== \ No newline at end of file + |=== + params: + MUTABLE_MISA_C: + description: | + Indicates whether or not the `C` extension can be disabled with the `misa.C` bit. + schema: + type: boolean \ No newline at end of file diff --git a/arch/ext/D.yaml b/arch/ext/D.yaml index 6ab126ee8..fce59be6e 100644 --- a/arch/ext/D.yaml +++ b/arch/ext/D.yaml @@ -98,3 +98,9 @@ D: normalization except for skipping over leading-1 bits instead of skipping over leading-0 bits, allowing the datapath muxing to be shared. ==== + params: + MUTABLE_MISA_D: + description: | + Indicates whether or not the `D` extension can be disabled with the `misa.D` bit. + schema: + type: boolean \ No newline at end of file diff --git a/arch/ext/F.yaml b/arch/ext/F.yaml index 6cf7f1717..5d64b2ec4 100644 --- a/arch/ext/F.yaml +++ b/arch/ext/F.yaml @@ -231,4 +231,10 @@ F: ==== Detecting tininess after rounding results in fewer spurious underflow signals. - ==== \ No newline at end of file + ==== + params: + MUTABLE_MISA_F: + description: | + Indicates whether or not the `F` extension can be disabled with the `misa.F` bit. + schema: + type: boolean \ No newline at end of file diff --git a/arch/ext/H.yaml b/arch/ext/H.yaml index 61d34c06f..cfd3e2f60 100644 --- a/arch/ext/H.yaml +++ b/arch/ext/H.yaml @@ -11,23 +11,32 @@ H: interrupt_codes: - num: 2 name: Virtual supervisor software interrupt + var: VirtualSupervisorSoftware - num: 6 name: Virtual supervisor timer interrupt + var: VirtualSupervisorTimer - num: 10 name: Virtual supervisor external interrupt + var: VirtualSupervisorExternal - num: 12 name: Supervisor guest external interrupt + var: SupervisorGuestExternal exception_codes: - num: 10 name: Environment call from VS-mode + var: VScall - num: 20 name: Instruction guest page fault + var: InstructionGuestPageFault - num: 21 name: Load guest page fault + var: LoadGuestPageFault - num: 22 name: Virtual instruction + var: VirtualInstruction - num: 23 name: Store/AMO guest page fault + var: StoreAmoGuestPageFault description: | This chapter describes the RISC-V hypervisor extension, which virtualizes the supervisor-level architecture to support the efficient @@ -135,3 +144,166 @@ H: interrupts and will be revised if an extension for user-level interrupts is adopted. ==== + params: + MUTABLE_MISA_H: + description: | + Indicates whether or not the `H` extension can be disabled with the `misa.H` bit. + schema: + type: boolean + extra_validation: | + # If S mode can be disabled, then H mode must also be disabled since you can't + # be in H mode without S mode + assert MUTABLE_MISA_H if MUTABLE_MISA_S + NUM_EXTERNAL_GUEST_INTERRUPTS: + description: | + Number of supported virtualized guest interrupts + + Corresponds to the `GEILEN` parameter in the RVI specs + schema: + type: integer + minimum: 1 + maximum: 63 + VS_MODE_ENDIANESS: + description: | + Endianess of data in VS-mode. Can be one of: + + * little: M-mode data is always little endian + * big: M-mode data is always big endian + * dynamic: M-mode data can be either little or big endian, + depending on the CSR field `hstatus.VSBE` + schema: + type: string + enum: [little, big, dynamic] + VU_MODE_ENDIANESS: + description: | + Endianess of data in VU-mode. Can be one of: + + * little: M-mode data is always little endian + * big: M-mode data is always big endian + * dynamic: M-mode data can be either little or big endian, + depending on the CSR field `vsstatus.UBE` + schema: + type: string + enum: [little, big, dynamic] + VUXLEN: + description: | + Set of XLENs supported in VU-mode. Can be one of: + + * 32: VUXLEN is always 32 + * 64: VUXLEN is always 64 + * 3264: VUXLEN can be changed (via `vsstatus.UXL`) between 32 and 64 + schema: + type: integer + enum: [32, 64, 3264] + extra_validation: | + assert VUXLEN == 32 if XLEN == 32 + assert (SXLEN != 32) if VUXLEN != 32 + assert (VSXLEN != 32) if VUXLEN != 32 + VSXLEN: + description: | + Set of XLENs supported in VS-mode. Can be one of: + + * 32: VSXLEN is always 32 + * 64: VSXLEN is always 64 + * 3264: VSXLEN can be changed (via `hstatus.VSXL`) between 32 and 64 + schema: + type: integer + enum: [32, 64, 3264] + extra_validation: | + assert VSXLEN == 32 if XLEN == 32 + assert (SXLEN != 32) if VSXLEN != 32 + REPORT_VA_IN_VSTVAL_ON_BREAKPOINT: + description: | + When true, `vstval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). + + When false, `vstval` is written with 0 on an EBREAK instruction. + + Regardless, `vstval` is always written with a virtual PC when an external breakpoint is generated + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED: + description: | + When true, `vstval` is written with the virtual address of a load instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `vstval` is written with 0 when a load address is misaligned and + MISALIGNED_LDST is false. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED: + description: | + When true, `vstval` is written with the virtual address of a store instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `vstval` is written with 0 when a store address is misaligned and + MISALIGNED_LDST is false. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED: + description: | + When true, `vstval` is written with the virtual PC when an instruction fetch is misaligned. + + When false, `vstval` is written with 0 when an instruction fetch is misaligned. + + Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), + it is impossible to generate a misaligned fetch, and so this parameter has no effect. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT: + description: | + When true, `vstval` is written with the virtual address of a load when it causes a + `LoadAccessFault`. + + WHen false, `vstval` is written with 0 when a load causes a `LoadAccessFault`. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_ACCESS_FAULT: + description: | + When true, `vstval` is written with the virtual address of a store when it causes a + `StoreAmoAccessFault`. + + WHen false, `vstval` is written with 0 when a store causes a `StoreAmoAccessFault`. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_ACCESS_FAULT: + description: | + When true, `vstval` is written with the virtual PC of an instructino when fetch causes an + `InstructionAccessFault`. + + WHen false, `vstval` is written with 0 when an instruction fetch causes an + `InstructionAccessFault`. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_LOAD_PAGE_FAULT: + description: | + When true, `vstval` is written with the virtual address of a load when it causes a + `LoadPageFault`. + + WHen false, `vstval` is written with 0 when a load causes a `LoadPageFault`. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT: + description: | + When true, `vstval` is written with the virtual address of a store when it causes a + `StoreAmoPageFault`. + + WHen false, `vstval` is written with 0 when a store causes a `StoreAmoPageFault`. + schema: + type: boolean + REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT: + description: | + When true, `vstval` is written with the virtual PC of an instructino when fetch causes an + `InstructionPageFault`. + + WHen false, `vstval` is written with 0 when an instruction fetch causes an + `InstructionPageFault`. + schema: + type: boolean + REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION: + description: | + When true, `vstval` is written with the encoding of an instruction that causes an + `IllegalInstruction` exception. + + When false `vstval` is written with 0 when an `IllegalInstruction` exception occurs. + schema: + type: boolean diff --git a/arch/ext/I.yaml b/arch/ext/I.yaml index f16a71f90..e4441efea 100644 --- a/arch/ext/I.yaml +++ b/arch/ext/I.yaml @@ -13,42 +13,361 @@ I: interrupt_codes: - num: 1 name: Supervisor software interrupt + var: SupervisorSoftware - num: 3 name: Machine software interrupt + var: MachineSoftware - num: 5 name: Supervisor timer interrupt + var: SupervisorTimer - num: 7 name: Machine timer interrupt + var: MachineTimer - num: 9 name: Supervisor external interrupt + var: SupervisorExternal - num: 11 name: Machine external interrupt + var: MachineExternal exception_codes: - num: 0 name: Instruction address misaligned + var: InstructionAddressMisaligned - num: 1 name: Instruction access fault + var: InstructionAccessFault - num: 2 name: Illegal instruction + var: IllegalInstruction - num: 3 name: Breakpoint + var: Breakpoint - num: 4 name: Load address misaligned + var: LoadAddressMisaligned - num: 5 name: Load access fault + var: LoadAccessFault - num: 6 name: Store/AMO address misaligned + var: StoreAmoAddressMisaligned - num: 7 name: Store/AMO access fault + var: StoreAmoAccessFault - num: 8 name: Environment call from <%- if ext?(:H) -%>V<%- end -%>U-mode + var: Ucall - num: 9 name: Environment call from <%- if ext?(:H) -%>H<%- end -%>S-mode + var: Scall - num: 11 name: Environment call from M-mode + var: Mcall - num: 12 name: Instruction page fault + var: InstructionPageFault - num: 13 name: Load page fault + var: LoadPageFault - num: 15 name: Store/AMO page fault + var: StoreAmoPageFault + params: + XLEN: + description: | + XLEN in M-mode (_i.e._, _MXLEN_) + schema: + type: integer + enum: [32, 64] + ARCH_ID: + description: | + Vendor-specific architecture ID in `marchid` + schema: + type: integer + minimum: 0 + maximum: 0xffffffffffffffff + IMP_ID: + description: | + Vendor-specific implementation ID in `mimpid` + schema: + type: integer + minimum: 0 + maximum: 0xffffffffffffffff + VENDOR_ID_BANK: + description: | + JEDEC Vendor ID bank, for `mvendorid` + schema: + type: integer + minimum: 0 + maximum: 33554431 + VENDOR_ID_OFFSET: + description: | + Vendor JEDEC code offset, for `mvendorid` + schema: + type: integer + minimum: 0 + maximum: 127 + MISALIGNED_LDST: + description: | + Whether or not the implementation supports misaligned loads and stores in + main memory (does *not* affect misaligned support to device memory) + schema: + type: boolean + MISALIGNED_SPLIT_STRATEGY: + description: | + when misaligned accesses are supported, this determines the *order* in the implementation appears + to process the load/store, which determines how/which exceptions will be reported + + Options: + * by_byte: The load/store appears to be broken into byte-sized accesses that processed sequentially from smallest address to largest address + * custom: Something else. Will result in a call to unpredictable() in the execution + schema: + type: string + enum: ["by_byte", "custom"] + COUNTINHIBIT_EN: + description: | + Indicates which counters can be disabled from `mcountinhibit` + + An unimplemented counter cannot be specified, i.e., if + HPM_COUNTER_EN[3] is false, it would be illegal to set + COUNTINHIBIT_EN[3] to true. + + COUNTINHIBIT_EN[1] can never be true, since it corresponds to `mcountinhibit.TM`, + which is always read-only-0. + + COUNTINHIBIT_EN[3:31] must all be false if `Zihpm` is not implemented. + schema: + type: array + items: + - type: boolean + - const: false + - type: boolean + additionalItems: + type: boolean + maxItems: 32 + minItems: 32 + COUNTENABLE_EN: + description: | + Indicates which counters can delegated via `mcounteren` + + An unimplemented counter cannot be specified, i.e., if + HPM_COUNTER_EN[3] is false, it would be illegal to set + COUNTENABLE_EN[3] to true. + + COUNTENABLE_EN[1] can never be true, since it corresponds to `mcounteren.TM`, + which is always read-only-0. + + COUNTENABLE_EN[3:31] must all be false if `Zihpm` is not implemented. + schema: + type: array + items: + - type: boolean + - const: false + - type: boolean + additionalItems: + type: boolean + maxItems: 32 + minItems: 32 + TRAP_ON_ILLEGAL_WLRL: + description: | + When true, writing an illegal value to a WLRL CSR field raises an `IllegalInstruction` exception. + + When false, writing an illegal value to a WLRL CSR field is `unpredictable`. + schema: + type: boolean + TRAP_ON_UNIMPLEMENTED_INSTRUCTION: + description: | + When true, fetching an unimplemented instruction will cause an `IllegalInstruction` exception. + + When false, fetching an unimplemented instruction is `unpredictable`. + schema: + type: boolean + TRAP_ON_UNIMPLEMENTED_CSR: + description: | + When true, accessing an unimplemented CSR (via a `Zicsr` instruction) will cause an `IllegalInstruction` exception. + + When false, accessing an unimplemented CSR (via a `Zicsr` instruction) is `unpredictable`. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_BREAKPOINT: + description: | + When true, `mtval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). + + When false, `mtval` is written with 0 on an EBREAK instruction. + + Regardless, `mtval` is always written with a virtual PC when an external breakpoint is generated + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED: + description: | + When true, `mtval` is written with the virtual address of a load instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `mtval` is written with 0 when a load address is misaligned and + MISALIGNED_LDST is false. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED: + description: | + When true, `mtval` is written with the virtual address of a store instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `mtval` is written with 0 when a store address is misaligned and + MISALIGNED_LDST is false. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED: + description: | + When true, `mtval` is written with the virtual PC when an instruction fetch is misaligned. + + When false, `mtval` is written with 0 when an instruction fetch is misaligned. + + Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), + it is impossible to generate a misaligned fetch, and so this parameter has no effect. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT: + description: | + When true, `mtval` is written with the virtual address of a load when it causes a + `LoadAccessFault`. + + WHen false, `mtval` is written with 0 when a load causes a `LoadAccessFault`. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT: + description: | + When true, `mtval` is written with the virtual address of a store when it causes a + `StoreAmoAccessFault`. + + WHen false, `mtval` is written with 0 when a store causes a `StoreAmoAccessFault`. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT: + description: | + When true, `mtval` is written with the virtual PC of an instructino when fetch causes an + `InstructionAccessFault`. + + WHen false, `mtval` is written with 0 when an instruction fetch causes an + `InstructionAccessFault`. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT: + description: | + When true, `mtval` is written with the virtual address of a load when it causes a + `LoadPageFault`. + + WHen false, `mtval` is written with 0 when a load causes a `LoadPageFault`. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT: + description: | + When true, `mtval` is written with the virtual address of a store when it causes a + `StoreAmoPageFault`. + + WHen false, `mtval` is written with 0 when a store causes a `StoreAmoPageFault`. + schema: + type: boolean + REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT: + description: | + When true, `mtval` is written with the virtual PC of an instructino when fetch causes an + `InstructionPageFault`. + + WHen false, `mtval` is written with 0 when an instruction fetch causes an + `InstructionPageFault`. + schema: + type: boolean + REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION: + description: | + When true, `mtval` is written with the encoding of an instruction that causes an + `IllegalInstruction` exception. + + When false `mtval` is written with 0 when an `IllegalInstruction` exception occurs. + schema: + type: boolean + MTVAL_WIDTH: + description: | + The number of implemented bits in `mtval`. + + Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`) + schema: + type: integer + maximum: 0xffffffffffffffff + CONFIG_PTR_ADDRESS: + description: | + Physical address of the unified discovery configuration data structure + this address is reported in the `mconfigptr` CSR + schema: + type: integer + NUM_PMP_ENTRIES: + description: | + Number of implemented PMP entries. Can be any value between 0-64, inclusive. + + The architecture mandates that the number of implemented PMP registers + must appear to be 0, 16, or 64. + + Therefore, pmp registers will behave as follows according to NUN_PMP_ENTRIES: + + !=== + ! NUM_PMP_ENTRIES ! pmpaddr<0-15> / pmpcfg<0-3> ! pmpaddr<16-63> / pmpcfg<4-15> + ! 0 ! N ! N + ! 1-16 ! Y ! N + ! 17-64 ! Y ! Y + !=== + + ** N = Not implemented; access will cause `IllegalInstruction` + if TRAP_ON_UNIMPLEMENTED_CSR is true + ** Y = Implemented; access will not cause an exception (from M-mode), but register + may be read-only-zero if NUM_PMP_ENTRIES is less than the corresponding register + + [NOTE] + `pmpcfgN` for an odd N never exists when XLEN == 64 + + When NUM_PMP_ENTRIES is not exactly 0, 16, or 64, some extant pmp registers, + and associated pmpNcfg, will be read-only zero (but will never cause an exception). + schema: + type: integer + minimum: 0 + maximum: 64 + PMP_GRANULARITY: + description: | + log2 of the smallest supported PMP region. + + Generally, for systems with an MMU, should not be smaller than 12, + as that would preclude caching PMP results in the TLB along with + virtual memory translations + + Note that PMP_GRANULARITY is equal to G+2 (not G) as described in + the privileged architecture. + schema: + type: integer + minimum: 2 + maximum: 66 + PMA_GRANULARITY: + description: | + log2 of the smallest supported PMA region. + + Generally, for systems with an MMU, should not be smaller than 12, + as that would preclude caching PMP results in the TLB along with + virtual memory translations + schema: + type: integer + minimum: 2 + maximum: 66 + PHYS_ADDR_WIDTH: + description: | + Number of bits in the physical address space. + schema: + type: integer + mimimum: 1 + maximum: 64 + M_MODE_ENDIANESS: + description: | + Endianess of data in M-mode. Can be one of: + + * little: M-mode data is always little endian + * big: M-mode data is always big endian + * dynamic: M-mode data can be either little or big endian, + depending on the CSR field `mstatus.MBE` + schema: + type: string + enum: [little, big, dynamic] \ No newline at end of file diff --git a/arch/ext/M.yaml b/arch/ext/M.yaml index 4e7b3a30e..27bc6b496 100644 --- a/arch/ext/M.yaml +++ b/arch/ext/M.yaml @@ -19,3 +19,9 @@ M: divide operations are either infrequent or better handled in attached accelerators. ==== + params: + MUTABLE_MISA_M: + description: | + Indicates whether or not the `M` extension can be disabled with the `misa.M` bit. + schema: + type: boolean \ No newline at end of file diff --git a/arch/ext/S.yaml b/arch/ext/S.yaml index ee03b0816..0e63da4f4 100644 --- a/arch/ext/S.yaml +++ b/arch/ext/S.yaml @@ -24,4 +24,150 @@ S: provides these facilities in a manner specified by a supervisor binary interface (SBI). Other systems supply these facilities directly, through some other implementation-defined mechanism. - ==== \ No newline at end of file + ==== + params: + MUTABLE_MISA_S: + description: | + Indicates whether or not the `S` extension can be disabled with the `misa.S` bit. + schema: + type: boolean + extra_validation: | + # If U mode can be disabled, then S mode must also be disabled since you can't + # be in S mode without U mode + assert MUTABLE_MISA_S if MUTABLE_MISA_U + ASID_WIDTH: + description: | + Number of implemented ASID bits. Maximum is 16 for XLEN==64, and 9 for XLEN==32 + schema: + type: integer + minimum: 0 + maximum: 16 + extra_validation: | + assert ASID_WIDTH <= 9 if XLEN == 32 + S_MODE_ENDIANESS: + description: | + Endianess of data in S-mode. Can be one of: + + * little: M-mode data is always little endian + * big: M-mode data is always big endian + * dynamic: M-mode data can be either little or big endian, + depending on the CSR field `mstatus.SBE` + schema: + type: string + enum: [little, big, dynamic] + SXLEN: + description: | + Set of XLENs supported in S-mode. Can be one of: + + * 32: SXLEN is always 32 + * 64: SXLEN is always 64 + * 3264: SXLEN can be changed (via mstatus.SXL) between 32 and 64 + schema: + type: integer + enum: [32, 64, 3264] + extra_validation: | + assert SXLEN == 32 if XLEN == 32 + assert (SXLEN != 32) if UXLEN != 32 + REPORT_VA_IN_STVAL_ON_BREAKPOINT: + description: | + When true, `stval` is written with the virtual PC of the EBREAK instruction (same information as `mepc`). + + When false, `stval` is written with 0 on an EBREAK instruction. + + Regardless, `stval` is always written with a virtual PC when an external breakpoint is generated + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED: + description: | + When true, `stval` is written with the virtual address of a load instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `stval` is written with 0 when a load address is misaligned and + MISALIGNED_LDST is false. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED: + description: | + When true, `stval` is written with the virtual address of a store instruction when the + address is misaligned and MISALIGNED_LDST is false. + + When false, `stval` is written with 0 when a store address is misaligned and + MISALIGNED_LDST is false. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED: + description: | + When true, `stval` is written with the virtual PC when an instruction fetch is misaligned. + + When false, `stval` is written with 0 when an instruction fetch is misaligned. + + Note that when IALIGN=16 (i.e., when the `C` or one of the `Zc*` extensions are implemented), + it is impossible to generate a misaligned fetch, and so this parameter has no effect. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT: + description: | + When true, `stval` is written with the virtual address of a load when it causes a + `LoadAccessFault`. + + WHen false, `stval` is written with 0 when a load causes a `LoadAccessFault`. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_STORE_AMO_ACCESS_FAULT: + description: | + When true, `stval` is written with the virtual address of a store when it causes a + `StoreAmoAccessFault`. + + WHen false, `stval` is written with 0 when a store causes a `StoreAmoAccessFault`. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_INSTRUCTION_ACCESS_FAULT: + description: | + When true, `stval` is written with the virtual PC of an instructino when fetch causes an + `InstructionAccessFault`. + + WHen false, `stval` is written with 0 when an instruction fetch causes an + `InstructionAccessFault`. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_LOAD_PAGE_FAULT: + description: | + When true, `stval` is written with the virtual address of a load when it causes a + `LoadPageFault`. + + WHen false, `stval` is written with 0 when a load causes a `LoadPageFault`. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT: + description: | + When true, `stval` is written with the virtual address of a store when it causes a + `StoreAmoPageFault`. + + WHen false, `stval` is written with 0 when a store causes a `StoreAmoPageFault`. + schema: + type: boolean + REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT: + description: | + When true, `stval` is written with the virtual PC of an instructino when fetch causes an + `InstructionPageFault`. + + WHen false, `stval` is written with 0 when an instruction fetch causes an + `InstructionPageFault`. + schema: + type: boolean + REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION: + description: | + When true, `stval` is written with the encoding of an instruction that causes an + `IllegalInstruction` exception. + + When false `stval` is written with 0 when an `IllegalInstruction` exception occurs. + schema: + type: boolean + STVAL_WIDTH: + description: | + The number of implemented bits in `stval`. + + Must be greater than or equal to _max_(`PHYS_ADDR_WIDTH`, `VA_SIZE`) + schema: + type: integer + maximum: 0xffffffffffffffff \ No newline at end of file diff --git a/arch/ext/U.yaml b/arch/ext/U.yaml index cacc8752f..1808b6cc8 100644 --- a/arch/ext/U.yaml +++ b/arch/ext/U.yaml @@ -8,3 +8,32 @@ U: - version: 1.12 state: ratified ratification_date: 2019-12 + params: + MUTABLE_MISA_U: + description: | + Indicates whether or not the `U` extension can be disabled with the `misa.U` bit. + schema: + type: boolean + U_MODE_ENDIANESS: + description: | + Endianess of data in U-mode. Can be one of: + + * little: M-mode data is always little endian + * big: M-mode data is always big endian + * dynamic: M-mode data can be either little or big endian, + depending on the CSR field `mstatus.UBE` + schema: + type: string + enum: [little, big, dynamic] + UXLEN: + description: | + Set of XLENs supported in U-mode. Can be one of: + + * 32: SXLEN is always 32 + * 64: SXLEN is always 64 + * 3264: SXLEN can be changed (via mstatus.UXL) between 32 and 64 + schema: + type: integer + enum: [32, 64, 3264] + extra_validation: | + assert UXLEN == 32 if XLEN == 32 diff --git a/arch/ext/Zaamo.yaml b/arch/ext/Zaamo.yaml index c6f432fb1..df996e1ed 100644 --- a/arch/ext/Zaamo.yaml +++ b/arch/ext/Zaamo.yaml @@ -128,4 +128,4 @@ Zaamo: load may impose ordering constraints that are unnecessary for this use case. Specific compilation conventions may require both the _aq_ and _rl_ bits to be set in either or both the LR and AMOSWAP instructions. - ==== \ No newline at end of file + ==== diff --git a/arch/ext/Zicbom.yaml b/arch/ext/Zicbom.yaml index a564b2669..f6b210c98 100644 --- a/arch/ext/Zicbom.yaml +++ b/arch/ext/Zicbom.yaml @@ -8,3 +8,9 @@ Zicbom: - version: 1.0.1-b34ea8a state: ratified ratification_date: 2022-05 + params: + CACHE_BLOCK_SIZE: + description: | + The observable size of a cache block, in bytes + schema: + type: integer \ No newline at end of file diff --git a/arch/ext/Zicboz.yaml b/arch/ext/Zicboz.yaml index 9ffdaa3a1..55ec3b4a8 100644 --- a/arch/ext/Zicboz.yaml +++ b/arch/ext/Zicboz.yaml @@ -8,3 +8,9 @@ Zicboz: - version: 1.0.1-b34ea8a state: ratified ratification_date: 2022-05 + params: + CACHE_BLOCK_SIZE: + description: | + The observable size of a cache block, in bytes + schema: + type: integer \ No newline at end of file diff --git a/arch/ext/Zihpm.yaml b/arch/ext/Zihpm.yaml index ec43d4663..ccc96db32 100644 --- a/arch/ext/Zihpm.yaml +++ b/arch/ext/Zihpm.yaml @@ -8,3 +8,31 @@ Zihpm: - version: 2.0 state: ratified ratification_date: unknown + params: + HPM_COUNTER_EN: + description: | + List of HPM counters that are enabled. + There is one entry for each hpmcounter. + + The first three entries *must* be false (as they correspond to CY, IR, TM in, _e.g._ `mhmpcountinhibit`) + Index 3 in HPM_COUNTER_EN corresponds to hpmcounter3. + Index 31 in HPM_COUNTER_EN corresponds to hpmcounter31. + schema: + type: array + items: + - const: false + - const: false + - const: false + additionalItems: + type: boolean + maxItems: 32 + minItems: 32 + HPM_EVENTS: + description: | + List of defined event numbers that can be written into hpmeventN + schema: + type: array + items: + type: integer + minimum: 0 + maximum: 0x03ffffffffffffff # bits 63-58 are used by `Sscofpmf` \ No newline at end of file diff --git a/arch/isa/globals.isa b/arch/isa/globals.isa index 837a46bc2..65360f7fa 100644 --- a/arch/isa/globals.isa +++ b/arch/isa/globals.isa @@ -66,38 +66,44 @@ enum CsrFieldType { # generated from extension information in arch defintion builtin enum ExtensionName; +# generated from extension information in arch defintion +builtin enum InterruptCode; + +# generated from extension information in arch defintion +builtin enum ExceptionCode; + # XLEN encoding, as defined in CSR[mstatus].mxl, etc. enum XRegWidth { XLEN32 0 XLEN64 1 } -enum ExceptionCode { - None 0xffff - InstructionAddressMisaligned 0 - InstructionAccessFault 1 - IllegalInstruction 2 - Breakpoint 3 - LoadAddressMisaligned 4 - LoadAccessFault 5 - StoreAmoAddressMisaligned 6 - StoreAmoAccessFault 7 - Ucall 8 - Scall 9 - # reserved 10 - Mcall 11 - InstructionPageFault 12 - LoadPageFault 13 - # reserved 14 - StoreAmoPageFault 15 - # reserved 16-17 - SoftwareCheck 18 - HardwareError 19 - InstructionGuestPageFault 20 - LoadGuestPageFault 21 - VirtualInstruction 22 - StoreAmoGuestPageFault 23 -} +# enum ExceptionCode { +# None 0xffff +# InstructionAddressMisaligned 0 +# InstructionAccessFault 1 +# IllegalInstruction 2 +# Breakpoint 3 +# LoadAddressMisaligned 4 +# LoadAccessFault 5 +# StoreAmoAddressMisaligned 6 +# StoreAmoAccessFault 7 +# Ucall 8 +# Scall 9 +# # reserved 10 +# Mcall 11 +# InstructionPageFault 12 +# LoadPageFault 13 +# # reserved 14 +# StoreAmoPageFault 15 +# # reserved 16-17 +# SoftwareCheck 18 +# HardwareError 19 +# InstructionGuestPageFault 20 +# LoadGuestPageFault 21 +# VirtualInstruction 22 +# StoreAmoGuestPageFault 23 +# } enum RoundingMode { RNE 0 # Round to nearest, ties to even @@ -227,16 +233,19 @@ function mtval_readonly? { return !( REPORT_VA_IN_MTVAL_ON_BREAKPOINT || REPORT_VA_IN_MTVAL_ON_LOAD_MISALIGNED || - REPORT_VA_IN_MTVAL_ON_STORE_AMO_MISALIGNED || + REPORT_VA_IN_MTVAL_ON_STORE_MISALIGNED || + (implemented?(ExtensionName::Zaamo) && REPORT_VA_IN_MTVAL_ON_AMO_MISALIGNED) || REPORT_VA_IN_MTVAL_ON_INSTRUCTION_MISALIGNED || REPORT_VA_IN_MTVAL_ON_LOAD_ACCESS_FAULT || - REPORT_VA_IN_MTVAL_ON_STORE_AMO_ACCESS_FAULT || + REPORT_VA_IN_MTVAL_ON_STORE_ACCESS_FAULT || + (implemented?(ExtensionName::Zaamo) && REPORT_VA_IN_MTVAL_ON_AMO_ACCESS_FAULT) || REPORT_VA_IN_MTVAL_ON_INSTRUCTION_ACCESS_FAULT || REPORT_VA_IN_MTVAL_ON_LOAD_PAGE_FAULT || - REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT || + REPORT_VA_IN_MTVAL_ON_STORE_PAGE_FAULT || + (implemented?(ExtensionName::Zaamo) && REPORT_VA_IN_MTVAL_ON_AMO_PAGE_FAULT) || REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT || REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION || - REPORT_CAUSE_IN_MTVAL_ON_SOFTWARE_CHECK || + # REPORT_CAUSE_IN_MTVAL_ON_SOFTWARE_CHECK || implemented?(ExtensionName::Sdext) ); } @@ -328,8 +337,8 @@ function mtval_for { return REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT ? tval : 0; } else if (exception_code == ExceptionCode::IllegalInstruction) { return REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION ? tval : 0; - } else if (exception_code == ExceptionCode::SoftwareCheck) { - return REPORT_CAUSE_IN_MTVAL_ON_SOFTWARE_CHECK ? tval : 0; + # } else if (exception_code == ExceptionCode::SoftwareCheck) { + # return REPORT_CAUSE_IN_MTVAL_ON_SOFTWARE_CHECK ? tval : 0; } else { return 0; } @@ -366,8 +375,8 @@ function stval_for { return REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT ? tval : 0; } else if (exception_code == ExceptionCode::IllegalInstruction) { return REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION ? tval : 0; - } else if (exception_code == ExceptionCode::SoftwareCheck) { - return REPORT_CAUSE_IN_STVAL_ON_SOFTWARE_CHECK ? tval : 0; + # } else if (exception_code == ExceptionCode::SoftwareCheck) { + # return REPORT_CAUSE_IN_STVAL_ON_SOFTWARE_CHECK ? tval : 0; } else { return 0; } @@ -405,8 +414,8 @@ function vstval_for { return REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT ? tval : 0; } else if (exception_code == ExceptionCode::IllegalInstruction) { return REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION ? tval : 0; - } else if (exception_code == ExceptionCode::SoftwareCheck) { - return REPORT_CAUSE_IN_VSTVAL_ON_SOFTWARE_CHECK ? tval : 0; + # } else if (exception_code == ExceptionCode::SoftwareCheck) { + # return REPORT_CAUSE_IN_VSTVAL_ON_SOFTWARE_CHECK ? tval : 0; } else { return 0; } @@ -510,6 +519,43 @@ function jump_halfword { } } +function valid_interrupt_code? { + returns Boolean + arguments XReg code + description { + Returns true if _code_ is a legal interrupt number. + } + body { + if (code > ((1 << $enum_element_size(InterruptCode)) - 1)) { + # code is too large + return false; + } + if (ary_includes?<$enum_size(InterruptCode), $enum_element_size(InterruptCode)>($enum_to_a(InterruptCode), code)) { + return true; + } else { + return false; + } + } +} + +function valid_exception_code? { + returns Boolean + arguments XReg code + description { + Returns true if _code_ is a legal exception number. + } + body { + if (code > ((1 << $enum_element_size(ExceptionCode)) - 1)) { + # code is too large + return false; + } + if (ary_includes?<$enum_size(InterruptCode), $enum_element_size(InterruptCode)>($enum_to_a(InterruptCode), code)) { + return true; + } else { + return false; + } + } +} function xlen { returns Bits<8> diff --git a/arch/prose/idl.adoc b/arch/prose/idl.adoc index db0bab11c..e2394b329 100644 --- a/arch/prose/idl.adoc +++ b/arch/prose/idl.adoc @@ -904,7 +904,7 @@ mstatus: MBE: # ... type(): | - return (M_MODE_ENDIANESS < 2) ? CsrFieldType::RO : CsrFieldType::RW; + return (M_MODE_ENDIANESS == "dynamic") ? CsrFieldType::RW : CsrFieldType::RO; ---- field.reset_value():: @@ -922,7 +922,7 @@ mstatus: # ... # if endianess is mutable, MBE comes out of reset in little-endian mode reset_value(): | - return (M_MODE_ENDIANESS == 1) ? 1 : 0; + return (M_MODE_ENDIANESS == "big") ? 1 : 0; ---- == Compilation order diff --git a/backends/arch_gen/lib/arch_gen.rb b/backends/arch_gen/lib/arch_gen.rb index 4989e7753..cd158e0e9 100644 --- a/backends/arch_gen/lib/arch_gen.rb +++ b/backends/arch_gen/lib/arch_gen.rb @@ -31,6 +31,44 @@ def trace(msg) end private :trace + def gen_params_schema + return if @gen_params_schema_complete == true + + schema = { + "type" => "object", + "required" => ["params"], + "properties" => { + "params" => { + "type" => "object", + "required" => ["NAME"], + "properties" => { + "NAME" => { "type" => "string", "enum" => [@name] } + }, + "additionalProperties" => false + } + }, + "additionalProperties" => false + } + @implemented_extensions.each do |ext| + ext_name = ext["name"] + gen_ext_path = @gen_dir / "arch" / "ext" / "#{ext_name}.yaml" + ext_yaml = YAML.safe_load gen_ext_path.read + unless ext_yaml[ext_name]["params"].nil? + ext_yaml[ext_name]["params"].each do |param_name, param_data| + schema["properties"]["params"]["required"] << param_name + schema["properties"]["params"]["properties"][param_name] = { + "description" => param_data["description"] + }.merge(param_data["schema"]) + end + end + end + schema["properties"]["params"]["required"].uniq! + + FileUtils.mkdir_p @params_schema_path.dirname + @params_schema_path.write JSON.dump(schema) + @gen_params_schema_complete = true + end + # Initialize an Architecture Generator # # @param config_name [#to_s] The name of config located in the cfgs/ directory, @@ -43,50 +81,84 @@ def initialize(config_name) raise "No config named '#{@name}'" unless File.exist?(@cfg_dir) - cfg_params_path = "#{@cfg_dir}/params.yaml" - @cfg = @validator.validate_str(File.read(cfg_params_path), type: :config) - @params = @cfg.fetch("params") + @cfg_params_path = @cfg_dir / "params.yaml" + raise "No params.yaml file in #{@cfg_dir}" unless @cfg_params_path.exist? - unless @params["NAME"] == @name - raise "Config name (#{@params['NAME']}) in params.yaml does not match directory path (#{@name})" - end + cfg_impl_ext_path = @cfg_dir / "implemented_exts.yaml" + raise "No implemented_exts.yaml file in #{@cfg_dir}" unless cfg_impl_ext_path.exist? + + @cfg_impl_ext = @validator.validate(cfg_impl_ext_path)["implemented_extensions"] + raise "Validation failed" if @cfg_impl_ext.nil? + + @params_schema_path = @gen_dir / "schemas" / "params_schema.json" @ext_gen_complete = false - validate_config end - # validates the configuration using cfgs/config_validation.rb - def validate_config - fork do - validation_file = $root / "cfgs" / "config_validation.rb" - validation_env = env.clone - validation_env.class.define_method(:require_param) do |param_name| - return if constants.include?(param_name.to_sym) - - warn "At #{caller[0]}:" - warn "Configuration is missing required parameter #{param_name}" - Kernel.exit! 1 - end - validation_env.class.define_method(:require_ext) do |ext_name| - return if ext?(ext_name.to_sym) + # @return [Hash] Hash of parameter names to values + def params + return @params unless @params.nil? - warn "At #{caller[0]}:" - warn "Configuration is missing required extension #{ext_name}" - Kernel.exit! 1 + @params = (YAML.load_file @cfg_params_path)["params"] + end + + def assert(cond) + raise "Assertion Failed" unless cond + end + private :assert + + # checks any "extra_validation" given by parameter definitions + def params_extra_validation + fork do + # add parameters as a constant + params.each do |key, value| + self.class.const_set(key, value) end - validation_env.class.define_method(:assert) do |condition| - return if condition - warn "At #{caller[0]}:" - warn "Configuration check failed" - Kernel.exit! 1 + @implemented_extensions.each do |ext| + ext_name = ext["name"] + gen_ext_path = @gen_dir / "arch" / "ext" / "#{ext_name}.yaml" + ext_yaml = YAML.safe_load gen_ext_path.read + unless ext_yaml[ext_name]["params"].nil? + ext_yaml[ext_name]["params"].each do |param_name, param_data| + next unless param_data.key?("extra_validation") + begin + eval param_data["extra_validation"] + rescue StandardError => e + warn "While checking extension parameter #{ext_name}::#{param_name}.extra_validation" + warn param_data["extra_validation"] + warn e + exit 1 + end + end + end end - env.clone.class_eval validation_file.read, validation_file.to_s, 1 end Process.wait exit 1 unless $CHILD_STATUS.success? end + private :params_extra_validation + + # validate the params.yaml file of a config. + # + # This does several things: + # + # * Generates a config-specific schmea based on: + # ** the extensions a config implements + # ** the parameters an implemented extension requires + # * Validates params.yaml against that configuration-specific schema + # * Checks any extra validation specified by 'extra_validation' + def validate_params + gen_ext_def + add_implied_extensions + check_extension_dependencies + + gen_params_schema + @validator.validate @cfg_params_path + + params_extra_validation + end # generate the architecture definition into the gen directory # @@ -98,6 +170,9 @@ def generate add_implied_extensions check_extension_dependencies + gen_params_schema + validate_params + gen_csr_def gen_inst_def @@ -128,6 +203,8 @@ def check_extension_dependencies # transitively adds any implied extensions to the @implemented_extensions list def add_implied_extensions + return if @add_implied_extensions_complete == true + @implemented_extensions.each do |ext| extras = @implied_ext_map[[ext["name"], ext["version"]]] next if extras.nil? || extras.empty? @@ -150,6 +227,8 @@ def add_implied_extensions } end end + + @add_implied_extensions_complete = true end private :add_implied_extensions @@ -210,12 +289,12 @@ def gen_arch_def File.write(abs_arch_def_path, arch_def_yaml) # make sure it passes validation - begin - @validator.validate_str(YAML.dump(arch_def), type: :arch) - rescue Validator::ValidationError => e - warn "While validating the unified architecture defintion at #{abs_arch_def_path}" - raise e - end + # begin + # @validator.validate_str(YAML.dump(arch_def), type: :arch) + # rescue Validator::ValidationError => e + # warn "While validating the unified architecture defintion at #{abs_arch_def_path}" + # raise e + # end end private :gen_arch_def @@ -264,12 +343,12 @@ def env # @return [Boolean] whether or not extension +ext_name+ meeting +ext_requirement+ is implemented in the config def ext?(ext_name, ext_requirement = ">= 0") if ext_requirement.nil? - @cfg["extensions"].any? do |e| + @cfg_impl_ext.any? do |e| e[0] == ext_name.to_s end else requirement = Gem::Requirement.create(ext_requirement.to_s) - @cfg["extensions"].any? do |e| + @cfg_impl_ext.any? do |e| e[0] == ext_name.to_s && requirement.satisfied_by?(Gem::Version.new(e[1])) end end @@ -522,8 +601,8 @@ def gen_merged_def(type, arch_path, overlay_path) # @param csr_name [#to_s] CSR name # @param extra_env [Hash] Extra enviornment variables to be used when parsing the CSR definition template def maybe_add_csr(csr_name, extra_env = {}) - arch_path = gen_rendered_arch_def(:csr, csr_name, extra_env) - arch_overlay_path = gen_rendered_arch_overlay_def(:csr, csr_name, extra_env) + arch_path = arch_path_for(:csr, csr_name) # gen_rendered_arch_def(:csr, csr_name, extra_env) + arch_overlay_path = arch_overlay_path_for(:csr, csr_name) # gen_rendered_arch_overlay_def(:csr, csr_name, extra_env) # return immediately if this CSR isn't defined in this config raise "No arch or overlay for sr #{csr_name}" if arch_path.nil? && arch_overlay_path.nil? @@ -565,7 +644,7 @@ def maybe_add_csr(csr_name, extra_env = {}) belongs = csr_obj.exists_in_cfg?( possible_xlens, - @cfg["extensions"].map { |e| ExtensionVersion.new(e[0], e[1]) } + @cfg_impl_ext.map { |e| ExtensionVersion.new(e[0], e[1]) } ) @implemented_csrs ||= [] @@ -615,8 +694,8 @@ def all_known_exts end def maybe_add_ext(ext_name) - arch_path = gen_rendered_arch_def(:ext, ext_name) - arch_overlay_path = gen_rendered_arch_overlay_def(:ext, ext_name) + arch_path = arch_path_for(:ext, ext_name) # gen_rendered_arch_def(:ext, ext_name) + arch_overlay_path = arch_overlay_path_for(:ext, ext_name) # gen_rendered_arch_overlay_def(:ext, ext_name) # return immediately if this ext isn't defined return if arch_path.nil? && arch_overlay_path.nil? @@ -647,18 +726,18 @@ def maybe_add_ext(ext_name) end belongs = - @cfg["extensions"].any? { |e| e[0] == ext_name } + @cfg_impl_ext.any? { |e| e[0] == ext_name } @implemented_extensions ||= [] if belongs @implemented_extensions << { "name" => ext_name, - "version" => @cfg["extensions"].select { |e| e[0] == ext_name }[0][1].to_s + "version" => @cfg_impl_ext.select { |e| e[0] == ext_name }[0][1].to_s } end if belongs # check that the version number exists, too - cfg_ext = @cfg["extensions"].select { |e| e[0] == ext_name }[0] + cfg_ext = @cfg_impl_ext.select { |e| e[0] == ext_name }[0] if ext_obj["versions"].select { |v| v["version"] == cfg_ext[1] }.empty? raise "Configured version for extension #{extension_name} not defined" @@ -673,6 +752,8 @@ def maybe_add_ext(ext_name) # generate parsed and merged definitions for all extensions def gen_ext_def + return if @ext_gen_complete == true + ext_list = all_known_exts ext_list.each do |ext_name| @@ -726,20 +807,20 @@ def interrupt_codes end def possible_xlens - possible_xlens = [@params["XLEN"]] - if @cfg["extensions"].any? { |e| e[0] == "S" } - possible_xlens << 32 if [32, 3264].include?(@params["SXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["SXLEN"]) + possible_xlens = [params["XLEN"]] + if @cfg_impl_ext.any? { |e| e[0] == "S" } + possible_xlens << 32 if [32, 3264].include?(params["SXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["SXLEN"]) end - if @cfg["extensions"].any? { |e| e[0] == "U" } - possible_xlens << 32 if [32, 3264].include?(@params["UXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["UXLEN"]) + if @cfg_impl_ext.any? { |e| e[0] == "U" } + possible_xlens << 32 if [32, 3264].include?(params["UXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["UXLEN"]) end - if @cfg["extensions"].any? { |e| e[0] == "H" } - possible_xlens << 32 if [32, 3264].include?(@params["VSXLEN"]) - possible_xlens << 32 if [32, 3264].include?(@params["VUXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["VSXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["VUXLEN"]) + if @cfg_impl_ext.any? { |e| e[0] == "H" } + possible_xlens << 32 if [32, 3264].include?(params["VSXLEN"]) + possible_xlens << 32 if [32, 3264].include?(params["VUXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["VSXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["VUXLEN"]) end possible_xlens end @@ -750,8 +831,8 @@ def possible_xlens # @param inst_name [#to_s] instruction name # @param extra_env [Hash] Extra options to add into the rendering enviornment def maybe_add_inst(inst_name, extra_env = {}) - arch_path = gen_rendered_arch_def(:inst, inst_name, extra_env) - arch_overlay_path = gen_rendered_arch_overlay_def(:inst, inst_name, extra_env) + arch_path = arch_path_for(:inst, inst_name) # gen_rendered_arch_def(:inst, inst_name, extra_env) + arch_overlay_path = arch_overlay_path_for(:inst, inst_name) # gen_rendered_arch_overlay_def(:inst, inst_name, extra_env) # return immediately if inst isn't defined in this config raise "No arch or overlay for instruction #{inst_name}" if arch_path.nil? && arch_overlay_path.nil? @@ -789,25 +870,25 @@ def maybe_add_inst(inst_name, extra_env = {}) end inst_obj = Instruction.new(inst_data[inst_name]) - possible_xlens = [@params["XLEN"]] - if @cfg["extensions"].any? { |e| e[0] == "S" } - possible_xlens << 32 if [32, 3264].include?(@params["SXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["SXLEN"]) + possible_xlens = [params["XLEN"]] + if @cfg_impl_ext.any? { |e| e[0] == "S" } + possible_xlens << 32 if [32, 3264].include?(params["SXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["SXLEN"]) end - if @cfg["extensions"].any? { |e| e[0] == "U" } - possible_xlens << 32 if [32, 3264].include?(@params["UXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["UXLEN"]) + if @cfg_impl_ext.any? { |e| e[0] == "U" } + possible_xlens << 32 if [32, 3264].include?(params["UXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["UXLEN"]) end - if @cfg["extensions"].any? { |e| e[0] == "H" } - possible_xlens << 32 if [32, 3264].include?(@params["VSXLEN"]) - possible_xlens << 32 if [32, 3264].include?(@params["VUXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["VSXLEN"]) - possible_xlens << 64 if [64, 3264].include?(@params["VUXLEN"]) + if @cfg_impl_ext.any? { |e| e[0] == "H" } + possible_xlens << 32 if [32, 3264].include?(params["VSXLEN"]) + possible_xlens << 32 if [32, 3264].include?(params["VUXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["VSXLEN"]) + possible_xlens << 64 if [64, 3264].include?(params["VUXLEN"]) end belongs = inst_obj.exists_in_cfg?( possible_xlens.uniq, - @cfg["extensions"].map { |e| ExtensionVersion.new(e[0], e[1]) } + @cfg_impl_ext.map { |e| ExtensionVersion.new(e[0], e[1]) } ) @implemented_instructions ||= [] @@ -849,6 +930,4 @@ def gen_inst_def end private :gen_inst_def - # @return [Hash] Hash of parameters for the config - def params = @params.select { |k, _v| k.upcase == k } end diff --git a/backends/arch_gen/tasks.rake b/backends/arch_gen/tasks.rake index b72a7b703..0ce393aaf 100644 --- a/backends/arch_gen/tasks.rake +++ b/backends/arch_gen/tasks.rake @@ -107,3 +107,14 @@ namespace :gen do Rake::Task["#{$root}/.stamps/arch-gen.stamp"].invoke end end + +namespace :validate do + desc "Validate that a configuration folder valid for the list of extensions it claims to implement" + task :cfg, [:config_name] do |_t, args| + raise "No config '#{args[:config_name]}' found in cfgs/" unless ($root / "cfgs" / args[:config_name]).directory? + + ArchGen.new(args[:config_name]).validate_params + + puts "Success! The '#{args[:config_name]}' configuration passes validation checks" + end +end diff --git a/backends/cfg_html_doc/html_gen.rake b/backends/cfg_html_doc/html_gen.rake index 3a1c2c502..e7086239c 100644 --- a/backends/cfg_html_doc/html_gen.rake +++ b/backends/cfg_html_doc/html_gen.rake @@ -166,8 +166,54 @@ rule %r{#{$root}/gen/cfg_html_doc/.*/antora/playbook.yaml} => proc { |tname| contents: | + - path: js/vendor/highlight.js contents: #{$root}/backends/cfg_html_doc/ui/highlight.js + - path: css/vendor/custom.css + contents: | + .small { + font-size: 50%; + font-weight: normal; + } + + code.language-idl > a { + text-decoration: none; + } + + /* rotate text vertically */ + span.rotate { + writing-mode: vertical-lr; + } + + span.access-always { + background-color: green; + display: block; + padding: 16px; + border-radius: 8px; + text-align: center; + color: white; + font-weight: bold; + } + + span.access-sometimes { + background-color: rgb(255, 193, 7); + display: block; + padding: 16px; + border-radius: 8px; + text-align: center; + color: black; + font-weight: bold; + } + + span.access-never { + background-color: #e71324; + display: block; + padding: 16px; + border-radius: 8px; + text-align: center; + color: white; + font-weight: bold; + } PLAYBOOK end diff --git a/backends/cfg_html_doc/templates/config.adoc.erb b/backends/cfg_html_doc/templates/config.adoc.erb index 0890e2c0d..a61122ddd 100644 --- a/backends/cfg_html_doc/templates/config.adoc.erb +++ b/backends/cfg_html_doc/templates/config.adoc.erb @@ -1,22 +1,26 @@ = Configuration of <%= arch_def.name %> -== Parameters +== Extensions -<%- config_schema = JSON.load_file($root / "schemas" / "config_schema.json") -%> -[cols="1,2,4"] |=== -| Name | Value | Description - -<%- arch_def.config_params.each do |pname, pvalue| -%> -| *<%= pname %>* | <%= pvalue %> a| <%= config_schema["$defs"]["params"]["properties"][pname]["description"] %> +| Name | Version +<%- arch_def.implemented_extensions.sort{ |a,b| a.name <=> b.name }.each do |e| -%> +| `<%= e.name %>` | <%= e.version.to_s %> <%- end -%> |=== -== Extensions +== Parameters +<%- arch_def.params.each do |param| -%> +=== *<%= param.name %>* + +[cols="1,4,1"] |=== -| Name | Version -<%- arch_def.implemented_extensions.sort{ |a,b| a.name <=> b.name }.each do |e| -%> -| `<%= e.name %>` | <%= e.version.to_s %> +| Value | Description | From Exension + +| <%= param.value %> +a| <%= param.desc %> +a| `<%= param.ext.name %>` +|=== + <%- end -%> -|=== \ No newline at end of file diff --git a/backends/cfg_html_doc/templates/csr.adoc.erb b/backends/cfg_html_doc/templates/csr.adoc.erb index 8693fa850..325643ae1 100644 --- a/backends/cfg_html_doc/templates/csr.adoc.erb +++ b/backends/cfg_html_doc/templates/csr.adoc.erb @@ -1,9 +1,11 @@ +:tabs-sync-option: + [csr:#<%= csr.name %>-def] = <%= csr.name %> *<%= csr.long_name %>* -<%= csr.description %> +<%= arch_def.render_erb(csr.description) %> == Attributes [%autowidth] @@ -26,12 +28,11 @@ h| Privilege Mode | <%= csr.priv_mode %> .<%= csr.name %> format [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump csr.wavedrom_desc(arch_def, arch_def.config_params["XLEN"]) %> +<%= JSON.dump csr.wavedrom_desc(arch_def, arch_def.param_values["XLEN"]) %> .... <%- else -%> <%# CSR has a dynamic length, or a field has a dynamic location, so there is more than one format to display -%> -<%- puts "CSR #{csr.name} changes dynamically" -%> This CSR format changes dynamically. .<%= csr.name %> Format when <%= csr.length_cond32 %> @@ -49,23 +50,52 @@ This CSR format changes dynamically. <%- end -%> +== Field Summary + +[%autowidth,float="center",align="center",cols="^,<,<,<",options="header",role="stretch"] +|=== +|Name | Location | Type | Reset Value + +<%- csr.implemented_fields(arch_def).each do |field| -%> +| xref:<%=csr.name%>-<%=field.name%>-def[`<%= field.name %>`] +| <%= field.location_pretty(arch_def) %> +| <%= field.type(arch_def) %> +| <%= field.reset_value(arch_def) %> + +<%- end -%> +|=== + == Fields <%- if csr.implemented_fields(arch_def).empty? -%> This CSR has no fields. However, it must still exist (not cause an `Illegal Instruction` trap) and always return zero on a read. <%- else -%> -[%autowidth,float="center",align="center",cols="^,<,<,<,<",options="header",role="stretch"] -|==== -|Name | Location | Type | Reset Value | Description <%- csr.implemented_fields(arch_def).each do |field| -%> -m| anchor:<%=csr.name%>-<%=field.name%>-def[] <%= field.name %> -| <%= field.location_pretty(arch_def) %> -| <%= field.type(arch_def) %> -| <%= field.reset_value(arch_def) %> -a| <%= field.description %> +[[<%=csr.name%>-<%=field.name%>-def]] +=== `<%= field.name %>` + +[example] +**** +Location:: +<%= field.location_pretty(arch_def) %> + +Description:: +<%= field.description %> + +Type:: +[%autowidth] +|=== + +| <%= field.type(arch_def) %> | <%= field.type_desc(arch_def) %> +|=== + +Reset value:: +<%= field.reset_value(arch_def) %> + +**** + <%- end -%> -|==== <%- end -%> <%- if csr.fields.map(&:has_custom_sw_write?).any? -%> @@ -93,11 +123,20 @@ written value: This CSR may return a value that is different from what is stored in hardware. -[subs="specialchars,macros"] +[tabs] +==== +Pruned:: ++ +[source,idl,subs="specialchars,macros"] ---- <%= csr.pruned_sw_read_ast(arch_def).gen_adoc %> ---- +Original:: ++ +[source,idl,subs="specialchars,macros"] +---- +<%= csr.type_checked_sw_read_ast(arch_def).gen_adoc %> +---- +==== <%- end -%> - -<%- -%> diff --git a/backends/cfg_html_doc/templates/func.adoc.erb b/backends/cfg_html_doc/templates/func.adoc.erb index 9b8298bee..86fb04b8d 100644 --- a/backends/cfg_html_doc/templates/func.adoc.erb +++ b/backends/cfg_html_doc/templates/func.adoc.erb @@ -4,7 +4,7 @@ = Functions -<%- isa_def.functions.each do |f| -%> +<%- arch_def.implemented_functions.each do |f| -%> [#<%= f.name %>-func-def] == <%= f.name %><%- if f.builtin? -%> (builtin)<%- end -%> diff --git a/backends/cfg_html_doc/templates/inst.adoc.erb b/backends/cfg_html_doc/templates/inst.adoc.erb index fbc428f7f..669931974 100644 --- a/backends/cfg_html_doc/templates/inst.adoc.erb +++ b/backends/cfg_html_doc/templates/inst.adoc.erb @@ -45,7 +45,7 @@ RV64:: <%- else -%> [wavedrom, ,svg,subs='attributes',width="100%"] .... -<%= JSON.dump inst.wavedrom_desc(arch_def.config_params["XLEN"]) %> +<%= JSON.dump inst.wavedrom_desc(arch_def.param_values["XLEN"]) %> .... <%- end -%> @@ -101,7 +101,7 @@ RV64:: <%- else -%> [source,idl] ---- -<%- inst.decode_variables(arch_def.config_params["XLEN"]).each do |d| -%> +<%- inst.decode_variables(arch_def.param_values["XLEN"]).each do |d| -%> <%= d.sext? ? 'signed ' : '' %>Bits<<%= d.size %>> <%= d.name %> = <%= d.extract %>; <%- end -%> ---- diff --git a/cfgs/generic_rv64/implemented_exts.yaml b/cfgs/generic_rv64/implemented_exts.yaml new file mode 100644 index 000000000..f33d15710 --- /dev/null +++ b/cfgs/generic_rv64/implemented_exts.yaml @@ -0,0 +1,27 @@ +# $schema=../../schemas/implemented_exts_schema.json + +implemented_extensions: + - [A, 2.1] + - [B, 1.0] + - [C, 2.2] + - [D, 2.2] + # - [F, 2.2] + - [I, 2.1] + - [H, 1.0] + - [M, 2.0] + - [S, 1.12] + - [U, 1.12] + - [Zicntr, 2.0] + - [Zicsr, 2.0] + - [Zihpm, 2.0] + - [Smaia, 1.0] + - [Smcdeleg, 0] + - [Smcntrpmf, 1.0] + - [Sscofpmf, 1.0] + - [Ssaia, 1.0] + - [Ssccfg, 0] + - [Sstc, 0.9] + - [Sv39, 1.12] + - [Sv48, 1.12] + - [Zicboz, "1.0.1-b34ea8a"] + - [Zicbom, "1.0.1-b34ea8a"] diff --git a/cfgs/generic_rv64/params.yaml b/cfgs/generic_rv64/params.yaml index 90c2bb628..67b583cfb 100644 --- a/cfgs/generic_rv64/params.yaml +++ b/cfgs/generic_rv64/params.yaml @@ -1,4 +1,3 @@ -# yaml-language-server: $schema=../../schemas/config_schema.json --- params: @@ -28,8 +27,39 @@ params: # whether or not the implementation supports misaligned atomics MISALIGNED_AMO: false - # number of implemented programmable hardware performance counters - NUM_HPM_COUNTERS: 8 + HPM_COUNTER_EN: + - false # CY + - false # empty + - false # IR + - true # HPM3 + - true # HPM4 + - true # HPM5 + - true # HPM6 + - true # HPM7 + - true # HPM8 + - true # HPM9 + - true # HPM10 + - false # HPM11 + - false # HPM12 + - false # HPM13 + - false # HPM14 + - false # HPM15 + - false # HPM16 + - false # HPM17 + - false # HPM18 + - false # HPM19 + - false # HPM20 + - false # HPM21 + - false # HPM22 + - false # HPM23 + - false # HPM24 + - false # HPM25 + - false # HPM26 + - false # HPM27 + - false # HPM28 + - false # HPM29 + - false # HPM30 + - false # HPM31 # list of defined HPM events HPM_EVENTS: @@ -119,6 +149,8 @@ params: # when true, writing an illegal value to a WLRL CSR field raises an Illegal Instruction exception # when false, writing an illegal value to a WLRL CSR field is ignored TRAP_ON_ILLEGAL_WLRL: true + TRAP_ON_UNIMPLEMENTED_INSTRUCTION: true + TRAP_ON_UNIMPLEMENTED_CSR: true # when true, *tval is written with the virtual PC of the EBREAK instruction (same information as *epc) # when false, *tval is written with 0 on an EBREAK instruction @@ -136,10 +168,11 @@ params: REPORT_VA_IN_MTVAL_ON_STORE_AMO_PAGE_FAULT: true REPORT_VA_IN_MTVAL_ON_INSTRUCTION_PAGE_FAULT: true REPORT_ENCODING_IN_MTVAL_ON_ILLEGAL_INSTRUCTION: true - REPORT_CAUSE_IN_MTVAL_ON_SOFTWARE_CHECK: true + # REPORT_CAUSE_IN_MTVAL_ON_SOFTWARE_CHECK: true MTVAL_WIDTH: 64 # must check that this can hold any valid VA if any REPORT_VA* or Sdext, and, if REPORT_ENCODING*, at least [MXLEN, ILEN].min bits REPORT_VA_IN_STVAL_ON_BREAKPOINT: true + REPORT_VA_IN_STVAL_ON_LOAD_MISALIGNED: true REPORT_VA_IN_STVAL_ON_STORE_AMO_MISALIGNED: true REPORT_VA_IN_STVAL_ON_INSTRUCTION_MISALIGNED: true REPORT_VA_IN_STVAL_ON_LOAD_ACCESS_FAULT: true @@ -149,10 +182,11 @@ params: REPORT_VA_IN_STVAL_ON_STORE_AMO_PAGE_FAULT: true REPORT_VA_IN_STVAL_ON_INSTRUCTION_PAGE_FAULT: true REPORT_ENCODING_IN_STVAL_ON_ILLEGAL_INSTRUCTION: true - REPORT_CAUSE_IN_STVAL_ON_SOFTWARE_CHECK: true + # REPORT_CAUSE_IN_STVAL_ON_SOFTWARE_CHECK: true STVAL_WIDTH: 64 # must check that this can hold any valid VA, and, if REPORT_ENCODING*, at least [SXLEN, ILEN].min bits REPORT_VA_IN_VSTVAL_ON_BREAKPOINT: true + REPORT_VA_IN_VSTVAL_ON_LOAD_MISALIGNED: true REPORT_VA_IN_VSTVAL_ON_STORE_AMO_MISALIGNED: true REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_MISALIGNED: true REPORT_VA_IN_VSTVAL_ON_LOAD_ACCESS_FAULT: true @@ -162,7 +196,7 @@ params: REPORT_VA_IN_VSTVAL_ON_STORE_AMO_PAGE_FAULT: true REPORT_VA_IN_VSTVAL_ON_INSTRUCTION_PAGE_FAULT: true REPORT_ENCODING_IN_VSTVAL_ON_ILLEGAL_INSTRUCTION: true - REPORT_CAUSE_IN_VSTVAL_ON_SOFTWARE_CHECK: true + # REPORT_CAUSE_IN_VSTVAL_ON_SOFTWARE_CHECK: true # VSTVAL_WIDTH not needed; "vstval is a WARL register that must be able to hold the same set of values that stval can hold" @@ -210,10 +244,42 @@ params: # maximum value is 16 ASID_WIDTH: 12 + # when the A extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.A` bit. + MUTABLE_MISA_A: false + + # when the B extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.B` bit. + MUTABLE_MISA_B: false + # when the C extensions is supported, indicates whether or not # the extension can be disabled in the `misa.C` bit. MUTABLE_MISA_C: false + # when the D extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.D` bit. + MUTABLE_MISA_D: false + + # when the F extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.F` bit. + MUTABLE_MISA_F: false + + # when the H extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.H` bit. + MUTABLE_MISA_H: false + + # when the M extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.M` bit. + MUTABLE_MISA_M: false + + # when the S extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.S` bit. + MUTABLE_MISA_S: false + + # when the U extensions is supported, indicates whether or not + # the extension can be disabled in the `misa.U` bit. + MUTABLE_MISA_U: false + # size of a cache block, in bytes CACHE_BLOCK_SIZE: 64 @@ -223,38 +289,38 @@ params: # Endianess of data in M-mode. Can be one of: # - # * 0: M-mode data is always little endian - # * 1: M-mode data is always big endian - # * 2: M-mode data can be either little or big endian, depending on the RW CSR field mstatus.MBE - M_MODE_ENDIANESS: 0 + # * little: M-mode data is always little endian + # * big: M-mode data is always big endian + # * dynamic: M-mode data can be either little or big endian, depending on the RW CSR field mstatus.MBE + M_MODE_ENDIANESS: little # Endianess of data in M-mode. Can be one of: # - # * 0: S-mode data is always little endian - # * 1: S-mode data is always big endian - # * 2: S-mode data can be either little or big endian, depending on the RW CSR field mstatus.SBE - S_MODE_ENDIANESS: 0 + # * little: S-mode data is always little endian + # * big: S-mode data is always big endian + # * dynamic: S-mode data can be either little or big endian, depending on the RW CSR field mstatus.SBE + S_MODE_ENDIANESS: little # Endianess of data in M-mode. Can be one of: # - # * 0: U-mode data is always little endian - # * 1: U-mode data is always big endian - # * 2: U-mode data can be either little or big endian, depending on the RW CSR field mstatus.UBE - U_MODE_ENDIANESS: 0 + # * litte: U-mode data is always little endian + # * big: U-mode data is always big endian + # * dynamic: U-mode data can be either little or big endian, depending on the RW CSR field mstatus.UBE + U_MODE_ENDIANESS: little # Endianess of data in VU-mode. Can be one of: # - # * 0: VU-mode data is always little endian - # * 1: VU-mode data is always big endian - # * 2: VU-mode data can be either little or big endian, depending on the RW CSR field vsstatus.UBE - VU_MODE_ENDIANESS: 0 + # * little: VU-mode data is always little endian + # * big: VU-mode data is always big endian + # * dynamic: VU-mode data can be either little or big endian, depending on the RW CSR field vsstatus.UBE + VU_MODE_ENDIANESS: little # Endianess of data in VS-mode. Can be one of: # - # * 0: VS-mode data is always little endian - # * 1: VS-mode data is always big endian - # * 2: VS-mode data can be either little or big endian, depending on the RW CSR field hstatus.VSBE - VS_MODE_ENDIANESS: 0 + # * little: VS-mode data is always little endian + # * big: VS-mode data is always big endian + # * dynamic: VS-mode data can be either little or big endian, depending on the RW CSR field hstatus.VSBE + VS_MODE_ENDIANESS: little # XLENs supported in S-mode. Can be one of: # @@ -308,35 +374,4 @@ params: # (independent of whether or not the SC is in the current reservation set) LRSC_FAIL_ON_NON_EXACT_LRSC: false -hpm_events: - - 'L1_ICACHE_MISS' - - 'L2_CACHE_MISS' - -custom_interrupt_codes: [] -custom_exception_codes: [] - -extensions: - - [A, 2.1] - - [B, 1.0] - - [C, 2.2] - - [D, 2.2] - # - [F, 2.2] - - [I, 2.1] - - [H, 1.0] - - [M, 2.0] - - [S, 1.12] - - [U, 1.12] - - [Zicntr, 2.0] - - [Zicsr, 2.0] - - [Zihpm, 2.0] - - [Smaia, 1.0] - - [Smcdeleg, 0] - - [Smcntrpmf, 1.0] - - [Sscofpmf, 1.0] - - [Ssaia, 1.0] - - [Ssccfg, 0] - - [Sstc, 0.9] - - [Sv39, 1.12] - - [Sv48, 1.12] - - [Zicboz, "1.0.1-b34ea8a"] - - [Zicbom, "1.0.1-b34ea8a"] + diff --git a/lib/arch_def.rb b/lib/arch_def.rb index 003932b6d..b549886e3 100644 --- a/lib/arch_def.rb +++ b/lib/arch_def.rb @@ -581,7 +581,7 @@ def sw_write_ast(idl_compiler) @sw_write_ast = idl_compiler.compile_func_body( @data["sw_write(csr_value)"], return_type: Idl::Type.new(:bits, width: 128), # big int to hold special return values - name: "CSR[#{name}].sw_write(csr_value)", + name: "CSR[#{csr.name}].#{name}.sw_write(csr_value)", input_file: csr.source_line("fields", name, "sw_write(csr_value)"), type_check: false ) @@ -700,43 +700,62 @@ def location_pretty(arch_def) #{derangeify.call(location(arch_def, 64))} when #{condition.sub('%%', '1')} LOC else - derangeify.call(location(arch_def, arch_def.config_params["XLEN"])) + derangeify.call(location(arch_def, arch_def.param_values["XLEN"])) end end TYPE_DESC_MAP = { "RO" => - %(*Read-Only* Field has a hardwired value that does not change. - Writes to an RO field are ignored.), + <<~DESC, + *Read-Only* + + Field has a hardwired value that does not change. + Writes to an RO field are ignored. + DESC "RO-H" => - %(*Read-Only with Hardware update* + <<~DESC, + *Read-Only with Hardware update* + Writes are ignored. - Reads reflect a value dynamically generated by hardware.), + Reads reflect a value dynamically generated by hardware. + DESC "RW" => - %(*Read-Write* + <<~DESC, + *Read-Write* + Field is writable by software. - Any value that fits in the field is acceptable and shall be retained for subsequent reads.), + Any value that fits in the field is acceptable and shall be retained for subsequent reads. + DESC "RW-R" => - %(*Read-Write Restricted* + <<~DESC, + *Read-Write Restricted* + Field is writable by software. Only certain values are legal. - Writing an illegal value into the field is ignored, and the field retains its prior state.), + Writing an illegal value into the field is ignored, and the field retains its prior state. + DESC "RW-H" => - %(*Read-Write with Hardware update* + <<~DESC, + *Read-Write with Hardware update* + Field is writable by software. Any value that fits in the field is acceptable. - Hardware also updates the field without an explicit software write.), + Hardware also updates the field without an explicit software write. + DESC "RW-RH" => - %(*Read-Write Restricted with Hardware update* + <<~DESC + *Read-Write Restricted with Hardware update* + Field is writeable by software. Only certain values are legal. Writing an illegal value into the field is ignored, such that the field retains its prior state. Hardware also updates the field without an explicit software write.) + DESC }.freeze # @return [String] Long description of the field type - def type_desc - TYPE_DESC_MAP[type] + def type_desc(arch_def) + TYPE_DESC_MAP[type(arch_def)] end end @@ -807,9 +826,9 @@ def dynamic_length?(arch_def) when "MXLEN" false # mxlen can never change when "SXLEN" - arch_def.config_params["SXLEN"] == 3264 + arch_def.param_values["SXLEN"] == 3264 when "VSXLEN" - arch_def.config_params["VSXLEN"] == 3264 + arch_def.param_values["VSXLEN"] == 3264 else raise "Unexpected length" end @@ -822,27 +841,27 @@ def dynamic_length?(arch_def) def length(arch_def, effective_xlen = nil) case @data["length"] when "MXLEN" - arch_def.config_params["XLEN"] + arch_def.param_values["XLEN"] when "SXLEN" - if arch_def.config_params["SXLEN"] == 3264 + if arch_def.param_values["SXLEN"] == 3264 raise ArgumentError, "effective_xlen is required when length is dynamic (#{name})" if effective_xlen.nil? effective_xlen else raise "CSR #{name} is not implemented" if arch_def.implemented_csrs.none? { |c| c.name == name } - raise "CSR #{name} is not implemented" if arch_def.config_params["SXLEN"].nil? + raise "CSR #{name} is not implemented" if arch_def.param_values["SXLEN"].nil? - arch_def.config_params["SXLEN"] + arch_def.param_values["SXLEN"] end when "VSXLEN" - if arch_def.config_params["VSXLEN"] == 3264 + if arch_def.param_values["VSXLEN"] == 3264 raise ArgumentError, "effective_xlen is required when length is dynamic (#{name})" if effective_xlen.nil? effective_xlen else - raise "CSR #{name} is not implemented" if arch_def.config_params["VSXLEN"].nil? + raise "CSR #{name} is not implemented" if arch_def.param_values["VSXLEN"].nil? - arch_def.config_params["VSXLEN"] + arch_def.param_values["VSXLEN"] end when Integer @data["length"] @@ -855,27 +874,27 @@ def length(arch_def, effective_xlen = nil) def max_length(arch_def) case @data["length"] when "MXLEN" - arch_def.config_params["XLEN"] + arch_def.param_values["XLEN"] when "SXLEN" - if arch_def.config_params["SXLEN"] == 3264 + if arch_def.param_values["SXLEN"] == 3264 raise ArgumentError, "effective_xlen is required when length is dynamic (#{name})" if effective_xlen.nil? 64 else raise "CSR #{name} is not implemented" if arch_def.implemented_csrs.none? { |c| c.name == name } - raise "CSR #{name} is not implemented" if arch_def.config_params["SXLEN"].nil? + raise "CSR #{name} is not implemented" if arch_def.param_values["SXLEN"].nil? - arch_def.config_params["SXLEN"] + arch_def.param_values["SXLEN"] end when "VSXLEN" - if arch_def.config_params["VSXLEN"] == 3264 + if arch_def.param_values["VSXLEN"] == 3264 raise ArgumentError, "effective_xlen is required when length is dynamic (#{name})" if effective_xlen.nil? 64 else - raise "CSR #{name} is not implemented" if arch_def.config_params["VSXLEN"].nil? + raise "CSR #{name} is not implemented" if arch_def.param_values["VSXLEN"].nil? - arch_def.config_params["VSXLEN"] + arch_def.param_values["VSXLEN"] end when Integer @data["length"] @@ -976,13 +995,13 @@ def implemented_fields(arch_def) return @implemented_fields unless @implemented_fields.nil? implemented_bases = - if arch_def.config_params["SXLEN"] == 3264 || - arch_def.config_params["UXLEN"] == 3264 || - arch_def.config_params["VSXLEN"] == 3264 || - arch_def.config_params["VUXLEN"] == 3264 + if arch_def.param_values["SXLEN"] == 3264 || + arch_def.param_values["UXLEN"] == 3264 || + arch_def.param_values["VSXLEN"] == 3264 || + arch_def.param_values["VUXLEN"] == 3264 [32, 64] else - [arch_def.config_params["XLEN"]] + [arch_def.param_values["XLEN"]] end @implemented_fields = fields.select do |f| @@ -1828,6 +1847,59 @@ def exists_in_cfg?(possible_xlens, extensions) end end +# an implmentation parameter/option for an extension +class ExtensionParameter + # @return [String] Parameter name + attr_reader :name + + # @return [String] Asciidoc description + attr_reader :desc + + # @return [Hash] JSON Schema for the parameter value + attr_reader :schema + + # @return [String] Ruby code to perform validation above and beyond JSON schema + # @return [nil] If there is no extra validatino + attr_reader :extra_validation + + # @return [Extension] The extension that defines this parameter + attr_reader :ext + + def initialize(name, desc, schema, extra_validation, ext) + @name = name + @desc = desc + @schema = schema + @extra_validation = extra_validation + @ext = ext + end +end + +class ExtensionParameterWithValue + # @return [Object] The parameter value + attr_reader :value + + # @return [String] Parameter name + def name = @param.name + + # @return [String] Asciidoc description + def desc = @param.desc + + # @return [Hash] JSON Schema for the parameter value + def schema = @param.schema + + # @return [String] Ruby code to perform validation above and beyond JSON schema + # @return [nil] If there is no extra validatino + def extra_validation = @param.extra_validation + + # @return [Extension] The extension that defines this parameter + def ext = @param.ext + + def initialize(param, value) + @param = param + @value = value + end +end + # Extension definition class Extension < ArchDefObject # @return [ArchDef] The architecture defintion @@ -1850,6 +1922,25 @@ def versions @data["versions"] end + # @return [Array] List of parameters added by this extension + def params + return @params unless @params.nil? + + @params = [] + if @data.key?("params") + @data["params"].each do |param_name, param_data| + @params << ExtensionParameter.new( + param_name, + param_data["description"], + param_data["schema"], + param_data["extra_validation"], + self + ) + end + end + @params + end + # @param ext_data [Hash] The extension data from the architecture spec # @param arch_def [ArchDef] The architecture defintion def initialize(ext_data, arch_def) @@ -2134,6 +2225,32 @@ def find_replace_links(adoc) end end +# a synchroncous exception code +class ExceptionCode + + # @return [String] Long-form display name (can include special characters) + attr_reader :name + + # @return [String] Field name for an IDL enum + attr_reader :var + + # @return [Integer] Code, written into *mcause + attr_reader :num + + # @return [Extension] Extension that defines this code + attr_reader :ext + + def initialize(name, var, number, ext) + @name = name + @var = var + @num = number + @ext = ext + end +end + +# all the same informatin as ExceptinCOde, but for interrupts +InterruptCode = Class.new(ExceptionCode) + # Object model for a configured architecture definition class ImplArchDef < ArchDef # @return [String] Name of the architecture configuration @@ -2141,9 +2258,9 @@ class ImplArchDef < ArchDef # @return [SymbolTable] The symbol table containing global definitions attr_reader :sym_table - - # @return [Hash] The configuration parameters - attr_reader :config_params + + # @return [Hash] The configuration parameter name => value + attr_reader :param_values # @return [Integer] 32 or 64, the XLEN in m-mode attr_reader :mxlen @@ -2151,6 +2268,91 @@ class ImplArchDef < ArchDef # hash for Hash lookup def hash = @name.hash + # @return [Array] List of all parameters for the config + def params + return @params unless @params.nil? + + @params = [] + implemented_extensions.each do |ext_version| + ext = extension(ext_version.name) + ext.params.each do |ext_param| + if param_values.key?(ext_param.name) + @params << ExtensionParameterWithValue.new( + ext_param, + param_values[ext_param.name] + ) + end + end + end + @params + end + + def erb_env + return @env unless @env.nil? + + @env = Class.new + @env.instance_variable_set(:@cfg, @cfg) + @env.instance_variable_set(:@params, @params) + @env.instance_variable_set(:@arch_gen, self) + + # add each parameter, either as a method (lowercase) or constant (uppercase) + params.each do |param| + @env.const_set(param.name, param.value) + end + + @env.instance_exec do + # method to check if a given extension (with an optional version number) is present + # + # @param ext_name [String,#to_s] Name of the extension + # @param ext_requirement [String, #to_s] Version string, as a Gem Requirement (https://guides.rubygems.org/patterns/#pessimistic-version-constraint) + # @return [Boolean] whether or not extension +ext_name+ meeting +ext_requirement+ is implemented in the config + def ext?(ext_name, ext_requirement = ">= 0") + @arch_gen.ext?(ext_name.to_s, ext_requirement) + end + + # @return [Array] List of possible XLENs for any implemented mode + def possible_xlens + @arch_gen.possible_xlens + end + + # insert a hyperlink to an object + # At this point, we insert a placeholder since it will be up + # to the backend to create a specific link + # + # @params type [Symbol] Type (:section, :csr, :inst, :ext) + # @params name [#to_s] Name of the object + def link_to(type, name) + "%%LINK%#{type};#{name}%%" + end + + # info on interrupt and exception codes + + # @returns [Hash] architecturally-defined exception codes and their names + def exception_codes + @arch_gen.exception_codes + end + + # returns [Hash] architecturally-defined interrupt codes and their names + def interrupt_codes + @arch_gen.interrupt_codes + end + end + + @env + end + private :erb_env + + # passes _erb_template_ through ERB within the content of this config + # + # @param erb_template [String] ERB source + # @return [String] The rendered text + def render_erb(erb_template) + t = Tempfile.new("template") + t.write erb_template + t.flush + Tilt["erb"].new(t.path, trim: "-").render(erb_env) + end + # Initialize a new configured architecture defintiion # # @param config_name [#to_s] The name of a configuration, which must correspond @@ -2171,7 +2373,7 @@ def initialize(config_name) @arch_def = YAML.load_file(arch_def_file) - @config_params = @arch_def["params"] + @param_values = @arch_def["params"] @mxlen = @arch_def["params"]["XLEN"] @sym_table = Idl::SymbolTable.new(self) @@ -2190,7 +2392,7 @@ def inspect = "ArchDef##{name}" # @return [Boolean] true if this configuration can execute in multiple xlen environments # (i.e., that in some mode the effective xlen can be either 32 or 64, depending on CSR values) def multi_xlen? - ["SXLEN", "UXLEN", "VSXLEN", "VUXLEN"].any? { |key| @config_params[key] == 3264 } + ["SXLEN", "UXLEN", "VSXLEN", "VUXLEN"].any? { |key| @param_values[key] == 3264 } end # @return [Array] List of possible XLENs in any mode for this config @@ -2205,13 +2407,13 @@ def multi_xlen_in_mode?(mode) when "M" false when "S" - @config_params["SXLEN"] == 3264 + @param_values["SXLEN"] == 3264 when "U" - @config_params["UXLEN"] == 3264 + @param_values["UXLEN"] == 3264 when "VS" - @config_params["VSXLEN"] == 3264 + @param_values["VSXLEN"] == 3264 when "VU" - @config_params["VUXLEN"] == 3264 + @param_values["VUXLEN"] == 3264 else raise ArgumentError, "Bad mode" end @@ -2244,14 +2446,58 @@ def implemented_extensions # @example Checking extension precsence with a precise version requirement # arch_def.ext?(:S, 1.12) def ext?(ext_name, *ext_version_requirements) - implemented_extensions.any? do |e| - if ext_version_requirements.empty? - e.name == ext_name.to_s - else - requirement = Gem::Requirement.new(ext_version_requirements) - (e.name == ext_name.to_s) && requirement.satisfied_by?(e.version) + @ext_cache ||= {} + cached_result = @ext_cache[[ext_name, ext_version_requirements]] + return cached_result unless cached_result.nil? + + result = + implemented_extensions.any? do |e| + if ext_version_requirements.empty? + e.name == ext_name.to_s + else + requirement = Gem::Requirement.new(ext_version_requirements) + (e.name == ext_name.to_s) && requirement.satisfied_by?(e.version) + end + end + @ext_cache[[ext_name, ext_version_requirements]] = result + end + + # @return [Array] All exception codes from this implementation + def exception_codes + return @exception_codes unless @exception_codes.nil? + + @exception_codes = + implemented_extensions.reduce([]) do |list, ext_version| + ecodes = extension(ext_version.name)["exception_codes"] + next list if ecodes.nil? + + ecodes.each do |ecode| + # double check that all the codes are unique + raise "Duplicate exception code" if list.any? { |e| e.num == ecode["num"] || e.name == ecode["name"] || e.var == ecode["var"] } + + list << ExceptionCode.new(ecode["name"], ecode["var"], ecode["num"], self) + end + list + end + end + + # @return [Array] All interrupt codes from this implementation + def interrupt_codes + return @interrupt_codes unless @interrupt_codes.nil? + + @interupt_codes = + implemented_extensions.reduce([]) do |list, ext_version| + icodes = extension(ext_version.name)["interrupt_codes"] + next list if icodes.nil? + + icodes.each do |icode| + # double check that all the codes are unique + raise "Duplicate interrupt code" if list.any? { |i| i.num == icode["num"] || i.name == icode["name"] || i.var == icode["var"] } + + list << InterruptCode.new(icode["name"], icode["var"], icode["num"], self) + end + list end - end end # @return [Hash] The raw architecture defintion data structure diff --git a/lib/idl/ast.rb b/lib/idl/ast.rb index f9e5ca722..8c816874a 100644 --- a/lib/idl/ast.rb +++ b/lib/idl/ast.rb @@ -646,6 +646,108 @@ def type_check(symtab) end end + class EnumSizeSyntaxNode < Treetop::Runtime::SyntaxNode + def to_ast + EnumSizeAst.new(input, interval, user_type_name.to_ast) + end + end + + # represents the builtin that returns the nymber of elements in an enum class + # + # $enum_size(XRegWidth) #=> 2 + class EnumSizeAst < AstNode + def enum_class = children[0] + + def initialize(input, interval, enum_class_name) + super(input, interval, [enum_class_name]) + end + + def type_check(symtab) + enum_class.type_check(symtab) + end + + def type(symtab) + Type.new( + :bits, + width: enum_class.type(symtab).element_names.size.bit_length, + qualifiers: [:const] + ) + end + + def value(symtab) + enum_class.type(symtab).element_names.size + end + + def to_idl = "$enum_size(#{enum_class.to_idl})" + end + + class EnumElementSizeSyntaxNode < Treetop::Runtime::SyntaxNode + def to_ast + EnumElementSizeAst.new(input, interval, user_type_name.to_ast) + end + end + + # represents the builtin that returns the bitwidth of an element in an enum class + # + # $enum_element_size(PrivilegeMode) #=> 3 + class EnumElementSizeAst < AstNode + def enum_class = children[0] + + def initialize(input, interval, enum_class_name) + super(input, interval, [enum_class_name]) + end + + def type_check(symtab) + enum_class.type_check(symtab) + end + + def type(symtab) + Type.new(:bits, width: enum_class.type(symtab).width, qualifiers: [:const]) + end + + def value(symtab) + enum_class.type(symtab).width + end + + def to_idl = "$enum_element_size(#{enum_class.to_idl})" + end + + class EnumArrayCastSyntaxNode < Treetop::Runtime::SyntaxNode + def to_ast + EnumArrayCastAst.new(input, interval, user_type_name.to_ast) + end + end + + # represents the builtin that returns an array with all elements of an Enum type + # + # $enum_to_a(PrivilegeMode) #=> [3, 1, 1, 0, 5, 4] + class EnumArrayCastAst < AstNode + def enum_class = children[0] + + def initialize(input, interval, enum_class_name) + super(input, interval, [enum_class_name]) + end + + def type_check(symtab) + enum_class.type_check(symtab) + end + + def type(symtab) + Type.new( + :array, + width: enum_class.type(symtab).element_values.size, + sub_type: Type.new(:bits, width: enum_class.type(symtab).width), + qualifiers: [:const] + ) + end + + def value(symtab) + enum_class.type(symtab).element_values + end + + def to_idl = "$enum_to_a(#{enum_class.to_idl})" + end + class EnumDefinitionSyntaxNode < Treetop::Runtime::SyntaxNode def to_ast values = [] @@ -777,7 +879,10 @@ def initialize(input, interval, user_type) # @!macro type_check_no_args def type_check(_symtab) - unless @user_type.text_value == "ExtensionName" + case @user_type.text_value + when "ExtensionName", "ExceptionCode", "InterruptCode" + # OK + else type_error "Unsupported builtin enum type '#{@user_type.text_value}'" end end @@ -1047,15 +1152,15 @@ def value(symtab) else value_error "X registers are not compile-time-known" if var.text_value == "X" - ary = symtab.get(var.text_value) - internal_error "Not an array" unless ary.type.kind == :array + ary = var.value(symtab) + # internal_error "Not an array" unless ary.type.kind == :array - internal_error "Not an array (is a #{ary.value.class.name})" unless ary.value.is_a?(Array) + internal_error "Not an array (is a #{ary.class.name})" unless ary.is_a?(Array) idx = index.value(symtab) - internal_error "Index out of range; make sure type_check is called" if idx >= ary.value.size + internal_error "Index out of range; make sure type_check is called" if idx >= ary.size - ary.value[idx].value + ary[idx] end end @@ -2063,10 +2168,19 @@ def to_idl # @!macro type def type(symtab) lhs_type = lhs.type(symtab) - rhs_type = rhs.type(symtab) + short_circuit = false + begin + lhs_value = lhs.value(symtab) + if (lhs_value == true && op == "||") || (lhs_value == false && op == "&&") + short_circuit = true + end + rescue ValueError + short_circuit = false + end + rhs_type = rhs.type(symtab) unless short_circuit qualifiers = [] - qualifiers << :const if lhs_type.const? && rhs_type.const? + qualifiers << :const if lhs_type.const? && (short_circuit || rhs_type.const?) if LOGICAL_OPS.include?(op) if qualifiers.include?(:const) @@ -3525,7 +3639,7 @@ def type_check(symtab) value_text = ::Regexp.last_match(6) if width.nil? || width == "XLEN" - width = symtab.archdef.config_params["XLEN"] + width = symtab.archdef.param_values["XLEN"] memoize = false end @@ -3547,7 +3661,7 @@ def type(symtab) memoize = true if width.nil? || width == "XLEN" - width = symtab.archdef.config_params["XLEN"] + width = symtab.archdef.param_values["XLEN"] memoize = false end @@ -3587,7 +3701,7 @@ def width(symtab) width = ::Regexp.last_match(1) memoize = true if width.nil? || width == "XLEN" - width = archdef.config_params["XLEN"] + width = archdef.param_values["XLEN"] memoize = false end # @width = width if memoize @@ -3624,7 +3738,7 @@ def value(symtab) memoize = true if width.nil? || width == "XLEN" - width = symtab.archdef.config_params["XLEN"] + width = symtab.archdef.param_values["XLEN"] memoize = false end @@ -4970,7 +5084,7 @@ def type_check(symtab) csr.type_check(symtab) expression.type_check(symtab) - return if expression.type(symtab).kind == :bits && expression.type(symtab).width == archdef.config_params["XLEN"] + return if expression.type(symtab).kind == :bits && expression.type(symtab).width == archdef.param_values["XLEN"] type_error "CSR value must be an XReg" end @@ -5023,7 +5137,7 @@ def type(symtab) if csr_known?(symtab) Type.new(:bits, width: archdef.csr(csr.csr_name(symtab)).length) else - Type.new(:bits, width: archdef.config_params["XLEN"]) + Type.new(:bits, width: archdef.param_values["XLEN"]) end end diff --git a/lib/idl/idl.treetop b/lib/idl/idl.treetop index d3336ed3d..1b4c3e50d 100644 --- a/lib/idl/idl.treetop +++ b/lib/idl/idl.treetop @@ -314,6 +314,12 @@ grammar Idl / '$bits' space* '(' space* expression space* ')' / + '$enum_size' space* '(' space* user_type_name ')' + / + '$enum_element_size' space* '(' space* user_type_name ')' + / + '$enum_to_a' space* '(' space* user_type_name ')' + / paren_expression / o:unary_operator space* e:expression @@ -365,7 +371,7 @@ grammar Idl end rule function_call_template_arguments - first:(rval) rest:(space* ',' space* arg:(rval))* + first:(template_safe_expression) rest:(space* ',' space* arg:(template_safe_expression))* end rule function_call diff --git a/lib/idl/passes/gen_adoc.rb b/lib/idl/passes/gen_adoc.rb index c8d400203..10629f8f6 100644 --- a/lib/idl/passes/gen_adoc.rb +++ b/lib/idl/passes/gen_adoc.rb @@ -12,17 +12,17 @@ def gen_adoc(indent = 0, indent_spaces: 2) = "" end class AryRangeAssignmentAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{variable.gen_adoc(indent, indent_spaces: )}[#{msb.gen_adoc(0, indent_spaces:)}:#{lsb.gen_adoc(0, indent_spaces:)}] = #{write_value.gen_adoc(0, indent_spaces:)}" + "#{' '*indent}#{variable.gen_adoc(indent, indent_spaces: )}[#{msb.gen_adoc(0, indent_spaces:)}:#{lsb.gen_adoc(0, indent_spaces:)}] = #{write_value.gen_adoc(0, indent_spaces:)}" end end class ConditionalReturnStatementAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{return_expression.gen_adoc(indent, indent_spaces: )} if (#{condition.gen_adoc(0, indent_spaces:)});" + "#{' '*indent}#{return_expression.gen_adoc(indent, indent_spaces: )} if (#{condition.gen_adoc(0, indent_spaces:)});" end end class ReturnExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) - "return #{return_value_nodes.map{ |r| r.gen_adoc(0, indent_spaces: )}.join(', ')}" + "#{' '*indent}return #{return_value_nodes.map{ |r| r.gen_adoc(0, indent_spaces: )}.join(', ')}" end end class IfBodyAst @@ -31,99 +31,114 @@ def gen_adoc(indent = 0, indent_spaces: 2) children.each do |e| adoc << e.gen_adoc(indent, indent_spaces:) end - adoc.map{ |a| "#{' '*indent}#{a}" }.join("") + adoc.join("\n") end end class PostIncrementExpressionAst def gen_adoc(indent, indent_spaces: 2) - "#{rval.gen_adoc(indent, indent_spaces: )}++" + "#{' '*indent}#{rval.gen_adoc(indent, indent_spaces: )}++" end end class PostDecrementExpressionAst def gen_adoc(indent, indent_spaces: 2) - "#{rval.gen_adoc(indent, indent_spaces: )}--" + "#{' '*indent}#{rval.gen_adoc(indent, indent_spaces: )}--" end end class StringLiteralAst def gen_adoc(indent, indent_spaces: 2) - "\"#{text_value}\"" + "#{' '*indent}\"#{text_value}\"" end end class DontCareReturnAst def gen_adoc(indent, indent_spaces: 2) - "-" + "#{' '*indent}-" end end class UserTypeNameAst def gen_adoc(indent, indent_spaces: 2) - text_value + "#{' '*indent}#{text_value}" end end class MultiVariableAssignmentAst def gen_adoc(indent, indent_spaces: 2) - "(#{variables.map { |v| v.gen_adoc(0, indent_spaces: )}.join(', ')} = #{function_call.gen_adoc(0, indent_spaces:)})" + "#{' '*indent}(#{variables.map { |v| v.gen_adoc(0, indent_spaces: )}.join(', ')} = #{function_call.gen_adoc(0, indent_spaces:)})" end end class CsrSoftwareReadAst def gen_adoc(indent, indent_spaces: 2) - "#{csr.gen_adoc(indent, indent_spaces:)}.sw_read()" + "#{' '*indent}#{csr.gen_adoc(indent, indent_spaces:)}.sw_read()" end end class CsrSoftwareWriteAst def gen_adoc(indent, indent_spaces: 2) - "#{csr.gen_adoc(indent, indent_spaces:)}.sw_write(#{expression.gen_adoc(0, indent_spaces:)})" + "#{' '*indent}#{csr.gen_adoc(indent, indent_spaces:)}.sw_write(#{expression.gen_adoc(0, indent_spaces:)})" end end class BitfieldAccessExpressionAst def gen_adoc(indent, indent_spaces: 2) - "#{bitfield.gen_adoc(indent, indent_spaces: )}.#{@field_name}" + "#{' '*indent}#{bitfield.gen_adoc(indent, indent_spaces: )}.#{@field_name}" end end class ConcatenationExpressionAst def gen_adoc(indent, indent_spaces: 2) - "{#{expressions.map { |e| e.gen_adoc(0, indent_spaces: )}.join(', ')}}" + "#{' '*indent}{#{expressions.map { |e| e.gen_adoc(0, indent_spaces: )}.join(', ')}}" end end class BitsCastAst def gen_adoc(indent, indent_spaces: 2) - "$bits(#{expression.gen_adoc(0, indent_spaces: )})" + "#{' '*indent}$bits(#{expression.gen_adoc(0, indent_spaces: )})" end end class CsrFieldAssignmentAst def gen_adoc(indent, indent_spaces: 2) - "#{csr_field.gen_adoc(indent, indent_spaces:)} = #{write_value.gen_adoc(0, indent_spaces:)}" + "#{' '*indent}#{csr_field.gen_adoc(indent, indent_spaces:)} = #{write_value.gen_adoc(0, indent_spaces:)}" end end class EnumRefAst def gen_adoc(indent, indent_spaces: 2) - "#{class_name}::#{member_name}" + "#{' '*indent}#{class_name}::#{member_name}" + end + end + class EnumSizeAst + def gen_adoc(indent, indent_spaces: 2) + "#{' '*indent}$enum_size(#{enum_class.gen_adoc(0, indent_spaces:)})" + end + end + class EnumElementSizeAst + def gen_adoc(indent, indent_spaces: 2) + "#{' '*indent}$enum_element_size(#{enum_class.gen_adoc(0, indent_spaces:)})" + end + end + class EnumArrayCastAst + def gen_adoc(indent, indent_spaces: 2) + "#{' '*indent}$enum_to_a(#{enum_class.gen_adoc(0, indent_spaces:)})" end end class ParenExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) - "(#{expression.gen_adoc(indent, indent_spaces:)})" + "#{' '*indent}(#{expression.gen_adoc(indent, indent_spaces:)})" end end class IntLiteralAst def gen_adoc(indent = 0, indent_spaces: 2) raise "?" if text_value.empty? - text_value + "#{' '*indent}#{text_value}" end end class IdAst def gen_adoc(indent = 0, indent_spaces: 2) - text_value + "#{' '*indent}#{text_value}" end end class SignCastAst def gen_adoc(indent = 0, indent_spaces: 2) - "$signed(#{expression.gen_adoc(0, indent_spaces:)})" + "#{' '*indent}$signed+(+#{expression.gen_adoc(0, indent_spaces:)})" end end class AryRangeAccessAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{var.gen_adoc(indent, indent_spaces:)}[#{msb.gen_adoc(0, indent_spaces:)}:#{lsb.gen_adoc(0, indent_spaces:)}]" + "#{' '*indent}#{var.gen_adoc(indent, indent_spaces:)}[#{msb.gen_adoc(0, indent_spaces:)}:#{lsb.gen_adoc(0, indent_spaces:)}]" end end @@ -142,7 +157,7 @@ def gen_adoc(indent = 0, indent_spaces: 2) class BuiltinTypeNameAst def gen_adoc(indent = 0, indent_spaces: 2) if @type_name == "Bits" - "Bits<#{bits_expression.gen_adoc(0, indent_spaces:)}>" + "#{' '*indent}Bits<#{bits_expression.gen_adoc(0, indent_spaces:)}>" else to_idl end @@ -151,7 +166,7 @@ def gen_adoc(indent = 0, indent_spaces: 2) class ForLoopAst def gen_adoc(indent = 0, indent_spaces: 2) - lines = ["#{' '*indent}for (#{init.gen_adoc(0, indent_spaces:)}; #{condition.gen_adoc(0, indent_spaces:)}; #{update.gen_adoc(0, indent_spaces:)}) {"] + lines = ["#{' '*indent}for pass:[(]#{init.gen_adoc(0, indent_spaces:)}; #{condition.gen_adoc(0, indent_spaces:)}; #{update.gen_adoc(0, indent_spaces:)}) {"] stmts.each do |s| lines << s.gen_adoc(indent + indent_spaces, indent_spaces:) end @@ -178,25 +193,25 @@ def gen_adoc(indent = 0, indent_spaces: 2) class AryElementAccessAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{var.gen_adoc(indent, indent_spaces:)}[#{index.gen_adoc(0, indent_spaces:)}]" + "#{' '*indent}#{var.gen_adoc(indent, indent_spaces:)}[#{index.gen_adoc(0, indent_spaces:)}]" end end class BinaryExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{lhs.gen_adoc(0, indent_spaces:)} #{op} #{rhs.gen_adoc(0, indent_spaces:)}" + "#{' '*indent}#{lhs.gen_adoc(0, indent_spaces:)} #{op.sub("+", "pass:[+]")} #{rhs.gen_adoc(0, indent_spaces:)}" end end class VariableAssignmentAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{lhs.gen_adoc(0, indent_spaces:)} = #{rhs.gen_adoc(0, indent_spaces:)}" + "#{' '*indent}#{lhs.gen_adoc(0, indent_spaces:)} = #{rhs.gen_adoc(0, indent_spaces:)}" end end class AryElementAssignmentAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{lhs.gen_adoc(0, indent_spaces:)}[#{idx.gen_adoc(0, indent_spaces:)}] = #{rhs.gen_adoc(0, indent_spaces:)}" + "#{' '*indent}#{lhs.gen_adoc(0, indent_spaces:)}[#{idx.gen_adoc(0, indent_spaces:)}] = #{rhs.gen_adoc(0, indent_spaces:)}" end end @@ -208,7 +223,7 @@ def gen_adoc(indent = 0, indent_spaces: 2) class UnaryOperatorExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{op}#{exp.gen_adoc(0, indent_spaces:)}" + "#{' '*indent}#{op}#{exp.gen_adoc(0, indent_spaces:)}" end end @@ -220,13 +235,13 @@ def gen_adoc(indent = 0, indent_spaces: 2) class ReplicationExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) - "{#{n.gen_adoc(indent, indent_spaces:)}{#{v.gen_adoc(indent, indent_spaces:)}}}" + "#{' '*indent}{#{n.gen_adoc(0, indent_spaces:)}{#{v.gen_adoc(indent, indent_spaces:)}}}" end end class ConditionalStatementAst def gen_adoc(indent = 0, indent_spaces: 2) - "#{action.gen_adoc(indent, indent_spaces:)} if (#{condition.gen_adoc(0, indent_spaces:)});" + "#{' '*indent}#{action.gen_adoc(0, indent_spaces:)} if (#{condition.gen_adoc(0, indent_spaces:)});" end end @@ -234,14 +249,14 @@ class FunctionCallExpressionAst def gen_adoc(indent = 0, indent_spaces: 2) after_name = [] after_name << "<#{template_arg_nodes.map { |t| t.gen_adoc(0, indent_spaces:)}.join(', ')}>" unless template_arg_nodes.empty? - after_name << "(#{arg_nodes.map { |a| a.gen_adoc(0, indent_spaces: ) }.join(', ')})" - "%%LINK%func;#{name};#{name}%%#{after_name.join ''}" + after_name << "pass:[(]#{arg_nodes.map { |a| a.gen_adoc(0, indent_spaces: ) }.join(', ')})" + "#{' '*indent}%%LINK%func;#{name};#{name}%%#{after_name.join ''}" end end class FunctionBodyAst def gen_adoc(indent = 0, indent_spaces: 2) - statements.map{ |s| "#{' ' * indent}#{s.gen_adoc(indent, indent_spaces:)}" }.join("\n") + statements.map{ |s| "#{' ' * indent}#{s.gen_adoc(0, indent_spaces:)}" }.join("\n") end end @@ -255,9 +270,9 @@ def gen_adoc(indent = 0, indent_spaces: 2) end csr_text = "CSR[#{idx_text}].#{@field_name}" if idx_text =~ /[0-9]+/ - csr_text + "#{' '*indent}#{csr_text}" else - "%%LINK%csr_field;#{idx_text}.#{@field_name};#{csr_text}%%" + "#{' '*indent}%%LINK%csr_field;#{idx_text}.#{@field_name};#{csr_text}%%" end end end @@ -274,34 +289,34 @@ def gen_adoc(indent = 0, indent_spaces: 2) csr_text = "CSR[#{idx_text}]" if idx_text =~ /[0-9]+/ # we don't have the symtab to map this to a csr name - csr_text + "#{' '*indent}#{csr_text}" else - "%%LINK%csr;#{idx_text};#{csr_text}%%" + "#{' '*indent}%%LINK%csr;#{idx_text};#{csr_text}%%" end end end class IfAst def gen_adoc(indent = 0, indent_spaces: 2) - lines = ["if (#{if_cond.gen_adoc(0, indent_spaces:)}) {"] + lines = ["#{' '*indent}if pass:[(]#{if_cond.gen_adoc(0, indent_spaces:)}) {"] if_body.stmts.each do |s| lines << s.gen_adoc(indent + indent_spaces, indent_spaces:) end elseifs.each do |eif| - lines << "} else if (#{eif.cond.gen_adoc(0, indent_spaces:)}) {" + lines << "#{' '*indent}} else if pass:[(]#{eif.cond.gen_adoc(0, indent_spaces:)}) {" eif.body.stmts.each do |s| lines << s.gen_adoc(indent + indent_spaces, indent_spaces:) end end unless final_else_body.stmts.empty? - lines << "} else {" + lines << "#{' '*indent}} else {" final_else_body.stmts.each do |s| lines << s.gen_adoc(indent + indent_spaces, indent_spaces:) end end - lines << "}" + lines << "#{' '*indent}}" - lines.map { |l| "#{' ' * indent}#{l}"}.join("\n") + lines.join("\n") end end end diff --git a/lib/idl/passes/prune.rb b/lib/idl/passes/prune.rb index 42e095635..c79a770ed 100644 --- a/lib/idl/passes/prune.rb +++ b/lib/idl/passes/prune.rb @@ -252,10 +252,10 @@ def prune(symtab) # as the starting point and try again IfAst.new( input, interval, - elseifs[0].cond.prune(symtab), - elseifs[0].body.prune(symtab), - elseifs[1..].map { |e| e.prune(symtab) }, - final_else_body.prune(symtab)) + elseifs[0].cond.dup, + elseifs[0].body.dup, + elseifs[1..].map(&:dup), + final_else_body.dup).prune(symtab) elsif !final_else_body.stmts.empty? # the if is false, and there are no else ifs, so the result of the prune is just the pruned else body final_else_body.prune(symtab) @@ -273,11 +273,11 @@ def prune(symtab) # this elseif is true, so turn it into an else and then we are done return IfAst.new( input, interval, - if_cond.prune(symtab), - if_body.prune(symtab), - unknown_elsifs.map { |u| u.prune(symtab) }, - eif.body.prune(symtab) - ) + if_cond.dup, + if_body.dup, + unknown_elsifs.map(&:dup), + eif.body.dup + ).prune(symtab) else # this elseif is false, so we can remove it next diff --git a/lib/idl/symbol_table.rb b/lib/idl/symbol_table.rb index c088fe17f..89cc00c4b 100644 --- a/lib/idl/symbol_table.rb +++ b/lib/idl/symbol_table.rb @@ -81,12 +81,12 @@ def initialize(arch_def) @scopes = [{ 'X' => Var.new( 'X', - Type.new(:array, sub_type: XregType.new(arch_def.config_params['XLEN']), width: 32, qualifiers: [:global]) + Type.new(:array, sub_type: XregType.new(arch_def.param_values['XLEN']), width: 32, qualifiers: [:global]) ), - 'XReg' => XregType.new(arch_def.config_params['XLEN']), + 'XReg' => XregType.new(arch_def.param_values['XLEN']), 'PC' => Var.new( 'PC', - XregType.new(arch_def.config_params['XLEN']) + XregType.new(arch_def.param_values['XLEN']) ), 'Boolean' => Type.new(:boolean), 'True' => Var.new( @@ -111,7 +111,7 @@ def initialize(arch_def) ) }] - arch_def.config_params.each do |name, value| + arch_def.param_values.each do |name, value| if value.is_a?(Integer) width = value.bit_length width = 1 if width.zero? # happens if value is 0 @@ -135,7 +135,7 @@ def initialize(arch_def) end ary_type = Type.new(:array, width: value.size, sub_type: element_type) value.each_with_index do |v, idx| - ary << Var.new("#{name}[#{idx}]", element_type, v) + ary << v #Var.new("#{name}[#{idx}]", element_type, v) end add!(name, Var.new(name, ary_type, ary)) # also add the array size @@ -145,8 +145,32 @@ def initialize(arch_def) raise "Unhandled config param type '#{value.class.name}' for '#{name}'" end end - add!('ExtensionName', EnumerationType.new('ExtensionName', arch_def.extensions.map(&:name), Array.new(arch_def.extensions.size) { |i| i + 1 })) + # add the builtin extensions + add!( + "ExtensionName", + EnumerationType.new( + "ExtensionName", + arch_def.extensions.map(&:name), + Array.new(arch_def.extensions.size) { |i| i + 1 } + ) + ) + add!( + "ExceptionCode", + EnumerationType.new( + "ExceptionCode", + arch_def.exception_codes.map(&:var), + arch_def.exception_codes.map(&:num) + ) + ) + add!( + "InterruptCode", + EnumerationType.new( + "InterruptCode", + arch_def.interrupt_codes.map(&:var), + arch_def.interrupt_codes.map(&:num) + ) + ) end # do a deep freeze to protect the sym table and all its entries from modification diff --git a/lib/idl/tests/helpers.rb b/lib/idl/tests/helpers.rb index 3560fb638..bbbef377b 100644 --- a/lib/idl/tests/helpers.rb +++ b/lib/idl/tests/helpers.rb @@ -1,5 +1,7 @@ # frozen_string_literal: true +require "ostruct" + # Extension mock that returns an extension name class MockExtension attr_reader :name @@ -10,9 +12,11 @@ def initialize(name) # ArchDef mock that knows about XLEN and extensions class MockArchDef - def config_params = { "XLEN" => 32 } + def param_values = { "XLEN" => 32 } def extensions = [MockExtension.new("I")] def mxlen = 64 + def exception_codes = [OpenStruct.new(var: "ACode", num: 0), OpenStruct.new(var: "BCode", num: 1)] + def interrupt_codes = [OpenStruct.new(var: "CoolInterrupt", num: 1)] end module TestMixin diff --git a/lib/idl/tests/test_functions.rb b/lib/idl/tests/test_functions.rb index bc4b6fa62..922ba4031 100644 --- a/lib/idl/tests/test_functions.rb +++ b/lib/idl/tests/test_functions.rb @@ -18,14 +18,9 @@ def test_that_reachable_raise_analysis_respects_transitive_known_values B 1 } - enum ExceptionCode { - ACode 0 - BCode 1 - } - builtin function raise { arguments ExceptionCode code - description { raise and exception} + description { raise an exception} } function nested_choose { @@ -83,11 +78,6 @@ def test_that_reachable_raise_analysis_respects_known_paths_down_an_unknown_path B 1 } - enum ExceptionCode { - ACode 0 - BCode 1 - } - Bits<64> unknown; builtin function raise { diff --git a/lib/idl/type.rb b/lib/idl/type.rb index 1ff6aec5a..474279272 100644 --- a/lib/idl/type.rb +++ b/lib/idl/type.rb @@ -53,7 +53,7 @@ def qualify(qualifier) def self.from_typename(type_name, arch_def) case type_name when 'XReg' - return Type.new(:bits, width: arch_def.config_params['XLEN']) + return Type.new(:bits, width: arch_def.param_values['XLEN']) when 'FReg' return Type.new(:freg, width: 32) when 'DReg' @@ -368,7 +368,6 @@ def make_global end end - class EnumerationType < Type attr_reader :element_names, :element_values, :width, :ref_type diff --git a/lib/validate.rb b/lib/validate.rb index ebb15212b..d4d0798c3 100644 --- a/lib/validate.rb +++ b/lib/validate.rb @@ -14,11 +14,11 @@ class Validator # map of type to schema filesystem path SCHEMA_PATHS = { - config: $root / "schemas" / "config_schema.json", arch: $root / "schemas" / "arch_schema.json", inst: $root / "schemas" / "inst_schema.json", ext: $root / "schemas" / "ext_schema.json", - csr: $root / "schemas" / "csr_schema.json" + csr: $root / "schemas" / "csr_schema.json", + cfg_impl_ext: $root / "schemas" / "implemented_exts_schema.json" }.freeze # types of objects that can be validated @@ -56,7 +56,11 @@ def initialize(result) if r["type"] == "required" && !r.dig("details", "missing_keys").nil? " At '#{r['data_pointer']}': Missing required parameter(s) '#{r['details']['missing_keys']}'\n" elsif r["type"] == "schema" - " At #{r['data_pointer']}, endpoint is an invalid key\n" + if r["schema_pointer"] == "/additionalProperties" + " At #{r['data_pointer']}, there is an unallowed additional key\n" + else + " At #{r['data_pointer']}, endpoint is an invalid key\n" + end elsif r["type"] == "enum" " At #{r['data_pointer']}, '#{r['data']}' is not a valid enum value (#{r['schema']['enum']})\n" elsif r["type"] == "maxProperties" @@ -90,10 +94,20 @@ def initialize SCHEMA_PATHS.each do |type, path| # resolve refs as a relative path from the schema file ref_resolver = proc do |pattern| - JSON.load_file($root / "schemas" / pattern.to_s) + if pattern.to_s =~ /^http/ + JSON.parse(Net::HTTP.get(pattern)) + else + JSON.load_file($root / "schemas" / pattern.to_s) + end end - @schemas[type] = JSONSchemer.schema(path.read, regexp_resolver: "ecma", ref_resolver: ref_resolver, insert_property_defaults: true) + @schemas[type] = + JSONSchemer.schema( + path.read, + regexp_resolver: "ecma", + ref_resolver:, + insert_property_defaults: true + ) raise SchemaError, @schemas[type].validate_schema unless @schemas[type].valid_schema? end end @@ -105,8 +119,8 @@ def initialize # @param type [Symbol] Type of the object (One of TYPES) # @raise [ValidationError] if the str is not valid against the type schema # @see TYPES - def validate_str(str, type: nil) - raise "Invalid type #{type}" unless TYPES.any?(type) + def validate_str(str, type: nil, schema_path: nil) + raise "Invalid type #{type}" unless TYPES.any?(type) || !schema_path.nil? begin obj = YAML.safe_load(str, permitted_classes: [Symbol]) @@ -117,7 +131,26 @@ def validate_str(str, type: nil) # convert through JSON to handle anything supported in YAML but not JSON # (e.g., integer object keys will be coverted to strings) jsonified_obj = JSON.parse(JSON.generate(obj)) - raise ValidationError, @schemas[type].validate(jsonified_obj) unless @schemas[type].valid?(jsonified_obj) + + raise "Nothing there?" if jsonified_obj.nil? + + schema = + if schema_path.nil? + @schemas[type] + else + # resolve refs as a relative path from the schema file + ref_resolver = proc do |pattern| + JSON.load_file(schema_path.dirname / pattern.to_s) + end + JSONSchemer.schema( + schema_path.read, + regexp_resolver: "ecma", + ref_resolver:, + insert_property_defaults: true + ) + end + + raise ValidationError, schema.validate(jsonified_obj) unless schema.valid?(jsonified_obj) jsonified_obj end @@ -131,10 +164,15 @@ def validate_str(str, type: nil) # @raise [ValidationError] if the str is not valid against the type schema # @see TYPES def validate(path, type: nil) + schema_path = nil if type.nil? case path.to_s - when %r{.*cfgs/params\.yaml$} - type = :config + when %r{.*cfgs/([^/]+)/params\.yaml} + cfg_name = $1.to_s + type = :cfg_params + schema_path = $root / "gen" / cfg_name / "schemas" / "params_schema.json" + when %r{.*cfgs/[^/]+/implemented_exts\.yaml$} + type = :cfg_impl_ext when %r{.*arch/arch_def\.yaml$} type = :arch when %r{.*arch/inst/.*/.*\.yaml$} @@ -149,7 +187,7 @@ def validate(path, type: nil) end end begin - validate_str(File.read(path.to_s), type:) + validate_str(File.read(path.to_s), type:, schema_path:) rescue Psych::SyntaxError => e warn "While parsing #{path}" raise e diff --git a/schemas/arch_schema.json b/schemas/arch_schema.json index ae129b75b..63de02d59 100644 --- a/schemas/arch_schema.json +++ b/schemas/arch_schema.json @@ -14,7 +14,7 @@ ], "properties": { "params": { - "$ref": "config_schema.json#/$defs/params" + "type": "object" }, "implemented_extensions": { "description": "Extensions implemented by this architecture", diff --git a/schemas/config_schema.json b/schemas/config_schema.json index af62d58c4..eee7cad0a 100644 --- a/schemas/config_schema.json +++ b/schemas/config_schema.json @@ -540,13 +540,6 @@ ], "additionalItems": false } - }, - "hpm_events": { - "type": "array", - "items": { - "type": "string", - "description": "Event name" - } } } } diff --git a/schemas/ext_schema.json b/schemas/ext_schema.json index fb09359df..2cb953678 100644 --- a/schemas/ext_schema.json +++ b/schemas/ext_schema.json @@ -2,6 +2,24 @@ "$schema": "http://json-schema.org/draft-07/schema#", "$defs": { + "param_data": { + "type": "object", + "required": ["description", "schema"], + "properties": { + "description": { + "type": "string", + "description": "Parameter description, including list of valid values" + }, + "schema": { + "$ref": "https://json-schema.org/draft-07/schema#" + }, + "extra_validation": { + "description": "Ruby code to perform extra validation, when it is not easily expressed with JSON Schema (_e.g._, because it depends on the value of another parameter)", + "type": "string" + } + }, + "additionalProperties": false + }, "ext_data": { "type": "object", "required": ["description", "long_name", "versions"], @@ -156,7 +174,12 @@ "type": "integer" }, "name": { - "type": "string" + "type": "string", + "description": "Long-form name (can have special characters)" + }, + "var": { + "type": "string", + "description": "Field name for the InterruptCode enum in IDL" } }, "additionalProperties": false @@ -172,11 +195,25 @@ "type": "integer" }, "name": { - "type": "string" + "type": "string", + "description": "Long-form name (can have special characters)" + }, + "var": { + "type": "string", + "description": "Field name for the InterruptCode enum in IDL" } }, "additionalProperties": false } + }, + "params": { + "type": "object", + "patternProperties": { + "^[A-Z][A-Z_0-9]*$": { + "$ref": "#/$defs/param_data" + } + }, + "additionalProperties": false } }, "additionalProperties": false diff --git a/schemas/implemented_exts_schema.json b/schemas/implemented_exts_schema.json new file mode 100644 index 000000000..5ef1ddf62 --- /dev/null +++ b/schemas/implemented_exts_schema.json @@ -0,0 +1,12 @@ +{ + "type": "object", + "properties": { + "implemented_extensions": { + "type": "array", + "items": { + "$ref": "schema_defs.json#/$defs/extension_name_and_version" + } + } + }, + "additionalProperties": false +}