From bda7ade315491994062855a0cdb6da3f39698674 Mon Sep 17 00:00:00 2001 From: Tariq Kurd Date: Tue, 27 Feb 2024 22:07:38 +0100 Subject: [PATCH] fix C.MODESW encoding so it doesn't overlap C.SUBW (#137) I've changed this to the intended encoding, which is already in riscv-opcodes (https://github.com/riscv/riscv-opcodes/pull/214). The previous one was a typo and conflicted with c.subw. --- src/insns/wavedrom/modesw_16bit.adoc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/insns/wavedrom/modesw_16bit.adoc b/src/insns/wavedrom/modesw_16bit.adoc index cef9d37b..842e7e31 100644 --- a/src/insns/wavedrom/modesw_16bit.adoc +++ b/src/insns/wavedrom/modesw_16bit.adoc @@ -5,7 +5,7 @@ {reg:[ { bits: 2, name: 0x1, attr: ['2', 'C1=1'] }, { bits: 3, name: 0x7, attr: ['3', 'C.MODESW'] }, - { bits: 2, name: 0x0, attr: ['2', 'FUNCT2'] }, + { bits: 2, name: 0x3, attr: ['2', 'FUNCT2'] }, { bits: 3, name: 0x0, attr: ['3', 'FUNCT3'] }, { bits: 3, name: 0x7, attr: ['3', 'FUNCT3'] }, { bits: 3, name: 0x4, attr: ['3', 'FUNCT3'] },