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allegro-micro.lbr
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allegro-micro.lbr
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<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="7.7.0">
<drawing>
<settings>
<setting alwaysvectorfont="no"/>
<setting verticaltext="up"/>
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<library>
<description><b>Allegro Micro</b><p>
<p>THIS LIBRARY IS PROVIDED AS IS AND WITHOUT WARRANTY OF ANY KIND, EXPRESSED OR IMPLIED.<br>
USE AT YOUR OWN RISK!<p>
<author>Copyright (C) 2008, Bob Starr<br> http://www.bob-starr.com<br></author></description>
<packages>
<package name="CB-PFF">
<description><b>Alegro ACS750XCA</b><p> Package CA</description>
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<package name="CB-PFF_DRC">
<description><b>Alegro ACS750XCA</b><p> layout only package to avoid DRC errors.</description>
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<package name="DIL16">
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<package name="SO08">
<description><b>SMALL OUTLINE INTEGRATED CIRCUIT</b><p>
body 3.9 mm/JEDEC MS-012AA</description>
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<package name="SO16W">
<description><b>SMALL OUTLINE INTEGRATED CIRCUIT</b><p>
wide body 7.5 mm/JEDEC MS-013AA</description>
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<wire x1="12.7" y1="-15.24" x2="12.7" y2="15.24" width="0.4064" layer="94"/>
<wire x1="12.7" y1="15.24" x2="-12.7" y2="15.24" width="0.4064" layer="94"/>
<wire x1="-12.7" y1="15.24" x2="-12.7" y2="-15.24" width="0.4064" layer="94"/>
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<pin name="SENSE1" x="-17.78" y="-2.54" length="middle" direction="out"/>
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<pin name="GND1" x="-17.78" y="-12.7" visible="off" length="middle" direction="pwr"/>
<pin name="RC" x="17.78" y="-12.7" length="middle" rot="R180"/>
<pin name="VMOT" x="17.78" y="10.16" length="middle" direction="pwr" rot="R180"/>
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<symbol name="ACS712/ACS713">
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<wire x1="-10.16" y1="10.16" x2="-10.16" y2="-10.16" width="0.4064" layer="94"/>
<text x="-10.16" y="10.795" size="1.778" layer="95">>NAME</text>
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<pin name="VIOUT" x="15.24" y="2.54" length="middle" direction="out" rot="R180"/>
<pin name="IP-" x="-15.24" y="-2.54" length="middle" direction="pas"/>
<pin name="FILTER" x="15.24" y="-2.54" length="middle" direction="pas" rot="R180"/>
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<pin name="IP+" x="-15.24" y="5.08" length="middle" direction="pas"/>
<pin name="VCC" x="15.24" y="7.62" length="middle" direction="pwr" rot="R180"/>
<pin name="IP+@2" x="-15.24" y="2.54" visible="pad" length="middle" direction="pas"/>
</symbol>
<symbol name="ACS750XCA">
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<wire x1="-7.62" y1="-5.08" x2="7.62" y2="-5.08" width="0.4064" layer="94"/>
<wire x1="7.62" y1="-5.08" x2="7.62" y2="5.08" width="0.4064" layer="94"/>
<wire x1="7.62" y1="5.08" x2="-7.62" y2="5.08" width="0.4064" layer="94"/>
<text x="5.08" y="6.35" size="1.778" layer="95" font="vector">>NAME</text>
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<text x="1.27" y="-3.81" size="1.27" layer="95" ratio="10">GND</text>
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<pin name="VCC" x="2.54" y="7.62" visible="pad" length="short" direction="pwr" rot="R270"/>
<pin name="GND" x="2.54" y="-7.62" visible="pad" length="short" direction="pwr" rot="R90"/>
<pin name="OUTPUT" x="10.16" y="0" visible="pad" length="short" direction="out" rot="R180"/>
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</symbols>
<devicesets>
<deviceset name="A3966S" prefix="U">
<description><b>PWM MOTOR DRIVER</b><p> Dual Full-Bridge PWM Motor Driver</description>
<gates>
<gate name="G$1" symbol="A3966" x="0" y="0"/>
</gates>
<devices>
<device name="A" package="DIL16">
<connects>
<connect gate="G$1" pin="EN1" pad="3"/>
<connect gate="G$1" pin="EN2" pad="14"/>
<connect gate="G$1" pin="GND" pad="4"/>
<connect gate="G$1" pin="GND1" pad="13"/>
<connect gate="G$1" pin="OUT1A" pad="1"/>
<connect gate="G$1" pin="OUT1B" pad="6"/>
<connect gate="G$1" pin="OUT2A" pad="16"/>
<connect gate="G$1" pin="OUT2B" pad="11"/>
<connect gate="G$1" pin="PHASE1" pad="2"/>
<connect gate="G$1" pin="PHASE2" pad="15"/>
<connect gate="G$1" pin="RC" pad="9"/>
<connect gate="G$1" pin="SENSE1" pad="5"/>
<connect gate="G$1" pin="SENSE2" pad="12"/>
<connect gate="G$1" pin="VCC" pad="10"/>
<connect gate="G$1" pin="VMOT" pad="7"/>
<connect gate="G$1" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="LB" package="SO16W">
<connects>
<connect gate="G$1" pin="EN1" pad="3"/>
<connect gate="G$1" pin="EN2" pad="14"/>
<connect gate="G$1" pin="GND" pad="4"/>
<connect gate="G$1" pin="GND1" pad="13"/>
<connect gate="G$1" pin="OUT1A" pad="1"/>
<connect gate="G$1" pin="OUT1B" pad="6"/>
<connect gate="G$1" pin="OUT2A" pad="16"/>
<connect gate="G$1" pin="OUT2B" pad="11"/>
<connect gate="G$1" pin="PHASE1" pad="2"/>
<connect gate="G$1" pin="PHASE2" pad="15"/>
<connect gate="G$1" pin="RC" pad="9"/>
<connect gate="G$1" pin="SENSE1" pad="5"/>
<connect gate="G$1" pin="SENSE2" pad="12"/>
<connect gate="G$1" pin="VCC" pad="10"/>
<connect gate="G$1" pin="VMOT" pad="7"/>
<connect gate="G$1" pin="VREF" pad="8"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ACS712" prefix="U">
<description><b>Linear Current Sensor</b><p>
Fully Integrated, Hall Effect-Based<br>
2.1 kVRMS Voltage Isolation and a Low-Resistance Current Conductor</description>
<gates>
<gate name="G$1" symbol="ACS712/ACS713" x="0" y="0"/>
</gates>
<devices>
<device name="LC" package="SO08">
<connects>
<connect gate="G$1" pin="FILTER" pad="6"/>
<connect gate="G$1" pin="GND" pad="5"/>
<connect gate="G$1" pin="IP+" pad="1"/>
<connect gate="G$1" pin="IP+@2" pad="2"/>
<connect gate="G$1" pin="IP-" pad="3"/>
<connect gate="G$1" pin="IP-@4" pad="4"/>
<connect gate="G$1" pin="VCC" pad="8"/>
<connect gate="G$1" pin="VIOUT" pad="7"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ACS750XCA" prefix="U">
<description><B>Allegro Current Sensor</b></description>
<gates>
<gate name="G$1" symbol="ACS750XCA" x="0" y="0"/>
</gates>
<devices>
<device name="" package="CB-PFF">
<connects>
<connect gate="G$1" pin="GND" pad="2"/>
<connect gate="G$1" pin="IP+" pad="4"/>
<connect gate="G$1" pin="IP-" pad="5"/>
<connect gate="G$1" pin="OUTPUT" pad="3"/>
<connect gate="G$1" pin="VCC" pad="1"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="-DRC" package="CB-PFF_DRC">
<connects>
<connect gate="G$1" pin="GND" pad="2"/>
<connect gate="G$1" pin="IP+" pad="4"/>
<connect gate="G$1" pin="IP-" pad="5"/>
<connect gate="G$1" pin="OUTPUT" pad="3"/>
<connect gate="G$1" pin="VCC" pad="1"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="ACS713" prefix="U">
<description><b>Linear Current Sensor</b><p>
Fully Integrated, Hall Effect-Based<br>
2.1 kVRMS Voltage Isolation and a Low-Resistance Current Conductor</description>
<gates>
<gate name="G$1" symbol="ACS712/ACS713" x="0" y="0"/>
</gates>
<devices>
<device name="LC" package="SO08">
<connects>
<connect gate="G$1" pin="FILTER" pad="6"/>
<connect gate="G$1" pin="GND" pad="5"/>
<connect gate="G$1" pin="IP+" pad="1"/>
<connect gate="G$1" pin="IP+@2" pad="2"/>
<connect gate="G$1" pin="IP-" pad="3"/>
<connect gate="G$1" pin="IP-@4" pad="4"/>
<connect gate="G$1" pin="VCC" pad="8"/>
<connect gate="G$1" pin="VIOUT" pad="7"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>