PCB idea

[oscarpeters]

Hi, I have looked at the design and found some improvements if I may :)

Does your manufacturer introduce extra costs for your Via construction? because the annular ring of some of your via's are less than 0.25mm from the hole size.

other improvements:

Could make this a 3v3 plane:

lastly when making large quantities of these boards and maximum throughput from the pcb fab, I should no go further than 90 degress with copper traces, in these corners ething fluid can ingress and over time ruin the track.

[C44Supra]

JLC used to have a minimum annular ring of 0.3mm on the small run proto orders but has moved down to .13mm for 1oz and .2mm for 2oz copper. Those numbers vary however from manufacturer to manufacturer, and larger batch runs typically grant you as the designer some extra freedom.

As for the acid trap thing, that hasn't been an issue for a few decades anymore, especially in professionally manufactured PCBs. If you're diying with etchant, try adding a bubbler and possibly rotating the pcbs during etching.

[oscarpeters]

Most other manufactures add extra costs of having an annular ring smaller than 0,25. The yield will be less the smaller the annular ring will be.

[C44Supra]

Not really. It's just a more involved process on 4 (or more) layer boards and little by little those processes are made available to lower count production runs too. Heck, can even get 4 layer boards at JLC for the price of a cheeseburger these days.

[oscarpeters]

Have you used other manufactures then jlc?

[robin7331]

Hey @oscarpeters and @C44Supra,

So far I had no problems (or a higher fee) due to anything related to the PCB design.
Also the development of this very first release is done. Meaning I am not planning on doing any additional EMI testing for this revision. That means I'll not change anything on the design if not super cricital.

I highly appreciate your input and I'll leave this issue open until I am working on a new revision of this board.