The critical_section implementation is wrong

[Tnze]

These two lines is not atomic and will cause problems

riscv/src/critical_section.rs

Lines 11 to 13 in d9c6076

	let was_active = mstatus::read().mie();
	interrupt::disable();
	was_active

and could be replaced by a single csr instruction:

let mut mstatus: usize;
asm!("csrrci {}, 0x300, 0b100", out(reg) mstatus);
core::mem::transmute::<_, Mstatus>(mstatus).mie()

which prevents from being interrupted between reading status and disabling interrupt.

[Tnze]

To prevent from using core::mem::transmute, we should make the Mstatus.bits public and then:

let mut mstatus: Mstatus;
asm!("csrrci {}, 0x300, 0b100", out(reg) mstatus.bits);
mstatus.mie()

[almindor]

Good find. Thanks, pushed PR, please review. I've decided to keep the bits pub(crate) only to not break the API

[almindor]

Hmm actually we can't make the Mstatus::bits pub(crate) since it'd allow instantiation which leads to UB.