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[FIX] Fix bcm pl011 UART
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Using the PL011 as uart for data did not work:
-Enabling FIFO as no irqs are raised otherwise
-Added required interrupts
-Fixing incorrect irq disable
-Fixing typo
Signed-off-by: Felix Schladt <[email protected]>
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FelixSchladt committed Sep 1, 2023
1 parent dba244d commit 1e2a8ac
Showing 1 changed file with 13 additions and 10 deletions.
23 changes: 13 additions & 10 deletions libplatsupport/src/mach/bcm/pl011_uart.c
Original file line number Diff line number Diff line change
Expand Up @@ -61,6 +61,8 @@ pl011_regs_t;
/* IMSC register */
#define IMSC_RXIM BIT(4)
#define IMSC_TXIM BIT(5)
#define IMSC_RTIM BIT(6)
#define IMSC_OEIM BIT(10)

/* ICR register */
#define ICR_RXIC BIT(4)
Expand Down Expand Up @@ -96,16 +98,18 @@ static inline void pl011_uart_disable_fifo(ps_chardevice_t *dev)
r->lcrh &= ~LCRH_FEN;
}

static inline void pl011_uart_enable_rx_irq(ps_chardevice_t *dev)
static inline void pl011_uart_enable_irqs(ps_chardevice_t *dev)
{
pl011_regs_t *r = pl011_uart_get_priv(dev);
r->imsc |= IMSC_RXIM;
r->imsc |= IMSC_RTIM;
r->imsc |= IMSC_OEIM;
}

static inline void pl011_uart_disable_rx_irq(ps_chardevice_t *dev)
static inline void pl011_uart_disable_irqs(ps_chardevice_t *dev)
{
pl011_regs_t *r = pl011_uart_get_priv(dev);
r->imsc &= ~IMSC_RXIM;
r->imsc = 0;
}

static inline void pl011_uart_wait_busy(ps_chardevice_t *dev)
Expand All @@ -128,7 +132,7 @@ static int pl011_uart_cr_configure(ps_chardevice_t *dev)
uint32_t val = r->cr;

val |= CR_TXE; // Transmit enable
val |= CR_RXE; // Teceive enable
val |= CR_RXE; // Receive enable

r->cr = val;

Expand Down Expand Up @@ -193,8 +197,7 @@ static int pl011_uart_configure(ps_chardevice_t *dev)
pl011_uart_disable(dev);

// Disable RX/all interrupts
//pl011_uart_disable_rx_irq(dev);
r->imsc = 0x7f1;
pl011_uart_disable_irqs(dev);

// Wait till UART is not busy anymore
pl011_uart_wait_busy(dev);
Expand Down Expand Up @@ -227,14 +230,14 @@ static int pl011_uart_configure(ps_chardevice_t *dev)
*
*/
// Enable FIFO
//pl011_uart_enable_fifo(dev);
pl011_uart_enable_fifo(dev);

// Enable RX interrupt
pl011_uart_enable_irqs(dev);

// Enable UART
pl011_uart_enable(dev);

// Enable RX interrupt
pl011_uart_enable_rx_irq(dev);

return 0;
}

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