BB_SYSTEM.map.smsg

Warning (10268): Verilog HDL information at max7219_ctrl.v(154): always construct contains both blocking and non-blocking assignments File: C:/Users/FELIX/Desktop/Universidad/Segundo semestre/Sistemas Electronicos Digitales/Proyecto 1/Final_Definitivo/Final con Monedas/rtl/max7219_ctrl.v Line: 154
Info (10281): Verilog HDL Declaration information at max7219_ctrl.v(21): object "intensity" differs only in case from object "INTENSITY" in the same scope File: C:/Users/FELIX/Desktop/Universidad/Segundo semestre/Sistemas Electronicos Digitales/Proyecto 1/Final_Definitivo/Final con Monedas/rtl/max7219_ctrl.v Line: 21