diff --git a/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch b/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch index 169120a87..a06389464 100644 --- a/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch +++ b/recipes-bsp/u-boot/files/0001-Watchdog-Support-WDIOF_CARDRESET-on-TI-AM65x-platfor.patch @@ -13,7 +13,7 @@ Signed-off-by: Li Hua Qian 1 file changed, 11 insertions(+) diff --git a/arch/arm/dts/k3-am65-iot2050-common.dtsi b/arch/arm/dts/k3-am65-iot2050-common.dtsi -index 65da226847f..b6135b849f1 100644 +index 65da226847f4..b6135b849f1a 100644 --- a/arch/arm/dts/k3-am65-iot2050-common.dtsi +++ b/arch/arm/dts/k3-am65-iot2050-common.dtsi @@ -64,6 +64,12 @@ diff --git a/recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch b/recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch index 4c01c51f6..34430636f 100644 --- a/recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch +++ b/recipes-bsp/u-boot/files/0002-tools-iot2050-sign-fw.sh-Make-localization-of-tools-.patch @@ -12,7 +12,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/tools/iot2050-sign-fw.sh b/tools/iot2050-sign-fw.sh -index 6b426c854c2..75ffd560823 100755 +index 6b426c854c20..75ffd560823c 100755 --- a/tools/iot2050-sign-fw.sh +++ b/tools/iot2050-sign-fw.sh @@ -5,6 +5,8 @@ if [ -z "$1" ]; then diff --git a/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch b/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch index 5154426ba..31dbc9197 100644 --- a/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch +++ b/recipes-bsp/u-boot/files/0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch @@ -13,7 +13,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c -index 15f5310c7bf..e35e55fb5de 100644 +index 15f5310c7bf3..e35e55fb5de8 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -160,7 +160,7 @@ static bool board_is_sr1(void) diff --git a/recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch b/recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch index affdc245e..0d89364db 100644 --- a/recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch +++ b/recipes-bsp/u-boot/files/0004-board-siemens-iot2050-Fix-M.2-detection.patch @@ -20,7 +20,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c -index e35e55fb5de..0b0686e2628 100644 +index e35e55fb5de8..0b0686e2628b 100644 --- a/board/siemens/iot2050/board.c +++ b/board/siemens/iot2050/board.c @@ -155,19 +155,20 @@ static bool board_is_advanced(void) diff --git a/recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch b/recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch index 02ca5f471..91994f66a 100644 --- a/recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch +++ b/recipes-bsp/u-boot/files/0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch @@ -14,7 +14,7 @@ Reviewed-by: Heinrich Schuchardt 1 file changed, 9 insertions(+) diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h -index 4968722d18f..94a9c767882 100644 +index 4968722d18f6..94a9c7678825 100644 --- a/include/configs/iot2050.h +++ b/include/configs/iot2050.h @@ -15,6 +15,15 @@ diff --git a/recipes-bsp/u-boot/files/0006-board-siemens-iot2050-Fix-coding-style.patch b/recipes-bsp/u-boot/files/0006-board-siemens-iot2050-Fix-coding-style.patch new file mode 100644 index 000000000..3a7ec4fac --- /dev/null +++ b/recipes-bsp/u-boot/files/0006-board-siemens-iot2050-Fix-coding-style.patch @@ -0,0 +1,25 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Fri, 1 Dec 2023 19:43:28 +0800 +Subject: [PATCH] board: siemens: iot2050: Fix coding style + +Add a space after the 'if' + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index 0b0686e2628b..1fa71f8da6a4 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -220,7 +220,7 @@ void set_board_info_env(void) + if (board_is_advanced()) { + if (board_is_pg1()) + fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; +- else if(board_is_m2()) ++ else if (board_is_m2()) + fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; + else + fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; diff --git a/recipes-bsp/u-boot/files/0007-board-siemens-iot2050-Control-pcie-power-for-all-var.patch b/recipes-bsp/u-boot/files/0007-board-siemens-iot2050-Control-pcie-power-for-all-var.patch new file mode 100644 index 000000000..efc900256 --- /dev/null +++ b/recipes-bsp/u-boot/files/0007-board-siemens-iot2050-Control-pcie-power-for-all-var.patch @@ -0,0 +1,51 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:01:48 +0800 +Subject: [PATCH] board: siemens: iot2050: Control pcie power for all variants + +The power control pin of pcie interface not only works for M.2 interface +but also for miniPCIE, so promote this logic to all variants to +workaround the module hang issue. + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 12 ++++++++---- + 1 file changed, 8 insertions(+), 4 deletions(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index 1fa71f8da6a4..b83d5f8669e8 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -185,6 +185,12 @@ static void remove_mmc1_target(void) + free(boot_targets); + } + ++static void enable_pcie_connector_power(void) ++{ ++ set_pinvalue("gpio@601000_17", "P3V3_PCIE_CON_EN", 1); ++ udelay(4 * 100); ++} ++ + void set_board_info_env(void) + { + struct iot2050_info *info = IOT2050_INFO_DATA; +@@ -288,10 +294,6 @@ static void m2_connector_setup(void) + struct m2_config_pins config_pins; + unsigned int n; + +- /* enable M.2 connector power */ +- set_pinvalue("gpio@601000_17", "P3V3_M2_EN", 1); +- udelay(4 * 100); +- + if (m2_manual_config < CONNECTOR_MODE_INVALID) { + mode_info = " [manual mode]"; + connector_mode = m2_manual_config; +@@ -429,6 +431,8 @@ int board_late_init(void) + /* change CTRL_MMR register to let serdes0 not output USB3.0 signals. */ + writel(0x3, SERDES0_LANE_SELECT); + ++ enable_pcie_connector_power(); ++ + if (board_is_m2()) + m2_connector_setup(); + diff --git a/recipes-bsp/u-boot/files/0008-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch b/recipes-bsp/u-boot/files/0008-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch new file mode 100644 index 000000000..71454aa97 --- /dev/null +++ b/recipes-bsp/u-boot/files/0008-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch @@ -0,0 +1,119 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:16:15 +0800 +Subject: [PATCH] board: siemens: iot2050: Pass DDR size from FSBL + +Due to new DDR size introduction, the current logic of determining the +DDR size is not able to get the correct size. + +Instead, the DDR size is determined by the FSBL(SEBOOT) then passed to +u-boot through the scratchpad info. + +The SEBoot version must be >= D/V01.04.0x.0x to support this change. + +Also now for some variants, the DDR size may > 2GB, so borrow some code +from the TI evm to iot2050 to support more than 2GB DDR. + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 39 ++++++++++++++++++++++++++--------- + doc/board/siemens/iot2050.rst | 5 +++++ + include/configs/iot2050.h | 3 +++ + 3 files changed, 37 insertions(+), 10 deletions(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index b83d5f8669e8..d6228b9bd26b 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -38,6 +38,8 @@ struct iot2050_info { + u8 mac_addr_cnt; + u8 mac_addr[8][ARP_HLEN]; + char seboot_version[40 + 1]; ++ u8 padding[3]; ++ u32 ddr_size_mb; + } __packed; + + /* +@@ -341,25 +343,42 @@ int board_init(void) + + int dram_init(void) + { +- if (board_is_advanced()) +- gd->ram_size = SZ_2G; +- else +- gd->ram_size = SZ_1G; ++ struct iot2050_info *info = IOT2050_INFO_DATA; ++ gd->ram_size = ((phys_size_t)(info->ddr_size_mb)) << 20; + + return 0; + } + ++ulong board_get_usable_ram_top(ulong total_size) ++{ ++ /* Limit RAM used by U-Boot to the DDR low region */ ++ if (gd->ram_top > 0x100000000) ++ return 0x100000000; ++ ++ return gd->ram_top; ++} ++ + int dram_init_banksize(void) + { + dram_init(); + +- /* Bank 0 declares the memory available in the DDR low region */ +- gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; +- gd->bd->bi_dram[0].size = gd->ram_size; ++ if (gd->ram_size > SZ_2G) { ++ /* Bank 0 declares the memory available in the DDR low region */ ++ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; ++ gd->bd->bi_dram[0].size = SZ_2G; ++ ++ /* Bank 1 declares the memory available in the DDR high region */ ++ gd->bd->bi_dram[1].start = CFG_SYS_SDRAM_BASE1; ++ gd->bd->bi_dram[1].size = gd->ram_size - SZ_2G; ++ } else { ++ /* Bank 0 declares the memory available in the DDR low region */ ++ gd->bd->bi_dram[0].start = CFG_SYS_SDRAM_BASE; ++ gd->bd->bi_dram[0].size = gd->ram_size; + +- /* Bank 1 declares the memory available in the DDR high region */ +- gd->bd->bi_dram[1].start = 0; +- gd->bd->bi_dram[1].size = 0; ++ /* Bank 1 declares the memory available in the DDR high region */ ++ gd->bd->bi_dram[1].start = 0; ++ gd->bd->bi_dram[1].size = 0; ++ } + + return 0; + } +diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst +index ee3c5c958464..c6bb06750584 100644 +--- a/doc/board/siemens/iot2050.rst ++++ b/doc/board/siemens/iot2050.rst +@@ -29,6 +29,11 @@ The following binaries from that source need to be present in the build folder: + - seboot_pg1.bin + - seboot_pg2.bin + ++Starting from SE-Boot D/V01.04.0x.0x, the DDR size is passed from the SE-Boot to ++the u-boot, this is not compatible with the old version u-boot (<=2023.10) ++anymore. Make sure to use the latest u-boot version, or version contains the ++commit "board: siemens: iot2050: Pass DDR size from FSBL". ++ + When using the watchdog, a related firmware for the R5 core(s) is needed, e.g. + https://github.com/siemens/k3-rti-wdt. The name and location of the image is + configured via CONFIG_WDT_K3_RTI_FW_FILE. +diff --git a/include/configs/iot2050.h b/include/configs/iot2050.h +index 94a9c7678825..5e97ea0d9438 100644 +--- a/include/configs/iot2050.h ++++ b/include/configs/iot2050.h +@@ -24,6 +24,9 @@ + func(USB, usb, 2) + #endif + ++/* DDR Configuration */ ++#define CFG_SYS_SDRAM_BASE1 0x880000000 ++ + /* + * This defines all MMC devices, even if the basic variant has no mmc1. + * The non-supported device will be removed from the boot targets during diff --git a/recipes-bsp/u-boot/files/0009-board-siemens-iot2050-Generalize-the-fdt-fixup.patch b/recipes-bsp/u-boot/files/0009-board-siemens-iot2050-Generalize-the-fdt-fixup.patch new file mode 100644 index 000000000..a8091165f --- /dev/null +++ b/recipes-bsp/u-boot/files/0009-board-siemens-iot2050-Generalize-the-fdt-fixup.patch @@ -0,0 +1,111 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:29:12 +0800 +Subject: [PATCH] board: siemens: iot2050: Generalize the fdt fixup + +The fdt fixup logic actually also applies to other possible variants who +also have device tree overlays. So generalize this part by extracting +it from the m.2 specific function and make it a standalone one. + +Since now we only have M.2 variant consuming the overlay, it may not +have immediate effect for other variant, however this makes the future +variant more easier to apply fdt fixups. + +Signed-off-by: Baocheng Su +--- + board/siemens/iot2050/board.c | 32 +++++++++++++++++++------------- + doc/board/siemens/iot2050.rst | 7 +++++++ + 2 files changed, 26 insertions(+), 13 deletions(-) + +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index d6228b9bd26b..32f5280125c0 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -245,23 +245,14 @@ void set_board_info_env(void) + env_save(); + } + +-static void m2_overlay_prepare(void) ++static void do_overlay_prepare(const char *overlay_path) + { + #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +- const char *overlay_path; + void *overlay; + u64 loadaddr; + ofnode node; + int ret; + +- if (connector_mode == BKEY_PCIEX2) +- return; +- +- if (connector_mode == BKEY_PCIE_EKEY_PCIE) +- overlay_path = "/fit-images/bkey-ekey-pcie-overlay"; +- else +- overlay_path = "/fit-images/bkey-usb3-overlay"; +- + node = ofnode_path(overlay_path); + if (!ofnode_valid(node)) + goto fit_error; +@@ -288,6 +279,21 @@ fit_error: + #endif + } + ++static void m2_overlay_prepare(void) ++{ ++ const char *overlay_path; ++ ++ if (connector_mode == BKEY_PCIEX2) ++ return; ++ ++ if (connector_mode == BKEY_PCIE_EKEY_PCIE) ++ overlay_path = "/fit-images/bkey-ekey-pcie-overlay"; ++ else ++ overlay_path = "/fit-images/bkey-usb3-overlay"; ++ ++ do_overlay_prepare(overlay_path); ++} ++ + static void m2_connector_setup(void) + { + ulong m2_manual_config = env_get_ulong("m2_manual_config", 10, +@@ -466,7 +472,7 @@ int board_late_init(void) + } + + #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +-static void m2_fdt_fixup(void *blob) ++static void variants_fdt_fixup(void *blob) + { + void *overlay_copy = NULL; + void *fdt_copy = NULL; +@@ -506,14 +512,14 @@ cleanup: + return; + + fixup_error: +- pr_err("Could not apply M.2 device tree overlay\n"); ++ pr_err("Could not apply device tree overlay\n"); + goto cleanup; + } + + int ft_board_setup(void *blob, struct bd_info *bd) + { + if (board_is_m2()) +- m2_fdt_fixup(blob); ++ variants_fdt_fixup(blob); + + return 0; + } +diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst +index c6bb06750584..21fb9d694ffe 100644 +--- a/doc/board/siemens/iot2050.rst ++++ b/doc/board/siemens/iot2050.rst +@@ -167,3 +167,10 @@ the U-Boot environment variable "m2_manual_config" to select the mode manually: + E-key: PCIe, USB 2.0 + "2" - B-key: USB 3.0, + E-key: PCIe, USB 2.0 ++ ++Device tree overlay fixup ++------------------------- ++ ++In rare cases, you may need to add your own device tree overlay, please take use ++of the **do_overlay_prepare** and **variants_fdt_fixup** from ++**board/siemens/iot2050/board.c** to add overlay fixup. diff --git a/recipes-bsp/u-boot/files/0010-dts-iot2050-Disable-R5-lockstep-for-all-PG2-boards.patch b/recipes-bsp/u-boot/files/0010-dts-iot2050-Disable-R5-lockstep-for-all-PG2-boards.patch new file mode 100644 index 000000000..3c94800e8 --- /dev/null +++ b/recipes-bsp/u-boot/files/0010-dts-iot2050-Disable-R5-lockstep-for-all-PG2-boards.patch @@ -0,0 +1,76 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Su Baocheng +Date: Wed, 13 Dec 2023 10:41:09 +0800 +Subject: [PATCH] dts: iot2050: Disable R5 lockstep for all PG2 boards + +The R5 lockstep disabling should be common for all PG2 boards, move it +from variants dts to common-pg2.dtsi. + +Signed-off-by: Su Baocheng +--- + arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi | 7 ++++++- + arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts | 5 ----- + arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts | 7 +------ + 3 files changed, 7 insertions(+), 12 deletions(-) + +diff --git a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi +index e73458ca6900..99310f1b56aa 100644 +--- a/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi ++++ b/arch/arm/dts/k3-am65-iot2050-common-pg2.dtsi +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2021 ++ * Copyright (c) Siemens AG, 2021-2023 + * + * Authors: + * Chao Zeng +@@ -9,6 +9,11 @@ + * Common bits of the IOT2050 Basic and Advanced variants, PG2 + */ + ++&mcu_r5fss0 { ++ /* lock-step mode not supported on PG2 boards */ ++ ti,cluster-mode = <0>; ++}; ++ + &main_pmx0 { + cp2102n_reset_pin_default: cp2102n-reset-pin-default { + pinctrl-single,pins = < +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts +index 9400e35882a6..9b31e4007787 100644 +--- a/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-m2.dts +@@ -21,11 +21,6 @@ + model = "SIMATIC IOT2050 Advanced M2"; + }; + +-&mcu_r5fss0 { +- /* lock-step mode not supported on this board */ +- ti,cluster-mode = <0>; +-}; +- + &main_pmx0 { + main_m2_enable_pins_default: main-m2-enable-pins-default { + pinctrl-single,pins = < +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts +index f00dc86d01b9..a8ce8c891894 100644 +--- a/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-pg2.dts +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2018-2021 ++ * Copyright (c) Siemens AG, 2018-2023 + * + * Authors: + * Le Jin +@@ -22,8 +22,3 @@ + compatible = "siemens,iot2050-advanced-pg2", "ti,am654"; + model = "SIMATIC IOT2050 Advanced PG2"; + }; +- +-&mcu_r5fss0 { +- /* lock-step mode not supported on this board */ +- ti,cluster-mode = <0>; +-}; diff --git a/recipes-bsp/u-boot/files/0011-dts-iot2050-Support-new-IOT2050-SM-variant.patch b/recipes-bsp/u-boot/files/0011-dts-iot2050-Support-new-IOT2050-SM-variant.patch new file mode 100644 index 000000000..35fb5340c --- /dev/null +++ b/recipes-bsp/u-boot/files/0011-dts-iot2050-Support-new-IOT2050-SM-variant.patch @@ -0,0 +1,469 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Baocheng Su +Date: Wed, 29 Nov 2023 23:35:51 +0800 +Subject: [PATCH] dts: iot2050: Support new IOT2050-SM variant + +the dts file for IOT2050-SM variant is copied from kernel side without +any change. + +Main differences between the new variant and Advanced PG2: + +1. Arduino interface is removed. Instead, an new ASIC is added for + communicating with PLC 1200 signal modules. +2. USB 3.0 type A connector is removed, only USB 2.0 type A connector is + avaiable. +3. DP interface is tailored down. Instead, to communicate with the + PLC 1200 signal modules, a USB 3.0 type B connector is added but the + signal is not USB. +4. DDR size is increased to 4 GB. +5. Two sensors are added, one tilt sensor and one light sensor. + +Signed-off-by: Baocheng Su +--- + arch/arm/dts/Makefile | 4 +- + arch/arm/dts/k3-am65-iot2050-boot-image.dtsi | 5 +- + .../k3-am6548-iot2050-advanced-sm-u-boot.dtsi | 1 + + .../arm/dts/k3-am6548-iot2050-advanced-sm.dts | 337 ++++++++++++++++++ + board/siemens/iot2050/board.c | 15 +- + doc/board/siemens/iot2050.rst | 4 +- + 6 files changed, 362 insertions(+), 4 deletions(-) + create mode 120000 arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi + create mode 100644 arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 85fd5b1157b1..0edd5b73a414 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -1316,7 +1316,9 @@ dtb-$(CONFIG_SOC_K3_AM654) += \ + k3-am6548-iot2050-advanced-pg2.dtb \ + k3-am6548-iot2050-advanced-m2.dtb \ + k3-am6548-iot2050-advanced-m2-bkey-usb3-overlay.dtbo \ +- k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo ++ k3-am6548-iot2050-advanced-m2-bkey-ekey-pcie-overlay.dtbo \ ++ k3-am6548-iot2050-advanced-sm.dtb ++ + dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \ + k3-j721e-r5-common-proc-board.dtb \ + k3-j7200-common-proc-board.dtb \ +diff --git a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi +index 64318d09cf0a..5d83109389cc 100644 +--- a/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi ++++ b/arch/arm/dts/k3-am65-iot2050-boot-image.dtsi +@@ -229,7 +229,10 @@ + }; + + fit@380000 { +- fit,fdt-list-val = "k3-am6528-iot2050-basic-pg2", "k3-am6548-iot2050-advanced-pg2", "k3-am6548-iot2050-advanced-m2"; ++ fit,fdt-list-val = "k3-am6528-iot2050-basic-pg2", ++ "k3-am6548-iot2050-advanced-pg2", ++ "k3-am6548-iot2050-advanced-m2", ++ "k3-am6548-iot2050-advanced-sm"; + + images { + bkey-usb3-overlay { +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi b/arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi +new file mode 120000 +index 000000000000..859776d3ffe1 +--- /dev/null ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-sm-u-boot.dtsi +@@ -0,0 +1 @@ ++k3-am6528-iot2050-basic-pg2-u-boot.dtsi +\ No newline at end of file +diff --git a/arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts b/arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts +new file mode 100644 +index 000000000000..8c97b6d47a13 +--- /dev/null ++++ b/arch/arm/dts/k3-am6548-iot2050-advanced-sm.dts +@@ -0,0 +1,337 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) Siemens AG, 2023 ++ * ++ * Authors: ++ * Baocheng Su ++ * Chao Zeng ++ * Huaqian Li ++ * ++ * AM6548-based (quad-core) IOT2050 SM variant, Product Generation 2 ++ * 4 GB RAM, 16 GB eMMC, USB-serial converter on connector X30 ++ * ++ * Product homepage: ++ * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html ++ */ ++ ++/dts-v1/; ++ ++#include "k3-am6548-iot2050-advanced-common.dtsi" ++#include "k3-am65-iot2050-common-pg2.dtsi" ++ ++/ { ++ compatible = "siemens,iot2050-advanced-sm", "ti,am654"; ++ model = "SIMATIC IOT2050 Advanced SM"; ++ ++ memory@80000000 { ++ device_type = "memory"; ++ /* 4G RAM */ ++ reg = <0x00000000 0x80000000 0x00000000 0x80000000>, ++ <0x00000008 0x80000000 0x00000000 0x80000000>; ++ }; ++ ++ aliases { ++ spi1 = &main_spi0; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_pins_default>, <&user1_led_pins>; ++ ++ user-led1-red { ++ gpios = <&wkup_gpio0 52 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ user-led1-green { ++ gpios = <&wkup_gpio0 53 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++}; ++ ++&main_pmx0 { ++ /delete-property/ pinctrl-names; ++ /delete-property/ pinctrl-0; ++ /delete-property/ pinctrl-1; ++ /delete-property/ pinctrl-2; ++ /delete-property/ pinctrl-3; ++ /delete-property/ pinctrl-4; ++ /delete-property/ pinctrl-5; ++ /delete-property/ pinctrl-6; ++ /delete-property/ pinctrl-7; ++ /delete-property/ pinctrl-8; ++ /delete-property/ pinctrl-9; ++ /delete-property/ pinctrl-10; ++ /delete-property/ pinctrl-11; ++ /delete-property/ pinctrl-12; ++ /delete-property/ pinctrl-13; ++ /delete-property/ pinctrl-14; ++ /delete-property/ pinctrl-15; ++ /delete-property/ pinctrl-16; ++ /delete-property/ pinctrl-17; ++ /delete-property/ pinctrl-18; ++ /delete-property/ pinctrl-19; ++ /delete-property/ pinctrl-20; ++ /delete-property/ pinctrl-21; ++ /delete-property/ pinctrl-22; ++ /delete-property/ pinctrl-23; ++ /delete-property/ pinctrl-24; ++ ++ main_pcie_enable_pins_default: main-pcie-enable-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01d8, PIN_OUTPUT, 7) /* (AH12) GPIO1_22 */ ++ >; ++ }; ++ ++ main_spi0_pins: main-spi0-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ ++ AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ ++ AM65X_IOPAD(0x01cc, PIN_INPUT, 0) /* (AD13) SPI0_D1 */ ++ AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ ++ >; ++ }; ++}; ++ ++&main_pmx1 { ++ asic_spi_mux_ctrl_pin: asic-spi-mux-ctrl-default-pins { ++ pinctrl-single,pins = < ++ AM65X_IOPAD(0x0010, PIN_OUTPUT, 7) /* (D21) GPIO1_86 */ ++ >; ++ }; ++}; ++ ++&wkup_pmx0 { ++ /delete-property/ pinctrl-names; ++ /delete-property/ pinctrl-0; ++ /delete-property/ pinctrl-1; ++ /delete-property/ pinctrl-2; ++ /delete-property/ pinctrl-3; ++ /delete-property/ pinctrl-4; ++ /delete-property/ pinctrl-5; ++ /delete-property/ pinctrl-6; ++ /delete-property/ pinctrl-7; ++ /delete-property/ pinctrl-8; ++ /delete-property/ pinctrl-9; ++ /delete-property/ pinctrl-10; ++ /delete-property/ pinctrl-11; ++ /delete-property/ pinctrl-12; ++ /delete-property/ pinctrl-13; ++ /delete-property/ pinctrl-14; ++ /delete-property/ pinctrl-15; ++ /delete-property/ pinctrl-16; ++ /delete-property/ pinctrl-17; ++ /delete-property/ pinctrl-18; ++ /delete-property/ pinctrl-19; ++ /delete-property/ pinctrl-20; ++ /delete-property/ pinctrl-21; ++ /delete-property/ pinctrl-22; ++ /delete-property/ pinctrl-23; ++ /delete-property/ pinctrl-24; ++ /delete-property/ pinctrl-25; ++ /delete-property/ pinctrl-26; ++ /delete-property/ pinctrl-27; ++ /delete-property/ pinctrl-28; ++ /delete-property/ pinctrl-29; ++ /delete-property/ pinctrl-30; ++ /delete-property/ pinctrl-31; ++ /delete-property/ pinctrl-32; ++ /delete-property/ pinctrl-33; ++ /delete-property/ pinctrl-34; ++ /delete-property/ pinctrl-35; ++ /delete-property/ pinctrl-36; ++ /delete-property/ pinctrl-37; ++ /delete-property/ pinctrl-38; ++ /delete-property/ pinctrl-39; ++ /delete-property/ pinctrl-40; ++ /delete-property/ pinctrl-41; ++ /delete-property/ pinctrl-42; ++ /delete-property/ pinctrl-43; ++ /delete-property/ pinctrl-44; ++ /delete-property/ pinctrl-45; ++ /delete-property/ pinctrl-46; ++ /delete-property/ pinctrl-47; ++ /delete-property/ pinctrl-48; ++ /delete-property/ pinctrl-49; ++ /delete-property/ pinctrl-50; ++ ++ user1_led_pins: user1-led-default-pins { ++ pinctrl-single,pins = < ++ /* (AB1) WKUP_UART0_RXD:WKUP_GPIO0_52, as USER 1 led red */ ++ AM65X_WKUP_IOPAD(0x00a0, PIN_OUTPUT, 7) ++ /* (AB5) WKUP_UART0_TXD:WKUP_GPIO0_53, as USER 1 led green */ ++ AM65X_WKUP_IOPAD(0x00a4, PIN_OUTPUT, 7) ++ >; ++ }; ++ ++ soc_asic_pins: soc-asic-default-pins { ++ pinctrl-single,pins = < ++ AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) /* (P4) WKUP_GPIO0_29 */ ++ AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) /* (P5) WKUP_GPIO0_30 */ ++ AM65X_WKUP_IOPAD(0x004c, PIN_INPUT, 7) /* (P1) WKUP_GPIO0_31 */ ++ >; ++ }; ++}; ++ ++&main_gpio0 { ++ gpio-line-names = "main_gpio0-base"; ++}; ++ ++&main_gpio1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&cp2102n_reset_pin_default>, ++ <&main_pcie_enable_pins_default>, ++ <&asic_spi_mux_ctrl_pin>; ++ gpio-line-names = ++ /* 0..9 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "", "", "", "CP2102N-RESET", "", "", "", "", "", ++ /* 30..39 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 40..49 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 50..59 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 60..69 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 70..79 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 80..86 */ ++ "", "", "", "", "", "", "ASIC-spi-mux-ctrl"; ++}; ++ ++&wkup_gpio0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = ++ <&push_button_pins_default>, ++ <&db9_com_mode_pins_default>, ++ <&soc_asic_pins>; ++ gpio-line-names = ++ /* 0..9 */ ++ "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", ++ "UART0-enable", "UART0-terminate", "", "WIFI-disable", ++ /* 10..19 */ ++ "", "", "", "", "", "", "", "", "", "", ++ /* 20..29 */ ++ "", "", "", "", "", "USER-button", "", "", "","ASIC-gpio-0", ++ /* 30..31 */ ++ "ASIC-gpio-1", "ASIC-gpio-2"; ++}; ++ ++&main_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_spi0_pins>; ++ ++ #address-cells = <1>; ++ #size-cells= <0>; ++ ++ spidev@0 { ++ compatible = "rohm,dh2228fv"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ }; ++}; ++ ++&mcu_spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mcu_spi0_pins_default>; ++}; ++ ++&main_i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&main_i2c3_pins_default>; ++ clock-frequency = <400000>; ++ ++ accelerometer: lsm6dso@6a { ++ compatible = "st,lsm6dso"; ++ reg = <0x6a>; ++ }; ++ ++ lightsensor: pm16d17@44 { ++ compatible = "everlight,pm16d17"; ++ reg = <0x44>; ++ ++ ps-gain = <1>; ++ ps-itime = "0.4"; ++ ps-wtime = "25"; ++ ps-ir-led-pulse-count = <1>; ++ }; ++ ++ /delete-node/ edp-bridge@f; ++}; ++ ++/delete-node/ &pcal9535_1; ++/delete-node/ &pcal9535_2; ++/delete-node/ &pcal9535_3; ++ ++&dss { ++ status = "disabled"; ++}; ++ ++&dss_ports { ++ /delete-node/ port@1; ++}; ++ ++&ecap0 { ++ status = "disabled"; ++}; ++ ++&mcu_uart0 { ++ status = "disabled"; ++}; ++ ++&tscadc1 { ++ status = "disabled"; ++}; ++ ++&serdes0 { ++ assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>; ++ assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>; ++}; ++ ++&serdes1 { ++ status = "disabled"; ++}; ++ ++&pcie0_rc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&minipcie_pins_default>; ++ ++ num-lanes = <1>; ++ phys = <&serdes0 PHY_TYPE_PCIE 1>; ++ phy-names = "pcie-phy0"; ++ reset-gpios = <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie0_ep { ++ status = "disabled"; ++}; ++ ++&pcie1_rc { ++ status = "disabled"; ++}; ++ ++&pcie1_ep { ++ status = "disabled"; ++}; ++ ++&dwc3_0 { ++ assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */ ++ <&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */ ++ /delete-property/ phys; ++ /delete-property/ phy-names; ++}; ++ ++&usb0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb0_pins_default>; ++ ++ maximum-speed = "high-speed"; ++ /delete-property/ snps,dis-u1-entry-quirk; ++ /delete-property/ snps,dis-u2-entry-quirk; ++}; +diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c +index 32f5280125c0..8497212ab890 100644 +--- a/board/siemens/iot2050/board.c ++++ b/board/siemens/iot2050/board.c +@@ -174,6 +174,14 @@ static bool board_is_m2(void) + strcmp((char *)info->name, "IOT2050-ADVANCED-M2") == 0; + } + ++static bool board_is_sm(void) ++{ ++ struct iot2050_info *info = IOT2050_INFO_DATA; ++ ++ return info->magic == IOT2050_INFO_MAGIC && ++ strcmp((char *)info->name, "IOT2050-ADVANCED-SM") == 0; ++} ++ + static void remove_mmc1_target(void) + { + char *boot_targets = strdup(env_get("boot_targets")); +@@ -189,7 +197,10 @@ static void remove_mmc1_target(void) + + static void enable_pcie_connector_power(void) + { +- set_pinvalue("gpio@601000_17", "P3V3_PCIE_CON_EN", 1); ++ if (board_is_sm()) ++ set_pinvalue("gpio@601000_22", "P3V3_PCIE_CON_EN", 1); ++ else ++ set_pinvalue("gpio@601000_17", "P3V3_PCIE_CON_EN", 1); + udelay(4 * 100); + } + +@@ -230,6 +241,8 @@ void set_board_info_env(void) + fdtfile = "ti/k3-am6548-iot2050-advanced.dtb"; + else if (board_is_m2()) + fdtfile = "ti/k3-am6548-iot2050-advanced-m2.dtb"; ++ else if (board_is_sm()) ++ fdtfile = "ti/k3-am6548-iot2050-advanced-sm.dtb"; + else + fdtfile = "ti/k3-am6548-iot2050-advanced-pg2.dtb"; + } else { +diff --git a/doc/board/siemens/iot2050.rst b/doc/board/siemens/iot2050.rst +index 21fb9d694ffe..0e30ad5a1027 100644 +--- a/doc/board/siemens/iot2050.rst ++++ b/doc/board/siemens/iot2050.rst +@@ -8,7 +8,9 @@ The SIMATIC IOT2050 is an open industrial IoT gateway that is using the TI + AM6528 GP (Basic variant) or the AM6548 HS (Advanced variant). The Advanced + variant is prepared for secure boot. M.2 Variant also uses the AM6548 HS. + Instead of a MiniPCI connector, it comes with two M.2 connectors and can +-support 5G/WIFI/BT applications or connect an SSD. ++support 5G/WIFI/BT applications or connect an SSD. Compared with the AM6548 ++Advanced variant, SM variant removes the Arduino interface, and adds a new ++ASIC for communicating with the PLC 1200 signal modules. + + The IOT2050 starts only from OSPI. It loads a Siemens-provided bootloader + called SE-Boot for the MCU domain (R5F cores), then hands over to ATF and diff --git a/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb b/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb index 9532f11f4..4f903ace1 100644 --- a/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb +++ b/recipes-bsp/u-boot/u-boot-iot2050_2023.10.bb @@ -17,6 +17,12 @@ SRC_URI += " \ file://0003-board-siemens-iot2050-Fix-logical-bug-in-PG1-PG2-det.patch \ file://0004-board-siemens-iot2050-Fix-M.2-detection.patch \ file://0005-iot2050-Allow-for-more-than-1-USB-storage-device.patch \ + file://0006-board-siemens-iot2050-Fix-coding-style.patch \ + file://0007-board-siemens-iot2050-Control-pcie-power-for-all-var.patch \ + file://0008-board-siemens-iot2050-Pass-DDR-size-from-FSBL.patch \ + file://0009-board-siemens-iot2050-Generalize-the-fdt-fixup.patch \ + file://0010-dts-iot2050-Disable-R5-lockstep-for-all-PG2-boards.patch \ + file://0011-dts-iot2050-Support-new-IOT2050-SM-variant.patch \ " SRC_URI[sha256sum] = "e00e6c6f014e046101739d08d06f328811cebcf5ae101348f409cbbd55ce6900"