diff --git a/recipes-app/mraa/files/0001-gpio-Fix-JS-binding-regarding-interrupt-injections.patch b/recipes-app/mraa/files/0001-gpio-Fix-JS-binding-regarding-interrupt-injections.patch index d8dc029b6..51b049534 100644 --- a/recipes-app/mraa/files/0001-gpio-Fix-JS-binding-regarding-interrupt-injections.patch +++ b/recipes-app/mraa/files/0001-gpio-Fix-JS-binding-regarding-interrupt-injections.patch @@ -20,7 +20,7 @@ Signed-off-by: Jan Kiszka 1 file changed, 21 insertions(+), 16 deletions(-) diff --git a/api/mraa/gpio.hpp b/api/mraa/gpio.hpp -index 8fc0881..c41d527 100644 +index 8fc08816217f..c41d52759376 100644 --- a/api/mraa/gpio.hpp +++ b/api/mraa/gpio.hpp @@ -31,10 +31,10 @@ diff --git a/recipes-app/mraa/files/0003-iot2050-add-debugfs-pinmux-support.patch b/recipes-app/mraa/files/0003-iot2050-add-debugfs-pinmux-support.patch index b363fe1bf..b76cb720b 100644 --- a/recipes-app/mraa/files/0003-iot2050-add-debugfs-pinmux-support.patch +++ b/recipes-app/mraa/files/0003-iot2050-add-debugfs-pinmux-support.patch @@ -17,12 +17,12 @@ Note: In case debugfs mux fails MRAA falls back to mmap mux. Signed-off-by: Benedikt Niedermayr --- - src/arm/siemens/iot2050.c | 547 ++++++++++++++++++++++++++++++++++++- + src/arm/siemens/iot2050.c | 548 ++++++++++++++++++++++++++++++++++++- src/arm/siemens/platform.c | 4 +- - 2 files changed, 540 insertions(+), 11 deletions(-) + 2 files changed, 541 insertions(+), 11 deletions(-) diff --git a/src/arm/siemens/iot2050.c b/src/arm/siemens/iot2050.c -index cec25faf0547..c63400d6b692 100644 +index cec25faf0547..c741875a2376 100644 --- a/src/arm/siemens/iot2050.c +++ b/src/arm/siemens/iot2050.c @@ -24,6 +24,7 @@ @@ -43,7 +43,7 @@ index cec25faf0547..c63400d6b692 100644 }regmux_info_t; static void *pinmux_instance = NULL; -@@ -75,30 +79,126 @@ iot2050_get_regmux_by_pinmap(int pinmap) +@@ -75,30 +79,127 @@ iot2050_get_regmux_by_pinmap(int pinmap) return NULL; } @@ -76,13 +76,14 @@ index cec25faf0547..c63400d6b692 100644 + + switch (gpio_mode) { + case MRAA_GPIO_PULLUP: -+ snprintf(mux, MRAA_PIN_NAME_SIZE, "%s-%s", group, "pullup"); ++ snprintf(mux, MRAA_PIN_NAME_SIZE, "%s-%s-pins", group, "pullup"); + break; + case MRAA_GPIO_PULLDOWN: -+ snprintf(mux, MRAA_PIN_NAME_SIZE, "%s-%s", group, "pulldown"); ++ snprintf(mux, MRAA_PIN_NAME_SIZE, "%s-%s-pins", group, "pulldown"); + break; + default: -+ strncpy(mux, group, MRAA_PIN_NAME_SIZE); ++ snprintf(mux, MRAA_PIN_NAME_SIZE, "%s-pins", group); ++ break; + } + + syslog(LOG_DEBUG, "iot2050: debugfs: group: %s, function: %s\n", mux, mux); @@ -176,7 +177,7 @@ index cec25faf0547..c63400d6b692 100644 } static mraa_result_t -@@ -172,7 +272,10 @@ iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) +@@ -172,7 +273,10 @@ iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) goto failed; } if(info) { @@ -188,7 +189,7 @@ index cec25faf0547..c63400d6b692 100644 } break; case MRAA_GPIO_PULLDOWN: -@@ -181,7 +284,9 @@ iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) +@@ -181,7 +285,9 @@ iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) goto failed; } if(info) { @@ -199,7 +200,7 @@ index cec25faf0547..c63400d6b692 100644 } break; case MRAA_GPIO_HIZ: -@@ -191,7 +296,9 @@ iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) +@@ -191,7 +297,9 @@ iot2050_gpio_mode_replace(mraa_gpio_context dev, mraa_gpio_mode_t mode) goto failed; } if(info) { @@ -210,7 +211,7 @@ index cec25faf0547..c63400d6b692 100644 } break; case MRAA_GPIOD_ACTIVE_LOW: -@@ -455,7 +562,7 @@ mraa_siemens_iot2050() +@@ -455,7 +563,7 @@ mraa_siemens_iot2050() free(b->adv_func); goto error; } @@ -219,7 +220,7 @@ index cec25faf0547..c63400d6b692 100644 /* IO */ iot2050_setup_pins(b, pin_index, "IO0", (mraa_pincapabilities_t) { -@@ -477,6 +584,27 @@ mraa_siemens_iot2050() +@@ -477,6 +585,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -247,7 +248,7 @@ index cec25faf0547..c63400d6b692 100644 } }); -@@ -510,6 +638,27 @@ mraa_siemens_iot2050() +@@ -510,6 +639,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -275,7 +276,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 30, d4201_gpio_base+1, d4202_gpio_base+1, NULL, 0); -@@ -542,6 +691,27 @@ mraa_siemens_iot2050() +@@ -542,6 +692,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -303,7 +304,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 31, d4201_gpio_base+2, d4202_gpio_base+2, NULL, 0); -@@ -574,6 +744,27 @@ mraa_siemens_iot2050() +@@ -574,6 +745,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -331,7 +332,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 33, d4201_gpio_base+3, d4202_gpio_base+3, NULL, 0); -@@ -606,6 +797,27 @@ mraa_siemens_iot2050() +@@ -606,6 +798,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ 5 /*PWM*/ @@ -359,7 +360,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, main_gpio0_chip, 33, d4201_gpio_base+4, d4202_gpio_base+4, NULL, 0); -@@ -638,6 +850,27 @@ mraa_siemens_iot2050() +@@ -638,6 +851,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ 5 /*PWM*/ @@ -387,7 +388,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, main_gpio0_chip, 35, d4201_gpio_base+5, d4202_gpio_base+5, NULL, 0); -@@ -670,6 +903,27 @@ mraa_siemens_iot2050() +@@ -670,6 +904,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ 5 /*PWM*/ @@ -415,7 +416,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, main_gpio0_chip, 38, d4201_gpio_base+6, d4202_gpio_base+6, NULL, 0); -@@ -702,6 +956,27 @@ mraa_siemens_iot2050() +@@ -702,6 +957,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ 5 /*PWM*/ @@ -443,7 +444,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, main_gpio0_chip, 43, d4201_gpio_base+7, d4202_gpio_base+7, NULL, 0); -@@ -734,6 +1009,27 @@ mraa_siemens_iot2050() +@@ -734,6 +1010,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ 5 /*PWM*/ @@ -471,7 +472,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, main_gpio0_chip, 48, d4201_gpio_base+8, d4202_gpio_base+8, NULL, 0); -@@ -766,6 +1062,27 @@ mraa_siemens_iot2050() +@@ -766,6 +1063,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ 5 /*PWM*/ @@ -499,7 +500,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, main_gpio0_chip, 51, d4201_gpio_base+9, d4202_gpio_base+9, NULL, 0); -@@ -798,6 +1115,27 @@ mraa_siemens_iot2050() +@@ -798,6 +1116,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ 0, /*SPI*/ -1 /*PWM*/ @@ -527,7 +528,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 51, d4201_gpio_base+10, d4202_gpio_base+10, NULL, 0); -@@ -830,6 +1168,27 @@ mraa_siemens_iot2050() +@@ -830,6 +1169,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ 0, /*SPI*/ -1 /*PWM*/ @@ -555,7 +556,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 49, d4201_gpio_base+11, d4202_gpio_base+11, NULL, 0); -@@ -862,6 +1221,27 @@ mraa_siemens_iot2050() +@@ -862,6 +1222,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ 0, /*SPI*/ -1 /*PWM*/ @@ -583,7 +584,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 50, d4201_gpio_base+12, d4202_gpio_base+12, NULL, 0); -@@ -894,6 +1274,27 @@ mraa_siemens_iot2050() +@@ -894,6 +1275,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ 0, /*SPI*/ -1 /*PWM*/ @@ -611,7 +612,7 @@ index cec25faf0547..c63400d6b692 100644 } }); iot2050_pin_add_gpio(b, pin_index, wkup_gpio0_chip, 48, d4201_gpio_base+13, d4202_gpio_base+13, NULL, 0); -@@ -926,6 +1327,27 @@ mraa_siemens_iot2050() +@@ -926,6 +1328,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -639,7 +640,7 @@ index cec25faf0547..c63400d6b692 100644 } }); mux_info[0].pin = d4200_gpio_base+8; -@@ -971,6 +1393,27 @@ mraa_siemens_iot2050() +@@ -971,6 +1394,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -667,7 +668,7 @@ index cec25faf0547..c63400d6b692 100644 } }); mux_info[0].pin = d4200_gpio_base+9; -@@ -1016,6 +1459,27 @@ mraa_siemens_iot2050() +@@ -1016,6 +1460,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -695,7 +696,7 @@ index cec25faf0547..c63400d6b692 100644 } }); mux_info[0].pin = d4200_gpio_base+10; -@@ -1061,6 +1525,27 @@ mraa_siemens_iot2050() +@@ -1061,6 +1526,27 @@ mraa_siemens_iot2050() -1, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -723,7 +724,7 @@ index cec25faf0547..c63400d6b692 100644 } }); mux_info[0].pin = d4200_gpio_base+11; -@@ -1106,6 +1591,27 @@ mraa_siemens_iot2050() +@@ -1106,6 +1592,27 @@ mraa_siemens_iot2050() 0, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ @@ -751,7 +752,7 @@ index cec25faf0547..c63400d6b692 100644 } }); mux_info[0].pin = d4200_gpio_base+12; -@@ -1169,6 +1675,27 @@ mraa_siemens_iot2050() +@@ -1169,6 +1676,27 @@ mraa_siemens_iot2050() 0, /*I2C*/ -1, /*SPI*/ -1 /*PWM*/ diff --git a/recipes-kernel/linux/files/patches-6.1/0004-arm64-dts-ti-k3-am65-Drop-bootargs.patch b/recipes-kernel/linux/files/patches-6.1/0004-arm64-dts-ti-k3-am65-Drop-bootargs.patch new file mode 100644 index 000000000..1bbb02285 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0004-arm64-dts-ti-k3-am65-Drop-bootargs.patch @@ -0,0 +1,48 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Nishanth Menon +Date: Wed, 19 Apr 2023 09:12:19 -0500 +Subject: [PATCH] arm64: dts: ti: k3-am65*: Drop bootargs + +Drop bootargs from the dts. earlycon is a debug property that should be +enabled only when debug is desired and not as default - see referenced +link on discussion on this topic. + +Cc: Jan Kiszka +Link: https://lore.kernel.org/linux-arm-kernel/81134eb9-2b7d-05bc-3035-a47f020861a8@linaro.org/ +Suggested-by: Krzysztof Kozlowski +Acked-by: Krzysztof Kozlowski +Reviewed-by: Roger Quadros +Signed-off-by: Nishanth Menon +Acked-by: Jan Kiszka +Link: https://lore.kernel.org/r/20230419141222.383567-3-nm@ti.com +Signed-off-by: Vignesh Raghavendra +[Commit da4159a77659 upstream] +--- + arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 1 - + arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 1 - + 2 files changed, 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +index 180bfb2a9ddf..9c936b7532b5 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +@@ -21,7 +21,6 @@ aliases { + + chosen { + stdout-path = "serial3:115200n8"; +- bootargs = "earlycon=ns16550a,mmio32,0x02810000"; + }; + + reserved-memory { +diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +index 5850582dd4ed..4444bf0fbca4 100644 +--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +@@ -15,7 +15,6 @@ / { + + chosen { + stdout-path = "serial2:115200n8"; +- bootargs = "earlycon=ns16550a,mmio32,0x02800000"; + }; + + memory@80000000 { diff --git a/recipes-kernel/linux/files/patches-6.1/0005-arm64-dts-ti-k3-am65-iot-Fixup-reference-to-phandles.patch b/recipes-kernel/linux/files/patches-6.1/0005-arm64-dts-ti-k3-am65-iot-Fixup-reference-to-phandles.patch new file mode 100644 index 000000000..afef5da53 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0005-arm64-dts-ti-k3-am65-iot-Fixup-reference-to-phandles.patch @@ -0,0 +1,95 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Nishanth Menon +Date: Tue, 6 Jun 2023 13:22:18 -0500 +Subject: [PATCH] arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles + array + +When referring to array of phandles, using <> to separate the array +entries is better notation as it makes potential errors with phandle and +cell arguments easier to catch. Fix the outliers to be consistent with +the rest of the usage. + +Cc: Jan Kiszka +Reviewed-by: Jan Kiszka +Signed-off-by: Nishanth Menon +Link: https://lore.kernel.org/r/20230606182220.3661956-13-nm@ti.com +Signed-off-by: Vignesh Raghavendra +[Commit f722090aeb70 upstream] +--- + .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 17 ++++++++--------- + .../dts/ti/k3-am6548-iot2050-advanced-m2.dts | 18 ++++++++---------- + 2 files changed, 16 insertions(+), 19 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +index 9c936b7532b5..6b73937332cb 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +@@ -386,13 +386,12 @@ &main_gpio0 { + + &wkup_gpio0 { + pinctrl-names = "default"; +- pinctrl-0 = < +- &arduino_io_d2_to_d3_pins_default +- &arduino_i2c_aio_switch_pins_default +- &arduino_io_oe_pins_default +- &push_button_pins_default +- &db9_com_mode_pins_default +- >; ++ pinctrl-0 = ++ <&arduino_io_d2_to_d3_pins_default>, ++ <&arduino_i2c_aio_switch_pins_default>, ++ <&arduino_io_oe_pins_default>, ++ <&push_button_pins_default>, ++ <&db9_com_mode_pins_default>; + gpio-line-names = + /* 0..9 */ + "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", +@@ -762,13 +761,13 @@ &mailbox0_cluster11 { + &mcu_r5fss0_core0 { + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; +- mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>; ++ mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>; + }; + + &mcu_r5fss0_core1 { + memory-region = <&mcu_r5fss0_core1_dma_memory_region>, + <&mcu_r5fss0_core1_memory_region>; +- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>; ++ mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>; + }; + + &icssg0_mdio { +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +index 9400e35882a6..9209b5a7baa4 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +@@ -66,20 +66,18 @@ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ + + &main_gpio0 { + pinctrl-names = "default"; +- pinctrl-0 = < +- &main_m2_pcie_mux_control +- &arduino_io_d4_to_d9_pins_default +- >; ++ pinctrl-0 = ++ <&main_m2_pcie_mux_control>, ++ <&arduino_io_d4_to_d9_pins_default>; + }; + + &main_gpio1 { + pinctrl-names = "default"; +- pinctrl-0 = < +- &main_m2_enable_pins_default +- &main_pmx0_m2_config_pins_default +- &main_pmx1_m2_config_pins_default +- &cp2102n_reset_pin_default +- >; ++ pinctrl-0 = ++ <&main_m2_enable_pins_default>, ++ <&main_pmx0_m2_config_pins_default>, ++ <&main_pmx1_m2_config_pins_default>, ++ <&cp2102n_reset_pin_default>; + }; + + /* diff --git a/recipes-kernel/linux/files/patches-6.1/0006-arm64-dts-ti-Unify-pin-group-node-names-for-make-dtb.patch b/recipes-kernel/linux/files/patches-6.1/0006-arm64-dts-ti-Unify-pin-group-node-names-for-make-dtb.patch new file mode 100644 index 000000000..d644024e8 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0006-arm64-dts-ti-Unify-pin-group-node-names-for-make-dtb.patch @@ -0,0 +1,1320 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Tony Lindgren +Date: Thu, 15 Jun 2023 19:34:06 +0530 +Subject: [PATCH] arm64: dts: ti: Unify pin group node names for make dtbs + checks + +Prepare for pinctrl-single yaml binding and unify pin group node names. + +Let's standardize on pin group node naming ending in -pins. As we don't +necessarily have a SoC specific compatible property for pinctrl-single. +I'd rather not add a pattern match for pins somewhere in the name for all +the users. + +Trying to add matches for pins-default will be futile as on the earlier +SoCs we've already seen names like pins-sleep, pins-idle, pins-off and so +on that would need to be matched. + +And as the node is a pin group, let's prefer to use naming -pins rather +than -pin as more pins may need to be added to the pin group later on. + +Signed-off-by: Tony Lindgren +[vigneshr@ti.com: Rebase onto latest ti/next and extend to new nodes] +Signed-off-by: Vignesh Raghavendra +[Commit a49568115143 upstream] +--- + arch/arm64/boot/dts/ti/k3-am625-sk.dts | 8 ++-- + arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 12 ++--- + arch/arm64/boot/dts/ti/k3-am642-evm.dts | 24 +++++----- + arch/arm64/boot/dts/ti/k3-am642-sk.dts | 24 +++++----- + .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 48 +++++++++---------- + .../ti/k3-am6528-iot2050-basic-common.dtsi | 2 +- + .../arm64/boot/dts/ti/k3-am654-base-board.dts | 28 +++++------ + .../ti/k3-am6548-iot2050-advanced-common.dtsi | 2 +- + .../dts/ti/k3-am6548-iot2050-advanced-m2.dts | 6 +-- + .../dts/ti/k3-j7200-common-proc-board.dts | 14 +++--- + arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 6 +-- + .../dts/ti/k3-j721e-common-proc-board.dts | 48 +++++++++---------- + arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 40 ++++++++-------- + arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 4 +- + .../dts/ti/k3-j721s2-common-proc-board.dts | 20 ++++---- + arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 4 +- + 16 files changed, 145 insertions(+), 145 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts +index 93a5f0817efc..6c6655369e52 100644 +--- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts ++++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts +@@ -231,7 +231,7 @@ AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */ + >; + }; + +- main_rgmii2_pins_default: main-rgmii2-pins-default { ++ main_rgmii2_pins_default: main-rgmii2-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */ + AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */ +@@ -248,7 +248,7 @@ AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */ + >; + }; + +- ospi0_pins_default: ospi0-pins-default { ++ ospi0_pins_default: ospi0-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ + AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ +@@ -264,13 +264,13 @@ AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ + >; + }; + +- vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { ++ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */ + >; + }; + +- main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-pins-default { ++ main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { + pinctrl-single,pins = < + AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +index b08a083d722d..7152b04eec52 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts ++++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts +@@ -114,35 +114,35 @@ led-0 { + }; + + &main_pmx0 { +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14) UART0_RXD */ + AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */ + >; + }; + +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ + AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ + AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ + >; + }; + +- main_i2c2_pins_default: main-i2c2-pins-default { ++ main_i2c2_pins_default: main-i2c2-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ + AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ + AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ +@@ -154,7 +154,7 @@ AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ + >; + }; + +- usr_led_pins_default: usr-led-pins-default { ++ usr_led_pins_default: usr-led-default-pins { + pinctrl-single,pins = < + AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts +index 5cf913860f80..6e2ffaaa816b 100644 +--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts ++++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts +@@ -201,7 +201,7 @@ transceiver2: can-phy1 { + }; + + &main_pmx0 { +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */ + AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */ +@@ -215,7 +215,7 @@ AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */ + >; + }; + +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ + AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ +@@ -224,7 +224,7 @@ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ + >; + }; + +- main_spi0_pins_default: main-spi0-pins-default { ++ main_spi0_pins_default: main-spi0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0210, PIN_INPUT, 0) /* (D13) SPI0_CLK */ + AM64X_IOPAD(0x0208, PIN_OUTPUT, 0) /* (D12) SPI0_CS0 */ +@@ -233,21 +233,21 @@ AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ + AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ + >; + }; + +- mdio1_pins_default: mdio1-pins-default { ++ mdio1_pins_default: mdio1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ + AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ + >; + }; + +- rgmii1_pins_default: rgmii1-pins-default { ++ rgmii1_pins_default: rgmii1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */ + AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */ +@@ -264,7 +264,7 @@ AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ + >; + }; + +- rgmii2_pins_default: rgmii2-pins-default { ++ rgmii2_pins_default: rgmii2-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ + AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ +@@ -281,13 +281,13 @@ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ + >; + }; + +- main_usb0_pins_default: main-usb0-pins-default { ++ main_usb0_pins_default: main-usb0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ + >; + }; + +- ospi0_pins_default: ospi0-pins-default { ++ ospi0_pins_default: ospi0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */ + AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ +@@ -303,20 +303,20 @@ AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ + >; + }; + +- main_ecap0_pins_default: main-ecap0-pins-default { ++ main_ecap0_pins_default: main-ecap0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ + >; + }; + +- main_mcan0_pins_default: main-mcan0-pins-default { ++ main_mcan0_pins_default: main-mcan0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */ + AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */ + >; + }; + +- main_mcan1_pins_default: main-mcan1-pins-default { ++ main_mcan1_pins_default: main-mcan1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */ + AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */ +diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts +index 738d0cf6c40a..4e1b88008675 100644 +--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts ++++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts +@@ -222,7 +222,7 @@ led-7 { + }; + + &main_pmx0 { +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0294, PIN_INPUT, 0) /* (J19) MMC1_CMD */ + AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */ +@@ -235,7 +235,7 @@ AM64X_IOPAD(0x0298, PIN_INPUT, 0) /* (D19) MMC1_SDCD */ + >; + }; + +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */ + AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */ +@@ -244,27 +244,27 @@ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */ + >; + }; + +- main_usb0_pins_default: main-usb0-pins-default { ++ main_usb0_pins_default: main-usb0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */ + AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */ + >; + }; + +- mdio1_pins_default: mdio1-pins-default { ++ mdio1_pins_default: mdio1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */ + AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */ + >; + }; + +- rgmii1_pins_default: rgmii1-pins-default { ++ rgmii1_pins_default: rgmii1-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x011c, PIN_INPUT, 4) /* (AA13) PRG1_PRU1_GPO5.RGMII1_RD0 */ + AM64X_IOPAD(0x0128, PIN_INPUT, 4) /* (U12) PRG1_PRU1_GPO8.RGMII1_RD1 */ +@@ -281,7 +281,7 @@ AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */ + >; + }; + +- rgmii2_pins_default: rgmii2-pins-default { ++ rgmii2_pins_default: rgmii2-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */ + AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */ +@@ -298,7 +298,7 @@ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */ + >; + }; + +- ospi0_pins_default: ospi0-pins-default { ++ ospi0_pins_default: ospi0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */ + AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */ +@@ -314,24 +314,24 @@ AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */ + >; + }; + +- main_ecap0_pins_default: main-ecap0-pins-default { ++ main_ecap0_pins_default: main-ecap0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ + >; + }; +- main_wlan_en_pins_default: main-wlan-en-pins-default { ++ main_wlan_en_pins_default: main-wlan-en-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */ + >; + }; + +- main_com8_ls_en_pins_default: main-com8-ls-en-pins-default { ++ main_com8_ls_en_pins_default: main-com8-ls-en-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x00fc, PIN_OUTPUT, 7) /* (U7) PRG1_PRU0_GPO17.GPIO0_62 */ + >; + }; + +- main_wlan_pins_default: main-wlan-pins-default { ++ main_wlan_pins_default: main-wlan-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +index 6b73937332cb..a51e83484191 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +@@ -104,7 +104,7 @@ dp_refclk: clock { + }; + + &wkup_pmx0 { +- wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + /* (AC7) WKUP_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) +@@ -113,7 +113,7 @@ AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) + >; + }; + +- mcu_i2c0_pins_default: mcu-i2c0-pins-default { ++ mcu_i2c0_pins_default: mcu-i2c0-default-pins { + pinctrl-single,pins = < + /* (AD8) MCU_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e8, PIN_INPUT, 0) +@@ -122,21 +122,21 @@ AM65X_WKUP_IOPAD(0x00ec, PIN_INPUT, 0) + >; + }; + +- arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-pins-default { ++ arduino_i2c_aio_switch_pins_default: arduino-i2c-aio-switch-default-pins { + pinctrl-single,pins = < + /* (R2) WKUP_GPIO0_21 */ + AM65X_WKUP_IOPAD(0x0024, PIN_OUTPUT, 7) + >; + }; + +- push_button_pins_default: push-button-pins-default { ++ push_button_pins_default: push-button-default-pins { + pinctrl-single,pins = < + /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ + AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) + >; + }; + +- arduino_uart_pins_default: arduino-uart-pins-default { ++ arduino_uart_pins_default: arduino-uart-default-pins { + pinctrl-single,pins = < + /* (P4) MCU_UART0_RXD */ + AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) +@@ -145,7 +145,7 @@ AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) + >; + }; + +- arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-pins-default { ++ arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-default-pins { + pinctrl-single,pins = < + /* (P1) WKUP_GPIO0_31 */ + AM65X_WKUP_IOPAD(0x004C, PIN_OUTPUT, 7) +@@ -154,7 +154,7 @@ AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 7) + >; + }; + +- arduino_io_oe_pins_default: arduino-io-oe-pins-default { ++ arduino_io_oe_pins_default: arduino-io-oe-default-pins { + pinctrl-single,pins = < + /* (N4) WKUP_GPIO0_34 */ + AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 7) +@@ -169,7 +169,7 @@ AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7) + >; + }; + +- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) +@@ -184,7 +184,7 @@ AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) + >; + }; + +- db9_com_mode_pins_default: db9-com-mode-pins-default { ++ db9_com_mode_pins_default: db9-com-mode-default-pins { + pinctrl-single,pins = < + /* (AD3) WKUP_GPIO0_5, used as uart0 mode 0 */ + AM65X_WKUP_IOPAD(0x00c4, PIN_OUTPUT, 7) +@@ -197,7 +197,7 @@ AM65X_WKUP_IOPAD(0x00c8, PIN_OUTPUT, 7) + >; + }; + +- leds_pins_default: leds-pins-default { ++ leds_pins_default: leds-default-pins { + pinctrl-single,pins = < + /* (T2) WKUP_GPIO0_17, used as user led1 red */ + AM65X_WKUP_IOPAD(0x0014, PIN_OUTPUT, 7) +@@ -210,7 +210,7 @@ AM65X_WKUP_IOPAD(0x0050, PIN_OUTPUT, 7) + >; + }; + +- mcu_spi0_pins_default: mcu-spi0-pins-default { ++ mcu_spi0_pins_default: mcu-spi0-default-pins { + pinctrl-single,pins = < + /* (Y1) MCU_SPI0_CLK */ + AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) +@@ -223,7 +223,7 @@ AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) + >; + }; + +- minipcie_pins_default: minipcie-pins-default { ++ minipcie_pins_default: minipcie-default-pins { + pinctrl-single,pins = < + /* (P2) MCU_OSPI1_DQS.WKUP_GPIO0_27 */ + AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) +@@ -232,7 +232,7 @@ AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) + }; + + &main_pmx0 { +- main_uart1_pins_default: main-uart1-pins-default { ++ main_uart1_pins_default: main-uart1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */ + AM65X_IOPAD(0x014c, PIN_OUTPUT, 6) /* (AD23) UART1_TXD */ +@@ -241,14 +241,14 @@ AM65X_IOPAD(0x017c, PIN_OUTPUT, 6) /* (AC21) UART1_RTSn */ + >; + }; + +- main_i2c3_pins_default: main-i2c3-pins-default { ++ main_i2c3_pins_default: main-i2c3-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c0, PIN_INPUT, 2) /* (AF13) I2C3_SCL */ + AM65X_IOPAD(0x01d4, PIN_INPUT, 2) /* (AG12) I2C3_SDA */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ + AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ +@@ -261,19 +261,19 @@ AM65X_IOPAD(0x02e0, PIN_INPUT_PULLUP, 0) /* (C24) MMC1_SDWP */ + >; + }; + +- usb0_pins_default: usb0-pins-default { ++ usb0_pins_default: usb0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02bc, PIN_OUTPUT, 0) /* (AD9) USB0_DRVVBUS */ + >; + }; + +- usb1_pins_default: usb1-pins-default { ++ usb1_pins_default: usb1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ + >; + }; + +- arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-pins-default { ++ arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (AG18) GPIO0_33 */ + AM65X_IOPAD(0x008C, PIN_OUTPUT, 7) /* (AF17) GPIO0_35 */ +@@ -284,7 +284,7 @@ AM65X_IOPAD(0x00CC, PIN_OUTPUT, 7) /* (AD15) GPIO0_51 */ + >; + }; + +- dss_vout1_pins_default: dss-vout1-pins-default { ++ dss_vout1_pins_default: dss-vout1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_OUTPUT, 1) /* VOUT1_DATA0 */ + AM65X_IOPAD(0x0004, PIN_OUTPUT, 1) /* VOUT1_DATA1 */ +@@ -317,13 +317,13 @@ AM65X_IOPAD(0x006c, PIN_OUTPUT, 1) /* VOUT1_DE */ + >; + }; + +- dp_pins_default: dp-pins-default { ++ dp_pins_default: dp-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0078, PIN_OUTPUT, 7) /* (AF18) DP rst_n */ + >; + }; + +- main_i2c2_pins_default: main-i2c2-pins-default { ++ main_i2c2_pins_default: main-i2c2-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */ +@@ -332,21 +332,21 @@ AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */ + }; + + &main_pmx1 { +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; + +- ecap0_pins_default: ecap0-pins-default { ++ ecap0_pins_default: ecap0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +index 4a9bf7d7c07d..9b757ed3bdcd 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic-common.dtsi +@@ -35,7 +35,7 @@ &sdhci0 { + }; + + &main_pmx0 { +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ + AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ +diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +index 4444bf0fbca4..6f668116f6cd 100644 +--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +@@ -119,21 +119,21 @@ vdd_mmc1_sd: fixedregulator-sd { + }; + + &wkup_pmx0 { +- wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x00e0, PIN_INPUT, 0) /* (AC7) WKUP_I2C0_SCL */ + AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */ + >; + }; + +- push_button_pins_default: push-button-pins-default { ++ push_button_pins_default: push-button-default-pins { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0030, PIN_INPUT, 7) /* (R5) WKUP_GPIO0_24 */ + AM65X_WKUP_IOPAD(0x003c, PIN_INPUT, 7) /* (P2) WKUP_GPIO0_27 */ + >; + }; + +- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */ + AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */ +@@ -155,7 +155,7 @@ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ + >; + }; + +- mcu_cpsw_pins_default: mcu-cpsw-pins-default { ++ mcu_cpsw_pins_default: mcu-cpsw-default-pins { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* (N4) MCU_RGMII1_TX_CTL */ + AM65X_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* (N5) MCU_RGMII1_RX_CTL */ +@@ -172,7 +172,7 @@ AM65X_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* (M1) MCU_RGMII1_RXC */ + >; + }; + +- mcu_mdio_pins_default: mcu-mdio1-pins-default { ++ mcu_mdio_pins_default: mcu-mdio1-default-pins { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ + AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ +@@ -181,7 +181,7 @@ AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ + }; + + &main_pmx0 { +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01e4, PIN_INPUT, 0) /* (AF11) UART0_RXD */ + AM65X_IOPAD(0x01e8, PIN_OUTPUT, 0) /* (AE11) UART0_TXD */ +@@ -190,14 +190,14 @@ AM65X_IOPAD(0x01f0, PIN_OUTPUT, 0) /* (AD11) UART0_RTSn */ + >; + }; + +- main_i2c2_pins_default: main-i2c2-pins-default { ++ main_i2c2_pins_default: main-i2c2-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */ + AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */ + >; + }; + +- main_spi0_pins_default: main-spi0-pins-default { ++ main_spi0_pins_default: main-spi0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c4, PIN_INPUT, 0) /* (AH13) SPI0_CLK */ + AM65X_IOPAD(0x01c8, PIN_INPUT, 0) /* (AE13) SPI0_D0 */ +@@ -206,7 +206,7 @@ AM65X_IOPAD(0x01bc, PIN_OUTPUT, 0) /* (AG13) SPI0_CS0 */ + >; + }; + +- main_mmc0_pins_default: main-mmc0-pins-default { ++ main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ + AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ +@@ -223,7 +223,7 @@ AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02d4, PIN_INPUT_PULLDOWN, 0) /* (C27) MMC1_CLK */ + AM65X_IOPAD(0x02d8, PIN_INPUT_PULLUP, 0) /* (C28) MMC1_CMD */ +@@ -236,7 +236,7 @@ AM65X_IOPAD(0x02e0, PIN_INPUT, 0) /* (C24) MMC1_SDWP */ + >; + }; + +- usb1_pins_default: usb1-pins-default { ++ usb1_pins_default: usb1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ + >; +@@ -244,21 +244,21 @@ AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ + }; + + &main_pmx1 { +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */ + AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; + +- ecap0_pins_default: ecap0-pins-default { ++ ecap0_pins_default: ecap0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi +index d25e8b26187f..112b3c4ef975 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-common.dtsi +@@ -22,7 +22,7 @@ memory@80000000 { + }; + + &main_pmx0 { +- main_mmc0_pins_default: main-mmc0-pins-default { ++ main_mmc0_pins_default: main-mmc0-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ + AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +index 9209b5a7baa4..cbe44634914f 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +@@ -27,7 +27,7 @@ &mcu_r5fss0 { + }; + + &main_pmx0 { +- main_m2_enable_pins_default: main-m2-enable-pins-default { ++ main_m2_enable_pins_default: main-m2-enable-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ + >; +@@ -39,7 +39,7 @@ AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */ + >; + }; + +- main_pmx0_m2_config_pins_default: main-pmx0-m2-config-pins-default { ++ main_pmx0_m2_config_pins_default: main-pmx0-m2-config-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c8, PIN_INPUT_PULLUP, 7) /* (AE13) GPIO1_18 */ + AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */ +@@ -56,7 +56,7 @@ AM65X_IOPAD(0x0164, PIN_INPUT_PULLUP, 7) /* (AF19) GPIO0_89 */ + }; + + &main_pmx1 { +- main_pmx1_m2_config_pins_default: main-pmx1-m2-config-pins-default { ++ main_pmx1_m2_config_pins_default: main-pmx1-m2-config-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0018, PIN_INPUT_PULLUP, 7) /* (B22) GPIO1_88 */ + AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ +diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +index 5840063f6129..58ff74025a3b 100644 +--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts +@@ -81,7 +81,7 @@ vdd_sd_dv: gpio-regulator-TLV71033 { + }; + + &wkup_pmx2 { +- mcu_cpsw_pins_default: mcu-cpsw-pins-default { ++ mcu_cpsw_pins_default: mcu-cpsw-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ + J721E_WKUP_IOPAD(0x0004, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ +@@ -98,7 +98,7 @@ J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ + >; + }; + +- mcu_mdio_pins_default: mcu-mdio1-pins-default { ++ mcu_mdio_pins_default: mcu-mdio1-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0034, PIN_OUTPUT, 0) /* (L1) MCU_MDIO0_MDC */ + J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ +@@ -107,21 +107,21 @@ J721E_WKUP_IOPAD(0x0030, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */ + }; + + &main_pmx0 { +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ + J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0xdc, PIN_INPUT_PULLUP, 3) /* (U3) ECAP0_IN_APWM_OUT.I2C1_SCL */ + J721E_IOPAD(0xe0, PIN_INPUT_PULLUP, 3) /* (T3) EXT_REFCLK1.I2C1_SDA */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x104, PIN_INPUT, 0) /* (M20) MMC1_CMD */ + J721E_IOPAD(0x100, PIN_INPUT, 0) /* (P21) MMC1_CLK */ +@@ -134,7 +134,7 @@ J721E_IOPAD(0xe4, PIN_INPUT, 8) /* (V1) TIMER_IO0.MMC1_SDCD */ + >; + }; + +- vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { ++ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ + >; +@@ -142,7 +142,7 @@ J721E_IOPAD(0xd0, PIN_OUTPUT, 7) /* (T5) SPI0_D1.GPIO0_55 */ + }; + + &main_pmx1 { +- main_usbss0_pins_default: main-usbss0-pins-default { ++ main_usbss0_pins_default: main-usbss0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x04, PIN_OUTPUT, 0) /* (T4) USB0_DRVVBUS */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +index 2d615c3e9fa1..2a3c67f4424a 100644 +--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +@@ -83,7 +83,7 @@ rtos_ipc_memory_region: ipc-memories@a4000000 { + }; + + &wkup_pmx0 { +- mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-pins-default { ++ mcu_fss0_hpb0_pins_default: mcu-fss0-hpb0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 1) /* (B6) MCU_OSPI0_CLK.MCU_HYPERBUS0_CK */ + J721E_WKUP_IOPAD(0x4, PIN_OUTPUT, 1) /* (C8) MCU_OSPI0_LBCLKO.MCU_HYPERBUS0_CKn */ +@@ -101,7 +101,7 @@ J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (A7) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */ + >; + }; + +- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ +@@ -119,7 +119,7 @@ J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ + }; + + &main_pmx0 { +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0xd4, PIN_INPUT_PULLUP, 0) /* (V3) I2C0_SCL */ + J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ +diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +index b1691ac3442d..0cfc361cc876 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +@@ -173,13 +173,13 @@ dp_connector_in: endpoint { + }; + + &main_pmx0 { +- sw10_button_pins_default: sw10-button-pins-default { ++ sw10_button_pins_default: sw10-button-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ + J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ +@@ -193,66 +193,66 @@ J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */ + >; + }; + +- vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-pins-default { ++ vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1d8, PIN_INPUT, 7) /* (W4) SPI1_CS1.GPIO0_117 */ + >; + }; + +- main_usbss0_pins_default: main-usbss0-pins-default { ++ main_usbss0_pins_default: main-usbss0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ + J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */ + >; + }; + +- main_usbss1_pins_default: main-usbss1-pins-default { ++ main_usbss1_pins_default: main-usbss1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */ + >; + }; + +- dp0_pins_default: dp0-pins-default { ++ dp0_pins_default: dp0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */ + >; + }; + +- main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default { ++ main_i2c1_exp4_pins_default: main-i2c1-exp4-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */ + >; + }; + +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ + J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */ + J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */ + >; + }; + +- main_i2c3_pins_default: main-i2c3-pins-default { ++ main_i2c3_pins_default: main-i2c3-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */ + J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */ + >; + }; + +- main_i2c6_pins_default: main-i2c6-pins-default { ++ main_i2c6_pins_default: main-i2c6-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */ + J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */ + >; + }; + +- mcasp10_pins_default: mcasp10-pins-default { ++ mcasp10_pins_default: mcasp10-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */ + J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */ +@@ -266,27 +266,27 @@ J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */ + >; + }; + +- audi_ext_refclk2_pins_default: audi-ext-refclk2-pins-default { ++ audi_ext_refclk2_pins_default: audi-ext-refclk2-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */ + >; + }; + +- main_mcan0_pins_default: main-mcan0-pins-default { ++ main_mcan0_pins_default: main-mcan0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x208, PIN_INPUT, 0) /* (W5) MCAN0_RX */ + J721E_IOPAD(0x20c, PIN_OUTPUT, 0) /* (W6) MCAN0_TX */ + >; + }; + +- main_mcan2_pins_default: main-mcan2-pins-default { ++ main_mcan2_pins_default: main-mcan2-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x01f0, PIN_INPUT, 3) /* (AC2) MCAN2_RX.GPIO0_123 */ + J721E_IOPAD(0x01f4, PIN_OUTPUT, 3) /* (AB1) MCAN2_TX.GPIO0_124 */ + >; + }; + +- main_mcan2_gpio_pins_default: main-mcan2-gpio-pins-default { ++ main_mcan2_gpio_pins_default: main-mcan2-gpio-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x200, PIN_INPUT, 7) /* (AC4) UART1_CTSn.GPIO0_127 */ + >; +@@ -294,13 +294,13 @@ J721E_IOPAD(0x200, PIN_INPUT, 7) /* (AC4) UART1_CTSn.GPIO0_127 */ + }; + + &wkup_pmx0 { +- sw11_button_pins_default: sw11-button-pins-default { ++ sw11_button_pins_default: sw11-button-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */ + >; + }; + +- mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { ++ mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ + J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ +@@ -313,7 +313,7 @@ J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ + >; + }; + +- mcu_cpsw_pins_default: mcu-cpsw-pins-default { ++ mcu_cpsw_pins_default: mcu-cpsw-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */ + J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */ +@@ -330,35 +330,35 @@ J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */ + >; + }; + +- mcu_mdio_pins_default: mcu-mdio1-pins-default { ++ mcu_mdio_pins_default: mcu-mdio1-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */ + J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */ + >; + }; + +- mcu_mcan0_pins_default: mcu-mcan0-pins-default { ++ mcu_mcan0_pins_default: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xac, PIN_INPUT, 0) /* (C29) MCU_MCAN0_RX */ + J721E_WKUP_IOPAD(0xa8, PIN_OUTPUT, 0) /* (D29) MCU_MCAN0_TX */ + >; + }; + +- mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default { ++ mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xb0, PIN_INPUT, 7) /* (F26) WKUP_GPIO0_0 */ + J721E_WKUP_IOPAD(0x98, PIN_INPUT, 7) /* (E28) MCU_SPI0_D1.WKUP_GPIO0_54 */ + >; + }; + +- mcu_mcan1_pins_default: mcu-mcan1-pins-default { ++ mcu_mcan1_pins_default: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xc4, PIN_INPUT, 0) /* (G24) WKUP_GPIO0_5.MCU_MCAN1_RX */ + J721E_WKUP_IOPAD(0xc0, PIN_OUTPUT, 0) /* (G25) WKUP_GPIO0_4.MCU_MCAN1_TX */ + >; + }; + +- mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default { ++ mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xb8, PIN_INPUT, 7) /* (F28) WKUP_GPIO0_2 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +index 80358cba6954..f0118a74c97d 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts ++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +@@ -281,7 +281,7 @@ tfp410_out: endpoint { + }; + + &main_pmx0 { +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */ + J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */ +@@ -294,7 +294,7 @@ J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */ + >; + }; + +- main_uart0_pins_default: main-uart0-pins-default { ++ main_uart0_pins_default: main-uart0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1f0, PIN_INPUT, 0) /* (AC2) UART0_CTSn */ + J721E_IOPAD(0x1f4, PIN_OUTPUT, 0) /* (AB1) UART0_RTSn */ +@@ -303,53 +303,53 @@ J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */ + >; + }; + +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */ + J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */ + >; + }; + +- main_i2c1_pins_default: main-i2c1-pins-default { ++ main_i2c1_pins_default: main-i2c1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */ + J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */ + >; + }; + +- main_i2c3_pins_default: main-i2c3-pins-default { ++ main_i2c3_pins_default: main-i2c3-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */ + J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */ + >; + }; + +- main_usbss0_pins_default: main-usbss0-pins-default { ++ main_usbss0_pins_default: main-usbss0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */ + J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */ + >; + }; + +- main_usbss1_pins_default: main-usbss1-pins-default { ++ main_usbss1_pins_default: main-usbss1-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */ + >; + }; + +- dp0_pins_default: dp0-pins-default { ++ dp0_pins_default: dp0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */ + >; + }; + +- dp_pwr_en_pins_default: dp-pwr-en-pins-default { ++ dp_pwr_en_pins_default: dp-pwr-en-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x1c0, PIN_INPUT, 7) /* (AA2) SPI0_CS0.GPIO0_111 */ + >; + }; + +- dss_vout0_pins_default: dss-vout0-pins-default { ++ dss_vout0_pins_default: dss-vout0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x58, PIN_OUTPUT, 10) /* (AE22) PRG1_PRU1_GPO0.VOUT0_DATA0 */ + J721E_IOPAD(0x5c, PIN_OUTPUT, 10) /* (AG23) PRG1_PRU1_GPO1.VOUT0_DATA1 */ +@@ -382,20 +382,20 @@ J721E_IOPAD(0xa0, PIN_OUTPUT, 10) /* (AJ22) PRG1_PRU1_GPO18.VOUT0_VSYNC */ + >; + }; + +- hdmi_hpd_pins_default: hdmi-hpd-pins-default { ++ hdmi_hpd_pins_default: hdmi-hpd-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x204, PIN_INPUT, 7) /* (AD5) UART1_RTSn.GPIO1_0 */ + >; + }; + +- hdmi_pdn_pins_default: hdmi-pdn-pins-default { ++ hdmi_pdn_pins_default: hdmi-pdn-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x200, PIN_INPUT, 7) /* (AC4) UART1_CTSn.GPIO0_127 */ + >; + }; + + /* Reset for M.2 E Key slot on PCIe0 */ +- ekey_reset_pins_default: ekey-reset-pns-pins-default { ++ ekey_reset_pins_default: ekey-reset-pns-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x124, PIN_INPUT, 7) /* (Y24) PRG0_PRU1_GPO9.GPIO0_72 */ + >; +@@ -403,7 +403,7 @@ J721E_IOPAD(0x124, PIN_INPUT, 7) /* (Y24) PRG0_PRU1_GPO9.GPIO0_72 */ + }; + + &wkup_pmx0 { +- mcu_cpsw_pins_default: mcu-cpsw-pins-default { ++ mcu_cpsw_pins_default: mcu-cpsw-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x84, PIN_INPUT, 0) /* (B24) MCU_RGMII1_RD0 */ + J721E_WKUP_IOPAD(0x80, PIN_INPUT, 0) /* (A24) MCU_RGMII1_RD1 */ +@@ -420,14 +420,14 @@ J721E_WKUP_IOPAD(0x58, PIN_OUTPUT, 0) /* (B27) MCU_RGMII1_TX_CTL */ + >; + }; + +- mcu_mdio_pins_default: mcu-mdio1-pins-default { ++ mcu_mdio_pins_default: mcu-mdio1-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x8c, PIN_OUTPUT, 0) /* (F23) MCU_MDIO0_MDC */ + J721E_WKUP_IOPAD(0x88, PIN_INPUT, 0) /* (E23) MCU_MDIO0_MDIO */ + >; + }; + +- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0, PIN_OUTPUT, 0) /* (E20) MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x2c, PIN_OUTPUT, 0) /* (F19) MCU_OSPI0_CSn0 */ +@@ -443,19 +443,19 @@ J721E_WKUP_IOPAD(0x8, PIN_INPUT, 0) /* (D21) MCU_OSPI0_DQS */ + >; + }; + +- vdd_mmc1_en_pins_default: vdd-mmc1-en-pins-default { ++ vdd_mmc1_en_pins_default: vdd-mmc1-en-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xd0, PIN_OUTPUT, 7) /* (G27) WKUP_GPIO0_8 */ + >; + }; + +- vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-pins-default { ++ vdd_sd_dv_alt_pins_default: vdd-sd-dv-alt-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xd4, PIN_OUTPUT, 7) /* (G26) WKUP_GPIO0_9 */ + >; + }; + +- wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */ + J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ +@@ -463,7 +463,7 @@ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ + }; + + /* Reset for M.2 M Key slot on PCIe1 */ +- mkey_reset_pins_default: mkey-reset-pns-pins-default { ++ mkey_reset_pins_default: mkey-reset-pns-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xdc, PIN_INPUT, 7) /* (H27) WKUP_GPIO0_11 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +index e36335232cf8..81abe5d42a12 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +@@ -143,14 +143,14 @@ rtos_ipc_memory_region: ipc-memories@aa000000 { + }; + + &wkup_pmx0 { +- wkup_i2c0_pins_default: wkup-i2c0-pins-default { ++ wkup_i2c0_pins_default: wkup-i2c0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */ + J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */ + >; + }; + +- mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { ++ mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */ + J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */ +diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +index b210cc07c539..3236c01dae74 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +@@ -110,7 +110,7 @@ transceiver2: can-phy2 { + }; + + &main_pmx0 { +- main_uart8_pins_default: main-uart8-pins-default { ++ main_uart8_pins_default: main-uart8-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */ + J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */ +@@ -119,14 +119,14 @@ J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */ + >; + }; + +- main_i2c3_pins_default: main-i2c3-pins-default { ++ main_i2c3_pins_default: main-i2c3-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x064, PIN_INPUT_PULLUP, 13) /* (W28) MCAN0_TX.I2C3_SCL */ + J721S2_IOPAD(0x060, PIN_INPUT_PULLUP, 13) /* (AC27) MCASP2_AXR1.I2C3_SDA */ + >; + }; + +- main_mmc1_pins_default: main-mmc1-pins-default { ++ main_mmc1_pins_default: main-mmc1-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */ + J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */ +@@ -139,7 +139,7 @@ J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */ + >; + }; + +- vdd_sd_dv_pins_default: vdd-sd-dv-pins-default { ++ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ + >; +@@ -147,7 +147,7 @@ J721S2_IOPAD(0x020, PIN_INPUT, 7) /* (AA23) MCAN15_RX.GPIO0_8 */ + }; + + &wkup_pmx0 { +- mcu_cpsw_pins_default: mcu-cpsw-pins-default { ++ mcu_cpsw_pins_default: mcu-cpsw-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */ + J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */ +@@ -164,35 +164,35 @@ J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */ + >; + }; + +- mcu_mdio_pins_default: mcu-mdio-pins-default { ++ mcu_mdio_pins_default: mcu-mdio-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */ + J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */ + >; + }; + +- mcu_mcan0_pins_default: mcu-mcan0-pins-default { ++ mcu_mcan0_pins_default: mcu-mcan0-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0bc, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */ + J721S2_WKUP_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */ + >; + }; + +- mcu_mcan1_pins_default: mcu-mcan1-pins-default { ++ mcu_mcan1_pins_default: mcu-mcan1-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0d4, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */ + J721S2_WKUP_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX */ + >; + }; + +- mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-pins-default { ++ mcu_mcan0_gpio_pins_default: mcu-mcan0-gpio-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0c0, PIN_INPUT, 7) /* (D26) WKUP_GPIO0_0 */ + J721S2_WKUP_IOPAD(0x0a8, PIN_INPUT, 7) /* (B25) MCU_SPI0_D1.WKUP_GPIO0_69 */ + >; + }; + +- mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-pins-default { ++ mcu_mcan1_gpio_pins_default: mcu-mcan1-gpio-default-pins { + pinctrl-single,pins = < + J721S2_WKUP_IOPAD(0x0c8, PIN_INPUT, 7) /* (C28) WKUP_GPIO0_2 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +index 76f0ceacb6d4..bcf11944e50f 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi +@@ -40,14 +40,14 @@ transceiver0: can-phy0 { + }; + + &main_pmx0 { +- main_i2c0_pins_default: main-i2c0-pins-default { ++ main_i2c0_pins_default: main-i2c0-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */ + J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */ + >; + }; + +- main_mcan16_pins_default: main-mcan16-pins-default { ++ main_mcan16_pins_default: main-mcan16-default-pins { + pinctrl-single,pins = < + J721S2_IOPAD(0x028, PIN_INPUT, 0) /* (AB24) MCAN16_RX */ + J721S2_IOPAD(0x024, PIN_OUTPUT, 0) /* (Y28) MCAN16_TX */ diff --git a/recipes-kernel/linux/files/patches-6.1/0007-arm64-dts-ti-k3-Fixup-remaining-pin-group-node-names.patch b/recipes-kernel/linux/files/patches-6.1/0007-arm64-dts-ti-k3-Fixup-remaining-pin-group-node-names.patch new file mode 100644 index 000000000..086a5b122 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0007-arm64-dts-ti-k3-Fixup-remaining-pin-group-node-names.patch @@ -0,0 +1,67 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Nishanth Menon +Date: Tue, 1 Aug 2023 23:03:47 -0500 +Subject: [PATCH] arm64: dts: ti: k3: Fixup remaining pin group node names for + make dtbs checks + +Fix up outstanding pingroup node names to be compliant with the +upcoming pinctrl-single schema. + +Reviewed-by: Tony Lindgren +Link: https://lore.kernel.org/r/20230802040347.2264339-1-nm@ti.com +Signed-off-by: Nishanth Menon +[Commit 7a649518c13b upstream] +--- + arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi | 2 +- + arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 2 +- + arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts | 4 ++-- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +index e73458ca6900..e9419c4fe605 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +@@ -10,7 +10,7 @@ + */ + + &main_pmx0 { +- cp2102n_reset_pin_default: cp2102n-reset-pin-default { ++ cp2102n_reset_pin_default: cp2102n-reset-default-pins { + pinctrl-single,pins = < + /* (AF12) GPIO1_24, used as cp2102 reset */ + AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7) +diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +index 6f668116f6cd..c7ada8ccf054 100644 +--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts +@@ -149,7 +149,7 @@ AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */ + >; + }; + +- wkup_pca554_default: wkup-pca554-default { ++ wkup_pca554_default: wkup-pca554-default-pins { + pinctrl-single,pins = < + AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) /* (T1) MCU_OSPI1_CLK.WKUP_GPIO0_25 */ + >; +diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +index cbe44634914f..774eb14ac907 100644 +--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts ++++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +@@ -33,7 +33,7 @@ AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ + >; + }; + +- main_bkey_pcie_reset: main-bkey-pcie-reset { ++ main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */ + >; +@@ -46,7 +46,7 @@ AM65X_IOPAD(0x01cc, PIN_INPUT_PULLUP, 7) /* (AD13) GPIO1_19 */ + >; + }; + +- main_m2_pcie_mux_control: main-m2-pcie-mux-control { ++ main_m2_pcie_mux_control: main-m2-pcie-mux-control-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0148, PIN_INPUT_PULLUP, 7) /* (AG22) GPIO0_82 */ + AM65X_IOPAD(0x0160, PIN_INPUT_PULLUP, 7) /* (AE20) GPIO0_88 */ diff --git a/recipes-kernel/linux/files/patches-6.1/0004-dt-bindings-remoteproc-Add-PRU-consumer-bindings.patch b/recipes-kernel/linux/files/patches-6.1/0008-dt-bindings-remoteproc-Add-PRU-consumer-bindings.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0004-dt-bindings-remoteproc-Add-PRU-consumer-bindings.patch rename to recipes-kernel/linux/files/patches-6.1/0008-dt-bindings-remoteproc-Add-PRU-consumer-bindings.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0005-remoteproc-pru-Add-enum-for-PRU-Core-Identifiers.patch b/recipes-kernel/linux/files/patches-6.1/0009-remoteproc-pru-Add-enum-for-PRU-Core-Identifiers.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0005-remoteproc-pru-Add-enum-for-PRU-Core-Identifiers.patch rename to recipes-kernel/linux/files/patches-6.1/0009-remoteproc-pru-Add-enum-for-PRU-Core-Identifiers.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0006-remoteproc-pru-Add-APIs-to-get-and-put-the-PRU-cores.patch b/recipes-kernel/linux/files/patches-6.1/0010-remoteproc-pru-Add-APIs-to-get-and-put-the-PRU-cores.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0006-remoteproc-pru-Add-APIs-to-get-and-put-the-PRU-cores.patch rename to recipes-kernel/linux/files/patches-6.1/0010-remoteproc-pru-Add-APIs-to-get-and-put-the-PRU-cores.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0007-remoteproc-pru-Make-sysfs-entries-read-only-for-PRU-.patch b/recipes-kernel/linux/files/patches-6.1/0011-remoteproc-pru-Make-sysfs-entries-read-only-for-PRU-.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0007-remoteproc-pru-Make-sysfs-entries-read-only-for-PRU-.patch rename to recipes-kernel/linux/files/patches-6.1/0011-remoteproc-pru-Make-sysfs-entries-read-only-for-PRU-.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0008-remoteproc-pru-Add-pru_rproc_set_ctable-function.patch b/recipes-kernel/linux/files/patches-6.1/0012-remoteproc-pru-Add-pru_rproc_set_ctable-function.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0008-remoteproc-pru-Add-pru_rproc_set_ctable-function.patch rename to recipes-kernel/linux/files/patches-6.1/0012-remoteproc-pru-Add-pru_rproc_set_ctable-function.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0009-remoteproc-pru-Configure-firmware-based-on-client-se.patch b/recipes-kernel/linux/files/patches-6.1/0013-remoteproc-pru-Configure-firmware-based-on-client-se.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0009-remoteproc-pru-Configure-firmware-based-on-client-se.patch rename to recipes-kernel/linux/files/patches-6.1/0013-remoteproc-pru-Configure-firmware-based-on-client-se.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0010-dt-bindings-remoteproc-pru-Add-Interrupt-property.patch b/recipes-kernel/linux/files/patches-6.1/0014-dt-bindings-remoteproc-pru-Add-Interrupt-property.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0010-dt-bindings-remoteproc-pru-Add-Interrupt-property.patch rename to recipes-kernel/linux/files/patches-6.1/0014-dt-bindings-remoteproc-pru-Add-Interrupt-property.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0011-soc-ti-pruss-Add-pruss_get-put-API.patch b/recipes-kernel/linux/files/patches-6.1/0015-soc-ti-pruss-Add-pruss_get-put-API.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0011-soc-ti-pruss-Add-pruss_get-put-API.patch rename to recipes-kernel/linux/files/patches-6.1/0015-soc-ti-pruss-Add-pruss_get-put-API.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0012-soc-ti-pruss-Add-pruss_-request-release-_mem_region-.patch b/recipes-kernel/linux/files/patches-6.1/0016-soc-ti-pruss-Add-pruss_-request-release-_mem_region-.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0012-soc-ti-pruss-Add-pruss_-request-release-_mem_region-.patch rename to recipes-kernel/linux/files/patches-6.1/0016-soc-ti-pruss-Add-pruss_-request-release-_mem_region-.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0013-soc-ti-pruss-Add-pruss_cfg_read-update-pruss_cfg_get.patch b/recipes-kernel/linux/files/patches-6.1/0017-soc-ti-pruss-Add-pruss_cfg_read-update-pruss_cfg_get.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0013-soc-ti-pruss-Add-pruss_cfg_read-update-pruss_cfg_get.patch rename to recipes-kernel/linux/files/patches-6.1/0017-soc-ti-pruss-Add-pruss_cfg_read-update-pruss_cfg_get.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0014-soc-ti-pruss-Add-helper-functions-to-set-GPI-mode-MI.patch b/recipes-kernel/linux/files/patches-6.1/0018-soc-ti-pruss-Add-helper-functions-to-set-GPI-mode-MI.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0014-soc-ti-pruss-Add-helper-functions-to-set-GPI-mode-MI.patch rename to recipes-kernel/linux/files/patches-6.1/0018-soc-ti-pruss-Add-helper-functions-to-set-GPI-mode-MI.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0015-remoteproc-pru-add-support-for-configuring-GPMUX-bas.patch b/recipes-kernel/linux/files/patches-6.1/0019-remoteproc-pru-add-support-for-configuring-GPMUX-bas.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0015-remoteproc-pru-add-support-for-configuring-GPMUX-bas.patch rename to recipes-kernel/linux/files/patches-6.1/0019-remoteproc-pru-add-support-for-configuring-GPMUX-bas.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0016-net-ti-icssg-prueth-Add-Firmware-Interface-for-ICSSG.patch b/recipes-kernel/linux/files/patches-6.1/0020-net-ti-icssg-prueth-Add-Firmware-Interface-for-ICSSG.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0016-net-ti-icssg-prueth-Add-Firmware-Interface-for-ICSSG.patch rename to recipes-kernel/linux/files/patches-6.1/0020-net-ti-icssg-prueth-Add-Firmware-Interface-for-ICSSG.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0017-net-ti-icssg-prueth-Add-mii-helper-apis-and-macros.patch b/recipes-kernel/linux/files/patches-6.1/0021-net-ti-icssg-prueth-Add-mii-helper-apis-and-macros.patch similarity index 100% rename from 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recipes-kernel/linux/files/patches-6.1/0042-arm64-dts-ti-Add-reserved-memory-for-watchdog.patch rename to recipes-kernel/linux/files/patches-6.1/0046-arm64-dts-ti-Add-reserved-memory-for-watchdog.patch index 2123448fa..959ca5d78 100644 --- a/recipes-kernel/linux/files/patches-6.1/0042-arm64-dts-ti-Add-reserved-memory-for-watchdog.patch +++ b/recipes-kernel/linux/files/patches-6.1/0046-arm64-dts-ti-Add-reserved-memory-for-watchdog.patch @@ -14,10 +14,10 @@ Signed-off-by: Li Hua Qian 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -index 180bfb2a9ddf..46e7cc73b972 100644 +index a51e83484191..28f870c94150 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -@@ -64,6 +64,12 @@ rtos_ipc_memory_region: ipc-memories@a2000000 { +@@ -63,6 +63,12 @@ rtos_ipc_memory_region: ipc-memories@a2000000 { alignment = <0x1000>; no-map; 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b/recipes-kernel/linux/files/patches-6.1/0059-arm64-dts-ti-k3-am65-main-fix-DSS-irq-trigger-type.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0055-arm64-dts-ti-k3-am65-main-fix-DSS-irq-trigger-type.patch rename to recipes-kernel/linux/files/patches-6.1/0059-arm64-dts-ti-k3-am65-main-fix-DSS-irq-trigger-type.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0056-mmc-sdhci_am654-Disable-data-error-interrupts-while-.patch b/recipes-kernel/linux/files/patches-6.1/0060-mmc-sdhci_am654-Disable-data-error-interrupts-while-.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0056-mmc-sdhci_am654-Disable-data-error-interrupts-while-.patch rename to recipes-kernel/linux/files/patches-6.1/0060-mmc-sdhci_am654-Disable-data-error-interrupts-while-.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0057-drivers-mmc-host-sdhci_am654-fix-start-loop-index.patch b/recipes-kernel/linux/files/patches-6.1/0061-drivers-mmc-host-sdhci_am654-fix-start-loop-index.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0057-drivers-mmc-host-sdhci_am654-fix-start-loop-index.patch rename to recipes-kernel/linux/files/patches-6.1/0061-drivers-mmc-host-sdhci_am654-fix-start-loop-index.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0058-drivers-mmc-host-sdhci_am654-update-OTAP-and-ITAP-de.patch b/recipes-kernel/linux/files/patches-6.1/0062-drivers-mmc-host-sdhci_am654-update-OTAP-and-ITAP-de.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0058-drivers-mmc-host-sdhci_am654-update-OTAP-and-ITAP-de.patch rename to recipes-kernel/linux/files/patches-6.1/0062-drivers-mmc-host-sdhci_am654-update-OTAP-and-ITAP-de.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0059-PCI-keystone-Convert-to-using-hierarchy-domain-for-l.patch b/recipes-kernel/linux/files/patches-6.1/0063-PCI-keystone-Convert-to-using-hierarchy-domain-for-l.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0059-PCI-keystone-Convert-to-using-hierarchy-domain-for-l.patch rename to recipes-kernel/linux/files/patches-6.1/0063-PCI-keystone-Convert-to-using-hierarchy-domain-for-l.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0060-PCI-keystone-Add-PCI-legacy-interrupt-support-for-AM.patch b/recipes-kernel/linux/files/patches-6.1/0064-PCI-keystone-Add-PCI-legacy-interrupt-support-for-AM.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0060-PCI-keystone-Add-PCI-legacy-interrupt-support-for-AM.patch rename to recipes-kernel/linux/files/patches-6.1/0064-PCI-keystone-Add-PCI-legacy-interrupt-support-for-AM.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0061-PCI-keystone-Add-workaround-for-Errata-i2037-AM65x-S.patch b/recipes-kernel/linux/files/patches-6.1/0065-PCI-keystone-Add-workaround-for-Errata-i2037-AM65x-S.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0061-PCI-keystone-Add-workaround-for-Errata-i2037-AM65x-S.patch rename to recipes-kernel/linux/files/patches-6.1/0065-PCI-keystone-Add-workaround-for-Errata-i2037-AM65x-S.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0062-arm64-dts-ti-k3-am65-main-Add-properties-to-support-.patch b/recipes-kernel/linux/files/patches-6.1/0066-arm64-dts-ti-k3-am65-main-Add-properties-to-support-.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0062-arm64-dts-ti-k3-am65-main-Add-properties-to-support-.patch rename to recipes-kernel/linux/files/patches-6.1/0066-arm64-dts-ti-k3-am65-main-Add-properties-to-support-.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0063-firmware-ti_sci-Update-ti_sci_msg_req_reboot-to-incl.patch b/recipes-kernel/linux/files/patches-6.1/0067-firmware-ti_sci-Update-ti_sci_msg_req_reboot-to-incl.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0063-firmware-ti_sci-Update-ti_sci_msg_req_reboot-to-incl.patch rename to recipes-kernel/linux/files/patches-6.1/0067-firmware-ti_sci-Update-ti_sci_msg_req_reboot-to-incl.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0068-net-ti-icssg-prueth-Add-missing-icss_iep_put-to-erro.patch b/recipes-kernel/linux/files/patches-6.1/0068-net-ti-icssg-prueth-Add-missing-icss_iep_put-to-erro.patch new file mode 100644 index 000000000..9f858af5c --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0068-net-ti-icssg-prueth-Add-missing-icss_iep_put-to-erro.patch @@ -0,0 +1,44 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Thu, 2 Nov 2023 16:54:32 +0100 +Subject: [PATCH] net: ti: icssg-prueth: Add missing icss_iep_put to error path + +Analogously to prueth_remove, just also taking care for NULL'ing the +iep pointers. + +Fixes: 186734c15886 ("net: ti: icssg-prueth: add packet timestamping and ptp support") +Fixes: 443a2367ba3c ("net: ti: icssg-prueth: am65x SR2.0 add 10M full duplex support") +Signed-off-by: Jan Kiszka +--- + drivers/net/ethernet/ti/icssg/icssg_prueth.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.c b/drivers/net/ethernet/ti/icssg/icssg_prueth.c +index 3557749322df..fb445823b434 100644 +--- a/drivers/net/ethernet/ti/icssg/icssg_prueth.c ++++ b/drivers/net/ethernet/ti/icssg/icssg_prueth.c +@@ -2112,10 +2112,7 @@ static int prueth_probe(struct platform_device *pdev) + prueth->iep1 = icss_iep_get_idx(np, 1); + if (IS_ERR(prueth->iep1)) { + ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n"); +- icss_iep_put(prueth->iep0); +- prueth->iep0 = NULL; +- prueth->iep1 = NULL; +- goto free_pool; ++ goto put_iep0; + } + + if (prueth->pdata.quirk_10m_link_issue) { +@@ -2212,6 +2209,12 @@ static int prueth_probe(struct platform_device *pdev) + exit_iep: + if (prueth->pdata.quirk_10m_link_issue) + icss_iep_exit_fw(prueth->iep1); ++ icss_iep_put(prueth->iep1); ++ ++put_iep0: ++ icss_iep_put(prueth->iep0); ++ prueth->iep0 = NULL; ++ prueth->iep1 = NULL; + + free_pool: + gen_pool_free(prueth->sram_pool, diff --git a/recipes-kernel/linux/files/patches-6.1/0069-net-ti-icssg-prueth-Fix-error-cleanup-on-failing-pru.patch b/recipes-kernel/linux/files/patches-6.1/0069-net-ti-icssg-prueth-Fix-error-cleanup-on-failing-pru.patch new file mode 100644 index 000000000..03f6022e9 --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0069-net-ti-icssg-prueth-Fix-error-cleanup-on-failing-pru.patch @@ -0,0 +1,37 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Fri, 3 Nov 2023 10:09:50 +0100 +Subject: [PATCH] net: ti: icssg-prueth: Fix error cleanup on failing + pruss_request_mem_region + +We were just continuing in this case, surely not desired. + +Fixes: 128d5874c082 ("net: ti: icssg-prueth: Add ICSSG ethernet driver") +Signed-off-by: Jan Kiszka +[Taken from https://lore.kernel.org/lkml/06ed13ca-9f52-4b49-9178-aae245bfd958@siemens.com/] +--- + drivers/net/ethernet/ti/icssg/icssg_prueth.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/ti/icssg/icssg_prueth.c b/drivers/net/ethernet/ti/icssg/icssg_prueth.c +index fb445823b434..2b22e98dd677 100644 +--- a/drivers/net/ethernet/ti/icssg/icssg_prueth.c ++++ b/drivers/net/ethernet/ti/icssg/icssg_prueth.c +@@ -2070,7 +2070,7 @@ static int prueth_probe(struct platform_device *pdev) + &prueth->shram); + if (ret) { + dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret); +- pruss_put(prueth->pruss); ++ goto put_pruss; + } + + prueth->sram_pool = of_gen_pool_get(np, "sram", 0); +@@ -2222,6 +2222,8 @@ static int prueth_probe(struct platform_device *pdev) + + put_mem: + pruss_release_mem_region(prueth->pruss, &prueth->shram); ++ ++put_pruss: + pruss_put(prueth->pruss); + + put_cores: diff --git a/recipes-kernel/linux/files/patches-6.1/0070-arm64-dts-ti-iot2050-Drop-unused-ecap0-PWM.patch b/recipes-kernel/linux/files/patches-6.1/0070-arm64-dts-ti-iot2050-Drop-unused-ecap0-PWM.patch new file mode 100644 index 000000000..29cea02ec --- /dev/null +++ b/recipes-kernel/linux/files/patches-6.1/0070-arm64-dts-ti-iot2050-Drop-unused-ecap0-PWM.patch @@ -0,0 +1,43 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: Jan Kiszka +Date: Mon, 23 Oct 2023 07:09:44 +0200 +Subject: [PATCH] arm64: dts: ti: iot2050: Drop unused ecap0 PWM + +In fact, this was never used by the final device, only dates back to +first prototypes. + +Signed-off-by: Jan Kiszka +[Backported from https://lore.kernel.org/lkml/6131d44e0505ca3efbb9039e5f2b637a3e139312.1699087938.git.jan.kiszka@siemens.com/] +--- + arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 11 ----------- + 1 file changed, 11 deletions(-) + +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +index 28f870c94150..7578a1f64739 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +@@ -351,12 +351,6 @@ AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */ + AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */ + >; + }; +- +- ecap0_pins_default: ecap0-default-pins { +- pinctrl-single,pins = < +- AM65X_IOPAD(0x0010, PIN_INPUT, 0) /* (D21) ECAP0_IN_APWM_OUT */ +- >; +- }; + }; + + &wkup_uart0 { +@@ -549,11 +543,6 @@ &mcu_cpsw { + status = "disabled"; + }; + +-&ecap0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&ecap0_pins_default>; +-}; +- + &sdhci1 { + pinctrl-names = "default"; + pinctrl-0 = <&main_mmc1_pins_default>; diff --git a/recipes-kernel/linux/files/patches-6.1/0066-arm64-dts-ti-iot2050-Definitions-for-runtime-pinmuxi.patch b/recipes-kernel/linux/files/patches-6.1/0071-arm64-dts-ti-iot2050-Definitions-for-runtime-pinmuxi.patch similarity index 73% rename from recipes-kernel/linux/files/patches-6.1/0066-arm64-dts-ti-iot2050-Definitions-for-runtime-pinmuxi.patch rename to recipes-kernel/linux/files/patches-6.1/0071-arm64-dts-ti-iot2050-Definitions-for-runtime-pinmuxi.patch index 9ce627c80..041ee15ef 100644 --- a/recipes-kernel/linux/files/patches-6.1/0066-arm64-dts-ti-iot2050-Definitions-for-runtime-pinmuxi.patch +++ b/recipes-kernel/linux/files/patches-6.1/0071-arm64-dts-ti-iot2050-Definitions-for-runtime-pinmuxi.patch @@ -1,6 +1,6 @@ From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Benedikt Niedermayr -Date: Tue, 21 Feb 2023 11:03:42 +0100 +Date: Fri, 27 Oct 2023 13:27:33 +0200 Subject: [PATCH] arm64: dts: ti: iot2050: Definitions for runtime pinmuxing Add multiple device tree nodes in order to support @@ -14,36 +14,38 @@ pinconf and pinmux accessing the same 32-Bit register and setting the function mask to 32-Bit allows writes to the whole register. Signed-off-by: Benedikt Niedermayr -[Siemens patch from 5.10] +[Jan: fix node name style] +Signed-off-by: Jan Kiszka +[Taken from https://lore.kernel.org/lkml/3f90f3e521758622aa9b10f030cf0de1e68e77a4.1699087938.git.jan.kiszka@siemens.com/} --- - .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 669 +++++++++++++++++- - .../dts/ti/k3-am6548-iot2050-advanced-m2.dts | 5 +- - 2 files changed, 631 insertions(+), 43 deletions(-) + .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 668 ++++++++++++++++-- + .../dts/ti/k3-am6548-iot2050-advanced-m2.dts | 4 +- + 2 files changed, 629 insertions(+), 43 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -index 81cc6eb11797..e26a164e6a08 100644 +index 7578a1f64739..b50d44a0c983 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -@@ -188,6 +188,425 @@ icssg0_emac1: port@1 { +@@ -110,6 +110,425 @@ dp_refclk: clock { }; &wkup_pmx0 { + pinctrl-names = -+ "default", -+ "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown", -+ "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown", -+ "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown", -+ "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown", -+ "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown", -+ "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown", -+ "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown", -+ "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown", -+ "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown", -+ "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown", -+ "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown", -+ "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown", -+ "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown", -+ "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown"; ++ "default", ++ "d0-uart0-rxd", "d0-gpio", "d0-gpio-pullup", "d0-gpio-pulldown", ++ "d1-uart0-txd", "d1-gpio", "d1-gpio-pullup", "d1-gpio-pulldown", ++ "d2-uart0-ctsn", "d2-gpio", "d2-gpio-pullup", "d2-gpio-pulldown", ++ "d3-uart0-rtsn", "d3-gpio", "d3-gpio-pullup", "d3-gpio-pulldown", ++ "d10-spi0-cs0", "d10-gpio", "d10-gpio-pullup", "d10-gpio-pulldown", ++ "d11-spi0-d0", "d11-gpio", "d11-gpio-pullup", "d11-gpio-pulldown", ++ "d12-spi0-d1", "d12-gpio", "d12-gpio-pullup", "d12-gpio-pulldown", ++ "d13-spi0-clk", "d13-gpio", "d13-gpio-pullup", "d13-gpio-pulldown", ++ "a0-gpio", "a0-gpio-pullup", "a0-gpio-pulldown", ++ "a1-gpio", "a1-gpio-pullup", "a1-gpio-pulldown", ++ "a2-gpio", "a2-gpio-pullup", "a2-gpio-pulldown", ++ "a3-gpio", "a3-gpio-pullup", "a3-gpio-pulldown", ++ "a4-gpio", "a4-gpio-pullup", "a4-gpio-pulldown", ++ "a5-gpio", "a5-gpio-pullup", "a5-gpio-pulldown"; + + pinctrl-0 = <&d0_uart0_rxd>; + pinctrl-1 = <&d0_uart0_rxd>; @@ -97,364 +99,364 @@ index 81cc6eb11797..e26a164e6a08 100644 + pinctrl-49 = <&a5_gpio_pullup>; + pinctrl-50 = <&a5_gpio_pulldown>; + -+ d0_uart0_rxd: d0-uart0-rxd { ++ d0_uart0_rxd: d0-uart0-rxd-pins { + pinctrl-single,pins = < + /* (P4) MCU_UART0_RXD */ + AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) + >; + }; + -+ d0_gpio: d0-gpio { ++ d0_gpio: d0-gpio-pins { + pinctrl-single,pins = < + /* (P4) WKUP_GPIO0_29 */ + AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 7) + >; + }; + -+ d0_gpio_pullup: d0-gpio-pullup { ++ d0_gpio_pullup: d0-gpio-pullup-pins { + pinctrl-single,pins = < + /* (P4) WKUP_GPIO0_29 */ + AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d0_gpio_pulldown: d0-gpio-pulldown { ++ d0_gpio_pulldown: d0-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (P4) WKUP_GPIO0_29 */ + AM65X_WKUP_IOPAD(0x0044, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d1_uart0_txd: d1-uart0-txd { ++ d1_uart0_txd: d1-uart0-txd-pins { + pinctrl-single,pins = < + /* (P5) MCU_UART0_TXD */ + AM65X_WKUP_IOPAD(0x0048, PIN_OUTPUT, 4) + >; + }; + -+ d1_gpio: d1-gpio { ++ d1_gpio: d1-gpio-pins { + pinctrl-single,pins = < + /* (P5) WKUP_GPIO0_30 */ + AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) + >; + }; + -+ d1_gpio_pullup: d1-gpio-pullup { ++ d1_gpio_pullup: d1-gpio-pullup-pins { + pinctrl-single,pins = < + /* (P5) WKUP_GPIO0_30 */ + AM65X_WKUP_IOPAD(0x0048, PIN_INPUT, 7) + >; + }; + -+ d1_gpio_pulldown: d1-gpio-pulldown { ++ d1_gpio_pulldown: d1-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (P5) WKUP_GPIO0_30 */ + AM65X_WKUP_IOPAD(0x0048, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d2_uart0_ctsn: d2-uart0-ctsn { ++ d2_uart0_ctsn: d2-uart0-ctsn-pins { + pinctrl-single,pins = < + /* (P1) MCU_UART0_CTSn */ + AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 4) + >; + }; + -+ d2_gpio: d2-gpio { ++ d2_gpio: d2-gpio-pins { + pinctrl-single,pins = < + /* (P5) WKUP_GPIO0_31 */ + AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) + >; + }; + -+ d2_gpio_pullup: d2-gpio-pullup { ++ d2_gpio_pullup: d2-gpio-pullup-pins { + pinctrl-single,pins = < + /* (P5) WKUP_GPIO0_31 */ + AM65X_WKUP_IOPAD(0x004C, PIN_INPUT, 7) + >; + }; + -+ d2_gpio_pulldown: d2-gpio-pulldown { ++ d2_gpio_pulldown: d2-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (P5) WKUP_GPIO0_31 */ + AM65X_WKUP_IOPAD(0x004C, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d3_uart0_rtsn: d3-uart0-rtsn { ++ d3_uart0_rtsn: d3-uart0-rtsn-pins { + pinctrl-single,pins = < + /* (N3) MCU_UART0_RTSn */ + AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 4) + >; + }; + -+ d3_gpio: d3-gpio { ++ d3_gpio: d3-gpio-pins { + pinctrl-single,pins = < + /* (N3) WKUP_GPIO0_33 */ + AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) + >; + }; + -+ d3_gpio_pullup: d3-gpio-pullup { ++ d3_gpio_pullup: d3-gpio-pullup-pins { + pinctrl-single,pins = < + /* (N3) WKUP_GPIO0_33 */ + AM65X_WKUP_IOPAD(0x0054, PIN_INPUT, 7) + >; + }; + -+ d3_gpio_pulldown: d3-gpio-pulldown { ++ d3_gpio_pulldown: d3-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (N3) WKUP_GPIO0_33 */ + AM65X_WKUP_IOPAD(0x0054, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d10_spi0_cs0: d10-spi0-cs0 { ++ d10_spi0_cs0: d10-spi0-cs0-pins { + pinctrl-single,pins = < + /* (Y4) MCU_SPI0_CS0 */ + AM65X_WKUP_IOPAD(0x009c, PIN_OUTPUT, 0) + >; + }; + -+ d10_gpio: d10-gpio { ++ d10_gpio: d10-gpio-pins { + pinctrl-single,pins = < + /* (Y4) WKUP_GPIO0_51 */ + AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) + >; + }; + -+ d10_gpio_pullup: d10-gpio-pullup { ++ d10_gpio_pullup: d10-gpio-pullup-pins { + pinctrl-single,pins = < + /* (Y4) WKUP_GPIO0_51 */ + AM65X_WKUP_IOPAD(0x009c, PIN_INPUT, 7) + >; + }; + -+ d10_gpio_pulldown: d10-gpio-pulldown { ++ d10_gpio_pulldown: d10-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (Y4) WKUP_GPIO0_51 */ + AM65X_WKUP_IOPAD(0x009c, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d11_spi0_d0: d11-spi0-d0 { ++ d11_spi0_d0: d11-spi0-d0-pins { + pinctrl-single,pins = < + /* (Y3) MCU_SPI0_D0 */ + AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 0) + >; + }; + -+ d11_gpio: d11-gpio { ++ d11_gpio: d11-gpio-pins { + pinctrl-single,pins = < + /* (Y3) WKUP_GPIO0_49 */ + AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) + >; + }; + -+ d11_gpio_pullup: d11-gpio-pullup { ++ d11_gpio_pullup: d11-gpio-pullup-pins { + pinctrl-single,pins = < + /* (Y3) WKUP_GPIO0_49 */ + AM65X_WKUP_IOPAD(0x0094, PIN_INPUT, 7) + >; + }; + -+ d11_gpio_pulldown: d11-gpio-pulldown { ++ d11_gpio_pulldown: d11-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (Y3) WKUP_GPIO0_49 */ + AM65X_WKUP_IOPAD(0x0094, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d12_spi0_d1: d12-spi0-d1 { ++ d12_spi0_d1: d12-spi0-d1-pins { + pinctrl-single,pins = < + /* (Y2) MCU_SPI0_D1 */ + AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 0) + >; + }; + -+ d12_gpio: d12-gpio { ++ d12_gpio: d12-gpio-pins { + pinctrl-single,pins = < + /* (Y2) WKUP_GPIO0_50 */ + AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) + >; + }; + -+ d12_gpio_pullup: d12-gpio-pullup { ++ d12_gpio_pullup: d12-gpio-pullup-pins { + pinctrl-single,pins = < + /* (Y2) WKUP_GPIO0_50 */ + AM65X_WKUP_IOPAD(0x0098, PIN_INPUT, 7) + >; + }; + -+ d12_gpio_pulldown: d12-gpio-pulldown { ++ d12_gpio_pulldown: d12-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (Y2) WKUP_GPIO0_50 */ + AM65X_WKUP_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d13_spi0_clk: d13-spi0-clk { ++ d13_spi0_clk: d13-spi0-clk-pins { + pinctrl-single,pins = < + /* (Y1) MCU_SPI0_CLK */ + AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 0) + >; + }; + -+ d13_gpio: d13-gpio { ++ d13_gpio: d13-gpio-pins { + pinctrl-single,pins = < + /* (Y1) WKUP_GPIO0_48 */ + AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) + >; + }; + -+ d13_gpio_pullup: d13-gpio-pullup { ++ d13_gpio_pullup: d13-gpio-pullup-pins { + pinctrl-single,pins = < + /* (Y1) WKUP_GPIO0_48 */ + AM65X_WKUP_IOPAD(0x0090, PIN_INPUT, 7) + >; + }; + -+ d13_gpio_pulldown: d13-gpio-pulldown { ++ d13_gpio_pulldown: d13-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (Y1) WKUP_GPIO0_48 */ + AM65X_WKUP_IOPAD(0x0090, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ a0_gpio: a0-gpio { ++ a0_gpio: a0-gpio-pins { + pinctrl-single,pins = < + /* (L6) WKUP_GPIO0_45 */ + AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) + >; + }; + -+ a0_gpio_pullup: a0-gpio-pullup { ++ a0_gpio_pullup: a0-gpio-pullup-pins { + pinctrl-single,pins = < + /* (L6) WKUP_GPIO0_45 */ + AM65X_WKUP_IOPAD(0x0084, PIN_INPUT, 7) + >; + }; + -+ a0_gpio_pulldown: a0-gpio-pulldown { ++ a0_gpio_pulldown: a0-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (L6) WKUP_GPIO0_45 */ + AM65X_WKUP_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ a1_gpio: a1-gpio { ++ a1_gpio: a1-gpio-pins { + pinctrl-single,pins = < + /* (M6) WKUP_GPIO0_44 */ + AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) + >; + }; + -+ a1_gpio_pullup: a1-gpio-pullup { ++ a1_gpio_pullup: a1-gpio-pullup-pins { + pinctrl-single,pins = < + /* (M6) WKUP_GPIO0_44 */ + AM65X_WKUP_IOPAD(0x0080, PIN_INPUT, 7) + >; + }; + -+ a1_gpio_pulldown: a1-gpio-pulldown { ++ a1_gpio_pulldown: a1-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (M6) WKUP_GPIO0_44 */ + AM65X_WKUP_IOPAD(0x0080, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ a2_gpio: a2-gpio { ++ a2_gpio: a2-gpio-pins { + pinctrl-single,pins = < + /* (L5) WKUP_GPIO0_43 */ + AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) + >; + }; + -+ a2_gpio_pullup: a2-gpio-pullup { ++ a2_gpio_pullup: a2-gpio-pullup-pins { + pinctrl-single,pins = < + /* (L5) WKUP_GPIO0_43 */ + AM65X_WKUP_IOPAD(0x007C, PIN_INPUT, 7) + >; + }; + -+ a2_gpio_pulldown: a2-gpio-pulldown { ++ a2_gpio_pulldown: a2-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (L5) WKUP_GPIO0_43 */ + AM65X_WKUP_IOPAD(0x007C, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ a3_gpio: a3-gpio { ++ a3_gpio: a3-gpio-pins { + pinctrl-single,pins = < + /* (M5) WKUP_GPIO0_39 */ + AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) + >; + }; + -+ a3_gpio_pullup: a3-gpio-pullup { ++ a3_gpio_pullup: a3-gpio-pullup-pins { + pinctrl-single,pins = < + /* (M5) WKUP_GPIO0_39 */ + AM65X_WKUP_IOPAD(0x006C, PIN_INPUT, 7) + >; + }; + -+ a3_gpio_pulldown: a3-gpio-pulldown { ++ a3_gpio_pulldown: a3-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (M5) WKUP_GPIO0_39 */ + AM65X_WKUP_IOPAD(0x006C, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ a4_gpio: a4-gpio { ++ a4_gpio: a4-gpio-pins { + pinctrl-single,pins = < + /* (L2) WKUP_GPIO0_42 */ + AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) + >; + }; + -+ a4_gpio_pullup: a4-gpio-pullup { ++ a4_gpio_pullup: a4-gpio-pullup-pins { + pinctrl-single,pins = < + /* (L2) WKUP_GPIO0_42 */ + AM65X_WKUP_IOPAD(0x0078, PIN_INPUT, 7) + >; + }; + -+ a4_gpio_pulldown: a4-gpio-pulldown { ++ a4_gpio_pulldown: a4-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (L2) WKUP_GPIO0_42 */ + AM65X_WKUP_IOPAD(0x0078, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ a5_gpio: a5-gpio { ++ a5_gpio: a5-gpio-pins { + pinctrl-single,pins = < + /* (N5) WKUP_GPIO0_35 */ + AM65X_WKUP_IOPAD(0x005C, PIN_INPUT, 7) + >; + }; + -+ a5_gpio_pullup: a5-gpio-pullup { ++ a5_gpio_pullup: a5-gpio-pullup-pins { + pinctrl-single,pins = < + /* (N5) WKUP_GPIO0_35 */ + AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLUP, 7) + >; + }; + -+ a5_gpio_pulldown: a5-gpio-pulldown { ++ a5_gpio_pulldown: a5-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (N5) WKUP_GPIO0_35 */ + AM65X_WKUP_IOPAD(0x005C, PIN_INPUT_PULLDOWN, 7) + >; + }; + - wkup_i2c0_pins_default: wkup-i2c0-pins-default { + wkup_i2c0_pins_default: wkup-i2c0-default-pins { pinctrl-single,pins = < /* (AC7) WKUP_I2C0_SCL */ -@@ -220,23 +639,6 @@ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) +@@ -142,24 +561,6 @@ AM65X_WKUP_IOPAD(0x0034, PIN_INPUT, 7) >; }; -- arduino_uart_pins_default: arduino-uart-pins-default { +- arduino_uart_pins_default: arduino-uart-default-pins { - pinctrl-single,pins = < - /* (P4) MCU_UART0_RXD */ - AM65X_WKUP_IOPAD(0x0044, PIN_INPUT, 4) @@ -463,7 +465,7 @@ index 81cc6eb11797..e26a164e6a08 100644 - >; - }; - -- arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-pins-default { +- arduino_io_d2_to_d3_pins_default: arduino-io-d2-to-d3-default-pins { - pinctrl-single,pins = < - /* (P1) WKUP_GPIO0_31 */ - AM65X_WKUP_IOPAD(0x004C, PIN_OUTPUT, 7) @@ -471,19 +473,11 @@ index 81cc6eb11797..e26a164e6a08 100644 - AM65X_WKUP_IOPAD(0x0054, PIN_OUTPUT, 7) - >; - }; - - arduino_io_oe_pins_default: arduino-io-oe-pins-default { +- + arduino_io_oe_pins_default: arduino-io-oe-default-pins { pinctrl-single,pins = < -@@ -251,6 +653,8 @@ AM65X_WKUP_IOPAD(0x0068, PIN_OUTPUT, 7) - /* (M1) WKUP_GPIO0_41 */ - AM65X_WKUP_IOPAD(0x0074, PIN_OUTPUT, 7) - >; -+ pinctrl-single,bias-pullup = <0x20000 0x20000 0x10000 0x30000>; -+ pinctrl-single,bias-pulldown = <0x00000 0x0 0x10000 0x30000>; - }; - - mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default { -@@ -316,6 +720,214 @@ AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) + /* (N4) WKUP_GPIO0_34 */ +@@ -238,6 +639,214 @@ AM65X_WKUP_IOPAD(0x003C, PIN_OUTPUT, 7) }; &main_pmx0 { @@ -527,182 +521,182 @@ index 81cc6eb11797..e26a164e6a08 100644 + pinctrl-23 = <&d9_gpio_pullup>; + pinctrl-24 = <&d9_gpio_pulldown>; + -+ d4_ehrpwm0_a: d4-ehrpwm0-a { ++ d4_ehrpwm0_a: d4-ehrpwm0-a-pins { + pinctrl-single,pins = < + /* (AG18) EHRPWM0_A */ + AM65X_IOPAD(0x0084, PIN_OUTPUT, 5) + >; + }; + -+ d4_gpio: d4-gpio { ++ d4_gpio: d4-gpio-pins { + pinctrl-single,pins = < + /* (AG18) GPIO0_33 */ + AM65X_IOPAD(0x0084, PIN_INPUT, 7) + >; + }; + -+ d4_gpio_pullup: d4-gpio-pullup { ++ d4_gpio_pullup: d4-gpio-pullup-pins { + pinctrl-single,pins = < + /* (AG18) GPIO0_33 */ + AM65X_IOPAD(0x0084, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d4_gpio_pulldown: d4-gpio-pulldown { ++ d4_gpio_pulldown: d4-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (AG18) GPIO0_33 */ + AM65X_IOPAD(0x0084, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d5_ehrpwm1_a: d5-ehrpwm1-a { ++ d5_ehrpwm1_a: d5-ehrpwm1-a-pins { + pinctrl-single,pins = < + /* (AF17) EHRPWM1_A */ + AM65X_IOPAD(0x008C, PIN_OUTPUT, 5) + >; + }; + -+ d5_gpio: d5-gpio { ++ d5_gpio: d5-gpio-pins { + pinctrl-single,pins = < + /* (AF17) GPIO0_35 */ + AM65X_IOPAD(0x008C, PIN_INPUT, 7) + >; + }; + -+ d5_gpio_pullup: d5-gpio-pullup { ++ d5_gpio_pullup: d5-gpio-pullup-pins { + pinctrl-single,pins = < + /* (AF17) GPIO0_35 */ + AM65X_IOPAD(0x008C, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d5_gpio_pulldown: d5-gpio-pulldown { ++ d5_gpio_pulldown: d5-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (AF17) GPIO0_35 */ + AM65X_IOPAD(0x008C, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d6_ehrpwm2_a: d6-ehrpwm2-a { ++ d6_ehrpwm2_a: d6-ehrpwm2-a-pins { + pinctrl-single,pins = < + /* (AH16) EHRPWM2_A */ + AM65X_IOPAD(0x0098, PIN_OUTPUT, 5) + >; + }; + -+ d6_gpio: d6-gpio { ++ d6_gpio: d6-gpio-pins { + pinctrl-single,pins = < + /* (AH16) GPIO0_38 */ + AM65X_IOPAD(0x0098, PIN_INPUT, 7) + >; + }; + -+ d6_gpio_pullup: d6-gpio-pullup { ++ d6_gpio_pullup: d6-gpio-pullup-pins { + pinctrl-single,pins = < + /* (AH16) GPIO0_38 */ + AM65X_IOPAD(0x0098, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d6_gpio_pulldown: d6-gpio-pulldown { ++ d6_gpio_pulldown: d6-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (AH16) GPIO0_38 */ + AM65X_IOPAD(0x0098, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d7_ehrpwm3_a: d7-ehrpwm3-a { ++ d7_ehrpwm3_a: d7-ehrpwm3-a-pins { + pinctrl-single,pins = < + /* (AH15) EHRPWM3_A */ + AM65X_IOPAD(0x00AC, PIN_OUTPUT, 5) + >; + }; + -+ d7_gpio: d7-gpio { ++ d7_gpio: d7-gpio-pins { + pinctrl-single,pins = < + /* (AH15) GPIO0_43 */ + AM65X_IOPAD(0x00AC, PIN_INPUT, 7) + >; + }; + -+ d7_gpio_pullup: d7-gpio-pullup { ++ d7_gpio_pullup: d7-gpio-pullup-pins { + pinctrl-single,pins = < + /* (AH15) GPIO0_43 */ + AM65X_IOPAD(0x00AC, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d7_gpio_pulldown: d7-gpio-pulldown { ++ d7_gpio_pulldown: d7-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (AH15) GPIO0_43 */ + AM65X_IOPAD(0x00AC, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d8_ehrpwm4_a: d8-ehrpwm4-a { ++ d8_ehrpwm4_a: d8-ehrpwm4-a-pins { + pinctrl-single,pins = < + /* (AG15) EHRPWM4_A */ + AM65X_IOPAD(0x00C0, PIN_OUTPUT, 5) + >; + }; + -+ d8_gpio: d8-gpio { ++ d8_gpio: d8-gpio-pins { + pinctrl-single,pins = < + /* (AG15) GPIO0_48 */ + AM65X_IOPAD(0x00C0, PIN_INPUT, 7) + >; + }; + -+ d8_gpio_pullup: d8-gpio-pullup { ++ d8_gpio_pullup: d8-gpio-pullup-pins { + pinctrl-single,pins = < + /* (AG15) GPIO0_48 */ + AM65X_IOPAD(0x00C0, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d8_gpio_pulldown: d8-gpio-pulldown { ++ d8_gpio_pulldown: d8-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (AG15) GPIO0_48 */ + AM65X_IOPAD(0x00C0, PIN_INPUT_PULLDOWN, 7) + >; + }; + -+ d9_ehrpwm5_a: d9-ehrpwm5-a { ++ d9_ehrpwm5_a: d9-ehrpwm5-a-pins { + pinctrl-single,pins = < + /* (AD15) EHRPWM5_A */ + AM65X_IOPAD(0x00CC, PIN_OUTPUT, 5) + >; + }; + -+ d9_gpio: d9-gpio { ++ d9_gpio: d9-gpio-pins { + pinctrl-single,pins = < + /* (AD15) GPIO0_51 */ + AM65X_IOPAD(0x00CC, PIN_INPUT, 7) + >; + }; + -+ d9_gpio_pullup: d9-gpio-pullup { ++ d9_gpio_pullup: d9-gpio-pullup-pins { + pinctrl-single,pins = < + /* (AD15) GPIO0_51 */ + AM65X_IOPAD(0x00CC, PIN_INPUT_PULLUP, 7) + >; + }; + -+ d9_gpio_pulldown: d9-gpio-pulldown { ++ d9_gpio_pulldown: d9-gpio-pulldown-pins { + pinctrl-single,pins = < + /* (AD15) GPIO0_51 */ + AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7) + >; + }; + - main_uart1_pins_default: main-uart1-pins-default { + main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins = < AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */ -@@ -357,17 +969,6 @@ AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ +@@ -279,17 +888,6 @@ AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */ >; }; -- arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-pins-default { +- arduino_io_d4_to_d9_pins_default: arduino-io-d4-to-d9-default-pins { - pinctrl-single,pins = < - AM65X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (AG18) GPIO0_33 */ - AM65X_IOPAD(0x008C, PIN_OUTPUT, 7) /* (AF17) GPIO0_35 */ @@ -713,10 +707,10 @@ index 81cc6eb11797..e26a164e6a08 100644 - >; - }; - - dss_vout1_pins_default: dss-vout1-pins-default { + dss_vout1_pins_default: dss-vout1-default-pins { pinctrl-single,pins = < AM65X_IOPAD(0x0000, PIN_OUTPUT, 1) /* VOUT1_DATA0 */ -@@ -488,14 +1089,7 @@ &main_uart2 { +@@ -367,14 +965,7 @@ &main_uart2 { status = "disabled"; }; @@ -731,42 +725,36 @@ index 81cc6eb11797..e26a164e6a08 100644 gpio-line-names = "main_gpio0-base", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", -@@ -508,12 +1102,12 @@ &main_gpio0 { +@@ -387,7 +978,6 @@ &main_gpio0 { &wkup_gpio0 { pinctrl-names = "default"; - pinctrl-0 = < -- &arduino_io_d2_to_d3_pins_default - &arduino_i2c_aio_switch_pins_default - &arduino_io_oe_pins_default - &push_button_pins_default - &db9_com_mode_pins_default - >; -+ - gpio-line-names = - /* 0..9 */ - "wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0", -@@ -690,9 +1284,6 @@ &usb1 { + pinctrl-0 = +- <&arduino_io_d2_to_d3_pins_default>, + <&arduino_i2c_aio_switch_pins_default>, + <&arduino_io_oe_pins_default>, + <&push_button_pins_default>, +@@ -563,9 +1153,7 @@ &usb1 { }; &mcu_spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&mcu_spi0_pins_default>; - ++ status = "okay"; #address-cells = <1>; #size-cells = <0>; ti,pindir-d0-out-d1-in; diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts -index 9400e35882a6..b3a21765c9ed 100644 +index 774eb14ac907..8301c35c31b3 100644 --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts -@@ -66,10 +66,7 @@ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ +@@ -66,9 +66,7 @@ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7) /* (C23) GPIO1_89 */ &main_gpio0 { pinctrl-names = "default"; -- pinctrl-0 = < -- &main_m2_pcie_mux_control -- &arduino_io_d4_to_d9_pins_default -- >; +- pinctrl-0 = +- <&main_m2_pcie_mux_control>, +- <&arduino_io_d4_to_d9_pins_default>; + pinctrl-0 = <&main_m2_pcie_mux_control>; }; diff --git a/recipes-kernel/linux/files/patches-6.1/0067-arm64-dts-ti-iot2050-Refactor-the-m.2-and-minipcie-p.patch b/recipes-kernel/linux/files/patches-6.1/0072-arm64-dts-ti-iot2050-Refactor-the-m.2-and-minipcie-p.patch similarity index 67% rename from recipes-kernel/linux/files/patches-6.1/0067-arm64-dts-ti-iot2050-Refactor-the-m.2-and-minipcie-p.patch rename to recipes-kernel/linux/files/patches-6.1/0072-arm64-dts-ti-iot2050-Refactor-the-m.2-and-minipcie-p.patch index 07a010250..c0ebecca6 100644 --- a/recipes-kernel/linux/files/patches-6.1/0067-arm64-dts-ti-iot2050-Refactor-the-m.2-and-minipcie-p.patch +++ b/recipes-kernel/linux/files/patches-6.1/0072-arm64-dts-ti-iot2050-Refactor-the-m.2-and-minipcie-p.patch @@ -10,47 +10,47 @@ This can fix some miniPCIE card hang issue, by forcing a power on reset during boot. Signed-off-by: Baocheng Su -[Siemens patch from 5.10] +Signed-off-by: Jan Kiszka +[Taken from https://lore.kernel.org/lkml/8b2f8c1698421b8d0694eb337ad7ea2320d76aa6.1699087938.git.jan.kiszka@siemens.com/] --- - .../arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi | 5 ++++- + .../arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi | 4 +++- arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi | 11 +++++++++++ .../boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts | 8 +------- - 3 files changed, 16 insertions(+), 8 deletions(-) + 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi -index e73458ca6900..0dada0b39e36 100644 +index e9419c4fe605..e9b57b87e42e 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg2.dtsi -@@ -20,7 +20,10 @@ AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7) +@@ -20,7 +20,9 @@ AM65X_IOPAD(0x01e0, PIN_OUTPUT, 7) &main_gpio1 { pinctrl-names = "default"; - pinctrl-0 = <&cp2102n_reset_pin_default>; -+ pinctrl-0 = < -+ &main_pcie_enable_pins_default -+ &cp2102n_reset_pin_default -+ >; ++ pinctrl-0 = ++ <&main_pcie_enable_pins_default>, ++ <&cp2102n_reset_pin_default>; gpio-line-names = "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -index e26a164e6a08..f142e2b8753b 100644 +index b50d44a0c983..75d87e6ebd66 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -@@ -928,6 +928,12 @@ AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7) +@@ -847,6 +847,12 @@ AM65X_IOPAD(0x00CC, PIN_INPUT_PULLDOWN, 7) >; }; -+ main_pcie_enable_pins_default: main-pcie-enable-pins-default { ++ main_pcie_enable_pins_default: main-pcie-enable-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ + >; + }; + - main_uart1_pins_default: main-uart1-pins-default { + main_uart1_pins_default: main-uart1-default-pins { pinctrl-single,pins = < AM65X_IOPAD(0x0174, PIN_INPUT, 6) /* (AE23) UART1_RXD */ -@@ -1099,6 +1105,11 @@ &main_gpio0 { +@@ -975,6 +981,11 @@ &main_gpio0 { "", "IO9"; }; @@ -61,30 +61,30 @@ index e26a164e6a08..f142e2b8753b 100644 + &wkup_gpio0 { pinctrl-names = "default"; - pinctrl-0 = < + pinctrl-0 = diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts -index b3a21765c9ed..663ff4d501c2 100644 +index 8301c35c31b3..bd6f2e696e94 100644 --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts @@ -27,12 +27,6 @@ &mcu_r5fss0 { }; &main_pmx0 { -- main_m2_enable_pins_default: main-m2-enable-pins-default { +- main_m2_enable_pins_default: main-m2-enable-default-pins { - pinctrl-single,pins = < - AM65X_IOPAD(0x01c4, PIN_INPUT_PULLUP, 7) /* (AH13) GPIO1_17 */ - >; - }; - - main_bkey_pcie_reset: main-bkey-pcie-reset { + main_bkey_pcie_reset: main-bkey-pcie-reset-default-pins { pinctrl-single,pins = < AM65X_IOPAD(0x01bc, PIN_OUTPUT_PULLUP, 7) /* (AG13) GPIO1_15 */ @@ -72,7 +66,7 @@ &main_gpio0 { &main_gpio1 { pinctrl-names = "default"; - pinctrl-0 = < -- &main_m2_enable_pins_default -+ &main_pcie_enable_pins_default - &main_pmx0_m2_config_pins_default - &main_pmx1_m2_config_pins_default - &cp2102n_reset_pin_default + pinctrl-0 = +- <&main_m2_enable_pins_default>, ++ <&main_pcie_enable_pins_default>, + <&main_pmx0_m2_config_pins_default>, + <&main_pmx1_m2_config_pins_default>, + <&cp2102n_reset_pin_default>; diff --git a/recipes-kernel/linux/files/patches-6.1/0065-arm64-dts-ti-iot2050-Add-icssg-prueth-nodes-for-PG1-.patch b/recipes-kernel/linux/files/patches-6.1/0073-arm64-dts-ti-iot2050-Add-icssg-prueth-nodes-for-PG2-.patch similarity index 78% rename from recipes-kernel/linux/files/patches-6.1/0065-arm64-dts-ti-iot2050-Add-icssg-prueth-nodes-for-PG1-.patch rename to recipes-kernel/linux/files/patches-6.1/0073-arm64-dts-ti-iot2050-Add-icssg-prueth-nodes-for-PG2-.patch index 240e97f24..15fb3a00f 100644 --- a/recipes-kernel/linux/files/patches-6.1/0065-arm64-dts-ti-iot2050-Add-icssg-prueth-nodes-for-PG1-.patch +++ b/recipes-kernel/linux/files/patches-6.1/0073-arm64-dts-ti-iot2050-Add-icssg-prueth-nodes-for-PG2-.patch @@ -1,20 +1,47 @@ From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Jan Kiszka Date: Sat, 27 Jun 2020 10:53:13 +0200 -Subject: [PATCH] arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG1 and - PG2 devices +Subject: [PATCH] arm64: dts: ti: iot2050: Add icssg-prueth nodes for PG2 + devices -Add the required nodes to enable ICSSG SR1.0 and SR2.0 based prueth -networking. +Add the required nodes to enable ICSSG SR2.0 based prueth networking. + +As the driver still needs to be extended for SR1.0 support, keep related +nodes disabled on PG1 devices. Signed-off-by: Jan Kiszka -[Siemens patch from 5.10] +[Taken from https://lore.kernel.org/lkml/565d31a5fd29c4dd0cf28e347049a1247a6e446c.1699087938.git.jan.kiszka@siemens.com/] --- - .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 129 +++++++++++++++++- - 1 file changed, 128 insertions(+), 1 deletion(-) + .../dts/ti/k3-am65-iot2050-common-pg1.dtsi | 10 +- + .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 128 ++++++++++++++++++ + 2 files changed, 137 insertions(+), 1 deletion(-) +diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi +index 51f902fa35a7..1d1979859583 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common-pg1.dtsi +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Copyright (c) Siemens AG, 2021 ++ * Copyright (c) Siemens AG, 2021-2023 + * + * Authors: + * Jan Kiszka +@@ -44,3 +44,11 @@ &tx_pru2_0 { + &tx_pru2_1 { + status = "disabled"; + }; ++ ++&icssg0_eth { ++ status = "disabled"; ++}; ++ ++&icssg0_mdio { ++ status = "disabled"; ++}; diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -index 5644bc0a8dda..81cc6eb11797 100644 +index 75d87e6ebd66..9c1efee039f6 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -11,12 +11,15 @@ @@ -33,7 +60,7 @@ index 5644bc0a8dda..81cc6eb11797 100644 }; chosen { -@@ -108,6 +111,80 @@ dp_refclk: clock { +@@ -107,6 +110,76 @@ dp_refclk: clock { #clock-cells = <0>; clock-frequency = <19200000>; }; @@ -77,15 +104,11 @@ index 5644bc0a8dda..81cc6eb11797 100644 + <&main_udmap 0xc105>, /* egress slice 1 */ + <&main_udmap 0xc106>, /* egress slice 1 */ + <&main_udmap 0xc107>, /* egress slice 1 */ -+ + <&main_udmap 0x4100>, /* ingress slice 0 */ -+ <&main_udmap 0x4101>, /* ingress slice 1 */ -+ <&main_udmap 0x4102>, /* mgmnt rsp slice 0 */ -+ <&main_udmap 0x4103>; /* mgmnt rsp slice 1 */ ++ <&main_udmap 0x4101>; /* ingress slice 1 */ + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", -+ "rx0", "rx1", -+ "rxmgm0", "rxmgm1"; ++ "rx0", "rx1"; + + ethernet-ports { + #address-cells = <1>; @@ -114,19 +137,19 @@ index 5644bc0a8dda..81cc6eb11797 100644 }; &wkup_pmx0 { -@@ -336,6 +413,43 @@ AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */ +@@ -939,6 +1012,43 @@ AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) I2C2_SCL */ AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) I2C2_SDA */ >; }; + -+ icssg0_mdio_pins_default: icssg0-mdio-pins-default { ++ icssg0_mdio_pins_default: icssg0-mdio-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0294, PIN_INPUT, 0) /* (AE26) PRG0_MDIO0_MDIO */ + AM65X_IOPAD(0x0298, PIN_OUTPUT, 0) /* (AE28) PRG0_MDIO0_MDC */ + >; + }; + -+ icssg0_rgmii_pins_default: icssg0-rgmii-pins-default { ++ icssg0_rgmii_pins_default: icssg0-rgmii-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0244, PIN_INPUT, 2) /* (AB28) PRG0_PRU1_GPO0.PRG0_RGMII2_RD0 */ + AM65X_IOPAD(0x0248, PIN_INPUT, 2) /* (AC28) PRG0_PRU1_GPO1.PRG0_RGMII2_RD1 */ @@ -158,11 +181,13 @@ index 5644bc0a8dda..81cc6eb11797 100644 }; &main_pmx1 { -@@ -789,7 +903,20 @@ &mcu_rti1 { +@@ -1391,3 +1501,21 @@ &mcasp1 { + &mcasp2 { + status = "disabled"; }; - - &icssg0_mdio { -- status = "disabled"; ++ ++&icssg0_mdio { ++ status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&icssg0_mdio_pins_default>; + @@ -177,6 +202,4 @@ index 5644bc0a8dda..81cc6eb11797 100644 + ti,rx-internal-delay = ; + ti,fifo-depth = ; + }; - }; - - &icssg1_mdio { ++}; diff --git a/recipes-kernel/linux/files/patches-6.1/0064-WIP-arm64-dts-ti-iot2050-Add-node-for-generic-spidev.patch b/recipes-kernel/linux/files/patches-6.1/0074-WIP-arm64-dts-ti-iot2050-Add-node-for-generic-spidev.patch similarity index 93% rename from recipes-kernel/linux/files/patches-6.1/0064-WIP-arm64-dts-ti-iot2050-Add-node-for-generic-spidev.patch rename to recipes-kernel/linux/files/patches-6.1/0074-WIP-arm64-dts-ti-iot2050-Add-node-for-generic-spidev.patch index 8bbde405a..5ffe2274a 100644 --- a/recipes-kernel/linux/files/patches-6.1/0064-WIP-arm64-dts-ti-iot2050-Add-node-for-generic-spidev.patch +++ b/recipes-kernel/linux/files/patches-6.1/0074-WIP-arm64-dts-ti-iot2050-Add-node-for-generic-spidev.patch @@ -16,10 +16,10 @@ Signed-off-by: Jan Kiszka 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -index 46e7cc73b972..5644bc0a8dda 100644 +index 9c1efee039f6..297ca29b8bae 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -@@ -582,6 +582,12 @@ &mcu_spi0 { +@@ -1278,6 +1278,12 @@ &mcu_spi0 { #address-cells = <1>; #size-cells = <0>; ti,pindir-d0-out-d1-in; diff --git a/recipes-kernel/linux/files/patches-6.1/0068-arm64-dts-ti-Indicate-the-green-light-is-off-when-pa.patch b/recipes-kernel/linux/files/patches-6.1/0075-arm64-dts-ti-Indicate-the-green-light-is-off-when-pa.patch similarity index 91% rename from recipes-kernel/linux/files/patches-6.1/0068-arm64-dts-ti-Indicate-the-green-light-is-off-when-pa.patch rename to recipes-kernel/linux/files/patches-6.1/0075-arm64-dts-ti-Indicate-the-green-light-is-off-when-pa.patch index d3b904f7a..5df17aebf 100644 --- a/recipes-kernel/linux/files/patches-6.1/0068-arm64-dts-ti-Indicate-the-green-light-is-off-when-pa.patch +++ b/recipes-kernel/linux/files/patches-6.1/0075-arm64-dts-ti-Indicate-the-green-light-is-off-when-pa.patch @@ -13,10 +13,10 @@ Signed-off-by: chao zeng 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -index f142e2b8753b..debd5719f32d 100644 +index 297ca29b8bae..00a250433203 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi -@@ -87,6 +87,7 @@ status-led-red { +@@ -86,6 +86,7 @@ status-led-red { status-led-green { gpios = <&wkup_gpio0 24 GPIO_ACTIVE_HIGH>; diff --git a/recipes-kernel/linux/files/patches-6.1/0069-HACK-setting-the-RJ45-port-led-behavior.patch b/recipes-kernel/linux/files/patches-6.1/0076-HACK-setting-the-RJ45-port-led-behavior.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0069-HACK-setting-the-RJ45-port-led-behavior.patch rename to recipes-kernel/linux/files/patches-6.1/0076-HACK-setting-the-RJ45-port-led-behavior.patch diff --git a/recipes-kernel/linux/files/patches-6.1/0070-WIP-feat-extend-led-panic-indicator-on-and-off.patch b/recipes-kernel/linux/files/patches-6.1/0077-WIP-feat-extend-led-panic-indicator-on-and-off.patch similarity index 100% rename from recipes-kernel/linux/files/patches-6.1/0070-WIP-feat-extend-led-panic-indicator-on-and-off.patch rename to recipes-kernel/linux/files/patches-6.1/0077-WIP-feat-extend-led-panic-indicator-on-and-off.patch