Add endianness option

src/lib.rs

@@ -9,6 +9,7 @@
 //! ### Arguments
 //! 
 //! * `bytes` - A slice of bytes representing the encoded instruction to be parsed.
+//! * `is_big_endian` - A boolean indicating whether the bytes are in big endian format.
 //! 
 //! ### Returns
 //! 
@@ -21,7 +22,8 @@
 //! use risc_v_disassembler::{parse, ParsedInstruction32, Register};
 //! 
 //! let bytes = [0x93, 0x00, 0x51, 0x00];
-//! let parsed_instruction = parse(&bytes).unwrap();
+//! let is_big_endian = false;
+//! let parsed_instruction = parse(&bytes, is_big_endian).unwrap();
 //! 
 //! assert_eq!(parsed_instruction, ParsedInstruction32::addi {
 //!     rd: Register::x1,
@@ -42,12 +44,17 @@ pub use registers::Register;
 use instructions::{Instruction32, ParseInstruction32, DecodeInstruction32};
 use thiserror::Error;
 
-pub fn parse(bytes : &[u8]) -> Result<ParsedInstruction32, DisassemblerError> {
+pub fn parse(bytes : &[u8], is_big_endian: bool) -> Result<ParsedInstruction32, DisassemblerError> {
     if bytes.len() != 4 {
         return Err(DisassemblerError::UnsupportedInstructionLength(bytes.len()));
     }
 
-    let instruction = Instruction32::from_le_bytes(bytes.try_into().unwrap());
+    let instruction = if is_big_endian {
+        Instruction32::from_be_bytes(bytes.try_into().unwrap())
+    } else {
+        Instruction32::from_le_bytes(bytes.try_into().unwrap())
+    };
+
     let parsed_instruction = instruction
         .decode_instruction32()?
         .parse_instruction32()?;
@@ -76,9 +83,6 @@ pub enum DisassemblerError {
 
     #[error("Bit extraction error: {0}.")]
     BitExtractionError(&'static str),
-
-    #[error("Cannot convert a VarBit with size greater than {0} bits to {1}.")]
-    VarBitSizeExceeded(u8, &'static str),
 
     #[error("Bit extension error: {0}.")]
     BitExtensionError(&'static str),

tests/integration_test.rs

@@ -5,7 +5,7 @@ mod tests {
     use risc_v_disassembler::Register;
 
     /// Returns a vector of tuples containing (instruction hex, expected ParsedInstruction32) for RV32I instructions
-    fn get_rv32i_test_cases() -> Vec<(u32, ParsedInstruction32)> {
+    fn get_rv32i_be_test_cases() -> Vec<(u32, ParsedInstruction32)> {
         vec![
             // R-type instructions
             (0x00B50533, ParsedInstruction32::add { rd: Register::x10, rs1: Register::x10, rs2: Register::x11 }),
@@ -63,11 +63,21 @@ mod tests {
     }
 
     #[test]
-    fn test_rv32i_instructions() {
-        for (hex, expected) in get_rv32i_test_cases() {
-            let result = parse(&hex.to_le_bytes());
+    fn test_rv32i_instructions_le() {
+        for (hex, expected) in get_rv32i_be_test_cases() {
+            let result = parse(&hex.to_le_bytes(), false);
             assert!(result.is_ok(), "Failed to parse instruction {:#010x}", hex);
             assert_eq!(result.unwrap(), expected);
         }
     }
+
+    #[test]
+    fn test_rv32i_instructions_be() {
+        for (hex, expected) in get_rv32i_be_test_cases() {
+            let result = parse(&hex.to_be_bytes(), true);
+            assert!(result.is_ok(), "Failed to parse instruction {:#010x}", hex);
+            assert_eq!(result.unwrap(), expected);
+        }
+    }
+
 }