USRP X410 RfnocError #982

arman-maghsoudnia · 2024-12-12T15:36:08Z

arman-maghsoudnia
Dec 12, 2024

Dear all,

I am trying to run srsran (commit e5d5b44) with USRP X410. But I am encountering an error called RfnocError: OpTimeout:
I would appreciate it, if you have any ideas about this issue.

gnb output:

--== srsRAN gNB (commit e5d5b44b9) ==--

Lower PHY in quad executor mode.
Cell pci=1, bw=100 MHz, 1T1R, dl_arfcn=650000 (n78), dl_freq=3750.0 MHz, dl_ssb_arfcn=647328, ul_freq=3750.0 MHz

Available radio types: uhd.
[INFO] [UHD] linux; GNU C++ version 11.4.0; Boost_107400; UHD_4.7.0.0-0ubuntu1~jammy1
Making USRP object with args 'type=x4xx,master_clock_rate=245.76e6,send_frame_size=8000,recv_frame_size=8000'
[INFO] [LOGGING] Fastpath logging disabled at runtime.
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[DEBUG] [MPMD] Discovering MPM devices on port 49600
[INFO] [MPMD] Initializing 1 device(s) in parallel with args: mgmt_addr=128.178.122.71,type=x4xx,product=x410,serial=327B872,name=x410-00,fpga=X4_200,claimed=False,addr=128.178.122.71,master_clock_rate=245.76e6,send_frame_size=8000,recv_frame_size=8000
[DEBUG] [MPMD] Claiming mboard 0
[DEBUG] [MPMD] Device args: `mgmt_addr=128.178.122.71,type=x4xx,product=x410,serial=327B872,name=x410-00,fpga=X4_200,claimed=False,addr=128.178.122.71,master_clock_rate=245.76e6,send_frame_size=8000,recv_frame_size=8000'. RPC address: 128.178.122.71
[DEBUG] [MPMD] MPM reports device info: claimed=True,connection=remote,dboard_0_pid=16386,dboard_0_serial=327819D,dboard_1_pid=16386,dboard_1_serial=3278167,description=X400-Series Device,device_dna=400200000129A9673C3181C5,eeprom_version=,fourth_addr=128.178.122.71,fpga=X4_200,fpga_version=8.3,fpga_version_hash=c37b318.clean,fs_version=20240628134248,mender_artifact=v4.7.0.0_x4xx,mpm_sw_version=4.7.0.0-ga5ed1872,mpm_version=5.3,name=x410-00,pid=1040,product=x410,rev=7,rpc_connection=remote,serial=327B872,type=x4xx
[DEBUG] [MPMD] Found 16 motherboard sensors.
[DEBUG] [MPMD] Initializing mboard 0
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `ctrl_clk`, frequency: 40 MHz, mutable: No
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `1`, frequency: 40 MHz, mutable: No
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `bus_clk`, frequency: 200 MHz, mutable: No
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `chdr_clk`, frequency: 200 MHz, mutable: No
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `2`, frequency: 200 MHz, mutable: No
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `3`, frequency: 266.667 MHz, mutable: No
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `radio_clk`, frequency: 245.76 MHz, mutable: Yes
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `4`, frequency: 245.76 MHz, mutable: Yes
[DEBUG] [MPMD::MB_IFACE] Adding clock iface `5`, frequency: 245.76 MHz, mutable: Yes
[DEBUG] [MPMD] Path MTU for address 128.178.122.71: 1472
[DEBUG] [MPMD] Found 16 motherboard sensors.
[DEBUG] [MPMD] Found 2 updateable motherboard components.
[DEBUG] [RFNOC::MGMT] Starting topology discovery from device[local]:2/sep:1
[DEBUG] [RFNOC::MGMT] Discovered node device:1/xport:5
[DEBUG] [RFNOC::MGMT] Initialized node device:1/xport:5
[DEBUG] [RFNOC::MGMT] Discovered node device:1/xbar:0
[DEBUG] [RFNOC::MGMT] Initialized node device:1/xbar:0
[INFO] [MPM.PeriphManager] init() called with device args `fpga=X4_200,master_clock_rate=(245760000.0,),mgmt_addr=128.178.122.71,name=x410-00,product=x410,recv_frame_size=8000,send_frame_size=8000,clock_source=internal,time_source=internal,initializing=True'.
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:0
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:0
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:1
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:1
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:2
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:2
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:3
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:3
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:4
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:4
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:5
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:5
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:6
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:6
[DEBUG] [RFNOC::MGMT] Discovered node device:1/sep:7
[DEBUG] [RFNOC::MGMT] Initialized node device:1/sep:7
[DEBUG] [RFNOC::MGMT] The following endpoints are reachable from device[local]:2/sep:1
[DEBUG] [RFNOC::MGMT] * 1:0
[DEBUG] [RFNOC::MGMT] * 1:1
[DEBUG] [RFNOC::MGMT] * 1:2
[DEBUG] [RFNOC::MGMT] * 1:3
[DEBUG] [RFNOC::MGMT] * 1:4
[DEBUG] [RFNOC::MGMT] * 1:5
[DEBUG] [RFNOC::MGMT] * 1:6
[DEBUG] [RFNOC::MGMT] * 1:7
[DEBUG] [RFNOC::GRAPH] Connecting the Host to Endpoint 1:0 through Adapter 0 (0 = no preference)... 
[DEBUG] [RFNOC::MGMT] Throttling stream endpoint to 100% (0x0)
[DEBUG] [RFNOC::MGMT] Bound stream endpoint with Addr=(1,0) to EPID=2
[DEBUG] [RFNOC] Started thread uhd_ctrl_ep0001 to process messages control messages on EPID 1
[DEBUG] [RFNOC::MGMT] Established a route from EPID=1 (SW) to EPID=2
[DEBUG] [RFNOC] Created ctrlport endpoint for port 0 on EPID 1
[DEBUG] [RFNOC::GRAPH] Connection to Endpoint 1:0 completed through Device 2. Using EPIDs 1 -> 2.
[DEBUG] [RFNOC] Created ctrlport endpoint for port 2 on EPID 1
[DEBUG] [0/Radio#0] Checking compat number for FPGA component `0/Radio#0': Expecting 0.1, actual: 0.1.
[DEBUG] [0/Radio#0] Master Clock Rate is: 245.76 MHz.
[DEBUG] [0/Radio#0] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#0] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#0] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#0] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_B
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_B
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_B
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_B
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/Radio#0 (NOC ID=12ad1000)
[DEBUG] [RFNOC] Created ctrlport endpoint for port 3 on EPID 1
[DEBUG] [0/Radio#1] Checking compat number for FPGA component `0/Radio#1': Expecting 0.1, actual: 0.1.
[DEBUG] [0/Radio#1] Master Clock Rate is: 245.76 MHz.
[DEBUG] [0/Radio#1] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#1] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#1] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#1] LO step size: 10.24 MHz.
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX0_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX0_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX1_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX1_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA3_A
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA3_B
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA3_A
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA3_B
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX0_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX0_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX1_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register TX1_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA3_A
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX0_TABLE_DSA3_B
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA1
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA2
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA3_A
[DEBUG] [0/Radio#1::CPLD] Write 61 values to register RX1_TABLE_DSA3_B
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/Radio#1 (NOC ID=12ad1000)
[DEBUG] [RFNOC] Created ctrlport endpoint for port 4 on EPID 1
[DEBUG] [0/DUC#0] Checking compat number for FPGA component `0/DUC#0': Expecting 0.1, actual: 0.1.
[DEBUG] [0/DUC#0] Loading DUC with 3 halfbands and max CIC interpolation 255
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/DUC#0 (NOC ID=d0c00000)
[DEBUG] [RFNOC] Created ctrlport endpoint for port 5 on EPID 1
[DEBUG] [0/DDC#0] Checking compat number for FPGA component `0/DDC#0': Expecting 0.1, actual: 0.1.
[DEBUG] [0/DDC#0] Loading DDC with 3 halfbands and max CIC decimation 255
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/DDC#0 (NOC ID=ddc00000)
[DEBUG] [RFNOC] Created ctrlport endpoint for port 6 on EPID 1
[DEBUG] [0/DUC#1] Checking compat number for FPGA component `0/DUC#1': Expecting 0.1, actual: 0.1.
[DEBUG] [0/DUC#1] Loading DUC with 3 halfbands and max CIC interpolation 255
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/DUC#1 (NOC ID=d0c00000)
[DEBUG] [RFNOC] Created ctrlport endpoint for port 7 on EPID 1
[DEBUG] [0/DDC#1] Checking compat number for FPGA component `0/DDC#1': Expecting 0.1, actual: 0.1.
[DEBUG] [0/DDC#1] Loading DDC with 3 halfbands and max CIC decimation 255
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/DDC#1 (NOC ID=ddc00000)
[DEBUG] [RFNOC] Created ctrlport endpoint for port 8 on EPID 1
[DEBUG] [0/Replay#0] Checking compat number for FPGA component `0/Replay#0': Expecting 1.2, actual: 1.2.
[DEBUG] [RFNOC::BLOCK_CONTAINER] Registering block: 0/Replay#0 (NOC ID=4e91a000)
[DEBUG] [0/DUC#1] Not setting frequency until sampling rate is set.
[DEBUG] [0/DUC#1] Not setting frequency until sampling rate is set.
[DEBUG] [0/DDC#0] Not setting frequency until sampling rate is set.
[DEBUG] [0/DDC#0] Not setting frequency until sampling rate is set.
[DEBUG] [0/DUC#0] Not setting frequency until sampling rate is set.
[DEBUG] [0/DUC#0] Not setting frequency until sampling rate is set.
[DEBUG] [0/DDC#1] Not setting frequency until sampling rate is set.
[DEBUG] [0/DDC#1] Not setting frequency until sampling rate is set.
[DEBUG] [MB_CTRL] Synchronizing 1 timekeepers
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register TX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_B
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_B
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX0_TABLE_DSA3_B
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA1
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA2
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_A
[DEBUG] [0/Radio#0::CPLD] Write 61 values to register RX1_TABLE_DSA3_B
[DEBUG] [CONVERT] get_converter: For converter ID: conversion ID
  Input format:  fc32
  Num inputs:    1
  Output format: sc16_chdr
  Num outputs:   1
 Using best available prio: 3
[DEBUG] [RFNOC::MGMT] Established a route from EPID=3 (SW) to EPID=2
[DEBUG] [RFNOC::MGMT] Established a route from EPID=3 (SW) to EPID=2
[DEBUG] [RFNOC::MGMT] Finished TX stream setup for EPID=2
[DEBUG] [MULTI_USRP] Inconsistent TX rates when creating streamer! Harmonizing to 1.2288e+08
[WARNING] [0/Radio#0] Attempting to set tick rate to 0. Skipping.
[DEBUG] [CONVERT] get_converter: For converter ID: conversion ID
  Input format:  sc16_chdr
  Num inputs:    1
  Output format: fc32
  Num outputs:   1
 Using best available prio: 3
[DEBUG] [RFNOC::MGMT] Established a route from EPID=4 (SW) to EPID=2
[DEBUG] [RFNOC::MGMT] Throttling stream endpoint to 100% (0x0)
[DEBUG] [RFNOC::MGMT] Initiated RX stream setup for EPID=2
[DEBUG] [RFNOC::MGMT] Finished RX stream setup for EPID=2
[DEBUG] [0/Radio#0] spp value 2032 exceeds MTU of 1472! Coercing to 364
N2: Connection to AMF on 10.42.0.47:38412 completed
==== gNB started ===
Type <h> to view help
[DEBUG] [RxStreamer#0] Received overrun message on port 0
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
Late: 0; Underflow: 5; Overflow: 0;
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
^CStopping ..
Error: failed receiving packet. RfnocError: OpTimeout: Control operation timed out waiting for ACK.
srsRAN FATAL ERROR: Failed to execute uplink processing task.
Aborted

gnb Configuration (gnb.yaml):

gnb_id: 415


ru_sdr:
  device_driver: uhd
  device_args: type=x4xx, master_clock_rate=245.76e6
  srate: 122.88
  otw_format: sc16
  tx_gain: 55
  rx_gain: 30

cell_cfg:
  dl_arfcn: 650000
  band: 78
  channel_bandwidth_MHz: 100
  common_scs: 30
  plmn: "99999"
  tac: 1
  slicing:
  - sst: 1
    sd: 0
  pci: 1
  tdd_ul_dl_cfg:
    dl_ul_tx_period: 4
    nof_dl_slots: 2
    nof_dl_symbols: 7
    nof_ul_slots: 1
    nof_ul_symbols: 6
  nof_antennas_ul: 1
  nof_antennas_dl: 1
  pdsch:
    mcs_table: qam256
  pusch:
    mcs_table: qam64
  pucch:
    sr_period_ms: 4

log:
  filename: /tmp/gnb.log
  all_level: debug

pcap:
  mac_enable: false
  mac_filename: /tmp/gnb_mac.pcap
  ngap_enable: false
  ngap_filename: /tmp/gnb_ngap.pcap

metrics:
  autostart_stdout_metrics: 1

cu_cp:
  inactivity_timer: 7200
  amf:
    addr: 10.42.0.47
    bind_addr: 10.42.0.1
    supported_tracking_areas:
      -
        tac: 1
        plmn_list:
          -
            plmn: "99999"
            tai_slice_support_list:
              -
                sst: 1
                sd: 0

gnb.log (Debug):

gnb.log

USRP info (running uhd_usrp_probe) comamnd

[INFO] [UHD] linux; GNU C++ version 11.4.0; Boost_107400; UHD_4.7.0.0-0ubuntu1~jammy1
[INFO] [MPMD] Initializing 1 device(s) in parallel with args: mgmt_addr=128.178.122.71,type=x4xx,product=x410,serial=327B872,name=x410-00,fpga=X4_200,claimed=False,addr=128.178.122.71
[INFO] [MPM.PeriphManager] init() called with device args `fpga=X4_200,mgmt_addr=128.178.122.71,name=x410-00,product=x410,clock_source=internal,time_source=internal,initializing=True'.
  _____________________________________________________
 /
|       Device: X400-Series Device
|     _____________________________________________________
|    /
|   |       Mboard: x410-00
|   |   module_pid: 42000
|   |   module_rev: 6
|   |   module_serial: 327B872
|   |   pid: 1040
|   |   rev: 7
|   |   rev_compat: 7
|   |   serial: 327488F
|   |   MPM Version: 5.3
|   |   FPGA Version: 8.3
|   |   FPGA git hash: c37b318.clean
|   |   Device DNA: 400200000129A9673C3181C5
|   |   RFNoC capable: Yes
|   |   
|   |   Time sources:  internal, external, qsfp0, gpsdo
|   |   Clock sources: mboard, internal, external, nsync, gpsdo
|   |   Sensors: ref_locked, fan0, fan1, temp_fpga, temp_main_power, temp_scu_internal, gps_alarm, gps_enabled, gps_gpgga, gps_locked, gps_phase_lock, gps_sky, gps_survey, gps_time, gps_tpv, gps_warmup
|     _____________________________________________________
|    /
|   |       RFNoC blocks on this device:
|   |   
|   |   * 0/DDC#0
|   |   * 0/DDC#1
|   |   * 0/DUC#0
|   |   * 0/DUC#1
|   |   * 0/Radio#0
|   |   * 0/Radio#1
|   |   * 0/Replay#0
|     _____________________________________________________
|    /
|   |       Static connections on this device:
|   |   
|   |   * 0/SEP#0:0==>0/DUC#0:0
|   |   * 0/DUC#0:0==>0/Radio#0:0
|   |   * 0/Radio#0:0==>0/DDC#0:0
|   |   * 0/DDC#0:0==>0/SEP#0:0
|   |   * 0/SEP#1:0==>0/DUC#0:1
|   |   * 0/DUC#0:1==>0/Radio#0:1
|   |   * 0/Radio#0:1==>0/DDC#0:1
|   |   * 0/DDC#0:1==>0/SEP#1:0
|   |   * 0/SEP#2:0==>0/DUC#1:0
|   |   * 0/DUC#1:0==>0/Radio#1:0
|   |   * 0/Radio#1:0==>0/DDC#1:0
|   |   * 0/DDC#1:0==>0/SEP#2:0
|   |   * 0/SEP#3:0==>0/DUC#1:1
|   |   * 0/DUC#1:1==>0/Radio#1:1
|   |   * 0/Radio#1:1==>0/DDC#1:1
|   |   * 0/DDC#1:1==>0/SEP#3:0
|   |   * 0/SEP#4:0==>0/Replay#0:0
|   |   * 0/Replay#0:0==>0/SEP#4:0
|   |   * 0/SEP#5:0==>0/Replay#0:1
|   |   * 0/Replay#0:1==>0/SEP#5:0
|   |   * 0/SEP#6:0==>0/Replay#0:2
|   |   * 0/Replay#0:2==>0/SEP#6:0
|   |   * 0/SEP#7:0==>0/Replay#0:3
|   |   * 0/Replay#0:3==>0/SEP#7:0
|     _____________________________________________________
|    /
|   |       TX Dboard: 0/Radio#0
|   |     _____________________________________________________
|   |    /
|   |   |       TX Frontend: 0
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, CAL_LOOPBACK
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range AMP: 0.0 to 21.0 step 7.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|   |     _____________________________________________________
|   |    /
|   |   |       TX Frontend: 1
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, CAL_LOOPBACK
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range AMP: 0.0 to 21.0 step 7.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|     _____________________________________________________
|    /
|   |       RX Dboard: 0/Radio#0
|   |     _____________________________________________________
|   |    /
|   |   |       RX Frontend: 0
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, RX1, CAL_LOOPBACK, TERMINATION
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3A: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3B: 0.0 to 15.0 step 1.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|   |     _____________________________________________________
|   |    /
|   |   |       RX Frontend: 1
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, RX1, CAL_LOOPBACK, TERMINATION
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3A: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3B: 0.0 to 15.0 step 1.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|     _____________________________________________________
|    /
|   |       TX Dboard: 0/Radio#1
|   |     _____________________________________________________
|   |    /
|   |   |       TX Frontend: 0
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, CAL_LOOPBACK
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range AMP: 0.0 to 21.0 step 7.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|   |     _____________________________________________________
|   |    /
|   |   |       TX Frontend: 1
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, CAL_LOOPBACK
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 31.0 step 1.0 dB
|   |   |   Gain range AMP: 0.0 to 21.0 step 7.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|     _____________________________________________________
|    /
|   |       RX Dboard: 0/Radio#1
|   |     _____________________________________________________
|   |    /
|   |   |       RX Frontend: 0
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, RX1, CAL_LOOPBACK, TERMINATION
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3A: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3B: 0.0 to 15.0 step 1.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No
|   |     _____________________________________________________
|   |    /
|   |   |       RX Frontend: 1
|   |   |   Name: ZBX
|   |   |   Antennas: TX/RX0, RX1, CAL_LOOPBACK, TERMINATION
|   |   |   Sensors: temperature, rfdc_rate, lo1_locked, lo2_locked, lo_locked, nco_locked
|   |   |   Freq range: 1.000 to 8000.000 MHz
|   |   |   Gain range all: 0.0 to 60.0 step 1.0 dB
|   |   |   Gain range DSA1: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA2: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3A: 0.0 to 15.0 step 1.0 dB
|   |   |   Gain range DSA3B: 0.0 to 15.0 step 1.0 dB
|   |   |   Bandwidth range: 400000000.0 to 400000000.0 step 0.0 Hz
|   |   |   Connection Type: IQ
|   |   |   Uses LO offset: No

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USRP X410 RfnocError #982

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USRP X410 RfnocError #982

arman-maghsoudnia Dec 12, 2024

gnb output:

gnb Configuration (gnb.yaml):

gnb.log (Debug):

USRP info (running uhd_usrp_probe) comamnd

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arman-maghsoudnia
Dec 12, 2024