gal: have a single GAL pld file

gal/memdecv2.pld

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+GAL22V10 ; Same JED output can be flashed to ATF22V10.
+memdecv2 ; Flasher needs to support ATF22V10 algorithms
+
+; Pins: pin names beginning with "N" are active low.
+; MS4, MS6 and MS8 set SRAM chip presence
+NMSK P02 P03 P04 P05 P06 NAS A23 A22 A21 A20 GND
+P13 CEM5 CEM4 CEM3 CEM2 CEM1 MS4 MS6 MS8 MS10 NDTACK VCC
+
+; Equations:
+
+; SRAM Chip Enables
+; Each chip holds 2MB of data. Address only valid on /NAS
+; Lines are activated at these bus addresses:
+CEM1    =        /A23 * /A22 *  A21 * /NAS ;0x200000-0x3ffffe
+CEM2    = MS4  * /A23 *  A22 * /A21 * /NAS ;0x400000-0x5ffffe
+CEM3    = MS6  * /A23 *  A22 *  A21 * /NAS ;0x600000-0x7ffffe
+CEM4    = MS8  *  A23 * /A22 * /A21 * /NAS ;0x800000-0x9ffffe
+CEM5    = MS10 *  A23 * /A22 *  A21 * /NAS ;0xa00000-0xbffffe
+
+; DTACK
+; Ground the line as soon as we have a valid address
+/NDTACK =        /A23 * /A22 *  A21 * /NAS
+        + MS4  * /A23 *  A22 * /A21 * /NAS
+        + MS6  * /A23 *  A22 *  A21 * /NAS
+        + MS8  *  A23 * /A22 * /A21 * /NAS
+        + MS10 *  A23 * /A22 *  A21 * /NAS
+
+DESCRIPTION
+
+Address decoder for Sharp X68000 SRAM board.
+Jumpers on pins MS4, MS6, MS8 and MS10 set SRAM chip presence.
+Board can hold up to 10MB on a 2MB built-in machine.
+
+See project README.md for more info.
+
+; vim:syntax=off: