diff --git a/rtl/core/neorv32_cpu_lsu.vhd b/rtl/core/neorv32_cpu_lsu.vhd
index 39ece0b5d..9c37db2c1 100644
--- a/rtl/core/neorv32_cpu_lsu.vhd
+++ b/rtl/core/neorv32_cpu_lsu.vhd
@@ -108,7 +108,7 @@ begin
   dbus_req_o.fence <= ctrl_i.lsu_fence; -- this is valid without STB being set
 
 
-  -- Data Input Alignment and Sign-Extension ------------------------------------------------
+  -- Data Input: Alignment and Sign-Extension -----------------------------------------------
   -- -------------------------------------------------------------------------------------------
   mem_di_reg: process(rstn_i, clk_i)
   begin
diff --git a/rtl/core/neorv32_package.vhd b/rtl/core/neorv32_package.vhd
index 0fca399c8..079b39669 100644
--- a/rtl/core/neorv32_package.vhd
+++ b/rtl/core/neorv32_package.vhd
@@ -29,7 +29,7 @@ package neorv32_package is
 
   -- Architecture Constants -----------------------------------------------------------------
   -- -------------------------------------------------------------------------------------------
-  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100502"; -- hardware version
+  constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01100503"; -- hardware version
   constant archid_c     : natural := 19; -- official RISC-V architecture ID
   constant XLEN         : natural := 32; -- native data path width
 
diff --git a/rtl/core/neorv32_top.vhd b/rtl/core/neorv32_top.vhd
index 9b5e2d932..94164ff20 100644
--- a/rtl/core/neorv32_top.vhd
+++ b/rtl/core/neorv32_top.vhd
@@ -498,7 +498,7 @@ begin
     port map (
       -- global control --
       clk_i      => clk_cpu, -- switchable clock
-      clk_aux_i  => clk_i,
+      clk_aux_i  => clk_i,   -- always-on clock
       rstn_i     => rstn_sys,
       sleep_o    => cpu_sleep,
       debug_o    => cpu_debug,