Convolution test #881

Ugenix · 2024-04-23T14:54:12Z

Ugenix
Apr 23, 2024

Hi! I´m trying to test the neorv32 processor by doing a convolution for float and integer. For floating-point I use the next two convolution codes:

 // Convolution 
 startTime = neorv32_cpu_csr_read(CSR_MCYCLE); 
 for(i = 0; i < ROUND; i++) {
     neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters 
 
     // Write input
     *(pMemFloat + 0) = *(pDatosFloat + 0);  // ieee 754 -> 0.1;
     *(pMemFloat + 1) = *(pDatosFloat + 1);  // ieee 754 -> 0.2;
     *(pMemFloat + 2) = *(pDatosFloat + 2);  // ieee 754 -> 0.3;
     *(pMemFloat + 3) = *(pDatosFloat + 4);  // ieee 754 -> -0.4;

     // Write filter
     *(pMemFloat + 4) = *(pDatosFloat + 0);  // ieee 754 -> 0.1;
     *(pMemFloat + 5) = *(pDatosFloat + 1);  // ieee 754 -> 0.2;
     *(pMemFloat + 6) = *(pDatosFloat + 2);  // ieee 754 -> 0.3;
     *(pMemFloat + 7) = *(pDatosFloat + 3);  // ieee 754 -> 0.4;

     // Convolution (multiplication & addition)
     //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
     multFloat[0] = *(pMemFloat + 0) * *(pMemFloat + 4);
     multFloat[1] = *(pMemFloat + 1) * *(pMemFloat + 5);
     multFloat[2] = *(pMemFloat + 2) * *(pMemFloat + 6);
     multFloat[3] = *(pMemFloat + 3) * *(pMemFloat + 7);

     sumFloat[0] = multFloat[0] + multFloat[1] + multFloat[2] + multFloat[3];
     //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

     resultFloat = *pResultFloat;    
     neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
 }
 stopTime = neorv32_cpu_csr_read(CSR_MCYCLE);

    // Convolution 
    startTime = neorv32_cpu_csr_read(CSR_MCYCLE); //startTime = neorv32_cpu_get_cycle();
    for(i = 0; i < ROUND; i++) {
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        
        // Write input
        a11 = *(pDatosFloat + 0);  // ieee 754 -> 0.1;
        a12 = *(pDatosFloat + 1);  // ieee 754 -> 0.2;
        a21 = *(pDatosFloat + 2);  // ieee 754 -> 0.3;
        a22 = *(pDatosFloat + 4);  // ieee 754 -> -0.4;

        // Write filter
        b11 = *(pDatosFloat + 0);  // ieee 754 -> 0.1;
        b12 = *(pDatosFloat + 1);  // ieee 754 -> 0.2;
        b21 = *(pDatosFloat + 2);  // ieee 754 -> 0.3;
        b22 = *(pDatosFloat + 3);  // ieee 754 -> 0.4;

        // Convolution (multiplication & addition)
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        mult1 = riscv_intrinsic_fmuls(a11, b11);
        mult2 = riscv_intrinsic_fmuls(a12, b12);
        mult3 = riscv_intrinsic_fmuls(a21, b21);
        mult4 = riscv_intrinsic_fmuls(a22, b22);

        sum1 = riscv_intrinsic_fadds(mult1, mult2);
        sum2 = riscv_intrinsic_fadds(mult3, mult4);
        sumTotal = riscv_intrinsic_fadds(sum1, sum2);
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

        resultFloat = sumTotal;

        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
    }
    stopTime = neorv32_cpu_csr_read(CSR_MCYCLE);

For integer convolution, the code was this:

   // Convolution 
   startTime = neorv32_cpu_csr_read(CSR_MCYCLE); 
   for(i = 0; i < ROUND; i++) {
      //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
   
       // Write input
       *(pMemInt32 + 0) = *(pDatosInt32 + 0);
       *(pMemInt32 + 1) = *(pDatosInt32 + 1);
       *(pMemInt32 + 2) = *(pDatosInt32 + 2);
       *(pMemInt32 + 3) = *(pDatosInt32 + 4);

       // Write filter
       *(pMemInt32 + 4) = *(pDatosInt32 + 0);
       *(pMemInt32 + 5) = *(pDatosInt32 + 1);
       *(pMemInt32 + 6) = *(pDatosInt32 + 2);
       *(pMemInt32 + 7) = *(pDatosInt32 + 3);

       // Convolution (multiplication & addition)
       neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
       multInt32[0] = ((int64_t) *(pMemInt32 + 0)) * ((int64_t) *(pMemInt32 + 4));
       multInt32[1] = ((int64_t) *(pMemInt32 + 1)) * ((int64_t) *(pMemInt32 + 5));
       multInt32[2] = ((int64_t) *(pMemInt32 + 2)) * ((int64_t) *(pMemInt32 + 6));
       multInt32[3] = ((int64_t) *(pMemInt32 + 3)) * ((int64_t) *(pMemInt32 + 7));

       sumInt32 = (int32_t)((multInt32[0] + multInt32[1] + multInt32[2] + multInt32[3]) >> 31);
       neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

       resultInt32 = *pResultInt32;    
       //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
   }
   stopTime = neorv32_cpu_csr_read(CSR_MCYCLE);

I compile the test using make MARCH?=rv32imc_zfinx clean_all exe. the results obtained were as follows:

Convolution cycles (float): 3 cyc.
Convolution cycles (intrinsics float): 138 cyc.
Convolution cycles (int): 3 cyc.

I don't understand why these numbers come out. When I look at the assembly code file obtained, I understand the code obtained for the convolution using intrinsic functions;

406:	b0002af3          	csrr	s5,mcycle
40a:	3dccd6b7          	lui	a3,0x3dccd
40e:	3e4cd737          	lui	a4,0x3e4cd
412:	3e99a7b7          	lui	a5,0x3e99a
416:	beccd637          	lui	a2,0xbeccd
41a:	3eccd837          	lui	a6,0x3eccd
41e:	48e5                	li	a7,25
420:	4f01                	li	t5,0
422:	ccd68693          	add	a3,a3,-819 # 3dcccccd <__neorv32_ram_size+0x3dccaccd>
426:	ccd70713          	add	a4,a4,-819 # 3e4ccccd <__neorv32_ram_size+0x3e4caccd>
42a:	99a78793          	add	a5,a5,-1638 # 3e99999a <__neorv32_ram_size+0x3e99799a>
42e:	ccd60613          	add	a2,a2,-819 # becccccd <__crt0_stack_begin+0x3eccacd1>
432:	ccd80813          	add	a6,a6,-819 # 3ecccccd <__neorv32_ram_size+0x3eccaccd>
436:	5efd                	li	t4,-1
438:	320f1073          	csrw	mcountinhibit,t5
43c:	10d685d3          	fmul.s	a1,a3,a3,rne
440:	10e70e53          	fmul.s	t3,a4,a4,rne
444:	10f78553          	fmul.s	a0,a5,a5,rne
448:	11060353          	fmul.s	t1,a2,a6,rne
44c:	01c585d3          	fadd.s	a1,a1,t3,rne
450:	00650553          	fadd.s	a0,a0,t1,rne
454:	00a58453          	fadd.s	s0,a1,a0,rne
458:	320e9073          	csrw	mcountinhibit,t4
45c:	18fd                	add	a7,a7,-1
45e:	fc089de3          	bnez	a7,438 <test_soc4cris_2x2+0x22a>
462:	b00024f3          	csrr	s1,mcycle

but, in the case of the float convolution I got the following instructions:

34e:	b0002b73          	csrr	s6,mcycle
352:	47e5                	li	a5,25
354:	4681                	li	a3,0
356:	577d                	li	a4,-1
358:	32069073          	csrw	mcountinhibit,a3
35c:	32071073          	csrw	mcountinhibit,a4
360:	17fd                	add	a5,a5,-1
362:	fbfd                	bnez	a5,358 <test_soc4cris_2x2+0x14a>
364:	800007b7          	lui	a5,0x80000
368:	0147a783          	lw	a5,20(a5) # 80000014 <__DATA_BEGIN__+0x14>
36c:	c23e                	sw	a5,4(sp)
36e:	800007b7          	lui	a5,0x80000
372:	0187a783          	lw	a5,24(a5) # 80000018 <__DATA_BEGIN__+0x18>
376:	c43e                	sw	a5,8(sp)
378:	800007b7          	lui	a5,0x80000
37c:	01c7a783          	lw	a5,28(a5) # 8000001c <__DATA_BEGIN__+0x1c>
380:	c63e                	sw	a5,12(sp)
382:	b00024f3          	csrr	s1,mcycle

I would appreciate if someone could explain me why this is happening.
PD: The convolution result is correct in all case.

Answered by stnolting

Apr 24, 2024

Good point! I think I can confirm this.

I just tested your code on my side and checked the assembler output.

This C code fragment (starting and ending with mcountinhibit being written)

       neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
    
        // Write input
        *(pMemFloat + 0) = *(pDatosFloat + 0);  // 0.1
        *(pMemFloat + 1) = *(pDatosFloat + 1);  // 0.2
        *(pMemFloat + 2) = *(pDatosFloat + 2);  // 0.3;
        *(pMemFloat + 3) = *(pDatosFloat + 4);  // -0.4;

        // Write filter
        *(pMemFloat + 4) = *(pDatosFloat + 0);  // 0.1;
        *(pMemFloat + 5) = *(pDatosFloat + 1);  // 0.2;
        *(pMemFloat + 6) = *(pDatosFloat + 2);  /…

View full answer

stnolting · 2024-04-23T19:39:24Z

stnolting
Apr 23, 2024
Maintainer

Hey there!

So you are trying to benchmark the execution cycles, right?

but, in the case of the float convolution I got the following instructions:

Which GCC and binutils version are you using?

make MARCH?=rv32imc_zfinx clean_all exe

Please remove the ? here as this won't alter MARCH as it is already defined.

Could you post a complete test program that shows this faults behavior?

5 replies

Ugenix Apr 24, 2024
Author

So you are trying to benchmark the execution cycles, right?

Yes.

Which GCC and binutils version are you using?

I'm using gcc (Ubuntu 1.4.0-1ubuntu1~22.04) 11.4.0 and GNU ld (GNU binutils for Ubuntu) 2.38.

Could you post a complete test program that shows this faults behavior?

This is the test program:


**************************************************************************
 * @file NEORV32_SoC4CRIS2x2_tb/main.c
 * @author Alexander Ugena
 * @brief Program that tests convolution cycles
 **************************************************************************/

#include <neorv32.h>
#include <float.h>
#include "neorv32_zfinx_extension_intrinsics.h"

/*************************************************************************
 * @name User configuration
 **************************************************************************/
/**@{*/
/** UART BAUD rate */
#define BAUD_RATE 19200

/** IP SOC4CRIS_2x2 configuration*/
#define VERSION_MAYOR       0
#define VERSION_MINOR       1
#define VERSION_REVISION    0
#define VERSION_BUILD       0

#define CLOCK_PER_SEC       1000000
#define ROUND               25

#define VERBOSE
#define MAIN

// Prototypes
int test_soc4cris_2x2(void);
void gptmr_firq_handler(void);
// inline uint32_t get_timer_count(void);

/**************************************************************************
 * This program initialises the PWM and SoC4CRIS_2x2 IP tests.
 * It also creates a blinking LED demo program using the lowest
 * 4 bits of the GPIO output port.
 *
 * @note This program requires the PWM controller, GPIO controller and
 * SoC4CRIS_2x2 IP to be synthesized (the UART is optional).
 *
 * @return !=0 if error.
 **************************************************************************/
int main()
{

    int ret = 0;

    // capture all exceptions and give debug info via UART
    // this is not required, but keeps us safe
    neorv32_rte_setup();

    // use UART0 if implemented
    if (neorv32_uart0_available())
    {
        // setup UART at default baud rate, no interrupts
        neorv32_uart0_setup(BAUD_RATE, 0);

        // say hello
        neorv32_uart0_printf("<<< Software testbench >>>\n");
        neorv32_uart0_printf("<<< Version: %d.%d.%d.%d >>>\n", VERSION_MAYOR, VERSION_MINOR, VERSION_REVISION, VERSION_BUILD);
    }
    else
    {
        neorv32_uart0_printf("UART0 not available\n");
    }

    // **********************************************************************************************
    // IP SoC4CRIS_2x2 test configuration
    // **********************************************************************************************
    neorv32_uart0_printf("\n<<< IP SoC4CRIS_2x2 test >>>\n");

    neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

    ret = test_soc4cris_2x2();

#ifdef MAIN
    if (ret != 0)
        neorv32_uart0_printf("Lecture error %d\n", ret);
#endif

    // this should never be reached
    return 0;
}

/**************************************************************************
 * This is the SoC4CRIS test program
 *
 * @return !=0 if error.
 **************************************************************************/
int test_soc4cris_2x2()
{
    int startTime = 0, stopTime = 0;
    int i = 0;
    float matrizFloat[8] = {}, multFloat[4] = {}, sumFloat[3] = {}, resultFloat = 0;

    // Data register
    float datosFloat[5] = {0.1, 0.2, 0.3, 0.4, -0.4};

    // Float to ieee 754 
    union {
        float f;
        uint32_t u;
    } f2u;

    // **********************************************************************************************
    // Convolution NEORV32 Processor test
    // **********************************************************************************************
    neorv32_uart0_printf("\n<<< Convolution test (NEORV32 Processor) >>>\n");
    neorv32_uart0_printf("Number of rounds: %d\n\n", ROUND);

    // *****************
    // ***** Float *****
    // *****************
    neorv32_uart0_printf("**** Float test ****\n");
    float a11 = 0, a12 = 0, a21 = 0, a22 = 0;
    float b11 = 0, b12 = 0, b21 = 0, b22 = 0;
    float mult1 = 0, mult2 = 0, mult3 = 0, mult4 = 0;
    float sum1 = 0, sum2 = 0, sumTotal = 0;

    // Pointer assingment
    float *pMemFloat = matrizFloat;
    float *pDatosFloat = datosFloat;
    float *pResultFloat = sumFloat;

    // Write period
    startTime = neorv32_cpu_csr_read(CSR_MCYCLE);
    //for(i = 0; i < ROUND; i++) {
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        *pMemFloat = *pDatosFloat; 
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
    //} 
    stopTime = neorv32_cpu_csr_read(CSR_MCYCLE); 

#ifdef VERBOSE
    f2u.f = *pMemFloat;
    neorv32_uart0_printf("Writen data: 0x%x\n", f2u.u);
    neorv32_uart0_printf("Convolution time time: %d tot. cyc. | %d cyc/round\n\n", 
                        stopTime - startTime, (stopTime - startTime)/ROUND);
#endif

    // Read period
    startTime = neorv32_cpu_csr_read(CSR_MCYCLE);
    //for(i = 0; i < ROUND; i++) { 
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        resultFloat = *pDatosFloat;
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
    //}
    stopTime = neorv32_cpu_csr_read(CSR_MCYCLE); 

#ifdef VERBOSE
    f2u.f = resultFloat;
    neorv32_uart0_printf("Read data: 0x%x\n", f2u.u);
    neorv32_uart0_printf("Convolution time time: %d tot. cyc. | %d cyc/round\n\n", 
                        stopTime - startTime, (stopTime - startTime)/ROUND);
#endif

    // Convolution 
    startTime = neorv32_cpu_csr_read(CSR_MCYCLE); 
    for(i = 0; i < ROUND; i++) {
       neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
    
        // Write input
        *(pMemFloat + 0) = *(pDatosFloat + 0);  // 0.1
        *(pMemFloat + 1) = *(pDatosFloat + 1);  // 0.2
        *(pMemFloat + 2) = *(pDatosFloat + 2);  // 0.3;
        *(pMemFloat + 3) = *(pDatosFloat + 4);  // -0.4;

        // Write filter
        *(pMemFloat + 4) = *(pDatosFloat + 0);  // 0.1;
        *(pMemFloat + 5) = *(pDatosFloat + 1);  // 0.2;
        *(pMemFloat + 6) = *(pDatosFloat + 2);  // 0.3;
        *(pMemFloat + 7) = *(pDatosFloat + 3);  // 0.4;

        // Convolution (multiplication & addition)
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        multFloat[0] = *(pMemFloat + 0) * *(pMemFloat + 4);
        multFloat[1] = *(pMemFloat + 1) * *(pMemFloat + 5);
        multFloat[2] = *(pMemFloat + 2) * *(pMemFloat + 6);
        multFloat[3] = *(pMemFloat + 3) * *(pMemFloat + 7);

        sumFloat[0] = multFloat[0] + multFloat[1] + multFloat[2] + multFloat[3];
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

        resultFloat = *pResultFloat;    
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
    }
    stopTime = neorv32_cpu_csr_read(CSR_MCYCLE);

#ifdef VERBOSE
    neorv32_uart0_printf("Read data (float): ");
    for (i = 0; i < 4; i++) {
        f2u.f = matrizFloat[i];
        neorv32_uart0_printf("0x%x ", f2u.u);
    }
    neorv32_uart0_printf("\n");
    f2u.f = resultFloat;
    neorv32_uart0_printf("Convolution result (float): 0x%x\n", f2u.u);
    neorv32_uart0_printf("Convolution time time: %d tot. cyc. | %d cyc/round\n\n", 
                        stopTime - startTime, (stopTime - startTime)/ROUND);
#endif

    // ****************************
    // ***** Float Intrinsics *****
    // ****************************
    neorv32_uart0_printf("**** Float Intrinsics test ****\n");

    // Convolution 
    startTime = neorv32_cpu_csr_read(CSR_MCYCLE); //startTime = neorv32_cpu_get_cycle();
    for(i = 0; i < ROUND; i++) {
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        
        // Write input
        a11 = *(pDatosFloat + 0);  // ieee 754 -> 0.1;
        a12 = *(pDatosFloat + 1);  // ieee 754 -> 0.2;
        a21 = *(pDatosFloat + 2);  // ieee 754 -> 0.3;
        a22 = *(pDatosFloat + 4);  // ieee 754 -> -0.4;

        // Write filter
        b11 = *(pDatosFloat + 0);  // ieee 754 -> 0.1;
        b12 = *(pDatosFloat + 1);  // ieee 754 -> 0.2;
        b21 = *(pDatosFloat + 2);  // ieee 754 -> 0.3;
        b22 = *(pDatosFloat + 3);  // ieee 754 -> 0.4;

        // Convolution (multiplication & addition)
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        mult1 = riscv_intrinsic_fmuls(a11, b11);
        mult2 = riscv_intrinsic_fmuls(a12, b12);
        mult3 = riscv_intrinsic_fmuls(a21, b21);
        mult4 = riscv_intrinsic_fmuls(a22, b22);

        sum1 = riscv_intrinsic_fadds(mult1, mult2);
        sum2 = riscv_intrinsic_fadds(mult3, mult4);
        sumTotal = riscv_intrinsic_fadds(sum1, sum2);
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

        resultFloat = sumTotal;

        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters
    }
    stopTime = neorv32_cpu_csr_read(CSR_MCYCLE); 

#ifdef VERBOSE
    neorv32_uart0_printf("Read data (float): ");
    /*
    for (i = 0; i < 4; i++) {
        f2u.f = matrizFloat[i];
        neorv32_uart0_printf("0x%x ", f2u.u);
    }
    */
    neorv32_uart0_printf("\n");
    f2u.f = resultFloat;
    neorv32_uart0_printf("Convolution result (float): 0x%x\n", f2u.u);
    neorv32_uart0_printf("Convolution time time: %d tot. cyc. | %d cyc/round\n", 
                        stopTime - startTime, (stopTime - startTime)/ROUND);
#endif

    return 0;
}

Ugenix Apr 24, 2024
Author

I've try to check the toolchain with riscv32-unknow-elf-gcc -v and I've got riscv32-unknow-elf-gcc: command not found. So I reinstalled rv32i-131023 toolchain, where gcc version is 13.2.0 and binutils 2.41.

vhdlnerd Apr 24, 2024

I think this is just the C code being optimized. You are doing math on a set of constant inputs and compiler is computing the final constant result, in the float case.

stnolting Apr 24, 2024
Maintainer

Good point! I think I can confirm this.

I just tested your code on my side and checked the assembler output.

This C code fragment (starting and ending with mcountinhibit being written)

       neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
    
        // Write input
        *(pMemFloat + 0) = *(pDatosFloat + 0);  // 0.1
        *(pMemFloat + 1) = *(pDatosFloat + 1);  // 0.2
        *(pMemFloat + 2) = *(pDatosFloat + 2);  // 0.3;
        *(pMemFloat + 3) = *(pDatosFloat + 4);  // -0.4;

        // Write filter
        *(pMemFloat + 4) = *(pDatosFloat + 0);  // 0.1;
        *(pMemFloat + 5) = *(pDatosFloat + 1);  // 0.2;
        *(pMemFloat + 6) = *(pDatosFloat + 2);  // 0.3;
        *(pMemFloat + 7) = *(pDatosFloat + 3);  // 0.4;

        // Convolution (multiplication & addition)
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, 0); // enable all counters
        multFloat[0] = *(pMemFloat + 0) * *(pMemFloat + 4);
        multFloat[1] = *(pMemFloat + 1) * *(pMemFloat + 5);
        multFloat[2] = *(pMemFloat + 2) * *(pMemFloat + 6);
        multFloat[3] = *(pMemFloat + 3) * *(pMemFloat + 7);

        sumFloat[0] = multFloat[0] + multFloat[1] + multFloat[2] + multFloat[3];
        //neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

        resultFloat = *pResultFloat;    
        neorv32_cpu_csr_write(CSR_MCOUNTINHIBIT, -1); // halt all counters

collapsed to just this

 364:	32069073          	csrw	mcountinhibit,a3
 368:	32071073          	csrw	mcountinhibit,a4

So the entire computation has been optimized out as the compiler was able to pre-compute all the results.

You could use volatile variables to prevent this (at the cost of additional memory traffic).

Btw, I really like your coding style! 👍

Answer selected by Ugenix

Ugenix May 8, 2024
Author

Sorry for taking so long to reply. Thanks for solving my doubt, it was driving me crazy.

Now the results make sense:

8982 cycles/round without Zfinx
337 cycles/round with Zfinx.

Thanks for the compliment on my coding style!

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Convolution test #881

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Convolution test #881

Ugenix Apr 23, 2024

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stnolting Apr 23, 2024 Maintainer

Ugenix Apr 24, 2024 Author

Ugenix Apr 24, 2024 Author

vhdlnerd Apr 24, 2024

stnolting Apr 24, 2024 Maintainer

Ugenix May 8, 2024 Author

Ugenix
Apr 23, 2024

Replies: 1 comment 5 replies

stnolting
Apr 23, 2024
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Ugenix Apr 24, 2024
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Ugenix Apr 24, 2024
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stnolting Apr 24, 2024
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Ugenix May 8, 2024
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