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[Z8] Fix CALL #IA parsing
1 parent 08ffe30 commit be1dffc

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6 files changed

+18
-9
lines changed

6 files changed

+18
-9
lines changed

src/asm_z8.cpp

+4-1
Original file line numberDiff line numberDiff line change
@@ -342,8 +342,10 @@ void AsmZ8::encodeRegAddr(AsmInsn &insn, OprPos pos, const Operand &op) const {
342342
}
343343

344344
void AsmZ8::encodeImmediate(AsmInsn &insn, AddrMode mode, OprPos pos, const Operand &op) const {
345-
if (mode == M_IM && overflowUint8(op.val16))
345+
if ((mode == M_IM || mode == M_IA) && overflowUint8(op.val16))
346346
insn.setErrorIf(op, OVERFLOW_RANGE);
347+
if (mode == M_IA && op.val16 % 2)
348+
insn.setErrorIf(op, OPERAND_NOT_ALIGNED);
347349
auto val16 = op.val16;
348350
if (insn.opCode() == TableZ8::SRP) {
349351
const auto postFormat = insn.postFormat();
@@ -374,6 +376,7 @@ void AsmZ8::encodeOperand(AsmInsn &insn, AddrMode mode, OprPos pos, const Operan
374376
case M_IM:
375377
case M_IMb:
376378
case M_IML:
379+
case M_IA:
377380
encodeImmediate(insn, mode, pos, op);
378381
break;
379382
case M_r:

src/dis_z8.cpp

+4-1
Original file line numberDiff line numberDiff line change
@@ -246,12 +246,14 @@ void DisZ8::decodeImmediate(DisInsn &insn, StrBuffer &out, Operand &op) const {
246246
if (postFormat == PF2_0 || postFormat == PF2_1 || postFormat == PF2_2)
247247
op.val16 &= ~3;
248248
}
249+
if (op.mode == M_IA && op.val16 % 2)
250+
insn.setErrorIf(out, OPERAND_NOT_ALIGNED);
249251
out.letter('#');
250252
if (op.getError())
251253
insn.setErrorIf(out, op);
252254
if (op.mode == M_IMb)
253255
op.val16 >>= 1;
254-
const auto bits = op.mode == M_IM ? 8 : (op.mode == M_IMb ? 3 : 16);
256+
const auto bits = (op.mode == M_IM || op.mode == M_IA) ? 8 : (op.mode == M_IMb ? 3 : 16);
255257
outHex(out, op.val16, bits);
256258
}
257259

@@ -289,6 +291,7 @@ void DisZ8::decodeOperand(DisInsn &insn, StrBuffer &out, Operand &op) const {
289291
case M_IM:
290292
case M_IMb:
291293
case M_IML:
294+
case M_IA:
292295
decodeImmediate(insn, out, op);
293296
break;
294297
case M_r:

src/entry_z8.h

+6-5
Original file line numberDiff line numberDiff line change
@@ -44,11 +44,12 @@ enum AddrMode : uint8_t {
4444
M_XS = 15, // Indexed Short: nn(rrn)
4545
M_XL = 16, // Indexed Long: nnnn(rrn)
4646
M_cc = 17, // Condition Code: cc
47-
// Those (18-) happen only in assembler internal.
48-
M_W = 18, // Register or Working register: Rxy x==RP
49-
M_IW = 19, // Indirect Register or Working register: @Rxy x==RP
50-
M_WW = 20, // Register or Working register pair: RRxy: x=RP
51-
M_IWW = 21, // Indirect Register Pair or Working register Pair: @RRxy x==RP
47+
M_IA = 18, // Indirect address for CALL #IA
48+
// Those (19-) happen only in assembler internal.
49+
M_W = 19, // Register or Working register: Rxy x==RP
50+
M_IW = 20, // Indirect Register or Working register: @Rxy x==RP
51+
M_WW = 21, // Register or Working register pair: RRxy: x=RP
52+
M_IWW = 22, // Indirect Register Pair or Working register Pair: @RRxy x==RP
5253
};
5354

5455
// Post byte format

src/table_z8.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -321,7 +321,7 @@ static constexpr Entry TABLE_SUPER8[] PROGMEM = {
321321
E0(0x5F, TEXT_SB1, PF_NONE),
322322
E1(0xF6, TEXT_CALL, PF_NONE, M_DA, OP_W1BE),
323323
E1(0xF4, TEXT_CALL, PF_NONE, M_IRR, OP_BYT1),
324-
E1(0xD4, TEXT_CALL, PF_NONE, M_IM, OP_BYT1),
324+
E1(0xD4, TEXT_CALL, PF_NONE, M_IA, OP_BYT1),
325325
E2(0x87, TEXT_LD, PF_NONE, M_r, M_X, OP_B1HI, OP_BYT2), // x: OP_B1LO
326326
E2(0x97, TEXT_LD, PF_NONE, M_X, M_r, OP_BYT2, OP_B1HI), // x: OP_B1LO
327327
E2(0xC7, TEXT_LD, PF_NONE, M_r, M_Ir, OP_B1HI, OP_B1LO),
@@ -500,7 +500,7 @@ static bool acceptMode(AddrMode opr, AddrMode table) {
500500
if (opr == table)
501501
return true;
502502
if (opr == M_IM)
503-
return table == M_IMb || table == M_IML;
503+
return table == M_IMb || table == M_IML || table == M_IA;
504504
if (opr == M_DA)
505505
return table == M_RA;
506506
if (opr == M_R)

test/test_asm_z8.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -364,6 +364,7 @@ static void test_one_operand() {
364364
TZ88("CALL @RR2", 0xF4, R(2));
365365
EZ86("CALL #%D6", OPERAND_NOT_ALLOWED, "#%D6");
366366
TZ88("CALL #%D6", 0xD4, 0xD6);
367+
EZ88("CALL #%D7", OPERAND_NOT_ALIGNED, "#%D7", 0xD4, 0xD7);
367368
TEST("SRP #%30", 0x31, 0x30);
368369
ERRT("SRP #%38", OPERAND_NOT_ALLOWED, "#%38", 0x31, 0x38);
369370
EZ86("SRP0 #%30", UNKNOWN_INSTRUCTION, "SRP0 #%30");

test/test_dis_z8.cpp

+1
Original file line numberDiff line numberDiff line change
@@ -332,6 +332,7 @@ static void test_one_operand() {
332332
TEST("CALL", "@%D6", 0xF4, 0xD6);
333333
TEST("CALL", "@RR2", 0xF4, R(2));
334334
TEST("CALL", "#%D6", 0xD4, 0xD6);
335+
ERRT("CALL", "#%D7", OPERAND_NOT_ALIGNED, "#%D7", 0xD4, 0xD7);
335336
NMEM("CALL", "#0", "0", 0xD4);
336337
}
337338
}

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