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+---
+layout: weekly
+author: '呀呀呀'
+title: 'RISC-V Linux 内核及周边技术动态第 106 期'
+draft: false
+group: 'news'
+album: 'RISC-V Linux'
+license: 'cc-by-nc-nd-4.0'
+permalink: /rvlwn-106/
+description: 'RISC-V Linux 内核及周边技术动态第 106 期'
+category:
+  - 开源项目
+  - Risc-V
+tags:
+  - Linux
+  - RISC-V
+  - Rust
+  - Tracepoints
+  - Vector
+  - hwprobe
+---
+
+> 时间：20240825<br/>
+> 编辑：晓瑜<br/>
+> 仓库：[RISC-V Linux 内核技术调研活动](https://gitee.com/tinylab/riscv-linux)<br/>
+> 赞助：PLCT Lab, ISCAS
+
+## 内核动态
+
+### RISC-V 架构支持
+
+**[v1: riscv: Report error when repeatedly recording CPU hardware ID](http://lore.kernel.org/linux-riscv/20240823091100.598162-1-qiaozhe@iscas.ac.cn/)**
+
+> In the of_parse_and_init_cpus() function, when the __cpuid_to_hartid_map[]
+> array records the CPU hardware ID, if the same CPU hardware attribute has
+> been recorded, an error report is issued, thereby ensuring the uniqueness
+> of the CPU hardware ID recorded in the __cpuid_to_hartid_map[] array.
+
+**[v8: Tracepoints and static branch in Rust](http://lore.kernel.org/linux-riscv/20240822-tracepoint-v8-0-f0c5899e6fd3@google.com/)**
+
+> This series includes a patch that adds a user of tracepoits to the
+> rust_print sample.
+
+**[v1: usb drivers use devm_clk_get_enabled() helpers](http://lore.kernel.org/linux-riscv/20240822040734.29412-1-liulei.rjpt@vivo.com/)**
+
+> This simplifies the code and avoids calls to clk_disable_unprepare().
+
+**[GIT PULL: RISC-V T-HEAD Devicetrees for v6.12](http://lore.kernel.org/linux-riscv/ZsWs8QiVruMXjzPc@x1/)**
+
+> Please pull these thead dts changes. I've run W=1 dtbs_check and they
+> have been in linux-next since August 9th.
+
+**[v9: RISC-V: Detect and report speed of unaligned vector accesses](http://lore.kernel.org/linux-riscv/20240820152424.1973078-1-jesse@rivosinc.com/)**
+
+> Adds support for detecting and reporting the speed of unaligned vector
+> accesses on RISC-V CPUs.
+
+**[v2: riscv: hwprobe: export Zicntr and Zihpm extensions](http://lore.kernel.org/linux-riscv/20240820044749.557349-1-mikisabate@gmail.com/)**
+
+> Export Zicntr and Zihpm ISA extensions through the hwprobe syscall.
+
+**[v3: irqchip/sifive-plic: Probe plic driver early for Allwinner D1 platform](http://lore.kernel.org/linux-riscv/20240820034850.3189912-1-apatel@ventanamicro.com/)**
+
+> The latest Linux RISC-V no longer boots on the Allwinner D1 platform
+> because the sun4i_timer driver fails to get an interrupt from PLIC.
+
+**[v5: Zacas/Zabha support and qspinlocks](http://lore.kernel.org/linux-riscv/20240818063538.6651-1-alexghiti@rivosinc.com/)**
+
+> This implements [cmp]xchgXX() macros using Zacas and Zabha extensions
+> and finally uses those newly introduced macros to add support for
+> qspinlocks: note that this implementation of qspinlocks satisfies the
+> forward progress guarantee.
+
+### LoongArch 架构支持
+
+**[v11: Loongarch-avec support](http://lore.kernel.org/loongarch/20240823103525.24237-1-zhangtianyang@loongson.cn/)**
+
+> This series of patches introduces support for advanced extended
+> interrupt controllers (AVECINTC), and this hardware feature will
+> be supported on 3C6000 for the first time.
+
+**[[v2: Added Interrupt controller emulation for loongarch kvm](http://lore.kernel.org/loongarch/20240823093404.204450-1-lixianglai@loongson.cn/)**
+
+> In order to reduce the loss caused by frequent
+> switching of the virtual machine monitor from kernel mode to user mode
+> when the guest accesses the interrupt controller, we add the interrupt
+> controller simulation in kvm.
+
+**[v7: Add extioi virt extension support](http://lore.kernel.org/loongarch/20240823063943.2618675-1-maobibo@loongson.cn/)**
+
+> KVM_FEATURE_VIRT_EXTIOI is paravirt feature defined with EXTIOI
+> interrupt controller, it can route interrupt to 256 vCPUs and CPU
+> interrupt pin IP0-IP7.
+
+**[v1: of_reserved_mem: Save region name string into struct reserved_mem](http://lore.kernel.org/loongarch/20240821-save_resv_name-v1-1-b9c17f103ffb@flygoat.com/)**
+
+> Previously only a pointer to fdt string pool is saved to struct
+> reserved_mem as region name.
+
+**[v1: LoongArch: Migrate arch_numa](http://lore.kernel.org/loongarch/20240821-loongarch_archnuma-v1-0-f47b191beee8@flygoat.com/)**
+
+> This series migrated LoongArch NUMA implementation to common arch_numa
+> logic to enable devicetree based numa.
+
+**[v1: irqchip/loongson-eiointc: Add multiple interrupt pin routing support](http://lore.kernel.org/loongarch/20240821101153.2262290-1-maobibo@loongson.cn/)**
+
+> There are four times about EIOINTC_REG_ISR register group access in
+> eiointc irq handler, in order to get all irq status about 256 interrupt
+> vectors.
+
+**[v1: Add EDAC driver for loongson memory controller](http://lore.kernel.org/loongarch/20240821064728.8642-1-zhaoqunqin@loongson.cn/)**
+
+> These patchs are based on 6.10.4. Add a simple EDAC driver which report
+> single bit errors (CE) only on loongson platform.
+
+### ARM 架构支持
+
+**[v3: arm64: Implement prctl(PR_{G,S}ET_TSC)](http://lore.kernel.org/linux-arm-kernel/20240824015415.488474-1-pcc@google.com/)**
+
+> This is needed for a correct implementation of non-instrumenting
+> record-replay debugging on arm64 (i.e. rr; https://rr-project.org/).
+
+**[v13: Add Tegra241 (Grace) CMDQV Support (part 1/2)](http://lore.kernel.org/linux-arm-kernel/cover.1724453781.git.nicolinc@nvidia.com/)**
+
+> NVIDIA's Tegra241 (Grace) SoC has a CMDQ-Virtualization (CMDQV) hardware
+> that extends standard ARM SMMUv3 to support multiple command queues with
+> virtualization capabilities.
+
+**[v2: iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages](http://lore.kernel.org/linux-arm-kernel/20240824-topic-845_gpu_smmu-v2-1-a302b8acc052@quicinc.com/)**
+
+> SDM845's Adreno SMMU is unique in that it actually advertizes support
+> for 16K (and 32M) pages, which doesn't hold for newer SoCs.
+
+**[v2: irqchip/gic-v3: init SRE before poking sysregs](http://lore.kernel.org/linux-arm-kernel/20240822102308.283733-1-mark.rutland@arm.com/)**
+
+> The GICv3 driver pokes GICv3 system registers in gic_prio_init() before
+> gic_cpu_sys_reg_init() ensures that GICv3 system registers have been
+> enabled by writing to ICC_SRE_EL1.SRE.
+
+**[v3: ARM: bcm2835: Implement initial S2Idle for Raspberry Pi](http://lore.kernel.org/linux-arm-kernel/20240821214052.6800-1-wahrenst@gmx.net/)**
+
+> This series implement the initial S2Idle support for
+> the Raspberry Pi, which was a long time on my TODO list .
+
+**[v4: arm64: Support for Arm CCA in KVM](http://lore.kernel.org/linux-arm-kernel/20240821153844.60084-1-steven.price@arm.com/)**
+
+> This series adds support for running protected VMs using KVM under the
+> Arm Confidential Compute Architecture (CCA).
+
+**[v1: Microchip OTPC driver on SAM9X60 exposing UIDxR as additional nvmem device](http://lore.kernel.org/linux-arm-kernel/20240821105943.230281-1-ada@thorsis.com/)**
+
+> There is a driver for the OTPC of the SAMA7G5 and after comparing
+> register layouts it seems that one is almost identical to the one used
+> by SAM9X60.
+
+### X86 架构支持
+
+**[v1: arm64: Trace the memory abort exception](http://lore.kernel.org/lkml/20240824111456.289367-1-dolinux.peng@gmail.com/)**
+
+> Introduce an event to trace the occurrence of memory abort exceptions.
+
+**[[RFC/PATCH] perf/x86: Relax privilege filter restriction on AMD IBS](http://lore.kernel.org/lkml/20240822230816.564262-1-namhyung@kernel.org/)**
+
+> While IBS is available for per-thread profiling, still regular users
+> cannot open an event due to the default paranoid setting (2) which
+> doesn't allow unprivileged users to get kernel samples.
+
+**[v1: platform/x86: wmi: Pass event data directly to legacy notify handlers](http://lore.kernel.org/lkml/20240822173810.11090-1-W_Armin@gmx.de/)**
+
+> The current legacy WMI handlers are susceptible to picking up wrong
+> WMI event data on systems where different WMI devices share some
+> notification IDs.
+
+**[v1: platform/x86: lenovo-ymc: Ignore the 0x0 state](http://lore.kernel.org/lkml/08ab73bb74c4ad448409f2ce707b1148874a05ce.1724340562.git.soyer@irl.hu/)**
+
+> Add 0x0 YMC state to the sparse keymap to ignore.
+
+**[v4: Introduce initial AMD I3C HCI driver support](http://lore.kernel.org/lkml/20240821133554.391937-1-Shyam-sundar.S-k@amd.com/)**
+
+> The AMD SoC includes an I3C IP block as part of the Fusion Controller Hub
+> (FCH). This series introduces the initial driver support to enable the I3C
+> IP block on AMD's latest processors.
+
+**[v1: platform/x86: Add support for Intel uncore ELC feature](http://lore.kernel.org/lkml/20240821131321.824326-1-tero.kristo@linux.intel.com/)**
+
+> This series adds ELC (Efficiency Latency Control) support to Intel
+> uncore driver.
+
+**[GIT PULL: platform-drivers-x86 for v6.11-4](http://lore.kernel.org/lkml/pdx86-pr-20240821104010-1325128977@linux.intel.com/)**
+
+> Here is a platform-drivers-x86 fixes PR for v6.11.
+
+**[v1: x86/platform/geode: switch GPIO buttons and LEDs to software properties](http://lore.kernel.org/lkml/ZsV6MNS_tUPPSffJ@google.com/)**
+
+> Convert GPIO-connected buttons and LEDs in Geode boards to software
+> nodes/properties, so that support for platform data can be removed from
+> gpio-keys driver (which will rely purely on generic device properties
+> for configuration).
+
+**[v5: perf auxtrace: Support multiple AUX events](http://lore.kernel.org/lkml/20240820184731.2937551-1-leo.yan@arm.com/)**
+
+> This series is to support multiple events with the *same* type in Perf
+> AUX trace.
+
+**[v1: platform/x86: system76: Reducing redundant conditional judgments in system76_add()](http://lore.kernel.org/lkml/20240820090239.17771-1-xuiagnh@gmail.com/)**
+
+> Since the conditions for most goto statements have already
+> been satisfied by if (data->has_open_ec),the code has been modified to
+> improve execution speed.
+
+**[v2: KVM: x86: Include host suspended time in steal time.](http://lore.kernel.org/lkml/20240820043543.837914-1-suleiman@google.com/)**
+
+> This series makes it so that the time that the host is suspended is
+> included in guests' steal time.
+
+**[v3: Enable PMU for ArrowLake-H](http://lore.kernel.org/lkml/20240820073853.1974746-1-dapeng1.mi@linux.intel.com/)**
+
+> No code changes comparing v2, just add back the missed reviewed-by.
+
+### 进程调度
+
+**[v1: sched: NUMA-aware concurrency IDs](http://lore.kernel.org/lkml/20240819142406.339084-1-mathieu.desnoyers@efficios.com/)**
+
+> The issue addressed by this series is the non-locality of NUMA accesses
+> to data structures indexed by concurrency IDs.
+
+**[v2: perf sched timehist: Add --show-prio & --prio option](http://lore.kernel.org/lkml/20240819033016.2427235-1-yangjihong@bytedance.com/)**
+
+> This patch set adds --show-prio and --prio to show and filter task priorities.
+
+### 内存管理
+
+**[v1: Integrating Namespaces and Cgroups for Enhanced Resource Management](http://lore.kernel.org/linux-mm/tencent_BFC5A388F2922E5FB6F3FE2E3A3662561809@qq.com/)**
+
+
+> We are a system security research team from multiple organizations.
+
+
+**[v4: mm: count the number of anonymous THPs per size](http://lore.kernel.org/linux-mm/20240824010441.21308-1-21cnbao@gmail.com/)**
+
+> Knowing the number of transparent anon THPs in the system is crucial
+> for performance analysis.
+
+**[v1: memcg: add charging of already allocated slab objects](http://lore.kernel.org/linux-mm/20240824010139.1293051-1-shakeel.butt@linux.dev/)**
+
+> At the moment, the slab objects are charged to the memcg at the
+> allocation time.
+
+**[v1: riscv: use gp to save percpu offset](http://lore.kernel.org/linux-mm/20240824004920.35877-1-cuiyunhui@bytedance.com/)**
+
+> Compared to directly fetching the per-CPU offset from memory (or cache),
+> using the global pointer (gp) to store the per-CPU offset can save one
+> memory access.
+
+**[v8: mm: store zero pages to be swapped out in a bitmap](http://lore.kernel.org/linux-mm/20240823185838.939977-1-usamaarif642@gmail.com/)**
+
+> The original series was almost merged, but was dropped
+> due to a last minute bug.
+
+**[v1: tmpfs: Add case-insesitive support for tmpfs](http://lore.kernel.org/linux-mm/20240823173332.281211-1-andrealmeid@igalia.com/)**
+
+> This patchset adds support for case-insesitive file names lookups in tmpfs.
+
+**[v1: codetag: debug: mark codetags for poisoned page as empty](http://lore.kernel.org/linux-mm/20240823062002.21165-1-hao.ge@linux.dev/)**
+
+> The PG_hwpoison page will be caught and isolated on the entrance to
+> the free buddy page pool.
+
+**[v3: slab: Introduce kmalloc_obj() and family](http://lore.kernel.org/linux-mm/20240822231324.make.666-kees@kernel.org/)**
+
+> Introduce type-aware kmalloc-family helpers to replace the common
+> idioms for single, array, and flexible object allocations.
+
+**[v3: mm: collect the number of anon mTHP](http://lore.kernel.org/linux-mm/20240822224015.93186-1-21cnbao@gmail.com/)**
+
+> Knowing the number of anon mTHPs in the system is crucial for performance
+> analysis.
+
+**[v5: Permission Overlay Extension](http://lore.kernel.org/linux-mm/20240822151113.1479789-1-joey.gouly@arm.com/)**
+
+> This series implements the Permission Overlay Extension introduced in 2022
+> VMSA enhancements.
+
+**[v13: enable bs > ps in XFS](http://lore.kernel.org/linux-mm/20240822135018.1931258-1-kernel@pankajraghav.com/)**
+
+> This is the 13th version of the series that enables block size > page size
+> (Large Block Size) experimental support in XFS. Please consider this for
+> the inclusion in 6.12.
+
+**[v2: introduce pte_offset_map_{ro/rw}_nolock()](http://lore.kernel.org/linux-mm/cover.1724310149.git.zhengqi.arch@bytedance.com/)**
+
+**[v2: Wire up getrandom() vDSO implementation on powerpc](http://lore.kernel.org/linux-mm/cover.1724309198.git.christophe.leroy@csgroup.eu/)**
+
+> This series wires up getrandom() vDSO implementation on powerpc.
+
+**[v2: implement async block discards/etc. via io_uring](http://lore.kernel.org/linux-mm/cover.1724297388.git.asml.silence@gmail.com/)**
+
+> There is an interest in having asynchronous block operations like
+> discard and write zeroes.
+
+**[v1: codetag: debug: mark codetags for pages which transitioned from being poison to unpoison as empty](http://lore.kernel.org/linux-mm/20240822025800.13380-1-hao.ge@linux.dev/)**
+
+> The PG_hwpoison page will be caught and isolated on the entrance to
+> the free buddy page pool. so,when we clear this flag and return it
+> to the buddy system,mark codetags for pages as empty.
+
+**[v1: mm:slab:use kmem_cache_free() to free](http://lore.kernel.org/linux-mm/20240822022704.1195439-1-yanzhen@vivo.com/)**
+
+> The kmem_cache_alloc() is typically used to free memory allocated through
+> the kernel memory cache (slab allocator).
+
+### 文件系统
+
+**[v2: bcachefs: support idmap mounts](http://lore.kernel.org/linux-fsdevel/20240824012724.1256722-1-lihongbo22@huawei.com/)**
+
+> We enable idmapped mounts for bcachefs.
+
+### 网络设备
+
+**[v22: net-next: Device Memory TCP](http://lore.kernel.org/netdev/20240825041511.324452-1-almasrymina@google.com/)**
+
+**[v1: net-next: net: ag71xx: support probe defferal for getting MAC address](http://lore.kernel.org/netdev/20240824200249.137209-1-rosenp@gmail.com/)**
+
+> Currently, of_get_ethdev_address() return is checked for any return error
+> code which means that trying to get the MAC from NVMEM cells that is backed
+> by MTD will fail if it was not probed before ag71xx.
+
+**[v1: net-next: net: phy: aquantia: enable firmware loading for aqr105 on PCIe cards](http://lore.kernel.org/netdev/c7c1a3ae-be97-4929-8d89-04c8aa870209@gmx.net/)**
+
+> This patch series adds support for firmware loading from the filesystem for
+> Aquantia PHYs in a non-device-tree environment and activates firmware
+> loading
+> for the AQR105 PHY.
+
+**[v10: ipsec-next: Add IP-TFS mode to xfrm](http://lore.kernel.org/netdev/20240824022054.3788149-1-chopps@chopps.org/)**
+
+> This patchset adds a new xfrm mode implementing on-demand IP-TFS.
+
+**[v7: net-next: net: phy: add Applied Micro QT2025 PHY driver](http://lore.kernel.org/netdev/20240824020617.113828-1-fujita.tomonori@gmail.com/)**
+
+> This patchset adds a PHY driver for Applied Micro Circuits Corporation
+> QT2025.
+
+**[v1: net-next: Expand statistics reported in ethtool](http://lore.kernel.org/netdev/20240823235401.29996-1-neescoba@cisco.com/)**
+
+> The following patches expand the statistics reported in ethtool for the enic
+> driver
+
+**[v5: net-next: net: dsa: microchip: Add KSZ8895/KSZ8864 switch support](http://lore.kernel.org/netdev/BYAPR11MB35580EA278E5373206F5CBC8EC882@BYAPR11MB3558.namprd11.prod.outlook.com/)**
+
+> This series of patches is to add KSZ8895/KSZ8864 switch support to the
+> KSZ DSA driver.
+
+**[v1: Adding SO_PEEK_OFF for TCPv6](http://lore.kernel.org/netdev/20240823211902.143210-1-jmaloy@redhat.com/)**
+
+> Adding SO_PEEK_OFF for TCPv6 and selftest for both TCPv4 and TCPv6.
+
+**[v4: net-next: flow_dissector: Dissect UDP encapsulation protocols](http://lore.kernel.org/netdev/20240823201557.1794985-1-tom@herbertland.com/)**
+
+> Add support in flow_dissector for dissecting into UDP
+> encapsulations like VXLAN. __skb_flow_dissect_udp is called for
+> IPPROTO_UDP.
+
+**[v2: nf-next: netfilter: Make IP_NF_IPTABLES_LEGACY selectable](http://lore.kernel.org/netdev/20240823174855.3052334-1-leitao@debian.org/)**
+
+> These two patches make IP_NF_IPTABLES_LEGACY and IP6_NF_IPTABLES_LEGACY
+> Kconfigs user selectable, avoiding creating an extra dependency by
+> enabling some other config that would select IP{6}_NF_IPTABLES_LEGACY.
+
+**[v1: net-next: Suspend IRQs during application busy periods](http://lore.kernel.org/netdev/20240823173103.94978-1-jdamato@fastly.com/)**
+
+> This series introduces a new mechanism, IRQ suspension, which allows
+> network applications using epoll to mask IRQs during periods of high
+> traffic while also reducing tail latency (compared to existing
+> mechanisms, see below) during periods of low traffic.
+
+**[v3: Add GMAC support for rk3576](http://lore.kernel.org/netdev/20240823141318.51201-1-detlev.casanova@collabora.com/)**
+
+> Add the necessary constants and functions to support the GMAC devices on
+> the rk3576.
+
+### 安全增强
+
+**[v2: -next: lib/string_choices: Add str_true_false()/str_false_true() helper](http://lore.kernel.org/linux-hardening/20240824070950.2014859-1-lihongbo22@huawei.com/)**
+
+> Add str_true_false()/str_false_true() helper to return "true" or
+> "false" string literal.
+
+**[v8: Add support for aw96103/aw96105 proximity sensor](http://lore.kernel.org/linux-hardening/20240823094947.3511730-1-wangshuaijie@awinic.com/)**
+
+> Add drivers that support Awinic aw96103/aw96105 proximity sensors.
+
+**[v1: -next: Add str_true_false()/str_false_true() helper](http://lore.kernel.org/linux-hardening/20240823062046.3323694-1-lihongbo22@huawei.com/)**
+
+> Add str_true_false()/str_false_true() helper to "true" or "false"
+> string literal.
+
+**[v3: arm64: smp: smp_send_stop() and crash_smp_send_stop() should try non-NMI first](http://lore.kernel.org/linux-hardening/20240821145353.v3.1.Id4817adef610302554b8aa42b090d57270dc119c@changeid/)**
+
+> When testing hard lockup handling on my sc7180-trogdor-lazor device
+> with pseudo-NMI enabled, with serial console enabled and with kgdb
+> disabled, I found that the stack crawls printed to the serial console
+> ended up as a jumbled mess.
+
+**[v1: output a valid shell script when running 'make -n'](http://lore.kernel.org/linux-hardening/20240819160309.2218114-1-vegard.nossum@oracle.com/)**
+
+> This patch series lets 'make -n' output a shell script that can be
+> used to build the kernel without any further use of make.
+
+**[v1: pstore: replace spinlock_t by raw_spinlock_t](http://lore.kernel.org/linux-hardening/20240819145945.61274-1-wen.yang@linux.dev/)**
+
+> Replace the spinlock_t with raw_spinlock_t to avoid sleeping in atomic context.
+
+### 异步 IO
+
+**[v1: btrfs: add io_uring for encoded reads](http://lore.kernel.org/io-uring/20240823162810.1668399-1-maharmstone@fb.com/)**
+
+> This patch series adds io_uring support for btrfs encoded reads,
+> complementing the ioctl we already have.
+
+**[v2: RFC: Add support for incremental buffer consumption](http://lore.kernel.org/io-uring/20240823145104.20600-2-axboe@kernel.dk/)**
+
+> The recommended way to use io_uring for networking workloads is to use
+> ring provided buffers. The application sets up a ring (or several) for
+> buffers, and puts buffers for receiving data into them.
+
+**[v3: Read/Write with meta/integrity](http://lore.kernel.org/io-uring/20240823103811.2421-1-anuj20.g@samsung.com/)**
+
+> This adds a new io_uring interface to exchange meta along with read/write.
+
+**[v1: io_uring/kbuf: sanitize peek buffer setup](http://lore.kernel.org/io-uring/c25950aa-416c-47ab-b889-113d73013cf5@kernel.dk/)**
+
+> Harden the buffer peeking a bit, by adding a sanity check for it having
+> a valid size.
+
+**[v2: io_uring/fdinfo: add timeout_list to fdinfo](http://lore.kernel.org/io-uring/20240819074323.644650-1-ruyi.zhang@samsung.com/)**
+
+> However, there is
+> currently a lack of timeout-related information, and this patch adds
+> timeout_list information.
+
+### Rust For Linux
+
+**[v1: rust: experiment with `#[derive(SmartPointer)]`](http://lore.kernel.org/rust-for-linux/20240823-derive-smart-pointer-v1-1-53769cd37239@google.com/)**
+
+> I am sending this RFC patch to share my experience with using the new
+> `#[derive(SmartPointer)]` feature [1] with our custom smart pointers.
+
+**[v1: rust: kernel: add support for bits/genmask macros](http://lore.kernel.org/rust-for-linux/20240822173518.2717-1-daniel.almeida@collabora.com/)**
+
+> These macros were converted from their C equivalent.
+
+**[v7: drm/panic: Add a QR code panic screen](http://lore.kernel.org/rust-for-linux/20240822073852.562286-1-jfalempe@redhat.com/)**
+
+> This series adds a new panic screen, with the kmsg data embedded in a QR code.
+
+**[v4: Rust KASAN Support](http://lore.kernel.org/rust-for-linux/20240820194910.187826-1-mmaurer@google.com/)**
+
+> Right now, if we turn on KASAN, Rust code will cause violations because
+> it's not enabled properly.
+
+**[v2: rust: add `module_params` macro](http://lore.kernel.org/rust-for-linux/20240819133345.3438739-1-nmi@metaspace.dk/)**
+
+> This patch includes changes required for Rust kernel modules to utilize
+> module parameters.
+
+**[v1: v2b: rust: cfi: add support for CFI_CLANG with Rust](http://lore.kernel.org/rust-for-linux/20240801-kcfi-v2b-2-c93caed3d121@google.com/)**
+
+> Make it possible to use the Control Flow Integrity (CFI) sanitizer when
+> Rust is enabled.
+
+**[v1: rust: enable rustdoc's `--generate-link-to-definition`](http://lore.kernel.org/rust-for-linux/20240818141249.387166-1-ojeda@kernel.org/)**
+
+> In Rust 1.56.0 [1], rustdoc introduced the "jump to definition"
+> feature [2], i.e. the unstable flag `--generate-link-to-definition`.
+> It adds links to the source view of the documentation.
+
+**[v2: kbuild: rust: auto generate rust helper exports](http://lore.kernel.org/rust-for-linux/20240817165302.3852499-1-gary@garyguo.net/)**
+
+> This removes the need for explicit exporting all symbols.
+
+### BPF
+
+**[v1: bpf-next: netkit: Disable netpoll support](http://lore.kernel.org/bpf/eab2d69ba2f4c260aef62e4ff0d803e9f60c2c5d.1724414250.git.daniel@iogearbox.net/)**
+
+> Follow-up to 45160cebd6ac ("net: veth: Disable netpoll support") to
+> also disable netpoll for netkit interfaces.
+
+**[v1: bpf: add check for invalid name in btf_name_valid_section()](http://lore.kernel.org/bpf/20240823104310.4076479-1-aha310510@gmail.com/)**
+
+> If the length of the name string is 1 and the value of name[0] is NULL
+> byte, an OOB vulnerability occurs in btf_name_valid_section() and the
+> return value is true, so the invalid name passes the check.
+
+**[v1: bpf-next: follow up for __jited test tag](http://lore.kernel.org/bpf/20240823080644.263943-1-eddyz87@gmail.com/)**
+
+> This patch-set is a collection of follow-ups for
+> "__jited test tag to check disassembly after jit" series (see [1]).
+
+**[v3: bpf-next: support bpf_fastcall patterns for calls to kfuncs](http://lore.kernel.org/bpf/20240822084112.3257995-1-eddyz87@gmail.com/)**
+
+> As an extension of [1], allow bpf_fastcall patterns for kfuncs:
+> - pattern rules are the same as for helpers;
+> - spill/fill removal is allowed only for kfuncs listed in the
+>   is_fastcall_kfunc_call (under assumption that such kfuncs would
+>   always be members of special_kfunc_list).
+
+**[v2: bpf-next: bpf: Add gen_epilogue and allow kfunc call in pro/epilogue](http://lore.kernel.org/bpf/20240821233440.1855263-1-martin.lau@linux.dev/)**
+
+> This set allows the subsystem to patch codes before BPF_EXIT.
+> The verifier ops, .gen_epilogue, is added for this purpose.
+
+**[v1: bpf-next: bpf/bpf_lru_list: make bpf_common_lru_pop_free safe in NMI](http://lore.kernel.org/bpf/CAPPBnEZmFA3ab8Uc=PEm0bdojZy=7T_F5_+eyZSHyZR3MBG4Vw@mail.gmail.com/)**
+
+> This function is
+> used by htab_lru_map_update_elem() which can be called from an
+> NMI.
+
+**[v1: bpftool: check for NULL ptr of btf in codegen_subskel_datasecs](http://lore.kernel.org/bpf/20240821133112.1467721-1-make24@iscas.ac.cn/)**
+
+> bpf_object__btf() can return NULL value.  If bpf_object__btf returns null,
+> do not progress through codegen_subskel_datasecs(). This avoids a null ptr
+> dereference.
+
+**[v1: net-next: Unmask upper DSCP bits - part 1](http://lore.kernel.org/bpf/20240821125251.1571445-1-idosch@nvidia.com/)**
+
+> The TOS field in the IPv4 flow key ('flowi4_tos') is used during FIB
+> lookup to match against the TOS selector in FIB rules and routes.
+
+**[v2: libbpf: Initialize st_ops->tname with strdup()](http://lore.kernel.org/bpf/20240821112344.54299-3-soma.nakata01@gmail.com/)**
+
+> `tname` is returned by `btf__name_by_offset()` as well as `var_name`,
+> and these addresses point to strings in the btf. Since their locations
+> may change while loading the bpf program, using `strdup()` ensures
+> `tname` is safely stored.
+
+**[v4: net: bpf, net: Check cgroup_bpf_enabled() only once in do_sock_getsockopt()](http://lore.kernel.org/bpf/20240821093016.2533-1-Tze-nan.Wu@mediatek.com/)**
+
+**[v21: net-next: net: refactor ->ndo_bpf calls into dev_xdp_propagate](http://lore.kernel.org/bpf/20240821045629.2856641-1-almasrymina@google.com/)**
+
+> When net devices propagate xdp configurations to slave devices, or when
+> core propagates xdp configuration to a device, we will need to perform
+> a memory provider check to ensure we're not binding xdp to a device
+> using unreadable netmem.
+
+**[v3: bpf-next: __jited test tag to check disassembly after jit](http://lore.kernel.org/bpf/20240820102357.3372779-1-eddyz87@gmail.com/)**
+
+> This patch set adds a macro __jited() that could be used for
+> test_loader based tests in a following manner.
+
+**[v3: net/socket: Check cgroup_bpf_enabled() only once in do_sock_getsockopt()](http://lore.kernel.org/bpf/20240820092942.16654-1-Tze-nan.Wu@mediatek.com/)**
+
+**[v1: kbuild: bpf: Do not run pahole with -j on 32bit userspace](http://lore.kernel.org/bpf/20240820085950.200358-1-jirislaby@kernel.org/)**
+
+> This is only a PoC. There are deficiencies like CROSS_COMPILE or LLVM
+> are completely unhandled.
+
+**[v1: net-next: virtio-net: support AF_XDP zero copy (tx)](http://lore.kernel.org/bpf/20240820073330.9161-1-xuanzhuo@linux.alibaba.com/)**
+
+> The zero
+> copy feature of xsk (XDP socket) needs to be supported by the driver. The
+> performance of zero copy is very good. mlx5 and intel ixgbe already support
+> this feature, This patch set allows virtio-net to support xsk's zerocopy xmit
+> feature.
+
+**[v21: net-next: Device Memory TCP](http://lore.kernel.org/bpf/20240820060456.1485518-1-almasrymina@google.com/)**
+
+**[v6: bpf-next: bpf: enable some functions in cgroup programs](http://lore.kernel.org/bpf/20240819162805.78235-1-technoboy85@gmail.com/)**
+
+> Enable some BPF kfuncs and the helper bpf_current_task_under_cgroup()
+> for program types BPF_CGROUP_*.
+
+**[v1: bpf: Refactoring btf_name_valid_identifier() and btf_name_valid_section()](http://lore.kernel.org/bpf/20240819160758.296567-1-aha310510@gmail.com/)**
+
+> Currently, btf_name_valid_identifier() and btf_name_valid_section() are
+> written in a while loop and use pointer operations, so it takes a long
+> time to understand the operation of the code.
+
+**[v1: net/socket: Acquire cgroup_lock in do_sock_getsockopt](http://lore.kernel.org/bpf/20240819082513.27176-1-Tze-nan.Wu@mediatek.com/)**
+
+## 周边技术动态
+
+### Qemu
+
+**[v3: bsd-user: Comprehensive RISCV Support](http://lore.kernel.org/qemu-devel/20240824045635.8978-1-itachis@FreeBSD.org/)**
+
+> Key Changes Compared to Version 2.
+
+**[v8: riscv support for control flow integrity extensions](http://lore.kernel.org/qemu-devel/20240823190140.4156920-1-debug@rivosinc.com/)**
+
+> v8 for riscv zicfilp and zicfiss extensions support in qemu.
+
+**[v1: target: riscv: Enable Bit Manip for OpenTitan Ibex CPU](http://lore.kernel.org/qemu-devel/20240823003231.3522113-1-alistair.francis@wdc.com/)**
+
+> The OpenTitan Ibex CPU now supports the the Zba, Zbb, Zbc
+> and Zbs bit-manipulation sub-extensions ratified in
+> v.1.0.0 of the RISC-V Bit- Manipulation ISA Extension, so let's enable
+> them in QEMU as well.
+
+**[v2: 01/11: target/riscv: Add CLIC CSR mintstatus](http://lore.kernel.org/qemu-devel/20240819160742.27586-3-Ian.Brockbank@cirrus.com/)**
+
+> CSR mintstatus holds the active interrupt level for each supported
+> privilege mode. sintstatus, and user, uintstatus, provide restricted
+> views of mintstatus.
+
+**[v2: 00/11: RISC-V: support CLIC v0.9 specification](http://lore.kernel.org/qemu-devel/20240819160742.27586-1-Ian.Brockbank@cirrus.com/)**
+
+> This patch set gives an implementation of "RISC-V Core-Local Interrupt
+> Controller(CLIC) Version 0.9-draft-20210217".
+
+**[v1: boot: optee-os: enable RISC-V (64-bit) architecture](http://lore.kernel.org/buildroot/20240817112203.3719873-1-peterlin@andestech.com/)**
+
+> OP-TEE OS and TAs can run on RISC-V (64-bit) machines, so allow
+> optee-os to be compiled for the new architecture.
+
+### U-Boot
+
+**[v2: Risc-V cache operations](http://lore.kernel.org/u-boot/20240823094127.207866-1-mchitale@ventanamicro.com/)**
+
+> This patchset adds support for using the CBO instructions to perform the
+> dcache flush/inval operations for the qemu-riscv board when those are
+> enabled.
+
+**[v3: Make LMB memory map global and persistent](http://lore.kernel.org/u-boot/20240821105839.2870293-1-sughosh.ganu@linaro.org/)**
+
+> This is a follow-up from an earlier RFC series for making the LMB
+> and EFI memory allocations work together.
+
+**[v1: riscv: Add AST2700 platform support](http://lore.kernel.org/u-boot/20240819101704.1612317-1-chiawei_wang@aspeedtech.com/)**
+
+> AST2700 is the 7th generation of Aspeed BMC SoCs.
+
+