diff --git a/99-openfpgaloader.rules b/99-openfpgaloader.rules
index d3ce1565f7..1c484ee6cb 100644
--- a/99-openfpgaloader.rules
+++ b/99-openfpgaloader.rules
@@ -50,6 +50,9 @@ ATTRS{idVendor}=="0d28", ATTRS{idProduct}=="0204", MODE="664", GROUP="plugdev",
 # icebreaker bitsy
 ATTRS{idVendor}=="1d50", ATTRS{idProduct}=="6146", MODE="664", GROUP="plugdev", TAG+="uaccess"
 
+# numato systems
+ATTRS{idVendor}=="2a19", ATTRS{idProduct}=="1009", MODE="644", GROUP="plugdev", TAG+="uaccess"
+
 # orbtrace-mini dfu
 ATTRS{idVendor}=="1209", ATTRS{idProduct}=="3442", MODE="664", GROUP="plugdev", TAG+="uaccess"
 
diff --git a/doc/boards.yml b/doc/boards.yml
index 3047568fa0..2989c0ed57 100644
--- a/doc/boards.yml
+++ b/doc/boards.yml
@@ -531,6 +531,13 @@
   Memory: OK
   Flash: NA
 
+- ID: mimas_a7
+  Description: Numato Systems Mimas A7
+  URL: https://numato.com/product/mimas-a7-artix-7-fpga-development-board/
+  FPGA: Artix xc7a50tfgg484
+  Memory: OK
+  Flash: OK
+
 - ID: nexys_a7_50
   Description: Digilent Nexys A7(Nexys 4 DDR)
   URL: https://digilent.com/reference/programmable-logic/nexys-a7/start
diff --git a/doc/cable.yml b/doc/cable.yml
index 90e54a3770..6d64469d58 100644
--- a/doc/cable.yml
+++ b/doc/cable.yml
@@ -235,6 +235,11 @@ lpc-link2:
     URL: https://www.nxp.com/design/microcontrollers-developer-resources/lpc-link2:OM13054
 
 
+numato:
+
+  - Name: numato
+    Description: Embedded cable for Numato Systems Mimas-A7 board
+    
 orbtrace:
 
   - Name: orbtrace interface
diff --git a/src/board.hpp b/src/board.hpp
index 2aab33bf2a..3425940938 100644
--- a/src/board.hpp
+++ b/src/board.hpp
@@ -183,6 +183,7 @@ static std::map <std::string, target_board_t> board_list = {
 	JTAG_BOARD("machXO2EVN",      "", "ft2232",     0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("machXO3SK",       "", "ft2232",     0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("machXO3EVN",      "", "ft2232",     0, 0, CABLE_DEFAULT),
+	JTAG_BOARD("mimas_a7",		  "xc7a50tfgg484",	"numato", 0, 0, CABLE_MHZ(30)),
 	JTAG_BOARD("minispartan6",    "", "ft2232",    0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("nexys_a7_50",     "xc7a50tcsg324",  "digilent", 0, 0, CABLE_DEFAULT),
 	JTAG_BOARD("nexys_a7_100",    "xc7a100tcsg324", "digilent", 0, 0, CABLE_DEFAULT),
diff --git a/src/cable.hpp b/src/cable.hpp
index 2435a26661..8729adbcec 100644
--- a/src/cable.hpp
+++ b/src/cable.hpp
@@ -120,6 +120,7 @@ static std::map <std::string, cable_t> cable_list = {
 	{"jtrace_pro",         CABLE_DEF(MODE_JLINK, 0x1366, 0x1020                        )},
 	{"jtag-smt2-nc",       FTDI_SER(0x0403, 0x6014, FTDI_INTF_A, 0xe8, 0xeb, 0x00, 0x60)},
 	{"lpc-link2",          CMSIS_CL(0x1fc9, 0x0090                                     )},
+	{"numato",			   FTDI_SER(0x2a19, 0x1009, FTDI_INTF_B, 0x08, 0x4b, 0x00, 0x00)},
 	{"orbtrace",           CMSIS_CL(0x1209, 0x3443                                     )},
 	{"papilio",            FTDI_SER(0x0403, 0x6010, FTDI_INTF_A, 0x08, 0x0B, 0x09, 0x0B)},
 	{"steppenprobe",       FTDI_SER(0x0403, 0x6010, FTDI_INTF_A, 0x58, 0xFB, 0x00, 0x99)},