Testing this on my ROG Strix Vega 56 #1
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Okay so I think I figured it out, there is a typo in the |
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Okay, so I might have figured this one out. I ran |
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I've never seen any output from the Vega series cards so I have no idea of what other chips should be there. At the very least the AURA chip should be address 0x29. On my RX580, there is also a fan controller at 0x30. I can only assume that the driver is reading/writing the wrong memory registers. Give me a bit of time and I'll make the BIOS on the card handle the i2c calls. This is how I originally discovered the hidden bus on the RX580. |
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I've updated the code to allow the GPU's BIOS to handle the i2c calls. Usage is exactly the same as before (less the typos :-/ ) |
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Does that mean it should output the clients on that i2cbus? Because I followed the |
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Yeah, I was hoping I had the register addresses wrong and that the BIOS would reveal their true values. Are there any error messages in I could really use the output of AIDA64 on Windows to see if the controller is actually there. |
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Here you go. I hope this helps and I have no idea what it means: |
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Nothing of use. The bus is there and being read correctly, but there are no devices on it. |
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So you need the output of AIDA64 than I guess. I will see what I can do. |
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Hello. Sorry if I am just adding to this issue but I have a Strix Vega 64 and added the device to the header file. |
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@crashniels Currently any card higher than the 580 is not supported. The problem is AMD have not released the chipset information I need to access the i2c registers. Even for the polaris cards, I took a gamble and discovered them by finding unused register names in the linux kernel source code. If you have access to windows, I really could use the output of AIDA64, which would tell me which bus the aura chip is using. I keep meaning to start working on this project again, but the current virus situation has put my life in turmoil. |
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Yes I have access to Windows and have AIDA64 installed. What would I need to do in AIDA64 ? |
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@crashniels There is a slightly old video showing the process here Just copy and paste the output. If the bottom bar menu doesn't appear, you have to enable it in the settings somewhere (can't remember where exactly). |
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I followed the steps but it only returns a short summary and does not seem to scan for the i2c interfaces. |
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I found the Aura chip in Windows using the ADL libraries. On Windows it is Line 1 (Bus 2) via the ADL libraries. I also made a PR on OpenRGB. On Linux it might be on one of the busses you tried before. The RX 400/500 series might not use that bus but the Vega might. |
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@crashniels Thanks for the info, however I've already pulled the ADL binary apart. ADL first transitions into 64bit (SYSWOW64) which many debuggers/decompilers cannot handle, then enters kernel mode, which in turn calls This poses a few problems when reverse engineering. First, the Radeon driver is a large binary, so finding the location of the i2c routines is difficult. Second, since it's tied to the hardware I need a second PC to remotely debug and step through the code. On top of that, it's all in 64 bit assembly, which I have never worked with before. I don't have a Vega card to work with, but If I can figure it out for my 5700XT I should also find the solution for all cards. |
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I don't know if it already works in OpenRGB but if it doesn't work yet I am willing to help again, got inactive last time due to some personal issues. I still have my Vega 56 btw. |
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I stand corrected. This does work on Vega. After looking at the kernel code and wondering what they are doing I messed around with the line numbers and I got a hit on line 7. |
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I also have this card and aura-gpu does enable me to detect the i2c bus, I can't get openrgb to detect it. |
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I have vega 64 and after incorporating all the other PRs in my repo and added Vega64 I also get it to be detected by i2c-bus but openrgb doesn't show it |
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Line 204 in d98da6d |
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Cool, thanks! I have no idea how this works, but it now works perfectly for my Vega64. It seems this repo is a bit abandoned as the incoming PRs is just sitting there. My C-skill is a bit rusty but I fail to see how ucLinenumber is used and changing it makes it work. If there is any interest I can make an arch aur-package for my fork which incorporates all PRs |
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The driver only exposes the busses with display connectors. There are busses which aren't exposed. On Polaris the aura chip seems to be on line 6 while on Vega it is line 7. An AUR package would be great as right now I have to re-make after every pacman update. |
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Alright, I'll try get an aur-package for it as I want to have my life easy and not remake modules after each kernel update :) Regarding the linenumber I'll leave it up for someone else on that hardware to make a PR for making some detection logic to change the number based on detected hardware. |
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My first dkms package! It was a bit more challenging than I expected. Try it out and report if it works. |
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Okay, so I followed the
readme.mdand here is what happened:The text was updated successfully, but these errors were encountered: