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Macro definition #3

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peijunh opened this issue Jul 7, 2021 · 0 comments
Open

Macro definition #3

peijunh opened this issue Jul 7, 2021 · 0 comments

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@peijunh
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peijunh commented Jul 7, 2021 •
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Hello, when I try to convert the system verilog, I include a sv file defining a macro. But it gives me this error:

image

Here ASSERT_DEFAULT_CLK and ASSERT_DEFAULT_RST are defined previously, so they are not unknown macros.
define ASSERT_DEFAULT_CLK clk_i define ASSERT_DEFAULT_RST !rst_ni

So does this syntax supported? I appreciate your help.
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