From 9be668c057d2907476dfadb6f93be16d5287ab83 Mon Sep 17 00:00:00 2001
From: thealmarty <“thealmartyblog@gmail.com”>
Date: Thu, 18 Apr 2024 11:31:39 -0700
Subject: [PATCH] Add to assembler/REPL.

---
 assembler/grammar/assembly.pest | 2 +-
 assembler/src/lib.rs            | 4 ++--
 cpu/src/lib.rs                  | 6 +++---
 machine/src/program.rs          | 9 +++++++++
 4 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/assembler/grammar/assembly.pest b/assembler/grammar/assembly.pest
index 530aa40..82cea9e 100644
--- a/assembler/grammar/assembly.pest
+++ b/assembler/grammar/assembly.pest
@@ -3,7 +3,7 @@ comment = { ";" ~ (!"\n" ~ ANY)* ~ "\n" }
 label = { (!":" ~ !"\n" ~ ANY)+ ~ ":" ~ "\n" }
 instruction = { mnemonic ~ (operand ~ ", "?)+? ~ "\n"? }
 mnemonic = { 
-    "lw" | "sw" | "jalv" | "jal" | "beqi" | "beq" | "bnei" | "bne" | "imm32" | "stop" |
+    "lw" | "sw" | "loadu8" | "loads8" | "storeu8" | "jalv" | "jal" | "beqi" | "beq" | "bnei" | "bne" | "imm32" | "stop" |
     "advread" | "advwrite" | 
     "addi" | "add" | "subi" | "sub" | "muli" | "mul" | "mulhsi"| "mulhui"| "mulhs"| "mulhu"  | "divi" | "div" | "sdiv" | "sdivi" |
     "ilte" | "ltei" | "lte" | "ilt" | "lti" | "lt" | "shli" | "shl" | "shri" | "shr" | "srai" | "sra" |
diff --git a/assembler/src/lib.rs b/assembler/src/lib.rs
index 5d0c1e9..b3ed64b 100644
--- a/assembler/src/lib.rs
+++ b/assembler/src/lib.rs
@@ -104,12 +104,12 @@ pub fn assemble(input: &str) -> Result<Vec<u8>, String> {
 
                 // Insert zero operands if necessary
                 match mnemonic {
-                    "lw" => {
+                    "lw" | "loadu8" | "loads8" => {
                         // (a, 0, c, 0, 0)
                         operands.insert(1, 0);
                         operands.extend(vec![0; 2]);
                     }
-                    "sw" => {
+                    "sw" | "storeu8" => {
                         // (0, b, c, 0, 0)
                         operands.insert(0, 0);
                         operands.extend(vec![0; 2]);
diff --git a/cpu/src/lib.rs b/cpu/src/lib.rs
index 6af95dc..ded7772 100644
--- a/cpu/src/lib.rs
+++ b/cpu/src/lib.rs
@@ -11,7 +11,7 @@ use core::marker::Sync;
 use core::mem::transmute;
 use valida_bus::{MachineWithGeneralBus, MachineWithMemBus, MachineWithProgramBus};
 use valida_machine::{
-    index_of_byte, addr_of_word, instructions, AdviceProvider, Chip, Instruction, InstructionWord,
+    addr_of_word, index_of_byte, instructions, AdviceProvider, Chip, Instruction, InstructionWord,
     Interaction, Operands, Word,
 };
 use valida_memory::{MachineWithMemoryChip, Operation as MemoryOperation};
@@ -532,9 +532,9 @@ where
         let read_addr = state
             .mem_mut()
             .read(clk, read_addr_loc, true, pc, opcode, 0, "");
-        
+
         let read_addr_index = addr_of_word(read_addr.into());
-        
+
         // The word from the read address.
         let cell = state.mem_mut().read(
             clk,
diff --git a/machine/src/program.rs b/machine/src/program.rs
index f61bcba..3032f8c 100644
--- a/machine/src/program.rs
+++ b/machine/src/program.rs
@@ -102,9 +102,18 @@ impl InstructionWord<i32> {
             valida_opcodes::LOAD32 => {
                 format!("{}(fp), {}(fp)", self.operands.0[0], self.operands.0[2])
             }
+            valida_opcodes::LOADU8 => {
+                format!("{}(fp), {}(fp)", self.operands.0[0], self.operands.0[2])
+            }
+            valida_opcodes::LOADS8 => {
+                format!("{}(fp), {}(fp)", self.operands.0[0], self.operands.0[2])
+            }
             valida_opcodes::STORE32 => {
                 format!("{}(fp), {}(fp)", self.operands.0[1], self.operands.0[2])
             }
+            valida_opcodes::STOREU8 => {
+                format!("{}(fp), {}(fp)", self.operands.0[1], self.operands.0[2])
+            }
             _ => {
                 format!(
                     "{}(fp), {}, {}",