From f7dc9cee87da320c4c93b69d63114aea216b6ec2 Mon Sep 17 00:00:00 2001 From: Dan Dore Date: Sat, 4 May 2024 01:49:21 -0700 Subject: [PATCH 1/2] fixes bit columns not being set in Bitwise32Chip --- alu_u32/src/bitwise/columns.rs | 2 +- alu_u32/src/bitwise/mod.rs | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/alu_u32/src/bitwise/columns.rs b/alu_u32/src/bitwise/columns.rs index 5e80aabe..551a37d7 100644 --- a/alu_u32/src/bitwise/columns.rs +++ b/alu_u32/src/bitwise/columns.rs @@ -4,7 +4,7 @@ use valida_derive::AlignedBorrow; use valida_machine::Word; use valida_util::indices_arr; -#[derive(AlignedBorrow, Default)] +#[derive(AlignedBorrow, Default, Debug)] pub struct Bitwise32Cols { pub input_1: Word, pub input_2: Word, diff --git a/alu_u32/src/bitwise/mod.rs b/alu_u32/src/bitwise/mod.rs index 2ec2684d..fd4ff88c 100644 --- a/alu_u32/src/bitwise/mod.rs +++ b/alu_u32/src/bitwise/mod.rs @@ -19,7 +19,7 @@ use valida_util::pad_to_power_of_two; pub mod columns; pub mod stark; -#[derive(Clone)] +#[derive(Clone, Debug)] pub enum Operation { And32(Word, Word, Word), // (dst, src1, src2) Or32(Word, Word, Word), // '' @@ -124,6 +124,8 @@ impl Bitwise32Chip { bits_2[i][j] = F::from_canonical_u8(c[i] >> j & 1); } } + cols.bits_1 = bits_1; + cols.bits_2 = bits_2; } } From 1aa80c96775d31553f79f8634e043d7c496c9ceb Mon Sep 17 00:00:00 2001 From: Dan Dore Date: Sat, 4 May 2024 02:08:51 -0700 Subject: [PATCH 2/2] fixes Or32 instructions being recorded as And32 --- alu_u32/src/bitwise/mod.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/alu_u32/src/bitwise/mod.rs b/alu_u32/src/bitwise/mod.rs index fd4ff88c..9d98aef9 100644 --- a/alu_u32/src/bitwise/mod.rs +++ b/alu_u32/src/bitwise/mod.rs @@ -248,7 +248,7 @@ where state .bitwise_u32_mut() .operations - .push(Operation::And32(a, b, c)); + .push(Operation::Or32(a, b, c)); state.cpu_mut().push_bus_op(imm, opcode, ops); } }