From 35a82e7022ccf1a4b7fde81ca95a7c0ebf81e548 Mon Sep 17 00:00:00 2001 From: Wang Yuanqi <101231450+Wang-Yuanqi-source@users.noreply.github.com> Date: Fri, 29 Nov 2024 10:30:09 +0800 Subject: [PATCH] Create VIB.rst --- doc/src/vpr/VIB.rst | 173 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 173 insertions(+) create mode 100644 doc/src/vpr/VIB.rst diff --git a/doc/src/vpr/VIB.rst b/doc/src/vpr/VIB.rst new file mode 100644 index 0000000000..29012ccfb9 --- /dev/null +++ b/doc/src/vpr/VIB.rst @@ -0,0 +1,173 @@ +.. _VIB: + +VIB +============ +The VIB architecture adds modeling support for double-level MUX topology and bent wires. + +.. figure:: ../Images/VIB.png + :align: center + :height: 300 + + VIB architecture. The connections between the inputs and outputs of the LB and the routing wires are all implemented within the VIB. + +.. figure:: ../Images/double-level.png + :align: center + + Double-level MUX topology. + +.. figure:: ../Images/bent_wires.png + :align: center + + Presentation for bent wires. + +FPGA Architecture File Modification (.xml) +-------------------------- +For original tags of FPGA architecture file see :ref:`fpga_architecture_description`. + +Modification for ```` Tag +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +The content within the ```` tag consists of a group of ```` tags. +The ```` tag and its contents are described below. + +.. arch:tag:: content + + :req_param content: + The switch names and the depopulation pattern as described below. + +.. arch:tag:: int list + +.. arch:tag:: int list + +.. arch:tag:: + +For bent wires, a new content ```` is added in the ```` tag. + +.. arch:tag:: bent pattern list + + This tag describes the bent pattern for this particular wire segment. + For example, a length 4 wire has a bent pattern of ``- - U``. + A ``-`` indicates no bent at this position and a ``U`` indicates a conterclockwise bent at the position. (``D`` indicates a clockwise bent.) + + .. note:: A bent wire should remain consistent in both the x and y axes. + +New Added Top Level Tag ```` +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +The content within the ```` tag consists of a group of ```` tags. Different ```` tags describe the paradigms of VIB, which apply to different positions. + +.. arch:tag:: content + + :req_param name: + A unique alphanumeric name to identify this VIB type. + + :req_param pbtype_name: + The name of the block type (e.g. clb, memory) that this VIB connects to. + + :req_param vib_seg_group: + The number of the segment types in this VIB. + + :req_param arch_vib_switch: + Name of the mux switch type used to drive wires in the VIB by default, and a custom switch can override this switch type for specific connections if desired. + + :req_param content: + The segment groups and the multistage MUX topology as described below. + +The ``content`` of ```` tag consists of several ```` tags and a ```` tag. +For example: + +.. code-block:: xml + + + + + + + + + + ... + + + ... + + + + + ... + + + +.. arch:tag:: + + :req_param name: + The name of the segment in this VIB described in ````. + + :req_param track_nums: + The track number of the segment in this VIB. + + .. note:: When using unidirectional segments, the track number of the segment represents the number for one direction. For example, the ``track_nums`` is ``10``, which means total ``20`` tracks of the segment in the channel for both (INC & DEC) directions. + +.. arch:tag:: content + + :req_param content: + The detaild information for first and second MUXes. + +The ``content`` of ```` tag consists of a ```` tag and a ```` tag. + +.. arch:tag:: content + + :req_param switch_name: + Name of the mux switch type used to drive first stage MUXes in the VIB. + + :req_param content: + The details of each MUX. + +For example: + +.. code-block:: xml + + + + clb.O[0] clb.O[8] clb.O[12:16] + + + L1.E2 L1.W2 L1.S8 L1.N8 + + ... + + +The ```` tag in ```` describes nodes that connects to the MUX. ``clb.O[*]`` means output pin(s); ``L1.E2`` means the track ``2`` in the ``East`` direction of ``L1`` segment. + +.. arch:tag:: content + + :req_param content: + The details of each MUX. + +For example: + +.. code-block:: xml + + + + clb.I[0] + clb.O[0] clb.O[8] f_mux_0 + + + L1.S1 + L1.E1 L1.W1 f_mux_0 f_mux_1 + + ... + + +The ```` tag describes the node this MUX connects to. ``clb.I[*]`` means input pin(s); ``L1.S1`` means the track ``1`` in the ``South`` direction of ``L1`` segment. The ```` tag in ```` describes nodes that connects to the MUX. ``clb.O[*]`` means output pin(s); ``L1.E2`` means the track ``2`` in the ``East`` direction of ``L1`` segment. ``f_mux_0`` means the name of the specific first stage MUX. + +New Added Top Level Tag ```` +~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +Content inside this tag specifies VIB grid layout to describe different VIBs applied on different locations. + +.. arch:tag:: content + + :req_param name: + The name identifying this VIB grid layout. It should be the same as the corresponding layout name inside the ```` tag. + + :req_param content: + The content should contain a set of grid location tags. For grid location tags of vib_layout see :ref:`fpga_architecture_description`; ref:`grid_expressions`