From 801839395bae1483e81dff406cbc8b8d7a46b69c Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 09:48:30 -0400 Subject: [PATCH 01/20] change the required attrbute of layer for grid and node loc --- libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h | 90 +++++++++++-------- .../src/io/gen/rr_graph_uxsdcxx_capnp.h | 13 ++- .../src/io/gen/rr_graph_uxsdcxx_interface.h | 14 +-- libs/librrgraph/src/io/rr_graph.xsd | 4 +- .../gen/rr_graph_uxsdcxx.capnp | 12 +-- 5 files changed, 80 insertions(+), 53 deletions(-) diff --git a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h index 843aa582f12..209658933bc 100644 --- a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h +++ b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h @@ -6,7 +6,7 @@ * * Cmdline: uxsdcxx/uxsdcxx.py /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd * Input file: /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd - * md5sum of input file: 8672cb3951993f7e0ea3433a02507672 + * md5sum of input file: 8a13fa50b87a91c2baab7c6ced02f573 */ #include @@ -82,12 +82,12 @@ template inline void load_block_types(const pugi::xml_node &root, T &out, Context &context, const std::function *report_error, ptrdiff_t *offset_debug); template inline void load_grid_loc(const pugi::xml_node &root, T &out, Context &context, const std::function *report_error, ptrdiff_t *offset_debug); -inline void load_grid_loc_required_attributes(const pugi::xml_node &root, int * block_type_id, int * height_offset, int * width_offset, int * x, int * y, int* layer, const std::function * report_error); +inline void load_grid_loc_required_attributes(const pugi::xml_node &root, int * block_type_id, int * height_offset, int * width_offset, int * x, int * y, const std::function * report_error); template inline void load_grid_locs(const pugi::xml_node &root, T &out, Context &context, const std::function *report_error, ptrdiff_t *offset_debug); template inline void load_node_loc(const pugi::xml_node &root, T &out, Context &context, const std::function *report_error, ptrdiff_t *offset_debug); -inline void load_node_loc_required_attributes(const pugi::xml_node &root, int * layer, int * ptc, int * xhigh, int * xlow, int * yhigh, int * ylow, const std::function * report_error); +inline void load_node_loc_required_attributes(const pugi::xml_node &root, int * ptc, int * xhigh, int * xlow, int * yhigh, int * ylow, const std::function * report_error); template inline void load_node_timing(const pugi::xml_node &root, T &out, Context &context, const std::function *report_error, ptrdiff_t *offset_debug); inline void load_node_timing_required_attributes(const pugi::xml_node &root, float * C, float * R, const std::function * report_error); @@ -269,8 +269,8 @@ constexpr const char *atok_lookup_t_block_type[] = {"height", "id", "name", "wid enum class gtok_t_block_types {BLOCK_TYPE}; constexpr const char *gtok_lookup_t_block_types[] = {"block_type"}; -enum class atok_t_grid_loc {BLOCK_TYPE_ID, HEIGHT_OFFSET, WIDTH_OFFSET, X, Y, LAYER}; -constexpr const char *atok_lookup_t_grid_loc[] = {"block_type_id", "height_offset", "width_offset", "x", "y", "layer"}; +enum class atok_t_grid_loc {BLOCK_TYPE_ID, HEIGHT_OFFSET, LAYER, WIDTH_OFFSET, X, Y}; +constexpr const char *atok_lookup_t_grid_loc[] = {"block_type_id", "height_offset", "layer", "width_offset", "x", "y"}; enum class gtok_t_grid_locs {GRID_LOC}; constexpr const char *gtok_lookup_t_grid_locs[] = {"grid_loc"}; @@ -1015,21 +1015,19 @@ inline atok_t_grid_loc lex_attr_t_grid_loc(const char *in, const std::function * report_error){ +inline void load_grid_loc_required_attributes(const pugi::xml_node &root, int * block_type_id, int * height_offset, int * width_offset, int * x, int * y, const std::function * report_error){ std::bitset<6> astate = 0; for(pugi::xml_attribute attr = root.first_attribute(); attr; attr = attr.next_attribute()){ atok_t_grid_loc in = lex_attr_t_grid_loc(attr.name(), report_error); if(astate[(int)in] == 0) astate[(int)in] = 1; else noreturn_report(report_error, ("Duplicate attribute " + std::string(attr.name()) + " in .").c_str()); switch(in){ - case atok_t_grid_loc::BLOCK_TYPE_ID: + case atok_t_grid_loc::BLOCK_TYPE_ID: *block_type_id = load_int(attr.value(), report_error); break; case atok_t_grid_loc::HEIGHT_OFFSET: *height_offset = load_int(attr.value(), report_error); break; + case atok_t_grid_loc::LAYER: + /* Attribute layer set after element init */ + break; case atok_t_grid_loc::WIDTH_OFFSET: *width_offset = load_int(attr.value(), report_error); break; @@ -2330,16 +2331,14 @@ inline void load_grid_loc_required_attributes(const pugi::xml_node &root, int * case atok_t_grid_loc::Y: *y = load_int(attr.value(), report_error); break; - case atok_t_grid_loc::LAYER: - *layer=load_int(attr.value(), report_error); default: break; /* Not possible. */ } } - std::bitset<6> test_astate = astate | std::bitset<6>(0b000000); + std::bitset<6> test_astate = astate | std::bitset<6>(0b000100); if(!test_astate.all()) attr_error(test_astate, atok_lookup_t_grid_loc, report_error); } -inline void load_node_loc_required_attributes(const pugi::xml_node &root, int * layer, int * ptc, int * xhigh, int * xlow, int * yhigh, int * ylow, const std::function * report_error){ +inline void load_node_loc_required_attributes(const pugi::xml_node &root, int * ptc, int * xhigh, int * xlow, int * yhigh, int * ylow, const std::function * report_error){ std::bitset<7> astate = 0; for(pugi::xml_attribute attr = root.first_attribute(); attr; attr = attr.next_attribute()){ atok_t_node_loc in = lex_attr_t_node_loc(attr.name(), report_error); @@ -2347,7 +2346,7 @@ inline void load_node_loc_required_attributes(const pugi::xml_node &root, int * else noreturn_report(report_error, ("Duplicate attribute " + std::string(attr.name()) + " in .").c_str()); switch(in){ case atok_t_node_loc::LAYER: - *layer = load_int(attr.value(), report_error); + /* Attribute layer set after element init */ break; case atok_t_node_loc::PTC: *ptc = load_int(attr.value(), report_error); @@ -2370,7 +2369,7 @@ inline void load_node_loc_required_attributes(const pugi::xml_node &root, int * default: break; /* Not possible. */ } } - std::bitset<7> test_astate = astate | std::bitset<7>(0b0000100); + std::bitset<7> test_astate = astate | std::bitset<7>(0b0000101); if(!test_astate.all()) attr_error(test_astate, atok_lookup_t_node_loc, report_error); } @@ -3158,6 +3157,30 @@ inline void load_grid_loc(const pugi::xml_node &root, T &out, Context &context, // Update current file offset in case an error is encountered. *offset_debug = root.offset_debug(); + for(pugi::xml_attribute attr = root.first_attribute(); attr; attr = attr.next_attribute()){ + atok_t_grid_loc in = lex_attr_t_grid_loc(attr.name(), report_error); + switch(in){ + case atok_t_grid_loc::BLOCK_TYPE_ID: + /* Attribute block_type_id is already set */ + break; + case atok_t_grid_loc::HEIGHT_OFFSET: + /* Attribute height_offset is already set */ + break; + case atok_t_grid_loc::LAYER: + out.set_grid_loc_layer(load_int(attr.value(), report_error), context); + break; + case atok_t_grid_loc::WIDTH_OFFSET: + /* Attribute width_offset is already set */ + break; + case atok_t_grid_loc::X: + /* Attribute x is already set */ + break; + case atok_t_grid_loc::Y: + /* Attribute y is already set */ + break; + default: break; /* Not possible. */ + } + } if(root.first_child().type() == pugi::node_element) noreturn_report(report_error, "Unexpected child element in ."); @@ -3224,10 +3247,8 @@ inline void load_grid_locs(const pugi::xml_node &root, T &out, Context &context, memset(&grid_loc_x, 0, sizeof(grid_loc_x)); int grid_loc_y; memset(&grid_loc_y, 0, sizeof(grid_loc_y)); - int grid_loc_layer; - memset(&grid_loc_layer,0,sizeof(grid_loc_layer)); - load_grid_loc_required_attributes(node, &grid_loc_block_type_id, &grid_loc_height_offset, &grid_loc_width_offset, &grid_loc_x, &grid_loc_y, &grid_loc_layer, report_error); - auto child_context = out.add_grid_locs_grid_loc(context, grid_loc_block_type_id, grid_loc_height_offset, grid_loc_width_offset, grid_loc_x, grid_loc_y, grid_loc_layer); + load_grid_loc_required_attributes(node, &grid_loc_block_type_id, &grid_loc_height_offset, &grid_loc_width_offset, &grid_loc_x, &grid_loc_y, report_error); + auto child_context = out.add_grid_locs_grid_loc(context, grid_loc_block_type_id, grid_loc_height_offset, grid_loc_width_offset, grid_loc_x, grid_loc_y); load_grid_loc(node, out, child_context, report_error, offset_debug); out.finish_grid_locs_grid_loc(child_context); } @@ -3252,7 +3273,7 @@ inline void load_node_loc(const pugi::xml_node &root, T &out, Context &context, atok_t_node_loc in = lex_attr_t_node_loc(attr.name(), report_error); switch(in){ case atok_t_node_loc::LAYER: - /* Attribute layer is already set */ + out.set_node_loc_layer(load_int(attr.value(), report_error), context); break; case atok_t_node_loc::PTC: /* Attribute ptc is already set */ @@ -3435,8 +3456,6 @@ inline void load_node(const pugi::xml_node &root, T &out, Context &context, cons switch(in){ case gtok_t_node::LOC: { - int node_loc_layer; - memset(&node_loc_layer, 0, sizeof(node_loc_layer)); int node_loc_ptc; memset(&node_loc_ptc, 0, sizeof(node_loc_ptc)); int node_loc_xhigh; @@ -3447,8 +3466,8 @@ inline void load_node(const pugi::xml_node &root, T &out, Context &context, cons memset(&node_loc_yhigh, 0, sizeof(node_loc_yhigh)); int node_loc_ylow; memset(&node_loc_ylow, 0, sizeof(node_loc_ylow)); - load_node_loc_required_attributes(node, &node_loc_layer, &node_loc_ptc, &node_loc_xhigh, &node_loc_xlow, &node_loc_yhigh, &node_loc_ylow, report_error); - auto child_context = out.init_node_loc(context, node_loc_layer, node_loc_ptc, node_loc_xhigh, node_loc_xlow, node_loc_yhigh, node_loc_ylow); + load_node_loc_required_attributes(node, &node_loc_ptc, &node_loc_xhigh, &node_loc_xlow, &node_loc_yhigh, &node_loc_ylow, report_error); + auto child_context = out.init_node_loc(context, node_loc_ptc, node_loc_xhigh, node_loc_xlow, node_loc_yhigh, node_loc_ylow); load_node_loc(node, out, child_context, report_error, offset_debug); out.finish_node_loc(child_context); } @@ -3946,11 +3965,11 @@ inline void write_grid_locs(T &in, std::ostream &os, Context &context){ os << "\n"; } } @@ -3989,7 +4008,8 @@ inline void write_node(T &in, std::ostream &os, Context &context){ { auto child_context = in.get_node_loc(context); os << " @@ -672,6 +672,7 @@ inline void load_grid_loc_capnp_type(const ucap::GridLoc::Reader &root, T &out, (void)report_error; (void)stack; + out.set_grid_loc_layer(root.getLayer(), context); } template @@ -687,7 +688,7 @@ inline void load_grid_locs_capnp_type(const ucap::GridLocs::Reader &root, T &out auto data = root.getGridLocs(); out.preallocate_grid_locs_grid_loc(context, data.size()); for(const auto & el : data) { - auto child_context = out.add_grid_locs_grid_loc(context, el.getBlockTypeId(), el.getHeightOffset(), el.getWidthOffset(), el.getX(), el.getY(), el.getLayer()); + auto child_context = out.add_grid_locs_grid_loc(context, el.getBlockTypeId(), el.getHeightOffset(), el.getWidthOffset(), el.getX(), el.getY()); load_grid_loc_capnp_type(el, out, child_context, report_error, stack); out.finish_grid_locs_grid_loc(child_context); stack->back().second += 1; @@ -704,6 +705,7 @@ inline void load_node_loc_capnp_type(const ucap::NodeLoc::Reader &root, T &out, (void)report_error; (void)stack; + out.set_node_loc_layer(root.getLayer(), context); out.set_node_loc_side(conv_enum_loc_side(root.getSide(), report_error), context); } @@ -775,7 +777,7 @@ inline void load_node_capnp_type(const ucap::Node::Reader &root, T &out, Context stack->push_back(std::make_pair("getLoc", 0)); if (root.hasLoc()) { auto child_el = root.getLoc(); - auto child_context = out.init_node_loc(context, child_el.getLayer(), child_el.getPtc(), child_el.getXhigh(), child_el.getXlow(), child_el.getYhigh(), child_el.getYlow()); + auto child_context = out.init_node_loc(context, child_el.getPtc(), child_el.getXhigh(), child_el.getXlow(), child_el.getYhigh(), child_el.getYlow()); load_node_loc_capnp_type(child_el, out, child_context, report_error, stack); out.finish_node_loc(child_context); } @@ -1117,6 +1119,8 @@ inline void write_grid_locs_capnp_type(T &in, ucap::GridLocs::Builder &root, Con auto child_context = in.get_grid_locs_grid_loc(i, context); grid_locs_grid_loc.setBlockTypeId(in.get_grid_loc_block_type_id(child_context)); grid_locs_grid_loc.setHeightOffset(in.get_grid_loc_height_offset(child_context)); + if((bool)in.get_grid_loc_layer(child_context)) + grid_locs_grid_loc.setLayer(in.get_grid_loc_layer(child_context)); grid_locs_grid_loc.setWidthOffset(in.get_grid_loc_width_offset(child_context)); grid_locs_grid_loc.setX(in.get_grid_loc_x(child_context)); grid_locs_grid_loc.setY(in.get_grid_loc_y(child_context)); @@ -1153,7 +1157,8 @@ inline void write_node_capnp_type(T &in, ucap::Node::Builder &root, Context &con { auto child_context = in.get_node_loc(context); auto node_loc = root.initLoc(); - node_loc.setLayer(in.get_node_loc_layer(child_context)); + if((bool)in.get_node_loc_layer(child_context)) + node_loc.setLayer(in.get_node_loc_layer(child_context)); node_loc.setPtc(in.get_node_loc_ptc(child_context)); if((bool)in.get_node_loc_side(child_context)) node_loc.setSide(conv_to_enum_loc_side(in.get_node_loc_side(child_context))); diff --git a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h index 9a61c8cbe12..24c92041773 100644 --- a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h +++ b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h @@ -6,7 +6,7 @@ * * Cmdline: uxsdcxx/uxsdcxx.py /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd * Input file: /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd - * md5sum of input file: 8672cb3951993f7e0ea3433a02507672 + * md5sum of input file: 8a13fa50b87a91c2baab7c6ced02f573 */ #include @@ -330,9 +330,9 @@ class RrGraphBase { /** Generated for complex type "grid_loc": * + * * * - * * * * @@ -340,10 +340,11 @@ class RrGraphBase { */ virtual inline int get_grid_loc_block_type_id(typename ContextTypes::GridLocReadContext &ctx) = 0; virtual inline int get_grid_loc_height_offset(typename ContextTypes::GridLocReadContext &ctx) = 0; + virtual inline int get_grid_loc_layer(typename ContextTypes::GridLocReadContext &ctx) = 0; + virtual inline void set_grid_loc_layer(int layer, typename ContextTypes::GridLocWriteContext &ctx) = 0; virtual inline int get_grid_loc_width_offset(typename ContextTypes::GridLocReadContext &ctx) = 0; virtual inline int get_grid_loc_x(typename ContextTypes::GridLocReadContext &ctx) = 0; virtual inline int get_grid_loc_y(typename ContextTypes::GridLocReadContext &ctx) = 0; - virtual inline int get_grid_loc_layer(typename ContextTypes::GridLocReadContext &ctx) =0; /** Generated for complex type "grid_locs": * @@ -353,14 +354,14 @@ class RrGraphBase { * */ virtual inline void preallocate_grid_locs_grid_loc(typename ContextTypes::GridLocsWriteContext &ctx, size_t size) = 0; - virtual inline typename ContextTypes::GridLocWriteContext add_grid_locs_grid_loc(typename ContextTypes::GridLocsWriteContext &ctx, int block_type_id, int height_offset, int width_offset, int x, int y, int layer) = 0; + virtual inline typename ContextTypes::GridLocWriteContext add_grid_locs_grid_loc(typename ContextTypes::GridLocsWriteContext &ctx, int block_type_id, int height_offset, int width_offset, int x, int y) = 0; virtual inline void finish_grid_locs_grid_loc(typename ContextTypes::GridLocWriteContext &ctx) = 0; virtual inline size_t num_grid_locs_grid_loc(typename ContextTypes::GridLocsReadContext &ctx) = 0; virtual inline typename ContextTypes::GridLocReadContext get_grid_locs_grid_loc(int n, typename ContextTypes::GridLocsReadContext &ctx) = 0; /** Generated for complex type "node_loc": * - * + * * * * @@ -370,6 +371,7 @@ class RrGraphBase { * */ virtual inline int get_node_loc_layer(typename ContextTypes::NodeLocReadContext &ctx) = 0; + virtual inline void set_node_loc_layer(int layer, typename ContextTypes::NodeLocWriteContext &ctx) = 0; virtual inline int get_node_loc_ptc(typename ContextTypes::NodeLocReadContext &ctx) = 0; virtual inline enum_loc_side get_node_loc_side(typename ContextTypes::NodeLocReadContext &ctx) = 0; virtual inline void set_node_loc_side(enum_loc_side side, typename ContextTypes::NodeLocWriteContext &ctx) = 0; @@ -440,7 +442,7 @@ class RrGraphBase { virtual inline void set_node_direction(enum_node_direction direction, typename ContextTypes::NodeWriteContext &ctx) = 0; virtual inline unsigned int get_node_id(typename ContextTypes::NodeReadContext &ctx) = 0; virtual inline enum_node_type get_node_type(typename ContextTypes::NodeReadContext &ctx) = 0; - virtual inline typename ContextTypes::NodeLocWriteContext init_node_loc(typename ContextTypes::NodeWriteContext &ctx, int layer, int ptc, int xhigh, int xlow, int yhigh, int ylow) = 0; + virtual inline typename ContextTypes::NodeLocWriteContext init_node_loc(typename ContextTypes::NodeWriteContext &ctx, int ptc, int xhigh, int xlow, int yhigh, int ylow) = 0; virtual inline void finish_node_loc(typename ContextTypes::NodeLocWriteContext &ctx) = 0; virtual inline typename ContextTypes::NodeLocReadContext get_node_loc(typename ContextTypes::NodeReadContext &ctx) = 0; virtual inline typename ContextTypes::NodeTimingWriteContext init_node_timing(typename ContextTypes::NodeWriteContext &ctx, float C, float R) = 0; diff --git a/libs/librrgraph/src/io/rr_graph.xsd b/libs/librrgraph/src/io/rr_graph.xsd index 4c05adfe5d5..778a39c7f42 100644 --- a/libs/librrgraph/src/io/rr_graph.xsd +++ b/libs/librrgraph/src/io/rr_graph.xsd @@ -208,7 +208,7 @@ - + @@ -259,7 +259,7 @@ - + diff --git a/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp b/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp index db77f7bc999..552b179a1e7 100644 --- a/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp +++ b/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp @@ -4,9 +4,9 @@ # # Cmdline: uxsdcxx/uxsdcap.py /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd # Input file: /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd -# md5sum of input file: 8672cb3951993f7e0ea3433a02507672 +# md5sum of input file: 8a13fa50b87a91c2baab7c6ced02f573 -@0xe9a519eb0e454dd4; +@0xe05e6a59b7f502a0; using Cxx = import "/capnp/c++.capnp"; $Cxx.namespace("ucap"); @@ -151,10 +151,10 @@ struct BlockTypes { struct GridLoc { blockTypeId @0 :Int32; heightOffset @1 :Int32; - widthOffset @2 :Int32; - x @3 :Int32; - y @4 :Int32; - layer @5 : Int32; + layer @2 :Int32; + widthOffset @3 :Int32; + x @4 :Int32; + y @5 :Int32; } struct GridLocs { From 171364afe9938a9c20709c4985ab41c6487af10c Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 10:41:17 -0400 Subject: [PATCH 02/20] add set_node_loc_layer to rr_graph serializer --- .../src/io/rr_graph_uxsdcxx_serializer.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index 0820a5d89e9..1259745ba9e 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -633,12 +633,13 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { * */ - inline int init_node_loc(int& inode, int layer, int ptc, int xhigh, int xlow, int yhigh, int ylow) final { + inline int init_node_loc(int& inode, int ptc, int xhigh, int xlow, int yhigh, int ylow) final { auto node = (*rr_nodes_)[inode]; RRNodeId node_id = node.id(); rr_graph_builder_->set_node_coordinates(node_id, xlow, ylow, xhigh, yhigh); - rr_graph_builder_->set_node_layer(node_id, layer); + // We set the layer num 0 - If it is specified in the XML, it will be overwritten + rr_graph_builder_->set_node_layer(node_id, 0); rr_graph_builder_->set_node_ptc_num(node_id, ptc); return inode; } @@ -666,6 +667,15 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { return rr_graph_->node_ylow(node.id()); } + inline void set_node_loc_layer(int layer_num, int& inode) final { + auto node = (*rr_nodes_)[inode]; + RRNodeId node_id = node.id(); + const auto& rr_graph = (*rr_graph_); + + VTR_ASSERT(layer_num >= 0); + rr_graph_builder_->set_node_layer(node_id, layer_num); + } + inline void set_node_loc_side(uxsd::enum_loc_side side, int& inode) final { auto node = (*rr_nodes_)[inode]; RRNodeId node_id = node.id(); From 217d5e7730dded0750055380abfb1a86df736beb Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 12:47:10 -0400 Subject: [PATCH 03/20] assign default value for layer in rr_graph.xsd --- libs/librrgraph/src/io/rr_graph.xsd | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libs/librrgraph/src/io/rr_graph.xsd b/libs/librrgraph/src/io/rr_graph.xsd index 778a39c7f42..17dfe09a7e0 100644 --- a/libs/librrgraph/src/io/rr_graph.xsd +++ b/libs/librrgraph/src/io/rr_graph.xsd @@ -208,7 +208,7 @@ - + @@ -259,7 +259,7 @@ - + From d969433283c7ed9df9026baa67e0c1c2d85757da Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 12:49:40 -0400 Subject: [PATCH 04/20] build uxsdcxx files with the new xsd file --- libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h | 8 +++----- libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_capnp.h | 8 +++----- libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h | 6 +++--- libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp | 8 ++++---- 4 files changed, 13 insertions(+), 17 deletions(-) diff --git a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h index 209658933bc..6b36e5664d0 100644 --- a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h +++ b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx.h @@ -6,7 +6,7 @@ * * Cmdline: uxsdcxx/uxsdcxx.py /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd * Input file: /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd - * md5sum of input file: 8a13fa50b87a91c2baab7c6ced02f573 + * md5sum of input file: 38649d034e0edccbcb511ddb8915cdff */ #include @@ -3965,8 +3965,7 @@ inline void write_grid_locs(T &in, std::ostream &os, Context &context){ os << " @@ -1119,8 +1119,7 @@ inline void write_grid_locs_capnp_type(T &in, ucap::GridLocs::Builder &root, Con auto child_context = in.get_grid_locs_grid_loc(i, context); grid_locs_grid_loc.setBlockTypeId(in.get_grid_loc_block_type_id(child_context)); grid_locs_grid_loc.setHeightOffset(in.get_grid_loc_height_offset(child_context)); - if((bool)in.get_grid_loc_layer(child_context)) - grid_locs_grid_loc.setLayer(in.get_grid_loc_layer(child_context)); + grid_locs_grid_loc.setLayer(in.get_grid_loc_layer(child_context)); grid_locs_grid_loc.setWidthOffset(in.get_grid_loc_width_offset(child_context)); grid_locs_grid_loc.setX(in.get_grid_loc_x(child_context)); grid_locs_grid_loc.setY(in.get_grid_loc_y(child_context)); @@ -1157,8 +1156,7 @@ inline void write_node_capnp_type(T &in, ucap::Node::Builder &root, Context &con { auto child_context = in.get_node_loc(context); auto node_loc = root.initLoc(); - if((bool)in.get_node_loc_layer(child_context)) - node_loc.setLayer(in.get_node_loc_layer(child_context)); + node_loc.setLayer(in.get_node_loc_layer(child_context)); node_loc.setPtc(in.get_node_loc_ptc(child_context)); if((bool)in.get_node_loc_side(child_context)) node_loc.setSide(conv_to_enum_loc_side(in.get_node_loc_side(child_context))); diff --git a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h index 24c92041773..293238abd4e 100644 --- a/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h +++ b/libs/librrgraph/src/io/gen/rr_graph_uxsdcxx_interface.h @@ -6,7 +6,7 @@ * * Cmdline: uxsdcxx/uxsdcxx.py /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd * Input file: /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd - * md5sum of input file: 8a13fa50b87a91c2baab7c6ced02f573 + * md5sum of input file: 38649d034e0edccbcb511ddb8915cdff */ #include @@ -330,7 +330,7 @@ class RrGraphBase { /** Generated for complex type "grid_loc": * - * + * * * * @@ -361,7 +361,7 @@ class RrGraphBase { /** Generated for complex type "node_loc": * - * + * * * * diff --git a/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp b/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp index 552b179a1e7..7536738567a 100644 --- a/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp +++ b/libs/libvtrcapnproto/gen/rr_graph_uxsdcxx.capnp @@ -4,9 +4,9 @@ # # Cmdline: uxsdcxx/uxsdcap.py /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd # Input file: /home/amin/vtr-verilog-to-routing/libs/librrgraph/src/io/rr_graph.xsd -# md5sum of input file: 8a13fa50b87a91c2baab7c6ced02f573 +# md5sum of input file: 38649d034e0edccbcb511ddb8915cdff -@0xe05e6a59b7f502a0; +@0xf8328695afe65adc; using Cxx = import "/capnp/c++.capnp"; $Cxx.namespace("ucap"); @@ -151,7 +151,7 @@ struct BlockTypes { struct GridLoc { blockTypeId @0 :Int32; heightOffset @1 :Int32; - layer @2 :Int32; + layer @2 :Int32 = 0; widthOffset @3 :Int32; x @4 :Int32; y @5 :Int32; @@ -162,7 +162,7 @@ struct GridLocs { } struct NodeLoc { - layer @0 :Int32; + layer @0 :Int32 = 0; ptc @1 :Int32; side @2 :LocSide; xhigh @3 :Int32; From 406c482ee81998530a1be59578ef748f1e5e11f0 Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 12:51:51 -0400 Subject: [PATCH 05/20] change the function that check whether content under grid_loc corresponds to the architecture file --- .../src/io/rr_graph_uxsdcxx_serializer.h | 68 +++++++++++++++---- 1 file changed, 55 insertions(+), 13 deletions(-) diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index 1259745ba9e..799e4075af3 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -1493,28 +1493,58 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { grid_.grid_size(), size); } } - inline void* add_grid_locs_grid_loc(void*& /*ctx*/, int block_type_id, int height_offset, int width_offset, int x, int y, int layer) final { - const auto& type = grid_.get_physical_type({x, y, layer}); - int grid_width_offset = grid_.get_width_offset({x, y, layer}); - int grid_height_offset = grid_.get_height_offset({x, y, layer}); + inline void* add_grid_locs_grid_loc(void*& /*ctx*/, int block_type_id, int height_offset, int width_offset, int x, int y) final { + curr_tmp_block_type_id = block_type_id; + curr_tmp_height_offset = height_offset; + curr_tmp_width_offset = width_offset; + curr_tmp_x = x; + curr_tmp_y = y; - if (type->index != block_type_id) { + return nullptr; + } + inline void finish_grid_locs_grid_loc(void*& /*ctx*/) final { + VTR_ASSERT(curr_tmp_block_type_id >= 0); + VTR_ASSERT(curr_tmp_height_offset >= 0); + VTR_ASSERT(curr_tmp_width_offset >= 0); + VTR_ASSERT(curr_tmp_layer >= 0); + VTR_ASSERT(curr_tmp_x >= 0); + VTR_ASSERT(curr_tmp_y >= 0); + const auto& type = grid_.get_physical_type({curr_tmp_x, curr_tmp_y, curr_tmp_layer}); + int grid_width_offset = grid_.get_width_offset({curr_tmp_x, curr_tmp_y, curr_tmp_layer}); + int grid_height_offset = grid_.get_height_offset({curr_tmp_x, curr_tmp_y, curr_tmp_layer}); + + if (type->index != curr_tmp_block_type_id) { report_error( - "Architecture file does not match RR graph's block_type_id at (%d, %d): arch used ID %d, RR graph used ID %d.", x, y, - (type->index), block_type_id); + "Architecture file does not match RR graph's block_type_id at (%d, %d): arch used ID %d, RR graph used ID %d.", + curr_tmp_layer, + curr_tmp_x, + curr_tmp_y, + (type->index), + curr_tmp_block_type_id); } - if (grid_width_offset != width_offset) { + if (grid_width_offset != curr_tmp_width_offset) { report_error( - "Architecture file does not match RR graph's width_offset at (%d, %d)", x, y); + "Architecture file does not match RR graph's width_offset at (%d, %d)", + curr_tmp_layer, + curr_tmp_x, + curr_tmp_y); } - if (grid_height_offset != height_offset) { + if (grid_height_offset != curr_tmp_height_offset) { report_error( - "Architecture file does not match RR graph's height_offset at (%d, %d)", x, y); + "Architecture file does not match RR graph's height_offset at (%d, %d)", + curr_tmp_layer, + curr_tmp_x, + curr_tmp_y); } - return nullptr; + + curr_tmp_block_type_id = -1; + curr_tmp_height_offset = -1; + curr_tmp_width_offset = -1; + curr_tmp_layer = 0; + curr_tmp_x = -1; + curr_tmp_y = -1; } - inline void finish_grid_locs_grid_loc(void*& /*ctx*/) final {} inline void* init_rr_graph_grid(void*& /*ct*/) final { return nullptr; @@ -1549,6 +1579,10 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { return grid_.get_grid_locs_grid_loc(n); } + inline void set_grid_loc_layer(int layer_num, void*& /*ctx*/) final { + curr_tmp_layer = layer_num; + } + /** Generated for complex type "rr_graph": * @@ -1990,4 +2024,12 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { vtr::interned_string empty_; const std::function* report_error_; bool is_flat_; + + // Temporary data to check grid block types + int curr_tmp_block_type_id; + int curr_tmp_height_offset; + int curr_tmp_width_offset; + int curr_tmp_layer; + int curr_tmp_x; + int curr_tmp_y; }; From c3d54cc8b44625fb11e86bd9a8b41c725a77e2ec Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 12:54:42 -0400 Subject: [PATCH 06/20] remove an unused var --- libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index 799e4075af3..cd14f2df4e8 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -670,7 +670,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { inline void set_node_loc_layer(int layer_num, int& inode) final { auto node = (*rr_nodes_)[inode]; RRNodeId node_id = node.id(); - const auto& rr_graph = (*rr_graph_); + VTR_ASSERT(layer_num >= 0); rr_graph_builder_->set_node_layer(node_id, layer_num); From 5072e540824dc6ffe9b76e7bfc88b25abacee51e Mon Sep 17 00:00:00 2001 From: amin1377 Date: Wed, 19 Jul 2023 14:36:28 -0400 Subject: [PATCH 07/20] initialize rr graph serializer scratchpad --- libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index cd14f2df4e8..95a6e012292 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -325,6 +325,12 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { , is_flat_(is_flat) { // Initialize internal data init_side_map(); + curr_tmp_block_type_id = -1; + curr_tmp_height_offset = -1; + curr_tmp_width_offset = -1; + curr_tmp_layer = 0; + curr_tmp_x = -1; + curr_tmp_y = -1; } /* A truth table to help understand the conversion from VPR side mask to uxsd side code From 77778ab03a32f4ea0d7baad203847f6b37ad52f1 Mon Sep 17 00:00:00 2001 From: amin1377 Date: Mon, 7 Aug 2023 14:59:12 -0400 Subject: [PATCH 08/20] add init_segment_inf_x_y to rr graph serializer constructor --- libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h | 1 + 1 file changed, 1 insertion(+) diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index d6a1d487a61..9154e353643 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -325,6 +325,7 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { , is_flat_(is_flat) { // Initialize internal data init_side_map(); + init_segment_inf_x_y(); curr_tmp_block_type_id = -1; curr_tmp_height_offset = -1; curr_tmp_width_offset = -1; From 943015839f3be8764a7cbcb57aea67fe314109d5 Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Thu, 24 Aug 2023 23:07:01 -0400 Subject: [PATCH 09/20] Modified calculate_routing_usage function to consider whether or not a layer if visible. --- vpr/src/route/route_util.cpp | 6 +++++- vpr/src/route/route_util.h | 2 ++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index 96e9551fbe8..c8eb6ea57b5 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -24,9 +24,13 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat) { } } } - + t_draw_state* draw_state = get_draw_state_vars(); //Record number of used resources in each x/y channel for (RRNodeId rr_node : rr_nodes) { + int layer_num = rr_graph.node_layer(rr_node); + if (!draw_state->draw_layer_display[layer_num].visible) + continue; // don't count usage if layer is not visible + if (rr_type == CHANX) { VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX); VTR_ASSERT(rr_graph.node_ylow(rr_node) == rr_graph.node_yhigh(rr_node)); diff --git a/vpr/src/route/route_util.h b/vpr/src/route/route_util.h index 21147db9544..6b7090d9d82 100644 --- a/vpr/src/route/route_util.h +++ b/vpr/src/route/route_util.h @@ -1,6 +1,8 @@ #ifndef VPR_ROUTE_UTIL_H #define VPR_ROUTE_UTIL_H #include "vpr_types.h" +#include "draw_types.h" +#include "draw_global.h" vtr::Matrix calculate_routing_avail(t_rr_type rr_type); vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat); From a02837d6937149474341bfc1286962bae19f8e14 Mon Sep 17 00:00:00 2001 From: amin1377 Date: Fri, 1 Sep 2023 17:18:04 -0400 Subject: [PATCH 10/20] fix the merge conflict error --- libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h | 7 ------- 1 file changed, 7 deletions(-) diff --git a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h index c457fdfba92..9154e353643 100644 --- a/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h +++ b/libs/librrgraph/src/io/rr_graph_uxsdcxx_serializer.h @@ -1554,19 +1554,12 @@ class RrGraphSerializer final : public uxsd::RrGraphBase { grid_.grid_size(), size); } } -<<<<<<< HEAD inline void* add_grid_locs_grid_loc(void*& /*ctx*/, int block_type_id, int height_offset, int width_offset, int x, int y) final { curr_tmp_block_type_id = block_type_id; curr_tmp_height_offset = height_offset; curr_tmp_width_offset = width_offset; curr_tmp_x = x; curr_tmp_y = y; -======= - inline void* add_grid_locs_grid_loc(void*& /*ctx*/, int block_type_id, int height_offset, int layer, int width_offset, int x, int y) final { - const auto& type = grid_.get_physical_type({x, y, layer}); - int grid_width_offset = grid_.get_width_offset({x, y, layer}); - int grid_height_offset = grid_.get_height_offset({x, y, layer}); ->>>>>>> ef5f993959c6b6896f6821b14b361d581ebf46fe return nullptr; } From 2a636c79587999623573c96429119a438ccd671a Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Sun, 3 Sep 2023 01:27:38 -0400 Subject: [PATCH 11/20] Added a comment to calculate_routing_usage function in route_util.h, explaining what the function does. --- vpr/src/route/route_util.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/vpr/src/route/route_util.h b/vpr/src/route/route_util.h index 6b7090d9d82..d43c36d2090 100644 --- a/vpr/src/route/route_util.h +++ b/vpr/src/route/route_util.h @@ -5,6 +5,13 @@ #include "draw_global.h" vtr::Matrix calculate_routing_avail(t_rr_type rr_type); + +/** + * @brief Calculates routing usage over entire grid + * Collects all in-use nodes and records number of used resources + * in each x/y channel. Takes into consideration visible layers + * for multi-layered architectures. + */ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat); float routing_util(float used, float avail); From ac3f779a0101b9f2dea90cffa6483dc085ae8f73 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Fahrican=20Ko=C5=9Far?= Date: Thu, 24 Mar 2022 19:21:19 -0400 Subject: [PATCH 12/20] rebuild partition tree on every iteration more fixes piggybacked: add a -use_previous option to the run scripts to use intermediate files from previous runs add debug logging for partitiontree add some parallel tests --- .github/scripts/hostsetup.sh | 3 +- .github/workflows/test.yml | 1 + dev/pylint_check.py | 3 + libs/librrgraph/src/io/rr_graph_reader.cpp | 4 +- libs/libvtrutil/src/vtr_util.cpp | 24 +-- libs/libvtrutil/src/vtr_util.h | 3 +- vpr/CMakeLists.txt | 5 + vpr/asan.supp | 1 + vpr/lsan.supp | 1 + vpr/src/base/vpr_api.cpp | 8 +- vpr/src/base/vpr_types.h | 1 + vpr/src/route/connection_based_routing.cpp | 10 +- vpr/src/route/connection_based_routing.h | 30 ---- vpr/src/route/partition_tree.cpp | 159 +++++++++--------- vpr/src/route/partition_tree.h | 64 ++++++- vpr/src/route/route_common.cpp | 11 +- vpr/src/route/route_common.h | 2 +- vpr/src/route/route_parallel.cpp | 95 ++++++++--- vpr/src/route/route_timing.cpp | 75 +++------ vpr/src/route/route_timing.h | 30 +++- vpr/src/route/route_tree.cpp | 72 +++++--- vpr/src/route/route_tree.h | 121 ++++++++++++- vtr_flow/scripts/python_libs/vtr/__init__.py | 4 +- vtr_flow/scripts/python_libs/vtr/flow.py | 7 + vtr_flow/scripts/python_libs/vtr/task.py | 48 +++++- vtr_flow/scripts/python_libs/vtr/util.py | 56 +++++- vtr_flow/scripts/python_libs/vtr/vpr/vpr.py | 12 +- vtr_flow/scripts/run_vtr_flow.py | 13 +- vtr_flow/scripts/run_vtr_task.py | 68 +++++--- .../vtr_bidir/config/golden_results.txt | 82 ++++----- .../config/golden_results.txt | 10 +- .../vtr_reg_strong/koios/config/config.txt | 4 +- .../koios/config/golden_results.txt | 5 +- .../strong_flat_router/config/config.txt | 5 +- .../config/golden_results.txt | 5 +- .../strong_multiclock/config/config.txt | 5 +- .../config/golden_results.txt | 1 + .../strong_timing/config/config.txt | 5 +- .../strong_timing/config/golden_results.txt | 5 +- .../config/config.txt | 2 + .../config/golden_results.txt | 12 +- 41 files changed, 707 insertions(+), 365 deletions(-) diff --git a/.github/scripts/hostsetup.sh b/.github/scripts/hostsetup.sh index 48f56a066a9..a136f61a43e 100755 --- a/.github/scripts/hostsetup.sh +++ b/.github/scripts/hostsetup.sh @@ -69,7 +69,8 @@ apt install -y \ default-jdk \ g++-9 \ gcc-9 \ - wget + wget \ + libtbb-dev # installing the latest version of cmake apt install -y apt-transport-https ca-certificates gnupg diff --git a/.github/workflows/test.yml b/.github/workflows/test.yml index 2b3eae608ec..111b1035203 100644 --- a/.github/workflows/test.yml +++ b/.github/workflows/test.yml @@ -60,6 +60,7 @@ jobs: - name: Execute test script run: stdbuf -i0 -o0 -e0 ./.github/scripts/run-vtr.sh env: + VPR_NUM_WORKERS: 4 VTR_TEST: ${{ matrix.test }} VTR_TEST_OPTIONS: ${{ matrix.options }} VTR_CMAKE_PARAMS: ${{ matrix.cmake }} diff --git a/dev/pylint_check.py b/dev/pylint_check.py index 0231480746b..6e0987a7f84 100755 --- a/dev/pylint_check.py +++ b/dev/pylint_check.py @@ -216,6 +216,9 @@ def main(): cmd = ["pylint", path, "-s", "n"] if ignore_list: cmd.append("--disable=" + ",".join(ignore_list)) + # Don't object to single-letter variable names (that's not in PEP8) + # see https://stackoverflow.com/q/21833872 + cmd.append("--variable-rgx=[a-z][a-z0-9_]{0,40}$") # Run pylint and check output process = subprocess.run(cmd, check=False, stdout=subprocess.PIPE) diff --git a/libs/librrgraph/src/io/rr_graph_reader.cpp b/libs/librrgraph/src/io/rr_graph_reader.cpp index 16a340c08d5..a62f41d84d9 100644 --- a/libs/librrgraph/src/io/rr_graph_reader.cpp +++ b/libs/librrgraph/src/io/rr_graph_reader.cpp @@ -1,4 +1,4 @@ -/*This function loads in a routing resource graph written in xml format +/* This function loads in a routing resource graph written in xml format * into vpr when the option --read_rr_graph is specified. * When it is not specified the build_rr_graph function is then called. * This is done using the libpugixml library. This is useful @@ -11,7 +11,7 @@ * to ensure it matches. An error will through if any feature does not match. * Other elements such as edges, nodes, and switches * are overwritten by the rr graph file if one is specified. If an optional - * identifier such as capacitance is not specified, it is set to 0*/ + * identifier such as capacitance is not specified, it is set to 0 */ #include "rr_graph_reader.h" diff --git a/libs/libvtrutil/src/vtr_util.cpp b/libs/libvtrutil/src/vtr_util.cpp index 45ee3035883..2a7a247bde1 100644 --- a/libs/libvtrutil/src/vtr_util.cpp +++ b/libs/libvtrutil/src/vtr_util.cpp @@ -2,6 +2,7 @@ #include #include //For errno #include +#include #include #include @@ -455,28 +456,15 @@ bool file_exists(const char* filename) { return false; } -/* Date:July 17th, 2013 - * Author: Daniel Chen */ /** * @brief Checks the file extension of an file to ensure correct file format. * - * Returns true if format is correct, and false otherwise. - * @note This is probably a fragile check, but at least should - * prevent common problems such as swapping architecture file - * and blif file on the VPR command line. + * Returns true if the extension is correct, and false otherwise. */ -bool check_file_name_extension(const char* file_name, - const char* file_extension) { - const char* str; - int len_extension; - - len_extension = std::strlen(file_extension); - str = std::strstr(file_name, file_extension); - if (str == nullptr || (*(str + len_extension) != '\0')) { - return false; - } - - return true; +bool check_file_name_extension(std::string file_name, + std::string file_extension) { + auto ext = std::filesystem::path(file_name).extension(); + return ext == file_extension; } /** diff --git a/libs/libvtrutil/src/vtr_util.h b/libs/libvtrutil/src/vtr_util.h index 08562d3d092..edcb7ba8598 100644 --- a/libs/libvtrutil/src/vtr_util.h +++ b/libs/libvtrutil/src/vtr_util.h @@ -69,8 +69,7 @@ double atod(const std::string& value); */ int get_file_line_number_of_last_opened_file(); bool file_exists(const char* filename); -bool check_file_name_extension(const char* file_name, - const char* file_extension); +bool check_file_name_extension(std::string file_name, std::string file_extension); extern std::string out_file_prefix; diff --git a/vpr/CMakeLists.txt b/vpr/CMakeLists.txt index 1568ff0547f..1ab5e2861e9 100644 --- a/vpr/CMakeLists.txt +++ b/vpr/CMakeLists.txt @@ -47,6 +47,11 @@ if(${VTR_ENABLE_CAPNPROTO}) add_definitions("-DVTR_ENABLE_CAPNPROTO") endif() +if(${VPR_DEBUG_PARTITION_TREE}) + message(STATUS "VPR: Partition tree debug logs: enabled") + add_definitions("-DVPR_DEBUG_PARTITION_TREE") +endif() + #Create the library add_library(libvpr STATIC ${LIB_HEADERS} diff --git a/vpr/asan.supp b/vpr/asan.supp index c24211d07d9..ff6479bc3bc 100644 --- a/vpr/asan.supp +++ b/vpr/asan.supp @@ -3,3 +3,4 @@ #Suppress known errors from the TBB library #These are some errors from the library that we can't fix and suspect are spurious interceptor_via_lib:libtbb.so + diff --git a/vpr/lsan.supp b/vpr/lsan.supp index a3e291c723c..2a7afafb588 100644 --- a/vpr/lsan.supp +++ b/vpr/lsan.supp @@ -6,3 +6,4 @@ leak:libfontconfig.so #Leaks from TBB library, which #allows VPR to run with parallelism leak:libtbb.so +leak:pthread_getattr_np diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index c87d2bec7fc..9969fee4ada 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -217,12 +217,11 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a #ifdef VPR_USE_TBB //Using Thread Building Blocks if (num_workers == 0) { - //Use default concurrency (i.e. maximum conccurency) + //Use default concurrency (i.e. maximum concurrency) num_workers = tbb::this_task_arena::max_concurrency(); } VTR_LOG("Using up to %zu parallel worker(s)\n", num_workers); - tbb::global_control c(tbb::global_control::max_allowed_parallelism, num_workers); #else //No parallel execution support if (num_workers != 1) { @@ -237,6 +236,7 @@ void vpr_init_with_options(const t_options* options, t_vpr_setup* vpr_setup, t_a vpr_setup->clock_modeling = options->clock_modeling; vpr_setup->two_stage_clock_routing = options->two_stage_clock_routing; vpr_setup->exit_before_pack = options->exit_before_pack; + vpr_setup->num_workers = num_workers; VTR_LOG("\n"); VTR_LOG("Architecture file: %s\n", options->ArchFile.value().c_str()); @@ -366,6 +366,10 @@ bool vpr_flow(t_vpr_setup& vpr_setup, t_arch& arch) { return true; } + /* Set this here, because tbb::global_control doesn't control anything once it's out of scope + * (contrary to the name). */ + tbb::global_control c(tbb::global_control::max_allowed_parallelism, vpr_setup.num_workers); + { //Pack bool pack_success = vpr_pack_flow(vpr_setup, arch); diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index c722327966c..5b6e4c52b2f 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -1790,6 +1790,7 @@ struct t_vpr_setup { e_clock_modeling clock_modeling; ///> remaining_targets; - - /** Holds RRNodeIds of legally reached sinks. Used to build the external rt_node_to_sink - * lookup. (should be moved into RouteTree)*/ - vtr::vector> reached_rt_sinks; - public: Connection_based_routing_resources(const Netlist<>& net_list, const vtr::vector>& net_terminals, bool is_flat); - // adding to the resources when they are reached during pruning - // mark rr sink node as something that still needs to be reached - void toreach_rr_sink(ParentNetId net_id, int rr_sink_node) { - remaining_targets[net_id].push_back(rr_sink_node); - } - // mark rt sink node as something that has been legally reached - void reached_rt_sink(ParentNetId net_id, RRNodeId rt_sink) { - reached_rt_sinks[net_id].push_back(rt_sink); - } - - // get a handle on the resources - std::vector& get_remaining_targets(ParentNetId net_id) { - return remaining_targets[net_id]; - } - std::vector& get_reached_rt_sinks(ParentNetId net_id) { - return reached_rt_sinks[net_id]; - } bool sanity_check_lookup() const; @@ -87,11 +62,6 @@ class Connection_based_routing_resources { //Updates the connection delay lower bound (if less than current best found) void update_lower_bound_connection_delay(ParentNetId net, int ipin, float delay); - void prepare_routing_for_net(ParentNetId net_id) { - remaining_targets[net_id].clear(); - reached_rt_sinks[net_id].clear(); - } - // get a handle on the resources float get_stable_critical_path_delay() const { return last_stable_critical_path_delay; } diff --git a/vpr/src/route/partition_tree.cpp b/vpr/src/route/partition_tree.cpp index f896d93bc94..d3d895493b5 100644 --- a/vpr/src/route/partition_tree.cpp +++ b/vpr/src/route/partition_tree.cpp @@ -1,11 +1,12 @@ #include "partition_tree.h" +#include #include PartitionTree::PartitionTree(const Netlist<>& netlist) { const auto& device_ctx = g_vpr_ctx.device(); auto all_nets = std::vector(netlist.nets().begin(), netlist.nets().end()); - _root = build_helper(netlist, all_nets, 0, 0, device_ctx.grid.width(), device_ctx.grid.height()); + _root = build_helper(netlist, all_nets, 0, 0, device_ctx.grid.width() - 1, device_ctx.grid.height() - 1); } std::unique_ptr PartitionTree::build_helper(const Netlist<>& netlist, const std::vector& nets, int x1, int y1, int x2, int y2) { @@ -15,116 +16,122 @@ std::unique_ptr PartitionTree::build_helper(const Netlist<>& const auto& route_ctx = g_vpr_ctx.routing(); auto out = std::make_unique(); - /* Find best cutline. In ParaDRo this is done using prefix sums, but - * life is too short to implement them, therefore I'm just doing a linear search, - * and the complexity is O((fpga width + height) * #nets * log2(w+h * #nets)). - * What we are searching for is the cutline with the most balanced workload (# of fanouts) - * on the sides. */ - int left, right, mine; - int score; - /* TODO: maybe put all of this into a tuple or struct? */ - int best_score = std::numeric_limits::max(); - int best_pos = -1, best_left = -1, best_right = -1; - enum { X, - Y } best_axis - = X; + /* Build ParaDRo-ish prefix sum lookup for each bin (coordinate) in the device. + * Do this for every step with only given nets, because each cutline takes some nets out + * of the game, so if we just built a global lookup it wouldn't yield accurate results. + * + * VPR's bounding boxes include the borders (see ConnectionRouter::timing_driven_expand_neighbour()) + * so try to include x=bb.xmax, y=bb.ymax etc. when calculating things. */ + int W = x2 - x1 + 1; + int H = y2 - y1 + 1; - for (int x = x1 + 1; x < x2; x++) { - left = right = mine = 0; - for (auto net_id : nets) { - t_bb bb = route_ctx.route_bb[net_id]; - size_t fanout = netlist.net_sinks(net_id).size(); - if (bb.xmin < x && bb.xmax < x) { - left += fanout; - } else if (bb.xmin > x && bb.xmax > x) { - right += fanout; - } else if (bb.xmin <= x && bb.xmax >= x) { - mine += fanout; - } else { - VTR_ASSERT(false); /* unreachable */ - } + VTR_ASSERT(W > 1 && H > 1); + /* Cutlines are placed between integral coordinates. + * For instance, x_total_before[0] assumes a cutline at x=0.5, so fanouts at x=0 are included but not + * x=1. It's similar for x_total_after[0], which excludes fanouts at x=0 and includes x=1. + * Note that we have W-1 possible cutlines for a W-wide box. */ + std::vector x_total_before(W - 1, 0), x_total_after(W - 1, 0); + std::vector y_total_before(H - 1, 0), y_total_after(H - 1, 0); + + for (auto net_id : nets) { + t_bb bb = route_ctx.route_bb[net_id]; + size_t fanouts = netlist.net_sinks(net_id).size(); + + /* Inclusive start and end coords of the bbox relative to x1. Clamp to [x1, x2]. */ + int x_start = std::max(x1, bb.xmin) - x1; + int x_end = std::min(bb.xmax, x2) - x1; + /* Fill in the lookups assuming a cutline at x + 0.5. */ + for (int x = x_start; x < W - 1; x++) { + x_total_before[x] += fanouts; + } + for (int x = 0; x < x_end; x++) { + x_total_after[x] += fanouts; + } + int y_start = std::max(y1, bb.ymin) - y1; + int y_end = std::min(bb.ymax, y2) - y1; + for (int y = y_start; y < H - 1; y++) { + y_total_before[y] += fanouts; } - score = abs(left - right); + for (int y = 0; y < y_end; y++) { + y_total_after[y] += fanouts; + } + } + + int best_score = std::numeric_limits::max(); + float best_pos = std::numeric_limits::quiet_NaN(); + Axis best_axis = Axis::X; + + int max_x_before = x_total_before[W - 2]; + int max_x_after = x_total_after[0]; + for (int x = 0; x < W - 1; x++) { + int before = x_total_before[x]; + int after = x_total_after[x]; + if (before == max_x_before || after == max_x_after) /* Cutting here would leave no nets to the left or right */ + continue; + int score = abs(x_total_before[x] - x_total_after[x]); if (score < best_score) { best_score = score; - best_left = left; - best_right = right; - best_pos = x; - best_axis = X; + best_pos = x1 + x + 0.5; /* Lookups are relative to (x1, y1) */ + best_axis = Axis::X; } } - for (int y = y1 + 1; y < y2; y++) { - left = right = mine = 0; - for (auto net_id : nets) { - t_bb bb = route_ctx.route_bb[net_id]; - size_t fanout = netlist.net_sinks(net_id).size(); - if (bb.ymin < y && bb.ymax < y) { - left += fanout; - } else if (bb.ymin > y && bb.ymax > y) { - right += fanout; - } else if (bb.ymin <= y && bb.ymax >= y) { - mine += fanout; - } else { - VTR_ASSERT(false); /* unreachable */ - } - } - score = abs(left - right); + + int max_y_before = y_total_before[H - 2]; + int max_y_after = y_total_after[0]; + for (int y = 0; y < H - 1; y++) { + int before = y_total_before[y]; + int after = y_total_after[y]; + if (before == max_y_before || after == max_y_after) /* Cutting here would leave no nets to the left or right (sideways) */ + continue; + int score = abs(y_total_before[y] - y_total_after[y]); if (score < best_score) { best_score = score; - best_left = left; - best_right = right; - best_pos = y; - best_axis = Y; + best_pos = y1 + y + 0.5; /* Lookups are relative to (x1, y1) */ + best_axis = Axis::Y; } } - /* If one of the sides has 0 nets in the best arrangement, - * there's no use in partitioning this: no parallelism comes out of it. */ - if (best_left == 0 || best_right == 0) { - out->nets = std::move(nets); + /* Couldn't find a cutline: all cutlines result in a one-way cut */ + if (std::isnan(best_pos)) { + out->nets = nets; /* We hope copy elision is smart enough to optimize this stuff out */ return out; } - /* Populate net IDs on each side - * and call next level of build_partition_trees. */ + /* Populate net IDs on each side and call next level of build_x */ std::vector left_nets, right_nets, my_nets; - if (best_axis == X) { + if (best_axis == Axis::X) { for (auto net_id : nets) { t_bb bb = route_ctx.route_bb[net_id]; - if (bb.xmin < best_pos && bb.xmax < best_pos) { + if (bb.xmax < best_pos) { left_nets.push_back(net_id); - } else if (bb.xmin > best_pos && bb.xmax > best_pos) { + } else if (bb.xmin > best_pos) { right_nets.push_back(net_id); - } else if (bb.xmin <= best_pos && bb.xmax >= best_pos) { - my_nets.push_back(net_id); } else { - VTR_ASSERT(false); /* unreachable */ + my_nets.push_back(net_id); } } - out->left = build_helper(netlist, left_nets, x1, y1, best_pos, y2); - out->right = build_helper(netlist, right_nets, best_pos, y2, x2, y2); + out->left = build_helper(netlist, left_nets, x1, y1, std::floor(best_pos), y2); + out->right = build_helper(netlist, right_nets, std::floor(best_pos + 1), y1, x2, y2); } else { - VTR_ASSERT(best_axis == Y); + VTR_ASSERT(best_axis == Axis::Y); for (auto net_id : nets) { t_bb bb = route_ctx.route_bb[net_id]; - if (bb.ymin < best_pos && bb.ymax < best_pos) { + if (bb.ymax < best_pos) { left_nets.push_back(net_id); - } else if (bb.ymin > best_pos && bb.ymax > best_pos) { + } else if (bb.ymin > best_pos) { right_nets.push_back(net_id); - } else if (bb.ymin <= best_pos && bb.ymax >= best_pos) { - my_nets.push_back(net_id); } else { - VTR_ASSERT(false); /* unreachable */ + my_nets.push_back(net_id); } } - out->left = build_helper(netlist, left_nets, x1, best_pos, x2, y2); - out->right = build_helper(netlist, right_nets, x1, y1, x2, best_pos); + out->left = build_helper(netlist, left_nets, x1, y1, x2, std::floor(best_pos)); + out->right = build_helper(netlist, right_nets, x1, std::floor(best_pos + 1), x2, y2); } - out->nets = std::move(my_nets); + out->nets = my_nets; out->cutline_axis = best_axis; out->cutline_pos = best_pos; return out; diff --git a/vpr/src/route/partition_tree.h b/vpr/src/route/partition_tree.h index 97988d5fdbb..08eb668a88f 100644 --- a/vpr/src/route/partition_tree.h +++ b/vpr/src/route/partition_tree.h @@ -3,6 +3,28 @@ #include "connection_router.h" #include "router_stats.h" +#include +#include +#include +#include + +#ifdef VPR_USE_TBB +# include +#endif + +/** Self-descriptive */ +enum class Axis { X, + Y }; + +/** Which side of a line? */ +enum class Side { LEFT = 0, + RIGHT = 1 }; + +/** Invert side */ +inline Side operator!(const Side& rhs) { + return Side(!size_t(rhs)); +} + /** Routing iteration results per thread. (for a subset of the input netlist) */ struct RouteIterResults { /** Are there any connections impossible to route due to a disconnected rr_graph? */ @@ -38,11 +60,12 @@ class PartitionTreeNode { bool is_routable = false; /** Net IDs for which timing_driven_route_net() actually got called */ std::vector rerouted_nets; - - /* debug stuff */ - int cutline_axis = -1; - int cutline_pos = -1; - std::vector exec_times; + /* Axis of the cutline. */ + Axis cutline_axis = Axis::X; + /* Position of the cutline. It's a float, because cutlines are considered to be "between" integral coordinates. */ + float cutline_pos = std::numeric_limits::quiet_NaN(); + /* Bounding box of *this* node. (The cutline cuts this box) */ + t_bb bb; }; /** Holds the root PartitionTreeNode and exposes top level operations. */ @@ -64,3 +87,34 @@ class PartitionTree { std::unique_ptr _root; std::unique_ptr build_helper(const Netlist<>& netlist, const std::vector& nets, int x1, int y1, int x2, int y2); }; + +#ifdef VPR_DEBUG_PARTITION_TREE +/** Log PartitionTree-related messages. Can handle multiple threads. */ +class PartitionTreeDebug { + public: +# ifdef VPR_USE_TBB + static inline tbb::concurrent_vector lines; +# else + static inline std::vector lines; +# endif + /** Add msg to the log buffer (with a thread ID header) */ + static inline void log(std::string msg) { + auto thread_id = std::hash()(std::this_thread::get_id()); + lines.push_back("[thread " + std::to_string(thread_id) + "] " + msg); + } + /** Write out the log buffer into a file */ + static inline void write(std::string filename) { + std::ofstream f(filename); + for (auto& line : lines) { + f << line << std::endl; + } + f.close(); + } +}; +#else +class PartitionTreeDebug { + public: + static inline void log(std::string /* msg */) {} + static inline void write(std::string /* filename */) {} +}; +#endif diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index 881dbfd46aa..99d116b0de6 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -520,14 +520,13 @@ void mark_ends(const Netlist<>& net_list, ParentNetId net_id) { } } -void mark_remaining_ends(ParentNetId net_id, const std::vector& remaining_sinks) { - // like mark_ends, but only performs it for the remaining sinks of a net - RRNodeId inode; - +/** like mark_ends, but only performs it for the remaining sinks of a net */ +void mark_remaining_ends(ParentNetId net_id) { auto& route_ctx = g_vpr_ctx.mutable_routing(); + const auto& tree = route_ctx.route_trees[net_id].value(); - for (int sink_pin : remaining_sinks) { - inode = route_ctx.net_rr_terminals[net_id][sink_pin]; + for (int sink_pin : tree.get_remaining_isinks()) { + RRNodeId inode = route_ctx.net_rr_terminals[net_id][sink_pin]; ++route_ctx.rr_node_route_inf[inode].target_flag; } } diff --git a/vpr/src/route/route_common.h b/vpr/src/route/route_common.h index 4a7d1a2cf76..68e525e10b0 100644 --- a/vpr/src/route/route_common.h +++ b/vpr/src/route/route_common.h @@ -89,7 +89,7 @@ inline float get_single_rr_cong_cost(RRNodeId inode, float pres_fac) { void mark_ends(const Netlist<>& net_list, ParentNetId net_id); -void mark_remaining_ends(ParentNetId net_id, const std::vector& remaining_sinks); +void mark_remaining_ends(ParentNetId net_id); void add_to_mod_list(RRNodeId inode, std::vector& modified_rr_node_inf); diff --git a/vpr/src/route/route_parallel.cpp b/vpr/src/route/route_parallel.cpp index 1e50f758b31..96e6464f62b 100644 --- a/vpr/src/route/route_parallel.cpp +++ b/vpr/src/route/route_parallel.cpp @@ -33,7 +33,6 @@ # include "tbb/enumerable_thread_specific.h" # include "tbb/task_group.h" -# include "tbb/global_control.h" /** route_net and similar functions need many bits of state collected from various * parts of VPR, collect them here for ease of use */ @@ -102,6 +101,12 @@ static bool try_parallel_route_tmpl(const Netlist<>& netlist, ScreenUpdatePriority first_iteration_priority, bool is_flat); +template +static RouteIterResults route_with_partition_tree(tbb::task_group& g, RouteIterCtx& ctx); + +template +static RouteIterResults route_without_partition_tree(std::vector& nets_to_route, RouteIterCtx& ctx); + /************************ Subroutine definitions *****************************/ bool try_parallel_route(const Netlist<>& net_list, @@ -326,12 +331,6 @@ bool try_parallel_route_tmpl(const Netlist<>& net_list, is_flat); } - /* Build partition tree for parallel routing */ - vtr::Timer t; - PartitionTree partition_tree(net_list); - float total_prep_time = t.elapsed_sec(); - VTR_LOG("# Built partition tree in %f seconds\n", total_prep_time); - tbb::task_group tbb_task_group; /* Set up thread local storage. @@ -414,7 +413,9 @@ bool try_parallel_route_tmpl(const Netlist<>& net_list, choking_spots, is_flat}; - RouteIterResults iter_results = route_partition_tree(tbb_task_group, partition_tree, iter_ctx); + vtr::Timer net_routing_timer; + RouteIterResults iter_results = route_with_partition_tree(tbb_task_group, iter_ctx); + PartitionTreeDebug::log("Routing all nets took " + std::to_string(net_routing_timer.elapsed_sec()) + " s"); if (!iter_results.is_routable) { return false; // Impossible to route @@ -478,6 +479,7 @@ bool try_parallel_route_tmpl(const Netlist<>& net_list, //Output progress print_route_status(itry, iter_elapsed_time, pres_fac, num_net_bounding_boxes_updated, iter_results.stats, overuse_info, wirelength_info, timing_info, est_success_iteration); + PartitionTreeDebug::log("Iteration " + std::to_string(itry) + " took " + std::to_string(iter_elapsed_time) + " s"); prev_iter_cumm_time = iter_cumm_time; @@ -593,8 +595,7 @@ bool try_parallel_route_tmpl(const Netlist<>& net_list, */ if (router_opts.route_bb_update == e_route_bb_update::DYNAMIC) { - /** TODO: Disabled BB scaling for the baseline parallel router. Should re-enable it by building/updating partition tree on every iteration */ - // num_net_bounding_boxes_updated = dynamic_update_bounding_boxes(iter_results.rerouted_nets, net_list, router_opts.high_fanout_threshold); + num_net_bounding_boxes_updated = dynamic_update_bounding_boxes(iter_results.rerouted_nets, net_list, router_opts.high_fanout_threshold); } if (itry >= high_effort_congestion_mode_iteration_threshold) { @@ -665,8 +666,7 @@ bool try_parallel_route_tmpl(const Netlist<>& net_list, //Scale by BB_SCALE_FACTOR but clip to grid size to avoid overflow bb_fac = std::min(max_grid_dim, bb_fac * BB_SCALE_FACTOR); - /** TODO: Disabled BB scaling for the baseline parallel router. Should re-enable it by building/updating partition tree on every iteration */ - // route_ctx.route_bb = load_route_bb(net_list, bb_fac); + route_ctx.route_bb = load_route_bb(net_list, bb_fac); } ++itry_conflicted_mode; @@ -795,6 +795,7 @@ bool try_parallel_route_tmpl(const Netlist<>& net_list, VTR_LOG("total_number_of_adding_all_rt_from_calling_high_fanout_rt: %zu ", router_stats.add_all_rt_from_high_fanout); VTR_LOG("\n"); + PartitionTreeDebug::write("partition_tree.log"); return routing_is_successful; } @@ -814,7 +815,6 @@ NetResultFlags try_parallel_route_net(ConnectionRouter& router, CBRR& connections_inf, RouterStats& router_stats, std::vector& pin_criticality, - std::vector>& rt_node_of_sink, NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, std::shared_ptr timing_info, @@ -828,14 +828,11 @@ NetResultFlags try_parallel_route_net(ConnectionRouter& router, NetResultFlags flags; - connections_inf.prepare_routing_for_net(net_id); - bool reroute_for_hold = false; if (budgeting_inf.if_set()) { reroute_for_hold = (budgeting_inf.get_should_reroute(net_id)); reroute_for_hold &= worst_negative_slack != 0; } - if (route_ctx.net_status.is_fixed(net_id)) { /* Skip pre-routed nets. */ flags.success = true; } else if (net_list.net_is_ignored(net_id)) { /* Skip ignored nets. */ @@ -856,7 +853,6 @@ NetResultFlags try_parallel_route_net(ConnectionRouter& router, connections_inf, router_stats, pin_criticality, - rt_node_of_sink, net_delay[net_id].data(), netlist_pin_lookup, timing_info, @@ -878,6 +874,7 @@ NetResultFlags try_parallel_route_net(ConnectionRouter& router, flags.was_rerouted = true; //Flag to record whether routing was actually changed } + return flags; } @@ -895,8 +892,6 @@ void route_partition_tree_helper(tbb::task_group& g, node.is_routable = true; node.rerouted_nets.clear(); - std::cout << "routing node with " << node.nets.size() << " nets\n"; - vtr::Timer t; for (auto net_id : node.nets) { auto flags = try_parallel_route_net( @@ -909,7 +904,6 @@ void route_partition_tree_helper(tbb::task_group& g, ctx.connections_inf, ctx.router_stats.local(), ctx.route_structs.local().pin_criticality, - ctx.route_structs.local().rt_node_of_sink, ctx.net_delay, ctx.netlist_pin_lookup, ctx.timing_info, @@ -933,7 +927,8 @@ void route_partition_tree_helper(tbb::task_group& g, nets_to_retry[net_id] = true; } } - node.exec_times.push_back(t.elapsed_sec()); + + PartitionTreeDebug::log("Node with " + std::to_string(node.nets.size()) + " nets routed in " + std::to_string(t.elapsed_sec()) + " s"); /* add left and right trees to task queue */ if (node.left && node.right) { @@ -944,7 +939,7 @@ void route_partition_tree_helper(tbb::task_group& g, route_partition_tree_helper(g, *node.right, ctx, nets_to_retry); }); } else { - VTR_ASSERT(!node.left && !node.right); // tree should have been built perfectly balanced + VTR_ASSERT(!node.left && !node.right); // there shouldn't be a node with a single branch } } @@ -1003,4 +998,60 @@ RouteIterResults route_partition_tree(tbb::task_group& g, return out; } +/* Build a partition tree and route with it */ +template +static RouteIterResults route_with_partition_tree(tbb::task_group& g, RouteIterCtx& ctx) { + vtr::Timer t2; + PartitionTree partition_tree(ctx.net_list); + float total_prep_time = t2.elapsed_sec(); + VTR_LOG("# Built partition tree in %f seconds\n", total_prep_time); + + return route_partition_tree(g, partition_tree, ctx); +} + +/* Route serially */ +template +static RouteIterResults route_without_partition_tree(std::vector& nets_to_route, RouteIterCtx& ctx) { + RouteIterResults out; + + /* Sort so net with most sinks is routed first. */ + std::sort(nets_to_route.begin(), nets_to_route.end(), [&](const ParentNetId id1, const ParentNetId id2) -> bool { + return ctx.net_list.net_sinks(id1).size() > ctx.net_list.net_sinks(id2).size(); + }); + + for (auto net_id : nets_to_route) { + auto flags = try_timing_driven_route_net( + ctx.routers.local(), + ctx.net_list, + net_id, + ctx.itry, + ctx.pres_fac, + ctx.router_opts, + ctx.connections_inf, + ctx.router_stats.local(), + ctx.route_structs.local().pin_criticality, + ctx.route_structs.local().rt_node_of_sink, + ctx.net_delay, + ctx.netlist_pin_lookup, + ctx.timing_info, + ctx.pin_timing_invalidator, + ctx.budgeting_inf, + ctx.worst_negative_slack, + ctx.routing_predictor, + ctx.choking_spots[net_id], + ctx.is_flat); + + if (!flags.success) { + out.is_routable = false; + } + if (flags.was_rerouted) { + out.rerouted_nets.push_back(net_id); + } + } + + update_router_stats(out.stats, ctx.router_stats.local()); + + return out; +} + #endif // VPR_USE_TBB diff --git a/vpr/src/route/route_timing.cpp b/vpr/src/route/route_timing.cpp index 9a2197ed3ca..62930ad2555 100644 --- a/vpr/src/route/route_timing.cpp +++ b/vpr/src/route/route_timing.cpp @@ -94,7 +94,6 @@ static NetResultFlags timing_driven_route_sink(ConnectionRouter& router, const t_conn_cost_params cost_params, const t_router_opts& router_opts, RouteTree& tree, - std::vector>& rt_node_of_sink, SpatialRouteTreeLookup& spatial_rt_lookup, RouterStats& router_stats, route_budgets& budgeting_inf, @@ -124,13 +123,11 @@ static void setup_routing_resources(int itry, unsigned num_sinks, int min_incremental_reroute_fanout, CBRR& connections_inf, - std::vector>& rt_node_of_sink, const t_router_opts& router_opts, bool ripup_high_fanout_nets); static void update_net_delays_from_route_tree(float* net_delay, const Netlist<>& net_list, - std::vector>& rt_node_of_sink, ParentNetId inet, TimingInfo* timing_info, NetPinTimingInvalidator* pin_timing_invalidator); @@ -469,7 +466,6 @@ bool try_timing_driven_route_tmpl(const Netlist<>& net_list, connections_inf, router_iteration_stats, route_structs.pin_criticality, - route_structs.rt_node_of_sink, net_delay, netlist_pin_lookup, route_timing_info, @@ -868,7 +864,6 @@ NetResultFlags try_timing_driven_route_net(ConnectionRouter& router, CBRR& connections_inf, RouterStats& router_stats, std::vector& pin_criticality, - std::vector>& rt_node_of_sink, NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, std::shared_ptr timing_info, @@ -882,8 +877,6 @@ NetResultFlags try_timing_driven_route_net(ConnectionRouter& router, NetResultFlags flags; - connections_inf.prepare_routing_for_net(net_id); - bool reroute_for_hold = false; if (budgeting_inf.if_set()) { reroute_for_hold = (budgeting_inf.get_should_reroute(net_id)); @@ -909,7 +902,6 @@ NetResultFlags try_timing_driven_route_net(ConnectionRouter& router, connections_inf, router_stats, pin_criticality, - rt_node_of_sink, net_delay[net_id].data(), netlist_pin_lookup, timing_info, @@ -955,7 +947,6 @@ NetResultFlags timing_driven_route_net(ConnectionRouter& router, CBRR& connections_inf, RouterStats& router_stats, std::vector& pin_criticality, - std::vector>& rt_node_of_sink, float* net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, std::shared_ptr timing_info, @@ -982,7 +973,6 @@ NetResultFlags timing_driven_route_net(ConnectionRouter& router, num_sinks, router_opts.min_incremental_reroute_fanout, connections_inf, - rt_node_of_sink, router_opts, check_hold(router_opts, worst_neg_slack)); @@ -1001,7 +991,7 @@ NetResultFlags timing_driven_route_net(ConnectionRouter& router, // after this point the route tree is correct // remaining_targets from this point on are the **pin indices** that have yet to be routed - auto& remaining_targets = connections_inf.get_remaining_targets(net_id); + std::vector remaining_targets(tree.get_remaining_isinks().begin(), tree.get_remaining_isinks().end()); // calculate criticality of remaining target pins for (int ipin : remaining_targets) { @@ -1102,7 +1092,6 @@ NetResultFlags timing_driven_route_net(ConnectionRouter& router, cost_params, router_opts, tree, - rt_node_of_sink, spatial_route_tree_lookup, router_stats, budgeting_inf, @@ -1132,7 +1121,6 @@ NetResultFlags timing_driven_route_net(ConnectionRouter& router, // may have to update timing delay of the previously legally reached sinks since downstream capacitance could be changed update_net_delays_from_route_tree(net_delay, net_list, - rt_node_of_sink, net_id, timing_info.get(), pin_timing_invalidator); @@ -1249,7 +1237,6 @@ static NetResultFlags timing_driven_route_sink(ConnectionRouter& router, const t_conn_cost_params cost_params, const t_router_opts& router_opts, RouteTree& tree, - std::vector>& rt_node_of_sink, SpatialRouteTreeLookup& spatial_rt_lookup, RouterStats& router_stats, route_budgets& budgeting_inf, @@ -1343,8 +1330,6 @@ static NetResultFlags timing_driven_route_sink(ConnectionRouter& router, } } - rt_node_of_sink[target_pin] = new_sink; - /* update global occupancy from the new branch */ if (new_branch) pathfinder_update_cost_from_route_tree(new_branch.value(), 1); @@ -1364,14 +1349,11 @@ static void setup_routing_resources(int itry, unsigned num_sinks, int min_incremental_reroute_fanout, CBRR& connections_inf, - std::vector>& rt_node_of_sink, const t_router_opts& router_opts, bool ripup_high_fanout_nets) { /* Build and return a partial route tree from the legal connections from last iteration. * along the way do: * update pathfinder costs to be accurate to the partial route tree - * find and store the pins that still need to be reached in incremental_rerouting_resources.remaining_targets - * find and store the rt nodes that have been reached in incremental_rerouting_resources.reached_rt_sinks * mark the rr_node sinks as targets to be reached. */ auto& route_ctx = g_vpr_ctx.mutable_routing(); @@ -1390,9 +1372,8 @@ static void setup_routing_resources(int itry, /* re-initialize net */ tree = RouteTree(net_id); + pathfinder_update_cost_from_route_tree(tree.value().root(), 1); - for (unsigned int sink_pin = 1; sink_pin <= num_sinks; ++sink_pin) - connections_inf.toreach_rr_sink(net_id, sink_pin); // since all connections will be rerouted for this net, clear all of net's forced reroute flags connections_inf.clear_force_reroute_for_net(net_id); @@ -1401,16 +1382,15 @@ static void setup_routing_resources(int itry, // of their versions that act on node indices directly like mark_remaining_ends mark_ends(net_list, net_id); } else { - auto& reached_sinks = connections_inf.get_reached_rt_sinks(net_id); - auto& remaining_targets = connections_inf.get_remaining_targets(net_id); - profiling::net_rebuild_start(); - if (!tree) + if (!tree) { tree = RouteTree(net_id); + pathfinder_update_cost_from_route_tree(tree.value().root(), 1); + } /* copy the existing routing - * prune_route_tree depends on global occ, so we can't subtract before pruning + * prune() depends on global occ, so we can't subtract before pruning * OPT: to skip this copy, return a "diff" from RouteTree::prune */ RouteTree tree2 = tree.value(); @@ -1435,19 +1415,12 @@ static void setup_routing_resources(int itry, // Initialize only to source tree = RouteTree(net_id); + pathfinder_update_cost_from_route_tree(tree.value().root(), 1); } - VTR_ASSERT(reached_sinks.size() + remaining_targets.size() == num_sinks); + profiling::net_rebuild_end(num_sinks, tree->get_remaining_isinks().size()); - // give lookup on the reached sinks - for (RRNodeId sink_rr_node : reached_sinks) { - auto& sink_node = tree.value().find_by_rr_id(sink_rr_node).value(); - rt_node_of_sink[sink_node.net_pin_index] = sink_node; - } - - profiling::net_rebuild_end(num_sinks, remaining_targets.size()); - - // still need to calculate the tree's time delay (0 Tarrival means from SOURCE) + // still need to calculate the tree's time delay tree.value().reload_timing(); // check for R_upstream C_downstream and edge correctness @@ -1457,7 +1430,7 @@ static void setup_routing_resources(int itry, VTR_ASSERT_SAFE(tree.value().is_uncongested()); // mark remaining ends - mark_remaining_ends(net_id, remaining_targets); + mark_remaining_ends(net_id); // mark the lookup (rr_node_route_inf) for existing tree elements as NO_PREVIOUS so add_to_path stops when it reaches one of them update_rr_route_inf_from_tree(tree.value().root()); @@ -1540,21 +1513,14 @@ bool timing_driven_check_net_delays(const Netlist<>& net_list, NetPinsMatrix& net_list, - std::vector>& rt_node_of_sink, ParentNetId inet, TimingInfo* timing_info, NetPinTimingInvalidator* pin_timing_invalidator) { - for (unsigned int isink = 1; isink < net_list.net_pins(inet).size(); isink++) { - float new_delay = rt_node_of_sink[isink]->Tdel; - - if (pin_timing_invalidator && new_delay != net_delay[isink]) { - //Delay changed, invalidate for incremental timing update - VTR_ASSERT_SAFE(timing_info); - ParentPinId pin = net_list.net_pin(inet, isink); - pin_timing_invalidator->invalidate_connection(pin, timing_info); - } + auto& route_ctx = g_vpr_ctx.routing(); + const RouteTree& tree = route_ctx.route_trees[inet].value(); - net_delay[isink] = new_delay; + for (unsigned int isink = 1; isink < net_list.net_pins(inet).size(); isink++) { + update_net_delay_from_isink(net_delay, tree, isink, net_list, inet, timing_info, pin_timing_invalidator); } } @@ -1571,8 +1537,10 @@ bool should_route_net(ParentNetId net_id, return true; } + const RouteTree& tree = route_ctx.route_trees[net_id].value(); + /* Walk over all rt_nodes in the net */ - for (auto& rt_node : route_ctx.route_trees[net_id]->all_nodes()) { + for (auto& rt_node : tree.all_nodes()) { RRNodeId inode = rt_node.inode; int occ = route_ctx.rr_node_route_inf[inode].occ(); int capacity = rr_graph.node_capacity(inode); @@ -1591,9 +1559,11 @@ bool should_route_net(ParentNetId net_id, } } - VTR_ASSERT(connections_inf.get_remaining_targets(net_id).empty()); + /* If all sinks have been routed to without overuse, no need to route this */ + if (tree.get_remaining_isinks().empty()) + return false; - return false; /* Current route has no overuse */ + return true; } bool early_exit_heuristic(const t_router_opts& router_opts, const WirelengthInfo& wirelength_info) { @@ -1873,6 +1843,8 @@ size_t dynamic_update_bounding_boxes(const std::vector& updated_net for (ParentNetId net : updated_nets) { if (!route_ctx.route_trees[net]) continue; // Skip if no routing + if (!route_ctx.net_status.is_routed(net)) + continue; //We do not adjust the bounding boxes of high fanout nets, since they //use different bounding boxes based on the target location. @@ -2100,7 +2072,6 @@ void prune_unused_non_configurable_nets(CBRR& connections_inf, continue; RouteTree& tree = route_ctx.route_trees[net_id].value(); - connections_inf.prepare_routing_for_net(net_id); connections_inf.clear_force_reroute_for_net(net_id); std::vector usage = tree.get_non_config_node_set_usage(); diff --git a/vpr/src/route/route_timing.h b/vpr/src/route/route_timing.h index bccf9ba2c84..38495bb806b 100644 --- a/vpr/src/route/route_timing.h +++ b/vpr/src/route/route_timing.h @@ -65,20 +65,14 @@ struct RoutingMetrics { /* Data while timing driven route is active */ class timing_driven_route_structs { public: - std::vector pin_criticality; /* [1..max_pins_per_net-1] */ - std::vector sink_order; /* [1..max_pins_per_net-1] */ - std::vector> rt_node_of_sink; /* [1..max_pins_per_net-1] */ + std::vector pin_criticality; /* [1..max_pins_per_net-1] */ timing_driven_route_structs(const Netlist<>& net_list) { int max_sinks = std::max(get_max_pins_per_net(net_list) - 1, 0); pin_criticality.resize(max_sinks + 1); - sink_order.resize(max_sinks + 1); - rt_node_of_sink.resize(max_sinks + 1); /* Set element 0 to invalid values */ pin_criticality[0] = std::numeric_limits::quiet_NaN(); - sink_order[0] = -1; - rt_node_of_sink[0] = vtr::nullopt; } }; @@ -234,7 +228,6 @@ NetResultFlags timing_driven_route_net(ConnectionRouter& router, CBRR& connections_inf, RouterStats& router_stats, std::vector& pin_criticality, - std::vector>& rt_node_of_sink, float* net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, std::shared_ptr timing_info, @@ -255,7 +248,6 @@ NetResultFlags try_timing_driven_route_net(ConnectionRouter& router, CBRR& connections_inf, RouterStats& router_stats, std::vector& pin_criticality, - std::vector>& rt_node_of_sink, NetPinsMatrix& net_delay, const ClusteredPinAtomPinsLookup& netlist_pin_lookup, std::shared_ptr timing_info, @@ -266,6 +258,26 @@ NetResultFlags try_timing_driven_route_net(ConnectionRouter& router, const std::vector>& choking_spots, bool is_flat); +/** Update net_delay value for a single sink in a RouteTree. */ +inline void update_net_delay_from_isink(float* net_delay, + const RouteTree& tree, + int isink, + const Netlist<>& net_list, + ParentNetId inet, + TimingInfo* timing_info, + NetPinTimingInvalidator* pin_timing_invalidator) { + float new_delay = tree.find_by_isink(isink)->Tdel; + + if (pin_timing_invalidator && new_delay != net_delay[isink]) { + //Delay changed, invalidate for incremental timing update + VTR_ASSERT_SAFE(timing_info); + ParentPinId pin = net_list.net_pin(inet, isink); + pin_timing_invalidator->invalidate_connection(pin, timing_info); + } + + net_delay[isink] = new_delay; +} + void update_router_stats(RouterStats& router_stats, RouterStats& router_iteration_stats); #ifndef NO_GRAPHICS diff --git a/vpr/src/route/route_tree.cpp b/vpr/src/route/route_tree.cpp index 82e929e3ebc..36f37461527 100644 --- a/vpr/src/route/route_tree.cpp +++ b/vpr/src/route/route_tree.cpp @@ -78,10 +78,15 @@ RouteTree::RouteTree(RRNodeId _inode) { RouteTree::RouteTree(ParentNetId _inet) { auto& route_ctx = g_vpr_ctx.routing(); + RRNodeId inode = RRNodeId(route_ctx.net_rr_terminals[_inet][0]); _root = new RouteTreeNode(inode, RRSwitchId::INVALID(), nullptr); _net_id = _inet; _rr_node_to_rt_node[inode] = _root; + + _num_sinks = route_ctx.net_rr_terminals[_inet].size() - 1; + _isink_to_rt_node.resize(_num_sinks); /* 0-indexed */ + _is_isink_reached.resize(_num_sinks + 1); /* 1-indexed */ } /** Make a copy of rhs and return it. @@ -105,43 +110,66 @@ void RouteTree::copy_tree_x(RouteTreeNode* lhs, const RouteTreeNode& rhs) { /* Copy constructor */ RouteTree::RouteTree(const RouteTree& rhs) { - _root = copy_tree(rhs._root); + _isink_to_rt_node.resize(rhs._isink_to_rt_node.size()); _net_id = rhs._net_id; + _root = copy_tree(rhs._root); + _is_isink_reached = rhs._is_isink_reached; + _num_sinks = rhs._num_sinks; } /* Move constructor: * Take over rhs' linked list & set it to null so it doesn't get freed. - * Refs should stay valid after this? */ + * Refs should stay valid after this? + * I don't think there's a user crazy enough to move around route trees + * from multiple threads, but better safe than sorry */ RouteTree::RouteTree(RouteTree&& rhs) { + std::unique_lock rhs_write_lock(rhs._write_mutex); _root = rhs._root; _net_id = rhs._net_id; rhs._root = nullptr; _rr_node_to_rt_node = std::move(rhs._rr_node_to_rt_node); + _isink_to_rt_node = std::move(rhs._isink_to_rt_node); + _is_isink_reached = std::move(rhs._is_isink_reached); + _num_sinks = rhs._num_sinks; } /* Copy assignment: free list, clear lookup, reload list. */ RouteTree& RouteTree::operator=(const RouteTree& rhs) { if (this == &rhs) return *this; + std::unique_lock write_lock(_write_mutex); free_list(_root); _rr_node_to_rt_node.clear(); - _root = copy_tree(rhs._root); + _isink_to_rt_node.clear(); + _isink_to_rt_node.resize(rhs._isink_to_rt_node.size()); _net_id = rhs._net_id; + _root = copy_tree(rhs._root); + _is_isink_reached = rhs._is_isink_reached; + _num_sinks = rhs._num_sinks; return *this; } /* Move assignment: * Free my list, take over rhs' linked list & set it to null so it doesn't get freed. * Also ~steal~ acquire ownership of node lookup from rhs. - * Refs should stay valid after this? */ + * Refs should stay valid after this? + * I don't think there's a user crazy enough to move around route trees + * from multiple threads, but better safe than sorry */ RouteTree& RouteTree::operator=(RouteTree&& rhs) { if (this == &rhs) return *this; + /* See https://stackoverflow.com/a/29988626 */ + std::unique_lock write_lock(_write_mutex, std::defer_lock); + std::unique_lock rhs_write_lock(rhs._write_mutex, std::defer_lock); + std::lock(write_lock, rhs_write_lock); free_list(_root); _root = rhs._root; _net_id = rhs._net_id; rhs._root = nullptr; _rr_node_to_rt_node = std::move(rhs._rr_node_to_rt_node); + _isink_to_rt_node = std::move(rhs._isink_to_rt_node); + _is_isink_reached = std::move(rhs._is_isink_reached); + _num_sinks = rhs._num_sinks; return *this; } @@ -149,6 +177,11 @@ RouteTree& RouteTree::operator=(RouteTree&& rhs) { * Can take a RouteTreeNode& to do an incremental update. * Note that update_from_heap already calls this. */ void RouteTree::reload_timing(vtr::optional from_node) { + std::unique_lock write_lock(_write_mutex); + reload_timing_unlocked(from_node); +} + +void RouteTree::reload_timing_unlocked(vtr::optional from_node) { auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; @@ -449,8 +482,8 @@ void RouteTree::print(void) const { * RouteTreeNode of the SINK it adds to the routing. */ std::tuple, vtr::optional> RouteTree::update_from_heap(t_heap* hptr, int target_net_pin_index, SpatialRouteTreeLookup* spatial_rt_lookup, bool is_flat) { - auto& device_ctx = g_vpr_ctx.device(); - const auto& rr_graph = device_ctx.rr_graph; + /* Lock the route tree for writing. At least on Linux this shouldn't have an impact on single-threaded code */ + std::unique_lock write_lock(_write_mutex); //Create a new subtree from the target in hptr to existing routing vtr::optional start_of_new_subtree_rt_node, sink_rt_node; @@ -460,19 +493,14 @@ RouteTree::update_from_heap(t_heap* hptr, int target_net_pin_index, SpatialRoute return {vtr::nullopt, *sink_rt_node}; /* Reload timing values */ - reload_timing(start_of_new_subtree_rt_node); + reload_timing_unlocked(start_of_new_subtree_rt_node); if (spatial_rt_lookup) { update_route_tree_spatial_lookup_recur(*start_of_new_subtree_rt_node, *spatial_rt_lookup); } - /* if the new branch is the only child of its parent and the parent is a SOURCE, - * it is the first time we are creating this tree, so include the parent in the new branch return - * so that it can be included in occupancy calculation. - * TODO: probably this should be cleaner */ - RouteTreeNode* parent = start_of_new_subtree_rt_node->_parent; - if (start_of_new_subtree_rt_node->_next_sibling == parent->_subtree_end && rr_graph.node_type(parent->inode) == SOURCE) - return {*parent, *sink_rt_node}; + if (_net_id.is_valid()) /* We don't have this lookup if the tree isn't associated with a net */ + _is_isink_reached[target_net_pin_index] = true; return {*start_of_new_subtree_rt_node, *sink_rt_node}; } @@ -527,7 +555,6 @@ RouteTree::add_subtree_from_heap(t_heap* hptr, int target_net_pin_index, bool is * Walk through new_branch_iswitches and corresponding new_branch_inodes. */ for (int i = new_branch_inodes.size() - 1; i >= 0; i--) { RouteTreeNode* new_node = new RouteTreeNode(new_branch_inodes[i], new_branch_iswitches[i], last_node); - add_node(last_node, new_node); e_rr_type node_type = rr_graph.node_type(new_branch_inodes[i]); // If is_flat is enabled, IPINs should be added, since they are used for intra-cluster routing @@ -540,6 +567,8 @@ RouteTree::add_subtree_from_heap(t_heap* hptr, int target_net_pin_index, bool is new_node->re_expand = true; } + add_node(last_node, new_node); + last_node = new_node; main_branch_visited.insert(new_branch_inodes[i]); @@ -604,6 +633,8 @@ void RouteTree::add_non_configurable_nodes(RouteTreeNode* rt_node, /** Prune a route tree of illegal branches - when there is at least 1 congested node on the path to a sink * Returns nullopt if the entire tree has been pruned. + * Updates "is_isink_reached" lookup! After prune(), if a sink is marked as reached in the lookup, it is reached + * legally. * * Note: does not update R_upstream/C_downstream */ vtr::optional @@ -612,6 +643,8 @@ RouteTree::prune(CBRR& connections_inf, std::vector* non_config_node_set_us const auto& rr_graph = device_ctx.rr_graph; auto& route_ctx = g_vpr_ctx.routing(); + std::unique_lock write_lock(_write_mutex); + VTR_ASSERT_MSG(rr_graph.node_type(root().inode) == SOURCE, "Root of route tree must be SOURCE"); VTR_ASSERT_MSG(_net_id, "RouteTree must be constructed using a ParentNetId"); @@ -675,14 +708,12 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru if (!force_prune) { //Valid path to sink - //Record sink as reachable - connections_inf.reached_rt_sink(_net_id, rt_node.inode); - + //Record sink as reached + _is_isink_reached[rt_node.net_pin_index] = true; return rt_node; // Not pruned } else { //Record as not reached - connections_inf.toreach_rr_sink(_net_id, rt_node.net_pin_index); - + _is_isink_reached[rt_node.net_pin_index] = false; return vtr::nullopt; // Pruned } } else if (all_children_pruned) { @@ -789,6 +820,7 @@ RouteTree::prune_x(RouteTreeNode& rt_node, CBRR& connections_inf, bool force_pru * This is used after routing a clock net. * TODO: is this function doing anything? Try running without it */ void RouteTree::freeze(void) { + std::unique_lock write_lock(_write_mutex); return freeze_x(*_root); } diff --git a/vpr/src/route/route_tree.h b/vpr/src/route/route_tree.h index 9d2200d2696..63eebf555ea 100644 --- a/vpr/src/route/route_tree.h +++ b/vpr/src/route/route_tree.h @@ -83,6 +83,7 @@ #include #include #include +#include #include #include "connection_based_routing_fwd.h" @@ -90,6 +91,8 @@ #include "vtr_assert.h" #include "spatial_route_tree_lookup.h" #include "vtr_optional.h" +#include "vtr_range.h" +#include "vtr_vec_id_set.h" /** * @brief A single route tree node @@ -341,6 +344,7 @@ class RouteTree { RouteTree(ParentNetId inet); ~RouteTree() { + std::unique_lock write_lock(_write_mutex); free_list(_root); } @@ -349,19 +353,34 @@ class RouteTree { * is the heap pointer of the SINK that was reached, and target_net_pin_index * is the net pin index corresponding to the SINK that was reached. This routine * returns a tuple: RouteTreeNode of the branch it adds to the route tree and - * RouteTreeNode of the SINK it adds to the routing. */ + * RouteTreeNode of the SINK it adds to the routing. + * Locking operation: only one thread can update_from_heap() a RouteTree at a time. */ std::tuple, vtr::optional> update_from_heap(t_heap* hptr, int target_net_pin_index, SpatialRouteTreeLookup* spatial_rt_lookup, bool is_flat); /** Reload timing values (R_upstream, C_downstream, Tdel). * Can take a RouteTreeNode& to do an incremental update. - * Note that update_from_heap already does this, but prune() doesn't */ + * Note that update_from_heap already does this, but prune() doesn't. + * Locking operation: only one thread can reload_timing() for a RouteTree at a time. */ void reload_timing(vtr::optional from_node = vtr::nullopt); /** Get the RouteTreeNode corresponding to the RRNodeId. Returns nullopt if not found. - * SINK nodes may be added to the tree multiple times. In that case, this will return the last one added. */ + * SINK nodes may be added to the tree multiple times. In that case, this will return the last one added. + * Use find_by_isink for a more accurate lookup. */ vtr::optional find_by_rr_id(RRNodeId rr_node) const; + /** Get the sink RouteTreeNode associated with the isink. + * Will probably segfault if the tree is not constructed with a ParentNetId. */ + inline vtr::optional find_by_isink(int isink) const { + RouteTreeNode* x = _isink_to_rt_node[isink - 1]; + return x ? vtr::optional(*x) : vtr::nullopt; + } + + /** Get the number of sinks in associated net. */ + constexpr size_t num_sinks(void) const { + return _num_sinks; + } + /** Check the consistency of this route tree. Looks for: * - invalid parent-child links * - invalid timing values @@ -378,12 +397,14 @@ class RouteTree { /** Prune overused nodes from the tree. * Also prune unused non-configurable nodes if non_config_node_set_usage is provided (see get_non_config_node_set_usage) - * Returns nullopt if the entire tree is pruned. */ + * Returns nullopt if the entire tree is pruned. + * Locking operation: only one thread can prune() a RouteTree at a time. */ vtr::optional prune(CBRR& connections_inf, std::vector* non_config_node_set_usage = nullptr); /** Remove all sinks and mark the remaining nodes as un-expandable. * This is used after routing a clock net. - * TODO: is this function doing anything? Try running without it */ + * TODO: is this function doing anything? Try running without it + * Locking operation: only one thread can freeze() a RouteTree at a time. */ void freeze(void); /** Count configurable edges to non-configurable node sets. (rr_nonconf_node_sets index -> int) @@ -400,6 +421,71 @@ class RouteTree { /** Get a reference to the root RouteTreeNode. */ constexpr const RouteTreeNode& root(void) const { return *_root; } /* this file is 90% const and 10% code */ + /** Iterator implementation for remaining or reached isinks. Goes over [1..num_sinks] + * and only returns a value when the sink state is right */ + template + class IsinkIterator { + public: + using iterator_category = std::forward_iterator_tag; + using difference_type = std::ptrdiff_t; + using value_type = int; + using pointer = int*; + using reference = int&; + + constexpr IsinkIterator(const std::vector& bitset, size_t x) + : _bitset(bitset) + , _x(x) { + if (_x < _bitset.size() && _bitset[_x] != sink_state) /* Iterate forward to a valid state */ + ++(*this); + } + constexpr value_type operator*() const { + return _x; + } + inline IsinkIterator& operator++() { + _x++; + for (; _x < _bitset.size() && _bitset[_x] != sink_state; _x++) + ; + return *this; + } + inline IsinkIterator operator++(int) { + IsinkIterator tmp = *this; + ++(*this); + return tmp; + } + constexpr bool operator==(const IsinkIterator& rhs) { return _x == rhs._x; } + constexpr bool operator!=(const IsinkIterator& rhs) { return _x != rhs._x; } + + private: + /** Ref to the bitset */ + const std::vector& _bitset; + /** Current position */ + size_t _x; + }; + + typedef vtr::Range> reached_isink_range; + typedef vtr::Range> remaining_isink_range; + + /** Get a lookup which contains the "isink reached state". + * It's a 1-indexed! bitset of "pin indices". True if the nth sink has been reached, false otherwise. + * If you call it before prune() and after routing, there's no guarantee on whether the reached sinks + * are reached legally. */ + constexpr const std::vector& get_is_isink_reached(void) const { return _is_isink_reached; } + + /** Get reached isinks: 1-indexed pin indices enumerating the sinks in this net. + * "Reached" means "reached legally" if you call this after prune() and not before any routing. + * Otherwise it doesn't guarantee legality. + * Builds and returns a value: use get_is_isink_reached directly if you want speed. */ + constexpr reached_isink_range get_reached_isinks(void) const { + return vtr::make_range(IsinkIterator(_is_isink_reached, 1), IsinkIterator(_is_isink_reached, _num_sinks + 1)); + } + + /** Get remaining (not routed (legally?)) isinks: + * 1-indexed pin indices enumerating the sinks in this net. + * Caveats in get_reached_isinks() apply. */ + constexpr remaining_isink_range get_remaining_isinks(void) const { + return vtr::make_range(IsinkIterator(_is_isink_reached, 1), IsinkIterator(_is_isink_reached, _num_sinks + 1)); + } + private: std::tuple, vtr::optional> add_subtree_from_heap(t_heap* hptr, int target_net_pin_index, bool is_flat); @@ -409,6 +495,7 @@ class RouteTree { std::unordered_set& visited, bool is_flat); + void reload_timing_unlocked(vtr::optional from_node = vtr::nullopt); void load_new_subtree_R_upstream(RouteTreeNode& from_node); float load_new_subtree_C_downstream(RouteTreeNode& from_node); RouteTreeNode& update_unbuffered_ancestors_C_downstream(RouteTreeNode& from_node); @@ -442,7 +529,12 @@ class RouteTree { node->_next_sibling = parent->_next; } parent->_next = node; + + /** Add node to RR to RT lookup */ _rr_node_to_rt_node[node->inode] = node; + /** If node is a SINK (net_pin_index > 0), also add it to sink RT lookup */ + if (node->net_pin_index > 0 && _net_id.is_valid()) + _isink_to_rt_node[node->net_pin_index - 1] = node; /* Now it's a branch */ parent->_is_leaf = false; @@ -526,4 +618,23 @@ class RouteTree { * therefore store the last rt_node created of all the SINK nodes with the same * index "inode". */ std::unordered_map _rr_node_to_rt_node; + + /** RRNodeId is not a unique lookup for sink RouteTreeNodes, but net_pin_index + * is. Store a 0-indexed lookup here for users who need to look up a sink from + * a net_pin_index, ipin, isink, etc. */ + std::vector _isink_to_rt_node; + + /** Is Nth sink in this net reached? + * Bitset of [1..num_sinks]. (1-indexed!) + * We work with these indices, because they are used in a bunch of lookups in + * the router. Looking these back up from sink RR nodes would require looking + * up its RouteTreeNode and then the net_pin_index from that. */ + std::vector _is_isink_reached; + + /** Number of sinks in this tree's net. Useful for iteration. */ + size_t _num_sinks; + + /** Write mutex on this RouteTree. Acquired by the write operations automatically: + * the caller does not need to know about a lock. */ + std::mutex _write_mutex; }; diff --git a/vtr_flow/scripts/python_libs/vtr/__init__.py b/vtr_flow/scripts/python_libs/vtr/__init__.py index 49211fe1456..6a0b38d7639 100644 --- a/vtr_flow/scripts/python_libs/vtr/__init__.py +++ b/vtr_flow/scripts/python_libs/vtr/__init__.py @@ -11,10 +11,12 @@ format_elapsed_time, write_tab_delimitted_csv, load_list_file, + argparse_use_previous, argparse_str2bool, - get_next_run_dir, + get_existing_run_dir, get_latest_run_dir, get_latest_run_number, + get_next_run_dir, verify_file, pretty_print_table, find_task_dir, diff --git a/vtr_flow/scripts/python_libs/vtr/flow.py b/vtr_flow/scripts/python_libs/vtr/flow.py index 0aab0f8f3a3..a1f14e2816e 100644 --- a/vtr_flow/scripts/python_libs/vtr/flow.py +++ b/vtr_flow/scripts/python_libs/vtr/flow.py @@ -56,6 +56,7 @@ def run( relax_w_factor=1.3, check_route=False, check_place=False, + no_second_run=False, ): """ Runs the VTR CAD flow to map the specified circuit_file onto the target architecture_file @@ -130,6 +131,9 @@ def run( check_place: Route existing placement by enabling VPR routing. + + no_second_run: + Don't run VPR again even if it's writing out some intermediate files. """ # @@ -300,6 +304,9 @@ def run( ): do_second_run = True + if no_second_run: + do_second_run = False + vtr.vpr.run( architecture_copy, pre_vpr_netlist, diff --git a/vtr_flow/scripts/python_libs/vtr/task.py b/vtr_flow/scripts/python_libs/vtr/task.py index cd51bd0b403..6bf898a5d22 100644 --- a/vtr_flow/scripts/python_libs/vtr/task.py +++ b/vtr_flow/scripts/python_libs/vtr/task.py @@ -1,20 +1,24 @@ """ Module that contains the task functions """ +import itertools + from pathlib import Path from pathlib import PurePath from shlex import split -import itertools + +from typing import List, Tuple from vtr import ( VtrError, InspectError, load_list_file, load_parse_results, + get_existing_run_dir, + get_latest_run_dir, get_next_run_dir, find_task_dir, load_script_param, - get_latest_run_dir, paths, ) @@ -82,7 +86,7 @@ def __init__( class Job: """ - A class to store the nessesary information for a job that needs to be run. + A class to store the necessary information for a job that needs to be run. """ def __init__( @@ -169,7 +173,7 @@ def qor_parse_command(self): """ return self._qor_parse_command - def work_dir(self, run_dir): + def work_dir(self, run_dir: str) -> str: """ return the work directory of the job """ @@ -179,7 +183,7 @@ def work_dir(self, run_dir): # pylint: enable=too-many-instance-attributes -def load_task_config(config_file): +def load_task_config(config_file) -> TaskConfig: """ Load task config information """ @@ -245,7 +249,7 @@ def load_task_config(config_file): else: # All valid keys should have been collected by now raise VtrError( - "Unrecognzied key '{key}' in config file {file}".format(key=key, file=config_file) + "Unrecognized key '{key}' in config file {file}".format(key=key, file=config_file) ) # We split the script params into a list @@ -351,7 +355,10 @@ def create_second_parse_cmd(config): return second_parse_cmd -def create_cmd(abs_circuit_filepath, abs_arch_filepath, config, args, circuit, noc_traffic): +# pylint: disable=too-many-branches +def create_cmd( + abs_circuit_filepath, abs_arch_filepath, config, args, circuit, noc_traffic +) -> Tuple: """ Create the command to run the task """ # Collect any extra script params from the config file cmd = [abs_circuit_filepath, abs_arch_filepath] @@ -410,6 +417,20 @@ def create_cmd(abs_circuit_filepath, abs_arch_filepath, config, args, circuit, n cmd += ["--fix_clusters", "{}".format(place_constr_file)] + # parse_vtr_task doesn't have these in args, so use getattr here + if getattr(args, "write_rr_graphs", None): + cmd += [ + "--write_rr_graph", + "{}.rr_graph.xml".format(Path(circuit).stem), + ] # Use XML format instead of capnp (see #2352) + + if getattr(args, "write_lookaheads", None): + cmd += ["--write_router_lookahead", "{}.lookahead.bin".format(Path(circuit).stem)] + + if getattr(args, "write_rr_graphs", None) or getattr(args, "write_lookaheads", None): + # Don't trigger a second run, we just want the files + cmd += ["-no_second_run"] + parse_cmd = None qor_parse_command = None if config.parse_file: @@ -446,7 +467,7 @@ def create_cmd(abs_circuit_filepath, abs_arch_filepath, config, args, circuit, n # pylint: disable=too-many-branches -def create_jobs(args, configs, after_run=False): +def create_jobs(args, configs, after_run=False) -> List[Job]: """ Create the jobs to be executed depending on the configs. """ @@ -539,7 +560,7 @@ def create_job( work_dir, run_dir, golden_results, -): +) -> Job: """ Create an individual job with the specified parameters """ @@ -607,6 +628,15 @@ def create_job( current_cmd = cmd.copy() current_cmd += ["-temp_dir", run_dir + "/{}".format(param_string)] + if getattr(args, "use_previous", None): + for prev_run, [extension, option] in args.use_previous: + prev_run_dir = get_existing_run_dir(find_task_dir(config, args.alt_tasks_dir), prev_run) + prev_work_path = Path(prev_run_dir) / work_dir / param_string + prev_file = prev_work_path / "{}.{}".format(Path(circuit).stem, extension) + if not prev_file.exists(): + raise FileNotFoundError("use_previous: file %s not found" % str(prev_file)) + current_cmd += [option, str(prev_file)] + if param_string != "common": current_cmd += param.split(" ") diff --git a/vtr_flow/scripts/python_libs/vtr/util.py b/vtr_flow/scripts/python_libs/vtr/util.py index 6243063c6ea..8eec41661ba 100644 --- a/vtr_flow/scripts/python_libs/vtr/util.py +++ b/vtr_flow/scripts/python_libs/vtr/util.py @@ -1,16 +1,21 @@ """ Module to utilize many of the tools needed for VTR. """ -from pathlib import PurePath -from pathlib import Path + import sys import re import time import subprocess import argparse import csv + from collections import OrderedDict +from pathlib import PurePath +from pathlib import Path +from typing import List, Tuple + from prettytable import PrettyTable + import vtr.error from vtr.error import CommandError from vtr import paths @@ -335,7 +340,7 @@ def relax_w(min_w, relax_factor, base=2): return relaxed_w -def load_list_file(list_file): +def load_list_file(list_file: str) -> List[str]: """ Loads a file containing a single value-per-line, potentially with '#' comments @@ -429,6 +434,39 @@ def format_elapsed_time(time_delta): return "%.2f seconds" % time_delta.total_seconds() +# Files that can be read back by VPR with their conventional extensions +# and the command line option to read them. +REUSABLE_FILES = { + "net": ["net", "--net_file"], + "place": ["place", "--place_file"], + "route": ["route", "--route_file"], + "rr_graph": ["rr_graph.xml", "--read_rr_graph"], + "lookahead": ["lookahead.bin", "--read_router_lookahead"], +} + + +def argparse_use_previous(inp: str) -> List[Tuple[str, List]]: + """ + Parse a -use_previous parameter. Throw if not valid. + Returns a list with (run dir name, [extension, cmdline option]) elements. + """ + tokens = [w.strip() for w in inp.split(",")] + tokens = [w for w in tokens if len(w)] + out = [] + for w in tokens: + r = re.fullmatch(r"(\w+):(\w+)", w) + if not r: + raise argparse.ArgumentTypeError("Invalid input to -use_previous: %s" % w) + if not REUSABLE_FILES.get(r.group(2)): + raise argparse.ArgumentTypeError( + "Unknown file type to use_previous: %s, available types: %s" + % (r.group(2), ",".join(REUSABLE_FILES.keys())) + ) + out.append((r.group(1), REUSABLE_FILES[r.group(2)])) + + return out + + def argparse_str2bool(str_val): """ parses a string boolean to a boolean @@ -481,6 +519,18 @@ def get_latest_run_dir(base_dir): return str(PurePath(base_dir) / run_dir_name(latest_run_number)) +def get_existing_run_dir(base_dir: str, run_dir: str) -> str: + """ + Get an existing run directory (from a previous run). Throw if it doesn't exist + """ + path = Path(base_dir) / run_dir + if not path.exists(): + raise FileNotFoundError( + "Couldn't find previous run directory %s in %s" % (base_dir, run_dir) + ) + return str(path) + + def get_next_run_number(base_dir): """ Returns the next available (i.e. non-existing) run number in base_dir diff --git a/vtr_flow/scripts/python_libs/vtr/vpr/vpr.py b/vtr_flow/scripts/python_libs/vtr/vpr/vpr.py index d0e5953fbe0..003adb9f8cb 100644 --- a/vtr_flow/scripts/python_libs/vtr/vpr/vpr.py +++ b/vtr_flow/scripts/python_libs/vtr/vpr/vpr.py @@ -7,7 +7,7 @@ from vtr import CommandRunner, relax_w, determine_min_w, verify_file, paths from vtr.error import InspectError -# pylint: disable=too-many-arguments +# pylint: disable=too-many-arguments,too-many-locals def run_relax_w( architecture, circuit, @@ -70,13 +70,15 @@ def run_relax_w( vpr_min_w_log = ".".join([logfile_base, "out"]) vpr_relaxed_w_log = ".".join([logfile_base, "crit_path", "out"]) - crit_path_router_iterations = None + crit_path_router_iterations = None if "crit_path_router_iterations" in vpr_args: crit_path_router_iterations = vpr_args["crit_path_router_iterations"] del vpr_args["crit_path_router_iterations"] - if "write_rr_graph" in vpr_args: + write_rr_graph = None + if "write_rr_graph" in vpr_args: # Don't write out rr_graph on the first run + write_rr_graph = vpr_args["write_rr_graph"] del vpr_args["write_rr_graph"] if vpr_exec is None: @@ -105,9 +107,11 @@ def run_relax_w( vpr_args["route"] = True # Re-route only vpr_args["route_chan_width"] = relaxed_w # At a fixed channel width + if write_rr_graph: # Write out rr_graph with known W + vpr_args["write_rr_graph"] = write_rr_graph + # VPR does not support performing routing when fixed pins # are specified, and placement is not run; so remove the option - run( architecture, circuit, diff --git a/vtr_flow/scripts/run_vtr_flow.py b/vtr_flow/scripts/run_vtr_flow.py index 7a03918e80b..118ab030186 100755 --- a/vtr_flow/scripts/run_vtr_flow.py +++ b/vtr_flow/scripts/run_vtr_flow.py @@ -187,7 +187,7 @@ def vtr_command_argparser(prog=None): house_keeping.add_argument( "-temp_dir", default=None, - help="Directory to run the flow in (will be created if non-existant).", + help="Directory to run the flow in (will be created if non-existent).", ) house_keeping.add_argument("-name", default=None, help="Name for this run to be output.") @@ -398,11 +398,17 @@ def vtr_command_argparser(prog=None): action="store_true", help="Tells VPR to verify the routing resource graph.", ) + vpr.add_argument( + "-no_second_run", + default=False, + action="store_true", + help="Don't run VPR a second time to check if it can read intermediate files.", + ) vpr.add_argument( "-rr_graph_ext", default=".xml", type=str, - help="Determines the output rr_graph files' extention.", + help="Determines the output rr_graph files' extension.", ) vpr.add_argument( "-check_route", @@ -575,6 +581,7 @@ def vtr_command_main(arg_list, prog=None): relax_w_factor=args.relax_w_factor, check_route=args.check_route, check_place=args.check_place, + no_second_run=args.no_second_run, ) error_status = "OK" except vtr.VtrError as error: @@ -583,7 +590,7 @@ def vtr_command_main(arg_list, prog=None): ) except KeyboardInterrupt as error: - print("{} recieved keyboard interrupt".format(prog)) + print("{} received keyboard interrupt".format(prog)) exit_status = 4 return_status = exit_status diff --git a/vtr_flow/scripts/run_vtr_task.py b/vtr_flow/scripts/run_vtr_task.py index 51a1d4bf9f4..0d9c5013181 100755 --- a/vtr_flow/scripts/run_vtr_task.py +++ b/vtr_flow/scripts/run_vtr_task.py @@ -3,18 +3,18 @@ """ This module is a wrapper around the scripts/python_libs/vtr, allowing the user to run one or more VTR tasks. """ - -from pathlib import Path -from pathlib import PurePath -import sys -import os import argparse -import textwrap +import os import subprocess -from datetime import datetime +import sys +import textwrap + from contextlib import redirect_stdout -from multiprocessing import Pool, Manager +from datetime import datetime from difflib import SequenceMatcher +from multiprocessing import Pool, Manager +from pathlib import Path +from pathlib import PurePath from run_vtr_flow import vtr_command_main as run_vtr_flow @@ -26,6 +26,7 @@ format_elapsed_time, RawDefaultHelpFormatter, argparse_str2bool, + argparse_use_previous, get_next_run_dir, load_task_config, find_task_config_file, @@ -202,6 +203,34 @@ def vtr_command_argparser(prog=None): help="Print meta-data like command-line arguments and run-time", ) + parser.add_argument( + "-write_rr_graphs", + default=False, + action="store_true", + help="Write out rr_graph files from VPR. These are normally computed on the fly" + "and can become very large. Typically used with -use_previous [...] to save time" + "on later executions for large tasks.", + ) + + parser.add_argument( + "-write_lookaheads", + default=False, + action="store_true", + help="Write out router lookahead files from VPR. These are normally computed on the fly" + "and can become very large. Typically used with -use_previous [...] to save time on" + "later executions for large tasks.", + ) + + parser.add_argument( + "-use_previous", + default=None, + type=argparse_use_previous, + help="Reuse intermediate [file]s from previous [run]s of the tasks. Accepts a comma" + 'separated list of [run]:[file] such as "-use_previous run001:place,run001:net".' + 'Works throughout different config parameters: "common" will reuse "common"\'s files etc.' + "Use with caution and try to validate your results with a clean run.", + ) + parser.add_argument( "-s", nargs=argparse.REMAINDER, @@ -214,7 +243,7 @@ def vtr_command_argparser(prog=None): return parser -def vtr_command_main(arg_list, prog=None): +def vtr_command_main(arg_list, prog=None) -> int: """Run the vtr tasks given and the tasks in the lists given""" # Load the arguments args = vtr_command_argparser(prog).parse_args(arg_list) @@ -266,10 +295,7 @@ def vtr_command_main(arg_list, prog=None): return num_failed -def run_tasks( - args, - configs, -): +def run_tasks(args, configs) -> int: """ Runs the specified set of tasks (configs) """ @@ -278,6 +304,7 @@ def run_tasks( jobs = create_jobs(args, configs) + # Determine the run dir for each config run_dirs = {} for config in configs: task_dir = find_task_dir(config, args.alt_tasks_dir) @@ -324,24 +351,22 @@ def run_tasks( return num_failed -def run_parallel(args, queued_jobs, run_dirs): +def run_parallel(args, queued_jobs, run_dirs: dict) -> int: """ Run each external command in commands with at most args.j commands running in parllel """ - # Determine the run dir for each config # We pop off the jobs of queued_jobs, which python does from the end, # so reverse the list now so we get the expected order. This also ensures # we are working with a copy of the jobs queued_jobs = list(reversed(queued_jobs)) - # Find the max taskname length for pretty printing queued_procs = [] queue = Manager().Queue() for job in queued_jobs: - queued_procs += [(queue, run_dirs, job, args.script)] - # Queue of currently running subprocesses + queued_procs.append((queue, run_dirs, job, args.script)) + # Queue of currently running subprocesses num_failed = 0 with Pool(processes=args.j) as pool: for proc in queued_procs: @@ -451,15 +476,16 @@ def format_human_readable_memory(num_bytes): return "%.2f GiB" % (num_bytes / (1024 ** 3)) -def run_vtr_flow_process(queue, run_dirs, job, script): +def run_vtr_flow_process(queue, run_dirs, job, script) -> None: """ - This is the function that the multiprocessing calls. - It runs the vtr flow and allerts the multiprocessor through a queue if the flow failed. + This is the function called by multiprocessing.Pool. + It runs the VTR flow and alerts the caller through the queue if the flow failed. """ work_dir = job.work_dir(run_dirs[job.task_name()]) Path(work_dir).mkdir(parents=True, exist_ok=True) out = None vtr_flow_out = str(PurePath(work_dir) / "vtr_flow.out") + with open(vtr_flow_out, "w+") as out_file: with redirect_stdout(out_file): if script == "run_vtr_flow.py": diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test2/vtr_bidir/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test2/vtr_bidir/config/golden_results.txt index 5fc8a907e0e..62d595b7939 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test2/vtr_bidir/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test2/vtr_bidir/config/golden_results.txt @@ -1,41 +1,41 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_n4_v7_bidir.xml alu4.blif common 15.83 vpr 66.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 475 14 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67724 14 8 1536 1544 0 1091 497 24 24 576 clb auto 28.7 MiB 0.39 13942 66.1 MiB 1.06 0.02 14.3013 -98.9257 -14.3013 nan 1.70 0.00346327 0.00289139 0.230893 0.199565 26 21853 45 1.452e+07 1.425e+07 -1 -1 7.05 1.16337 0.99243 19779 20 7332 24540 2677471 250087 17.8805 nan -127.439 -17.8805 0 0 -1 -1 0.78 0.88 0.204904 0.181261 - k4_n4_v7_bidir.xml apex2.blif common 23.15 vpr 69.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 600 38 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 71472 38 3 1916 1919 0 1509 641 27 27 729 clb auto 32.1 MiB 0.52 19853 69.8 MiB 1.65 0.02 14.54 -43.2406 -14.54 nan 2.20 0.00452267 0.00387307 0.346312 0.296325 30 32859 39 1.875e+07 1.8e+07 -1 -1 11.69 1.49844 1.27385 27714 21 10259 34268 3089635 267226 17.6599 nan -51.7945 -17.6599 0 0 -1 -1 1.03 1.08 0.279537 0.246762 - k4_n4_v7_bidir.xml apex4.blif common 21.42 vpr 64.47 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 408 9 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66020 9 19 1271 1290 0 990 436 23 23 529 clb auto 26.7 MiB 0.29 13674 64.5 MiB 0.81 0.01 13.5441 -217.965 -13.5441 nan 1.38 0.00269035 0.00225276 0.175909 0.150396 31 22546 42 1.323e+07 1.224e+07 -1 -1 14.16 1.31427 1.12111 20061 23 8457 31679 3326721 275480 17.9807 nan -271.917 -17.9807 0 0 -1 -1 0.65 0.93 0.197944 0.174647 - k4_n4_v7_bidir.xml bigkey.blif common 22.30 vpr 69.82 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 456 229 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 71500 229 197 2152 2349 1 1587 882 29 29 841 io auto 32.2 MiB 0.38 12538 69.8 MiB 2.49 0.03 7.21536 -1752.91 -7.21536 7.21536 2.67 0.00525031 0.00457969 0.500691 0.435747 18 19948 37 2.187e+07 1.368e+07 -1 -1 9.75 2.11662 1.84808 18176 20 8122 22577 1592601 166640 11.2146 11.2146 -2409.11 -11.2146 0 0 -1 -1 0.74 0.79 0.30778 0.275313 - k4_n4_v7_bidir.xml clma.blif common 234.10 vpr 170.72 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2523 62 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 174816 62 82 8460 8542 1 6360 2667 53 53 2809 clb auto 89.6 MiB 2.25 105968 164.4 MiB 23.34 0.23 27.4331 -1322.53 -27.4331 27.4331 12.24 0.0308254 0.0236989 3.06851 2.37813 40 140123 34 7.803e+07 7.569e+07 -1 -1 158.96 15.1702 12.2176 136089 20 39117 140993 15651359 1264440 31.7989 31.7989 -1630.05 -31.7989 0 0 -1 -1 6.26 5.77 1.57688 1.33296 - k4_n4_v7_bidir.xml des.blif common 25.14 vpr 68.68 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 449 256 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 70328 256 245 1847 2092 0 1443 950 34 34 1156 io auto 31.1 MiB 0.48 16009 68.7 MiB 2.09 0.03 13.677 -2250.92 -13.677 nan 3.82 0.0051129 0.00449245 0.434618 0.385361 19 27159 49 3.072e+07 1.347e+07 -1 -1 9.27 1.90217 1.68731 21902 21 9383 31021 2553814 254641 15.7393 nan -2823.9 -15.7393 0 0 -1 -1 1.11 0.95 0.323954 0.294406 - k4_n4_v7_bidir.xml diffeq.blif common 21.50 vpr 67.31 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 416 64 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 68928 64 39 1935 1974 1 1104 519 23 23 529 clb auto 29.8 MiB 0.39 10529 67.3 MiB 1.08 0.02 10.9681 -2557.3 -10.9681 10.9681 1.49 0.00322534 0.00270723 0.257513 0.218299 24 15464 30 1.323e+07 1.248e+07 -1 -1 13.73 1.90384 1.62521 14273 18 6345 20912 1422376 142071 14.1668 14.1668 -3260.29 -14.1668 0 0 -1 -1 0.56 0.59 0.222919 0.198972 - k4_n4_v7_bidir.xml dsip.blif common 26.28 vpr 66.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 390 229 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 68576 229 197 1815 2012 1 1190 816 29 29 841 io auto 29.4 MiB 0.40 11690 67.0 MiB 2.12 0.03 6.8611 -1690.21 -6.8611 6.8611 2.68 0.0050109 0.00437603 0.481771 0.424062 20 16981 31 2.187e+07 1.17e+07 -1 -1 14.15 2.78838 2.46208 16401 19 6939 22609 1711858 173518 9.00042 9.00042 -2323.87 -9.00042 0 0 -1 -1 0.81 0.72 0.25883 0.232274 - k4_n4_v7_bidir.xml elliptic.blif common 58.71 vpr 87.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 996 131 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 89208 131 114 4855 4969 1 2150 1241 34 34 1156 clb auto 50.3 MiB 0.91 31537 87.1 MiB 5.07 0.05 20.2775 -11159.4 -20.2775 20.2775 3.77 0.0114839 0.0102157 1.16151 0.969182 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2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64776 8 63 1072 1135 0 907 417 21 21 441 clb auto 25.2 MiB 0.25 11674 63.3 MiB 0.74 0.01 12.156 -529.016 -12.156 nan 1.17 0.0025199 0.00210768 0.164226 0.139948 31 18183 40 1.083e+07 1.038e+07 -1 -1 10.14 1.23969 1.06525 16242 20 7802 27295 2670855 235779 14.2294 nan -670.483 -14.2294 0 0 -1 -1 0.53 0.78 0.167255 0.149409 - k4_n4_v7_bidir.xml frisc.blif common 74.25 vpr 86.33 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1046 20 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 88404 20 116 4445 4561 1 2328 1182 35 35 1225 clb auto 49.6 MiB 1.04 38690 86.3 MiB 4.69 0.06 22.1068 -12381.1 -22.1068 22.1068 4.05 0.0107939 0.00892273 0.93884 0.780659 35 56138 31 3.267e+07 3.138e+07 -1 -1 47.76 4.85605 4.05266 58253 32 18022 79336 18040863 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0.00288372 0.00243945 0.194225 0.167496 20 9811 38 8.67e+06 8.37e+06 -1 -1 5.60 0.967693 0.839724 9832 34 5019 17191 1401826 152941 15.872 15.872 -3145.51 -15.872 0 0 -1 -1 0.28 0.62 0.262287 0.231798 - k4_n4_v7_l1_bidir.xml alu4.blif common 37.81 vpr 66.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 475 14 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 68092 14 8 1536 1544 0 1091 497 24 24 576 clb auto 29.0 MiB 0.39 14339 66.5 MiB 1.13 0.02 17.4108 -123.292 -17.4108 nan 2.44 0.00352533 0.00293658 0.249406 0.214591 22 16731 48 1.452e+07 1.425e+07 -1 -1 26.46 1.39196 1.18814 14531 19 6900 26169 1924215 354074 19.2344 nan -137.937 -19.2344 0 0 -1 -1 0.87 0.96 0.219553 0.195464 - k4_n4_v7_l1_bidir.xml apex2.blif common 41.77 vpr 69.95 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 600 38 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 234636 62 82 8460 8542 1 6360 2667 53 53 2809 clb auto 89.8 MiB 2.14 106192 215.1 MiB 23.01 0.21 36.3251 -1893.34 -36.3251 36.3251 15.65 0.0276743 0.0214768 2.97814 2.30531 34 109946 49 7.803e+07 7.569e+07 -1 -1 295.03 16.6517 13.4013 101036 15 38135 142858 14510650 2201358 39.0889 39.0889 -2125.06 -39.0889 0 0 -1 -1 8.27 6.42 1.30671 1.11208 - k4_n4_v7_l1_bidir.xml des.blif common 52.49 vpr 83.02 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 449 256 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 85008 256 245 1847 2092 0 1443 950 34 34 1156 io auto 31.1 MiB 0.46 16206 83.0 MiB 2.34 0.03 15.8963 -2848.43 -15.8963 nan 5.85 0.00569889 0.00499205 0.513718 0.455215 14 16731 44 3.072e+07 1.347e+07 -1 -1 29.52 2.13288 1.89721 15602 15 8732 27561 2020539 334580 17.3373 nan -3126.27 -17.3373 0 0 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2012 1 1190 816 29 29 841 io auto 29.7 MiB 0.35 11604 67.4 MiB 2.08 0.04 9.42411 -2261.74 -9.42411 9.42411 3.68 0.00445062 0.00392448 0.468754 0.413106 12 11955 41 2.187e+07 1.17e+07 -1 -1 59.34 2.17216 1.91547 10643 15 6086 20204 1075921 204685 9.94517 9.94517 -2532.48 -9.94517 0 0 -1 -1 0.70 0.61 0.208662 0.188192 - k4_n4_v7_l1_bidir.xml elliptic.blif common 291.45 vpr 96.19 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 996 131 -1 -1 success 897b3a8-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-01-31T03:36:34 gh-actions-runner-vtr-auto-spawned5 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 98500 131 114 4855 4969 1 2150 1241 34 34 1156 clb auto 50.1 MiB 0.87 32010 95.5 MiB 4.71 0.05 24.9388 -14312.7 -24.9388 24.9388 5.41 0.0112566 0.00932201 1.06129 0.881633 24 35036 37 3.072e+07 2.988e+07 -1 -1 263.09 5.95933 4.95944 31073 16 11649 51210 5097989 770491 26.1994 26.1994 -16217.8 -26.1994 0 0 -1 -1 2.02 2.28 0.598875 0.520244 - k4_n4_v7_l1_bidir.xml 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0.43 0.07 -1 -1 0.26 0.149867 0.133188 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop_flat_router/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop_flat_router/config/golden_results.txt index d6944eeddb2..bb91c583e96 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop_flat_router/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop_flat_router/config/golden_results.txt @@ -1,6 +1,6 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops 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621344 14 118.10 -1 -1 123276 -1 -1 2287 257 0 11 success 8528925-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-05-29T15:37:32 gh-actions-runner-vtr-auto-spawned40 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 920252 257 32 35747 33389 1 18576 2587 58 58 3364 clb auto 366.7 MiB 66.13 238606 672.7 MiB 114.11 0.89 17.1228 -22971.9 -17.1228 17.1228 66.43 0.122725 0.105945 15.0557 11.8391 78 394768 147 2.00088e+08 1.27615e+08 1.92320e+07 5717.01 1361.68 122.113 97.7861 1114397 11021065 660432 349453 53 168974 802689 141308298 36713877 45717834 6972091 95590464 29741786 0 0 792797 514828 747302 747302 910805 802689 2332383 1256218 40556637 4114854 1173010 341749 3457595 1539720 44978029 13690833 0 0 46359740 13705684 0 0 792797 0 1048626 1953882 3472000 3402169 10847209 13973 508 19.5428 19.5428 -25846 -19.5428 0 0 2.52407e+07 7305.90 14.24 130.51 4.88 34.68 0.19 14.24 14.3145 11.5453 -k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml LU8PEEng.v common 3071.55 vpr 833.25 MiB -1 -1 71.48 455940 98 132.11 -1 -1 115232 -1 -1 1800 114 45 8 success 8528925-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-05-29T15:37:32 gh-actions-runner-vtr-auto-spawned40 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 853252 114 102 35713 31804 1 16705 2069 51 51 2601 clb auto 339.9 MiB 62.95 216212 561.5 MiB 92.18 0.71 65.1279 -53179 -65.1279 65.1279 49.18 0.120059 0.101817 14.974 11.8502 96 359574 127 1.52527e+08 1.2484e+08 1.77902e+07 6839.76 2509.64 176.104 141.33 1051316 9491173 587229 299163 55 145183 626548 203387007 66494555 41102351 7195584 162284656 59298971 0 0 557595 348397 529205 529205 686930 626548 3869612 1660071 37419060 5169165 813788 245793 2438766 1051474 77969311 28517504 0 0 79102740 28346398 0 0 557595 0 1827926 1276985 1909761 1891717 6237045 74462 22447 75.1357 75.1357 -67113 -75.1357 -0.0967573 -0.0199062 2.21294e+07 8508.02 8.37 98.67 2.89 16.30 0.13 8.37 6.86691 5.51408 -k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision0.v common 491.17 vpr 361.63 MiB -1 -1 13.25 101972 5 13.80 -1 -1 69408 -1 -1 673 169 0 0 success 8528925-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-05-29T15:37:32 gh-actions-runner-vtr-auto-spawned40 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 370312 169 197 23321 21461 1 6785 1039 33 33 1089 clb auto 180.8 MiB 12.19 42112 221.0 MiB 12.30 0.12 3.10868 -13056.7 -3.10868 3.10868 5.95 0.0421986 0.0328892 4.76161 3.85299 58 63990 244 6.0475e+07 3.62708e+07 4.62388e+06 4245.99 385.70 79.3922 66.3623 452845 3145025 280765 57244 49 46719 122488 12901034 3413607 6417997 1071484 6483037 2342123 0 0 99450 91334 71450 71450 127765 122488 173471 117401 5739165 636855 123351 34238 451617 220807 2978920 1062567 0 0 3135845 1056467 0 0 99450 0 417639 158865 157759 165849 512493 25863 4191 3.58485 3.58485 -15007.4 -3.58485 0 0 5.85783e+06 5379.09 3.06 25.65 1.05 12.08 0.19 3.06 4.27202 3.58561 -k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision1.v common 1731.31 vpr 388.00 MiB -1 -1 10.47 123456 3 17.68 -1 -1 77352 -1 -1 655 115 0 40 success 8528925-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-05-29T15:37:32 gh-actions-runner-vtr-auto-spawned40 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 397312 115 145 22868 19305 1 9712 955 40 40 1600 mult_36 auto 177.4 MiB 9.52 82272 238.0 MiB 13.23 0.12 5.15059 -21406.4 -5.15059 5.15059 8.56 0.0361559 0.0312351 4.65663 3.86719 76 154775 184 9.16046e+07 5.11412e+07 8.72311e+06 5451.94 1612.65 90.8987 76.51 519336 3912846 269202 122007 30 61007 155688 38640235 6222360 6668491 918705 31971744 5303655 0 0 115015 107081 104788 104788 162701 155688 2093369 113670 5939763 436808 143497 55137 451012 219128 14854225 2513893 0 0 14775865 2516167 0 0 115015 0 643171 157906 453642 427511 882511 43939 8570 5.48939 5.48939 -24883.8 -5.48939 0 0 1.18598e+07 6887.37 5.55 30.87 1.96 11.01 0.18 5.55 3.14734 2.6417 -k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision2.v common 5871.63 vpr 1.05 GiB -1 -1 14.96 197124 3 8.63 -1 -1 155544 -1 -1 1490 149 0 179 success 8528925-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-05-29T15:37:32 gh-actions-runner-vtr-auto-spawned40 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 1100488 149 182 55416 37075 1 28670 2000 80 80 6400 mult_36 auto 360.6 MiB 29.07 291939 1074.7 MiB 79.70 0.55 12.5458 -48952.6 -12.5458 12.5458 135.77 0.108801 0.0950539 15.7001 12.8522 78 437698 224 3.90281e+08 1.51186e+08 3.79986e+07 5881.04 5479.15 81.5782 67.7414 1647473 12742193 618027 380228 28 138212 241867 64603805 10299476 9587932 1487408 55015873 8812068 0 0 208298 193889 166401 166401 247323 241867 3307020 170969 8438805 627104 233900 115896 693506 424548 25609640 4121299 0 0 25698912 4237503 0 0 208298 0 605901 210574 379701 368344 1028019 35661 9945 13.929 13.929 -56870.7 -13.929 0 0 4.76105e+07 7382.88 19.01 37.94 5.93 15.28 0.13 19.01 3.18631 2.64796 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml bgm.v common 1949.57 vpr 990.71 MiB -1 -1 50.15 621072 14 99.69 -1 -1 122864 -1 -1 2287 257 0 11 success 55c2e27-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-08-14T19:59:46 gh-actions-runner-vtr-auto-spawned44 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 1014488 257 32 35747 33389 1 18576 2587 58 58 3364 clb auto 367.8 MiB 49.23 238606 675.6 MiB 99.64 0.75 17.1228 -22971.9 -17.1228 17.1228 57.11 0.119025 0.107831 14.3708 12.0287 80 386942 147 2.00088e+08 1.27615e+08 2.55641e+07 7599.31 1408.13 208.49 171.921 1117761 11099171 660432 342443 53 167505 790267 138861012 37280309 45235241 6956044 93625771 30324265 0 0 780707 505938 732377 732377 896045 790267 2229510 1230476 40161721 4162132 1153740 331993 3396768 1497707 44121031 13984181 0 0 45389113 14045238 0 0 780707 0 1040996 1924168 3330711 3269807 10529459 13619 644 19.5517 19.5517 -25791.2 -19.5517 0 0 3.23730e+07 9623.36 12.91 116.72 4.28 26.08 0.17 12.91 13.5489 11.1323 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml LU8PEEng.v common 2632.75 vpr 902.39 MiB -1 -1 63.75 456032 98 112.40 -1 -1 115200 -1 -1 1800 114 45 8 success 55c2e27-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-08-14T19:59:46 gh-actions-runner-vtr-auto-spawned44 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 924048 114 102 35713 31804 1 16705 2069 51 51 2601 clb auto 341.1 MiB 46.35 216212 564.8 MiB 77.84 0.61 65.1279 -53179 -65.1279 65.1279 41.35 0.0919253 0.0798848 13.1066 11.0242 92 366424 199 1.52527e+08 1.2484e+08 2.23327e+07 8586.18 2159.64 106.951 86.8929 1046116 9369805 587229 297825 51 119193 529288 187167793 60416452 36019602 6388156 151148191 54028296 0 0 462068 262943 455608 455608 590472 529288 3425542 1460528 32931709 4746921 669785 192271 2035353 849004 72703611 26059047 0 0 73893645 25860842 0 0 462068 0 1676090 1068906 1746272 1715401 5449650 72797 21999 75.3335 75.3335 -66828.2 -75.3335 -0.584019 -0.0210131 2.84548e+07 10940.0 7.36 83.62 2.26 11.21 0.11 7.36 6.06269 4.82642 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision0.v common 283.73 vpr 392.11 MiB -1 -1 10.78 102076 5 11.41 -1 -1 69052 -1 -1 673 169 0 0 success 55c2e27-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-08-14T19:59:46 gh-actions-runner-vtr-auto-spawned44 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 401520 169 197 23321 21461 1 6785 1039 33 33 1089 clb auto 181.9 MiB 9.01 42112 242.0 MiB 10.27 0.10 3.10868 -13056.7 -3.10868 3.10868 4.94 0.0349474 0.0283969 3.80755 3.12721 56 67561 122 6.0475e+07 3.62708e+07 5.74716e+06 5277.47 200.29 41.3015 33.8499 450669 3098400 280765 58818 48 48056 123886 12722619 3198612 6403239 1066137 6319380 2132475 0 0 101707 94104 72144 72144 129292 123886 172012 107677 5708727 619500 127073 37688 463513 228647 2942661 962537 0 0 3005490 952429 0 0 101707 0 410238 163410 171121 169876 535147 24900 3262 3.58153 3.58153 -15246.6 -3.58153 0 0 7.31643e+06 6718.49 2.54 17.98 0.83 7.92 0.15 2.54 2.61894 2.14807 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision1.v common 1270.39 vpr 408.98 MiB -1 -1 9.93 123264 3 17.37 -1 -1 76916 -1 -1 655 115 0 40 success 55c2e27-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-08-14T19:59:46 gh-actions-runner-vtr-auto-spawned44 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 418792 115 145 22868 19305 1 9712 955 40 40 1600 mult_36 auto 178.3 MiB 8.01 82272 238.9 MiB 13.62 0.12 5.15059 -21406.4 -5.15059 5.15059 7.93 0.038643 0.0348079 4.98425 4.28022 76 156046 152 9.16046e+07 5.11412e+07 1.13224e+07 7076.52 1165.69 44.1282 36.8787 519336 3912846 269202 121805 23 60770 153906 36841266 5753488 6647072 905000 30194194 4848488 0 0 112979 104980 103434 103434 161203 153906 2026836 112210 5928687 430438 139538 54153 444203 215676 14009705 2291713 0 0 13914681 2286978 0 0 112979 0 639760 152004 429721 407753 821145 44544 8043 5.50488 5.50488 -25672.5 -5.50488 0 0 1.42154e+07 8884.65 4.94 22.27 1.75 7.91 0.15 4.94 1.46066 1.2121 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision2.v common 4904.93 vpr 1.08 GiB -1 -1 12.12 197324 3 7.26 -1 -1 155148 -1 -1 1490 149 0 179 success 55c2e27-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-08-14T19:59:46 gh-actions-runner-vtr-auto-spawned44 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 1137480 149 182 55416 37075 1 28670 2000 80 80 6400 mult_36 auto 361.5 MiB 22.38 291906 1080.0 MiB 72.56 0.56 12.5458 -48886.4 -12.5458 12.5458 119.83 0.106692 0.0933508 13.4628 11.5031 78 447800 230 3.90281e+08 1.51186e+08 4.81089e+07 7517.02 4519.15 84.1092 69.7736 1647473 12742193 618027 380030 24 136537 235998 65355519 10717370 9436646 1471004 55918873 9246366 0 0 204209 190100 162509 162509 241165 235998 3278790 169946 8312600 626282 228010 114098 678672 418624 26038560 4347361 0 0 26211004 4452452 0 0 204209 0 583219 203364 361375 355684 998388 33892 9670 13.9298 13.9298 -57390.1 -13.9298 0 0 6.11255e+07 9550.86 25.86 59.65 7.84 25.31 0.15 25.86 5.36109 4.49844 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/config.txt index 7bb68bed48e..1ccd16490d7 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/config.txt @@ -35,4 +35,6 @@ qor_parse_file=qor_standard.txt pass_requirements_file=pass_requirements.txt #Script parameters -script_params=-track_memory_usage +script_params_common=-track_memory_usage +script_params_list_add = +script_params_list_add = --router_algorithm parallel diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/golden_results.txt index 749f23089f4..8c6c0b532f1 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios/config/golden_results.txt @@ -1,2 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 6.55 vpr 74.02 MiB -1 -1 0.18 21664 1 0.04 -1 -1 35456 -1 -1 12 130 0 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75792 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.5 MiB 0.12 1674 74.0 MiB 0.12 0.00 5.12303 -567.54 -5.12303 5.12303 0.49 0.000709907 0.000632382 0.0521422 0.0466692 82 3380 8 4.93594e+06 1.0962e+06 1.24853e+06 6370.04 3.85 0.328078 0.303484 3282 8 751 823 207761 68347 4.57723 4.57723 -668.524 -4.57723 0 0 1.53695e+06 7841.58 0.29 0.05 0.025136 0.0240614 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 6.19 vpr 74.24 MiB -1 -1 0.16 18044 1 0.09 -1 -1 32460 -1 -1 12 130 0 -1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 76020 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.4 MiB 0.10 1734 74.2 MiB 0.13 0.00 5.12303 -543.21 -5.12303 5.12303 0.45 0.000787704 0.000733664 0.0618895 0.0577764 82 3564 25 4.93594e+06 1.0962e+06 1.24853e+06 6370.04 3.47 0.374217 0.341793 33448 252102 -1 3384 9 709 754 192289 63961 0 0 192289 63961 754 713 0 0 18466 17836 0 0 19719 19117 0 0 755 715 0 0 69265 12759 0 0 83330 12821 0 0 754 0 0 45 152 212 1613 0 0 4.57723 4.57723 -644.847 -4.57723 0 0 1.53695e+06 7841.58 0.26 0.05 0.23 -1 -1 0.26 0.0256266 0.0242 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common_--router_algorithm_parallel 4.88 vpr 74.18 MiB -1 -1 0.16 18028 1 0.09 -1 -1 32508 -1 -1 12 130 0 -1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 75956 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.4 MiB 0.10 1734 74.2 MiB 0.13 0.00 5.12303 -543.21 -5.12303 5.12303 0.45 0.000821246 0.000766795 0.0629599 0.0588552 82 3617 17 4.93594e+06 1.0962e+06 1.24853e+06 6370.04 2.14 0.308433 0.2822 33448 252102 -1 3414 14 731 776 220618 73159 0 0 220618 73159 776 735 0 0 20611 19950 0 0 21899 21238 0 0 777 738 0 0 80287 15212 0 0 96268 15286 0 0 776 0 0 45 151 219 1641 0 0 4.57723 4.57723 -637.466 -4.57723 0 0 1.53695e+06 7841.58 0.26 0.06 0.23 -1 -1 0.26 0.0330502 0.0309507 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/config.txt index caed2da9784..4e4071f98c2 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/config.txt @@ -24,5 +24,6 @@ qor_parse_file=qor_standard.txt # Pass requirements pass_requirements_file=pass_requirements.txt -script_params=-track_memory_usage --route_chan_width 100 --max_router_iterations 100 --router_lookahead map --flat_routing true - +script_params_common=-track_memory_usage --route_chan_width 100 --max_router_iterations 100 --router_lookahead map --flat_routing true +script_params_list_add = +script_params_list_add = --router_algorithm parallel --num_workers 4 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt index 6a885701bc1..67f180f6b08 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt @@ -1,2 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 12.82 vpr 76.19 MiB -1 -1 3.42 34124 16 0.76 -1 -1 37916 -1 -1 61 45 3 1 success 8528925 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2023-05-29T15:34:55 gh-actions-runner-vtr-auto-spawned83 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 78016 45 32 1188 1147 1 781 142 14 14 196 memory auto 39.1 MiB 3.14 6687 76.2 MiB 0.85 0.01 9.87688 -6144.34 -9.87688 9.87688 0.04 0.00303074 0.00250348 0.260087 0.214733 -1 10707 13 9.20055e+06 5.32753e+06 1.21359e+06 5900 2.66 0.354898 0.295042 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 6.77 vpr 75.04 MiB -1 -1 1.37 31788 16 1.37 -1 -1 35456 -1 -1 61 45 3 1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 76840 45 32 1188 1147 1 781 142 14 14 196 memory auto 38.0 MiB 1.38 6687 75.0 MiB 0.32 0.00 9.87688 -6144.34 -9.87688 9.87688 0.02 0.00160353 0.00140955 0.146887 0.130179 -1 10701 12 9.20055e+06 5.32753e+06 1.47691e+06 7535.23 1.15 0.187274 0.164699 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common_--router_algorithm_parallel_--num_workers_4 6.97 vpr 74.97 MiB -1 -1 1.39 31556 16 1.40 -1 -1 35520 -1 -1 61 45 3 1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 76772 45 32 1188 1147 1 781 142 14 14 196 memory auto 37.9 MiB 1.39 6687 75.0 MiB 0.40 0.00 9.87688 -6144.34 -9.87688 9.87688 0.02 0.00245521 0.00214283 0.217122 0.186066 -1 10603 14 9.20055e+06 5.32753e+06 1.47691e+06 7535.23 1.21 0.280862 0.238432 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/config.txt index 0c49b4e3405..dbceb44a4dc 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/config.txt @@ -24,5 +24,6 @@ qor_parse_file=qor_multiclock.txt # Pass requirements pass_requirements_file=pass_requirements_multiclock.txt -script_params=-starting_stage vpr -sdc_file tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/multiclock.sdc - +script_params_common=-starting_stage vpr -sdc_file tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/multiclock.sdc +script_params_list_add = +script_params_list_add = --router_algorithm parallel --num_workers 4 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/golden_results.txt index a939a6842c7..ff260f23dac 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_multiclock/config/golden_results.txt @@ -1,2 +1,3 @@ arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack k6_frac_N10_mem32K_40nm.xml multiclock.blif common 1.31564 0.595 0.841581 -1 -1 0.57 0.814813 -1 1.31564 -1 1.07053 -1 1.76203 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.243 1.71958 -1 -1 0.268 3.24281 -1 1.16427 -1 3.30853 -1 -1.48434 -1 -1 -1 -1 +k6_frac_N10_mem32K_40nm.xml multiclock.blif common_--router_algorithm_parallel_--num_workers_4 1.31564 0.595 0.841581 -1 -1 0.57 0.814813 -1 1.31564 -1 1.07053 -1 1.76203 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.243 1.71958 -1 -1 0.268 3.24281 -1 1.16427 -1 3.30853 -1 -1.48434 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/config.txt index 401c36ecd01..dac263af64c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/config.txt @@ -24,5 +24,6 @@ qor_parse_file=qor_standard.txt pass_requirements_file=pass_requirements.txt # Script parameters -#script_params="" -script_params = -track_memory_usage +script_params_common = -track_memory_usage +script_params_list_add = +script_params_list_add = --router_algorithm parallel --num_workers 4 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt index 0ec96460c6e..a5312f38fc9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt @@ -1,2 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 2.81 vpr 64.00 MiB -1 -1 0.21 21792 3 0.07 -1 -1 36304 -1 -1 68 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 65540 99 130 343 473 1 225 298 12 12 144 clb auto 25.9 MiB 0.13 574 64.0 MiB 0.16 0.00 1.63028 -109.727 -1.63028 1.63028 0.24 0.000401182 0.000358398 0.0349089 0.0312228 40 1376 20 5.66058e+06 4.21279e+06 333335. 2314.82 1.17 0.219159 0.200557 1211 9 370 555 25048 7436 1.97803 1.97803 -136.611 -1.97803 -1.34293 -0.298787 419432. 2912.72 0.10 0.02 0.0138875 0.0131731 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 2.72 vpr 63.91 MiB -1 -1 0.18 18244 3 0.15 -1 -1 33476 -1 -1 68 99 1 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 65444 99 130 343 473 1 225 298 12 12 144 clb auto 25.5 MiB 0.10 599 63.9 MiB 0.15 0.00 1.62851 -108.153 -1.62851 1.62851 0.22 0.0005716 0.000537284 0.0435 0.0407889 36 1445 27 5.66058e+06 4.21279e+06 305235. 2119.69 0.98 0.22339 0.203215 12238 58442 -1 1263 12 429 686 37045 11418 0 0 37045 11418 686 536 0 0 1992 1802 0 0 2359 1992 0 0 742 603 0 0 15126 3546 0 0 16140 2939 0 0 686 0 0 257 388 336 2661 0 0 1.99752 1.99752 -139.829 -1.99752 -0.305022 -0.0771249 378970. 2631.74 0.08 0.03 0.04 -1 -1 0.08 0.0189281 0.0175612 +k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_--router_algorithm_parallel_--num_workers_4 2.26 vpr 64.16 MiB -1 -1 0.19 18428 3 0.15 -1 -1 33484 -1 -1 68 99 1 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 65700 99 130 343 473 1 225 298 12 12 144 clb auto 25.6 MiB 0.10 599 64.2 MiB 0.15 0.00 1.62851 -108.153 -1.62851 1.62851 0.22 0.000550016 0.000510375 0.0416236 0.0381932 36 1454 19 5.66058e+06 4.21279e+06 305235. 2119.69 0.52 0.126906 0.113733 12238 58442 -1 1272 12 419 668 36954 11455 0 0 36954 11455 668 526 0 0 2004 1826 0 0 2365 2004 0 0 724 593 0 0 15013 3573 0 0 16180 2933 0 0 668 0 0 249 384 322 2589 0 0 1.99231 1.99231 -140.914 -1.99231 -0.305022 -0.0771249 378970. 2631.74 0.08 0.03 0.04 -1 -1 0.08 0.0174112 0.0155977 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/config.txt index 3c7366d98fe..17b20f60f24 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/config.txt @@ -29,3 +29,5 @@ script_params_list_add = --timing_update_type auto script_params_list_add = --timing_update_type full script_params_list_add = --timing_update_type incremental script_params_list_add = --timing_update_type incremental --quench_recompute_divider 999999999 #Do post-move incremental STA during quench +script_params_list_add = --timing_update_type incremental --router_algorithm parallel --num_workers 4 # rarely exercised code path +script_params_list_add = --timing_update_type full --router_algorithm parallel --num_workers 4 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt index e3f3510b5ec..37fb4f22f53 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt @@ -1,5 +1,7 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_auto 1.16 vpr 62.23 MiB -1 -1 0.49 25724 5 0.12 -1 -1 35796 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63728 10 2 181 183 1 40 24 6 6 36 clb auto 23.6 MiB 0.03 152 62.2 MiB 0.01 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 0.000148273 0.000125883 0.00293958 0.00254045 -1 137 15 646728 646728 138825. 3856.24 0.01 0.00984083 0.00873552 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full 1.15 vpr 62.10 MiB -1 -1 0.42 25388 5 0.14 -1 -1 35504 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63592 10 2 181 183 1 40 24 6 6 36 clb auto 23.5 MiB 0.04 152 62.1 MiB 0.01 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 0.000124802 9.9759e-05 0.00754593 0.00711966 -1 137 15 646728 646728 138825. 3856.24 0.01 0.0162485 0.0150465 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental 1.13 vpr 62.04 MiB -1 -1 0.42 25392 5 0.13 -1 -1 35796 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63528 10 2 181 183 1 40 24 6 6 36 clb auto 23.4 MiB 0.04 152 62.0 MiB 0.01 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 1.3455e-05 9.755e-06 0.00205916 0.00187256 -1 137 15 646728 646728 138825. 3856.24 0.01 0.00865869 0.00791492 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--quench_recompute_divider_999999999 1.08 vpr 61.99 MiB -1 -1 0.42 25488 5 0.12 -1 -1 35964 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63480 10 2 181 183 1 40 24 6 6 36 clb auto 23.5 MiB 0.03 152 62.0 MiB 0.01 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 9.8431e-05 2.9719e-05 0.00312475 0.00288136 -1 137 15 646728 646728 138825. 3856.24 0.01 0.00941001 0.0086255 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_auto 1.43 vpr 61.82 MiB -1 -1 0.34 22744 5 0.31 -1 -1 33812 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63308 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.8 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.00021372 0.000192501 0.00180931 0.00171502 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0128896 0.0113993 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full 1.39 vpr 61.79 MiB -1 -1 0.34 22548 5 0.32 -1 -1 33868 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63276 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.8 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.000213827 0.000192479 0.00182632 0.00173178 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0128195 0.0112985 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental 1.37 vpr 61.70 MiB -1 -1 0.32 22740 5 0.30 -1 -1 33952 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63184 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.7 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 6.0326e-05 4.8099e-05 0.00129504 0.00122282 -1 163 21 646728 646728 138825. 3856.24 0.01 0.00725272 0.00528838 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--quench_recompute_divider_999999999 1.44 vpr 61.68 MiB -1 -1 0.34 22584 5 0.34 -1 -1 33880 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63156 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.7 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.000173798 8.9569e-05 0.00138827 0.00124749 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0112762 0.00755481 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--router_algorithm_parallel_--num_workers_4 1.40 vpr 61.78 MiB -1 -1 0.33 22868 5 0.31 -1 -1 33924 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63264 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.8 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 8.3175e-05 5.0203e-05 0.00133949 0.00121351 -1 163 21 646728 646728 138825. 3856.24 0.01 0.00784067 0.00532275 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full_--router_algorithm_parallel_--num_workers_4 1.42 vpr 61.66 MiB -1 -1 0.34 22744 5 0.30 -1 -1 33908 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63140 10 2 181 183 1 40 24 6 6 36 clb auto 23.1 MiB 0.03 171 61.7 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.000453545 0.000422888 0.00262389 0.00239838 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0186074 0.0163246 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 From 7e0fbae3aad3a09bc27c2aeb295707ec2f230973 Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Tue, 5 Sep 2023 01:53:10 -0400 Subject: [PATCH 13/20] Testing to see if tests will pass if I undo changes. --- vpr/src/route/route_util.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index c8eb6ea57b5..d4164232fb6 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -24,12 +24,12 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat) { } } } - t_draw_state* draw_state = get_draw_state_vars(); +// t_draw_state* draw_state = get_draw_state_vars(); //Record number of used resources in each x/y channel for (RRNodeId rr_node : rr_nodes) { - int layer_num = rr_graph.node_layer(rr_node); - if (!draw_state->draw_layer_display[layer_num].visible) - continue; // don't count usage if layer is not visible +// int layer_num = rr_graph.node_layer(rr_node); +// if (!draw_state->draw_layer_display[layer_num].visible) +// continue; // don't count usage if layer is not visible if (rr_type == CHANX) { VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX); From 0cd3a79b389e5ded65808985c73f7c322d6d5dbf Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Tue, 5 Sep 2023 14:59:07 -0400 Subject: [PATCH 14/20] Ignores layer visibility for output/printing --- vpr/src/draw/draw_basic.cpp | 4 ++-- vpr/src/route/channel_stats.cpp | 4 ++-- vpr/src/route/route_util.cpp | 12 +++++++----- vpr/src/route/route_util.h | 5 +++-- 4 files changed, 14 insertions(+), 11 deletions(-) diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index 999556270b6..c1b8715c1c7 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -844,8 +844,8 @@ void draw_routing_util(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& device_ctx = g_vpr_ctx.device(); - auto chanx_usage = calculate_routing_usage(CHANX, draw_state->is_flat); - auto chany_usage = calculate_routing_usage(CHANY, draw_state->is_flat); + auto chanx_usage = calculate_routing_usage(CHANX, draw_state->is_flat, false); + auto chany_usage = calculate_routing_usage(CHANY, draw_state->is_flat, false); auto chanx_avail = calculate_routing_avail(CHANX); auto chany_avail = calculate_routing_avail(CHANY); diff --git a/vpr/src/route/channel_stats.cpp b/vpr/src/route/channel_stats.cpp index 026a453232c..e5a2f1703e2 100644 --- a/vpr/src/route/channel_stats.cpp +++ b/vpr/src/route/channel_stats.cpp @@ -20,8 +20,8 @@ void print_channel_stats(bool is_flat) { histogram.emplace_back(0.9, 1.0); histogram.emplace_back(1.0, std::numeric_limits::infinity()); - auto chanx_usage = calculate_routing_usage(CHANX, is_flat); - auto chany_usage = calculate_routing_usage(CHANY, is_flat); + auto chanx_usage = calculate_routing_usage(CHANX, is_flat, true); + auto chany_usage = calculate_routing_usage(CHANY, is_flat, true); auto chanx_avail = calculate_routing_avail(CHANX); auto chany_avail = calculate_routing_avail(CHANY); diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index d4164232fb6..c9fe378abb8 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -1,7 +1,7 @@ #include "route_util.h" #include "globals.h" -vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat) { +vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print) { VTR_ASSERT(rr_type == CHANX || rr_type == CHANY); auto& device_ctx = g_vpr_ctx.device(); @@ -24,12 +24,14 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat) { } } } -// t_draw_state* draw_state = get_draw_state_vars(); + t_draw_state* draw_state = get_draw_state_vars(); //Record number of used resources in each x/y channel for (RRNodeId rr_node : rr_nodes) { -// int layer_num = rr_graph.node_layer(rr_node); -// if (!draw_state->draw_layer_display[layer_num].visible) -// continue; // don't count usage if layer is not visible + if (!is_print) { + int layer_num = rr_graph.node_layer(rr_node); + if (!draw_state->draw_layer_display[layer_num].visible) + continue; // don't count usage if layer is not visible + } if (rr_type == CHANX) { VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX); diff --git a/vpr/src/route/route_util.h b/vpr/src/route/route_util.h index d43c36d2090..14946583472 100644 --- a/vpr/src/route/route_util.h +++ b/vpr/src/route/route_util.h @@ -10,9 +10,10 @@ vtr::Matrix calculate_routing_avail(t_rr_type rr_type); * @brief Calculates routing usage over entire grid * Collects all in-use nodes and records number of used resources * in each x/y channel. Takes into consideration visible layers - * for multi-layered architectures. + * for multi-layered architectures. Also takes into consideration + * if it is being printed, if so, layer visibility is ignored. */ -vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat); +vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print); float routing_util(float used, float avail); #endif From 87acb5882dd53c03db9f22bb291dea4c3c86f6d4 Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Tue, 5 Sep 2023 17:55:07 -0400 Subject: [PATCH 15/20] Adding include statements --- vpr/src/route/route_util.cpp | 2 ++ 1 file changed, 2 insertions(+) diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index c9fe378abb8..80682aae22b 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -1,5 +1,7 @@ #include "route_util.h" #include "globals.h" +#include "draw_types.h" +#include "draw_global.h" vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print) { VTR_ASSERT(rr_type == CHANX || rr_type == CHANY); From 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Date: Tue, 5 Sep 2023 22:05:19 -0400 Subject: [PATCH 17/20] Change location of creating draw_state variable in attempt to pass cases. --- vpr/src/route/route_util.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index 80682aae22b..fd8c4568ddc 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -26,10 +26,11 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool } } } - t_draw_state* draw_state = get_draw_state_vars(); + //Record number of used resources in each x/y channel for (RRNodeId rr_node : rr_nodes) { if (!is_print) { + t_draw_state* draw_state = get_draw_state_vars(); int layer_num = rr_graph.node_layer(rr_node); if (!draw_state->draw_layer_display[layer_num].visible) continue; // don't count usage if layer is not visible From fe4eb6c9c81e32206bbe9bde90ec0292f71780ea Mon Sep 17 00:00:00 2001 From: alanbu1 <123594608+alanbu1@users.noreply.github.com> Date: Wed, 6 Sep 2023 11:31:49 -0400 Subject: [PATCH 18/20] Updated graphics.rst Updates based on the comments on GitHub --- doc/src/vpr/graphics.rst | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/doc/src/vpr/graphics.rst b/doc/src/vpr/graphics.rst index 417b07b9c18..1ab3459fccd 100644 --- a/doc/src/vpr/graphics.rst +++ b/doc/src/vpr/graphics.rst @@ -186,7 +186,8 @@ View Menu Items under view menu -The view menu is displayed when there is a multi-layered architectures (more than 1 layer). +The view menu is displayed when vpr is targeting a stacked multi-die architecture (more than 1 layer). +Layers are drawn in ascending order for many drawing features (e.g. blocks); that is layer 0 is drawn first, and (if visible), layer 1 is drawn on top of it etc. The visibility and transparency of a layer can be changed, which will affect blocks, nets, routing, and critical path. Cross-layer connections refer to connections that are in different layers. From b579cbd780ac68072755ad4073ea3ed16e84e3b3 Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Wed, 6 Sep 2023 12:34:34 -0400 Subject: [PATCH 19/20] Updates based on GitHub; wrapped #ifndef and updated calculating_routing_usage comment in .h file. --- vpr/src/route/route_util.cpp | 14 ++++++++------ vpr/src/route/route_util.h | 12 +++++++----- 2 files changed, 15 insertions(+), 11 deletions(-) diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index fd8c4568ddc..6016da68b53 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -29,12 +29,14 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool //Record number of used resources in each x/y channel for (RRNodeId rr_node : rr_nodes) { - if (!is_print) { - t_draw_state* draw_state = get_draw_state_vars(); - int layer_num = rr_graph.node_layer(rr_node); - if (!draw_state->draw_layer_display[layer_num].visible) - continue; // don't count usage if layer is not visible - } + #ifndef NO_GRAPHICS + if (!is_print) { + t_draw_state* draw_state = get_draw_state_vars(); + int layer_num = rr_graph.node_layer(rr_node); + if (!draw_state->draw_layer_display[layer_num].visible) + continue; // don't count usage if layer is not visible + } + #endif if (rr_type == CHANX) { VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX); diff --git a/vpr/src/route/route_util.h b/vpr/src/route/route_util.h index 14946583472..ba8d6995738 100644 --- a/vpr/src/route/route_util.h +++ b/vpr/src/route/route_util.h @@ -7,11 +7,13 @@ vtr::Matrix calculate_routing_avail(t_rr_type rr_type); /** - * @brief Calculates routing usage over entire grid - * Collects all in-use nodes and records number of used resources - * in each x/y channel. Takes into consideration visible layers - * for multi-layered architectures. Also takes into consideration - * if it is being printed, if so, layer visibility is ignored. + * @brief: Calculates and returns the usage over the entire grid for the specified + * type of rr_node to the usage array. The usage is recorded at each (x,y) location. + * + * @param rr_type: Type of rr_node that we are calculating the usage of; can be CHANX or CHANY + * @param is_flat: Is the flat router being used or not? + * @param only_visible: If true, only record the usage of rr_nodes on layers that are visible according to the current + * drawing settings. */ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool is_print); float routing_util(float used, float avail); From 17a38ceebd8791dffb32f33845eef3bef9c4dac7 Mon Sep 17 00:00:00 2001 From: alanbu1 Date: Wed, 6 Sep 2023 18:37:42 -0400 Subject: [PATCH 20/20] Format --- vpr/src/route/route_util.cpp | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/vpr/src/route/route_util.cpp b/vpr/src/route/route_util.cpp index 6016da68b53..8ca7f657124 100644 --- a/vpr/src/route/route_util.cpp +++ b/vpr/src/route/route_util.cpp @@ -29,14 +29,14 @@ vtr::Matrix calculate_routing_usage(t_rr_type rr_type, bool is_flat, bool //Record number of used resources in each x/y channel for (RRNodeId rr_node : rr_nodes) { - #ifndef NO_GRAPHICS - if (!is_print) { - t_draw_state* draw_state = get_draw_state_vars(); - int layer_num = rr_graph.node_layer(rr_node); - if (!draw_state->draw_layer_display[layer_num].visible) - continue; // don't count usage if layer is not visible - } - #endif +#ifndef NO_GRAPHICS + if (!is_print) { + t_draw_state* draw_state = get_draw_state_vars(); + int layer_num = rr_graph.node_layer(rr_node); + if (!draw_state->draw_layer_display[layer_num].visible) + continue; // don't count usage if layer is not visible + } +#endif if (rr_type == CHANX) { VTR_ASSERT(rr_graph.node_type(rr_node) == CHANX);