diff --git a/vpr/src/analytical_place/full_legalizer.cpp b/vpr/src/analytical_place/full_legalizer.cpp index 3a6f985ef72..e0850479118 100644 --- a/vpr/src/analytical_place/full_legalizer.cpp +++ b/vpr/src/analytical_place/full_legalizer.cpp @@ -17,7 +17,6 @@ #include "ShowSetup.h" #include "ap_netlist_fwd.h" #include "check_netlist.h" -#include "cluster.h" #include "cluster_legalizer.h" #include "cluster_util.h" #include "clustered_netlist.h" diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index b763c368da5..251c271e84e 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -64,7 +64,6 @@ #include "check_route.h" #include "constant_nets.h" #include "atom_netlist_utils.h" -#include "cluster.h" #include "output_clustering.h" #include "vpr_constraints_reader.h" #include "place_constraints.h" diff --git a/vpr/src/base/vpr_types.cpp b/vpr/src/base/vpr_types.cpp index c4a381d59f6..f1401bd5f51 100644 --- a/vpr/src/base/vpr_types.cpp +++ b/vpr/src/base/vpr_types.cpp @@ -37,7 +37,7 @@ t_ext_pin_util_targets::t_ext_pin_util_targets(const std::vector& s //input pin utilization target which is high, but less than 100%. if (logic_block_type != nullptr) { constexpr float LOGIC_BLOCK_TYPE_AUTO_INPUT_UTIL = 0.8; - constexpr float LOGIC_BLOCK_TYPE_AUTO_OUTPUT_UTIL = 1.0; + constexpr float LOGIC_BLOCK_TYPE_AUTO_OUTPUT_UTIL = 0.6; t_ext_pin_util logic_block_ext_pin_util(LOGIC_BLOCK_TYPE_AUTO_INPUT_UTIL, LOGIC_BLOCK_TYPE_AUTO_OUTPUT_UTIL); diff --git a/vpr/src/pack/cluster.h b/vpr/src/pack/cluster.h deleted file mode 100644 index a10d7ccf21a..00000000000 --- a/vpr/src/pack/cluster.h +++ /dev/null @@ -1,32 +0,0 @@ -#ifndef CLUSTER_H -#define CLUSTER_H - -#include -#include - -#include "physical_types.h" -#include "vpr_types.h" - -class AtomNetid; -class AttractionInfo; -class ClusterLegalizer; -class ClusteredNetlist; -class Prepacker; -struct t_clustering_data; - -std::map do_clustering(const t_packer_opts& packer_opts, - const t_analysis_opts& analysis_opts, - const t_arch* arch, - Prepacker& prepacker, - ClusterLegalizer& cluster_legalizer, - const std::unordered_set& is_clock, - const std::unordered_set& is_global, - bool allow_unrelated_clustering, - bool balance_block_type_utilization, - AttractionInfo& attraction_groups, - bool& floorplan_regions_overfull, - const t_pack_high_fanout_thresholds& high_fanout_thresholds, - t_clustering_data& clustering_data); - -void print_pb_type_count(const ClusteredNetlist& clb_nlist); -#endif diff --git a/vpr/src/pack/cluster_util.cpp b/vpr/src/pack/cluster_util.cpp index e9b6a846ce0..75a1ce82a53 100644 --- a/vpr/src/pack/cluster_util.cpp +++ b/vpr/src/pack/cluster_util.cpp @@ -1523,156 +1523,6 @@ t_molecule_stats calc_molecule_stats(const t_pack_molecule* molecule, const Atom return molecule_stats; } -std::vector initialize_seed_atoms(const e_cluster_seed seed_type, - const t_molecule_stats& max_molecule_stats, - const Prepacker& prepacker, - const vtr::vector& atom_criticality) { - const AtomNetlist& atom_nlist = g_vpr_ctx.atom().nlist; - - //Put all atoms in seed list - std::vector seed_atoms(atom_nlist.blocks().begin(), atom_nlist.blocks().end()); - - //Initially all gains are zero - vtr::vector atom_gains(atom_nlist.blocks().size(), 0.); - - if (seed_type == e_cluster_seed::TIMING) { - VTR_ASSERT(atom_gains.size() == atom_criticality.size()); - - //By criticality - atom_gains = atom_criticality; - - } else if (seed_type == e_cluster_seed::MAX_INPUTS) { - //By number of used molecule input pins - for (auto blk : atom_nlist.blocks()) { - const t_pack_molecule* blk_mol = prepacker.get_atom_molecule(blk); - const t_molecule_stats molecule_stats = calc_molecule_stats(blk_mol, atom_nlist); - atom_gains[blk] = molecule_stats.num_used_ext_inputs; - } - - } else if (seed_type == e_cluster_seed::BLEND) { - //By blended gain (criticality and inputs used) - for (auto blk : atom_nlist.blocks()) { - /* Score seed gain of each block as a weighted sum of timing criticality, - * number of tightly coupled blocks connected to it, and number of external inputs */ - float seed_blend_fac = 0.5; - - const t_pack_molecule* blk_mol = prepacker.get_atom_molecule(blk); - const t_molecule_stats molecule_stats = calc_molecule_stats(blk_mol, atom_nlist); - VTR_ASSERT(max_molecule_stats.num_used_ext_inputs > 0); - - float blend_gain = (seed_blend_fac * atom_criticality[blk] - + (1 - seed_blend_fac) * (molecule_stats.num_used_ext_inputs / max_molecule_stats.num_used_ext_inputs)); - blend_gain *= (1 + 0.2 * (molecule_stats.num_blocks - 1)); - atom_gains[blk] = blend_gain; - } - - } else if (seed_type == e_cluster_seed::MAX_PINS || seed_type == e_cluster_seed::MAX_INPUT_PINS) { - //By pins per molecule (i.e. available pins on primitives, not pins in use) - - for (auto blk : atom_nlist.blocks()) { - const t_pack_molecule* mol = prepacker.get_atom_molecule(blk); - const t_molecule_stats molecule_stats = calc_molecule_stats(mol, atom_nlist); - - int molecule_pins = 0; - if (seed_type == e_cluster_seed::MAX_PINS) { - //All pins - molecule_pins = molecule_stats.num_pins; - } else { - VTR_ASSERT(seed_type == e_cluster_seed::MAX_INPUT_PINS); - //Input pins only - molecule_pins = molecule_stats.num_input_pins; - } - - atom_gains[blk] = molecule_pins; - } - - } else if (seed_type == e_cluster_seed::BLEND2) { - for (auto blk : atom_nlist.blocks()) { - const t_pack_molecule* mol = prepacker.get_atom_molecule(blk); - const t_molecule_stats molecule_stats = calc_molecule_stats(mol, atom_nlist); - - float pin_ratio = vtr::safe_ratio(molecule_stats.num_pins, max_molecule_stats.num_pins); - float input_pin_ratio = vtr::safe_ratio(molecule_stats.num_input_pins, max_molecule_stats.num_input_pins); - float output_pin_ratio = vtr::safe_ratio(molecule_stats.num_output_pins, max_molecule_stats.num_output_pins); - float used_ext_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_pins, max_molecule_stats.num_used_ext_pins); - float used_ext_input_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_inputs, max_molecule_stats.num_used_ext_inputs); - float used_ext_output_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_outputs, max_molecule_stats.num_used_ext_outputs); - float num_blocks_ratio = vtr::safe_ratio(molecule_stats.num_blocks, max_molecule_stats.num_blocks); - float criticality = atom_criticality[blk]; - - constexpr float PIN_WEIGHT = 0.; - constexpr float INPUT_PIN_WEIGHT = 0.5; - constexpr float OUTPUT_PIN_WEIGHT = 0.; - constexpr float USED_PIN_WEIGHT = 0.; - constexpr float USED_INPUT_PIN_WEIGHT = 0.2; - constexpr float USED_OUTPUT_PIN_WEIGHT = 0.; - constexpr float BLOCKS_WEIGHT = 0.2; - constexpr float CRITICALITY_WEIGHT = 0.1; - - float gain = PIN_WEIGHT * pin_ratio - + INPUT_PIN_WEIGHT * input_pin_ratio - + OUTPUT_PIN_WEIGHT * output_pin_ratio - - + USED_PIN_WEIGHT * used_ext_pin_ratio - + USED_INPUT_PIN_WEIGHT * used_ext_input_pin_ratio - + USED_OUTPUT_PIN_WEIGHT * used_ext_output_pin_ratio - - + BLOCKS_WEIGHT * num_blocks_ratio - + CRITICALITY_WEIGHT * criticality; - - atom_gains[blk] = gain; - } - - } else { - VPR_FATAL_ERROR(VPR_ERROR_PACK, "Unrecognized cluster seed type"); - } - - //Sort seeds in descending order of gain (i.e. highest gain first) - // - // Note that we use a *stable* sort here. It has been observed that different - // standard library implementations (e.g. gcc-4.9 vs gcc-5) use sorting algorithms - // which produce different orderings for seeds of equal gain (which is allowed with - // std::sort which does not specify how equal values are handled). Using a stable - // sort ensures that regardless of the underlying sorting algorithm the same seed - // order is produced regardless of compiler. - auto by_descending_gain = [&](const AtomBlockId lhs, const AtomBlockId rhs) { - return atom_gains[lhs] > atom_gains[rhs]; - }; - std::stable_sort(seed_atoms.begin(), seed_atoms.end(), by_descending_gain); - - if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES)) { - print_seed_gains(getEchoFileName(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES), seed_atoms, atom_gains, atom_criticality); - } - - return seed_atoms; -} - -t_pack_molecule* get_highest_gain_seed_molecule(int& seed_index, - const std::vector& seed_atoms, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer) { - while (seed_index < static_cast(seed_atoms.size())) { - AtomBlockId blk_id = seed_atoms[seed_index++]; - - // Check if the atom has already been assigned to a cluster - if (!cluster_legalizer.is_atom_clustered(blk_id)) { - t_pack_molecule* best = nullptr; - - t_pack_molecule* molecule = prepacker.get_atom_molecule(blk_id); - if (!cluster_legalizer.is_mol_clustered(molecule)) { - if (best == nullptr || (best->base_gain) < (molecule->base_gain)) { - best = molecule; - } - } - VTR_ASSERT(best != nullptr); - return best; - } - } - - /*if it makes it to here , there are no more blocks available*/ - return nullptr; -} - float get_molecule_gain(t_pack_molecule* molecule, std::map& blk_gain, AttractGroupId cluster_attraction_group_id, AttractionInfo& attraction_groups, int num_molecule_failures) { float gain; int i; @@ -1804,38 +1654,6 @@ std::map> identify_primiti return model_candidates; } -void print_seed_gains(const char* fname, const std::vector& seed_atoms, const vtr::vector& atom_gain, const vtr::vector& atom_criticality) { - FILE* fp = vtr::fopen(fname, "w"); - - const AtomContext& atom_ctx = g_vpr_ctx.atom(); - - //For prett formatting determine the maximum name length - int max_name_len = strlen("atom_block_name"); - int max_type_len = strlen("atom_block_type"); - for (auto blk_id : atom_ctx.nlist.blocks()) { - max_name_len = std::max(max_name_len, (int)atom_ctx.nlist.block_name(blk_id).size()); - - const t_model* model = atom_ctx.nlist.block_model(blk_id); - max_type_len = std::max(max_type_len, (int)strlen(model->name)); - } - - fprintf(fp, "%-*s %-*s %8s %8s\n", max_name_len, "atom_block_name", max_type_len, "atom_block_type", "gain", "criticality"); - fprintf(fp, "\n"); - for (auto blk_id : seed_atoms) { - std::string name = atom_ctx.nlist.block_name(blk_id); - fprintf(fp, "%-*s ", max_name_len, name.c_str()); - - const t_model* model = atom_ctx.nlist.block_model(blk_id); - fprintf(fp, "%-*s ", max_type_len, model->name); - - fprintf(fp, "%*f ", std::max((int)strlen("gain"), 8), atom_gain[blk_id]); - fprintf(fp, "%*f ", std::max((int)strlen("criticality"), 8), atom_criticality[blk_id]); - fprintf(fp, "\n"); - } - - fclose(fp); -} - size_t update_pb_type_count(const t_pb* pb, std::map& pb_type_count, size_t depth) { size_t max_depth = depth; @@ -1879,6 +1697,32 @@ void print_pb_type_count_recurr(t_pb_type* pb_type, size_t max_name_chars, size_ } } +void print_pb_type_count(const ClusteredNetlist& clb_nlist) { + auto& device_ctx = g_vpr_ctx.device(); + + std::map pb_type_count; + + size_t max_depth = 0; + for (ClusterBlockId blk : clb_nlist.blocks()) { + size_t pb_max_depth = update_pb_type_count(clb_nlist.block_pb(blk), pb_type_count, 0); + + max_depth = std::max(max_depth, pb_max_depth); + } + + size_t max_pb_type_name_chars = 0; + for (auto& pb_type : pb_type_count) { + max_pb_type_name_chars = std::max(max_pb_type_name_chars, strlen(pb_type.first->name)); + } + + VTR_LOG("\nPb types usage...\n"); + for (const auto& logical_block_type : device_ctx.logical_block_types) { + if (!logical_block_type.pb_type) continue; + + print_pb_type_count_recurr(logical_block_type.pb_type, max_pb_type_name_chars + max_depth, 0, pb_type_count); + } + VTR_LOG("\n"); +} + t_logical_block_type_ptr identify_logic_block_type(std::map>& primitive_candidate_block_types) { std::string lut_name = ".names"; diff --git a/vpr/src/pack/cluster_util.h b/vpr/src/pack/cluster_util.h index c55dcab2922..c794daf066d 100644 --- a/vpr/src/pack/cluster_util.h +++ b/vpr/src/pack/cluster_util.h @@ -428,16 +428,6 @@ t_pack_molecule* get_molecule_for_cluster(t_pb* cur_pb, */ t_molecule_stats calc_molecule_stats(const t_pack_molecule* molecule, const AtomNetlist& atom_nlist); -std::vector initialize_seed_atoms(const e_cluster_seed seed_type, - const t_molecule_stats& max_molecule_stats, - const Prepacker& prepacker, - const vtr::vector& atom_criticality); - -t_pack_molecule* get_highest_gain_seed_molecule(int& seed_index, - const std::vector& seed_atoms, - const Prepacker& prepacker, - const ClusterLegalizer& cluster_legalizer); - /* * @brief Get gain of packing molecule into current cluster. * @@ -448,8 +438,6 @@ t_pack_molecule* get_highest_gain_seed_molecule(int& seed_index, */ float get_molecule_gain(t_pack_molecule* molecule, std::map& blk_gain, AttractGroupId cluster_attraction_group_id, AttractionInfo& attraction_groups, int num_molecule_failures); -void print_seed_gains(const char* fname, const std::vector& seed_atoms, const vtr::vector& atom_gain, const vtr::vector& atom_criticality); - /** * @brief Score unclustered atoms that are two hops away from current cluster * @@ -481,6 +469,11 @@ void update_le_count(const t_pb* pb, const t_logical_block_type_ptr logic_block_ void print_pb_type_count_recurr(t_pb_type* type, size_t max_name_chars, size_t curr_depth, std::map& pb_type_count); +/** + * Print the total number of used physical blocks for each pb type in the architecture + */ +void print_pb_type_count(const ClusteredNetlist& clb_nlist); + /* * @brief This function identifies the logic block type which is defined by the * block type which has a lut primitive. diff --git a/vpr/src/pack/cluster.cpp b/vpr/src/pack/greedy_clusterer.cpp similarity index 68% rename from vpr/src/pack/cluster.cpp rename to vpr/src/pack/greedy_clusterer.cpp index 354135f2097..98ca4243625 100644 --- a/vpr/src/pack/cluster.cpp +++ b/vpr/src/pack/greedy_clusterer.cpp @@ -1,10 +1,12 @@ -/* - * Main clustering algorithm - * Author(s): Vaughn Betz (first revision - VPack), Alexander Marquardt (second revision - T-VPack), Jason Luu (third revision - AAPack) - * June 8, 2011 - */ - -/* +/** + * @file + * @author Vaughn Betz (first revision - VPack), + * Alexander Marquardt (second revision - T-VPack), + * Jason Luu (third revision - AAPack), + * Alex Singer (fourth revision - APPack) + * @date June 8, 2011 + * @brief Main clustering algorithm + * * The clusterer uses several key data structures: * * t_pb_type (and related types): @@ -33,51 +35,43 @@ * The output of clustering is 400 t_pb of type BLE which represent the clustered user netlist. * Each of the 400 t_pb will reference one of the 4 BLE-type t_pb_graph_nodes. */ -#include "cluster.h" -#include -#include -#include -#include -#include +#include "greedy_clusterer.h" #include - -#include "PreClusterDelayCalculator.h" +#include #include "atom_netlist.h" +#include "attraction_groups.h" #include "cluster_legalizer.h" #include "cluster_util.h" #include "constraints_report.h" -#include "globals.h" +#include "greedy_seed_selector.h" +#include "physical_types.h" #include "prepack.h" -#include "timing_info.h" -#include "vpr_types.h" -#include "vpr_utils.h" -#include "vtr_assert.h" -#include "vtr_log.h" - -/* - * When attraction groups are created, the purpose is to pack more densely by adding more molecules - * from the cluster's attraction group to the cluster. In a normal flow, (when attraction groups are - * not on), the cluster keeps being packed until the get_molecule routines return either a repeated - * molecule or a nullptr. When attraction groups are on, we want to keep exploring molecules for the - * cluster until a nullptr is returned. So, the number of repeated molecules is changed from 1 to 500, - * effectively making the clusterer pack a cluster until a nullptr is returned. - */ -static constexpr int ATTRACTION_GROUPS_MAX_REPEATED_MOLECULES = 500; - -std::map do_clustering(const t_packer_opts& packer_opts, - const t_analysis_opts& analysis_opts, - const t_arch* arch, - Prepacker& prepacker, - ClusterLegalizer& cluster_legalizer, - const std::unordered_set& is_clock, - const std::unordered_set& is_global, - bool allow_unrelated_clustering, - bool balance_block_type_utilization, - AttractionInfo& attraction_groups, - bool& floorplan_regions_overfull, - const t_pack_high_fanout_thresholds& high_fanout_thresholds, - t_clustering_data& clustering_data) { +#include "vtr_vector.h" + +GreedyClusterer::GreedyClusterer(const t_packer_opts& packer_opts, + const t_analysis_opts& analysis_opts, + const AtomNetlist& atom_netlist, + const t_arch* arch, + const t_pack_high_fanout_thresholds& high_fanout_thresholds, + const std::unordered_set& is_clock, + const std::unordered_set& is_global) + : packer_opts_(packer_opts), + analysis_opts_(analysis_opts), + atom_netlist_(atom_netlist), + arch_(arch), + high_fanout_thresholds_(high_fanout_thresholds), + is_clock_(is_clock), + is_global_(is_global), + primitive_candidate_block_types_(identify_primitive_candidate_block_types()) {} + +std::map +GreedyClusterer::do_clustering(ClusterLegalizer& cluster_legalizer, + Prepacker& prepacker, + bool allow_unrelated_clustering, + bool balance_block_type_utilization, + AttractionInfo& attraction_groups) { + /* Does the actual work of clustering multiple netlist blocks * * into clusters. */ @@ -97,12 +91,13 @@ std::map do_clustering(const t_packer_opts& pa /**************************************************************** * Initialization *****************************************************************/ + t_clustering_data clustering_data; t_cluster_progress_stats cluster_stats; //int num_molecules, num_molecules_processed, mols_since_last_print, blocks_since_last_analysis, int num_blocks_hill_added; - const int verbosity = packer_opts.pack_verbosity; + const int verbosity = packer_opts_.pack_verbosity; int unclustered_list_head_size; std::unordered_map net_output_feeds_driving_block_input; @@ -114,9 +109,8 @@ std::map do_clustering(const t_packer_opts& pa enum e_block_pack_status block_pack_status; - t_pack_molecule *istart, *next_molecule, *prev_molecule; + t_pack_molecule *next_molecule, *prev_molecule; - auto& atom_ctx = g_vpr_ctx.atom(); auto& device_ctx = g_vpr_ctx.mutable_device(); std::shared_ptr clustering_delay_calc; @@ -137,15 +131,13 @@ std::map do_clustering(const t_packer_opts& pa /* TODO: This is memory inefficient, fix if causes problems */ /* Store stats on nets used by packed block, useful for determining transitively connected blocks * (eg. [A1, A2, ..]->[B1, B2, ..]->C implies cluster [A1, A2, ...] and C have a weak link) */ - vtr::vector> clb_inter_blk_nets(atom_ctx.nlist.blocks().size()); - - istart = nullptr; + vtr::vector> clb_inter_blk_nets(atom_netlist_.blocks().size()); - const t_molecule_stats max_molecule_stats = prepacker.calc_max_molecule_stats(atom_ctx.nlist); + const t_molecule_stats max_molecule_stats = prepacker.calc_max_molecule_stats(atom_netlist_); cluster_stats.num_molecules = prepacker.get_num_molecules(); - if (packer_opts.hill_climbing_flag) { + if (packer_opts_.hill_climbing_flag) { size_t max_cluster_size = cluster_legalizer.get_max_cluster_size(); clustering_data.hill_climbing_inputs_avail = new int[max_cluster_size + 1]; for (size_t i = 0; i < max_cluster_size + 1; i++) @@ -163,9 +155,8 @@ std::map do_clustering(const t_packer_opts& pa clustering_data, net_output_feeds_driving_block_input, unclustered_list_head_size, cluster_stats.num_molecules); - auto primitive_candidate_block_types = identify_primitive_candidate_block_types(); // find the cluster type that has lut primitives - auto logic_block_type = identify_logic_block_type(primitive_candidate_block_types); + auto logic_block_type = identify_logic_block_type(primitive_candidate_block_types_); // find a LE pb_type within the found logic_block_type auto le_pb_type = identify_le_block_type(logic_block_type); @@ -173,25 +164,23 @@ std::map do_clustering(const t_packer_opts& pa num_blocks_hill_added = 0; //Default criticalities set to zero (e.g. if not timing driven) - vtr::vector atom_criticality(atom_ctx.nlist.blocks().size(), 0.); + vtr::vector atom_criticality(atom_netlist_.blocks().size(), 0.); - if (packer_opts.timing_driven) { - calc_init_packing_timing(packer_opts, analysis_opts, prepacker, + if (packer_opts_.timing_driven) { + calc_init_packing_timing(packer_opts_, analysis_opts_, prepacker, clustering_delay_calc, timing_info, atom_criticality); } - // Assign gain scores to atoms and sort them based on the scores. - auto seed_atoms = initialize_seed_atoms(packer_opts.cluster_seed_type, - max_molecule_stats, - prepacker, - atom_criticality); + // Create the greedy seed selector. + GreedySeedSelector seed_selector(atom_netlist_, + prepacker, + packer_opts_.cluster_seed_type, + max_molecule_stats, + atom_criticality); - /* index of next most timing critical block */ - int seed_index = 0; - istart = get_highest_gain_seed_molecule(seed_index, - seed_atoms, - prepacker, - cluster_legalizer); + // Pick the first seed molecule. + t_pack_molecule* istart = seed_selector.get_next_seed(prepacker, + cluster_legalizer); print_pack_status_header(); @@ -201,7 +190,6 @@ std::map do_clustering(const t_packer_opts& pa while (istart != nullptr) { bool is_cluster_legal = false; - int saved_seed_index = seed_index; // The basic algorithm: // 1) Try to put all the molecules in that you can without doing the // full intra-lb route. Then do full legalization at the end. @@ -225,9 +213,9 @@ std::map do_clustering(const t_packer_opts& pa legalization_cluster_id, istart, num_used_type_instances, - packer_opts.target_device_utilization, - arch, packer_opts.device_layout, - primitive_candidate_block_types, + packer_opts_.target_device_utilization, + arch_, packer_opts_.device_layout, + primitive_candidate_block_types_, verbosity, balance_block_type_utilization); @@ -251,21 +239,21 @@ std::map do_clustering(const t_packer_opts& pa //Progress dot for seed-block fflush(stdout); - int high_fanout_threshold = high_fanout_thresholds.get_threshold(cluster_legalizer.get_cluster_type(legalization_cluster_id)->name); + int high_fanout_threshold = high_fanout_thresholds_.get_threshold(cluster_legalizer.get_cluster_type(legalization_cluster_id)->name); update_cluster_stats(istart, cluster_legalizer, - is_clock, //Set of clock nets - is_global, //Set of global nets (currently all clocks) - packer_opts.global_clocks, - packer_opts.alpha, packer_opts.beta, - packer_opts.timing_driven, packer_opts.connection_driven, + is_clock_, //Set of clock nets + is_global_, //Set of global nets (currently all clocks) + packer_opts_.global_clocks, + packer_opts_.alpha, packer_opts_.beta, + packer_opts_.timing_driven, packer_opts_.connection_driven, high_fanout_threshold, *timing_info, attraction_groups, net_output_feeds_driving_block_input); total_clb_num++; - if (packer_opts.timing_driven) { + if (packer_opts_.timing_driven) { cluster_stats.blocks_since_last_analysis++; /*it doesn't make sense to do a timing analysis here since there* *is only one atom block clustered it would not change anything */ @@ -274,9 +262,9 @@ std::map do_clustering(const t_packer_opts& pa next_molecule = get_molecule_for_cluster(cluster_legalizer.get_cluster_pb(legalization_cluster_id), attraction_groups, allow_unrelated_clustering, - packer_opts.prioritize_transitive_connectivity, - packer_opts.transitive_fanout_threshold, - packer_opts.feasible_block_array_size, + packer_opts_.prioritize_transitive_connectivity, + packer_opts_.transitive_fanout_threshold, + packer_opts_.feasible_block_array_size, &cluster_stats.num_unrelated_clustering_attempts, prepacker, cluster_legalizer, @@ -285,7 +273,7 @@ std::map do_clustering(const t_packer_opts& pa verbosity, clustering_data.unclustered_list_head, unclustered_list_head_size, - primitive_candidate_block_types); + primitive_candidate_block_types_); prev_molecule = istart; /* @@ -298,7 +286,7 @@ std::map do_clustering(const t_packer_opts& pa */ int max_num_repeated_molecules = 0; if (attraction_groups.num_attraction_groups() > 0) { - max_num_repeated_molecules = ATTRACTION_GROUPS_MAX_REPEATED_MOLECULES; + max_num_repeated_molecules = attraction_groups_max_repeated_molecules_; } else { max_num_repeated_molecules = 1; } @@ -309,7 +297,7 @@ std::map do_clustering(const t_packer_opts& pa try_fill_cluster(cluster_legalizer, prepacker, - packer_opts, + packer_opts_, prev_molecule, next_molecule, num_repeated_molecules, @@ -320,14 +308,14 @@ std::map do_clustering(const t_packer_opts& pa clb_inter_blk_nets, allow_unrelated_clustering, high_fanout_threshold, - is_clock, - is_global, + is_clock_, + is_global_, timing_info, block_pack_status, clustering_data.unclustered_list_head, unclustered_list_head_size, net_output_feeds_driving_block_input, - primitive_candidate_block_types); + primitive_candidate_block_types_); } if (strategy == ClusterLegalizationStrategy::FULL) { @@ -343,15 +331,13 @@ std::map do_clustering(const t_packer_opts& pa if (is_cluster_legal) { // Pick new seed. - istart = get_highest_gain_seed_molecule(seed_index, - seed_atoms, - prepacker, - cluster_legalizer); + istart = seed_selector.get_next_seed(prepacker, + cluster_legalizer); // Update cluster stats. - if (packer_opts.timing_driven && num_blocks_hill_added > 0) + if (packer_opts_.timing_driven && num_blocks_hill_added > 0) cluster_stats.blocks_since_last_analysis += num_blocks_hill_added; - store_cluster_info_and_free(packer_opts, legalization_cluster_id, logic_block_type, le_pb_type, le_count, cluster_legalizer, clb_inter_blk_nets); + store_cluster_info_and_free(packer_opts_, legalization_cluster_id, logic_block_type, le_pb_type, le_count, cluster_legalizer, clb_inter_blk_nets); // Since the cluster will no longer be added to beyond this point, // clean the cluster of any data not strictly necessary for // creating the clustered netlist. @@ -360,7 +346,6 @@ std::map do_clustering(const t_packer_opts& pa // If the cluster is not legal, requeue used mols. num_used_type_instances[cluster_legalizer.get_cluster_type(legalization_cluster_id)]--; total_clb_num--; - seed_index = saved_seed_index; // Destroy the illegal cluster. cluster_legalizer.destroy_cluster(legalization_cluster_id); cluster_legalizer.compress(); @@ -373,42 +358,16 @@ std::map do_clustering(const t_packer_opts& pa print_le_count(le_count, le_pb_type); } - //check_floorplan_regions(floorplan_regions_overfull); - floorplan_regions_overfull = floorplan_constraints_regions_overfull(cluster_legalizer); - // Ensure that we have kept track of the number of clusters correctly. // TODO: The total_clb_num variable could probably just be replaced by // clusters().size(). VTR_ASSERT(cluster_legalizer.clusters().size() == (size_t)total_clb_num); + // Free the clustering data. + // FIXME: This struct should use standard data structures so it does not + // have to be freed like this. + free_clustering_data(packer_opts_, clustering_data); + return num_used_type_instances; } -/** - * Print the total number of used physical blocks for each pb type in the architecture - */ -void print_pb_type_count(const ClusteredNetlist& clb_nlist) { - auto& device_ctx = g_vpr_ctx.device(); - - std::map pb_type_count; - - size_t max_depth = 0; - for (ClusterBlockId blk : clb_nlist.blocks()) { - size_t pb_max_depth = update_pb_type_count(clb_nlist.block_pb(blk), pb_type_count, 0); - - max_depth = std::max(max_depth, pb_max_depth); - } - - size_t max_pb_type_name_chars = 0; - for (auto& pb_type : pb_type_count) { - max_pb_type_name_chars = std::max(max_pb_type_name_chars, strlen(pb_type.first->name)); - } - - VTR_LOG("\nPb types usage...\n"); - for (const auto& logical_block_type : device_ctx.logical_block_types) { - if (!logical_block_type.pb_type) continue; - - print_pb_type_count_recurr(logical_block_type.pb_type, max_pb_type_name_chars + max_depth, 0, pb_type_count); - } - VTR_LOG("\n"); -} diff --git a/vpr/src/pack/greedy_clusterer.h b/vpr/src/pack/greedy_clusterer.h new file mode 100644 index 00000000000..816043c91b4 --- /dev/null +++ b/vpr/src/pack/greedy_clusterer.h @@ -0,0 +1,163 @@ +/** + * @file + * @author Alex Singer + * @date November 2024 + * @brief The declarations of the Greedy Clusterer class which is used to + * encapsulate the process of greedy clustering. + */ + +#pragma once + +#include +#include +#include "physical_types.h" + +// Forward declarations +class AtomNetId; +class AtomNetlist; +class AttractionInfo; +class ClusterLegalizer; +class Prepacker; +struct t_analysis_opts; +struct t_clustering_data; +struct t_pack_high_fanout_thresholds; +struct t_packer_opts; + +/** + * @brief A clusterer that generates clusters by greedily choosing the clusters + * which appear to have the best gain for a given neighbor. + * + * This clusterer generates one cluster at a time by finding candidate molecules + * and selecting the molecule with the highest gain. + * + * The clusterer takes an Atom Netlist which has be pre-packed into pack + * patterns (e.g. carry chains) as input and produces a set of legal clusters + * of these pack molecules as output. Legality here means that it was able to + * find a valid intra-lb route for the inputs of the clusters, through the + * internal molecules, and to the outputs of the clusters. + */ +class GreedyClusterer { +public: + /** + * @brief Constructor of the Greedy Clusterer class. + * + * The clusterer may be invoked many times during the packing flow. This + * constructor will pre-compute information before clustering which can + * improve the performance of the clusterer. + * + * @param packer_opts + * Options passed by the user to configure the packing and + * clustering algorithms. + * @param analysis_opts + * Options passed by the user to configure timing analysis in + * the clusterer. + * @param atom_netlist + * The atom netlist to cluster over. + * @param arch + * The architecture to cluster over. + * @param high_fanout_thresholds + * The thresholds for what to consider as a high-fanout net + * for each logical block type. The clusterer will not consider + * nets with fanout higher than this to be important in + * candidate block selection (gain computation). + * A reason for it being per block type is that some blocks, + * like RAMs, have weak gains to other RAM primitives due to + * fairly high fanout address nets, so a higher fanout + * threshold for them is useful in generating a more dense + * packing. + * @param is_clock + * The set of clock nets in the Atom Netlist. + * @param is_global + * The set of global nets in the Atom Netlist. These will be + * routed on special dedicated networks, and hence are less + * relavent to locality / attraction. + */ + GreedyClusterer(const t_packer_opts& packer_opts, + const t_analysis_opts& analysis_opts, + const AtomNetlist& atom_netlist, + const t_arch* arch, + const t_pack_high_fanout_thresholds& high_fanout_thresholds, + const std::unordered_set& is_clock, + const std::unordered_set& is_global); + + /** + * @brief Performs clustering on the pack molecules formed by the prepacker. + * + * The clustering is contained within the Cluster Legalizer. + * + * @param cluster_legalizer + * The cluster legalizer which is used to create clusters and + * grow clusters by adding molecules to a cluster. + * @param prepacker + * The prepacker object which contains the pack molecules that + * are atoms which are pre-packed before the main clustering + * (due to pack patterns, e.g. carry chains). + * @param allow_unrelated_clustering + * Allows primitives which have no attraction to the given + * cluster to be packed into it. This can lead to a denser + * packing, but tends to be bad for wirelength and timing. + * @param balance_block_type_utilization + * When true, tries to create clusters that balance the logical + * block type utilization. This is useful when some primitives + * have multiple logical block types to which they can cluster, + * e.g. multiple sizes of physical RAMs exist on the chip. + * @param attraction_groups + * Information on the attraction groups used during the + * clustering process. These are groups of primitives that have + * extra attraction to each other; currently they are used to + * guide the clusterer when it must cluster some parts of a + * design densely due to user placement/floorplanning + * constraints. They are created if some floorplan regions are + * overfilled after a clustering attempt. + * + * @return num_used_type_instances + * The number of used logical blocks of each type by the + * clustering. This information may be useful when detecting + * if the clustering can fit on the device. + */ + std::map + do_clustering(ClusterLegalizer& cluster_legalizer, + Prepacker& prepacker, + bool allow_unrelated_clustering, + bool balance_block_type_utilization, + AttractionInfo& attraction_groups); + +private: + /* + * When attraction groups are created, the purpose is to pack more densely by adding more molecules + * from the cluster's attraction group to the cluster. In a normal flow, (when attraction groups are + * not on), the cluster keeps being packed until the get_molecule routines return either a repeated + * molecule or a nullptr. When attraction groups are on, we want to keep exploring molecules for the + * cluster until a nullptr is returned. So, the number of repeated molecules is changed from 1 to 500, + * effectively making the clusterer pack a cluster until a nullptr is returned. + */ + static constexpr int attraction_groups_max_repeated_molecules_ = 500; + + /// @brief The packer options used to configure the clusterer. + const t_packer_opts& packer_opts_; + + /// @brief The analysis options used to configure timing analysis within the + /// clusterer. + const t_analysis_opts& analysis_opts_; + + /// @brief The atom netlist to cluster over. + const AtomNetlist& atom_netlist_; + + /// @brief The device architecture to cluster onto. + const t_arch* arch_ = nullptr; + + /// @brief The high-fanout thresholds per logical block type. Used to ignore + /// certain nets when calculating the gain for the next candidate + /// molecule to cluster. + const t_pack_high_fanout_thresholds& high_fanout_thresholds_; + + /// @brief A set of atom nets which are considered as clocks. + const std::unordered_set& is_clock_; + + /// @brief A set of atom nets which are considered as global nets. + const std::unordered_set& is_global_; + + /// @brief Pre-computed logical block types for each model in the architecture. + std::map> primitive_candidate_block_types_; +}; + diff --git a/vpr/src/pack/greedy_seed_selector.cpp b/vpr/src/pack/greedy_seed_selector.cpp new file mode 100644 index 00000000000..6421cef5f19 --- /dev/null +++ b/vpr/src/pack/greedy_seed_selector.cpp @@ -0,0 +1,241 @@ +/** + * @file + * @author Alex Singer + * @date November 2024 + * @brief The definitions of the Greedy Seed Selector class. + */ + +#include "greedy_seed_selector.h" + +#include +#include "atom_netlist.h" +#include "cluster_legalizer.h" +#include "cluster_util.h" +#include "echo_files.h" +#include "prepack.h" +#include "vpr_error.h" +#include "vpr_types.h" +#include "vtr_assert.h" +#include "vtr_math.h" +#include "vtr_vector.h" + +/** + * @brief Helper method that computes the seed gain of the given atom block. + * + * The seed_type variable selects which algorithm to use to compute the seed + * gain. + */ +static inline float get_seed_gain(AtomBlockId blk_id, + const AtomNetlist& atom_netlist, + const Prepacker& prepacker, + const e_cluster_seed seed_type, + const t_molecule_stats& max_molecule_stats, + const vtr::vector& atom_criticality) { + switch (seed_type) { + // By criticality. + // Intuition: starting a cluster with primitives that have timing- + // critical connections may help timing. + case e_cluster_seed::TIMING: + return atom_criticality[blk_id]; + // By number of used molecule input pins. + // Intuition: molecules that use more inputs can be difficult to legally + // pack into partially full clusters. Use them as seeds + // instead. + case e_cluster_seed::MAX_INPUTS: + { + const t_pack_molecule* blk_mol = prepacker.get_atom_molecule(blk_id); + const t_molecule_stats molecule_stats = calc_molecule_stats(blk_mol, atom_netlist); + return molecule_stats.num_used_ext_inputs; + } + // By blended gain (criticality and inputs used). + case e_cluster_seed::BLEND: + { + // Score seed gain of each block as a weighted sum of timing + // criticality, number of tightly coupled blocks connected to + // it, and number of external inputs. + float seed_blend_fac = 0.5f; + + const t_pack_molecule* blk_mol = prepacker.get_atom_molecule(blk_id); + const t_molecule_stats molecule_stats = calc_molecule_stats(blk_mol, atom_netlist); + VTR_ASSERT(max_molecule_stats.num_used_ext_inputs > 0); + + float used_ext_input_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_inputs, max_molecule_stats.num_used_ext_inputs); + float blend_gain = (seed_blend_fac * atom_criticality[blk_id] + + (1 - seed_blend_fac) * used_ext_input_pin_ratio); + blend_gain *= (1 + 0.2 * (molecule_stats.num_blocks - 1)); + return blend_gain; + } + // By pins per molecule (i.e. available pins on primitives, not pins in use). + // Intuition (a weak one): primitive types with more pins might be + // harder to pack. + case e_cluster_seed::MAX_PINS: + { + const t_pack_molecule* blk_mol = prepacker.get_atom_molecule(blk_id); + const t_molecule_stats molecule_stats = calc_molecule_stats(blk_mol, atom_netlist); + return molecule_stats.num_pins; + } + // By input pins per molecule (i.e. available pins on primitives, not pins in use). + // Intuition (a weak one): primitive types with more input pins might be + // harder to pack. + case e_cluster_seed::MAX_INPUT_PINS: + { + const t_pack_molecule* blk_mol = prepacker.get_atom_molecule(blk_id); + const t_molecule_stats molecule_stats = calc_molecule_stats(blk_mol, atom_netlist); + return molecule_stats.num_input_pins; + } + case e_cluster_seed::BLEND2: + { + const t_pack_molecule* mol = prepacker.get_atom_molecule(blk_id); + const t_molecule_stats molecule_stats = calc_molecule_stats(mol, atom_netlist); + + float pin_ratio = vtr::safe_ratio(molecule_stats.num_pins, max_molecule_stats.num_pins); + float input_pin_ratio = vtr::safe_ratio(molecule_stats.num_input_pins, max_molecule_stats.num_input_pins); + float output_pin_ratio = vtr::safe_ratio(molecule_stats.num_output_pins, max_molecule_stats.num_output_pins); + float used_ext_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_pins, max_molecule_stats.num_used_ext_pins); + float used_ext_input_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_inputs, max_molecule_stats.num_used_ext_inputs); + float used_ext_output_pin_ratio = vtr::safe_ratio(molecule_stats.num_used_ext_outputs, max_molecule_stats.num_used_ext_outputs); + float num_blocks_ratio = vtr::safe_ratio(molecule_stats.num_blocks, max_molecule_stats.num_blocks); + float criticality = atom_criticality[blk_id]; + + constexpr float PIN_WEIGHT = 0.; + constexpr float INPUT_PIN_WEIGHT = 0.5; + constexpr float OUTPUT_PIN_WEIGHT = 0.; + constexpr float USED_PIN_WEIGHT = 0.; + constexpr float USED_INPUT_PIN_WEIGHT = 0.2; + constexpr float USED_OUTPUT_PIN_WEIGHT = 0.; + constexpr float BLOCKS_WEIGHT = 0.2; + constexpr float CRITICALITY_WEIGHT = 0.1; + + float gain = PIN_WEIGHT * pin_ratio + + INPUT_PIN_WEIGHT * input_pin_ratio + + OUTPUT_PIN_WEIGHT * output_pin_ratio + + + USED_PIN_WEIGHT * used_ext_pin_ratio + + USED_INPUT_PIN_WEIGHT * used_ext_input_pin_ratio + + USED_OUTPUT_PIN_WEIGHT * used_ext_output_pin_ratio + + + BLOCKS_WEIGHT * num_blocks_ratio + + CRITICALITY_WEIGHT * criticality; + + return gain; + } + default: + VPR_FATAL_ERROR(VPR_ERROR_PACK, "Unrecognized cluster seed type"); + return 0.f; + } +} + +/** + * @brief Helper method to print the seed gains of each Atom block and their + * criticalities. + */ +static inline void print_seed_gains(const char* fname, + const std::vector& seed_atoms, + const vtr::vector& atom_gain, + const vtr::vector& atom_criticality, + const AtomNetlist& atom_netlist) { + FILE* fp = vtr::fopen(fname, "w"); + + // For pretty formatting determine the maximum name length + int max_name_len = strlen("atom_block_name"); + int max_type_len = strlen("atom_block_type"); + for (auto blk_id : atom_netlist.blocks()) { + max_name_len = std::max(max_name_len, (int)atom_netlist.block_name(blk_id).size()); + + const t_model* model = atom_netlist.block_model(blk_id); + max_type_len = std::max(max_type_len, (int)strlen(model->name)); + } + + fprintf(fp, "%-*s %-*s %8s %8s\n", max_name_len, "atom_block_name", max_type_len, "atom_block_type", "gain", "criticality"); + fprintf(fp, "\n"); + for (auto blk_id : seed_atoms) { + std::string name = atom_netlist.block_name(blk_id); + fprintf(fp, "%-*s ", max_name_len, name.c_str()); + + const t_model* model = atom_netlist.block_model(blk_id); + fprintf(fp, "%-*s ", max_type_len, model->name); + + fprintf(fp, "%*f ", std::max((int)strlen("gain"), 8), atom_gain[blk_id]); + fprintf(fp, "%*f ", std::max((int)strlen("criticality"), 8), atom_criticality[blk_id]); + fprintf(fp, "\n"); + } + + fclose(fp); +} + +GreedySeedSelector::GreedySeedSelector(const AtomNetlist& atom_netlist, + const Prepacker& prepacker, + const e_cluster_seed seed_type, + const t_molecule_stats& max_molecule_stats, + const vtr::vector& atom_criticality) + : seed_atoms_(atom_netlist.blocks().begin(), atom_netlist.blocks().end()) { + // Seed atoms list is initialized with all atoms in the atom netlist. + + // Maintain a lookup table of the seed gain for each atom. This will be + // used to sort the seed atoms. + // Initially all gains are zero. + vtr::vector atom_gains(atom_netlist.blocks().size(), 0.f); + + // Get the seed gain of each atom. + for (AtomBlockId blk_id : atom_netlist.blocks()) { + atom_gains[blk_id] = get_seed_gain(blk_id, + atom_netlist, + prepacker, + seed_type, + max_molecule_stats, + atom_criticality); + } + + // Sort seeds in descending order of seed gain (i.e. highest seed gain first) + // + // Note that we use a *stable* sort here. It has been observed that different + // standard library implementations (e.g. gcc-4.9 vs gcc-5) use sorting algorithms + // which produce different orderings for seeds of equal gain (which is allowed with + // std::sort which does not specify how equal values are handled). Using a stable + // sort ensures that regardless of the underlying sorting algorithm the same seed + // order is produced regardless of compiler. + auto by_descending_gain = [&](const AtomBlockId lhs, const AtomBlockId rhs) { + return atom_gains[lhs] > atom_gains[rhs]; + }; + std::stable_sort(seed_atoms_.begin(), seed_atoms_.end(), by_descending_gain); + + // Print the seed gains if requested. + if (getEchoEnabled() && isEchoFileEnabled(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES)) { + print_seed_gains(getEchoFileName(E_ECHO_CLUSTERING_BLOCK_CRITICALITIES), + seed_atoms_, atom_gains, atom_criticality, atom_netlist); + } + + // Set the starting seed index (the index of the first molecule to propose). + // The index of the first seed to propose is the first molecule in the + // seed atoms vector (i.e. the one with the highest seed gain). + seed_index_ = 0; +} + +t_pack_molecule* GreedySeedSelector::get_next_seed(const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer) { + while (seed_index_ < seed_atoms_.size()) { + // Get the current seed atom at the seed index and increment the + // seed index. + // All previous seed indices have been either proposed already or + // are already clustered. This process assumes that once an atom + // is clustered it will never become unclustered. + AtomBlockId seed_blk_id = seed_atoms_[seed_index_++]; + + // If this atom has been clustered, it cannot be proposed as a seed. + // Skip to the next seed. + if (cluster_legalizer.is_atom_clustered(seed_blk_id)) + continue; + + // Get the molecule that contains this atom and return it as the + // next seed. + t_pack_molecule* seed_molecule = prepacker.get_atom_molecule(seed_blk_id); + VTR_ASSERT(!cluster_legalizer.is_mol_clustered(seed_molecule)); + return seed_molecule; + } + + // If the previous loop does not return a molecule, it implies that all + // atoms have been clustered or have already been proposed as a seed. + // Return nullptr to signify that there are no further seeds. + return nullptr; +} + diff --git a/vpr/src/pack/greedy_seed_selector.h b/vpr/src/pack/greedy_seed_selector.h new file mode 100644 index 00000000000..f6eee80da4b --- /dev/null +++ b/vpr/src/pack/greedy_seed_selector.h @@ -0,0 +1,97 @@ +/** + * @file + * @author Alex Singer + * @date November 2024 + * @brief The declaration of the greedy seed selector class which selects the + * seed molecules for starting new clusters in the greedy clusterer. + */ + +#pragma once + +#include "vpr_types.h" + +// Forward declarations +class AtomNetlist; +class ClusterLegalizer; +class Prepacker; +struct t_molecule_stats; + +/** + * @brief A selector class which will propose good seed values to start new + * clusters in the greedy clusterer. + * + * In greedy clustering algorithms, the order in which clusters are generated + * can have an effect on the quality of the clustering. This class proposes + * good seed molecules based on heuristics which give each molecule a "seed + * gain". This class will not propose a molecule which it has already proposed + * or has already been clustered. + */ +class GreedySeedSelector { +public: + /** + * @brief Constructor of the Greedy Seed Selector class. Pre-computes the + * gains of each molecule internally to make getting seeds later very + * quick. + * + * @param atom_netlist + * The netlist of atoms to cluster. + * @param prepacker + * The prepacker used to generate pack-pattern molecules of the + * atoms in the netlist. + * @param seed_type + * Controls the algorithm used to compute the seed gain for + * each molecule. + * @param max_molecule_stats + * The maximum stats over all molecules. Used for normalizing + * terms in the gain. + * @param atom_criticality + * The timing criticality of each atom. + */ + GreedySeedSelector(const AtomNetlist& atom_netlist, + const Prepacker& prepacker, + const e_cluster_seed seed_type, + const t_molecule_stats& max_molecule_stats, + const vtr::vector& atom_criticality); + + /** + * @brief Propose a new seed molecule to start a new cluster with. If no + * unclustered molecules exist, will return nullptr. + * + * This method will never return a molecule which has already been clustered + * (according to the cluster legalizer) and will never propose a molecule + * that it already proposed. + * + * This method assumes that once a molecule is clustered, it will never be + * unclustered. + * + * @param prepacker + * The prepacker object that stores the molecules. + * @param cluster_legalizer + * The cluster legalizer object that is used to create the + * clusters. This is used to check if a molecule has already + * been clustered or not. + */ + t_pack_molecule* get_next_seed(const Prepacker& prepacker, + const ClusterLegalizer& cluster_legalizer); + + // TODO: Maybe create an update_seed_gains method to update the seed atoms + // list using current clustering information. + +private: + + /// @brief The index of the next seed to propose in the seed_atoms vector. + /// This is set to 0 in the constructor and incremented as more seeds + /// are proposed. + size_t seed_index_; + + /// @brief A list of seed atoms, sorted in decreasing order of gain. This + /// is computed in the constructor and is traversed when a new seed + /// is being proposed. + // FIXME: This should really be seed molecules. It looks like the only + // reason it isn't is because of the atom criticality. May want to + // create the concept of molecule criticality. Currently, the max + // criticality of any block in the molecule is technically being + // used. + std::vector seed_atoms_; +}; + diff --git a/vpr/src/pack/pack.cpp b/vpr/src/pack/pack.cpp index dae3443900c..73970032131 100644 --- a/vpr/src/pack/pack.cpp +++ b/vpr/src/pack/pack.cpp @@ -1,10 +1,11 @@ #include #include "SetupGrid.h" -#include "cluster.h" #include "cluster_legalizer.h" #include "cluster_util.h" +#include "constraints_report.h" #include "globals.h" +#include "greedy_clusterer.h" #include "pack.h" #include "prepack.h" #include "vpr_context.h" @@ -29,7 +30,6 @@ bool try_pack(t_packer_opts* packer_opts, const DeviceContext& device_ctx = g_vpr_ctx.device(); std::unordered_set is_clock, is_global; - t_clustering_data clustering_data; VTR_LOG("Begin packing '%s'.\n", packer_opts->circuit_file_name.c_str()); is_clock = alloc_and_load_is_clock(); @@ -91,7 +91,6 @@ bool try_pack(t_packer_opts* packer_opts, } int pack_iteration = 1; - bool floorplan_regions_overfull = false; // Initialize the cluster legalizer. ClusterLegalizer cluster_legalizer(atom_ctx.nlist, @@ -110,27 +109,25 @@ bool try_pack(t_packer_opts* packer_opts, VTR_LOG("Packing with pin utilization targets: %s\n", cluster_legalizer.get_target_external_pin_util().to_string().c_str()); VTR_LOG("Packing with high fanout thresholds: %s\n", high_fanout_thresholds.to_string().c_str()); - while (true) { - free_clustering_data(*packer_opts, clustering_data); - + // Initialize the greedy clusterer. + GreedyClusterer clusterer(*packer_opts, + *analysis_opts, + atom_ctx.nlist, + arch, + high_fanout_thresholds, + is_clock, + is_global); + while (true) { //Cluster the netlist // num_used_type_instances: A map used to save the number of used // instances from each logical block type. std::map num_used_type_instances; - num_used_type_instances = do_clustering(*packer_opts, - *analysis_opts, - arch, - prepacker, - cluster_legalizer, - is_clock, - is_global, - allow_unrelated_clustering, - balance_block_type_util, - attraction_groups, - floorplan_regions_overfull, - high_fanout_thresholds, - clustering_data); + num_used_type_instances = clusterer.do_clustering(cluster_legalizer, + prepacker, + allow_unrelated_clustering, + balance_block_type_util, + attraction_groups); //Try to size/find a device bool fits_on_device = try_size_device_grid(*arch, num_used_type_instances, packer_opts->target_device_utilization, packer_opts->device_layout); @@ -139,6 +136,7 @@ bool try_pack(t_packer_opts* packer_opts, * is not dense enough and there are floorplan constraints, it is presumed that the constraints are the cause * of the floorplan not fitting, so attraction groups are turned on for later iterations. */ + bool floorplan_regions_overfull = floorplan_constraints_regions_overfull(cluster_legalizer); bool floorplan_not_fitting = (floorplan_regions_overfull || g_vpr_ctx.floorplanning().constraints.get_num_partitions() > 0); if (fits_on_device && !floorplan_regions_overfull) { @@ -261,9 +259,6 @@ bool try_pack(t_packer_opts* packer_opts, //check clustering and output it check_and_output_clustering(cluster_legalizer, *packer_opts, is_clock, arch); - // Free Data Structures - free_clustering_data(*packer_opts, clustering_data); - VTR_LOG("\n"); VTR_LOG("Netlist conversion complete.\n"); VTR_LOG("\n"); diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/move_generators/centroid_move_generator.cpp similarity index 100% rename from vpr/src/place/centroid_move_generator.cpp rename to vpr/src/place/move_generators/centroid_move_generator.cpp diff --git a/vpr/src/place/centroid_move_generator.h b/vpr/src/place/move_generators/centroid_move_generator.h similarity index 100% rename from vpr/src/place/centroid_move_generator.h rename to vpr/src/place/move_generators/centroid_move_generator.h diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/move_generators/critical_uniform_move_generator.cpp similarity index 100% rename from vpr/src/place/critical_uniform_move_generator.cpp rename to vpr/src/place/move_generators/critical_uniform_move_generator.cpp diff --git a/vpr/src/place/critical_uniform_move_generator.h b/vpr/src/place/move_generators/critical_uniform_move_generator.h similarity index 100% rename from vpr/src/place/critical_uniform_move_generator.h rename to vpr/src/place/move_generators/critical_uniform_move_generator.h diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/move_generators/feasible_region_move_generator.cpp similarity index 100% rename from vpr/src/place/feasible_region_move_generator.cpp rename to vpr/src/place/move_generators/feasible_region_move_generator.cpp diff --git a/vpr/src/place/feasible_region_move_generator.h b/vpr/src/place/move_generators/feasible_region_move_generator.h similarity index 100% rename from vpr/src/place/feasible_region_move_generator.h rename to vpr/src/place/move_generators/feasible_region_move_generator.h diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/move_generators/manual_move_generator.cpp similarity index 100% rename from vpr/src/place/manual_move_generator.cpp rename to vpr/src/place/move_generators/manual_move_generator.cpp diff --git a/vpr/src/place/manual_move_generator.h b/vpr/src/place/move_generators/manual_move_generator.h similarity index 100% rename from vpr/src/place/manual_move_generator.h rename to vpr/src/place/move_generators/manual_move_generator.h diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/move_generators/median_move_generator.cpp similarity index 100% rename from vpr/src/place/median_move_generator.cpp rename to vpr/src/place/move_generators/median_move_generator.cpp diff --git a/vpr/src/place/median_move_generator.h b/vpr/src/place/move_generators/median_move_generator.h similarity index 100% rename from vpr/src/place/median_move_generator.h rename to vpr/src/place/move_generators/median_move_generator.h diff --git a/vpr/src/place/move_generator.cpp b/vpr/src/place/move_generators/move_generator.cpp similarity index 100% rename from vpr/src/place/move_generator.cpp rename to vpr/src/place/move_generators/move_generator.cpp diff --git a/vpr/src/place/move_generator.h b/vpr/src/place/move_generators/move_generator.h similarity index 100% rename from vpr/src/place/move_generator.h rename to vpr/src/place/move_generators/move_generator.h diff --git a/vpr/src/place/simpleRL_move_generator.cpp b/vpr/src/place/move_generators/simpleRL_move_generator.cpp similarity index 100% rename from vpr/src/place/simpleRL_move_generator.cpp rename to vpr/src/place/move_generators/simpleRL_move_generator.cpp diff --git a/vpr/src/place/simpleRL_move_generator.h b/vpr/src/place/move_generators/simpleRL_move_generator.h similarity index 100% rename from vpr/src/place/simpleRL_move_generator.h rename to vpr/src/place/move_generators/simpleRL_move_generator.h diff --git a/vpr/src/place/static_move_generator.cpp b/vpr/src/place/move_generators/static_move_generator.cpp similarity index 100% rename from vpr/src/place/static_move_generator.cpp rename to vpr/src/place/move_generators/static_move_generator.cpp diff --git a/vpr/src/place/static_move_generator.h b/vpr/src/place/move_generators/static_move_generator.h similarity index 100% rename from vpr/src/place/static_move_generator.h rename to vpr/src/place/move_generators/static_move_generator.h diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/move_generators/uniform_move_generator.cpp similarity index 100% rename from vpr/src/place/uniform_move_generator.cpp rename to vpr/src/place/move_generators/uniform_move_generator.cpp diff --git a/vpr/src/place/uniform_move_generator.h b/vpr/src/place/move_generators/uniform_move_generator.h similarity index 100% rename from vpr/src/place/uniform_move_generator.h rename to vpr/src/place/move_generators/uniform_move_generator.h diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/move_generators/weighted_centroid_move_generator.cpp similarity index 100% rename from vpr/src/place/weighted_centroid_move_generator.cpp rename to vpr/src/place/move_generators/weighted_centroid_move_generator.cpp diff --git a/vpr/src/place/weighted_centroid_move_generator.h b/vpr/src/place/move_generators/weighted_centroid_move_generator.h similarity index 100% rename from vpr/src/place/weighted_centroid_move_generator.h rename to vpr/src/place/move_generators/weighted_centroid_move_generator.h diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/move_generators/weighted_median_move_generator.cpp similarity index 100% rename from vpr/src/place/weighted_median_move_generator.cpp rename to vpr/src/place/move_generators/weighted_median_move_generator.cpp diff --git a/vpr/src/place/weighted_median_move_generator.h b/vpr/src/place/move_generators/weighted_median_move_generator.h similarity index 99% rename from vpr/src/place/weighted_median_move_generator.h rename to vpr/src/place/move_generators/weighted_median_move_generator.h index 79f53665382..a6041f13e87 100644 --- a/vpr/src/place/weighted_median_move_generator.h +++ b/vpr/src/place/move_generators/weighted_median_move_generator.h @@ -1,5 +1,6 @@ #ifndef VPR_WEIGHTED_MEDIAN_MOVE_GEN_H #define VPR_WEIGHTED_MEDIAN_MOVE_GEN_H + #include "move_generator.h" #include "timing_place.h" diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 4cf2086c277..b5efb699fc7 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -1,7 +1,6 @@ #include "move_utils.h" #include "move_transactions.h" -#include "place_util.h" #include "globals.h" #include "vtr_random.h" diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index e5555648866..de3d771e7ae 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -286,7 +286,7 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, const std::string& move_type_to_string(e_move_type); -/* find to loaction helper functions */ +/* find to location helper functions */ /** * @brief convert compressed location to normal location * diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_no_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_no_timing/config/golden_results.txt index 5c2fe15f28f..aab4bc19474 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_no_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_no_timing/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time - k4_N10_memSize16384_memData64.xml ch_intrinsics.v common 1.91 vpr 65.59 MiB -1 -1 0.21 21296 3 0.05 -1 -1 39652 -1 -1 69 99 1 0 success d41921e Release IPO VTR_ASSERT_LEVEL=4 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:34:43 fv-az841-217 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67160 99 130 353 483 1 220 299 13 13 169 clb auto 26.9 MiB 0.03 692 29270 3600 8725 16945 65.6 MiB 0.03 0.00 30 1400 11 3.33e+06 2.19e+06 408126. 2414.95 1.08 - k4_N10_memSize16384_memData64.xml diffeq1.v common 4.43 vpr 69.27 MiB -1 -1 0.31 26352 23 0.22 -1 -1 41100 -1 -1 71 162 0 5 success d41921e Release IPO VTR_ASSERT_LEVEL=4 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:34:43 fv-az841-217 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 70936 162 96 1200 1141 1 688 334 13 13 169 clb auto 30.2 MiB 0.11 5199 75604 21039 49822 4743 69.3 MiB 0.10 0.00 54 10333 34 3.33e+06 2.58e+06 696024. 4118.48 2.85 - k4_N10_memSize16384_memData64.xml single_wire.v common 0.25 vpr 63.52 MiB -1 -1 0.05 19840 1 0.01 -1 -1 35512 -1 -1 0 1 0 0 success d41921e Release IPO VTR_ASSERT_LEVEL=4 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:34:43 fv-az841-217 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 65048 1 1 1 2 0 1 2 3 3 9 -1 auto 25.1 MiB 0.00 2 3 1 2 0 63.5 MiB 0.00 0.00 2 1 1 30000 0 1489.46 165.495 0.00 - k4_N10_memSize16384_memData64.xml single_ff.v common 0.26 vpr 63.64 MiB -1 -1 0.06 19968 1 0.01 -1 -1 35756 -1 -1 1 2 0 0 success d41921e Release IPO VTR_ASSERT_LEVEL=4 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:34:43 fv-az841-217 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 65172 2 1 3 4 1 3 4 3 3 9 -1 auto 25.2 MiB 0.00 6 9 4 1 4 63.6 MiB 0.00 0.00 18 5 1 30000 30000 3112.78 345.864 0.01 + k4_N10_memSize16384_memData64.xml ch_intrinsics.v common 2.23 vpr 62.52 MiB -1 -1 0.44 18128 3 0.11 -1 -1 33248 -1 -1 71 99 1 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64024 99 130 353 483 1 222 301 13 13 169 clb auto 22.9 MiB 0.06 730 30541 5185 13290 12066 62.5 MiB 0.05 0.00 28 1583 11 3.33e+06 2.25e+06 384474. 2275.00 0.60 + k4_N10_memSize16384_memData64.xml diffeq1.v common 3.94 vpr 66.34 MiB -1 -1 0.54 23352 23 0.30 -1 -1 34272 -1 -1 77 162 0 5 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67928 162 96 1200 1141 1 675 340 13 13 169 clb auto 26.0 MiB 0.18 5120 92848 24971 61178 6699 66.3 MiB 0.19 0.00 52 9701 16 3.33e+06 2.76e+06 671819. 3975.26 1.21 + k4_N10_memSize16384_memData64.xml single_wire.v common 0.68 vpr 60.16 MiB -1 -1 0.06 16212 1 0.03 -1 -1 29556 -1 -1 0 1 0 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61604 1 1 1 2 0 1 2 3 3 9 -1 auto 21.3 MiB 0.00 2 3 0 3 0 60.2 MiB 0.00 0.00 2 1 1 30000 0 1489.46 165.495 0.00 + k4_N10_memSize16384_memData64.xml single_ff.v common 0.73 vpr 60.14 MiB -1 -1 0.15 16376 1 0.02 -1 -1 29780 -1 -1 1 2 0 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61580 2 1 3 4 1 3 4 3 3 9 -1 auto 21.3 MiB 0.00 6 9 6 0 3 60.1 MiB 0.00 0.00 16 5 1 30000 30000 2550.78 283.420 0.01 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt index bc720ab209c..67331c4ebeb 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml ch_intrinsics.v common 6.13 vpr 64.31 MiB -1 -1 0.56 21584 3 0.20 -1 -1 37220 -1 -1 69 99 1 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65856 99 130 344 474 1 226 299 12 12 144 clb auto 26.1 MiB 0.13 553 74225 23267 37569 13389 64.3 MiB 0.29 0.00 2.151 -125.239 -2.151 2.151 0.51 0.000437262 0.000388316 0.0356825 0.0315033 38 1171 12 5.66058e+06 4.26669e+06 306247. 2126.71 1.35 0.168145 0.155599 10492 58364 -1 969 11 534 813 36412 10203 2.02018 2.02018 -131.044 -2.02018 -0.488017 -0.167912 388532. 2698.14 0.19 0.03 0.16 -1 -1 0.19 0.0185018 0.0174867 -k6_N10_mem32K_40nm.xml ch_intrinsics.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 6.35 vpr 64.80 MiB -1 -1 0.59 21736 3 0.23 -1 -1 37088 -1 -1 69 99 1 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66352 99 130 344 474 1 226 299 12 12 144 clb auto 26.1 MiB 0.13 553 74225 23267 37569 13389 64.8 MiB 0.26 0.00 2.151 -125.239 -2.151 2.151 0.63 0.000459627 0.000407531 0.0693116 0.0652866 38 1171 12 5.66058e+06 4.26669e+06 306247. 2126.71 1.12 0.292271 0.24972 10492 58364 -1 969 11 534 813 36412 10203 2.02018 2.02018 -131.044 -2.02018 -0.488017 -0.167912 388532. 2698.14 0.18 0.03 0.10 -1 -1 0.18 0.0210822 0.0200509 -k6_N10_mem32K_40nm.xml diffeq1.v common 15.17 vpr 68.23 MiB -1 -1 0.92 26828 15 0.68 -1 -1 38352 -1 -1 50 162 0 5 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 69864 162 96 1009 950 1 722 313 16 16 256 mult_36 auto 30.1 MiB 0.33 5538 91645 27307 55775 8563 68.2 MiB 0.63 0.01 22.3603 -1598.09 -22.3603 22.3603 1.14 0.00122557 0.00108911 0.163641 0.150499 54 11020 37 1.21132e+07 4.6747e+06 799729. 3123.94 7.11 0.905847 0.833501 22188 156650 -1 9139 25 4261 9174 1245522 324553 22.5758 22.5758 -1643.99 -22.5758 0 0 1.03873e+06 4057.55 0.36 0.31 0.12 -1 -1 0.36 0.103306 0.0972579 -k6_N10_mem32K_40nm.xml diffeq1.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 15.48 vpr 68.38 MiB -1 -1 0.96 26524 15 0.91 -1 -1 38192 -1 -1 50 162 0 5 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 70016 162 96 1009 950 1 722 313 16 16 256 mult_36 auto 30.2 MiB 0.45 5538 91645 27307 55775 8563 68.4 MiB 0.57 0.01 22.3603 -1598.09 -22.3603 22.3603 0.99 0.0013534 0.00121614 0.131191 0.118212 54 11020 37 1.21132e+07 4.6747e+06 799729. 3123.94 7.19 0.881356 0.808482 22188 156650 -1 9139 25 4261 9174 1245522 324553 22.5758 22.5758 -1643.99 -22.5758 0 0 1.03873e+06 4057.55 0.36 0.31 0.13 -1 -1 0.36 0.096959 0.0911819 -k6_N10_mem32K_40nm.xml single_wire.v common 2.44 vpr 61.77 MiB -1 -1 0.22 20216 1 0.02 -1 -1 33348 -1 -1 0 1 0 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63256 1 1 1 2 0 1 2 3 3 9 -1 auto 23.4 MiB 0.00 2 3 1 2 0 61.8 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.2847e-05 5.445e-06 7.1033e-05 3.1161e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.000162488 7.3941e-05 254 297 -1 1 1 1 1 16 7 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 7.3732e-05 3.7051e-05 -k6_N10_mem32K_40nm.xml single_wire.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 1.87 vpr 61.85 MiB -1 -1 0.12 20368 1 0.05 -1 -1 33152 -1 -1 0 1 0 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63332 1 1 1 2 0 1 2 3 3 9 -1 auto 23.5 MiB 0.00 2 3 1 2 0 61.8 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.1084e-05 4.137e-06 6.828e-05 2.8484e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.000166109 7.6652e-05 254 297 -1 1 1 1 1 16 7 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 7.7818e-05 4.1009e-05 -k6_N10_mem32K_40nm.xml single_ff.v common 1.44 vpr 61.94 MiB -1 -1 0.09 20520 1 0.06 -1 -1 33380 -1 -1 1 2 0 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63424 2 1 3 4 1 3 4 3 3 9 -1 auto 23.4 MiB 0.00 4 9 3 5 1 61.9 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.3466e-05 5.995e-06 8.4449e-05 4.5422e-05 2 2 2 53894 53894 1165.58 129.509 0.00 0.000233674 0.000134991 254 297 -1 2 2 3 3 69 42 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.000133968 8.2918e-05 -k6_N10_mem32K_40nm.xml single_ff.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 2.11 vpr 61.94 MiB -1 -1 0.07 20520 1 0.02 -1 -1 33332 -1 -1 1 2 0 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63424 2 1 3 4 1 3 4 3 3 9 -1 auto 23.4 MiB 0.00 4 9 3 5 1 61.9 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.4805e-05 7.063e-06 8.2145e-05 4.4068e-05 2 2 2 53894 53894 1165.58 129.509 0.04 0.000238174 0.000137206 254 297 -1 2 2 3 3 69 42 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.000144485 8.9592e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml ch_intrinsics.v common 3.79 vpr 64.14 MiB -1 -1 0.42 18236 3 0.09 -1 -1 33188 -1 -1 71 99 1 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65676 99 130 344 474 1 225 301 13 13 169 clb auto 24.4 MiB 0.09 670 76909 23210 36946 16753 64.1 MiB 0.26 0.00 2.16096 -124.917 -2.16096 2.16096 0.32 0.00129032 0.00122184 0.1026 0.0970333 -1 -1 -1 -1 32 1294 10 6.63067e+06 4.37447e+06 323148. 1912.12 1.31 0.41172 0.377314 11612 59521 -1 1127 11 526 869 34973 10462 1.97404 1.97404 -140.169 -1.97404 -0.343814 -0.101108 396943. 2348.77 0.10 0.05 0.06 -1 -1 0.10 0.0333808 0.0307491 + k6_N10_mem32K_40nm.xml ch_intrinsics.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 3.81 vpr 64.05 MiB -1 -1 0.41 18040 3 0.09 -1 -1 33320 -1 -1 71 99 1 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65588 99 130 344 474 1 225 301 13 13 169 clb auto 24.3 MiB 0.09 670 76909 23210 36946 16753 64.1 MiB 0.26 0.00 2.16096 -124.917 -2.16096 2.16096 0.31 0.00129523 0.00122583 0.102212 0.0966604 -1 -1 -1 -1 32 1294 10 6.63067e+06 4.37447e+06 323148. 1912.12 1.31 0.406344 0.372511 11612 59521 -1 1127 11 526 869 34973 10462 1.97404 1.97404 -140.169 -1.97404 -0.343814 -0.101108 396943. 2348.77 0.10 0.05 0.06 -1 -1 0.10 0.0333856 0.0307499 + k6_N10_mem32K_40nm.xml diffeq1.v common 11.07 vpr 67.31 MiB -1 -1 0.73 22916 15 0.35 -1 -1 34340 -1 -1 61 162 0 5 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68924 162 96 1009 950 1 665 324 16 16 256 mult_36 auto 27.9 MiB 0.28 5631 94844 28473 58959 7412 67.3 MiB 0.68 0.01 21.7383 -1576.03 -21.7383 21.7383 0.52 0.00334089 0.00313474 0.301598 0.282973 -1 -1 -1 -1 44 10661 49 1.21132e+07 5.26753e+06 665287. 2598.78 6.02 1.62204 1.48659 20656 131250 -1 8667 20 3482 8436 990185 277410 22.0559 22.0559 -1674.9 -22.0559 0 0 864808. 3378.16 0.21 0.34 0.12 -1 -1 0.21 0.151934 0.140555 + k6_N10_mem32K_40nm.xml diffeq1.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 11.23 vpr 67.06 MiB -1 -1 0.73 23204 15 0.35 -1 -1 34356 -1 -1 61 162 0 5 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68668 162 96 1009 950 1 665 324 16 16 256 mult_36 auto 27.6 MiB 0.27 5631 94844 28473 58959 7412 67.1 MiB 0.69 0.01 21.7383 -1576.03 -21.7383 21.7383 0.52 0.00336493 0.00315749 0.301999 0.283119 -1 -1 -1 -1 44 10661 49 1.21132e+07 5.26753e+06 665287. 2598.78 6.18 1.63915 1.50303 20656 131250 -1 8667 20 3482 8436 990185 277410 22.0559 22.0559 -1674.9 -22.0559 0 0 864808. 3378.16 0.21 0.34 0.12 -1 -1 0.21 0.151674 0.140243 + k6_N10_mem32K_40nm.xml single_wire.v common 0.71 vpr 61.63 MiB -1 -1 0.15 16380 1 0.02 -1 -1 29720 -1 -1 0 1 0 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63108 1 1 1 2 0 1 2 3 3 9 -1 auto 23.0 MiB 0.00 2 3 0 3 0 61.6 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.0494e-05 7.076e-06 7.8316e-05 5.7044e-05 -1 -1 -1 -1 2 1 1 53894 0 1165.58 129.509 0.00 0.00113075 0.00106709 254 297 -1 1 1 1 1 15 7 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00105433 0.00102822 + k6_N10_mem32K_40nm.xml single_wire.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.70 vpr 61.38 MiB -1 -1 0.14 16336 1 0.02 -1 -1 29760 -1 -1 0 1 0 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62848 1 1 1 2 0 1 2 3 3 9 -1 auto 22.7 MiB 0.00 2 3 0 3 0 61.4 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.0478e-05 7.086e-06 6.5653e-05 4.7198e-05 -1 -1 -1 -1 2 1 1 53894 0 1165.58 129.509 0.00 0.00141342 0.00135618 254 297 -1 1 1 1 1 15 7 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00109338 0.00106763 + k6_N10_mem32K_40nm.xml single_ff.v common 0.72 vpr 61.40 MiB -1 -1 0.12 16364 1 0.02 -1 -1 29716 -1 -1 1 2 0 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62872 2 1 3 4 1 3 4 3 3 9 -1 auto 22.8 MiB 0.00 6 9 3 5 1 61.4 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.5219e-05 1.1422e-05 0.000111249 8.9402e-05 -1 -1 -1 -1 2 2 2 53894 53894 1165.58 129.509 0.00 0.00146865 0.00138013 254 297 -1 2 2 3 3 56 20 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00114176 0.00110413 + k6_N10_mem32K_40nm.xml single_ff.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.75 vpr 61.35 MiB -1 -1 0.14 16260 1 0.02 -1 -1 29632 -1 -1 1 2 0 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62820 2 1 3 4 1 3 4 3 3 9 -1 auto 22.7 MiB 0.00 6 9 3 5 1 61.3 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.5145e-05 1.1318e-05 0.000103946 8.1944e-05 -1 -1 -1 -1 2 2 2 53894 53894 1165.58 129.509 0.00 0.00129416 0.0012252 254 297 -1 2 2 3 3 56 20 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00133017 0.00128358 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing_no_sdc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing_no_sdc/config/golden_results.txt index c8553228279..f8224ce61bf 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing_no_sdc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing_no_sdc/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml mkPktMerge.v common 17.57 vpr 70.20 MiB -1 -1 1.91 28576 2 0.25 -1 -1 38284 -1 -1 32 311 15 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 71888 311 156 972 1128 1 953 514 28 28 784 memory auto 31.8 MiB 0.82 8193 193966 69704 114383 9879 70.2 MiB 0.84 0.02 4.25634 -4335.96 -4.25634 4.25634 2.18 0.00242851 0.00203716 0.261558 0.220104 40 13464 15 4.25198e+07 9.94461e+06 2.03169e+06 2591.44 4.67 0.896776 0.789976 62360 400487 -1 12535 13 2659 3089 851389 226316 4.61366 4.61366 -4967.31 -4.61366 -20.0771 -0.341744 2.55406e+06 3257.73 0.96 0.26 0.29 -1 -1 0.96 0.131411 0.12325 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml mkPktMerge.v common 14.48 vpr 69.41 MiB -1 -1 1.43 25504 2 0.13 -1 -1 33808 -1 -1 43 311 15 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71080 311 156 972 1128 1 953 525 28 28 784 memory auto 28.9 MiB 0.44 9159 207991 76469 122068 9454 69.4 MiB 1.18 0.02 4.10864 -4363.81 -4.10864 4.10864 1.88 0.00581049 0.00492665 0.571738 0.503271 -1 -1 -1 -1 38 14134 13 4.25198e+07 1.05374e+07 1.95643e+06 2495.44 4.44 1.4407 1.2729 61576 387106 -1 13120 12 2507 3155 746004 220560 4.19903 4.19903 -4897.24 -4.19903 -19.5582 -0.360359 2.46901e+06 3149.24 0.67 0.31 0.33 -1 -1 0.67 0.171757 0.154277 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic/hdl_include_yosys/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic/hdl_include_yosys/config/golden_results.txt index 91baa7766ae..02aded8804a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic/hdl_include_yosys/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic/hdl_include_yosys/config/golden_results.txt @@ -1,2 +1,2 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time -k4_N10_memSize16384_memData64.xml ch_intrinsics_modified.v common 5.60 vpr 63.80 MiB -1 -1 0.54 21584 3 0.16 -1 -1 36916 -1 -1 69 99 1 0 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:46:43 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65332 99 130 353 483 1 220 299 13 13 169 clb auto 24.9 MiB 0.11 530 30269 3558 8528 18183 63.8 MiB 0.09 0.00 38 1242 8 3.33e+06 2.19e+06 504671. 2986.22 2.07 +k4_N10_memSize16384_memData64.xml ch_intrinsics_modified.v common 2.65 vpr 62.39 MiB -1 -1 0.47 18396 3 0.09 -1 -1 33152 -1 -1 71 99 1 0 success v8.0.0-11851-gfde0f8fc1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T14:30:30 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63892 99 130 353 483 1 222 301 13 13 169 clb auto 22.7 MiB 0.06 723 26509 3069 10019 13421 62.4 MiB 0.04 0.00 28 1598 8 3.33e+06 2.25e+06 384474. 2275.00 0.98 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_no_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_no_timing/config/golden_results.txt index fc925eb26dd..68c5f54f784 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_no_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_no_timing/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time - k4_N10_memSize16384_memData64.xml ch_intrinsics.v common 1.31 vpr 65.73 MiB 0.02 9472 -1 -1 4 0.19 -1 -1 42360 -1 -1 72 99 1 0 success d41921e Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:25:31 fv-az1536-937 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67304 99 130 378 508 1 260 302 13 13 169 clb auto 27.0 MiB 0.03 975 80250 22205 36468 21577 65.7 MiB 0.08 0.00 36 1771 10 3.33e+06 2.28e+06 481319. 2848.04 0.42 - k4_N10_memSize16384_memData64.xml diffeq1.v common 3.61 vpr 69.33 MiB 0.02 9472 -1 -1 23 0.20 -1 -1 41432 -1 -1 72 162 0 5 success d41921e Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:25:31 fv-az1536-937 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 70992 162 96 1214 1147 1 676 335 13 13 169 clb auto 30.4 MiB 0.12 4968 89886 25356 58643 5887 69.3 MiB 0.12 0.00 52 9486 14 3.33e+06 2.61e+06 671819. 3975.26 2.33 - k4_N10_memSize16384_memData64.xml single_wire.v common 0.21 vpr 63.40 MiB 0.01 5888 -1 -1 1 0.01 -1 -1 35384 -1 -1 0 1 0 0 success d41921e Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:25:31 fv-az1536-937 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64920 1 1 1 2 0 1 2 3 3 9 -1 auto 25.1 MiB 0.00 2 3 1 2 0 63.4 MiB 0.00 0.00 2 1 1 30000 0 1489.46 165.495 0.00 - k4_N10_memSize16384_memData64.xml single_ff.v common 0.20 vpr 63.39 MiB 0.01 5760 -1 -1 1 0.01 -1 -1 33768 -1 -1 1 2 0 0 success d41921e Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-23T16:25:31 fv-az1536-937 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64916 2 1 3 4 1 3 4 3 3 9 -1 auto 25.1 MiB 0.00 6 9 4 1 4 63.4 MiB 0.00 0.00 18 5 1 30000 30000 3112.78 345.864 0.01 + k4_N10_memSize16384_memData64.xml ch_intrinsics.v common 3.06 vpr 62.63 MiB 0.05 9228 -1 -1 4 0.26 -1 -1 34628 -1 -1 78 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64132 99 130 378 508 1 260 308 14 14 196 clb auto 23.1 MiB 0.07 836 35634 7872 13338 14424 62.6 MiB 0.06 0.00 30 1863 18 4.32e+06 2.46e+06 504535. 2574.16 1.49 + k4_N10_memSize16384_memData64.xml diffeq1.v common 3.71 vpr 66.76 MiB 0.03 9312 -1 -1 23 0.28 -1 -1 34812 -1 -1 78 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68360 162 96 1214 1147 1 691 341 14 14 196 clb auto 26.3 MiB 0.20 5391 114581 32074 75067 7440 66.8 MiB 0.23 0.00 50 10696 14 4.32e+06 2.79e+06 792225. 4041.96 1.36 + k4_N10_memSize16384_memData64.xml single_wire.v common 0.50 vpr 60.26 MiB 0.03 6196 -1 -1 1 0.02 -1 -1 29884 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61708 1 1 1 2 0 1 2 3 3 9 -1 auto 21.5 MiB 0.00 2 3 0 3 0 60.3 MiB 0.00 0.00 2 1 1 30000 0 1489.46 165.495 0.00 + k4_N10_memSize16384_memData64.xml single_ff.v common 0.50 vpr 60.32 MiB 0.01 6248 -1 -1 1 0.02 -1 -1 29888 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61772 2 1 3 4 1 3 4 3 3 9 -1 auto 21.6 MiB 0.00 6 9 6 0 3 60.3 MiB 0.00 0.00 16 5 1 30000 30000 2550.78 283.420 0.01 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing/config/golden_results.txt index e367009c5ce..ef84b66a484 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml ch_intrinsics.v common 2.13 vpr 61.64 MiB 0.04 9172 -1 -1 3 0.20 -1 -1 36164 -1 -1 70 99 1 0 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 63116 99 130 363 493 1 255 300 12 12 144 clb auto 22.9 MiB 0.07 651 61.6 MiB 0.09 0.00 2.12937 -209.611 -2.12937 2.12937 0.23 0.000354388 0.00031469 0.0225691 0.0202115 44 1263 13 5.66058e+06 4.32058e+06 306247. 2126.71 0.50 0.109377 0.100354 1135 11 713 1002 85314 26625 2.59213 2.59213 -228.948 -2.59213 0 0 388532. 2698.14 0.09 0.03 0.0141691 0.0133644 -k6_N10_mem32K_40nm.xml ch_intrinsics.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 2.11 vpr 61.80 MiB 0.04 9364 -1 -1 3 0.19 -1 -1 36164 -1 -1 70 99 1 0 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 63284 99 130 363 493 1 255 300 12 12 144 clb auto 23.1 MiB 0.05 651 61.8 MiB 0.09 0.00 2.12937 -209.611 -2.12937 2.12937 0.23 0.000360754 0.000320981 0.0230926 0.0207354 44 1263 13 5.66058e+06 4.32058e+06 306247. 2126.71 0.52 0.111958 0.102971 1135 11 713 1002 85314 26625 2.59213 2.59213 -228.948 -2.59213 0 0 388532. 2698.14 0.09 0.03 0.0140572 0.0132597 -k6_N10_mem32K_40nm.xml diffeq1.v common 7.08 vpr 65.52 MiB 0.04 9236 -1 -1 15 0.31 -1 -1 34596 -1 -1 52 162 0 5 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 67096 162 96 999 932 1 707 315 16 16 256 mult_36 auto 27.6 MiB 0.16 5727 65.5 MiB 0.37 0.01 20.0262 -1714.67 -20.0262 20.0262 0.48 0.00149324 0.0013599 0.144117 0.133364 44 12591 46 1.21132e+07 4.78249e+06 665287. 2598.78 3.74 0.679764 0.636856 9894 24 4260 8861 2354606 554199 21.727 21.727 -1882.12 -21.727 0 0 864808. 3378.16 0.20 0.39 0.0964146 0.0914499 -k6_N10_mem32K_40nm.xml diffeq1.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 7.60 vpr 65.39 MiB 0.04 9160 -1 -1 15 0.31 -1 -1 34768 -1 -1 52 162 0 5 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 66956 162 96 999 932 1 707 315 16 16 256 mult_36 auto 27.5 MiB 0.16 5727 65.4 MiB 0.36 0.01 20.0262 -1714.67 -20.0262 20.0262 0.51 0.00150881 0.00139739 0.142806 0.13209 44 12591 46 1.21132e+07 4.78249e+06 665287. 2598.78 4.07 0.671994 0.629839 9894 24 4260 8861 2354606 554199 21.727 21.727 -1882.12 -21.727 0 0 864809. 3378.16 0.21 0.49 0.113204 0.107601 -k6_N10_mem32K_40nm.xml single_wire.v common 0.42 vpr 58.62 MiB 0.03 5732 -1 -1 1 0.01 -1 -1 29292 -1 -1 0 1 0 0 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 60024 1 1 1 2 0 1 2 3 3 9 -1 auto 19.4 MiB 0.00 2 58.6 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.00 4.468e-06 2.04e-06 2.9487e-05 1.562e-05 2 1 1 53894 0 1165.58 129.509 0.00 8.8637e-05 5.4317e-05 1 1 1 1 17 8 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 4.2405e-05 2.7206e-05 -k6_N10_mem32K_40nm.xml single_wire.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.41 vpr 58.52 MiB 0.01 5808 -1 -1 1 0.01 -1 -1 29288 -1 -1 0 1 0 0 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 59928 1 1 1 2 0 1 2 3 3 9 -1 auto 19.3 MiB 0.01 2 58.5 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.00 4.452e-06 2.13e-06 2.923e-05 1.5809e-05 2 1 1 53894 0 1165.58 129.509 0.00 8.1703e-05 4.843e-05 1 1 1 1 17 8 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 4.2153e-05 2.6712e-05 -k6_N10_mem32K_40nm.xml single_ff.v common 0.42 vpr 58.31 MiB 0.01 5732 -1 -1 1 0.00 -1 -1 29188 -1 -1 1 2 0 0 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 59712 2 1 3 4 1 3 4 3 3 9 -1 auto 19.8 MiB 0.00 4 58.3 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.00 6.699e-06 3.697e-06 7.127e-05 5.3825e-05 2 2 2 53894 53894 1165.58 129.509 0.00 0.000173915 0.000126393 2 2 3 3 69 44 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 8.1899e-05 6.0762e-05 -k6_N10_mem32K_40nm.xml single_ff.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.42 vpr 58.44 MiB 0.01 5628 -1 -1 1 0.01 -1 -1 29204 -1 -1 1 2 0 0 success v8.0.0-6591-g30d05496f-dirty release VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-10-31T11:03:21 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/centroid_placement_final/vtr-verilog-to-routing/vtr_flow/tasks 59844 2 1 3 4 1 3 4 3 3 9 -1 auto 19.9 MiB 0.00 4 58.4 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.00 5.617e-06 3.12e-06 5.5983e-05 4.034e-05 2 2 2 53894 53894 1165.58 129.509 0.00 0.00019837 0.000128497 2 2 3 3 69 44 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 8.3083e-05 6.1534e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml ch_intrinsics.v common 4.50 vpr 64.15 MiB 0.07 9400 -1 -1 3 0.27 -1 -1 34560 -1 -1 75 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65688 99 130 363 493 1 255 305 13 13 169 clb auto 24.4 MiB 0.09 908 74177 24418 37403 12356 64.1 MiB 0.26 0.00 2.24932 -227.778 -2.24932 2.24932 0.32 0.00128796 0.00121332 0.096703 0.0915143 -1 -1 -1 -1 32 1516 16 6.63067e+06 4.59005e+06 323148. 1912.12 2.05 0.536952 0.490784 11612 59521 -1 1275 27 730 1142 95340 32482 2.40779 2.40779 -232.565 -2.40779 0 0 396943. 2348.77 0.11 0.11 0.05 -1 -1 0.11 0.067572 0.0617159 + k6_N10_mem32K_40nm.xml ch_intrinsics.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 4.47 vpr 64.18 MiB 0.07 9504 -1 -1 3 0.27 -1 -1 34508 -1 -1 75 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65716 99 130 363 493 1 255 305 13 13 169 clb auto 24.4 MiB 0.09 908 74177 24418 37403 12356 64.2 MiB 0.25 0.00 2.24932 -227.778 -2.24932 2.24932 0.33 0.00129519 0.00122409 0.0975081 0.0921414 -1 -1 -1 -1 32 1516 16 6.63067e+06 4.59005e+06 323148. 1912.12 2.05 0.537515 0.491308 11612 59521 -1 1275 27 730 1142 95340 32482 2.40779 2.40779 -232.565 -2.40779 0 0 396943. 2348.77 0.10 0.10 0.06 -1 -1 0.10 0.0672906 0.0614343 + k6_N10_mem32K_40nm.xml diffeq1.v common 7.21 vpr 67.98 MiB 0.05 9412 -1 -1 15 0.36 -1 -1 34576 -1 -1 60 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 69616 162 96 999 932 1 661 323 16 16 256 mult_36 auto 27.8 MiB 0.27 5495 75599 21207 48608 5784 68.0 MiB 0.58 0.01 21.6615 -1879.46 -21.6615 21.6615 0.51 0.00360796 0.00340202 0.25554 0.240594 -1 -1 -1 -1 44 10097 29 1.21132e+07 5.21364e+06 665287. 2598.78 3.00 1.1065 1.02126 20656 131250 -1 8720 22 3466 7443 973330 268208 22.2123 22.2123 -1936.09 -22.2123 0 0 864808. 3378.16 0.21 0.36 0.12 -1 -1 0.21 0.171024 0.158501 + k6_N10_mem32K_40nm.xml diffeq1.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 7.19 vpr 68.00 MiB 0.05 9256 -1 -1 15 0.38 -1 -1 34544 -1 -1 60 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 69628 162 96 999 932 1 661 323 16 16 256 mult_36 auto 27.8 MiB 0.27 5495 75599 21207 48608 5784 68.0 MiB 0.58 0.01 21.6615 -1879.46 -21.6615 21.6615 0.51 0.00357179 0.00336822 0.255146 0.240275 -1 -1 -1 -1 44 10097 29 1.21132e+07 5.21364e+06 665287. 2598.78 3.02 1.11639 1.03133 20656 131250 -1 8720 22 3466 7443 973330 268208 22.2123 22.2123 -1936.09 -22.2123 0 0 864808. 3378.16 0.21 0.36 0.12 -1 -1 0.21 0.171551 0.159214 + k6_N10_mem32K_40nm.xml single_wire.v common 0.52 vpr 61.57 MiB 0.02 6336 -1 -1 1 0.02 -1 -1 29916 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63052 1 1 1 2 0 1 2 3 3 9 -1 auto 23.1 MiB 0.00 2 3 0 3 0 61.6 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.0413e-05 6.444e-06 6.9938e-05 4.9915e-05 -1 -1 -1 -1 2 1 1 53894 0 1165.58 129.509 0.00 0.00113499 0.00107062 254 297 -1 1 1 1 1 19 15 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00114956 0.00110637 + k6_N10_mem32K_40nm.xml single_wire.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.50 vpr 61.70 MiB 0.01 6288 -1 -1 1 0.02 -1 -1 29852 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63176 1 1 1 2 0 1 2 3 3 9 -1 auto 23.1 MiB 0.00 2 3 0 3 0 61.7 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.0828e-05 6.306e-06 8.6241e-05 6.4409e-05 -1 -1 -1 -1 2 1 1 53894 0 1165.58 129.509 0.00 0.00147956 0.00135131 254 297 -1 1 1 1 1 19 15 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00110491 0.00107479 + k6_N10_mem32K_40nm.xml single_ff.v common 0.51 vpr 61.60 MiB 0.01 6340 -1 -1 1 0.02 -1 -1 29792 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63080 2 1 3 4 1 3 4 3 3 9 -1 auto 23.2 MiB 0.00 6 9 5 1 3 61.6 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.5674e-05 1.1879e-05 0.000102525 7.8057e-05 -1 -1 -1 -1 2 2 2 53894 53894 1165.58 129.509 0.00 0.0012801 0.00119733 254 297 -1 2 2 3 3 56 18 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00109578 0.00105577 + k6_N10_mem32K_40nm.xml single_ff.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.52 vpr 61.85 MiB 0.01 6336 -1 -1 1 0.02 -1 -1 29872 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63336 2 1 3 4 1 3 4 3 3 9 -1 auto 23.4 MiB 0.00 6 9 5 1 3 61.9 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.5402e-05 1.1583e-05 0.00010302 8.1368e-05 -1 -1 -1 -1 2 2 2 53894 53894 1165.58 129.509 0.00 0.00128286 0.00120047 254 297 -1 2 2 3 3 56 18 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.0011085 0.00106995 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing_no_sdc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing_no_sdc/config/golden_results.txt index 9aae5cb1b17..919720b66b9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing_no_sdc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/basic_timing_no_sdc/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time error odin_synth_time max_odin_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_time placed_wirelength_est place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time placement_technique reward uniform_percentage median_percentage wmedian_percentage wcent_percentage fr_percentage critUni_percentage centroid_percentage - k6_N10_mem32K_40nm.xml mkPktMerge.v common 15.56 0.11 16560 2 0.06 -1 -1 33736 -1 -1 32 311 15 0 success v8.0.0-2985-gac43b6bd1-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-60-generic x86_64 2020-11-03T08:54:06 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/gold/vtr-verilog-to-routing 66976 311 156 972 1128 1 953 514 28 28 784 memory auto 0.31 8089 2.22 0.01 3.72158 -4040.79 -3.72158 3.72158 0.00214416 0.00179224 0.32463 0.269555 42 13564 24 4.25198e+07 9.94461e+06 2.11478e+06 2697.42 9.37 1.09662 0.953374 12739 17 2968 3482 4252589 1222886 3.90693 3.90693 -4788.41 -3.90693 -8.88433 -0.29768 2.64806e+06 3377.62 0.62 0.103488 0.0939703 simple RL 'Softmax agent' -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml mkPktMerge.v common 18.64 vpr 68.68 MiB 0.15 16588 -1 -1 2 0.14 -1 -1 33680 -1 -1 43 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70328 311 156 972 1128 1 953 525 28 28 784 memory auto 29.0 MiB 0.43 9306 216459 81370 124762 10327 68.7 MiB 1.23 0.02 3.96757 -4422.94 -3.96757 3.96757 1.99 0.0055271 0.00489462 0.594444 0.523451 -1 -1 -1 -1 36 14708 20 4.25198e+07 1.05374e+07 1.86960e+06 2384.70 9.73 2.38769 2.10211 60012 360096 -1 13625 12 2932 3661 921536 275737 4.35536 4.35536 -4857.74 -4.35536 -16.7192 -0.318417 2.30301e+06 2937.52 0.63 0.34 0.31 -1 -1 0.63 0.170436 0.153664 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/hdl_include_odin/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/hdl_include_odin/config/golden_results.txt new file mode 100644 index 00000000000..f19725cfd85 --- /dev/null +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic_odin/hdl_include_odin/config/golden_results.txt @@ -0,0 +1,2 @@ +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time +k4_N10_memSize16384_memData64.xml ch_intrinsics_modified.v common 2.61 vpr 62.39 MiB 0.07 9224 -1 -1 4 0.25 -1 -1 34556 -1 -1 78 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63888 99 130 378 508 1 260 308 14 14 196 clb auto 23.3 MiB 0.07 836 35634 7872 13338 14424 62.4 MiB 0.06 0.00 30 1863 18 4.32e+06 2.46e+06 504535. 2574.16 0.99 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap/config/golden_results.txt index 23400d76aea..e09520ad1f6 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/basic_ap/config/golden_results.txt @@ -1,5 +1,5 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -fixed_k6_frac_N8_22nm.xml single_wire.v common 2.13 vpr 71.51 MiB -1 -1 0.09 16840 1 0.02 -1 -1 29872 -1 -1 0 1 0 0 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 73228 1 1 0 2 0 1 2 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 71.5 MiB 0.21 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 71.5 MiB 0.21 71.5 MiB 0.16 8 16 1 6.79088e+06 0 166176. 575.005 0.36 0.00129308 0.00124527 20206 45088 -1 18 1 1 1 141 56 0.7726 nan -0.7726 -0.7726 0 0 202963. 702.294 0.09 0.00 0.07 -1 -1 0.09 0.00121301 0.00118133 -fixed_k6_frac_N8_22nm.xml single_ff.v common 2.50 vpr 71.48 MiB -1 -1 0.14 17148 1 0.02 -1 -1 29772 -1 -1 1 2 0 0 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 73196 2 1 3 3 1 3 4 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 71.5 MiB 0.17 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 71.5 MiB 0.17 71.5 MiB 0.16 20 31 1 6.79088e+06 13472 414966. 1435.87 0.64 0.00125095 0.00119258 22510 95286 -1 39 1 2 2 247 61 0.942216 0.942216 -1.68896 -0.942216 0 0 503264. 1741.40 0.18 0.00 0.14 -1 -1 0.18 0.00117932 0.00114473 -fixed_k6_frac_N8_22nm.xml ch_intrinsics.v common 4.42 vpr 72.18 MiB -1 -1 0.45 18468 3 0.09 -1 -1 33196 -1 -1 41 99 2 0 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 73916 99 130 240 229 1 247 272 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 72.2 MiB 0.29 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.2 MiB 0.29 72.2 MiB 0.27 32 3163 26 6.79088e+06 1.64835e+06 586450. 2029.24 1.46 0.243021 0.221858 24814 144142 -1 2906 13 650 1027 105453 26416 2.0466 2.0466 -151.161 -2.0466 -0.16867 -0.16867 744469. 2576.02 0.26 0.09 0.22 -1 -1 0.26 0.0502319 0.046216 -fixed_k6_frac_N8_22nm.xml diffeq1.v common 25.52 vpr 74.66 MiB -1 -1 0.71 23540 15 0.35 -1 -1 34360 -1 -1 63 162 0 5 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 76452 162 96 817 258 1 802 326 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 74.7 MiB 1.53 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 74.7 MiB 1.53 74.7 MiB 0.66 74 17114 41 6.79088e+06 2.82874e+06 1.22589e+06 4241.83 18.05 3.32398 3.14296 32590 314081 -1 14326 19 4183 11076 1441920 343577 22.2947 22.2947 -1796.71 -22.2947 0 0 1.52683e+06 5283.16 0.50 0.66 0.56 -1 -1 0.50 0.306939 0.291429 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + fixed_k6_frac_N8_22nm.xml single_wire.v common 1.82 vpr 73.57 MiB -1 -1 0.10 17092 1 0.02 -1 -1 30112 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 75340 1 1 0 2 0 1 2 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 73.6 MiB 0.24 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 73.6 MiB 0.24 73.6 MiB 0.20 8 16 1 6.79088e+06 0 166176. 575.005 0.38 0.00152779 0.00147101 20206 45088 -1 18 1 1 1 141 56 0.7726 nan -0.7726 -0.7726 0 0 202963. 702.294 0.10 0.00 0.05 -1 -1 0.10 0.00136912 0.0013327 + fixed_k6_frac_N8_22nm.xml single_ff.v common 2.13 vpr 72.83 MiB -1 -1 0.11 17428 1 0.03 -1 -1 30100 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 74580 2 1 3 3 1 3 4 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 72.8 MiB 0.19 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.8 MiB 0.19 72.8 MiB 0.17 20 31 1 6.79088e+06 13472 414966. 1435.87 0.48 0.00134713 0.0012663 22510 95286 -1 39 1 2 2 247 61 0.942216 0.942216 -1.68896 -0.942216 0 0 503264. 1741.40 0.21 0.00 0.09 -1 -1 0.21 0.00158671 0.0015335 + fixed_k6_frac_N8_22nm.xml ch_intrinsics.v common 3.81 vpr 73.68 MiB -1 -1 0.40 18964 3 0.12 -1 -1 33228 -1 -1 43 99 2 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 75444 99 130 240 229 1 247 274 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 73.7 MiB 0.36 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 73.7 MiB 0.36 73.7 MiB 0.34 32 3096 19 6.79088e+06 1.6753e+06 586450. 2029.24 1.11 0.122876 0.111163 24814 144142 -1 2911 28 730 1212 168873 64441 2.43138 2.43138 -153.888 -2.43138 0 0 744469. 2576.02 0.30 0.17 0.13 -1 -1 0.30 0.0795405 0.0727107 + fixed_k6_frac_N8_22nm.xml diffeq1.v common 14.42 vpr 75.12 MiB -1 -1 0.63 23572 15 0.47 -1 -1 34420 -1 -1 66 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76920 162 96 817 258 1 798 329 17 17 289 -1 unnamed_device -1 -1 -1 -1 -1 -1 -1 75.1 MiB 1.63 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 75.1 MiB 1.63 75.1 MiB 0.83 74 17094 47 6.79088e+06 2.86915e+06 1.22589e+06 4241.83 7.19 0.927094 0.854352 32590 314081 -1 14562 21 4154 11035 1472312 353034 22.5845 22.5845 -1896.41 -22.5845 0 0 1.52683e+06 5283.16 0.65 0.52 0.33 -1 -1 0.65 0.149256 0.138152 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test/config/golden_results.txt index 8c6c0b532f1..91bac1cf221 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 6.19 vpr 74.24 MiB -1 -1 0.16 18044 1 0.09 -1 -1 32460 -1 -1 12 130 0 -1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 76020 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.4 MiB 0.10 1734 74.2 MiB 0.13 0.00 5.12303 -543.21 -5.12303 5.12303 0.45 0.000787704 0.000733664 0.0618895 0.0577764 82 3564 25 4.93594e+06 1.0962e+06 1.24853e+06 6370.04 3.47 0.374217 0.341793 33448 252102 -1 3384 9 709 754 192289 63961 0 0 192289 63961 754 713 0 0 18466 17836 0 0 19719 19117 0 0 755 715 0 0 69265 12759 0 0 83330 12821 0 0 754 0 0 45 152 212 1613 0 0 4.57723 4.57723 -644.847 -4.57723 0 0 1.53695e+06 7841.58 0.26 0.05 0.23 -1 -1 0.26 0.0256266 0.0242 -k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common_--router_algorithm_parallel 4.88 vpr 74.18 MiB -1 -1 0.16 18028 1 0.09 -1 -1 32508 -1 -1 12 130 0 -1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 75956 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.4 MiB 0.10 1734 74.2 MiB 0.13 0.00 5.12303 -543.21 -5.12303 5.12303 0.45 0.000821246 0.000766795 0.0629599 0.0588552 82 3617 17 4.93594e+06 1.0962e+06 1.24853e+06 6370.04 2.14 0.308433 0.2822 33448 252102 -1 3414 14 731 776 220618 73159 0 0 220618 73159 776 735 0 0 20611 19950 0 0 21899 21238 0 0 777 738 0 0 80287 15212 0 0 96268 15286 0 0 776 0 0 45 151 219 1641 0 0 4.57723 4.57723 -637.466 -4.57723 0 0 1.53695e+06 7841.58 0.26 0.06 0.23 -1 -1 0.26 0.0330502 0.0309507 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 10.66 vpr 75.07 MiB -1 -1 0.35 18416 1 0.08 -1 -1 32256 -1 -1 12 130 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76872 130 40 596 562 1 356 185 14 14 196 dsp_top auto 36.0 MiB 0.29 1916 35953 11702 19824 4427 75.1 MiB 0.33 0.00 5.12303 -634.784 -5.12303 5.12303 0.88 0.00199221 0.00189164 0.140924 0.132687 -1 -1 -1 -1 82 3595 10 4.93594e+06 1.0962e+06 1.23902e+06 6321.54 4.92 0.71462 0.660858 33448 250998 -1 3301 8 676 703 150435 58622 4.57723 4.57723 -633.308 -4.57723 0 0 1.53308e+06 7821.82 0.49 0.15 0.48 -1 -1 0.49 0.0533478 0.0508037 + k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common_--router_algorithm_parallel 10.40 vpr 75.02 MiB -1 -1 0.30 18440 1 0.07 -1 -1 32232 -1 -1 12 130 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76816 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.9 MiB 0.28 1916 35953 11702 19824 4427 75.0 MiB 0.32 0.00 5.12303 -634.784 -5.12303 5.12303 0.77 0.001372 0.00128332 0.125861 0.118102 -1 -1 -1 -1 82 3590 8 4.93594e+06 1.0962e+06 1.23902e+06 6321.54 4.81 0.680937 0.627391 33448 250998 -1 3307 8 685 712 152508 59455 4.57723 4.57723 -633.101 -4.57723 0 0 1.53308e+06 7821.82 0.50 0.29 0.40 -1 -1 0.50 0.0712463 0.0684693 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test_no_hb/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test_no_hb/config/golden_results.txt index edd95d55fb0..85e095de4e0 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test_no_hb/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/koios_test_no_hb/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 17.68 vpr 78.43 MiB -1 -1 0.61 22116 1 0.12 -1 -1 37648 -1 -1 23 130 0 -1 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 80308 130 40 1147 997 1 570 196 14 14 196 dsp_top auto 40.4 MiB 0.48 2519 45716 13998 25604 6114 78.4 MiB 0.45 0.01 5.08449 -543.448 -5.08449 5.08449 0.87 0.00181542 0.00159296 0.162949 0.145549 120 4946 26 4.93594e+06 1.40315e+06 1.70710e+06 8709.71 11.35 1.1299 0.996 38028 382122 -1 4665 23 2316 2393 367686 101146 6.68827 6.68827 -718.625 -6.68827 0 0 2.19468e+06 11197.4 0.70 0.23 0.61 -1 -1 0.70 0.11741 0.107607 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 18.25 vpr 77.09 MiB -1 -1 0.78 20036 1 0.12 -1 -1 34336 -1 -1 23 130 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 78936 130 40 1147 997 1 585 196 14 14 196 dsp_top auto 38.0 MiB 0.70 2881 41164 12013 24103 5048 77.1 MiB 0.38 0.01 6.00943 -707.528 -6.00943 6.00943 0.74 0.00343703 0.00329093 0.145992 0.134216 -1 -1 -1 -1 110 5376 49 4.93594e+06 1.40315e+06 1.58123e+06 8067.52 11.44 1.37108 1.222 36820 330950 -1 4864 22 2349 2464 267041 89229 7.0711 7.0711 -772.235 -7.0711 0 0 1.96868e+06 10044.3 0.59 0.20 0.57 -1 -1 0.59 0.101693 0.0932648 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_absorb_buffers/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_absorb_buffers/config/golden_results.txt index e6023da2fe8..5e82ce20db9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_absorb_buffers/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_absorb_buffers/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_on 1.21 vpr 69.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 83 130 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 71016 130 150 1169 1319 1 890 363 12 12 144 clb auto 32.2 MiB 0.84 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00265727 0.00239909 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_off 1.28 vpr 69.11 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 130 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 70764 130 150 1216 1366 1 923 369 12 12 144 clb auto 31.9 MiB 0.91 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00310302 0.00282666 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_on 2.06 vpr 70.06 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 83 130 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71744 130 150 1169 1319 1 886 363 12 12 144 clb auto 29.9 MiB 1.33 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00617255 0.00566712 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_off 2.11 vpr 69.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 90 130 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71096 130 150 1216 1366 1 933 370 12 12 144 clb auto 29.7 MiB 1.36 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00673229 0.00602451 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analysis_only/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analysis_only/config/golden_results.txt index 36ba5c81aad..e7e15672aec 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analysis_only/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analysis_only/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.24 vpr 62.12 MiB -1 -1 0.43 25652 5 0.13 -1 -1 36104 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63616 10 2 181 183 1 40 24 6 6 36 clb auto 23.5 MiB 0.03 152 62.1 MiB 0.01 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 0.000105765 8.2443e-05 0.00284118 0.00242275 137 214 418 18324 2969 646728 646728 138825. 3856.24 15 2.06794 2.06794 -89.0541 -2.06794 0 0 62.1 MiB 0.01 0.00985435 0.0087323 62.1 MiB 0.01 - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.39 vpr 65.23 MiB -1 -1 0.44 25096 4 0.11 -1 -1 36472 -1 -1 15 11 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66800 11 2 303 283 2 80 28 7 7 49 clb auto 26.7 MiB 0.18 260 65.2 MiB 0.02 0.00 1.86505 -148.495 -1.86505 1.77255 0.00 0.000235389 0.000157651 0.0078612 0.00669406 278 109 166 3361 958 1.07788e+06 808410 219490. 4479.39 4 2.00201 1.88787 -162.659 -2.00201 0 0 65.2 MiB 0.01 0.0201389 0.0184332 65.2 MiB 0.03 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.59 vpr 63.68 MiB -1 -1 0.88 23332 5 0.19 -1 -1 33328 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65204 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.13 146 398 72 298 28 63.7 MiB 0.05 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.00056264 0.000520569 0.00752147 0.00699209 -1 -1 -1 -1 130 4.06250 54 1.68750 215 509 15144 2919 646728 646728 138825. 3856.24 24 3164 19284 -1 2.05191 2.05191 -93.8814 -2.05191 0 0 0.02 -1 -1 63.7 MiB 0.05 0.0383425 0.0343799 63.7 MiB -1 0.02 + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 3.12 vpr 66.62 MiB -1 -1 0.87 22944 4 0.17 -1 -1 33248 -1 -1 15 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68220 11 2 303 283 2 78 28 7 7 49 clb auto 27.0 MiB 0.35 264 1036 209 767 60 66.6 MiB 0.05 0.00 2.03811 -163.536 -2.03811 1.90043 0.00 0.000979369 0.000882501 0.0285292 0.0262389 -1 -1 -1 -1 252 3.50000 103 1.43056 122 199 4265 1218 1.07788e+06 808410 219490. 4479.39 12 5100 32136 -1 2.11264 1.93889 -160.659 -2.11264 0 0 0.04 -1 -1 66.6 MiB 0.04 0.0622 0.0573011 66.6 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/config/golden_results.txt index 6fc058ee7eb..36eb5abce3a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_analytic_placer/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 2.41 vpr 63.95 MiB -1 -1 0.22 22076 3 0.07 -1 -1 36364 -1 -1 68 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 65484 99 130 343 473 1 225 298 12 12 144 clb auto 25.8 MiB 0.14 574 63.9 MiB 0.17 0.00 1.63028 -109.727 -1.63028 1.63028 0.26 0.000399844 0.000354605 0.0364829 0.0324812 40 1376 20 5.66058e+06 4.21279e+06 333335. 2314.82 0.62 0.15985 0.147483 1211 9 370 555 25048 7436 1.97803 1.97803 -136.611 -1.97803 -1.34293 -0.298787 419432. 2912.72 0.10 0.02 0.0149348 0.0141529 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 5.66 vpr 65.89 MiB -1 -1 0.43 18980 3 0.13 -1 -1 33368 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67472 99 130 344 474 1 227 298 12 12 144 clb auto 26.1 MiB 0.26 783 1293 269 877 147 65.9 MiB 0.17 0.00 1.86362 -117.589 -1.86362 1.86362 0.38 0.00100487 0.000938659 0.00647195 0.00625967 -1 -1 -1 -1 34 1729 21 5.66058e+06 4.21279e+06 293002. 2034.74 1.97 0.304859 0.274689 12094 55633 -1 1447 11 494 759 44038 15434 1.98889 1.98889 -143.496 -1.98889 -0.113193 -0.0844279 360780. 2505.42 0.12 0.08 0.06 -1 -1 0.12 0.0336886 0.0313908 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/config.txt index 2f2a1b91e50..62aee319f41 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/config.txt @@ -38,7 +38,7 @@ circuit_constraint_list_add=(ex1010.pre-vpr.blif, constraints=../../../../cons circuit_constraint_list_add=(apex4.pre-vpr.blif, route_chan_width=78) circuit_constraint_list_add=(seq.pre-vpr.blif, route_chan_width=78) circuit_constraint_list_add=(des.pre-vpr.blif, route_chan_width=44) -circuit_constraint_list_add=(ex1010.pre-vpr.blif, route_chan_width=112) +circuit_constraint_list_add=(ex1010.pre-vpr.blif, route_chan_width=114) # Parse info and how to parse parse_file=vpr_fixed_chan_width.txt diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt index 0883ffdae6d..97f45b6c51f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/mcnc/config/golden_results.txt @@ -1,5 +1,5 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time -k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 20.75 vpr 71.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 112 9 -1 -1 success v8.0.0-11795-gcad36f04c release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T09:18:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 73360 9 19 897 28 0 861 140 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 71.6 MiB 8.71 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 71.6 MiB 8.71 71.6 MiB 1.81 15318 17.8324 4201 4.89057 8011 32995 1331546 236516 1.05632e+07 6.03613e+06 1.26944e+06 4958.75 22 28900 206586 -1 6.21221 nan -101.791 -6.21221 0 0 0.34 -1 -1 71.6 MiB 0.64 0.271799 0.250276 71.6 MiB -1 0.36 -k6_frac_N10_40nm.xml des.pre-vpr.blif common 4.93 vpr 72.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 168 256 -1 -1 success v8.0.0-11795-gcad36f04c release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T09:18:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 74688 256 245 954 501 0 934 669 22 22 484 -1 mcnc_large -1 -1 -1 -1 -1 -1 -1 72.9 MiB 0.95 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.9 MiB 0.95 72.9 MiB 0.93 14784 15.8287 3972 4.25268 4324 10857 489191 98513 2.15576e+07 9.05419e+06 1.49107e+06 3080.73 15 47664 245996 -1 5.17101 nan -950.899 -5.17101 0 0 0.37 -1 -1 72.9 MiB 0.36 0.209601 0.198315 72.9 MiB -1 0.49 -k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 97.16 vpr 100.96 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 378 10 -1 -1 success v8.0.0-11795-gcad36f04c release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T09:18:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 103388 10 10 2659 20 0 2595 398 22 22 484 -1 mcnc_large -1 -1 -1 -1 -1 -1 -1 101.0 MiB 40.92 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 101.0 MiB 40.92 101.0 MiB 5.09 70410 27.1329 18683 7.19961 20015 78549 11309360 2817611 2.15576e+07 2.03719e+07 3.46585e+06 7160.86 33 64088 584944 -1 9.74863 nan -89.2503 -9.74863 0 0 1.11 -1 -1 101.0 MiB 4.80 1.19342 1.08974 101.0 MiB -1 1.03 -k6_frac_N10_40nm.xml seq.pre-vpr.blif common 19.07 vpr 72.86 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 136 41 -1 -1 success v8.0.0-11795-gcad36f04c release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T09:18:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 74604 41 35 1006 76 0 966 212 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 72.9 MiB 6.78 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.9 MiB 6.78 72.9 MiB 1.91 16021 16.5849 4405 4.56004 7417 31839 1144916 195548 1.05632e+07 7.32958e+06 1.26944e+06 4958.75 19 28900 206586 -1 6.0707 nan -180.167 -6.0707 0 0 0.34 -1 -1 72.9 MiB 0.59 0.264389 0.244052 72.9 MiB -1 0.36 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_40nm.xml apex4.pre-vpr.blif common 17.89 vpr 72.27 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 113 9 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 74000 9 19 897 28 0 861 141 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 72.3 MiB 7.61 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.3 MiB 7.61 72.3 MiB 1.79 15611 18.1735 4293 4.99767 8307 35569 1513043 269803 1.05632e+07 6.09002e+06 1.26944e+06 4958.75 25 28900 206586 -1 6.2156 nan -103.761 -6.2156 0 0 0.25 -1 -1 72.3 MiB 0.57 0.174543 0.155743 72.3 MiB -1 0.31 + k6_frac_N10_40nm.xml des.pre-vpr.blif common 5.93 vpr 73.48 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 168 256 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 75248 256 245 954 501 0 934 669 22 22 484 -1 mcnc_large -1 -1 -1 -1 -1 -1 -1 73.5 MiB 1.37 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 73.5 MiB 1.37 73.5 MiB 1.31 14674 15.7109 3946 4.22484 4204 10388 463073 94185 2.15576e+07 9.05419e+06 1.49107e+06 3080.73 15 47664 245996 -1 5.16547 nan -949.23 -5.16547 0 0 0.24 -1 -1 73.5 MiB 0.33 0.134699 0.127277 73.5 MiB -1 0.78 + k6_frac_N10_40nm.xml ex1010.pre-vpr.blif common 89.28 vpr 101.70 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 378 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 104144 10 10 2659 20 0 2595 398 22 22 484 -1 mcnc_large -1 -1 -1 -1 -1 -1 -1 101.7 MiB 38.46 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 101.7 MiB 38.46 101.7 MiB 4.76 69814 26.9033 18438 7.10520 21388 82112 8636123 1705637 2.15576e+07 2.03719e+07 3.51389e+06 7260.09 30 64568 594370 -1 8.65166 nan -83.0393 -8.65166 0 0 0.78 -1 -1 101.7 MiB 2.76 0.603303 0.529989 101.7 MiB -1 0.89 + k6_frac_N10_40nm.xml seq.pre-vpr.blif common 18.93 vpr 73.44 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 137 41 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 75200 41 35 1006 76 0 966 213 16 16 256 -1 mcnc_medium -1 -1 -1 -1 -1 -1 -1 73.4 MiB 7.75 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 73.4 MiB 7.75 73.4 MiB 2.26 16234 16.8054 4428 4.58385 7333 31283 1130829 193699 1.05632e+07 7.38348e+06 1.26944e+06 4958.75 18 28900 206586 -1 6.06719 nan -179.594 -6.06719 0 0 0.29 -1 -1 73.4 MiB 0.59 0.225217 0.206578 73.4 MiB -1 0.44 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/vtr_chain/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/vtr_chain/config/golden_results.txt index 41afe1cc962..01136ed182a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/vtr_chain/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_ap/vtr_chain/config/golden_results.txt @@ -1,6 +1,6 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time -k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 24.28 vpr 79.40 MiB -1 -1 17.17 44792 3 0.69 -1 -1 35444 -1 -1 77 196 2 0 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 81308 196 193 800 389 1 774 468 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 79.4 MiB 1.52 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 79.4 MiB 1.52 79.4 MiB 1.46 9958 13.0170 2702 3.53203 2599 4950 300563 74386 2.07112e+07 5.24584e+06 1.26946e+06 3173.65 11 38988 203232 -1 4.07319 4.07319 -1582.37 -4.07319 0 0 0.33 -1 -1 79.4 MiB 0.25 0.159439 0.148658 79.4 MiB -1 0.39 -k6_frac_N10_frac_chain_mem32K_40nm.xml ch_intrinsics.v common 3.99 vpr 72.28 MiB -1 -1 0.47 18472 3 0.09 -1 -1 33164 -1 -1 43 99 4 0 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 74016 99 130 240 229 1 245 276 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 72.3 MiB 0.52 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.3 MiB 0.52 72.3 MiB 0.43 2337 12.5645 646 3.47312 478 786 47927 11655 2.07112e+07 4.50944e+06 1.31074e+06 3276.84 17 39388 210115 -1 2.7949 2.7949 -157.904 -2.7949 0 0 0.34 -1 -1 72.3 MiB 0.09 0.064895 0.0598322 72.3 MiB -1 0.40 -k6_frac_N10_frac_chain_mem32K_40nm.xml or1200.v common 102.47 vpr 129.05 MiB -1 -1 6.57 61844 8 3.04 -1 -1 42492 -1 -1 382 385 4 1 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 132144 385 362 3324 747 1 3246 1134 30 30 900 -1 vtr_small -1 -1 -1 -1 -1 -1 -1 129.0 MiB 38.31 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 129.0 MiB 38.31 129.0 MiB 7.86 77717 24.0535 20004 6.19127 16428 49849 3732916 616203 4.8774e+07 2.31755e+07 6.56785e+06 7297.61 18 120772 1084977 -1 13.0384 13.0384 -13795.9 -13.0384 0 0 2.24 -1 -1 129.0 MiB 2.21 1.14009 1.06947 129.0 MiB -1 1.97 -k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 36.42 vpr 82.86 MiB -1 -1 3.74 31896 16 0.45 -1 -1 34868 -1 -1 78 45 5 1 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 84844 45 32 936 77 1 909 161 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 82.9 MiB 13.69 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 82.9 MiB 13.69 82.9 MiB 3.20 18623 20.5552 4866 5.37086 4691 13472 1180081 266712 2.07112e+07 7.33973e+06 1.91495e+06 4787.38 16 44576 305072 -1 16.8331 16.8331 -8519.25 -16.8331 0 0 0.54 -1 -1 82.9 MiB 0.60 0.288436 0.264739 82.9 MiB -1 0.58 -k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 4.98 vpr 72.38 MiB -1 -1 0.96 22788 4 0.13 -1 -1 33292 -1 -1 19 11 0 0 success v8.0.0-11795-gcad36f04c-dirty release VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-14T20:51:25 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing 74116 11 2 140 13 2 126 32 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 72.4 MiB 0.76 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 72.4 MiB 0.76 72.4 MiB 0.48 851 7.09167 230 1.91667 329 558 11542 3032 2.07112e+07 1.02399e+06 1.12964e+06 2824.09 12 37792 180905 -1 2.2703 2.2185 -187.741 -2.2703 0 0 0.29 -1 -1 72.4 MiB 0.06 0.0419363 0.0382231 72.4 MiB -1 0.36 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_frac_chain_mem32K_40nm.xml boundtop.v common 25.49 vpr 80.19 MiB -1 -1 18.42 46348 3 0.86 -1 -1 35680 -1 -1 79 196 2 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 82116 196 193 800 389 1 770 470 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 80.2 MiB 1.84 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80.2 MiB 1.84 80.2 MiB 1.78 9940 13.0618 2693 3.53876 2581 4860 309537 77921 2.07112e+07 5.35363e+06 1.26946e+06 3173.65 17 38988 203232 -1 3.97958 3.97958 -1577.97 -3.97958 0 0 0.21 -1 -1 80.2 MiB 0.27 0.168973 0.157491 80.2 MiB -1 0.35 + k6_frac_N10_frac_chain_mem32K_40nm.xml ch_intrinsics.v common 4.99 vpr 74.65 MiB -1 -1 0.39 19048 3 0.16 -1 -1 33328 -1 -1 43 99 4 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76440 99 130 240 229 1 245 276 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 74.6 MiB 0.74 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 74.6 MiB 0.74 74.6 MiB 0.55 2337 12.5645 646 3.47312 478 786 47927 11655 2.07112e+07 4.50944e+06 1.31074e+06 3276.84 17 39388 210115 -1 2.7949 2.7949 -157.904 -2.7949 0 0 0.23 -1 -1 74.6 MiB 0.08 0.0477832 0.0442404 74.6 MiB -1 0.59 + k6_frac_N10_frac_chain_mem32K_40nm.xml or1200.v common 98.01 vpr 129.75 MiB -1 -1 6.86 63268 8 3.92 -1 -1 41140 -1 -1 389 385 4 1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 132868 385 362 3324 747 1 3234 1141 30 30 900 -1 vtr_small -1 -1 -1 -1 -1 -1 -1 129.8 MiB 36.86 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 129.8 MiB 36.86 129.8 MiB 7.32 78006 24.2330 20094 6.24231 16800 53011 4072067 673498 4.8774e+07 2.35528e+07 6.56785e+06 7297.61 18 120772 1084977 -1 13.1891 13.1891 -14048.3 -13.1891 0 0 1.37 -1 -1 129.8 MiB 1.69 0.748616 0.698526 129.8 MiB -1 1.67 + k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 34.66 vpr 83.23 MiB -1 -1 3.83 32732 16 0.61 -1 -1 34984 -1 -1 81 45 5 1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 85228 45 32 936 77 1 909 164 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 83.2 MiB 12.99 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 83.2 MiB 12.99 83.2 MiB 3.72 18303 20.2020 4779 5.27483 4457 12845 1130075 256506 2.07112e+07 7.50141e+06 1.91495e+06 4787.38 16 44576 305072 -1 16.4662 16.4662 -8382.09 -16.4662 0 0 0.35 -1 -1 83.2 MiB 0.43 0.172284 0.155775 83.2 MiB -1 0.53 + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 5.78 vpr 73.51 MiB -1 -1 0.88 22948 4 0.18 -1 -1 33064 -1 -1 20 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 75272 11 2 140 13 2 126 33 20 20 400 -1 vtr_extra_small -1 -1 -1 -1 -1 -1 -1 73.5 MiB 0.89 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 73.5 MiB 0.89 73.5 MiB 0.66 927 7.72500 248 2.06667 341 586 12691 3249 2.07112e+07 1.07788e+06 1.12964e+06 2824.09 11 37792 180905 -1 2.27141 2.21904 -192.145 -2.27141 0 0 0.21 -1 -1 73.5 MiB 0.04 0.0291693 0.0268442 73.5 MiB -1 0.47 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bidir/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bidir/config/golden_results.txt index 3f2209a5524..b41f3d15872 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bidir/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bidir/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_n4_v7_bidir.xml styr.blif common 1.48 vpr 60.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61704 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1321 5000 862 3861 277 60.3 MiB 0.03 0.00 5.9335 -73.3937 -5.9335 5.9335 0.11 0.000261327 0.000224398 0.00853268 0.00751629 16 2231 44 2.43e+06 1.98e+06 -1 -1 0.82 0.103535 0.088869 3522 30407 -1 1953 31 1359 4378 262510 29492 8.05167 8.05167 -93.2354 -8.05167 0 0 -1 -1 0.04 0.05 0.01 -1 -1 0.04 0.0186186 0.0166315 - k4_n4_v7_longline_bidir.xml styr.blif common 1.35 vpr 60.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61660 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1283 3299 376 2835 88 60.2 MiB 0.02 0.00 4.65232 -54.7485 -4.65232 4.65232 0.17 0.000261335 0.000226611 0.00623888 0.00553939 18 2324 34 2.43e+06 1.98e+06 -1 -1 0.50 0.0674339 0.0582272 3282 34431 -1 2358 20 1330 4111 330217 37900 9.15177 9.15177 -106.099 -9.15177 0 0 -1 -1 0.08 0.05 0.01 -1 -1 0.08 0.0141075 0.0127004 - k4_n4_v7_l1_bidir.xml styr.blif common 1.68 vpr 60.29 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61736 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1308 8591 1804 6310 477 60.3 MiB 0.05 0.00 7.13454 -91.9395 -7.13454 7.13454 0.16 0.00024201 0.00020955 0.0132111 0.0116469 11 1687 50 2.43e+06 1.98e+06 -1 -1 0.85 0.0715403 0.0620252 4842 26197 -1 1434 21 1413 4826 393565 72389 8.93712 8.93712 -111.541 -8.93712 0 0 -1 -1 0.04 0.07 0.01 -1 -1 0.04 0.0141585 0.0126514 - k4_n4_v7_bidir_pass_gate.xml styr.blif common 1.75 vpr 60.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61708 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1271 3677 486 3031 160 60.3 MiB 0.03 0.00 3.40634 -44.4904 -3.40634 3.40634 0.12 0.000249094 0.000211604 0.00674832 0.00592154 16 2163 32 2.43e+06 1.98e+06 -1 -1 0.92 0.0676003 0.058382 3522 30407 -1 2237 32 1642 5759 1828879 289403 29.985 29.985 -297.537 -29.985 0 0 -1 -1 0.04 0.21 0.01 -1 -1 0.04 0.0186587 0.0165112 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_n4_v7_bidir.xml styr.blif common 3.89 vpr 58.70 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60104 10 10 253 263 1 165 89 11 11 121 clb auto 19.0 MiB 0.24 1298 4445 695 3556 194 58.7 MiB 0.05 0.00 5.53812 -72.6437 -5.53812 5.53812 0.21 0.000597156 0.000536921 0.0176424 0.0161115 -1 -1 -1 -1 14 2029 36 2.43e+06 2.07e+06 -1 -1 2.05 0.317982 0.283185 3402 27531 -1 1944 19 1218 4569 249188 30978 7.47374 7.47374 -94.8537 -7.47374 0 0 -1 -1 0.07 0.29 0.02 -1 -1 0.07 0.060437 0.0554417 + k4_n4_v7_longline_bidir.xml styr.blif common 4.05 vpr 58.04 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59432 10 10 253 263 1 165 89 11 11 121 clb auto 18.9 MiB 0.06 1243 3851 530 3175 146 58.0 MiB 0.04 0.00 4.42129 -53.6285 -4.42129 4.42129 0.23 0.000663771 0.000596818 0.0176359 0.0161365 -1 -1 -1 -1 19 2381 26 2.43e+06 2.07e+06 -1 -1 2.10 0.266841 0.23096 3282 34431 -1 2331 24 1499 5264 384444 46394 8.40637 8.40637 -105.933 -8.40637 0 0 -1 -1 0.10 0.21 0.02 -1 -1 0.10 0.0424648 0.0379047 + k4_n4_v7_l1_bidir.xml styr.blif common 5.46 vpr 58.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60072 10 10 253 263 1 165 89 11 11 121 clb auto 18.9 MiB 0.24 1249 6821 1452 5028 341 58.7 MiB 0.08 0.00 6.30077 -80.949 -6.30077 6.30077 0.24 0.000749315 0.000681105 0.0293634 0.0269084 -1 -1 -1 -1 10 1483 31 2.43e+06 2.07e+06 -1 -1 3.45 0.313343 0.275769 4482 22551 -1 1280 20 1321 4798 303501 58064 7.52318 7.52318 -89.7629 -7.52318 0 0 -1 -1 0.05 0.22 0.02 -1 -1 0.05 0.041626 0.0374306 + k4_n4_v7_bidir_pass_gate.xml styr.blif common 4.39 vpr 58.13 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59524 10 10 253 263 1 165 89 11 11 121 clb auto 18.9 MiB 0.07 1252 4247 601 3492 154 58.1 MiB 0.05 0.00 3.38007 -43.5291 -3.38007 3.38007 0.17 0.000689869 0.000623886 0.0174325 0.0159695 -1 -1 -1 -1 14 2047 30 2.43e+06 2.07e+06 -1 -1 2.73 0.325816 0.284563 3402 27531 -1 2099 29 1484 5383 889715 156716 22.7353 22.7353 -261.092 -22.7353 0 0 -1 -1 0.05 0.26 0.03 -1 -1 0.05 0.0496444 0.0442275 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary/config/golden_results.txt index 800b4e558b3..0c895ef220e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_off 1.42 vpr 62.22 MiB -1 -1 0.43 25728 5 0.12 -1 -1 35980 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63716 10 2 181 183 1 40 24 6 6 36 clb auto 23.6 MiB 0.03 152 62.2 MiB 0.01 0.00 2.0099 -85.1433 -2.0099 2.0099 0.03 0.000107631 8.3219e-05 0.00288065 0.00245713 18 200 31 646728 646728 30529.5 848.041 0.18 0.0564233 0.0465651 171 15 224 467 12252 3769 2.15252 2.15252 -94.9302 -2.15252 0 0 39290.9 1091.41 0.00 0.01 0.00771312 0.00697035 - k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_on 1.56 vpr 62.21 MiB -1 -1 0.43 25300 5 0.14 -1 -1 35516 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63704 10 2 181 183 1 40 24 6 6 36 clb auto 23.7 MiB 0.03 152 62.2 MiB 0.01 0.00 2.0099 -85.1433 -2.0099 2.0099 0.03 0.000106827 8.2266e-05 0.00314022 0.00272149 18 200 31 646728 646728 30529.5 848.041 0.25 0.074847 0.0618265 171 15 224 467 12252 3769 2.15252 2.15252 -94.9302 -2.15252 0 0 39290.9 1091.41 0.01 0.01 0.00744435 0.00674858 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_off 4.17 vpr 63.71 MiB -1 -1 0.84 23508 5 0.18 -1 -1 33600 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65244 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.28 146 398 72 298 28 63.7 MiB 0.07 0.01 2.14643 -92.7521 -2.14643 2.14643 0.08 0.000419766 0.000385553 0.00743059 0.00689969 -1 -1 -1 -1 14 201 20 646728 646728 22986.6 638.518 0.77 0.1423 0.123972 1728 4488 -1 171 15 208 442 9451 2845 2.12882 2.12882 -98.7664 -2.12882 0 0 30529.5 848.041 0.01 0.17 0.01 -1 -1 0.01 0.0225812 0.0202157 + k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_on 4.53 vpr 63.96 MiB -1 -1 0.88 23572 5 0.17 -1 -1 33336 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65496 10 2 181 183 1 35 24 6 6 36 clb auto 24.5 MiB 0.05 146 398 72 298 28 64.0 MiB 0.02 0.00 2.14643 -92.7521 -2.14643 2.14643 0.04 0.000405627 0.000370918 0.00658648 0.00608268 -1 -1 -1 -1 14 201 20 646728 646728 22986.6 638.518 1.69 0.282025 0.245066 1728 4488 -1 171 15 208 442 9451 2845 2.12882 2.12882 -98.7664 -2.12882 0 0 30529.5 848.041 0.01 0.21 0.01 -1 -1 0.01 0.0221666 0.0200952 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary_heap/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary_heap/config/golden_results.txt index b9f129eb9b4..f677f127a88 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary_heap/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_binary_heap/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_--router_heap_binary 3.84 vpr 64.02 MiB -1 -1 0.36 18356 3 0.08 -1 -1 33268 -1 -1 68 99 1 0 success v8.0.0-10487-g332d0eee5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-06-24T23:20:04 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 65556 99 130 343 473 1 225 298 12 12 144 clb auto 25.6 MiB 0.16 546 70943 21532 36057 13354 64.0 MiB 0.25 0.00 1.62851 -108.971 -1.62851 1.62851 0.28 0.00128139 0.00121193 0.0942161 0.0891007 40 1360 13 5.66058e+06 4.21279e+06 333335. 2314.82 1.46 0.492954 0.451517 12666 64609 -1 1238 7 411 665 40240 12831 2.02375 2.02375 -140.243 -2.02375 -0.301105 -0.10796 419432. 2912.72 0.09 0.04 0.07 -1 -1 0.09 0.0250123 0.0232731 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_--router_heap_binary 5.49 vpr 65.63 MiB -1 -1 0.41 18996 3 0.19 -1 -1 33284 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67204 99 130 344 474 1 227 298 12 12 144 clb auto 25.8 MiB 0.26 717 72933 22876 34411 15646 65.6 MiB 0.49 0.01 1.84343 -118.171 -1.84343 1.84343 0.32 0.00110711 0.00103861 0.0946179 0.0889931 -1 -1 -1 -1 38 1545 17 5.66058e+06 4.21279e+06 319130. 2216.18 1.31 0.310492 0.285139 12522 62564 -1 1253 9 393 600 24053 7065 1.90841 1.90841 -133.88 -1.90841 -1.28606 -0.31945 406292. 2821.48 0.16 0.13 0.07 -1 -1 0.16 0.032452 0.0305703 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_blocks_with_no_inputs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_blocks_with_no_inputs/config/golden_results.txt index 2d787787cf3..48a022dd3d9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_blocks_with_no_inputs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_blocks_with_no_inputs/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml ch_intrinsics.v common 3.45 vpr 65.81 MiB -1 -1 0.32 21348 3 0.11 -1 -1 36952 -1 -1 69 99 1 0 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67388 99 130 343 473 1 230 299 12 12 144 clb auto 27.1 MiB 0.08 556 77222 25256 37752 14214 65.8 MiB 0.30 0.00 1.5462 -112.861 -1.5462 1.5462 0.38 0.00080063 0.000722977 0.0757455 0.0688166 38 1281 25 5.66058e+06 4.26669e+06 306247. 2126.71 0.92 0.28043 0.252467 10492 58364 -1 1027 11 564 816 39513 11063 1.94304 1.94304 -131.753 -1.94304 -1.27501 -0.29768 388532. 2698.14 0.14 0.05 0.07 -1 -1 0.14 0.0288769 0.0267706 -k6_N10_mem32K_40nm.xml diffeq1.v common 10.05 vpr 69.04 MiB -1 -1 0.50 25852 15 0.40 -1 -1 37796 -1 -1 52 162 0 5 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 70700 162 96 994 935 1 709 315 16 16 256 mult_36 auto 30.9 MiB 0.25 5487 92421 26112 58354 7955 69.0 MiB 0.93 0.02 19.9622 -1597.96 -19.9622 19.9622 0.88 0.00319394 0.00295064 0.317285 0.295421 48 10678 33 1.21132e+07 4.78249e+06 721839. 2819.68 4.60 1.03241 0.953971 21168 139178 -1 9055 25 4204 9131 2456861 636581 21.609 21.609 -1782.52 -21.609 0 0 926152. 3617.78 0.23 0.48 0.09 -1 -1 0.23 0.109082 0.101744 -k6_N10_mem32K_40nm.xml single_wire.v common 0.59 vpr 62.98 MiB -1 -1 0.08 18916 1 0.02 -1 -1 33504 -1 -1 0 1 0 0 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64488 1 1 1 2 0 1 2 3 3 9 -1 auto 24.5 MiB 0.00 2 3 1 2 0 63.0 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.01 9.271e-06 5.597e-06 0.000112969 8.1896e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.00131824 0.00123952 254 297 -1 1 1 1 1 17 8 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00109269 0.00105791 -k6_N10_mem32K_40nm.xml single_ff.v common 0.60 vpr 62.86 MiB -1 -1 0.09 19324 1 0.03 -1 -1 33520 -1 -1 1 2 0 0 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64372 2 1 3 4 1 3 4 3 3 9 -1 auto 24.3 MiB 0.00 4 9 6 0 3 62.9 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.01 1.3913e-05 9.708e-06 0.000128096 0.000103465 2 4 2 53894 53894 1165.58 129.509 0.00 0.00133575 0.001249 254 297 -1 4 2 3 3 75 50 0.577715 0.577715 -1.12352 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.001169 0.00112706 -k6_N10_mem32K_40nm_i_or_o.xml ch_intrinsics.v common 9.87 vpr 65.71 MiB -1 -1 0.33 20948 3 0.12 -1 -1 37288 -1 -1 69 99 1 0 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67292 99 130 343 473 1 230 299 19 19 361 o auto 27.1 MiB 0.08 940 77222 18805 41143 17274 65.7 MiB 0.29 0.00 1.86877 -128.708 -1.86877 1.86877 3.13 0.000737698 0.00067743 0.0821963 0.0751828 32 1646 13 1.79173e+07 4.26669e+06 762679. 2112.68 3.31 0.381624 0.341802 24278 148653 -1 1457 13 650 873 57544 15371 2.14942 2.14942 -149.493 -2.14942 -0.441214 -0.239291 944445. 2616.19 0.41 0.06 0.17 -1 -1 0.41 0.0313872 0.0287798 -k6_N10_mem32K_40nm_i_or_o.xml diffeq1.v common 16.99 vpr 75.94 MiB -1 -1 0.50 25988 15 0.42 -1 -1 38076 -1 -1 52 162 0 5 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 77764 162 96 994 935 1 709 315 24 24 576 i auto 30.8 MiB 0.26 6882 73143 19957 46793 6393 75.9 MiB 0.68 0.01 19.9564 -1698.51 -19.9564 19.9564 4.98 0.00267534 0.00247734 0.213784 0.197609 48 10967 35 3.08128e+07 4.78249e+06 1.73314e+06 3008.92 5.68 0.828895 0.763605 45726 346985 -1 10157 31 3745 7811 2515002 592675 21.52 21.52 -1843.5 -21.52 0 0 2.23250e+06 3875.87 0.65 0.55 0.22 -1 -1 0.65 0.127803 0.118709 -k6_N10_mem32K_40nm_i_or_o.xml single_wire.v common 0.62 vpr 62.95 MiB -1 -1 0.09 18980 1 0.02 -1 -1 33116 -1 -1 0 1 0 0 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64456 1 1 1 2 0 1 2 4 4 16 i auto 24.5 MiB 0.00 3 3 0 0 3 62.9 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.01 9.296e-06 6.057e-06 8.15e-05 5.848e-05 4 2 1 215576 0 2092.17 130.760 0.01 0.00128963 0.00121448 324 600 -1 2 1 1 1 18 8 0.229376 nan -0.229376 -0.229376 0 0 3281.68 205.105 0.00 0.00 0.00 -1 -1 0.00 0.00144441 0.00139542 -k6_N10_mem32K_40nm_i_or_o.xml single_ff.v common 0.63 vpr 62.64 MiB -1 -1 0.10 19600 1 0.03 -1 -1 33448 -1 -1 1 2 0 0 success 106a52a release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-03-01T18:56:15 gh-actions-runner-vtr-auto-spawned12 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64148 2 1 3 4 1 3 4 4 4 16 i auto 24.0 MiB 0.00 5 9 0 0 9 62.6 MiB 0.00 0.00 0.669261 -1.04327 -0.669261 0.669261 0.01 1.3252e-05 9.69e-06 0.000120822 8.1606e-05 6 3 1 215576 53894 3281.68 205.105 0.01 0.00143879 0.00132966 340 760 -1 4 2 4 4 77 32 0.652118 0.652118 -1.05145 -0.652118 0 0 4601.64 287.602 0.00 0.00 0.00 -1 -1 0.00 0.00115249 0.00110986 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml ch_intrinsics.v common 5.84 vpr 65.10 MiB -1 -1 0.39 18876 3 0.10 -1 -1 33232 -1 -1 71 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66660 99 130 344 474 1 225 301 13 13 169 clb auto 25.4 MiB 0.12 670 76909 23210 36946 16753 65.1 MiB 0.32 0.00 2.16096 -124.917 -2.16096 2.16096 0.44 0.00120946 0.00114822 0.0881788 0.0826918 -1 -1 -1 -1 32 1294 10 6.63067e+06 4.37447e+06 323148. 1912.12 2.10 0.382628 0.350915 11612 59521 -1 1127 11 526 869 34973 10462 1.97404 1.97404 -140.169 -1.97404 -0.343814 -0.101108 396943. 2348.77 0.15 0.17 0.06 -1 -1 0.15 0.0412974 0.0388666 + k6_N10_mem32K_40nm.xml diffeq1.v common 15.40 vpr 67.93 MiB -1 -1 0.74 23840 15 0.44 -1 -1 34444 -1 -1 61 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 69560 162 96 1009 950 1 665 324 16 16 256 mult_36 auto 28.5 MiB 0.42 5631 94844 28473 58959 7412 67.9 MiB 1.03 0.01 21.7383 -1576.03 -21.7383 21.7383 0.79 0.00372085 0.0034284 0.379891 0.357576 -1 -1 -1 -1 44 10661 49 1.21132e+07 5.26753e+06 665287. 2598.78 8.62 1.79562 1.64394 20656 131250 -1 8667 20 3482 8436 990185 277410 22.0559 22.0559 -1674.9 -22.0559 0 0 864808. 3378.16 0.32 0.39 0.15 -1 -1 0.32 0.147219 0.137238 + k6_N10_mem32K_40nm.xml single_wire.v common 1.30 vpr 62.92 MiB -1 -1 0.10 17140 1 0.02 -1 -1 30180 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64428 1 1 1 2 0 1 2 3 3 9 -1 auto 24.1 MiB 0.04 2 3 0 3 0 62.9 MiB 0.03 0.00 0.18684 -0.18684 -0.18684 nan 0.01 2.6888e-05 2.0274e-05 0.000125894 9.4502e-05 -1 -1 -1 -1 2 1 1 53894 0 1165.58 129.509 0.03 0.00164489 0.00155135 254 297 -1 1 1 1 1 15 7 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.02 0.00 -1 -1 0.00 0.00173302 0.00169026 + k6_N10_mem32K_40nm.xml single_ff.v common 1.46 vpr 62.77 MiB -1 -1 0.11 17408 1 0.04 -1 -1 30188 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64272 2 1 3 4 1 3 4 3 3 9 -1 auto 24.0 MiB 0.04 6 9 3 5 1 62.8 MiB 0.06 0.00 0.55247 -0.90831 -0.55247 0.55247 0.02 3.4252e-05 2.6329e-05 0.000209418 0.000157449 -1 -1 -1 -1 2 2 2 53894 53894 1165.58 129.509 0.03 0.00197162 0.00182923 254 297 -1 2 2 3 3 56 20 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.01 0.04 0.00 -1 -1 0.01 0.00155682 0.0014869 + k6_N10_mem32K_40nm_i_or_o.xml ch_intrinsics.v common 9.61 vpr 64.97 MiB -1 -1 0.41 18928 3 0.13 -1 -1 33340 -1 -1 71 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66528 99 130 344 474 1 225 301 19 19 361 o auto 25.3 MiB 0.24 983 75901 19451 37817 18633 65.0 MiB 0.54 0.00 2.16871 -135.347 -2.16871 2.16871 2.86 0.00121773 0.00114162 0.0972287 0.0905415 -1 -1 -1 -1 32 1458 11 1.79173e+07 4.37447e+06 762679. 2112.68 1.51 0.219057 0.201389 24278 148653 -1 1307 11 602 931 46510 12471 2.09384 2.09384 -139.537 -2.09384 -0.328666 -0.186439 944445. 2616.19 0.44 0.06 0.18 -1 -1 0.44 0.031886 0.0295362 + k6_N10_mem32K_40nm_i_or_o.xml diffeq1.v common 27.29 vpr 82.19 MiB -1 -1 0.67 23752 15 0.43 -1 -1 34460 -1 -1 61 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 84164 162 96 1009 950 1 665 324 24 24 576 i auto 28.5 MiB 0.54 7386 77052 23414 46790 6848 82.2 MiB 0.69 0.01 21.6223 -1621.01 -21.6223 21.6223 4.64 0.00332881 0.00312838 0.251065 0.233165 -1 -1 -1 -1 32 13635 42 3.08128e+07 5.26753e+06 1.24505e+06 2161.54 15.07 1.57866 1.45267 39974 242477 -1 10826 21 3915 8751 1239118 330681 22.6153 22.6153 -1715.7 -22.6153 0 0 1.54255e+06 2678.04 0.62 0.44 0.21 -1 -1 0.62 0.158783 0.147345 + k6_N10_mem32K_40nm_i_or_o.xml single_wire.v common 1.44 vpr 62.84 MiB -1 -1 0.11 17216 1 0.04 -1 -1 30128 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64352 1 1 1 2 0 1 2 4 4 16 i auto 24.1 MiB 0.00 3 3 0 0 3 62.8 MiB 0.00 0.00 0.280667 -0.280667 -0.280667 nan 0.01 1.1887e-05 7.554e-06 7.9236e-05 5.4291e-05 -1 -1 -1 -1 4 2 1 215576 0 2092.17 130.760 0.01 0.00144545 0.00135883 324 600 -1 2 1 1 1 16 6 0.229376 nan -0.229376 -0.229376 0 0 3281.68 205.105 0.02 0.04 0.01 -1 -1 0.02 0.00203875 0.00199605 + k6_N10_mem32K_40nm_i_or_o.xml single_ff.v common 1.61 vpr 62.92 MiB -1 -1 0.09 17432 1 0.03 -1 -1 29964 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64432 2 1 3 4 1 3 4 4 4 16 i auto 24.1 MiB 0.05 7 9 0 0 9 62.9 MiB 0.00 0.00 0.647256 -1.07419 -0.647256 0.647256 0.01 1.7185e-05 1.2489e-05 0.000119925 9.2542e-05 -1 -1 -1 -1 6 3 2 215576 53894 3281.68 205.105 0.01 0.0016352 0.00153073 340 760 -1 3 2 3 3 71 25 0.569757 0.569757 -0.969092 -0.569757 0 0 4601.64 287.602 0.02 0.03 0.01 -1 -1 0.02 0.00163658 0.00157466 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bounding_box/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bounding_box/config/golden_results.txt index a1b41758edd..61bfbd9f7c3 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bounding_box/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_bounding_box/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.29 vpr 62.15 MiB -1 -1 0.41 25600 5 0.13 -1 -1 35892 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63644 10 2 181 183 1 40 24 6 6 36 clb auto 23.6 MiB 0.03 161 62.2 MiB 0.00 0.00 -1 -1 -1 -1 -1 0 0 0 0 18 203 17 646728 646728 30529.5 848.041 0.14 0.0368045 0.0303826 176 17 251 499 12972 3860 2.1656 2.1656 -96.7606 -2.1656 0 0 39290.9 1091.41 0.00 0.01 0.00703753 0.00627633 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 5.19 vpr 63.54 MiB -1 -1 0.72 23444 5 0.16 -1 -1 33404 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65060 10 2 181 183 1 35 24 6 6 36 clb auto 24.1 MiB 0.14 157 568 195 321 52 63.5 MiB 0.01 0.00 -1 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1 14 182 25 646728 646728 22986.6 638.518 1.78 0.168378 0.144307 1728 4488 -1 155 21 263 632 12700 3802 2.3029 2.3029 -99.5273 -2.3029 0 0 30529.5 848.041 0.01 0.20 0.01 -1 -1 0.01 0.0242495 0.021514 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_check_route_options/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_check_route_options/config/golden_results.txt index 96910f68ee0..045d3fe7955 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_check_route_options/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_check_route_options/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - sub_tiles.xml sub_tiles.blif common_--check_route_full 8.16 vpr 55.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56788 6 7 19 26 0 19 26 3 3 9 -1 auto 17.1 MiB 0.00 38 55.5 MiB 0.00 0.00 3.87729 -27.141 -3.87729 nan 7.30 1.3983e-05 9.899e-06 8.8846e-05 6.5695e-05 6 19 3 14813.4 192574 -1 -1 0.07 0.00038141 0.000290893 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.000190935 0.000151678 - sub_tiles.xml sub_tiles.blif common_--check_route_quick 7.97 vpr 55.34 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56668 6 7 19 26 0 19 26 3 3 9 -1 auto 16.9 MiB 0.00 38 55.3 MiB 0.00 0.00 3.87729 -27.141 -3.87729 nan 7.14 1.2087e-05 8.322e-06 8.8827e-05 6.6895e-05 6 19 3 14813.4 192574 -1 -1 0.10 0.000410439 0.000314684 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.000185524 0.000125995 - sub_tiles.xml sub_tiles.blif common_--check_route_off 8.00 vpr 55.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56832 6 7 19 26 0 19 26 3 3 9 -1 auto 17.0 MiB 0.00 38 55.5 MiB 0.00 0.00 3.87729 -27.141 -3.87729 nan 7.14 1.5085e-05 1.0484e-05 8.9766e-05 6.6302e-05 6 19 3 14813.4 192574 -1 -1 0.12 0.000451632 0.000351103 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.000167857 0.000134042 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + sub_tiles.xml sub_tiles.blif common_--check_route_full 8.20 vpr 56.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57704 6 7 19 26 0 19 26 3 3 9 -1 auto 17.6 MiB 0.01 51 216 43 63 110 56.4 MiB 0.04 0.00 3.682 -25.774 -3.682 nan 6.49 6.5121e-05 5.701e-05 0.000603112 0.000525304 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.25 0.00299547 0.00268387 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.02 0.04 -1 -1 0.00 0.0025833 0.00241723 + sub_tiles.xml sub_tiles.blif common_--check_route_quick 8.02 vpr 56.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57820 6 7 19 26 0 19 26 3 3 9 -1 auto 17.7 MiB 0.01 51 216 43 63 110 56.5 MiB 0.13 0.00 3.682 -25.774 -3.682 nan 6.21 6.8432e-05 5.8755e-05 0.000633201 0.00053959 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.25 0.00290908 0.00262232 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.01 0.03 0.04 -1 -1 0.01 0.00211606 0.00201309 + sub_tiles.xml sub_tiles.blif common_--check_route_off 8.13 vpr 56.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57860 6 7 19 26 0 19 26 3 3 9 -1 auto 17.8 MiB 0.01 51 216 43 63 110 56.5 MiB 0.09 0.00 3.682 -25.774 -3.682 nan 6.37 7.7326e-05 6.6753e-05 0.000634774 0.000545772 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.25 0.0037268 0.00328193 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.02 0.09 0.04 -1 -1 0.02 0.00205651 0.00193283 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/config/golden_results.txt index 9e5f6a99351..53684d6cff9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_cin_tie_off/config/golden_results.txt @@ -1,3 +1,3 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length - k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.40 vpr 64.12 MiB -1 -1 0.11 20096 1 0.02 -1 -1 36000 -1 -1 3 9 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 65664 9 8 75 70 1 34 20 5 5 25 clb auto 25.6 MiB 0.60 97 74 18 56 0 64.1 MiB 0.00 0.00 2.64007 -29.44 -2.64007 2.64007 0.03 0.000119511 0.000105355 0.00150744 0.00144146 -1 -1 -1 -1 20 183 15 151211 75605.7 29112.5 1164.50 0.11 0.0175261 0.0154045 1812 4729 -1 161 15 134 153 5442 3071 2.98537 2.98537 -38.4554 -2.98537 0 0 37105.9 1484.24 0.00 0.01 0.01 -1 -1 0.00 0.00675063 0.00621765 13 18 -1 -1 -1 -1 - k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 6.11 vpr 65.06 MiB -1 -1 0.13 20864 1 0.02 -1 -1 36332 -1 -1 7 19 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66624 19 18 308 249 1 142 44 6 6 36 clb auto 26.7 MiB 4.50 509 2277 492 1758 27 65.1 MiB 0.04 0.00 4.8135 -98.9875 -4.8135 4.8135 0.06 0.000372692 0.000330895 0.0147327 0.0133843 -1 -1 -1 -1 60 910 23 403230 176413 127342. 3537.27 0.64 0.156558 0.137174 4190 22875 -1 726 16 651 1079 37320 14467 4.73636 4.73636 -105.338 -4.73636 0 0 157803. 4383.41 0.02 0.03 0.02 -1 -1 0.02 0.0215368 0.0200712 55 83 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.90 vpr 63.76 MiB -1 -1 0.12 17788 1 0.03 -1 -1 30128 -1 -1 3 9 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65288 9 8 75 70 1 34 20 5 5 25 clb auto 24.4 MiB 0.65 94 74 30 43 1 63.8 MiB 0.01 0.00 2.64007 -29.0549 -2.64007 2.64007 0.02 0.000134569 0.000121726 0.00170312 0.00163516 -1 -1 -1 -1 20 213 13 151211 75605.7 29112.5 1164.50 0.06 0.0102057 0.00938622 1812 4729 -1 172 28 196 239 7256 3917 3.69111 3.69111 -41.2836 -3.69111 0 0 37105.9 1484.24 0.00 0.05 0.01 -1 -1 0.00 0.0114522 0.00994594 13 18 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 10.86 vpr 64.98 MiB -1 -1 0.15 18364 1 0.04 -1 -1 30524 -1 -1 6 19 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66540 19 18 308 249 1 134 43 5 5 25 clb auto 25.3 MiB 6.04 443 2443 654 1774 15 65.0 MiB 0.32 0.00 4.8546 -99.0126 -4.8546 4.8546 0.05 0.000624995 0.000577932 0.0282589 0.0262406 -1 -1 -1 -1 50 734 31 151211 151211 61632.8 2465.31 2.88 0.28247 0.251267 2268 9834 -1 572 18 574 959 28269 13700 5.68143 5.68143 -111.492 -5.68143 0 0 77226.2 3089.05 0.02 0.05 0.01 -1 -1 0.02 0.0287398 0.0263667 53 83 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases/config/golden_results.txt index 90d9f177c7c..ad248bb36be 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases/config/golden_results.txt @@ -1,4 +1,4 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk.sdc 0.33 vpr 57.89 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 59280 1 4 28 32 2 10 9 4 4 16 clb auto 19.6 MiB 0.01 20 27 15 8 4 57.9 MiB 0.00 0.00 2.44626 0 0 2.44626 0.02 6.522e-05 5.8807e-05 0.000520276 0.000480282 8 12 5 72000 72000 5593.62 349.601 0.03 0.00762819 0.00638476 672 1128 -1 12 6 24 24 485 152 2.38921 2.38921 0 0 0 0 6492.02 405.751 0.00 0.00 0.00 -1 -1 0.00 0.00235121 0.00216168 -timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk_assign.sdc 0.32 vpr 57.76 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 59144 1 4 28 32 2 10 9 4 4 16 clb auto 19.5 MiB 0.01 20 27 15 8 4 57.8 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 7.6909e-05 6.9134e-05 0.000530933 0.000491554 8 12 5 72000 72000 5593.62 349.601 0.03 0.00769087 0.00644081 672 1128 -1 12 6 24 24 485 152 2.38921 2.38921 0 0 0 0 6492.02 405.751 0.00 0.00 0.00 -1 -1 0.00 0.00237431 0.00218377 -timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/counter_clk.sdc 0.32 vpr 57.91 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 59304 1 4 28 32 2 10 9 4 4 16 clb auto 19.6 MiB 0.01 20 27 15 8 4 57.9 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 5.6889e-05 5.0331e-05 0.000476198 0.000438042 8 12 5 72000 72000 5593.62 349.601 0.03 0.00727055 0.00604445 672 1128 -1 12 6 24 24 485 152 2.38921 2.38921 0 0 0 0 6492.02 405.751 0.00 0.00 0.00 -1 -1 0.00 0.00234916 0.00215934 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk.sdc 0.58 vpr 57.55 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58932 1 4 28 32 2 10 9 4 4 16 clb auto 18.6 MiB 0.01 21 27 11 8 8 57.6 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 7.1025e-05 6.2018e-05 0.00055486 0.00050444 -1 -1 -1 -1 8 12 5 72000 72000 5593.62 349.601 0.06 0.00779734 0.00653696 672 1128 -1 13 8 23 23 458 156 2.39017 2.39017 0 0 0 0 6492.02 405.751 0.00 0.01 0.00 -1 -1 0.00 0.00306883 0.00282037 + timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk_assign.sdc 0.67 vpr 57.44 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58820 1 4 28 32 2 10 9 4 4 16 clb auto 18.4 MiB 0.02 21 27 11 8 8 57.4 MiB 0.02 0.00 2.44626 0 0 2.44626 0.01 6.4104e-05 5.5768e-05 0.000609665 0.000560857 -1 -1 -1 -1 8 12 5 72000 72000 5593.62 349.601 0.10 0.0111366 0.00958283 672 1128 -1 13 8 23 23 458 156 2.39017 2.39017 0 0 0 0 6492.02 405.751 0.00 0.01 0.00 -1 -1 0.00 0.00675941 0.0056104 + timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/counter_clk.sdc 0.64 vpr 57.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58996 1 4 28 32 2 10 9 4 4 16 clb auto 18.7 MiB 0.02 21 27 11 8 8 57.6 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 0.000116601 0.000103254 0.000726354 0.000668277 -1 -1 -1 -1 8 12 5 72000 72000 5593.62 349.601 0.03 0.00873381 0.00733762 672 1128 -1 13 8 23 23 458 156 2.39017 2.39017 0 0 0 0 6492.02 405.751 0.00 0.01 0.00 -1 -1 0.00 0.00321575 0.00294979 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases_set_delay/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases_set_delay/config/golden_results.txt index b7a7b9a3999..aa6222425e4 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases_set_delay/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_aliases_set_delay/config/golden_results.txt @@ -1,2 +1,2 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - timing/k6_N10_40nm.xml clock_set_delay_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/set_delay.sdc 0.20 vpr 57.79 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 2 -1 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 59180 2 2 22 24 2 4 6 4 4 16 clb auto 19.4 MiB 0.01 8 15 5 8 2 57.8 MiB 0.00 0.00 1.297 0 0 1.297 0.01 4.865e-05 4.0365e-05 0.000331746 0.000291111 -1 -1 -1 -1 6 13 3 72000 36000 4025.56 251.598 0.01 0.00265857 0.00243025 660 1032 -1 12 5 7 7 429 325 1.297 1.297 0 0 0 0 5593.62 349.601 0.00 0.00 0.00 -1 -1 0.00 0.00194089 0.00183475 + timing/k6_N10_40nm.xml clock_set_delay_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/set_delay.sdc 0.48 vpr 57.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58752 2 2 22 24 2 4 6 4 4 16 clb auto 18.5 MiB 0.01 8 15 5 7 3 57.4 MiB 0.00 0.00 1.297 0 0 1.297 0.01 7.8807e-05 7.0658e-05 0.000416035 0.000372622 -1 -1 -1 -1 6 12 3 72000 36000 4025.56 251.598 0.01 0.00270904 0.00251355 660 1032 -1 15 4 8 8 614 487 1.297 1.297 0 0 0 0 5593.62 349.601 0.00 0.00 0.00 -1 -1 0.00 0.00251275 0.00236334 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_buf/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_buf/config/golden_results.txt index c5e2acb803a..82ec46d8b99 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_buf/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_buf/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack -k6_frac_N10_mem32K_40nm_clk_buf.xml multiclock_buf.blif common 1.6599674 0.545 -1 -1 -1 0.545 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.293 -1 -1 -1 0.293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack + k6_frac_N10_mem32K_40nm_clk_buf.xml multiclock_buf.blif common 1.66039 0.545 -1 -1 -1 0.545 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.293 -1 -1 -1 0.293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_modeling/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_modeling/config/golden_results.txt index 70910d2d59a..373e866a79a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_modeling/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_modeling/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets -timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_ideal_--route_chan_width_60 0.30 vpr 57.61 MiB -1 -1 0.06 19388 1 0.02 -1 -1 33516 -1 -1 1 2 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 58988 2 1 3 4 1 3 4 3 3 9 -1 auto 19.1 MiB 0.00 4 9 6 3 0 57.6 MiB 0.00 0.00 0.55447 -0.91031 -0.55447 0.55447 0.00 1.4209e-05 1.0635e-05 0.000112608 8.885e-05 -1 2 1 18000 18000 14049.7 1561.07 0.00 0.00111531 0.00103596 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_route_--route_chan_width_60 0.30 vpr 57.69 MiB -1 -1 0.06 19244 1 0.02 -1 -1 33536 -1 -1 1 2 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 59076 2 1 3 4 1 3 4 3 3 9 -1 auto 19.2 MiB 0.00 6 9 5 2 2 57.7 MiB 0.00 0.00 0.48631 -0.91031 -0.48631 0.48631 0.00 1.4475e-05 1.0195e-05 0.000102982 7.9111e-05 -1 4 1 18000 18000 15707.9 1745.32 0.00 0.00110914 0.00104203 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 -timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_ideal_--route_chan_width_60 26.57 parmys 203.92 MiB -1 -1 21.33 208816 2 1.49 -1 -1 61188 -1 -1 155 5 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 61088 5 156 191 347 1 163 316 15 15 225 clb auto 21.3 MiB 0.03 22 75566 54444 2848 18274 59.7 MiB 0.07 0.00 1.49664 -15.129 -1.49664 1.49664 0.00 0.000225009 0.000209684 0.0166386 0.0154931 -1 57 6 3.042e+06 2.79e+06 863192. 3836.41 0.01 0.0221087 0.0205962 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 154 9 -timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_route_--route_chan_width_60 26.99 parmys 204.15 MiB -1 -1 21.52 209052 2 1.49 -1 -1 60656 -1 -1 155 5 -1 -1 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 60972 5 156 191 347 1 163 316 15 15 225 clb auto 21.3 MiB 0.03 25 77716 55619 3345 18752 59.5 MiB 0.13 0.00 1.47823 -14.9031 -1.47823 1.47823 0.00 0.000388878 0.000358886 0.0289108 0.0266306 -1 57 3 3.042e+06 2.79e+06 892591. 3967.07 0.01 0.0351201 0.0324031 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 153 10 -timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_ideal_--route_chan_width_60 0.35 vpr 63.08 MiB -1 -1 0.08 19324 1 0.02 -1 -1 33472 -1 -1 1 2 0 0 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64592 2 1 3 4 1 3 4 3 3 9 -1 auto 24.5 MiB 0.00 4 9 6 2 1 63.1 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.3129e-05 9.703e-06 0.000103951 8.1123e-05 -1 2 2 53894 53894 12370.0 1374.45 0.00 0.00116445 0.00109439 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_route_--route_chan_width_60 0.35 vpr 62.96 MiB -1 -1 0.08 19876 1 0.02 -1 -1 33484 -1 -1 1 2 0 0 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64468 2 1 3 4 1 3 4 3 3 9 -1 auto 24.3 MiB 0.00 6 9 5 2 2 63.0 MiB 0.00 0.00 0.48631 -0.90831 -0.48631 0.48631 0.00 1.5477e-05 1.1104e-05 0.000110622 8.6576e-05 -1 8 1 53894 53894 14028.3 1558.70 0.00 0.00113491 0.00106717 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 -timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_ideal_--route_chan_width_60 6.10 vpr 71.24 MiB -1 -1 1.09 28164 2 0.15 -1 -1 37372 -1 -1 32 311 15 0 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 72952 311 156 972 1128 1 953 514 28 28 784 memory auto 33.0 MiB 0.48 8979 193966 70726 114124 9116 71.2 MiB 1.31 0.03 4.11528 -4394.91 -4.11528 4.11528 0.00 0.00488787 0.00418834 0.465058 0.395185 -1 13380 12 4.25198e+07 9.94461e+06 2.96205e+06 3778.13 0.38 0.643724 0.557601 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 15 938 -timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_route_--route_chan_width_60 6.26 vpr 71.41 MiB -1 -1 1.06 28216 2 0.15 -1 -1 37564 -1 -1 32 311 15 0 success 84e0337 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-22T23:40:08 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 73128 311 156 972 1128 1 953 514 28 28 784 memory auto 33.2 MiB 0.48 8125 208372 75006 121666 11700 71.4 MiB 1.39 0.02 4.69946 -3846.5 -4.69946 4.69946 0.00 0.00473553 0.0040387 0.491963 0.415743 -1 12865 15 4.25198e+07 9.94461e+06 3.02951e+06 3864.17 0.41 0.692219 0.598424 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 14 939 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets + timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_ideal_--route_chan_width_60 0.61 vpr 57.25 MiB -1 -1 0.07 17368 1 0.03 -1 -1 29984 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58620 2 1 3 4 1 3 4 3 3 9 -1 auto 18.5 MiB 0.00 6 9 6 3 0 57.2 MiB 0.00 0.00 0.55447 -0.91031 -0.55447 0.55447 0.00 1.6807e-05 1.1824e-05 0.000119813 9.1115e-05 -1 -1 -1 -1 -1 2 4 18000 18000 14049.7 1561.07 0.00 0.0015798 0.00147928 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 + timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_route_--route_chan_width_60 0.59 vpr 57.21 MiB -1 -1 0.08 17320 1 0.03 -1 -1 30044 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58584 2 1 3 4 1 3 4 3 3 9 -1 auto 18.6 MiB 0.00 9 9 5 2 2 57.2 MiB 0.00 0.00 0.48631 -0.91031 -0.48631 0.48631 0.00 1.8256e-05 1.1481e-05 0.000119179 8.8895e-05 -1 -1 -1 -1 -1 4 1 18000 18000 15707.9 1745.32 0.00 0.00156657 0.00148701 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 + timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_ideal_--route_chan_width_60 38.32 parmys 205.31 MiB -1 -1 31.78 210240 2 1.22 -1 -1 54528 -1 -1 155 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60600 5 156 191 347 1 163 316 15 15 225 clb auto 19.7 MiB 0.04 31 86316 62145 3320 20851 59.2 MiB 0.16 0.00 1.49664 -15.0848 -1.49664 1.49664 0.00 0.000581684 0.000550637 0.0478501 0.0452811 -1 -1 -1 -1 -1 50 5 3.042e+06 2.79e+06 863192. 3836.41 0.01 0.0572937 0.0539594 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 154 9 + timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_route_--route_chan_width_60 38.38 parmys 205.27 MiB -1 -1 31.80 210196 2 1.48 -1 -1 54476 -1 -1 155 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60720 5 156 191 347 1 163 316 15 15 225 clb auto 19.7 MiB 0.04 33 86316 61936 3548 20832 59.3 MiB 0.13 0.00 1.51877 -14.6769 -1.51877 1.51877 0.00 0.00039327 0.000370069 0.0328101 0.030775 -1 -1 -1 -1 -1 59 7 3.042e+06 2.79e+06 892591. 3967.07 0.01 0.0420611 0.0392993 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 153 10 + timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_ideal_--route_chan_width_60 0.64 vpr 62.86 MiB -1 -1 0.10 17484 1 0.03 -1 -1 30080 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64368 2 1 3 4 1 3 4 3 3 9 -1 auto 24.2 MiB 0.00 6 9 6 2 1 62.9 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.8165e-05 1.317e-05 0.000125618 9.4159e-05 -1 -1 -1 -1 -1 2 2 53894 53894 12370.0 1374.45 0.00 0.00159727 0.00150396 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 + timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_--clock_modeling_route_--route_chan_width_60 0.64 vpr 62.82 MiB -1 -1 0.10 17360 1 0.02 -1 -1 29972 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64332 2 1 3 4 1 3 4 3 3 9 -1 auto 24.1 MiB 0.01 9 9 5 2 2 62.8 MiB 0.00 0.00 0.48631 -0.90831 -0.48631 0.48631 0.00 1.693e-05 1.0549e-05 0.000124748 8.9675e-05 -1 -1 -1 -1 -1 8 1 53894 53894 14028.3 1558.70 0.00 0.00264161 0.002541 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 + timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_ideal_--route_chan_width_60 7.90 vpr 70.32 MiB -1 -1 1.65 25700 2 0.23 -1 -1 33916 -1 -1 43 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 72008 311 156 972 1128 1 953 525 28 28 784 memory auto 29.8 MiB 0.49 8857 212225 75880 124970 11375 70.3 MiB 1.71 0.02 3.97422 -4305.11 -3.97422 3.97422 0.00 0.00572888 0.00511108 0.585707 0.519764 -1 -1 -1 -1 -1 12735 10 4.25198e+07 1.05374e+07 2.96205e+06 3778.13 0.46 0.855078 0.77478 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 15 938 + timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_route_--route_chan_width_60 7.81 vpr 70.43 MiB -1 -1 1.46 26084 2 0.15 -1 -1 33892 -1 -1 43 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 72124 311 156 972 1128 1 953 525 28 28 784 memory auto 29.8 MiB 0.58 9179 216459 74948 128246 13265 70.4 MiB 1.73 0.01 3.98529 -3456.75 -3.98529 3.98529 0.00 0.00402513 0.00355029 0.622817 0.553567 -1 -1 -1 -1 -1 13300 12 4.25198e+07 1.05374e+07 3.02951e+06 3864.17 0.44 0.790802 0.707413 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 14 939 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_pll/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_pll/config/golden_results.txt index 1acb4a86d73..2c49254b706 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_pll/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_clock_pll/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_frac_N10_mem32K_40nm_clk_pll_valid.xml multiclock_buf.blif common 0.50 vpr 62.02 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63504 8 4 25 28 5 19 19 6 6 36 clb auto 23.5 MiB 0.35 45 62.0 MiB 0.00 0.00 1.34532 -5.6855 -1.34532 0.545 0.00 2.2657e-05 1.4077e-05 0.000299238 0.000216784 83 15 15 852 323 431152 215576 56755.0 1576.53 2 1.71428 0.545 -6.99972 -1.71428 -0.369657 -0.225079 62.0 MiB 0.00 0.000779885 0.000622481 62.0 MiB 0.01 - k6_frac_N10_mem32K_40nm_clk_pll_invalid.xml multiclock_buf.blif common 0.02 vpr 18.30 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 18744 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_mem32K_40nm_clk_pll_valid.xml multiclock_buf.blif common 0.85 vpr 63.63 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65156 8 4 25 28 5 19 19 6 6 36 clb auto 24.9 MiB 0.59 52 194 34 129 31 63.6 MiB 0.01 0.00 1.3678 -5.84519 -1.3678 0.545 0.00 7.3716e-05 5.9392e-05 0.000813182 0.000675871 -1 -1 -1 -1 94 6.71429 38 2.71429 16 16 1079 432 431152 215576 56755.0 1576.53 2 2184 7490 -1 1.70371 0.545 -7.0897 -1.70371 -0.508975 -0.416549 0.01 -1 -1 63.6 MiB 0.00 0.00311706 0.00282227 63.6 MiB -1 0.01 + k6_frac_N10_mem32K_40nm_clk_pll_invalid.xml multiclock_buf.blif common 0.07 vpr 18.59 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 19032 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_constant_outputs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_constant_outputs/config/golden_results.txt index 501ab0b4cb4..15ed137557f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_constant_outputs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_constant_outputs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml constant_outputs_only.blif common 0.35 vpr 60.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 0 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62304 -1 2 2 4 0 2 4 4 4 16 clb auto 22.2 MiB 0.00 0 60.8 MiB 0.00 0.00 nan 0 0 nan 0.01 8.37e-06 4.077e-06 5.1441e-05 3.1587e-05 2 0 1 107788 107788 1342.00 83.8749 0.00 0.000138863 9.215e-05 0 1 0 0 0 0 nan nan 0 0 0 0 1342.00 83.8749 0.00 0.00 5.816e-05 4.1486e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml constant_outputs_only.blif common 0.57 vpr 62.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64448 -1 2 2 4 0 2 4 4 4 16 clb auto 24.2 MiB 0.01 0 9 0 2 7 62.9 MiB 0.00 0.00 nan 0 0 nan 0.01 1.5432e-05 9.947e-06 0.000103448 7.2917e-05 -1 -1 -1 -1 2 0 1 107788 107788 1342.00 83.8749 0.01 0.00166706 0.00157906 504 462 -1 0 1 0 0 0 0 nan nan 0 0 0 0 1342.00 83.8749 0.00 0.00 0.00 -1 -1 0.00 0.00153779 0.0014983 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_grid/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_grid/config/golden_results.txt index 7b03b115bc1..f2f0bc32df9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_grid/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_grid/config/golden_results.txt @@ -1,9 +1,9 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - fixed_grid.xml raygentop.v common 31.93 vpr 84.29 MiB -1 -1 2.78 45684 3 0.71 -1 -1 41016 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 86308 236 305 3195 3007 1 1534 668 25 25 625 -1 25x25 47.1 MiB 2.37 14349 84.3 MiB 1.84 0.03 4.58021 -2674.4 -4.58021 4.58021 1.66 0.00447648 0.00400873 0.487554 0.43412 58 28007 25 3.19446e+07 9.39128e+06 2.35761e+06 3772.18 16.84 1.99466 1.80308 23431 17 6377 16620 3075427 710292 4.98173 4.98173 -3149.98 -4.98173 0 0 3.00727e+06 4811.63 0.96 0.78 0.264546 0.248813 - column_io.xml raygentop.v common 47.53 vpr 84.22 MiB -1 -1 2.71 45536 3 0.72 -1 -1 41352 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 86244 236 305 3195 3007 1 1534 668 25 25 625 io auto 46.9 MiB 2.43 14517 84.2 MiB 1.57 0.03 4.49775 -2718.27 -4.49775 4.49775 1.57 0.00417574 0.00374502 0.405588 0.36346 64 28908 26 2.82259e+07 9.39128e+06 2.41964e+06 3871.43 32.84 2.09413 1.89702 24803 22 7740 21121 4981911 1043742 4.97726 4.97726 -3211.68 -4.97726 0 0 3.03857e+06 4861.71 0.84 1.04 0.275413 0.25701 - multiwidth_blocks.xml raygentop.v common 19.20 vpr 84.08 MiB -1 -1 2.74 45672 3 0.73 -1 -1 41176 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 86100 236 305 3195 3007 1 1534 668 19 19 361 io clb auto 47.0 MiB 2.43 13467 84.1 MiB 1.86 0.02 4.32599 -2624.75 -4.32599 4.32599 0.79 0.00426971 0.00382797 0.525267 0.469623 72 27028 27 1.65001e+07 9.39128e+06 1.34933e+06 3737.77 6.51 1.88472 1.7064 22829 16 6300 16262 3617564 891202 4.95899 4.95899 -3105.48 -4.95899 0 0 1.70087e+06 4711.55 0.44 0.86 0.259564 0.24446 - non_column.xml raygentop.v common 52.51 vpr 102.34 MiB -1 -1 2.92 45704 4 0.67 -1 -1 40604 -1 -1 121 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 104800 236 305 3191 3003 1 1528 669 33 33 1089 io auto 48.3 MiB 2.47 15480 96.8 MiB 1.75 0.03 4.52659 -2781.82 -4.52659 4.52659 3.22 0.00419781 0.00367326 0.463081 0.412393 58 27326 24 5.44432e+07 9.44517e+06 3.56397e+06 3272.70 33.56 2.39271 2.15992 24345 15 6119 15939 2924713 696809 5.17993 5.17993 -3221.9 -5.17993 0 0 4.56271e+06 4189.81 1.71 0.77 0.247711 0.232672 - non_column_tall_aspect_ratio.xml raygentop.v common 32.40 vpr 96.02 MiB -1 -1 2.90 45452 4 0.67 -1 -1 40620 -1 -1 121 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 98320 236 305 3191 3003 1 1528 669 23 46 1058 io auto 48.6 MiB 2.48 14503 95.9 MiB 1.61 0.02 4.82901 -2870.94 -4.82901 4.82901 3.11 0.00441668 0.00397965 0.436057 0.387679 48 30717 46 5.05849e+07 9.44517e+06 2.97514e+06 2812.04 14.48 1.8282 1.65276 24801 20 7106 18750 3263133 791246 5.37363 5.37363 -3355.22 -5.37363 0 0 3.78429e+06 3576.83 1.13 0.87 0.287444 0.268341 - non_column_wide_aspect_ratio.xml raygentop.v common 46.35 vpr 121.87 MiB -1 -1 2.26 42128 4 1.80 -1 -1 37796 -1 -1 121 236 1 6 success v8.0.0-7841-g74dc1fc14-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-06-08T03:59:32 redacted.eecg.utoronto.ca /home/redacted/vtr-verilog-to-routing/vtr_flow/tasks 124796 236 305 3191 3003 1 1528 669 53 27 1431 io auto 47.4 MiB 1.77 17266 108.5 MiB 1.21 0.01 4.80447 -2891.79 -4.80447 4.80447 3.57 0.00363128 0.00321672 0.388324 0.348591 64 28441 25 7.18852e+07 9.44517e+06 5.23266e+06 3656.65 26.71 2.33031 2.1133 26845 21 6314 17293 2966115 662201 5.72858 5.72858 -3293.82 -5.72858 0 0 6.59521e+06 4608.81 1.73 0.73 0.255886 0.23931 - custom_sbloc.xml raygentop.v common 21.27 vpr 83.72 MiB -1 -1 2.79 45776 3 0.70 -1 -1 41444 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 85732 236 305 3195 3007 1 1534 668 19 19 361 io clb auto 46.9 MiB 2.43 13735 83.7 MiB 1.91 0.02 4.39612 -2675.02 -4.39612 4.39612 0.74 0.0044847 0.00405598 0.53155 0.477899 70 26190 30 1.65001e+07 9.39128e+06 1.29772e+06 3594.79 8.57 2.26361 2.04893 22184 17 6363 16915 3424859 804203 5.11896 5.11896 -3113.51 -5.11896 0 0 1.63975e+06 4542.24 0.42 0.86 0.285233 0.26665 - multiple_io_types.xml raygentop.v common 145.09 vpr 502.64 MiB -1 -1 2.61 45672 3 0.68 -1 -1 41308 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 514708 236 305 3195 3007 1 1534 668 70 70 4900 io_left auto 47.7 MiB 3.30 29048 502.6 MiB 1.09 0.03 4.50877 -3399.68 -4.50877 4.50877 37.93 0.00538678 0.00467793 0.194474 0.172994 58 43008 22 2.76175e+08 9.39128e+06 1.56462e+07 3193.10 74.18 1.66997 1.51029 39061 15 7208 17987 4915378 1188414 5.09776 5.09776 -3855.81 -5.09776 0 0 2.00552e+07 4092.91 5.78 1.00 0.210002 0.197399 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + fixed_grid.xml raygentop.v common 50.12 vpr 84.06 MiB -1 -1 4.92 42896 3 0.97 -1 -1 38096 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86076 236 305 3199 3011 1 1520 677 25 25 625 -1 25x25 43.6 MiB 4.09 14118 291835 98746 175385 17704 84.1 MiB 2.87 0.03 4.72973 -2868.1 -4.72973 4.72973 2.50 0.00934029 0.00870323 1.04526 0.953005 -1 -1 -1 -1 52 26464 27 3.19446e+07 9.87633e+06 2.10129e+06 3362.06 27.31 4.1956 3.78489 66867 433069 -1 22541 17 6135 15940 1459564 357995 4.91399 4.91399 -3142.67 -4.91399 0 0 2.76576e+06 4425.22 0.86 0.74 0.34 -1 -1 0.86 0.41451 0.387228 + column_io.xml raygentop.v common 52.53 vpr 84.01 MiB -1 -1 4.75 43120 3 0.95 -1 -1 38088 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86024 236 305 3199 3011 1 1520 677 25 25 625 io auto 43.3 MiB 3.89 13024 265096 92273 145957 26866 84.0 MiB 2.89 0.07 4.68781 -2886.38 -4.68781 4.68781 2.43 0.016091 0.0142909 1.032 0.939322 -1 -1 -1 -1 54 26434 28 2.82259e+07 9.87633e+06 2.01770e+06 3228.33 30.36 4.7011 4.2358 60384 399159 -1 22444 15 6172 15744 1649398 413722 4.80071 4.80071 -3243.79 -4.80071 0 0 2.61977e+06 4191.64 0.69 0.69 0.36 -1 -1 0.69 0.354307 0.329375 + multiwidth_blocks.xml raygentop.v common 28.57 vpr 84.04 MiB -1 -1 4.75 43076 3 0.88 -1 -1 37996 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86060 236 305 3199 3011 1 1520 677 19 19 361 io clb auto 43.3 MiB 3.59 13048 259154 90005 148757 20392 84.0 MiB 2.45 0.03 4.71803 -2841.59 -4.71803 4.71803 0.97 0.00752803 0.00694478 0.875966 0.783393 -1 -1 -1 -1 68 23694 44 1.65001e+07 9.87633e+06 1.28755e+06 3566.63 9.85 3.54924 3.21845 36601 236909 -1 20599 14 5516 14268 1424917 397183 4.96129 4.96129 -3042.89 -4.96129 0 0 1.60474e+06 4445.26 0.53 0.88 0.31 -1 -1 0.53 0.465359 0.438075 + non_column.xml raygentop.v common 42.55 vpr 104.43 MiB -1 -1 5.31 43252 3 0.75 -1 -1 38476 -1 -1 125 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 106936 236 305 3188 3000 1 1523 673 33 33 1089 io auto 45.0 MiB 3.88 15120 277785 102957 155262 19566 101.8 MiB 2.72 0.04 4.88336 -2959.54 -4.88336 4.88336 4.12 0.0135356 0.0122621 1.04776 0.936225 -1 -1 -1 -1 54 27353 23 5.44432e+07 9.66075e+06 3.30487e+06 3034.77 14.70 2.8388 2.54814 100302 649205 -1 23944 23 6474 17454 1453295 386379 5.20545 5.20545 -3216.33 -5.20545 0 0 4.28921e+06 3938.67 1.71 0.82 0.92 -1 -1 1.71 0.475433 0.442218 + non_column_tall_aspect_ratio.xml raygentop.v common 50.32 vpr 113.80 MiB -1 -1 5.13 43092 3 0.78 -1 -1 38540 -1 -1 125 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 116536 236 305 3188 3000 1 1523 673 23 46 1058 io auto 45.1 MiB 3.75 14514 263045 93443 131443 38159 101.1 MiB 2.67 0.03 4.82017 -2930.26 -4.82017 4.82017 3.80 0.00828949 0.00744749 0.950815 0.857933 -1 -1 -1 -1 50 29578 44 5.05849e+07 9.66075e+06 3.07243e+06 2904.00 24.36 4.29725 3.87978 95149 595581 -1 24184 18 6943 17685 1630226 419654 5.16068 5.16068 -3258.77 -5.16068 0 0 3.91054e+06 3696.17 1.09 0.74 0.66 -1 -1 1.09 0.398171 0.369417 + non_column_wide_aspect_ratio.xml raygentop.v common 58.69 vpr 121.68 MiB -1 -1 4.91 42728 3 0.80 -1 -1 38520 -1 -1 125 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 124604 236 305 3188 3000 1 1523 673 53 27 1431 io auto 45.2 MiB 3.93 16209 316109 110737 181993 23379 121.4 MiB 2.93 0.03 4.68132 -2964.88 -4.68132 4.68132 4.96 0.0102309 0.00911393 1.15188 1.03477 -1 -1 -1 -1 46 33009 48 7.18852e+07 9.66075e+06 3.81039e+06 2662.74 29.85 4.41198 3.98344 125381 744275 -1 26452 19 7219 18561 1795297 455177 5.41811 5.41811 -3289.3 -5.41811 0 0 4.88937e+06 3416.75 1.36 0.79 0.79 -1 -1 1.36 0.408966 0.377897 + custom_sbloc.xml raygentop.v common 32.21 vpr 83.94 MiB -1 -1 4.78 43028 3 0.93 -1 -1 38248 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 85956 236 305 3199 3011 1 1520 677 19 19 361 io clb auto 43.3 MiB 3.43 12849 268067 89827 155344 22896 83.9 MiB 2.79 0.03 4.97602 -2840.03 -4.97602 4.97602 0.92 0.0104771 0.00924771 1.01557 0.905812 -1 -1 -1 -1 64 23203 26 1.65001e+07 9.87633e+06 1.19565e+06 3312.06 13.62 4.4638 4.00556 35881 230269 -1 20371 13 5422 13885 1260364 333144 5.08018 5.08018 -3072.96 -5.08018 0 0 1.50465e+06 4168.01 0.50 0.66 0.28 -1 -1 0.50 0.368005 0.3451 + multiple_io_types.xml raygentop.v common 121.78 vpr 532.44 MiB -1 -1 4.07 43200 3 0.82 -1 -1 37944 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 545220 236 305 3199 3011 1 1520 677 70 70 4900 io_left auto 43.7 MiB 5.99 31458 107633 6752 25817 75064 532.4 MiB 0.91 0.03 4.99804 -3572.5 -4.99804 4.99804 35.22 0.00883048 0.00802454 0.360901 0.3315 -1 -1 -1 -1 56 45066 25 2.76175e+08 9.87633e+06 1.50822e+07 3078.00 42.79 2.92767 2.65794 455094 2833831 -1 41437 17 7663 19266 3190631 818724 5.20546 5.20546 -3898.3 -5.20546 0 0 1.92585e+07 3930.30 6.20 1.08 2.64 -1 -1 6.20 0.379077 0.35159 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_pin_locs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_pin_locs/config/golden_results.txt index e157fcd359a..d908d4ed0df 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_pin_locs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_pin_locs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm_custom_pins.xml ch_intrinsics.v common 3.14 vpr 63.79 MiB -1 -1 0.23 22040 3 0.07 -1 -1 36500 -1 -1 68 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 65320 99 130 343 473 1 225 298 12 12 144 clb auto 25.8 MiB 0.14 542 63.8 MiB 0.16 0.00 1.63028 -105.253 -1.63028 1.63028 0.27 0.000455616 0.000406486 0.0363544 0.0325823 40 1326 13 5.66058e+06 4.21279e+06 343462. 2385.15 1.31 0.180697 0.164987 1183 9 404 637 33364 10066 1.99494 1.99494 -133.417 -1.99494 -1.08272 -0.29768 431791. 2998.55 0.11 0.03 0.0162522 0.0154375 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm_custom_pins.xml ch_intrinsics.v common 4.08 vpr 65.78 MiB -1 -1 0.40 19048 3 0.11 -1 -1 33284 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67356 99 130 344 474 1 227 298 12 12 144 clb auto 26.1 MiB 0.25 717 72933 22876 34411 15646 65.8 MiB 0.24 0.00 1.84343 -118.171 -1.84343 1.84343 0.43 0.000943281 0.00088635 0.0770799 0.0722149 -1 -1 -1 -1 38 1552 14 5.66058e+06 4.21279e+06 328943. 2284.32 0.86 0.213472 0.195926 12522 66188 -1 1256 9 393 600 24051 7073 1.90841 1.90841 -134.177 -1.90841 -1.28606 -0.31945 418267. 2904.63 0.16 0.04 0.09 -1 -1 0.16 0.0289584 0.0270731 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_sb_loc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_sb_loc/config/golden_results.txt index e17490da87e..8f5f4a02727 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_sb_loc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_sb_loc/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_DSP num_M9K num_M144K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time -stratixiv_arch.timing.xml ucsb_152_tap_fir_stratixiv_arch_timing.blif common 63.24 vpr 1.16 GiB 42 752 0 0 0 0 success v8.0.0-11451-g5181cb646 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.4.0-190-generic x86_64 2024-10-03T13:06:42 qlsof04.quicklogic.om /home/smahmoudi/Desktop/openfpga/OpenFPGA/vtr-verilog-to-routing/vtr_flow/tasks 1220852 13 29 26295 20086 1 12536 794 40 32 1280 -1 EP4SGX110 1063.7 MiB 13.82 72218 243344 47160 189629 6555 1192.2 MiB 7.72 0.11 5.46034 -5303.17 -4.46034 2.83892 0.01 0.020645 0.0170889 1.61051 1.32621 83501 6.66196 19920 1.58928 28207 39603 32076664 2698324 0 0 2.34711e+07 18336.8 16 375646 4005745 -1 5.52802 2.66399 -5393.44 -4.52802 0 0 6.91 -1 -1 1192.2 MiB 4.16 2.86687 2.4502 1192.2 MiB -1 13.03 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_DSP num_M9K num_M144K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + stratixiv_arch.timing.xml ucsb_152_tap_fir_stratixiv_arch_timing.blif common 75.27 vpr 1.16 GiB 42 758 0 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1221072 13 29 26295 20086 1 12439 800 40 32 1280 -1 EP4SGX110 1063.1 MiB 16.25 74701 260640 52935 201304 6401 1192.5 MiB 10.24 0.14 5.01005 -5474.24 -4.01005 2.78538 0.01 0.0384053 0.0310295 2.9187 2.44906 86606 6.96358 20705 1.66479 25778 34975 9286411 1665781 0 0 2.34683e+07 18334.6 14 375646 4004209 -1 5.31377 2.77336 -5554.53 -4.31377 0 0 7.20 -1 -1 1192.5 MiB 3.77 4.63873 3.95514 1192.5 MiB -1 15.10 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_switch_block/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_switch_block/config/golden_results.txt index a03be22409d..e1e3f31918d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_switch_block/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_custom_switch_block/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm.xml ch_intrinsics.v common 2.76 vpr 60.96 MiB -1 -1 0.21 22024 3 0.06 -1 -1 36580 -1 -1 72 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62420 99 130 351 481 1 271 302 15 15 225 memory auto 22.8 MiB 0.03 774 61.0 MiB 0.19 0.00 1.46817 -69.363 -1.46817 1.46817 0.03 0.000472028 0.000420005 0.0357283 0.0318399 1346 674 1552 219450 56453 1.16234e+06 363548 2.18283e+06 9701.45 11 1.66182 1.66182 -90.4434 -1.66182 -2.16844 -0.309514 61.0 MiB 0.07 0.0525552 0.0475172 61.0 MiB 1.48 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm.xml ch_intrinsics.v common 4.18 vpr 62.35 MiB -1 -1 0.41 18976 3 0.11 -1 -1 33312 -1 -1 72 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63844 99 130 353 483 1 273 302 15 15 225 memory auto 22.6 MiB 0.05 852 74178 23994 32332 17852 62.3 MiB 0.23 0.00 1.52582 -80.4614 -1.52582 1.52582 0.00 0.00092711 0.000867428 0.0693377 0.06488 -1 -1 -1 -1 1170 5.46729 648 3.02804 652 1492 181450 49896 1.16234e+06 363548 2.18283e+06 9701.45 10 48952 428016 -1 1.67686 1.67686 -105.874 -1.67686 -2.09914 -0.312873 0.62 -1 -1 62.3 MiB 0.07 0.0963391 0.0897976 62.3 MiB -1 1.98 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_dedicated_clock/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_dedicated_clock/config/golden_results.txt index 733fab5b718..843f979b3b0 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_dedicated_clock/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_dedicated_clock/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets - timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_dedicated_network 28.48 vpr 74.37 MiB -1 -1 0.82 29112 2 0.09 -1 -1 37120 -1 -1 30 311 15 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 76152 311 156 1015 1158 1 965 512 28 28 784 memory auto 33.0 MiB 0.67 8099 70.8 MiB 0.86 0.02 4.33535 -3285.96 -4.33535 4.33535 2.50 0.00280388 0.00239864 0.304808 0.261378 40 15073 23 4.25198e+07 9.83682e+06 2.15543e+06 2749.27 16.25 1.29313 1.15413 13732 12 2771 3144 3502108 1542188 4.41448 4.41448 -4444.1 -4.41448 -299.657 -1.22524 2.69266e+06 3434.52 1.02 2.26 0.12685 0.11873 15 950 - timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_dedicated_network 17.93 vpr 73.55 MiB -1 -1 0.81 29096 2 0.10 -1 -1 37336 -1 -1 30 311 15 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75312 311 156 1015 1158 1 965 512 28 28 784 memory auto 33.4 MiB 0.68 8271 72.6 MiB 0.82 0.01 4.35987 -3335.22 -4.35987 4.35987 2.46 0.00281134 0.00240047 0.293728 0.25155 40 15097 19 4.25198e+07 9.83682e+06 2.19000e+06 2793.37 6.37 1.12928 1.00156 13935 13 2814 3239 2670799 714133 4.46683 4.46683 -3900.1 -4.46683 -270.62 -1.42215 2.74289e+06 3498.59 0.99 1.87 0.136837 0.128021 15 950 - timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_dedicated_network 36.02 vpr 78.44 MiB -1 -1 0.83 28908 2 0.10 -1 -1 37440 -1 -1 30 311 15 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 80320 311 156 1015 1158 1 965 512 28 28 784 memory auto 33.3 MiB 0.69 8464 71.0 MiB 0.86 0.01 4.46267 -3505.94 -4.46267 4.46267 2.34 0.0028001 0.00239829 0.307975 0.263303 40 16956 24 4.25198e+07 9.83682e+06 2.15085e+06 2743.43 23.39 1.25764 1.12333 15739 14 2766 3161 6657207 4939138 5.49524 5.49524 -4433.28 -5.49524 -1531.24 -3.23871 2.68809e+06 3428.68 0.88 3.28 0.137686 0.128538 15 950 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets + timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_dedicated_network 36.56 vpr 83.12 MiB -1 -1 1.49 26172 2 0.18 -1 -1 34220 -1 -1 32 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 85116 311 156 1015 1158 1 965 514 28 28 784 memory auto 32.4 MiB 0.98 8658 202198 68681 121559 11958 83.1 MiB 1.72 0.04 4.52468 -3467.97 -4.52468 4.52468 3.21 0.00929751 0.00872728 0.605238 0.537126 -1 -1 -1 -1 36 15288 36 4.25198e+07 9.94461e+06 1.97160e+06 2514.80 19.52 3.06547 2.77593 76483 392267 -1 13678 12 2942 3353 770564 257137 4.55307 4.55307 -4387.12 -4.55307 -358.532 -1.23434 2.42825e+06 3097.26 1.16 2.02 0.42 -1 -1 1.16 0.193225 0.179934 15 950 + timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_dedicated_network 34.90 vpr 83.83 MiB -1 -1 1.47 25784 2 0.19 -1 -1 34296 -1 -1 32 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 85840 311 156 1015 1158 1 965 514 28 28 784 memory auto 32.4 MiB 0.98 8658 202198 68681 121559 11958 83.8 MiB 1.42 0.01 4.52468 -3467.97 -4.52468 4.52468 2.94 0.00393818 0.00343783 0.510989 0.454287 -1 -1 -1 -1 36 15409 27 4.25198e+07 9.94461e+06 2.00618e+06 2558.90 18.25 2.85623 2.58578 76483 403003 -1 13760 16 3067 3560 745826 226255 4.40123 4.40123 -4543.68 -4.40123 -178.96 -1.26307 2.47848e+06 3161.33 1.21 2.10 0.41 -1 -1 1.21 0.238381 0.220608 15 950 + timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/mkPktMerge.v common_--clock_modeling_dedicated_network 28.59 vpr 84.23 MiB -1 -1 1.56 25800 2 0.18 -1 -1 34208 -1 -1 32 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86256 311 156 1015 1158 1 965 514 28 28 784 memory auto 32.3 MiB 0.99 8666 202198 68103 120968 13127 84.2 MiB 1.54 0.02 4.38362 -3624.19 -4.38362 4.38362 3.07 0.00455316 0.00405324 0.525661 0.462249 -1 -1 -1 -1 40 15871 21 4.25198e+07 9.94461e+06 2.15085e+06 2743.43 10.76 2.02034 1.8204 78831 435812 -1 14774 15 2518 2894 1193668 708143 5.59605 5.59605 -4517.23 -5.59605 -1680.59 -3.37889 2.68809e+06 3428.68 1.36 3.08 0.49 -1 -1 1.36 0.410611 0.383265 15 950 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_default_fc_pinlocs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_default_fc_pinlocs/config/golden_results.txt index f70ce4d37e9..e7307c55606 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_default_fc_pinlocs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_default_fc_pinlocs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N4_90nm_default_fc_pinloc.xml diffeq.blif common 8.93 vpr 69.29 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 417 64 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 70952 64 39 1935 1974 1 1104 520 23 23 529 clb auto 31.5 MiB 0.26 9930 69.3 MiB 0.95 0.01 6.88012 -1336.71 -6.88012 6.88012 0.58 0.00219162 0.00189243 0.183738 0.154699 22 12669 27 983127 929624 735934. 1391.18 4.51 0.527606 0.45239 10966 18 7099 24037 1733502 451965 6.88012 6.88012 -1447.76 -6.88012 0 0 927497. 1753.30 0.13 0.56 0.118779 0.106543 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_N4_90nm_default_fc_pinloc.xml diffeq.blif common 15.60 vpr 69.04 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 438 64 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70696 64 39 1935 1974 1 1077 541 23 23 529 clb auto 28.8 MiB 0.37 10085 137127 36539 98027 2561 69.0 MiB 1.24 0.02 7.41831 -1418.64 -7.41831 7.41831 0.89 0.00562414 0.00480176 0.355623 0.303324 -1 -1 -1 -1 22 12754 28 983127 976439 735934. 1391.18 7.61 1.13414 0.983828 35322 121345 -1 11109 19 6608 23845 1462488 382373 7.14816 7.14816 -1474.13 -7.14816 0 0 927497. 1753.30 0.18 1.15 0.16 -1 -1 0.18 0.319207 0.292209 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_depop/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_depop/config/golden_results.txt index 112d2ae2ba4..2ed54d22fd2 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_depop/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_depop/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 28.50 vpr 82.54 MiB -1 -1 4.24 55020 5 1.55 -1 -1 40868 -1 -1 149 193 5 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 84520 193 205 2738 2672 1 1350 552 20 20 400 memory auto 44.9 MiB 1.42 10888 82.5 MiB 1.59 0.03 4.6568 -2665.16 -4.6568 4.6568 0.90 0.00328087 0.00275518 0.387116 0.331866 74 23337 41 2.07112e+07 1.07702e+07 1.98511e+06 4962.77 13.68 1.68624 1.49686 21197 44 6440 19425 4232423 1581833 5.52076 5.52076 -3182.57 -5.52076 -12.8369 -0.360359 2.48015e+06 6200.37 0.58 1.39 0.395614 0.361426 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 44.58 vpr 82.23 MiB -1 -1 8.38 52984 5 2.48 -1 -1 39568 -1 -1 153 193 5 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 84204 193 205 2718 2652 1 1312 556 20 20 400 memory auto 41.6 MiB 2.41 10365 229056 86247 118235 24574 82.2 MiB 2.50 0.03 4.93042 -2712.69 -4.93042 4.93042 1.52 0.00941947 0.00864017 1.00208 0.892514 -1 -1 -1 -1 82 19408 35 2.07112e+07 1.09858e+07 2.14661e+06 5366.52 20.26 4.55427 4.07475 53670 456392 -1 17785 15 4760 12593 961685 215487 5.25964 5.25964 -2873.25 -5.25964 -10.2812 -0.29768 2.68822e+06 6720.56 0.99 0.57 0.52 -1 -1 0.99 0.345857 0.321125 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_detailed_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_detailed_timing/config/golden_results.txt index ada4bef7f42..218d776b173 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_detailed_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_detailed_timing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 3.07 vpr 63.99 MiB -1 -1 0.23 22052 3 0.07 -1 -1 36608 -1 -1 68 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 65528 99 130 343 473 1 225 298 12 12 144 clb auto 26.0 MiB 0.14 574 64.0 MiB 0.18 0.01 1.63028 -109.727 -1.63028 1.63028 0.26 0.000482437 0.000428829 0.0418919 0.0379287 40 1376 20 5.66058e+06 4.21279e+06 333335. 2314.82 1.28 0.242344 0.222304 1211 9 370 555 25048 7436 1.97803 1.97803 -136.611 -1.97803 -1.34293 -0.298787 419432. 2912.72 0.10 0.03 0.0152101 0.0144455 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 4.12 vpr 65.63 MiB -1 -1 0.43 18936 3 0.10 -1 -1 33276 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67208 99 130 344 474 1 227 298 12 12 144 clb auto 25.9 MiB 0.31 717 72933 22876 34411 15646 65.6 MiB 0.28 0.00 1.84343 -118.171 -1.84343 1.84343 0.41 0.00118638 0.00111707 0.0787144 0.0738877 -1 -1 -1 -1 38 1540 14 5.66058e+06 4.21279e+06 319130. 2216.18 0.79 0.216838 0.200184 12522 62564 -1 1261 9 399 607 24533 7188 1.90841 1.90841 -134.095 -1.90841 -1.28606 -0.31945 406292. 2821.48 0.13 0.04 0.07 -1 -1 0.13 0.0278788 0.0260572 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt index 65afefc1140..4e81f397cb6 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_40nm.xml stereovision0.v common 122.65 vpr 276.58 MiB -1 -1 16.00 124916 5 53.73 -1 -1 69176 -1 -1 1305 169 -1 -1 success 28100b1 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-26T22:45:19 gh-actions-runner-vtr-auto-spawned39 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 283220 169 197 21117 21314 1 7688 1671 39 39 1521 clb auto 143.1 MiB 2.85 53732 982959 351248 609845 21866 276.6 MiB 9.99 0.10 3.76204 -15507.8 -3.76204 3.76204 9.44 0.0159737 0.0133362 1.80765 1.48264 42 70545 48 2.4642e+07 2.349e+07 4.65856e+06 3062.82 15.47 6.76385 5.69 122070 947469 -1 65863 22 34742 65762 3361891 541264 4.0937 4.0937 -16235.4 -4.0937 0 0 5.79504e+06 3810.02 1.92 1.71 0.57 -1 -1 1.92 1.12349 0.992148 -k6_N10_40nm_diff_switch_for_inc_dec_wires.xml stereovision0.v common 134.93 vpr 274.07 MiB -1 -1 16.21 125172 5 55.27 -1 -1 68860 -1 -1 1305 169 -1 -1 success 28100b1 release IPO VTR_ASSERT_LEVEL=3 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-26T22:45:19 gh-actions-runner-vtr-auto-spawned39 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 280648 169 197 21117 21314 1 7523 1671 39 39 1521 clb auto 143.0 MiB 2.85 51811 1022607 376856 616274 29477 274.1 MiB 10.32 0.10 3.69006 -14773.1 -3.69006 3.69006 9.39 0.0156983 0.0130538 1.86259 1.52838 38 69466 48 7.37824e+07 7.0333e+07 4.16760e+06 2740.04 25.94 8.42194 7.05848 119030 845795 -1 62788 23 35878 68950 2803037 507578 3.5696 3.5696 -16170.3 -3.5696 0 0 5.22668e+06 3436.35 1.75 1.68 0.49 -1 -1 1.75 1.12315 0.986398 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_40nm.xml stereovision0.v common 151.84 vpr 271.81 MiB -1 -1 18.22 123192 5 52.14 -1 -1 65180 -1 -1 1352 169 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 278332 169 197 21117 21314 1 6442 1718 39 39 1521 clb auto 119.5 MiB 5.00 49106 989078 343367 618966 26745 271.8 MiB 10.45 0.10 3.87493 -15116.8 -3.87493 3.87493 9.42 0.0295107 0.0249862 3.37183 2.81407 -1 -1 -1 -1 38 61885 27 2.4642e+07 2.4336e+07 4.29790e+06 2825.71 35.67 14.1092 11.5867 119030 883757 -1 58128 20 30287 65526 2502097 448520 3.7865 3.7865 -15779.5 -3.7865 0 0 5.41627e+06 3561.00 1.70 2.36 0.73 -1 -1 1.70 1.66008 1.43692 + k6_N10_40nm_diff_switch_for_inc_dec_wires.xml stereovision0.v common 138.53 vpr 269.16 MiB -1 -1 17.93 123432 5 52.13 -1 -1 65280 -1 -1 1342 169 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 275616 169 197 21117 21314 1 6530 1708 39 39 1521 clb auto 119.7 MiB 5.14 49426 991593 360564 611379 19650 269.2 MiB 10.35 0.10 3.57102 -14945.7 -3.57102 3.57102 9.54 0.0295319 0.0250555 3.23004 2.68449 -1 -1 -1 -1 38 62626 36 7.37824e+07 7.23272e+07 4.16760e+06 2740.04 21.59 11.6516 9.60196 119030 845795 -1 58726 26 31787 68726 2500109 471239 3.4196 3.4196 -15850.7 -3.4196 0 0 5.22668e+06 3436.35 1.71 2.83 0.65 -1 -1 1.71 2.09886 1.80153 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr/config/golden_results.txt index 70dd1dd8ee6..5a135fa5675 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml test_eblif.eblif common 0.12 vpr 60.11 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 3 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61552 3 1 5 6 1 4 5 3 3 9 -1 auto 21.6 MiB 0.00 9 12 1 9 2 60.1 MiB 0.00 0.00 0.52647 -0.88231 -0.52647 0.52647 0.00 1.0349e-05 7.103e-06 8.7732e-05 6.8547e-05 20 10 1 53894 53894 4880.82 542.314 0.00 0.00111687 0.00105846 379 725 -1 6 1 3 3 36 25 0.605178 0.605178 -1.1507 -0.605178 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00107362 0.00104552 - k6_frac_N10_40nm.xml conn_order.eblif common 0.12 vpr 59.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61420 2 1 4 5 1 3 4 3 3 9 -1 auto 21.6 MiB 0.00 6 9 2 3 4 60.0 MiB 0.00 0.00 0.69084 -1.21731 -0.69084 0.69084 0.00 1.4366e-05 1.0429e-05 0.000128779 0.000106057 20 9 1 53894 53894 4880.82 542.314 0.00 0.00110538 0.00104614 379 725 -1 15 1 2 2 25 19 1.6923204 1.6923204 -2.22723 -1.6923204 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00106677 0.00104008 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml test_eblif.eblif common 0.39 vpr 58.09 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59484 3 1 5 6 1 4 5 3 3 9 -1 auto 19.7 MiB 0.00 9 12 4 4 4 58.1 MiB 0.00 0.00 0.52647 -0.88231 -0.52647 0.52647 0.00 1.7269e-05 1.2376e-05 0.000128336 0.000101173 -1 -1 -1 -1 20 9 2 53894 53894 4880.82 542.314 0.01 0.00155195 0.0014541 379 725 -1 5 1 3 3 29 19 0.545526 0.545526 -1.07365 -0.545526 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00163857 0.00158765 + k6_frac_N10_40nm.xml conn_order.eblif common 0.47 vpr 58.00 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59388 2 1 4 5 1 3 4 3 3 9 -1 auto 19.6 MiB 0.00 6 9 4 1 4 58.0 MiB 0.00 0.00 0.69084 -1.21731 -0.69084 0.69084 0.00 2.0764e-05 1.5673e-05 0.000154884 0.000113002 -1 -1 -1 -1 20 7 2 53894 53894 4880.82 542.314 0.01 0.00171618 0.00160639 379 725 -1 15 1 2 2 51 45 1.70808 1.70808 -2.25272 -1.70808 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00144513 0.00140629 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr_write/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr_write/config/golden_results.txt index f912c39dbb1..9fe54ec14ab 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr_write/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_eblif_vpr_write/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - arch.xml eblif_write.eblif common 0.22 vpr 55.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56704 3 2 5 7 1 5 7 4 4 16 ff_tile io_tile auto 14.6 MiB 0.00 9 55.4 MiB 0.00 0.00 0.188521 -0.633403 -0.188521 0.188521 0.00 6.707e-06 3.749e-06 7.9381e-05 4.9746e-05 2 11 1 59253.6 29626.8 -1 -1 0.00 0.000207207 0.000142538 11 1 4 4 85 45 0.250278 0.250278 -0.937461 -0.250278 0 0 -1 -1 0.00 0.00 8.9428e-05 6.85e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + arch.xml eblif_write.eblif common 0.48 vpr 56.39 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57744 3 2 5 7 1 5 7 4 4 16 ff_tile io_tile auto 17.7 MiB 0.00 14 18 7 10 1 56.4 MiB 0.00 0.00 0.198536 -0.769354 -0.198536 0.198536 0.00 1.8648e-05 1.2503e-05 0.000127908 9.7495e-05 -1 -1 -1 -1 1 8 1 59253.6 29626.8 -1 -1 0.00 0.00173006 0.00162827 136 248 -1 8 1 4 4 68 40 0.189392 0.189392 -0.755508 -0.189392 0 0 -1 -1 0.00 0.00 0.00 -1 -1 0.00 0.00148908 0.0014446 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_echo_files/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_echo_files/config/golden_results.txt index cdcaaf3e50c..daf901cac9d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_echo_files/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_echo_files/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.39 vpr 61.89 MiB -1 -1 0.46 25756 5 0.14 -1 -1 35800 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63380 10 2 181 183 1 40 24 6 6 36 clb auto 23.3 MiB 0.04 158 61.9 MiB 0.03 0.00 2.0099 -86.005 -2.0099 2.0099 0.00 0.000106676 8.302e-05 0.00290123 0.00250146 -1 151 22 646728 646728 60312.4 1675.34 0.02 0.011394 0.0100017 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.56 vpr 63.62 MiB -1 -1 0.89 23616 5 0.15 -1 -1 33552 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65152 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.18 146 398 72 298 28 63.6 MiB 0.11 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.000445467 0.000411761 0.00801694 0.00746509 -1 -1 -1 -1 -1 136 16 646728 646728 60312.4 1675.34 0.11 0.0303214 0.027336 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_equivalent_sites/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_equivalent_sites/config/golden_results.txt index a6c5a8b811f..e9d9eeaa41e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_equivalent_sites/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_equivalent_sites/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - equivalent.xml equivalent.blif common 0.21 vpr 55.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56760 1 1 3 4 0 3 4 4 4 16 io_site_1 auto 17.0 MiB 0.00 9 55.4 MiB 0.00 0.00 3.81283 -3.81283 -3.81283 nan 0.00 6.978e-06 3.963e-06 4.3869e-05 2.6624e-05 1 5 1 59253.6 29626.8 -1 -1 0.00 0.00013097 8.2862e-05 5 1 3 3 93 17 3.81386 nan -3.81386 -3.81386 0 0 -1 -1 0.00 0.00 5.9977e-05 4.2545e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + equivalent.xml equivalent.blif common 0.46 vpr 56.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57816 1 1 3 4 0 3 4 4 4 16 io_site_1 auto 17.7 MiB 0.00 9 9 4 5 0 56.5 MiB 0.01 0.00 3.8649 -3.8649 -3.8649 nan 0.03 5.3982e-05 3.6833e-05 0.000300109 0.000216559 -1 -1 -1 -1 1 3 1 59253.6 29626.8 -1 -1 0.00 0.00165523 0.00149952 72 304 -1 3 1 3 3 37 15 3.69193 nan -3.69193 -3.69193 0 0 -1 -1 0.00 0.00 0.00 -1 -1 0.00 0.00144261 0.0014006 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fc_abs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fc_abs/config/golden_results.txt index aac17a8bd11..05df18fd944 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fc_abs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fc_abs/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm_fc_abs.xml stereovision3.v common 3.26 vpr 60.91 MiB -1 -1 0.72 22552 5 0.45 -1 -1 33444 -1 -1 12 10 0 0 success v8.0.0-10480-g679618a2e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-06-23T21:50:39 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 62376 10 2 181 183 1 40 24 6 6 36 clb auto 22.2 MiB 0.04 174 92 23 64 5 60.9 MiB 0.01 0.00 2.07517 -86.4376 -2.07517 2.07517 0.04 0.000492958 0.000453322 0.00292737 0.00275391 12 210 19 646728 646728 46454.1 1290.39 0.25 0.104303 0.0865769 1696 12788 -1 190 14 229 450 16294 3769 2.31307 2.31307 -105.081 -2.31307 0 0 57919.4 1608.87 0.01 0.03 0.01 -1 -1 0.01 0.0152419 0.0132254 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm_fc_abs.xml stereovision3.v common 3.12 vpr 63.56 MiB -1 -1 0.88 23644 5 0.18 -1 -1 33408 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65088 10 2 181 183 1 35 24 6 6 36 clb auto 24.1 MiB 0.14 146 398 73 297 28 63.6 MiB 0.03 0.00 2.15218 -93.1951 -2.15218 2.15218 0.05 0.000531567 0.000499904 0.0102703 0.00975502 -1 -1 -1 -1 8 178 24 646728 646728 33486.6 930.184 0.37 0.0711325 0.0621504 1588 8314 -1 187 26 302 650 19860 6525 2.46771 2.46771 -110.005 -2.46771 0 0 42482.2 1180.06 0.01 0.07 0.01 -1 -1 0.01 0.0278289 0.0226019 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/apex2_block_locations.place b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/apex2_block_locations.place index 39932395859..70ff5b0f62d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/apex2_block_locations.place +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/apex2_block_locations.place @@ -1,180 +1,175 @@ #block name x y subblk layer block number #---------- -- -- ------ ----- ------------ -o_1_ 3 3 5 0 #0 -o_2_ 4 4 5 0 #1 -o_0_ 2 4 2 0 #2 -n_n1827 5 4 3 0 #3 -n_n1829 5 3 0 0 #4 -n_n1812 3 5 2 0 #5 -n_n1866 5 2 3 0 #6 -n_n1865 5 4 2 0 #7 -[493] 3 2 5 0 #8 -n_n544 3 1 0 0 #9 -n_n416 4 4 3 0 #10 -n_n394 4 5 0 0 #11 -n_n391 4 5 5 0 #12 -n_n300 4 5 3 0 #13 -[260] 2 3 0 0 #14 -n_n437 4 2 4 0 #15 -[223] 1 1 4 0 #16 -[79] 1 3 5 0 #17 -[410] 1 1 2 0 #18 -[516] 1 3 3 0 #19 -[245] 1 1 0 0 #20 -[340] 2 4 0 0 #21 -[432] 2 3 2 0 #22 -[80] 2 1 4 0 #23 -[541] 1 1 1 0 #24 -n_n309 3 5 0 0 #25 -[8] 1 3 1 0 #26 -[546] 2 2 0 0 #27 -n_n706 5 4 4 0 #28 -[261] 5 4 0 0 #29 -[463] 3 3 0 0 #30 -n_n1575 1 2 0 0 #31 -n_n1571 2 1 0 0 #32 -[132] 1 4 2 0 #33 -[355] 2 1 1 0 #34 -[214] 2 2 2 0 #35 -[267] 2 2 1 0 #36 -n_n329 5 2 4 0 #37 -[420] 1 2 1 0 #38 -n_n849 5 4 1 0 #39 -[478] 1 1 3 0 #40 -[578] 5 5 3 0 #41 -[253] 4 3 3 0 #42 -[4] 3 4 5 0 #43 -[56] 4 4 1 0 #44 -[226] 4 4 0 0 #45 -[282] 4 3 1 0 #46 -[71] 3 5 4 0 #47 -[319] 3 4 1 0 #48 -[233] 3 1 3 0 #49 -[246] 3 1 2 0 #50 -[301] 1 3 2 0 #51 -[608] 2 2 3 0 #52 -[21] 5 5 2 0 #53 -[311] 4 2 1 0 #54 -[344] 5 3 1 0 #55 -[310] 5 4 5 0 #56 -[315] 4 3 2 0 #57 -[29] 2 4 3 0 #58 -[273] 2 1 5 0 #59 -n_n1690 3 3 2 0 #60 -[383] 3 2 3 0 #61 -[390] 4 3 5 0 #62 -[705] 2 2 5 0 #63 -[41] 3 2 4 0 #64 -[351] 3 4 2 0 #65 -[262] 5 5 0 0 #66 -[484] 3 4 0 0 #67 -[437] 1 1 5 0 #68 -[65] 1 2 2 0 #69 -[221] 2 2 4 0 #70 -[402] 2 1 3 0 #71 -[521] 3 5 1 0 #72 -[767] 3 2 0 0 #73 -[129] 1 4 5 0 #74 -[133] 2 4 5 0 #75 -[234] 2 4 4 0 #76 -[868] 3 5 5 0 #77 -[904] 2 3 4 0 #78 -[906] 4 2 5 0 #79 -[919] 1 2 4 0 #80 -[1283] 4 5 4 0 #81 -[1340] 5 2 1 0 #82 -[1382] 4 5 1 0 #83 -[1404] 5 3 4 0 #84 -[1417] 5 5 4 0 #85 -[1534] 3 3 3 0 #86 -[1615] 1 4 3 0 #87 -[6947] 2 4 1 0 #88 -[7082] 3 1 4 0 #89 -[7159] 2 3 1 0 #90 -[7191] 3 2 1 0 #91 -[7224] 4 2 3 0 #92 -[7319] 4 1 1 0 #93 -[7321] 4 4 2 0 #94 -[7351] 4 3 4 0 #95 -[7388] 4 3 0 0 #96 -[7423] 4 5 2 0 #97 -[7466] 2 3 5 0 #98 -[7782] 3 1 1 0 #99 -[7822] 5 2 5 0 #100 -[7885] 2 5 0 0 #101 -[7888] 1 2 3 0 #102 -[7997] 1 4 4 0 #103 -[8027] 3 1 5 0 #104 -[529] 5 3 5 0 #105 -[503] 5 3 3 0 #106 -n_n1582 1 4 0 0 #107 -[252] 1 2 5 0 #108 -[585] 4 1 4 0 #109 -[365] 3 2 2 0 #110 -[492] 3 3 4 0 #111 -[616] 4 1 5 0 #112 -n_n1870 2 1 2 0 #113 -n_n1716 1 3 4 0 #114 -[254] 3 5 3 0 #115 -[429] 3 4 3 0 #116 -[700] 4 2 2 0 #117 -[739] 3 4 4 0 #118 -[745] 5 3 2 0 #119 -[771] 3 3 1 0 #120 -[18] 5 5 1 0 #121 -[95] 4 1 0 0 #122 -[96] 4 4 4 0 #123 -[356] 1 4 1 0 #124 -[606] 4 2 0 0 #125 -[1015] 5 5 5 0 #126 -[1032] 5 2 2 0 #127 -[1066] 2 5 2 0 #128 -[1419] 5 2 0 0 #129 -[1622] 1 3 0 0 #130 -[7046] 2 3 3 0 #131 -[7211] 4 1 3 0 #132 -[7931] 2 5 5 0 #133 -[7004] 2 5 4 0 #134 -[7559] 2 5 3 0 #135 -[6979] 1 5 0 0 #136 -out:o_1_ 3 6 1 0 #137 -out:o_2_ 4 6 3 0 #138 -out:o_0_ 2 6 4 0 #139 -i_30_ 3 0 3 0 #140 -i_20_ 3 0 6 0 #141 -i_9_ 4 6 6 0 #142 -i_10_ 3 6 5 0 #143 -i_7_ 1 0 1 0 #144 -i_8_ 4 6 0 0 #145 -i_5_ 3 6 4 0 #146 -i_6_ 5 6 6 0 #147 -i_27_ 2 0 6 0 #148 -i_14_ 2 0 7 0 #149 -i_3_ 5 6 5 0 #150 -i_28_ 3 0 5 0 #151 -i_13_ 2 0 1 0 #152 -i_4_ 3 6 7 0 #153 -i_25_ 4 6 5 0 #154 -i_12_ 2 0 5 0 #155 -i_1_ 6 5 6 0 #156 -i_26_ 4 0 4 0 #157 -i_11_ 4 6 1 0 #158 -i_2_ 3 6 0 0 #159 -i_23_ 2 0 4 0 #160 -i_18_ 4 6 4 0 #161 -i_24_ 0 3 1 0 #162 -i_17_ 2 0 0 0 #163 -i_0_ 0 4 5 0 #164 -i_21_ 3 0 0 0 #165 -i_16_ 2 0 3 0 #166 -i_22_ 4 0 5 0 #167 -i_32_ 3 0 4 0 #168 -i_31_ 4 0 7 0 #169 -i_34_ 3 0 1 0 #170 -i_33_ 2 6 0 0 #171 -i_19_ 4 6 7 0 #172 -i_36_ 1 0 6 0 #173 -i_35_ 3 0 2 0 #174 -i_38_ 4 6 2 0 #175 -i_29_ 2 0 2 0 #176 -i_37_ 4 0 2 0 #177 +o_1_ 4 3 0 0 #0 +o_2_ 1 2 1 0 #1 +o_0_ 3 3 4 0 #2 +n_n1827 3 1 5 0 #3 +n_n1829 3 1 0 0 #4 +n_n1812 1 1 3 0 #5 +n_n1866 3 1 3 0 #6 +n_n1865 4 1 5 0 #7 +[493] 5 4 4 0 #8 +n_n544 4 4 3 0 #9 +n_n416 2 2 2 0 #10 +n_n394 2 1 3 0 #11 +n_n391 2 1 0 0 #12 +n_n300 2 1 1 0 #13 +[260] 3 5 3 0 #14 +n_n437 5 1 3 0 #15 +[223] 3 4 2 0 #16 +[79] 3 5 0 0 #17 +[410] 3 5 4 0 #18 +[516] 4 5 4 0 #19 +[245] 5 5 3 0 #20 +[340] 3 3 5 0 #21 +[432] 3 5 1 0 #22 +[80] 4 4 4 0 #23 +[541] 5 4 2 0 #24 +n_n309 2 1 5 0 #25 +[8] 4 5 1 0 #26 +[546] 4 5 3 0 #27 +n_n706 3 1 2 0 #28 +[261] 3 1 4 0 #29 +[463] 5 2 3 0 #30 +n_n1575 4 5 0 0 #31 +n_n1571 3 4 1 0 #32 +[132] 2 5 4 0 #33 +[355] 3 4 0 0 #34 +[214] 5 3 4 0 #35 +[267] 5 4 0 0 #36 +n_n329 5 1 4 0 #37 +[420] 5 3 1 0 #38 +n_n849 3 1 1 0 #39 +[478] 5 5 0 0 #40 +[578] 1 2 5 0 #41 +[253] 2 3 0 0 #42 +[4] 4 2 0 0 #43 +[56] 1 1 2 0 #44 +[226] 2 2 4 0 #45 +[282] 3 3 2 0 #46 +[377] 1 1 0 0 #47 +[71] 1 1 1 0 #48 +[319] 5 2 0 0 #49 +[233] 2 4 3 0 #50 +[246] 2 4 0 0 #51 +[301] 3 5 5 0 #52 +[441] 2 5 1 0 #53 +[608] 5 4 5 0 #54 +[21] 2 1 2 0 #55 +[311] 4 1 4 0 #56 +[344] 3 2 1 0 #57 +[310] 4 1 3 0 #58 +[315] 4 1 1 0 #59 +[29] 3 2 4 0 #60 +[273] 3 4 5 0 #61 +n_n1690 2 4 4 0 #62 +[383] 4 4 1 0 #63 +[390] 3 2 3 0 #64 +[705] 5 4 3 0 #65 +[41] 5 3 2 0 #66 +[351] 5 2 4 0 #67 +[484] 5 2 5 0 #68 +[437] 5 5 1 0 #69 +[349] 2 3 4 0 #70 +[65] 5 5 4 0 #71 +[221] 4 5 5 0 #72 +[402] 2 4 2 0 #73 +[521] 1 2 0 0 #74 +[767] 4 2 3 0 #75 +[133] 2 5 2 0 #76 +[234] 4 3 4 0 #77 +[868] 3 3 3 0 #78 +[904] 4 3 1 0 #79 +[906] 5 3 3 0 #80 +[919] 4 2 1 0 #81 +[1253] 4 1 0 0 #82 +[1283] 1 2 4 0 #83 +[1340] 3 2 0 0 #84 +[1382] 2 2 5 0 #85 +[1404] 3 2 2 0 #86 +[1417] 1 2 3 0 #87 +[1534] 4 4 2 0 #88 +[1615] 2 5 5 0 #89 +[6947] 3 4 4 0 #90 +[7082] 4 4 0 0 #91 +[7159] 5 2 1 0 #92 +[7165] 5 4 1 0 #93 +[7191] 4 3 2 0 #94 +[7319] 1 3 1 0 #95 +[7321] 3 3 0 0 #96 +[7351] 2 3 5 0 #97 +[7388] 2 2 3 0 #98 +[7423] 2 1 4 0 #99 +[7466] 3 2 5 0 #100 +[7782] 4 3 3 0 #101 +[7822] 3 4 3 0 #102 +[7885] 3 5 2 0 #103 +[7888] 4 2 4 0 #104 +[7997] 5 5 2 0 #105 +[8027] 5 3 0 0 #106 +[50] 2 3 3 0 #107 +[288] 2 3 1 0 #108 +[539] 5 3 5 0 #109 +[372] 4 3 5 0 #110 +n_n1584 2 4 5 0 #111 +[196] 2 3 2 0 #112 +[585] 1 3 2 0 #113 +[365] 4 4 5 0 #114 +[492] 4 2 2 0 #115 +[616] 3 3 1 0 #116 +[430] 2 2 1 0 #117 +[663] 2 2 0 0 #118 +[700] 4 2 5 0 #119 +[322] 1 3 5 0 #120 +[739] 1 3 4 0 #121 +[745] 4 1 2 0 #122 +[771] 2 4 1 0 #123 +[95] 4 5 2 0 #124 +[345] 1 2 2 0 #125 +[759] 1 3 0 0 #126 +[1066] 1 4 3 0 #127 +[7199] 5 2 2 0 #128 +[7969] 2 5 3 0 #129 +[7328] 1 3 3 0 #130 +[7559] 1 4 4 0 #131 +out:o_1_ 6 3 3 0 #132 +out:o_2_ 0 2 3 0 #133 +out:o_0_ 3 6 5 0 #134 +i_30_ 3 6 3 0 #135 +i_20_ 6 5 2 0 #136 +i_9_ 2 0 5 0 #137 +i_10_ 4 0 1 0 #138 +i_7_ 3 6 1 0 #139 +i_8_ 2 0 7 0 #140 +i_5_ 2 0 1 0 #141 +i_6_ 3 0 7 0 #142 +i_27_ 4 6 6 0 #143 +i_14_ 4 6 3 0 #144 +i_3_ 4 6 5 0 #145 +i_28_ 3 0 6 0 #146 +i_13_ 4 6 0 0 #147 +i_4_ 6 1 6 0 #148 +i_25_ 2 6 1 0 #149 +i_12_ 2 0 4 0 #150 +i_1_ 6 1 5 0 #151 +i_26_ 4 0 4 0 #152 +i_11_ 2 0 3 0 #153 +i_2_ 6 1 7 0 #154 +i_23_ 3 6 4 0 #155 +i_18_ 2 0 2 0 #156 +i_24_ 3 0 5 0 #157 +i_17_ 3 6 2 0 #158 +i_0_ 4 0 0 0 #159 +i_21_ 4 6 4 0 #160 +i_16_ 3 6 6 0 #161 +i_22_ 2 0 0 0 #162 +i_32_ 3 0 0 0 #163 +i_31_ 3 6 7 0 #164 +i_34_ 3 6 0 0 #165 +i_33_ 3 0 3 0 #166 +i_19_ 2 0 6 0 #167 +i_36_ 5 6 7 0 #168 +i_35_ 3 0 4 0 #169 +i_38_ 3 0 2 0 #170 +i_29_ 4 6 1 0 #171 +i_37_ 4 0 5 0 #172 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/config/golden_results.txt index 9d3085b67ac..35bd7aa8ea6 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_clusters/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -fix_clusters_test_arch.xml apex2.blif common 10.78 vpr 71.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 137 38 -1 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 73360 38 3 1916 1919 0 1045 178 7 7 49 clb auto 31.0 MiB 3.84 5376 1178 0 0 1178 71.6 MiB 0.06 0.00 5.09511 -14.9435 -5.09511 nan 0.18 0.00358743 0.00317856 0.03786 0.0361157 158 7378 33 1.34735e+06 7.38348e+06 924312. 18863.5 4.37 1.13539 0.962241 18354 286522 -1 7086 16 5502 22089 1016144 327872 5.60881 nan -16.3788 -5.60881 0 0 1.15416e+06 23554.3 0.15 0.38 0.18 -1 -1 0.15 0.185772 0.16773 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + fix_clusters_test_arch.xml apex2.blif common 24.18 vpr 72.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 132 38 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 74380 38 3 1916 1919 0 1054 173 7 7 49 clb auto 32.1 MiB 4.40 5572 10755 973 9191 591 72.6 MiB 0.34 0.01 5.10521 -15.0222 -5.10521 nan 0.24 0.00524309 0.00429013 0.156975 0.1351 -1 -1 -1 -1 162 7714 43 1.34735e+06 7.11401e+06 944075. 19266.8 15.81 3.57525 3.0646 18450 291720 -1 7029 18 5960 24809 1093324 352159 5.64405 nan -16.6537 -5.64405 0 0 1.17629e+06 24005.9 0.25 0.82 0.25 -1 -1 0.25 0.397625 0.36383 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_pins_random/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_pins_random/config/golden_results.txt index 1a87862b89e..6e10a5ba903 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_pins_random/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fix_pins_random/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.43 vpr 62.00 MiB -1 -1 0.42 25668 5 0.16 -1 -1 36032 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63488 10 2 181 183 1 40 24 6 6 36 clb auto 23.4 MiB 0.03 162 62.0 MiB 0.01 0.00 2.0099 -86.7327 -2.0099 2.0099 0.03 0.000109167 8.4536e-05 0.00417013 0.00381966 18 224 23 646728 646728 30529.5 848.041 0.17 0.044412 0.0370229 167 19 208 432 10331 3140 2.16678 2.16678 -93.2813 -2.16678 0 0 39290.9 1091.41 0.00 0.01 0.00728227 0.00646045 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 3.30 vpr 63.87 MiB -1 -1 0.94 23512 5 0.18 -1 -1 33344 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65404 10 2 181 183 1 35 24 6 6 36 clb auto 24.5 MiB 0.11 148 364 32 317 15 63.9 MiB 0.05 0.00 2.14643 -90.773 -2.14643 2.14643 0.03 0.000335395 0.000285078 0.00639243 0.00590769 -1 -1 -1 -1 12 177 21 646728 646728 19965.4 554.594 0.61 0.149391 0.122522 1696 3924 -1 153 14 202 474 9884 3007 2.16575 2.16575 -96.6802 -2.16575 0 0 25971.8 721.439 0.01 0.03 0.00 -1 -1 0.01 0.0144768 0.0129004 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt index 67f180f6b08..f954a2b1702 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flat_router/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 6.77 vpr 75.04 MiB -1 -1 1.37 31788 16 1.37 -1 -1 35456 -1 -1 61 45 3 1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 76840 45 32 1188 1147 1 781 142 14 14 196 memory auto 38.0 MiB 1.38 6687 75.0 MiB 0.32 0.00 9.87688 -6144.34 -9.87688 9.87688 0.02 0.00160353 0.00140955 0.146887 0.130179 -1 10701 12 9.20055e+06 5.32753e+06 1.47691e+06 7535.23 1.15 0.187274 0.164699 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common_--router_algorithm_parallel_--num_workers_4 6.97 vpr 74.97 MiB -1 -1 1.39 31556 16 1.40 -1 -1 35520 -1 -1 61 45 3 1 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 76772 45 32 1188 1147 1 781 142 14 14 196 memory auto 37.9 MiB 1.39 6687 75.0 MiB 0.40 0.00 9.87688 -6144.34 -9.87688 9.87688 0.02 0.00245521 0.00214283 0.217122 0.186066 -1 10603 14 9.20055e+06 5.32753e+06 1.47691e+06 7535.23 1.21 0.280862 0.238432 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common 13.56 vpr 77.04 MiB -1 -1 3.92 32680 16 0.60 -1 -1 34972 -1 -1 60 45 3 1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 78892 45 32 1192 1151 1 782 141 14 14 196 memory auto 38.2 MiB 2.96 6987 30885 8485 19109 3291 77.0 MiB 1.25 0.02 10.7872 -7159.4 -10.7872 10.7872 0.01 0.00497106 0.00453777 0.461478 0.422614 -1 -1 -1 -1 -1 10741 14 9.20055e+06 5.27364e+06 1.47691e+06 7535.23 2.03 0.580473 0.527495 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_frac_chain_mem32K_40nm.xml spree.v common_--router_algorithm_parallel_--num_workers_4 13.38 vpr 77.06 MiB -1 -1 3.60 32516 16 0.58 -1 -1 34992 -1 -1 60 45 3 1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 78912 45 32 1192 1151 1 782 141 14 14 196 memory auto 38.2 MiB 2.94 6987 30885 8485 19109 3291 77.1 MiB 1.04 0.01 10.7872 -7159.4 -10.7872 10.7872 0.00 0.00222077 0.00193155 0.339907 0.301027 -1 -1 -1 -1 -1 10825 14 9.20055e+06 5.27364e+06 1.47691e+06 7535.23 2.22 0.417402 0.352766 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flyover_wires/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flyover_wires/config/golden_results.txt index fc32676464e..24daf2d2e35 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flyover_wires/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_flyover_wires/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - shorted_flyover_wires.xml raygentop.v common 20.01 vpr 84.43 MiB -1 -1 2.44 45968 3 0.64 -1 -1 41100 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 86460 236 305 3195 3007 1 1534 668 19 19 361 io clb auto 47.4 MiB 2.28 13399 84.4 MiB 1.49 0.02 4.54694 -2646.05 -4.54694 4.54694 0.68 0.00378678 0.00339504 0.392903 0.350506 70 31151 33 1.65001e+07 9.39128e+06 1.20853e+06 3347.73 7.96 1.78146 1.61158 25687 19 6774 18311 4053205 998444 5.33213 5.33213 -3122.53 -5.33213 0 0 1.52253e+06 4217.55 0.36 0.92 0.246398 0.231387 - buffered_flyover_wires.xml raygentop.v common 19.82 vpr 84.43 MiB -1 -1 2.47 45620 3 0.68 -1 -1 41204 -1 -1 120 236 1 6 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 86452 236 305 3195 3007 1 1534 668 19 19 361 io clb auto 47.4 MiB 2.26 13765 84.4 MiB 1.53 0.02 4.50782 -2618.45 -4.50782 4.50782 0.63 0.003862 0.00345199 0.388609 0.345716 70 30395 33 1.65001e+07 9.39128e+06 1.25135e+06 3466.35 7.80 1.59672 1.44393 24167 16 6477 16722 3045805 752727 5.02397 5.02397 -3115.32 -5.02397 0 0 1.57792e+06 4370.98 0.36 0.76 0.235441 0.221918 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + shorted_flyover_wires.xml raygentop.v common 32.00 vpr 84.00 MiB -1 -1 4.94 43052 3 0.95 -1 -1 38056 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86016 236 305 3199 3011 1 1520 677 19 19 361 io clb auto 43.4 MiB 3.67 13419 262125 90999 150942 20184 84.0 MiB 2.78 0.03 4.69737 -2831.91 -4.69737 4.69737 1.01 0.00832504 0.00776365 0.932353 0.847983 -1 -1 -1 -1 66 27201 39 1.65001e+07 9.87633e+06 1.15238e+06 3192.19 11.80 3.82946 3.48711 36241 234685 -1 22898 17 6143 16341 1829326 503243 5.28065 5.28065 -3148.98 -5.28065 0 0 1.43513e+06 3975.42 0.58 0.95 0.26 -1 -1 0.58 0.436495 0.407813 + buffered_flyover_wires.xml raygentop.v common 32.17 vpr 84.02 MiB -1 -1 4.60 43460 3 0.83 -1 -1 38072 -1 -1 129 236 1 6 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86032 236 305 3199 3011 1 1520 677 19 19 361 io clb auto 43.3 MiB 3.46 14176 262125 95409 146838 19878 84.0 MiB 2.60 0.03 5.30111 -3035.02 -5.30111 5.30111 0.96 0.0108245 0.0101036 0.99455 0.909375 -1 -1 -1 -1 68 26718 29 1.65001e+07 9.87633e+06 1.22105e+06 3382.40 12.62 4.02255 3.63163 36601 236909 -1 22839 20 6287 16443 1625103 418922 5.52369 5.52369 -3272.68 -5.52369 0 0 1.52022e+06 4211.15 0.57 1.21 0.35 -1 -1 0.57 0.599325 0.559459 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fpu_hard_block_arch/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fpu_hard_block_arch/config/golden_results.txt index 8ab49e15006..d0dca393ab5 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fpu_hard_block_arch/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fpu_hard_block_arch/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - hard_fpu_arch_timing.xml mm3.v common 5.76 vpr 61.35 MiB -1 -1 0.11 21680 1 0.01 -1 -1 33736 -1 -1 0 193 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62824 193 32 545 422 1 406 228 22 22 484 block_FPU auto 22.7 MiB 4.15 4733 61.4 MiB 0.20 0.00 2.985 -836.546 -2.985 2.985 0.04 0.000817841 0.000745703 0.0705998 0.0643979 6354 567 567 2621219 934418 882498 103149 1.07647e+06 2224.11 4 2.985 2.985 -880.625 -2.985 -11.8685 -0.0851 61.4 MiB 0.41 0.089166 0.0823093 61.4 MiB 0.38 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + hard_fpu_arch_timing.xml mm3.v common 7.03 vpr 62.24 MiB -1 -1 0.19 18436 1 0.05 -1 -1 30832 -1 -1 0 193 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63736 193 32 545 422 1 386 228 22 22 484 block_FPU auto 22.7 MiB 4.82 4750 57300 25032 31924 344 62.2 MiB 0.33 0.00 2.985 -849.007 -2.985 2.985 0.00 0.00155598 0.00146459 0.152665 0.144051 -1 -1 -1 -1 6282 16.3169 1670 4.33766 556 556 206642 56826 882498 103149 1.07647e+06 2224.11 4 26490 217099 -1 2.985 2.985 -872.623 -2.985 -13.6498 -0.0851 0.35 -1 -1 62.2 MiB 0.08 0.182075 0.172086 62.2 MiB -1 0.64 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fracturable_luts/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fracturable_luts/config/golden_results.txt index d911c28e4e3..6ed66139c02 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fracturable_luts/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_fracturable_luts/config/golden_results.txt @@ -1,2 +1,2 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time - k6_N8_I80_fleI10_fleO2_ff2_nmodes_2.xml ch_intrinsics.v common 4.53 vpr 66.66 MiB -1 -1 0.36 21504 3 0.08 -1 -1 41652 -1 -1 66 99 1 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 68264 99 130 344 474 1 218 296 13 13 169 clb auto 27.6 MiB 1.16 826 30862 5429 11872 13561 66.7 MiB 0.05 0.00 28 1633 9 0 0 403031. 2384.80 1.91 + k6_N8_I80_fleI10_fleO2_ff2_nmodes_2.xml ch_intrinsics.v common 5.17 vpr 65.73 MiB -1 -1 0.40 18728 3 0.11 -1 -1 33272 -1 -1 67 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67312 99 130 344 474 1 216 297 13 13 169 clb auto 26.0 MiB 1.28 607 28017 3739 9020 15258 65.7 MiB 0.15 0.02 36 1079 9 0 0 481804. 2850.91 1.81 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_full_stats/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_full_stats/config/golden_results.txt index 0184a9dff25..2c9a5886623 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_full_stats/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_full_stats/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.54 vpr 61.89 MiB -1 -1 0.46 25576 5 0.12 -1 -1 35740 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63376 10 2 181 183 1 40 24 6 6 36 clb auto 23.4 MiB 0.03 158 61.9 MiB 0.01 0.00 2.0099 -86.005 -2.0099 2.0099 0.00 0.000106838 8.3331e-05 0.00272428 0.00233454 -1 151 22 646728 646728 60312.4 1675.34 0.02 0.0111 0.00972721 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.10 vpr 63.56 MiB -1 -1 0.72 23528 5 0.17 -1 -1 33348 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65088 10 2 181 183 1 35 24 6 6 36 clb auto 24.1 MiB 0.05 146 398 72 298 28 63.6 MiB 0.05 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.00155607 0.00152058 0.00827603 0.00776724 -1 -1 -1 -1 -1 136 16 646728 646728 60312.4 1675.34 0.04 0.0269483 0.0244827 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_flow/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_flow/config/golden_results.txt index b7107cae2b2..f44d6074687 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_flow/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_flow/config/golden_results.txt @@ -1,21 +1,21 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml const_true.blif common 0.28 vpr 56.89 MiB -1 -1 -1 -1 0 0.00 -1 -1 32768 -1 -1 1 0 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58256 -1 1 1 2 0 1 2 3 3 9 -1 auto 18.0 MiB 0.00 0 56.9 MiB 0.00 0.00 nan 0 0 nan 0.00 5.781e-06 2.639e-06 4.2052e-05 2.5797e-05 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.000108609 6.9038e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml const_false.blif common 0.46 vpr 56.90 MiB -1 -1 -1 -1 0 0.00 -1 -1 32740 -1 -1 1 0 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58268 -1 1 1 2 0 1 2 3 3 9 -1 auto 17.9 MiB 0.00 0 56.9 MiB 0.01 0.00 nan 0 0 nan 0.00 6.615e-06 3.147e-06 4.3981e-05 2.6877e-05 -1 0 1 53894 53894 38783.3 4309.26 0.00 9.9681e-05 6.2332e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_true.blif common 0.33 vpr 56.86 MiB -1 -1 -1 -1 0 0.00 -1 -1 33092 -1 -1 1 0 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58224 6 1 1 8 0 1 8 3 3 9 -1 auto 18.5 MiB 0.00 0 56.9 MiB 0.00 0.00 nan 0 0 nan 0.00 6.885e-06 3.44e-06 4.4641e-05 2.7708e-05 -1 0 1 53894 53894 38783.3 4309.26 0.00 9.9886e-05 6.2922e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_false.blif common 0.30 vpr 56.70 MiB -1 -1 -1 -1 0 0.00 -1 -1 32908 -1 -1 1 0 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58064 6 1 1 8 0 1 8 3 3 9 -1 auto 18.4 MiB 0.00 0 56.7 MiB 0.00 0.00 nan 0 0 nan 0.00 6.513e-06 3.141e-06 4.3402e-05 2.6517e-05 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.000109486 7.0744e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml and.blif common 0.37 vpr 56.92 MiB -1 -1 -1 -1 1 0.01 -1 -1 33184 -1 -1 1 2 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58288 2 1 3 4 0 3 4 3 3 9 -1 auto 18.0 MiB 0.00 6 56.9 MiB 0.00 0.00 0.708653 -0.708653 -0.708653 nan 0.00 6.783e-06 3.896e-06 4.9967e-05 3.4811e-05 -1 4 1 53894 53894 38783.3 4309.26 0.00 0.000135978 9.6759e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.48 vpr 56.96 MiB -1 -1 -1 -1 1 0.02 -1 -1 34904 -1 -1 1 5 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58332 5 1 6 7 0 6 7 3 3 9 -1 auto 18.5 MiB 0.00 12 57.0 MiB 0.00 0.00 0.708653 -0.708653 -0.708653 nan 0.00 7.663e-06 4.692e-06 6.958e-05 5.2585e-05 -1 7 11 53894 53894 38783.3 4309.26 0.00 0.000293468 0.000215829 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.46 vpr 57.07 MiB -1 -1 -1 -1 1 0.02 -1 -1 35124 -1 -1 1 5 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58440 5 1 6 7 0 6 7 3 3 9 -1 auto 18.6 MiB 0.00 12 57.1 MiB 0.00 0.00 0.708653 -0.708653 -0.708653 nan 0.00 8.063e-06 5.035e-06 6.8933e-05 5.1361e-05 -1 7 11 53894 53894 38783.3 4309.26 0.00 0.000289224 0.000208335 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml and_latch.blif common 0.34 vpr 56.71 MiB -1 -1 -1 -1 1 0.01 -1 -1 34444 -1 -1 1 3 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58068 3 1 5 6 1 4 5 3 3 9 -1 auto 17.7 MiB 0.00 6 56.7 MiB 0.00 0.00 0.544641 -0.918653 -0.544641 0.544641 0.00 8.794e-06 5.436e-06 7.2974e-05 5.3505e-05 -1 3 1 53894 53894 38783.3 4309.26 0.00 0.000185212 0.000138328 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml false_path_mux.blif common 0.47 vpr 56.87 MiB -1 -1 -1 -1 1 0.03 -1 -1 34904 -1 -1 1 3 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58232 4 1 4 6 0 4 6 3 3 9 -1 auto 17.8 MiB 0.00 8 56.9 MiB 0.00 0.00 0.708653 -0.708653 -0.708653 nan 0.00 7.066e-06 4.154e-06 5.921e-05 4.263e-05 -1 6 1 53894 53894 38783.3 4309.26 0.00 0.000185535 0.000144497 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_2x2.blif common 0.45 vpr 57.12 MiB -1 -1 -1 -1 1 0.03 -1 -1 35008 -1 -1 1 4 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58496 4 4 8 12 0 8 9 3 3 9 -1 auto 18.1 MiB 0.00 16 57.1 MiB 0.00 0.00 0.708653 -2.83461 -0.708653 nan 0.00 1.1347e-05 7.549e-06 0.000140553 0.000118935 -1 11 5 53894 53894 38783.3 4309.26 0.00 0.000449823 0.000378456 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_3x3.blif common 0.52 vpr 57.07 MiB -1 -1 -1 -1 1 0.03 -1 -1 35512 -1 -1 1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58436 6 6 12 18 0 12 13 3 3 9 -1 auto 18.7 MiB 0.00 24 57.1 MiB 0.00 0.00 0.734653 -4.35592 -0.734653 nan 0.00 1.5784e-05 1.1347e-05 0.000190609 0.000166678 -1 21 15 53894 53894 38783.3 4309.26 0.00 0.000952796 0.000817371 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_3x4.blif common 0.55 vpr 57.01 MiB -1 -1 -1 -1 2 0.04 -1 -1 35188 -1 -1 3 7 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58376 7 8 22 30 0 15 18 4 4 16 clb auto 18.4 MiB 0.02 34 57.0 MiB 0.00 0.00 1.11427 -6.58687 -1.11427 nan 0.00 2.3684e-05 1.7739e-05 0.000538303 0.000460068 -1 45 9 215576 161682 99039.1 6189.95 0.00 0.00208575 0.00189227 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_4x4.blif common 0.74 vpr 57.03 MiB -1 -1 -1 -1 4 0.05 -1 -1 35720 -1 -1 2 8 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58400 8 8 29 37 0 21 18 4 4 16 clb auto 18.6 MiB 0.02 57 57.0 MiB 0.01 0.00 1.81027 -10.6989 -1.81027 nan 0.00 3.5329e-05 2.6056e-05 0.000567083 0.000524538 -1 53 12 215576 107788 99039.1 6189.95 0.00 0.00253529 0.00232133 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_5x5.blif common 0.65 vpr 57.26 MiB -1 -1 -1 -1 4 0.06 -1 -1 36192 -1 -1 4 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58632 10 10 47 57 0 39 24 4 4 16 clb auto 18.8 MiB 0.02 133 57.3 MiB 0.00 0.00 2.36081 -16.394 -2.36081 nan 0.00 5.3408e-05 4.1391e-05 0.000941366 0.000882757 -1 126 14 215576 215576 99039.1 6189.95 0.01 0.00463838 0.00429584 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_5x6.blif common 0.74 vpr 57.52 MiB -1 -1 -1 -1 5 0.08 -1 -1 36708 -1 -1 5 11 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58904 11 11 61 72 0 51 27 5 5 25 clb auto 19.1 MiB 0.04 175 57.5 MiB 0.01 0.00 2.89045 -19.3048 -2.89045 nan 0.01 6.4305e-05 5.2364e-05 0.00198128 0.00174944 -1 207 16 485046 269470 186194. 7447.77 0.02 0.00705507 0.00642353 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_1bit.blif common 0.41 vpr 56.76 MiB -1 -1 -1 -1 1 0.03 -1 -1 33808 -1 -1 1 3 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58124 3 2 5 7 0 5 6 3 3 9 -1 auto 18.4 MiB 0.00 10 56.8 MiB 0.00 0.00 0.708653 -1.41731 -0.708653 nan 0.00 8.597e-06 5.428e-06 7.3197e-05 5.5243e-05 -1 9 1 53894 53894 38783.3 4309.26 0.00 0.000206843 0.000162804 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_2bit.blif common 0.54 vpr 56.86 MiB -1 -1 -1 -1 1 0.02 -1 -1 34888 -1 -1 1 5 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58224 5 3 8 11 0 8 9 3 3 9 -1 auto 17.8 MiB 0.00 16 56.9 MiB 0.00 0.00 0.708653 -2.12596 -0.708653 nan 0.00 1.2192e-05 8.218e-06 0.000129548 0.000106674 -1 11 1 53894 53894 38783.3 4309.26 0.00 0.000365897 0.000312999 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_3bit.blif common 0.48 vpr 57.03 MiB -1 -1 -1 -1 2 0.03 -1 -1 35320 -1 -1 1 7 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58396 7 4 12 16 0 11 12 3 3 9 -1 auto 18.6 MiB 0.00 22 57.0 MiB 0.00 0.00 1.04365 -3.83961 -1.04365 nan 0.00 1.1385e-05 7.773e-06 0.000142405 0.000120571 -1 18 11 53894 53894 38783.3 4309.26 0.01 0.000681114 0.000572351 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_4bit.blif common 0.44 vpr 57.13 MiB -1 -1 -1 -1 2 0.03 -1 -1 35116 -1 -1 1 9 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58500 9 5 15 20 0 14 15 3 3 9 -1 auto 18.7 MiB 0.00 28 57.1 MiB 0.00 0.00 1.04365 -4.54826 -1.04365 nan 0.00 1.5005e-05 1.092e-05 0.000182078 0.00015961 -1 19 14 53894 53894 38783.3 4309.26 0.00 0.000951078 0.000816649 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_5bit.blif common 0.51 vpr 57.23 MiB -1 -1 -1 -1 3 0.03 -1 -1 35472 -1 -1 1 11 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58600 11 6 19 25 0 17 18 3 3 9 -1 auto 18.8 MiB 0.01 34 57.2 MiB 0.00 0.00 1.37865 -6.93192 -1.37865 nan 0.00 1.7035e-05 1.2461e-05 0.000220405 0.000196189 -1 24 11 53894 53894 38783.3 4309.26 0.00 0.00100295 0.000881631 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml const_true.blif common 0.57 vpr 58.03 MiB -1 -1 -1 -1 0 0.02 -1 -1 30200 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59420 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.3 MiB 0.01 0 3 0 0 3 58.0 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2173e-05 7.189e-06 7.7955e-05 5.3274e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00145604 0.00138979 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml const_false.blif common 0.57 vpr 58.07 MiB -1 -1 -1 -1 0 0.02 -1 -1 30092 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59460 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.3 MiB 0.01 0 3 0 0 3 58.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.3368e-05 7.369e-06 8.1255e-05 5.3678e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00262216 0.00254632 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_true.blif common 0.53 vpr 58.11 MiB -1 -1 -1 -1 0 0.02 -1 -1 30152 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59500 6 1 1 8 0 1 8 3 3 9 -1 auto 19.7 MiB 0.00 0 21 0 10 11 58.1 MiB 0.05 0.00 nan 0 0 nan 0.00 1.3668e-05 8.295e-06 0.000103636 7.3136e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00159632 0.00148892 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_false.blif common 0.50 vpr 58.05 MiB -1 -1 -1 -1 0 0.02 -1 -1 30136 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59444 6 1 1 8 0 1 8 3 3 9 -1 auto 19.6 MiB 0.00 0 21 0 10 11 58.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2503e-05 7.349e-06 8.2367e-05 5.6036e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.0011854 0.00111648 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml and.blif common 0.51 vpr 57.86 MiB -1 -1 -1 -1 1 0.02 -1 -1 30056 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59248 2 1 3 4 0 3 4 3 3 9 -1 auto 19.4 MiB 0.00 9 9 3 3 3 57.9 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 1.5257e-05 1.0806e-05 0.000104525 7.8851e-05 -1 -1 -1 -1 -1 4 1 53894 53894 38783.3 4309.26 0.00 0.00149985 0.00142771 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.62 vpr 58.23 MiB -1 -1 -1 -1 1 0.07 -1 -1 31688 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59624 5 1 6 7 0 6 7 3 3 9 -1 auto 19.8 MiB 0.00 18 18 13 5 0 58.2 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 2.178e-05 1.692e-05 0.000145091 0.000118424 -1 -1 -1 -1 -1 7 11 53894 53894 38783.3 4309.26 0.01 0.00188984 0.00172965 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.63 vpr 58.03 MiB -1 -1 -1 -1 1 0.05 -1 -1 31992 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59424 5 1 6 7 0 6 7 3 3 9 -1 auto 19.6 MiB 0.00 18 18 13 5 0 58.0 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 1.9821e-05 1.4657e-05 0.000155383 0.000123574 -1 -1 -1 -1 -1 7 11 53894 53894 38783.3 4309.26 0.00 0.00187385 0.00170894 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml and_latch.blif common 0.50 vpr 58.12 MiB -1 -1 -1 -1 1 0.02 -1 -1 29964 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59512 3 1 5 6 1 4 5 3 3 9 -1 auto 19.7 MiB 0.00 9 12 7 1 4 58.1 MiB 0.00 0.00 0.52647 -0.88231 -0.52647 0.52647 0.00 1.7793e-05 1.322e-05 0.000136996 0.00010784 -1 -1 -1 -1 -1 4 1 53894 53894 38783.3 4309.26 0.00 0.00148392 0.00140511 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml false_path_mux.blif common 0.73 vpr 58.16 MiB -1 -1 -1 -1 1 0.06 -1 -1 32060 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59560 4 1 4 6 0 4 6 3 3 9 -1 auto 19.7 MiB 0.00 12 15 9 3 3 58.2 MiB 0.01 0.00 0.67231 -0.67231 -0.67231 nan 0.00 1.7949e-05 1.3119e-05 0.000162269 0.000130701 -1 -1 -1 -1 -1 6 11 53894 53894 38783.3 4309.26 0.05 0.00213137 0.0019323 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_2x2.blif common 0.66 vpr 58.12 MiB -1 -1 -1 -1 1 0.06 -1 -1 31696 -1 -1 1 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59516 4 4 8 12 0 8 9 3 3 9 -1 auto 19.6 MiB 0.02 24 27 18 6 3 58.1 MiB 0.01 0.00 0.67231 -2.68924 -0.67231 nan 0.00 3.3252e-05 2.5214e-05 0.000329053 0.000286288 -1 -1 -1 -1 -1 10 9 53894 53894 38783.3 4309.26 0.01 0.0025787 0.00235869 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_3x3.blif common 0.64 vpr 58.02 MiB -1 -1 -1 -1 1 0.07 -1 -1 32544 -1 -1 1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59416 6 6 12 18 0 12 13 3 3 9 -1 auto 19.3 MiB 0.01 36 43 32 7 4 58.0 MiB 0.00 0.00 0.69831 -4.13786 -0.69831 nan 0.00 4.6521e-05 3.9728e-05 0.000369889 0.000331245 -1 -1 -1 -1 -1 17 11 53894 53894 38783.3 4309.26 0.01 0.00298797 0.00272803 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_3x4.blif common 0.66 vpr 58.34 MiB -1 -1 -1 -1 2 0.07 -1 -1 32236 -1 -1 3 7 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59736 7 8 22 30 0 15 18 4 4 16 clb auto 19.4 MiB 0.03 55 64 20 42 2 58.3 MiB 0.00 0.00 1.29035 -7.83841 -1.29035 nan 0.00 9.6441e-05 8.6405e-05 0.000852072 0.000777197 -1 -1 -1 -1 -1 46 5 215576 161682 99039.1 6189.95 0.01 0.00426632 0.00394149 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_4x4.blif common 0.79 vpr 58.35 MiB -1 -1 -1 -1 4 0.11 -1 -1 32244 -1 -1 2 8 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59748 8 8 29 37 0 21 18 4 4 16 clb auto 19.3 MiB 0.02 76 64 16 48 0 58.3 MiB 0.00 0.00 2.08631 -12.2832 -2.08631 nan 0.00 0.000108854 9.6252e-05 0.00109712 0.00103669 -1 -1 -1 -1 -1 58 14 215576 107788 99039.1 6189.95 0.02 0.0074153 0.00672694 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_5x5.blif common 0.88 vpr 58.55 MiB -1 -1 -1 -1 4 0.09 -1 -1 32528 -1 -1 4 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59956 10 10 47 57 0 39 24 4 4 16 clb auto 19.3 MiB 0.07 146 364 62 302 0 58.6 MiB 0.01 0.00 2.72561 -18.4747 -2.72561 nan 0.00 0.000183832 0.000161369 0.00323039 0.00299858 -1 -1 -1 -1 -1 114 16 215576 215576 99039.1 6189.95 0.04 0.0131249 0.0113376 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_5x6.blif common 1.01 vpr 58.59 MiB -1 -1 -1 -1 5 0.10 -1 -1 33056 -1 -1 5 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60000 11 11 61 72 0 51 27 5 5 25 clb auto 19.4 MiB 0.09 211 227 56 171 0 58.6 MiB 0.01 0.00 3.36952 -22.7724 -3.36952 nan 0.00 0.000218455 0.000198138 0.00305021 0.00288592 -1 -1 -1 -1 -1 198 15 485046 269470 186194. 7447.77 0.04 0.0152614 0.0138722 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_1bit.blif common 0.68 vpr 58.17 MiB -1 -1 -1 -1 1 0.06 -1 -1 30964 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59564 3 2 5 7 0 5 6 3 3 9 -1 auto 19.8 MiB 0.02 15 15 9 5 1 58.2 MiB 0.02 0.00 0.67231 -1.34462 -0.67231 nan 0.00 4.2469e-05 3.5733e-05 0.000234737 0.000196759 -1 -1 -1 -1 -1 6 11 53894 53894 38783.3 4309.26 0.04 0.00229256 0.00206423 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_2bit.blif common 0.69 vpr 58.11 MiB -1 -1 -1 -1 1 0.06 -1 -1 32032 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59504 5 3 8 11 0 8 9 3 3 9 -1 auto 19.6 MiB 0.02 24 27 21 6 0 58.1 MiB 0.00 0.00 0.67231 -2.01693 -0.67231 nan 0.00 3.1916e-05 2.4692e-05 0.000228474 0.000195724 -1 -1 -1 -1 -1 10 15 53894 53894 38783.3 4309.26 0.05 0.0028077 0.00250969 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_3bit.blif common 0.71 vpr 57.98 MiB -1 -1 -1 -1 2 0.06 -1 -1 32232 -1 -1 1 7 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59372 7 4 12 16 0 11 12 3 3 9 -1 auto 19.2 MiB 0.01 33 38 24 11 3 58.0 MiB 0.03 0.00 1.08437 -4.00246 -1.08437 nan 0.00 3.3373e-05 2.6711e-05 0.000361598 0.000322342 -1 -1 -1 -1 -1 17 4 53894 53894 38783.3 4309.26 0.01 0.00265807 0.00249199 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_4bit.blif common 0.80 vpr 58.10 MiB -1 -1 -1 -1 2 0.06 -1 -1 32140 -1 -1 1 9 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59496 9 5 15 20 0 14 15 3 3 9 -1 auto 19.3 MiB 0.01 42 51 29 17 5 58.1 MiB 0.05 0.00 1.00731 -4.36655 -1.00731 nan 0.00 0.000109467 9.3436e-05 0.000510054 0.000457852 -1 -1 -1 -1 -1 17 14 53894 53894 38783.3 4309.26 0.04 0.00547721 0.00381473 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_5bit.blif common 0.76 vpr 58.15 MiB -1 -1 -1 -1 3 0.06 -1 -1 32224 -1 -1 1 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59544 11 6 19 25 0 17 18 3 3 9 -1 auto 19.3 MiB 0.05 51 64 33 24 7 58.1 MiB 0.00 0.00 1.34231 -6.71386 -1.34231 nan 0.00 5.7237e-05 4.7813e-05 0.000509654 0.00046822 -1 -1 -1 -1 -1 25 11 53894 53894 38783.3 4309.26 0.01 0.00390363 0.00359446 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_vpr/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_vpr/config/golden_results.txt index f32e28a7b02..e60168a24fc 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_vpr/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_func_formal_vpr/config/golden_results.txt @@ -1,7 +1,7 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml const_true.blif common 0.21 vpr 56.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58204 -1 1 1 2 0 1 2 3 3 9 -1 auto 17.9 MiB 0.00 0 56.8 MiB 0.00 0.00 nan 0 0 nan 0.00 8.918e-06 4.896e-06 5.121e-05 3.197e-05 -1 0 1 53894 53894 20487.3 2276.37 0.00 0.000119388 7.7581e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml const_false.blif common 0.35 vpr 57.07 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58436 -1 1 1 2 0 1 2 3 3 9 -1 auto 18.0 MiB 0.00 0 57.1 MiB 0.00 0.00 nan 0 0 nan 0.00 4.845e-06 1.959e-06 4.6814e-05 3.1585e-05 -1 0 1 53894 53894 20487.3 2276.37 0.00 0.00010533 7.0071e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_true.blif common 0.38 vpr 57.00 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58364 6 1 7 8 0 7 8 3 3 9 -1 auto 18.7 MiB 0.00 14 57.0 MiB 0.00 0.00 0.736421 -0.736421 -0.736421 nan 0.00 8.633e-06 5.567e-06 7.6064e-05 5.7458e-05 -1 8 1 53894 53894 20487.3 2276.37 0.00 0.000214026 0.000168358 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_false.blif common 0.20 vpr 57.07 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58444 6 1 7 8 0 7 8 3 3 9 -1 auto 18.6 MiB 0.00 14 57.1 MiB 0.00 0.00 0.736421 -0.736421 -0.736421 nan 0.00 9.059e-06 5.932e-06 7.839e-05 6.044e-05 -1 8 1 53894 53894 20487.3 2276.37 0.00 0.000208304 0.000164376 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.23 vpr 56.86 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58220 5 1 6 7 0 6 7 3 3 9 -1 auto 17.7 MiB 0.00 12 56.9 MiB 0.00 0.00 0.736421 -0.736421 -0.736421 nan 0.00 8.291e-06 5.167e-06 6.7665e-05 5.0567e-05 -1 7 11 53894 53894 20487.3 2276.37 0.00 0.000290876 0.000211038 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.25 vpr 56.79 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58152 5 1 6 7 0 6 7 3 3 9 -1 auto 17.8 MiB 0.00 12 56.8 MiB 0.00 0.00 0.736421 -0.736421 -0.736421 nan 0.00 7.92e-06 4.888e-06 7.2533e-05 5.4699e-05 -1 7 11 53894 53894 20487.3 2276.37 0.00 0.000303172 0.000222197 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml const_true.blif common 0.48 vpr 58.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59516 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.4 MiB 0.01 0 3 0 0 3 58.1 MiB 0.03 0.00 nan 0 0 nan 0.00 2.8167e-05 2.1374e-05 0.000138034 0.000104949 -1 -1 -1 -1 -1 0 1 53894 53894 20487.3 2276.37 0.02 0.00164424 0.00155782 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml const_false.blif common 0.44 vpr 58.07 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59464 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.4 MiB 0.02 0 3 0 0 3 58.1 MiB 0.01 0.00 nan 0 0 nan 0.00 1.4897e-05 9.304e-06 0.000144669 0.000111339 -1 -1 -1 -1 -1 0 1 53894 53894 20487.3 2276.37 0.00 0.001404 0.00131834 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_true.blif common 0.50 vpr 58.16 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59556 6 1 7 8 0 7 8 3 3 9 -1 auto 19.7 MiB 0.04 21 21 14 7 0 58.2 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.4462e-05 1.7786e-05 0.000174928 0.000147981 -1 -1 -1 -1 -1 10 1 53894 53894 20487.3 2276.37 0.00 0.00186761 0.00178528 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_false.blif common 0.36 vpr 58.11 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59504 6 1 7 8 0 7 8 3 3 9 -1 auto 19.7 MiB 0.01 21 21 14 7 0 58.1 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 3.4347e-05 2.5128e-05 0.000218139 0.000181445 -1 -1 -1 -1 -1 10 1 53894 53894 20487.3 2276.37 0.01 0.00178448 0.00167632 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.46 vpr 58.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59532 5 1 6 7 0 6 7 3 3 9 -1 auto 19.7 MiB 0.03 18 18 13 5 0 58.1 MiB 0.01 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.2294e-05 1.7287e-05 0.000170669 0.000137343 -1 -1 -1 -1 -1 7 1 53894 53894 20487.3 2276.37 0.00 0.00177813 0.00167987 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.46 vpr 57.96 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59356 5 1 6 7 0 6 7 3 3 9 -1 auto 19.5 MiB 0.01 18 18 13 5 0 58.0 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.6482e-05 2.0958e-05 0.000167987 0.000138916 -1 -1 -1 -1 -1 7 1 53894 53894 20487.3 2276.37 0.00 0.00184976 0.00175645 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_nonuniform/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_nonuniform/config/golden_results.txt index 6cc6316b230..f1456d39f78 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_nonuniform/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_nonuniform/config/golden_results.txt @@ -1,7 +1,7 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - x_gaussian_y_uniform.xml stereovision3.v common 1.04 vpr 66.41 MiB -1 -1 0.43 26112 5 0.10 -1 -1 38916 -1 -1 7 10 0 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 68000 10 2 181 183 1 37 19 6 6 36 clb auto 28.2 MiB 0.04 116 469 132 309 28 66.4 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.00 0.000138168 0.000118301 0.00425649 0.00383687 8 78 3 646728 377258 -1 -1 0.04 0.0245278 0.0216143 1804 2280 -1 78 3 56 79 2317 690 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00 -1 -1 0.00 0.00721679 0.00692586 - x_uniform_y_gaussian.xml stereovision3.v common 1.05 vpr 66.39 MiB -1 -1 0.44 26112 5 0.10 -1 -1 38924 -1 -1 7 10 0 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67988 10 2 181 183 1 37 19 6 6 36 clb auto 28.0 MiB 0.04 118 669 184 441 44 66.4 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.00 0.000156902 0.000136544 0.00589556 0.00530989 6 95 8 646728 377258 -1 -1 0.06 0.0247254 0.0217529 1804 2280 -1 76 3 72 99 2815 863 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00 -1 -1 0.00 0.00580214 0.00556708 - x_gaussian_y_gaussian.xml stereovision3.v common 1.06 vpr 66.40 MiB -1 -1 0.44 25856 5 0.10 -1 -1 38788 -1 -1 7 10 0 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67992 10 2 181 183 1 37 19 6 6 36 clb auto 28.0 MiB 0.04 116 469 114 316 39 66.4 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.00 0.000141624 0.000121717 0.00429422 0.00384614 6 106 10 646728 377258 -1 -1 0.06 0.025184 0.0220839 1804 2280 -1 81 5 79 110 3380 1015 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00 -1 -1 0.00 0.00633534 0.00604945 - x_delta_y_uniform.xml stereovision3.v common 1.09 vpr 66.52 MiB -1 -1 0.44 26240 5 0.10 -1 -1 40736 -1 -1 7 10 0 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 68120 10 2 181 183 1 37 19 6 6 36 clb auto 28.1 MiB 0.04 117 444 113 301 30 66.5 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.00 0.000137696 0.00011826 0.0040508 0.00366202 34 76 4 646728 377258 -1 -1 0.09 0.0463587 0.0396882 1804 2280 -1 77 3 57 79 2311 671 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00 -1 -1 0.00 0.00567849 0.00546511 - x_delta_y_delta.xml stereovision3.v common 1.02 vpr 66.41 MiB -1 -1 0.44 25984 5 0.09 -1 -1 36772 -1 -1 7 10 0 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 68008 10 2 181 183 1 37 19 6 6 36 clb auto 27.8 MiB 0.04 118 419 102 293 24 66.4 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.00 0.000152925 0.000122608 0.00406731 0.00366018 28 78 3 646728 377258 -1 -1 0.03 0.0212815 0.0187297 1804 2280 -1 78 3 54 74 2257 667 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00 -1 -1 0.00 0.0057754 0.0055611 - x_uniform_y_delta.xml stereovision3.v common 1.06 vpr 66.41 MiB -1 -1 0.43 25984 5 0.09 -1 -1 36772 -1 -1 7 10 0 0 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:42:01 fv-az1118-845 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 68000 10 2 181 183 1 37 19 6 6 36 clb auto 28.0 MiB 0.04 117 519 114 373 32 66.4 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.00 0.000150229 0.000130633 0.00465966 0.00420735 24 75 3 646728 377258 -1 -1 0.09 0.0461378 0.0396879 1804 2280 -1 75 2 53 72 2144 616 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.01 0.00 -1 -1 0.00 0.00569081 0.00550877 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + x_gaussian_y_uniform.xml stereovision3.v common 2.50 vpr 64.46 MiB -1 -1 0.75 23544 5 0.17 -1 -1 33432 -1 -1 7 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66008 10 2 181 183 1 37 19 6 6 36 clb auto 24.9 MiB 0.12 134 94 36 51 7 64.5 MiB 0.01 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000419945 0.000386338 0.00436349 0.00416636 -1 -1 -1 -1 8 103 5 646728 377258 -1 -1 0.16 0.0505805 0.044298 1804 2280 -1 90 3 63 87 2113 862 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.0115138 0.0109218 + x_uniform_y_gaussian.xml stereovision3.v common 2.93 vpr 64.41 MiB -1 -1 0.95 23552 5 0.18 -1 -1 33464 -1 -1 7 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65960 10 2 181 183 1 37 19 6 6 36 clb auto 25.0 MiB 0.12 118 444 110 303 31 64.4 MiB 0.10 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000424537 0.000389976 0.0151343 0.0142881 -1 -1 -1 -1 6 94 8 646728 377258 -1 -1 0.27 0.0803322 0.0718366 1804 2280 -1 80 4 81 108 2550 1058 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.04 0.00 -1 -1 0.00 0.0129948 0.0121942 + x_gaussian_y_gaussian.xml stereovision3.v common 2.83 vpr 64.50 MiB -1 -1 0.72 23552 5 0.18 -1 -1 33328 -1 -1 7 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66048 10 2 181 183 1 37 19 6 6 36 clb auto 25.0 MiB 0.11 136 619 179 400 40 64.5 MiB 0.04 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000378245 0.00034659 0.012211 0.0113438 -1 -1 -1 -1 6 97 4 646728 377258 -1 -1 0.43 0.0657561 0.0581881 1804 2280 -1 98 4 73 101 2523 1078 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0125128 0.0117068 + x_delta_y_uniform.xml stereovision3.v common 2.97 vpr 64.45 MiB -1 -1 0.81 23464 5 0.16 -1 -1 33468 -1 -1 7 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66000 10 2 181 183 1 37 19 6 6 36 clb auto 25.0 MiB 0.11 134 594 154 411 29 64.5 MiB 0.04 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000357443 0.000325029 0.012514 0.0116263 -1 -1 -1 -1 10 110 10 646728 377258 -1 -1 0.50 0.0892176 0.0778872 1804 2280 -1 97 3 69 90 2241 1045 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.0105891 0.0100407 + x_delta_y_delta.xml stereovision3.v common 3.05 vpr 64.40 MiB -1 -1 0.95 23336 5 0.17 -1 -1 33436 -1 -1 7 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65948 10 2 181 183 1 37 19 6 6 36 clb auto 24.8 MiB 0.13 134 719 153 522 44 64.4 MiB 0.03 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.00034865 0.000319263 0.012511 0.0115452 -1 -1 -1 -1 28 92 3 646728 377258 -1 -1 0.31 0.0600241 0.0529562 1804 2280 -1 92 3 65 87 2209 903 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00975621 0.00926591 + x_uniform_y_delta.xml stereovision3.v common 3.23 vpr 64.80 MiB -1 -1 0.91 23548 5 0.16 -1 -1 33324 -1 -1 7 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66352 10 2 181 183 1 37 19 6 6 36 clb auto 25.3 MiB 0.17 122 594 108 447 39 64.8 MiB 0.05 0.00 1.78694 -71.1304 -1.78694 1.78694 0.01 0.000523952 0.000483044 0.0169912 0.0158055 -1 -1 -1 -1 8 96 8 646728 377258 -1 -1 0.55 0.0887084 0.0783823 1804 2280 -1 82 4 82 115 2881 1166 1.78694 1.78694 -71.1304 -1.78694 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0137495 0.0129694 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_routing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_routing/config/golden_results.txt index 535c314b124..5deaea47b22 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_routing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_global_routing/config/golden_results.txt @@ -1,4 +1,4 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -timing/k6_N10_mem32K_40nm.xml stereovision3.v common 1.25 vpr 52.67 MiB -1 -1 0.35 23016 5 0.11 -1 -1 32828 -1 -1 12 10 0 0 success v8.0.0-7662-gd563ffd8a Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-04-24T16:35:56 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/RLplace_2/vtr-verilog-to-routing/vtr_flow/tasks 53936 10 2 181 183 1 40 24 6 6 36 clb auto 14.1 MiB 0.03 152 52.7 MiB 0.01 0.00 1.83894 -74.8977 -1.83894 1.83894 0.00 7.8957e-05 5.8169e-05 0.00193971 0.00168061 6 114 17 646728 646728 -1 -1 0.07 0.0158992 0.0133697 1456 2040 -1 107 18 187 363 16090 5667 0 0 16090 5667 363 279 0 0 1816 363 0 0 3630 1816 0 0 2713 1623 0 0 4018 544 0 0 3550 1042 0 0 363 0 0 177 401 268 1921 0 0 1.83894 1.83894 -74.8977 -1.83894 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00611121 0.00545987 -nonuniform_chan_width/k6_N10_mem32K_40nm_nonuniform.xml stereovision3.v common 1.30 vpr 52.59 MiB -1 -1 0.37 22912 5 0.10 -1 -1 33016 -1 -1 12 10 0 0 success v8.0.0-7662-gd563ffd8a Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-04-24T16:35:56 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/RLplace_2/vtr-verilog-to-routing/vtr_flow/tasks 53852 10 2 181 183 1 40 24 6 6 36 clb auto 14.0 MiB 0.03 173 52.6 MiB 0.01 0.00 1.83894 -74.8977 -1.83894 1.83894 0.00 7.9891e-05 5.9037e-05 0.00127805 0.00118698 8 141 21 646728 646728 -1 -1 0.09 0.0207869 0.0172898 1456 2040 -1 141 29 225 432 22947 8049 0 0 22947 8049 432 306 0 0 2180 432 0 0 4320 2180 0 0 3016 1940 0 0 6285 1640 0 0 6714 1551 0 0 432 0 0 212 633 266 2355 0 0 1.83894 1.83894 -74.8977 -1.83894 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.0077112 0.00673112 -nonuniform_chan_width/k6_N10_mem32K_40nm_pulse.xml stereovision3.v common 1.26 vpr 52.59 MiB -1 -1 0.34 22876 5 0.11 -1 -1 32796 -1 -1 12 10 0 0 success v8.0.0-7662-gd563ffd8a Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-04-24T16:35:56 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/RLplace_2/vtr-verilog-to-routing/vtr_flow/tasks 53856 10 2 181 183 1 40 24 6 6 36 clb auto 14.0 MiB 0.03 147 52.6 MiB 0.01 0.00 1.83894 -74.8977 -1.83894 1.83894 0.00 7.8811e-05 5.7898e-05 0.00248099 0.00207189 10 100 16 646728 646728 -1 -1 0.09 0.0266821 0.0218872 1456 2040 -1 100 16 168 333 14392 4909 0 0 14392 4909 333 199 0 0 1573 333 0 0 3330 1573 0 0 2028 1300 0 0 3910 707 0 0 3218 797 0 0 333 0 0 185 335 289 1796 0 0 1.83894 1.83894 -74.8977 -1.83894 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00580383 0.00521834 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + timing/k6_N10_mem32K_40nm.xml stereovision3.v common 3.07 vpr 63.59 MiB -1 -1 0.86 23288 5 0.17 -1 -1 33328 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65116 10 2 181 183 1 35 24 6 6 36 clb auto 24.1 MiB 0.19 146 296 74 208 14 63.6 MiB 0.05 0.00 1.83894 -73.7881 -1.83894 1.83894 0.01 0.000559275 0.000518705 0.00642835 0.00601498 -1 -1 -1 -1 6 101 15 646728 646728 -1 -1 0.25 0.0569513 0.0489151 1456 2040 -1 103 15 135 292 9517 3756 1.83894 1.83894 -73.7881 -1.83894 0 0 -1 -1 0.00 0.08 0.00 -1 -1 0.00 0.020878 0.0186817 + nonuniform_chan_width/k6_N10_mem32K_40nm_nonuniform.xml stereovision3.v common 3.02 vpr 63.67 MiB -1 -1 0.85 23532 5 0.17 -1 -1 33404 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65196 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.17 168 92 36 52 4 63.7 MiB 0.03 0.00 1.83894 -73.7881 -1.83894 1.83894 0.01 0.000555491 0.000512753 0.00380765 0.00362071 -1 -1 -1 -1 8 118 19 646728 646728 -1 -1 0.31 0.0661579 0.056778 1456 2040 -1 117 17 137 275 9561 3757 1.83894 1.83894 -73.7881 -1.83894 0 0 -1 -1 0.00 0.07 0.00 -1 -1 0.00 0.019218 0.0171455 + nonuniform_chan_width/k6_N10_mem32K_40nm_pulse.xml stereovision3.v common 3.34 vpr 63.68 MiB -1 -1 0.88 23640 5 0.17 -1 -1 33452 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65212 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.11 166 92 33 54 5 63.7 MiB 0.01 0.00 1.83894 -73.7881 -1.83894 1.83894 0.01 0.000388369 0.000355547 0.00307054 0.00291066 -1 -1 -1 -1 6 122 17 646728 646728 -1 -1 0.56 0.0873244 0.0750472 1456 2040 -1 119 17 156 331 12004 4413 1.83894 1.83894 -73.7881 -1.83894 0 0 -1 -1 0.01 0.09 0.00 -1 -1 0.01 0.0185307 0.0163935 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_graphics_commands/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_graphics_commands/config/golden_results.txt index 485b8f31d2e..e3c0e629bee 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_graphics_commands/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_graphics_commands/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 4.41 vpr 62.03 MiB -1 -1 0.44 25748 5 0.13 -1 -1 35848 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63520 10 2 181 183 1 40 24 6 6 36 clb auto 23.4 MiB 0.03 152 62.0 MiB 1.66 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 0.000143763 0.000119771 0.00286402 0.00241323 -1 137 15 646728 646728 138825. 3856.24 0.86 0.00989935 0.00872644 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 6.64 vpr 63.57 MiB -1 -1 0.94 23536 5 0.18 -1 -1 33400 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65096 10 2 181 183 1 35 24 6 6 36 clb auto 24.1 MiB 0.12 146 398 72 298 28 63.6 MiB 2.11 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.000561388 0.000519811 0.00818763 0.0076223 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 1.07 0.0306154 0.0272041 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_manual_annealing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_manual_annealing/config/golden_results.txt index 291897f65f4..e14d1bfdf94 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_manual_annealing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_manual_annealing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml stereovision3.v common 1.44 vpr 57.96 MiB -1 -1 0.42 25620 5 0.11 -1 -1 36164 -1 -1 7 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 59352 10 2 181 183 1 37 19 5 5 25 clb auto 19.7 MiB 0.05 108 58.0 MiB 0.01 0.00 1.93928 -79.1821 -1.93928 1.93928 0.02 0.000104618 8.1277e-05 0.00610425 0.00496002 26 129 10 485046 377258 34134.96 1365.396 0.13 0.0425172 0.0362734 109 8 74 103 1476 611 2.06938 2.06938 -89.2305 -2.06938 0 0 37126.9 1485.07 0.02 0.01 0.00966903 0.00924379 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml stereovision3.v common 3.07 vpr 59.20 MiB -1 -1 0.88 23388 5 0.18 -1 -1 33556 -1 -1 7 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60616 10 2 181 183 1 37 19 5 5 25 clb auto 19.7 MiB 0.15 121 1025 805 184 36 59.2 MiB 0.09 0.00 2.09443 -87.1664 -2.09443 2.09443 0.03 0.000344616 0.000312911 0.0199094 0.0182425 -1 -1 -1 -1 26 127 8 485046 377258 31702.9 1268.11 0.17 0.0666235 0.0582058 1731 5512 -1 104 4 50 68 870 379 1.97939 1.97939 -86.3228 -1.97939 0 0 38596.5 1543.86 0.01 0.02 0.01 -1 -1 0.01 0.0131087 0.0124132 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_mcnc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_mcnc/config/golden_results.txt index ca05102667d..9aed323e6ef 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_mcnc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_mcnc/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N4_90nm.xml diffeq.blif common 9.42 vpr 69.06 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 417 64 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 70720 64 39 1935 1974 1 1104 520 23 23 529 clb auto 31.3 MiB 0.36 9930 69.1 MiB 0.93 0.01 6.88012 -1336.71 -6.88012 6.88012 0.57 0.00215958 0.00185702 0.161416 0.137363 22 12669 27 983127 929624 735934. 1391.18 4.88 0.528742 0.455389 10966 18 7099 24037 1733502 451965 6.88012 6.88012 -1447.76 -6.88012 0 0 927497. 1753.30 0.14 0.62 0.132267 0.116734 - k4_N4_90nm.xml ex5p.blif common 14.95 vpr 64.67 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 346 8 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66224 8 63 1072 1135 0 909 417 21 21 441 clb auto 26.9 MiB 0.24 11775 64.7 MiB 0.67 0.01 6.73044 -287.966 -6.73044 nan 0.48 0.00147269 0.0012375 0.101843 0.0868962 34 15442 28 804782 771343 910617. 2064.89 10.86 0.486189 0.416037 13437 19 7666 25446 2656403 652155 6.73044 nan -299.64 -6.73044 0 0 1.15594e+06 2621.17 0.16 0.64 0.0759006 0.0685137 - k4_N4_90nm.xml s298.blif common 14.73 vpr 71.39 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 571 4 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 73104 4 6 1942 1948 1 1193 581 26 26 676 clb auto 33.9 MiB 0.35 14113 71.4 MiB 1.17 0.02 11.3201 -90.4013 -11.3201 11.3201 0.77 0.00249803 0.00210188 0.184549 0.158261 26 18559 39 1.28409e+06 1.27294e+06 1.12979e+06 1671.28 7.95 0.661781 0.565013 16626 19 8719 42915 3886758 808027 11.4152 11.4152 -91.9094 -11.4152 0 0 1.43821e+06 2127.53 0.40 1.25 0.139746 0.123837 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_N4_90nm.xml diffeq.blif common 16.80 vpr 68.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 438 64 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70624 64 39 1935 1974 1 1077 541 23 23 529 clb auto 28.7 MiB 0.57 10085 137127 36539 98027 2561 69.0 MiB 1.34 0.02 7.41831 -1418.64 -7.41831 7.41831 0.90 0.00601444 0.00513019 0.406605 0.350409 -1 -1 -1 -1 22 12754 28 983127 976439 735934. 1391.18 8.73 1.26384 1.10229 35322 121345 -1 11109 19 6608 23845 1462488 382373 7.14816 7.14816 -1474.13 -7.14816 0 0 927497. 1753.30 0.22 1.14 0.18 -1 -1 0.22 0.297141 0.268933 + k4_N4_90nm.xml ex5p.blif common 33.10 vpr 64.58 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 366 8 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66128 8 63 1072 1135 0 894 437 22 22 484 clb auto 25.2 MiB 0.53 11802 104828 31007 71723 2098 64.6 MiB 1.03 0.01 6.54351 -290.193 -6.54351 nan 0.84 0.00302532 0.00273057 0.23164 0.202551 -1 -1 -1 -1 34 15886 35 891726 815929 1.00654e+06 2079.64 26.00 1.17739 1.02035 45600 169672 -1 13479 18 7616 26985 2968727 818222 6.43932 nan -293.77 -6.43932 0 0 1.27783e+06 2640.15 0.27 1.08 0.23 -1 -1 0.27 0.174257 0.159401 + k4_N4_90nm.xml s298.blif common 59.37 vpr 70.87 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 580 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 72572 4 6 1942 1948 1 1169 590 27 27 729 clb auto 30.8 MiB 0.71 13579 163808 47993 114862 953 70.9 MiB 1.54 0.02 12.0403 -94.3066 -12.0403 12.0403 1.19 0.00712795 0.00624279 0.42831 0.361816 -1 -1 -1 -1 24 19358 45 1.39333e+06 1.29301e+06 1.12265e+06 1539.99 49.71 2.08623 1.76329 54650 192211 -1 16862 23 9147 49878 4855038 894292 11.751 11.751 -96.5615 -11.751 0 0 1.47093e+06 2017.74 0.23 1.67 0.23 -1 -1 0.23 0.291349 0.252446 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_minimax_budgets/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_minimax_budgets/config/golden_results.txt index 19c949ed104..7488fc485ca 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_minimax_budgets/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_minimax_budgets/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.57 vpr 64.93 MiB -1 -1 0.44 25268 4 0.12 -1 -1 36524 -1 -1 15 11 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66488 11 2 303 283 2 83 28 7 7 49 clb auto 26.6 MiB 0.17 274 64.9 MiB 0.02 0.00 3.97333 0 0 3.83641 0.00 0.000172251 0.000135871 0.0064234 0.00556221 313 153 208 4198 1170 1.07788e+06 808410 219490. 4479.39 4 4.11203 3.92602 0 0 -197.842 -1.707 64.9 MiB 0.09 0.0870377 0.0846444 64.9 MiB 0.03 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 3.06 vpr 66.74 MiB -1 -1 0.84 23300 4 0.16 -1 -1 33000 -1 -1 15 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68340 11 2 303 283 2 81 28 7 7 49 clb auto 27.1 MiB 0.31 332 112 32 50 30 66.7 MiB 0.08 0.00 4.11769 0 0 3.94108 0.00 0.000680828 0.000618524 0.00645732 0.00621036 -1 -1 -1 -1 376 5.01333 137 1.82667 145 200 4055 1170 1.07788e+06 808410 219490. 4479.39 3 5100 32136 -1 4.1682 4.01568 0 0 -197.816 -1.707 0.03 -1 -1 66.7 MiB 0.25 0.145887 0.141249 66.7 MiB -1 0.06 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_no_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_no_timing/config/golden_results.txt index ebd59649806..3c39979a687 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_no_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_no_timing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ch_intrinsics.v common 2.94 vpr 65.13 MiB -1 -1 0.23 21696 3 0.06 -1 -1 36584 -1 -1 64 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66692 99 130 343 473 1 212 294 12 12 144 clb auto 26.7 MiB 0.14 475 65.1 MiB 0.11 0.00 38 1437 14 5.66058e+06 3.99722e+06 345440. 2398.89 1.33 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time + k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ch_intrinsics.v common 4.77 vpr 65.80 MiB -1 -1 0.46 18964 3 0.10 -1 -1 33220 -1 -1 65 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67380 99 130 344 474 1 215 295 12 12 144 clb auto 26.4 MiB 0.23 697 24820 2926 7450 14444 65.8 MiB 0.12 0.00 34 1759 11 5.66058e+06 4.05111e+06 317980. 2208.19 1.87 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_noc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_noc/config/golden_results.txt index 4bb068cfcb9..5c92701e534 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_noc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_noc/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit noc_flow script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time NoC_agg_bandwidth NoC_latency -stratixiv_arch.timing_small_with_a_embedded_mesh_noc_toplogy.xml complex_2_noc_1D_chain.blif complex_2_noc_1D_chain.flows common 99.09 vpr 1.01 GiB -1 2 -1 -1 success v8.0.0-6827-g874e0cb8d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2023-01-19T13:42:08 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/add_noc_testcases/vtr-verilog-to-routing/vtr_flow/tasks 1059880 2 32 2204 1661 1 1141 103 36 20 720 -1 EP4SGX110 912.6 MiB 2.23 6418 1035.0 MiB 0.49 0 6.71112 -4105.42 -6.71112 6.71112 22.03 0.00211999 0.00178207 0.233617 0.195521 170 8329 28 0 0 7813670 10852.3 43.13 1.80607 1.57203 8322 21 3349 6040 3465471 499209 7.33109 7.33109 -4862.47 -7.33109 0 0 9625310 13368.5 5.16 0.59 0.206115 0.18956 400000 3E-09 + arch circuit noc_flow script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time NoC_agg_bandwidth NoC_latency NoC_n_met_latency_constraints NoC_latency_overrun NoC_congested_bw NoC_congestion_ratio NoC_n_congested_links SAT_agg_bandwidth SAT_latency SAT_n_met_latency_constraints SAT_latency_overrun SAT_congested_bw SAT_congestion_ratio SAT_n_congested_links + stratixiv_arch.timing_small_with_a_embedded_mesh_noc_toplogy.xml complex_2_noc_1D_chain.blif complex_2_noc_1D_chain.flows common 136.64 vpr 1.09 GiB -1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1147416 2 32 2204 1661 1 1102 107 36 20 720 -1 EP4SGX110 953.4 MiB 4.30 6502 9974 2102 7079 793 1120.5 MiB 0.78 0.01 7.29374 -4454.07 -7.29374 7.29374 29.53 0.00640333 0.00571002 0.281115 0.249799 150 8929 16 0 0 6.74655e+06 9370.21 54.95 2.8097 2.42985 174956 1462490 -1 8744 15 2461 4687 960144 259555 7.40783 7.40783 -4699.44 -7.40783 0 0 8.72662e+06 12120.3 4.44 0.55 3.61 -1 -1 4.44 0.254443 0.230607 400000 3e-09 1 4.1359e-25 0 0 0 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack/config/golden_results.txt index d09a3c11d2e..09ce4f7b64a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.18 vpr 61.92 MiB -1 -1 0.46 25588 5 0.13 -1 -1 35784 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63408 10 2 181 183 1 40 24 6 6 36 clb auto 23.3 MiB 0.06 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.000169764 0.000126622 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.38 vpr 63.50 MiB -1 -1 0.79 23456 5 0.18 -1 -1 33376 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65028 10 2 181 183 1 35 24 6 6 36 clb auto 24.1 MiB 0.16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00186374 0.00181229 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_and_place/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_and_place/config/golden_results.txt index 1dcda995cbb..2f29f949e72 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_and_place/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_and_place/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.47 vpr 62.18 MiB -1 -1 0.47 25432 5 0.11 -1 -1 35800 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63668 10 2 181 183 1 40 24 6 6 36 clb auto 23.6 MiB 0.04 152 62.2 MiB 0.01 0.00 2.0099 -85.1433 -2.0099 2.0099 0.03 0.000107253 8.3045e-05 0.0028464 0.00242334 -1 -1 -1 -1 -1 -1 -1 -1 0.00300852 0.0025474 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.49 vpr 63.62 MiB -1 -1 0.85 23572 5 0.18 -1 -1 33320 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65152 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.25 146 398 72 298 28 63.6 MiB 0.11 0.00 2.14643 -92.7521 -2.14643 2.14643 0.05 0.000375851 0.000345018 0.00764954 0.00711987 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00935215 0.00877834 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_disable/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_disable/config/golden_results.txt index e5ae0657a78..52d01e58538 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_disable/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_disable/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml mult_5x6.blif common 0.37 vpr 57.34 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 11 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58720 11 11 59 70 0 48 26 4 4 16 clb auto 19.0 MiB 0.02 156 57.3 MiB 0.01 0.00 2.26753 -18.5589 -2.26753 nan 0.01 6.1389e-05 4.8378e-05 0.00191702 0.00167689 32 232 34 215576 215576 19628.8 1226.80 0.05 0.014641 0.0126283 232 18 233 497 14973 8367 2.96713 nan -25.7572 -2.96713 0 0 23512.3 1469.52 0.00 0.02 0.00825813 0.00768477 - k6_frac_N10_40nm_disable_packing.xml mult_5x6.blif common 0.03 vpr 20.11 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 20588 11 11 59 70 0 -1 -1 -1 -1 -1 -1 -1 18.4 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml mult_5x6.blif common 2.12 vpr 58.71 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60124 11 11 59 70 0 48 26 4 4 16 clb auto 19.3 MiB 0.07 179 634 146 488 0 58.7 MiB 0.01 0.00 2.51353 -20.6332 -2.51353 nan 0.01 0.00020518 0.000188419 0.00473406 0.00439686 -1 -1 -1 -1 30 199 15 215576 215576 18771.3 1173.21 1.07 0.0644809 0.0550317 1016 3020 -1 198 17 257 591 8958 4396 2.73234 nan -23.1489 -2.73234 0 0 22855.5 1428.47 0.00 0.22 0.00 -1 -1 0.00 0.0209741 0.0195805 + k6_frac_N10_40nm_disable_packing.xml mult_5x6.blif common 0.15 vpr 21.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 21948 11 11 59 70 0 -1 -1 -1 -1 -1 -1 -1 19.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_modes/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_modes/config/golden_results.txt index 1bf96d16dee..1a1be87df70 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_modes/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_pack_modes/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml reg_4x32.blif common 1.19 vpr 73.22 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 32 33 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 74980 33 32 161 193 1 65 97 34 34 1156 -1 32x32 19.3 MiB 0.01 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.000110693 8.5838e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_N8_tileable_reset_softadder_register_scan_chain_nonLR_caravel_io_skywater130nm.xml reg_4x32.blif common 2.20 vpr 75.33 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 32 33 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 77140 33 32 161 193 1 65 97 34 34 1156 -1 32x32 18.7 MiB 0.13 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00189505 0.0018502 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place/config/golden_results.txt index ced0ce3c9be..93476cb3715 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml multiclock.blif common 0.16 vpr 60.83 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62288 5 3 11 14 2 9 10 4 4 16 clb auto -1 -1 16 60.8 MiB 0.00 0.00 0.571 -3.2372 -0.571 0.571 0.01 1.6381e-05 1.0071e-05 0.00011771 8.0351e-05 -1 -1 -1 -1 -1 -1 -1 -1 0.00011771 8.0351e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml multiclock.blif common 0.28 vpr 62.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63844 5 3 11 14 2 9 10 4 4 16 clb auto -1 -1 20 30 10 17 3 62.3 MiB 0.01 0.00 0.645658 -3.51726 -0.645658 0.571 0.02 7.06e-05 5.5105e-05 0.00193417 0.00186411 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00193417 0.00186411 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_calc_method/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_calc_method/config/golden_results.txt index fcf92ec7e8f..63486ef001e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_calc_method/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_calc_method/config/golden_results.txt @@ -1,5 +1,5 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_astar 27.50 vpr 977.58 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success 0f69adb Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-15T16:01:56 fv-az837-567 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 1001044 10 10 168 178 1 68 30 11 8 88 io auto 956.2 MiB 0.45 370 858 95 697 66 977.6 MiB 0.04 0.00 6.45248 -69.1493 -6.45248 6.45248 2.68 0.000346945 0.000301901 0.0109124 0.00985616 -1 -1 -1 -1 32 693 33 0 0 153433. 1743.56 1.19 0.127615 0.111696 11830 34246 -1 570 10 235 725 56242 26416 6.94346 6.94346 -73.9579 -6.94346 0 0 205860. 2339.32 0.06 0.04 0.08 -1 -1 0.06 0.0194505 0.0184001 - stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_astar 27.82 vpr 977.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success 0f69adb Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-15T16:01:56 fv-az837-567 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 1000804 10 10 168 178 1 68 30 11 8 88 io auto 954.9 MiB 0.45 369 812 82 656 74 977.3 MiB 0.04 0.00 6.45248 -69.2479 -6.45248 6.45248 2.74 0.00035978 0.000313724 0.0101986 0.00925468 -1 -1 -1 -1 32 691 29 0 0 153433. 1743.56 1.24 0.130899 0.114171 11830 34246 -1 553 12 224 697 51846 24062 6.94346 6.94346 -73.4811 -6.94346 0 0 205860. 2339.32 0.06 0.04 0.08 -1 -1 0.06 0.0206713 0.0194697 - stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_dijkstra 28.08 vpr 977.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success 0f69adb Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-15T16:01:56 fv-az837-567 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 1001124 10 10 168 178 1 68 30 11 8 88 io auto 955.1 MiB 0.47 370 812 89 663 60 977.7 MiB 0.04 0.00 6.52191 -68.7563 -6.52191 6.52191 3.40 0.000347877 0.0002958 0.010332 0.00933957 -1 -1 -1 -1 22 809 21 0 0 110609. 1256.92 0.45 0.066663 0.0592234 11258 24748 -1 663 14 329 1173 67735 35710 7.04515 7.04515 -76.4932 -7.04515 0 0 134428. 1527.59 0.04 0.05 0.07 -1 -1 0.04 0.0237505 0.0223282 - stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_dijkstra 28.29 vpr 977.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success 0f69adb Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-15T16:01:56 fv-az837-567 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 1001072 10 10 168 178 1 68 30 11 8 88 io auto 955.2 MiB 0.45 368 812 95 656 61 977.6 MiB 0.04 0.00 6.34478 -68.8031 -6.34478 6.34478 3.48 0.000358527 0.000311549 0.0101593 0.00922939 -1 -1 -1 -1 28 753 22 0 0 134428. 1527.59 0.44 0.0663655 0.0590372 11590 29630 -1 624 15 260 959 55378 26467 6.64742 6.64742 -72.827 -6.64742 0 0 173354. 1969.93 0.05 0.04 0.07 -1 -1 0.05 0.0225106 0.0210004 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_astar 38.42 vpr 976.37 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999804 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.55 370 858 95 697 66 976.4 MiB 0.06 0.00 6.45248 -69.1493 -6.45248 6.45248 3.16 0.00053133 0.000484838 0.0148989 0.0138589 -1 -1 -1 -1 32 693 33 0 0 153433. 1743.56 1.72 0.145798 0.129504 11830 34246 -1 570 10 235 725 56242 26416 6.94346 6.94346 -73.9579 -6.94346 0 0 205860. 2339.32 0.06 0.06 0.09 -1 -1 0.06 0.0256172 0.0239212 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_astar 37.07 vpr 976.44 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999876 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.61 369 812 82 656 74 976.4 MiB 0.07 0.00 6.45248 -69.2479 -6.45248 6.45248 3.14 0.000419744 0.000381717 0.0118947 0.0110676 -1 -1 -1 -1 32 691 29 0 0 153433. 1743.56 1.12 0.12258 0.110164 11830 34246 -1 553 12 224 697 51846 24062 6.94346 6.94346 -73.4811 -6.94346 0 0 205860. 2339.32 0.05 0.07 0.09 -1 -1 0.05 0.0274519 0.0254462 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_dijkstra 41.11 vpr 976.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999784 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.79 370 812 89 663 60 976.4 MiB 0.12 0.00 6.52191 -68.7563 -6.52191 6.52191 4.09 0.000672013 0.000608225 0.017378 0.0162156 -1 -1 -1 -1 22 809 21 0 0 110609. 1256.92 2.28 0.128845 0.11551 11258 24748 -1 663 14 329 1173 67735 35710 7.04515 7.04515 -76.4932 -7.04515 0 0 134428. 1527.59 0.03 0.08 0.06 -1 -1 0.03 0.0372941 0.0337267 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_dijkstra 42.24 vpr 976.56 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1000000 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.76 368 812 95 656 61 976.6 MiB 0.15 0.00 6.34478 -68.8031 -6.34478 6.34478 4.44 0.000492867 0.000449805 0.0183566 0.017188 -1 -1 -1 -1 28 753 22 0 0 134428. 1527.59 1.92 0.132649 0.118834 11590 29630 -1 624 15 260 959 55378 26467 6.64742 6.64742 -72.827 -6.64742 0 0 173354. 1969.93 0.03 0.07 0.08 -1 -1 0.03 0.0270531 0.0242418 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/config/golden_results.txt index 10c4b944169..9b0aec479a2 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_delay_model/config/golden_results.txt @@ -1,3 +1,3 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta 28.29 vpr 977.73 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success 0f69adb Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-15T16:01:56 fv-az837-567 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 1001196 10 10 168 178 1 68 30 11 8 88 io auto 955.4 MiB 0.43 393 628 105 491 32 977.7 MiB 0.03 0.00 6.51193 -69.1178 -6.51193 6.51193 2.64 0.000368496 0.000316279 0.00897708 0.00821508 -1 -1 -1 -1 20 893 28 0 0 100248. 1139.18 1.58 0.129641 0.112291 11180 23751 -1 831 19 496 1987 121384 60113 6.91414 6.91414 -78.1319 -6.91414 0 0 125464. 1425.72 0.04 0.06 0.07 -1 -1 0.04 0.0265283 0.0245474 - stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override 28.12 vpr 977.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success 0f69adb Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-15T16:01:56 fv-az837-567 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 1000956 10 10 168 178 1 68 30 11 8 88 io auto 955.9 MiB 0.54 380 628 91 496 41 977.5 MiB 0.05 0.00 6.52338 -69.1003 -6.52338 6.52338 2.70 0.000355671 0.000305949 0.00939391 0.00863885 -1 -1 -1 -1 30 673 12 0 0 144567. 1642.81 1.15 0.113164 0.0991248 11730 32605 -1 585 9 216 698 45031 21119 6.8993 6.8993 -73.7008 -6.8993 0 0 194014. 2204.70 0.08 0.05 0.08 -1 -1 0.08 0.0197747 0.0187602 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta 42.58 vpr 976.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999900 10 10 168 178 1 68 30 11 8 88 io auto 953.3 MiB 0.70 393 628 105 491 32 976.5 MiB 0.15 0.00 6.51193 -69.1178 -6.51193 6.51193 3.23 0.00078609 0.000724519 0.016967 0.01616 -1 -1 -1 -1 20 893 28 0 0 100248. 1139.18 2.16 0.139573 0.124569 11180 23751 -1 831 19 496 1987 121384 60113 6.91414 6.91414 -78.1319 -6.91414 0 0 125464. 1425.72 0.03 0.09 0.06 -1 -1 0.03 0.0325178 0.0296648 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override 41.59 vpr 976.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999880 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.80 380 628 91 496 41 976.4 MiB 0.26 0.02 6.52338 -69.1003 -6.52338 6.52338 3.25 0.000777298 0.000711005 0.0177546 0.0168625 -1 -1 -1 -1 30 673 12 0 0 144567. 1642.81 1.66 0.128557 0.114566 11730 32605 -1 585 9 216 698 45031 21119 6.8993 6.8993 -73.7008 -6.8993 0 0 194014. 2204.70 0.05 0.06 0.09 -1 -1 0.05 0.0224124 0.0206008 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_effort_scaling/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_effort_scaling/config/golden_results.txt index e61f8b4f5cb..4d6fe9605d7 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_effort_scaling/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_effort_scaling/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - EArch.xml ex5p.blif common_--place_effort_scaling_circuit 3.08 vpr 73.54 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75308 8 63 1072 1135 0 626 130 11 11 121 clb auto 35.6 MiB 1.72 5954 73.5 MiB 0.31 0.01 4.50897 -193.431 -4.50897 nan 0.27 0.00222751 0.00181568 0.111333 0.0953557 -1 -1 -1 -1 -1 -1 -1 -1 0.113407 0.0971096 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit 2.94 vpr 73.48 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75248 8 63 1072 1135 0 626 130 11 11 121 clb auto 35.6 MiB 1.63 5963 73.5 MiB 0.30 0.01 4.47285 -191.751 -4.47285 nan 0.34 0.00301794 0.00283315 0.0995508 0.0849514 -1 -1 -1 -1 -1 -1 -1 -1 0.101541 0.0866443 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - EArch.xml ex5p.blif common_--place_effort_scaling_circuit_--target_utilization_0.1 7.53 vpr 73.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75228 8 63 1072 1135 0 626 130 27 27 729 -1 auto 35.5 MiB 1.60 6840 73.5 MiB 0.50 0.01 4.98975 -232.432 -4.98975 nan 2.72 0.00148278 0.00121329 0.182671 0.155261 -1 -1 -1 -1 -1 -1 -1 -1 0.18879 0.160874 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit_--target_utilization_0.1 7.98 vpr 73.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75384 8 63 1072 1135 0 626 130 27 27 729 -1 auto 35.7 MiB 1.63 6725 73.6 MiB 1.27 0.01 5.07863 -230.426 -5.07863 nan 2.39 0.00170524 0.0014065 0.175074 0.151619 -1 -1 -1 -1 -1 -1 -1 -1 0.177548 0.153574 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + EArch.xml ex5p.blif common_--place_effort_scaling_circuit 4.34 vpr 74.30 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76080 8 63 1072 1135 0 619 135 12 12 144 clb auto 34.4 MiB 2.45 6183 12245 2318 9041 886 74.3 MiB 0.46 0.01 4.99539 -218.829 -4.99539 nan 0.40 0.00339822 0.00308909 0.174455 0.155138 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.182343 0.1625 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit 4.15 vpr 74.22 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76000 8 63 1072 1135 0 619 135 12 12 144 clb auto 34.1 MiB 2.35 6325 11326 2120 8412 794 74.2 MiB 0.45 0.01 4.96391 -216.681 -4.96391 nan 0.40 0.00300248 0.00261681 0.177754 0.159055 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.182191 0.163076 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml ex5p.blif common_--place_effort_scaling_circuit_--target_utilization_0.1 9.98 vpr 77.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 79808 8 63 1072 1135 0 619 135 27 27 729 -1 auto 34.4 MiB 2.36 6780 22625 6869 14375 1381 77.7 MiB 0.66 0.01 5.57619 -254.596 -5.57619 nan 3.15 0.00374551 0.00316871 0.28525 0.251728 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.292957 0.259025 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit_--target_utilization_0.1 10.88 vpr 77.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 79852 8 63 1072 1135 0 619 135 27 27 729 -1 auto 34.5 MiB 2.52 6916 70425 20372 45422 4631 77.9 MiB 1.04 0.02 5.61138 -254.037 -5.61138 nan 3.20 0.00355764 0.00324002 0.259461 0.229263 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.264477 0.233757 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_quench_slack/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_quench_slack/config/golden_results.txt index 71ea8438ea1..8ddf2cd268a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_quench_slack/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_place_quench_slack/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.61 vpr 62.29 MiB -1 -1 0.45 25540 5 0.13 -1 -1 35860 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63784 10 2 181 183 1 40 24 6 6 36 clb auto 23.7 MiB 0.03 160 62.3 MiB 0.02 0.01 2.0099 -85.2724 -2.0099 2.0099 0.03 0.00665351 0.00508613 0.00947948 0.00750843 18 195 16 646728 646728 30529.5 848.041 0.14 0.0548359 0.0465791 174 20 263 518 12894 3911 2.15053 2.15053 -97.2463 -2.15053 0 0 39290.9 1091.41 0.00 0.01 0.0078502 0.00698111 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 4.32 vpr 63.63 MiB -1 -1 0.91 23516 5 0.18 -1 -1 33320 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65160 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.14 146 398 72 298 28 63.6 MiB 0.15 0.00 2.14643 -92.7521 -2.14643 2.14643 0.05 0.000721287 0.000665617 0.0100883 0.00940276 -1 -1 -1 -1 14 201 20 646728 646728 22986.6 638.518 0.96 0.149763 0.124804 1728 4488 -1 171 15 208 442 9451 2845 2.12882 2.12882 -98.7664 -2.12882 0 0 30529.5 848.041 0.01 0.05 0.01 -1 -1 0.01 0.0189304 0.0169003 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_post_routing_sync/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_post_routing_sync/config/golden_results.txt index ec8c2cbb8a4..9a08c839075 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_post_routing_sync/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_post_routing_sync/config/golden_results.txt @@ -1,21 +1,21 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_true.blif common 0.29 vpr 60.09 MiB -1 -1 -1 -1 0 0.01 -1 -1 35140 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61532 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.7 MiB 0.00 0 3 0 0 3 60.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2624e-05 6.863e-06 7.0951e-05 4.4092e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00138677 0.00132564 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_false.blif common 0.29 vpr 60.12 MiB -1 -1 -1 -1 0 0.01 -1 -1 35396 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61564 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.9 MiB 0.00 0 3 0 0 3 60.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.1291e-05 6.021e-06 7.6852e-05 5.0624e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00137051 0.00131065 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_true.blif common 0.31 vpr 60.29 MiB -1 -1 -1 -1 0 0.01 -1 -1 35364 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61736 6 1 1 8 0 1 8 3 3 9 -1 auto 21.9 MiB 0.00 0 21 0 11 10 60.3 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2934e-05 7.013e-06 7.1594e-05 4.4524e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00144665 0.00138232 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_false.blif common 0.29 vpr 60.30 MiB -1 -1 -1 -1 0 0.01 -1 -1 35124 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61748 6 1 1 8 0 1 8 3 3 9 -1 auto 21.9 MiB 0.00 0 21 0 11 10 60.3 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2063e-05 6.722e-06 7.8527e-05 5.2217e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00137304 0.00130786 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and.blif common 0.28 vpr 60.30 MiB -1 -1 -1 -1 1 0.01 -1 -1 33336 -1 -1 1 2 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61748 2 1 3 4 0 3 4 3 3 9 -1 auto 21.9 MiB 0.00 9 9 4 3 2 60.3 MiB 0.00 0.00 0.443777 -0.443777 -0.443777 nan 0.00 2.2532e-05 1.2403e-05 0.000113402 8.4257e-05 -1 -1 -1 -1 -1 6 17 3900 3900 7855.82 872.868 0.00 0.00169237 0.00153011 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut.blif common 0.39 vpr 60.16 MiB -1 -1 -1 -1 2 0.04 -1 -1 39040 -1 -1 1 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61604 5 1 7 8 0 7 7 3 3 9 -1 auto 21.9 MiB 0.00 20 18 2 11 5 60.2 MiB 0.00 0.00 0.70303 -0.70303 -0.70303 nan 0.00 2.0619e-05 1.5439e-05 0.000138206 0.000110986 -1 -1 -1 -1 -1 11 16 3900 3900 7855.82 872.868 0.00 0.00195565 0.00176297 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut2.blif common 0.37 vpr 60.32 MiB -1 -1 -1 -1 2 0.04 -1 -1 39352 -1 -1 1 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61772 5 1 7 8 0 7 7 3 3 9 -1 auto 21.7 MiB 0.00 20 18 3 11 4 60.3 MiB 0.00 0.00 0.70303 -0.70303 -0.70303 nan 0.00 1.9997e-05 1.5068e-05 0.000130695 0.000104465 -1 -1 -1 -1 -1 10 16 3900 3900 7855.82 872.868 0.00 0.00226917 0.00208333 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and_latch.blif common 0.24 vpr 60.26 MiB -1 -1 -1 -1 1 0.01 -1 -1 35784 -1 -1 1 3 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61708 3 1 5 6 1 4 5 3 3 9 -1 auto 21.7 MiB 0.00 9 12 5 3 4 60.3 MiB 0.00 0.00 0.274843 -0.536407 -0.274843 0.274843 0.00 1.7943e-05 1.3084e-05 0.000121278 9.4537e-05 -1 -1 -1 -1 -1 10 5 3900 3900 7855.82 872.868 0.00 0.00156598 0.00146884 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml false_path_mux.blif common 0.38 vpr 60.32 MiB -1 -1 -1 -1 1 0.04 -1 -1 35672 -1 -1 1 3 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61764 4 1 4 6 0 4 6 3 3 9 -1 auto 21.9 MiB 0.00 12 15 6 8 1 60.3 MiB 0.00 0.00 0.443777 -0.443777 -0.443777 nan 0.00 1.6971e-05 1.2012e-05 0.000108512 8.2583e-05 -1 -1 -1 -1 -1 8 13 3900 3900 7855.82 872.868 0.00 0.00159978 0.00145285 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_2x2.blif common 0.39 vpr 60.48 MiB -1 -1 -1 -1 1 0.04 -1 -1 35996 -1 -1 1 4 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61936 4 4 8 12 0 8 9 3 3 9 -1 auto 22.0 MiB 0.00 25 27 10 13 4 60.5 MiB 0.00 0.00 0.443777 -1.77511 -0.443777 nan 0.00 2.732e-05 2.157e-05 0.000192447 0.000161791 -1 -1 -1 -1 -1 39 17 3900 3900 7855.82 872.868 0.00 0.00222234 0.00199072 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x3.blif common 0.43 vpr 60.60 MiB -1 -1 -1 -1 3 0.05 -1 -1 39616 -1 -1 3 6 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62052 6 6 28 34 0 28 15 5 5 25 clb auto 22.1 MiB 0.01 105 51 11 40 0 60.6 MiB 0.00 0.00 1.2267 -5.62751 -1.2267 nan 0.00 7.0331e-05 6.0062e-05 0.000517849 0.000468329 -1 -1 -1 -1 -1 185 18 23400 11700 33739.5 1349.58 0.01 0.00446503 0.00401531 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x4.blif common 0.44 vpr 60.56 MiB -1 -1 -1 -1 4 0.05 -1 -1 39608 -1 -1 5 7 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62012 7 8 39 47 0 39 20 5 5 25 clb auto 22.1 MiB 0.01 166 236 53 171 12 60.6 MiB 0.00 0.00 1.48724 -7.65174 -1.48724 nan 0.00 8.2272e-05 7.1663e-05 0.00117111 0.00104296 -1 -1 -1 -1 -1 340 19 23400 19500 33739.5 1349.58 0.03 0.00602031 0.0053634 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_4x4.blif common 0.50 vpr 60.49 MiB -1 -1 -1 -1 8 0.06 -1 -1 37604 -1 -1 7 8 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61940 8 8 51 59 0 51 23 6 6 36 clb auto 22.1 MiB 0.01 209 503 61 428 14 60.5 MiB 0.01 0.00 2.58988 -12.6437 -2.58988 nan 0.00 0.000103472 8.8684e-05 0.0023334 0.00205693 -1 -1 -1 -1 -1 458 20 165600 27300 61410.5 1705.85 0.03 0.00849848 0.00756356 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x5.blif common 0.61 vpr 61.01 MiB -1 -1 -1 -1 7 0.08 -1 -1 37512 -1 -1 11 10 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62472 10 10 95 105 0 95 31 6 6 36 clb auto 22.5 MiB 0.02 448 559 74 447 38 61.0 MiB 0.01 0.00 2.54509 -18.4246 -2.54509 nan 0.00 0.000175877 0.000152133 0.00296495 0.00266601 -1 -1 -1 -1 -1 1021 25 165600 42900 61410.5 1705.85 0.09 0.0139037 0.0123409 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x6.blif common 0.65 vpr 61.01 MiB -1 -1 -1 -1 8 0.09 -1 -1 40092 -1 -1 11 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62476 11 11 94 105 0 94 33 6 6 36 clb auto 22.5 MiB 0.02 438 501 77 394 30 61.0 MiB 0.01 0.00 2.87483 -21.0971 -2.87483 nan 0.00 0.000203849 0.000183461 0.00300839 0.00273948 -1 -1 -1 -1 -1 912 25 165600 42900 61410.5 1705.85 0.07 0.0144479 0.0129266 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_1bit.blif common 0.37 vpr 60.31 MiB -1 -1 -1 -1 1 0.04 -1 -1 38400 -1 -1 1 3 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61756 3 2 5 7 0 5 6 3 3 9 -1 auto 22.0 MiB 0.00 15 15 4 10 1 60.3 MiB 0.00 0.00 0.443777 -0.887553 -0.443777 nan 0.00 1.8665e-05 1.3916e-05 0.000130003 0.000104245 -1 -1 -1 -1 -1 13 16 3900 3900 7855.82 872.868 0.00 0.00184541 0.00166497 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_2bit.blif common 0.38 vpr 60.58 MiB -1 -1 -1 -1 2 0.04 -1 -1 39440 -1 -1 1 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62036 5 3 9 12 0 9 9 3 3 9 -1 auto 22.0 MiB 0.00 26 27 10 10 7 60.6 MiB 0.00 0.00 0.70303 -1.84984 -0.70303 nan 0.00 2.6641e-05 2.115e-05 0.000188782 0.000159717 -1 -1 -1 -1 -1 22 8 3900 3900 7855.82 872.868 0.00 0.00191788 0.00174521 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_3bit.blif common 0.44 vpr 60.46 MiB -1 -1 -1 -1 3 0.04 -1 -1 39148 -1 -1 1 7 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61912 7 4 13 17 0 13 12 3 3 9 -1 auto 22.0 MiB 0.00 37 38 21 15 2 60.5 MiB 0.00 0.00 0.962283 -3.07137 -0.962283 nan 0.00 3.705e-05 3.0457e-05 0.000232605 0.000201426 -1 -1 -1 -1 -1 44 18 3900 3900 7855.82 872.868 0.00 0.00259895 0.00231865 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_4bit.blif common 0.38 vpr 60.22 MiB -1 -1 -1 -1 4 0.04 -1 -1 39024 -1 -1 1 9 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61664 9 5 17 22 0 17 15 3 3 9 -1 auto 21.9 MiB 0.00 48 51 24 19 8 60.2 MiB 0.00 0.00 1.22154 -4.55216 -1.22154 nan 0.00 3.9614e-05 3.2942e-05 0.000290139 0.000256757 -1 -1 -1 -1 -1 48 8 3900 3900 7855.82 872.868 0.00 0.0023579 0.00217828 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_5bit.blif common 0.41 vpr 60.28 MiB -1 -1 -1 -1 4 0.04 -1 -1 37136 -1 -1 2 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61728 11 6 24 30 0 24 19 4 4 16 clb auto 21.9 MiB 0.01 85 69 11 46 12 60.3 MiB 0.00 0.00 1.38857 -6.95415 -1.38857 nan 0.00 5.5794e-05 4.5765e-05 0.000388772 0.000348486 -1 -1 -1 -1 -1 121 17 7800 7800 17482.0 1092.63 0.01 0.00355535 0.00318881 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_true.blif common 0.68 vpr 60.19 MiB -1 -1 -1 -1 0 0.02 -1 -1 30040 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61636 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.4 MiB 0.03 0 3 0 0 3 60.2 MiB 0.01 0.00 nan 0 0 nan 0.00 1.2311e-05 7.387e-06 0.000105834 7.5869e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00147816 0.00140463 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_false.blif common 0.71 vpr 60.08 MiB -1 -1 -1 -1 0 0.02 -1 -1 30088 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61524 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.4 MiB 0.04 0 3 0 0 3 60.1 MiB 0.03 0.00 nan 0 0 nan 0.00 3.6044e-05 2.4593e-05 0.000145604 0.000105582 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.02 0.00162472 0.00153314 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_true.blif common 0.73 vpr 60.18 MiB -1 -1 -1 -1 0 0.02 -1 -1 30176 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61624 6 1 1 8 0 1 8 3 3 9 -1 auto 21.4 MiB 0.04 0 21 0 11 10 60.2 MiB 0.04 0.00 nan 0 0 nan 0.00 3.8303e-05 2.7095e-05 0.000158699 0.000117087 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.02 0.00160603 0.0015131 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_false.blif common 0.66 vpr 60.16 MiB -1 -1 -1 -1 0 0.02 -1 -1 30096 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61604 6 1 1 8 0 1 8 3 3 9 -1 auto 21.5 MiB 0.03 0 21 0 11 10 60.2 MiB 0.02 0.00 nan 0 0 nan 0.00 3.1614e-05 2.36e-05 0.000126831 9.3717e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.02 0.00140564 0.0013257 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and.blif common 0.74 vpr 60.46 MiB -1 -1 -1 -1 1 0.02 -1 -1 30012 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61912 2 1 3 4 0 3 4 3 3 9 -1 auto 21.8 MiB 0.03 9 9 5 0 4 60.5 MiB 0.03 0.00 0.443777 -0.443777 -0.443777 nan 0.00 2.6924e-05 2.1285e-05 0.000155957 0.000124557 -1 -1 -1 -1 -1 6 9 3900 3900 7855.82 872.868 0.04 0.00180691 0.00163332 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut.blif common 0.92 vpr 60.15 MiB -1 -1 -1 -1 2 0.06 -1 -1 31604 -1 -1 1 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61592 5 1 7 8 0 7 7 3 3 9 -1 auto 21.4 MiB 0.05 20 18 12 0 6 60.1 MiB 0.05 0.00 0.70303 -0.70303 -0.70303 nan 0.00 4.3879e-05 3.664e-05 0.000222358 0.000185667 -1 -1 -1 -1 -1 8 6 3900 3900 7855.82 872.868 0.06 0.00211615 0.00192656 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut2.blif common 1.01 vpr 60.18 MiB -1 -1 -1 -1 2 0.06 -1 -1 31700 -1 -1 1 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61628 5 1 7 8 0 7 7 3 3 9 -1 auto 21.5 MiB 0.03 20 18 13 0 5 60.2 MiB 0.04 0.00 0.70303 -0.70303 -0.70303 nan 0.00 3.5381e-05 2.8816e-05 0.000203736 0.000168971 -1 -1 -1 -1 -1 11 12 3900 3900 7855.82 872.868 0.11 0.00246619 0.00216395 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and_latch.blif common 0.87 vpr 60.48 MiB -1 -1 -1 -1 1 0.03 -1 -1 30164 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61928 3 1 5 6 1 4 5 3 3 9 -1 auto 21.8 MiB 0.04 9 12 9 0 3 60.5 MiB 0.05 0.00 0.274843 -0.536407 -0.274843 0.274843 0.00 4.4055e-05 3.6531e-05 0.00021973 0.000180261 -1 -1 -1 -1 -1 5 8 3900 3900 7855.82 872.868 0.07 0.0021248 0.00193396 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml false_path_mux.blif common 0.90 vpr 60.20 MiB -1 -1 -1 -1 1 0.05 -1 -1 31836 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61640 4 1 4 6 0 4 6 3 3 9 -1 auto 21.4 MiB 0.03 12 15 11 0 4 60.2 MiB 0.03 0.00 0.443777 -0.443777 -0.443777 nan 0.00 2.0841e-05 1.5222e-05 0.000192491 0.000153992 -1 -1 -1 -1 -1 7 16 3900 3900 7855.82 872.868 0.10 0.00238512 0.00206432 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_2x2.blif common 1.11 vpr 60.11 MiB -1 -1 -1 -1 1 0.07 -1 -1 31800 -1 -1 1 4 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61548 4 4 8 12 0 8 9 3 3 9 -1 auto 21.4 MiB 0.04 25 27 23 0 4 60.1 MiB 0.07 0.00 0.443777 -1.77511 -0.443777 nan 0.00 4.9827e-05 4.1535e-05 0.000407965 0.000351743 -1 -1 -1 -1 -1 27 13 3900 3900 7855.82 872.868 0.11 0.00374472 0.00335722 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x3.blif common 1.20 vpr 60.43 MiB -1 -1 -1 -1 3 0.06 -1 -1 32200 -1 -1 3 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61884 6 6 28 34 0 28 15 5 5 25 clb auto 22.0 MiB 0.07 103 51 13 38 0 60.4 MiB 0.06 0.00 1.2267 -5.62618 -1.2267 nan 0.00 0.000167356 0.00015066 0.000901624 0.000832866 -1 -1 -1 -1 -1 193 16 23400 11700 33739.5 1349.58 0.15 0.00707982 0.00624618 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x4.blif common 1.18 vpr 60.43 MiB -1 -1 -1 -1 4 0.07 -1 -1 32216 -1 -1 5 7 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61884 7 8 39 47 0 39 20 5 5 25 clb auto 21.9 MiB 0.10 172 74 13 56 5 60.4 MiB 0.06 0.00 1.56314 -7.84574 -1.56314 nan 0.00 0.000160264 0.000142619 0.00116065 0.0010838 -1 -1 -1 -1 -1 327 16 23400 19500 33739.5 1349.58 0.15 0.00898169 0.00794478 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_4x4.blif common 1.18 vpr 60.40 MiB -1 -1 -1 -1 8 0.07 -1 -1 32208 -1 -1 7 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61852 8 8 51 59 0 51 23 6 6 36 clb auto 21.8 MiB 0.05 214 503 64 428 11 60.4 MiB 0.09 0.00 2.63385 -12.7463 -2.63385 nan 0.00 0.000177584 0.000161757 0.00423755 0.00390688 -1 -1 -1 -1 -1 520 19 165600 27300 61410.5 1705.85 0.22 0.0150687 0.0131936 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x5.blif common 1.43 vpr 60.70 MiB -1 -1 -1 -1 7 0.09 -1 -1 32696 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62156 10 10 95 105 0 95 31 6 6 36 clb auto 21.4 MiB 0.06 451 655 100 526 29 60.7 MiB 0.09 0.00 2.57174 -18.2179 -2.57174 nan 0.00 0.00035514 0.000326891 0.00608822 0.00564107 -1 -1 -1 -1 -1 1075 30 165600 42900 61410.5 1705.85 0.38 0.0302852 0.0267502 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x6.blif common 1.43 vpr 60.61 MiB -1 -1 -1 -1 8 0.10 -1 -1 32900 -1 -1 11 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62064 11 11 94 105 0 94 33 6 6 36 clb auto 21.4 MiB 0.06 445 709 84 587 38 60.6 MiB 0.01 0.00 2.8791 -21.3962 -2.8791 nan 0.00 0.000245371 0.000216385 0.0044853 0.00411137 -1 -1 -1 -1 -1 1004 29 165600 42900 61410.5 1705.85 0.32 0.0287668 0.0253979 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_1bit.blif common 0.67 vpr 60.14 MiB -1 -1 -1 -1 1 0.05 -1 -1 30884 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61588 3 2 5 7 0 5 6 3 3 9 -1 auto 21.4 MiB 0.01 15 15 11 0 4 60.1 MiB 0.00 0.00 0.443777 -0.887553 -0.443777 nan 0.00 1.9951e-05 1.4849e-05 0.000164121 0.000125521 -1 -1 -1 -1 -1 12 16 3900 3900 7855.82 872.868 0.01 0.00219507 0.00196019 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_2bit.blif common 0.73 vpr 60.16 MiB -1 -1 -1 -1 2 0.05 -1 -1 31860 -1 -1 1 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61600 5 3 9 12 0 9 9 3 3 9 -1 auto 21.4 MiB 0.03 26 27 24 0 3 60.2 MiB 0.00 0.00 0.70303 -1.84984 -0.70303 nan 0.00 2.8254e-05 2.3107e-05 0.000190345 0.000162041 -1 -1 -1 -1 -1 19 17 3900 3900 7855.82 872.868 0.01 0.00246508 0.00221947 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_3bit.blif common 0.71 vpr 60.18 MiB -1 -1 -1 -1 3 0.06 -1 -1 31972 -1 -1 1 7 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61628 7 4 13 17 0 13 12 3 3 9 -1 auto 21.5 MiB 0.01 37 38 34 0 4 60.2 MiB 0.00 0.00 0.962283 -3.07137 -0.962283 nan 0.00 3.418e-05 2.8219e-05 0.000302318 0.000266511 -1 -1 -1 -1 -1 42 18 3900 3900 7855.82 872.868 0.02 0.00309555 0.00273229 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_4bit.blif common 0.68 vpr 60.22 MiB -1 -1 -1 -1 4 0.05 -1 -1 31940 -1 -1 1 9 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61668 9 5 17 22 0 17 15 3 3 9 -1 auto 21.5 MiB 0.01 48 51 43 0 8 60.2 MiB 0.00 0.00 1.22154 -4.55216 -1.22154 nan 0.00 4.7618e-05 4.1095e-05 0.000313513 0.000280762 -1 -1 -1 -1 -1 65 19 3900 3900 7855.82 872.868 0.01 0.00380867 0.00333062 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_5bit.blif common 0.68 vpr 60.16 MiB -1 -1 -1 -1 4 0.06 -1 -1 31924 -1 -1 2 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61608 11 6 24 30 0 24 19 4 4 16 clb auto 21.7 MiB 0.01 83 69 18 40 11 60.2 MiB 0.00 0.00 1.35387 -6.69849 -1.35387 nan 0.00 5.2391e-05 4.166e-05 0.000438046 0.000390075 -1 -1 -1 -1 -1 125 12 7800 7800 17482.0 1092.63 0.01 0.00329075 0.00296207 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt index 3ff29a7a05b..d710f9093cf 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc -k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 5.18 vpr 64.54 MiB -1 -1 0.46 18288 3 0.09 -1 -1 33160 -1 -1 68 99 1 0 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66092 99 130 344 474 1 227 298 12 12 144 clb auto 25.4 MiB 0.19 661 70943 20722 37566 12655 64.5 MiB 0.23 0.00 1.839 -119.581 -1.839 1.839 0.27 0.00127959 0.0012119 0.0953193 0.0902128 34 1589 13 5.66058e+06 4.21279e+06 293002. 2034.74 1.83 0.517305 0.473105 12094 55633 -1 1502 8 427 618 38452 11577 2.02446 2.02446 -143.952 -2.02446 -0.463855 -0.170786 360780. 2505.42 0.08 0.04 0.06 -1 -1 0.08 0.0277569 0.0257707 0.01129 0.2417 0.06156 0.6968 -k6_frac_N10_mem32K_40nm.xml diffeq1.v common 13.38 vpr 67.62 MiB -1 -1 0.73 23380 15 0.34 -1 -1 34320 -1 -1 36 162 0 5 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 69248 162 96 1009 950 1 702 299 16 16 256 mult_36 auto 28.5 MiB 0.29 5441 82217 25307 49551 7359 67.6 MiB 0.58 0.01 21.1109 -1602.21 -21.1109 21.1109 0.53 0.00332925 0.00312565 0.291767 0.273163 50 13131 39 1.21132e+07 3.92018e+06 780512. 3048.87 6.89 1.58692 1.4546 25484 153448 -1 10094 19 3330 6658 1024237 280212 22.4504 22.4504 -1708.56 -22.4504 0 0 1.00276e+06 3917.05 0.22 0.35 0.14 -1 -1 0.22 0.145546 0.135026 0.007913 0.3568 0.01624 0.6269 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 7.34 vpr 66.08 MiB -1 -1 0.43 18936 3 0.11 -1 -1 33284 -1 53192 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67664 99 130 344 474 1 227 298 12 12 144 clb auto 26.4 MiB 0.38 717 72933 22876 34411 15646 66.1 MiB 0.54 0.01 1.84343 -118.171 -1.84343 1.84343 0.36 0.0010848 0.00101841 0.0913793 0.0860775 -1 -1 -1 -1 38 1552 14 5.66058e+06 4.21279e+06 319130. 2216.18 2.91 0.450493 0.414934 12522 62564 -1 1267 9 391 595 24204 7116 1.90841 1.90841 -134.254 -1.90841 -1.28606 -0.31945 406292. 2821.48 0.13 0.07 0.08 -1 -1 0.13 0.0328333 0.030834 0.0117 0.2242 0.06563 0.7102 + k6_frac_N10_mem32K_40nm.xml diffeq1.v common 17.64 vpr 68.80 MiB -1 -1 0.70 23848 15 0.45 -1 -1 34524 -1 54788 39 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70452 162 96 1009 950 1 701 302 16 16 256 mult_36 auto 29.4 MiB 0.77 5637 94418 33826 53640 6952 68.8 MiB 0.97 0.01 21.0535 -1600.99 -21.0535 21.0535 0.77 0.00355871 0.00332925 0.362999 0.339534 -1 -1 -1 -1 50 13462 45 1.21132e+07 4.08187e+06 780512. 3048.87 8.60 1.322 1.21904 25484 153448 -1 9971 18 3407 6810 971785 294758 22.3056 22.3056 -1729.57 -22.3056 0 0 1.00276e+06 3917.05 0.33 0.44 0.17 -1 -1 0.33 0.14631 0.136022 0.007875 0.3522 0.01635 0.6315 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_only/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_only/config/golden_results.txt index e0b18c5440a..0b0e8c245c9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_only/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_only/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.19 vpr 62.26 MiB -1 -1 0.47 25532 5 0.14 -1 -1 35732 -1 -1 12 10 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63752 10 2 181 183 1 40 24 6 6 36 clb auto 23.7 MiB 0.03 152 62.3 MiB 0.01 0.00 2.0099 -85.4829 -2.0099 2.0099 0.00 0.000104896 8.1745e-05 0.00281531 0.00239946 137 214 418 18324 2969 646728 646728 138825. 3856.24 15 2.06794 2.06794 -89.0541 -2.06794 0 0 62.3 MiB 0.01 0.00992485 0.00879589 62.3 MiB 0.01 - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.42 vpr 64.97 MiB -1 -1 0.45 25692 4 0.13 -1 -1 36648 -1 -1 15 11 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66532 11 2 303 283 2 80 28 7 7 49 clb auto 26.5 MiB 0.19 260 65.0 MiB 0.02 0.00 1.86505 -148.495 -1.86505 1.77255 0.00 0.000213465 0.000156677 0.00822606 0.00707266 278 109 166 3361 958 1.07788e+06 808410 219490. 4479.39 4 2.00201 1.88787 -162.659 -2.00201 0 0 65.0 MiB 0.02 0.0216222 0.0198889 65.0 MiB 0.06 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.71 vpr 63.64 MiB -1 -1 0.89 23420 5 0.17 -1 -1 33392 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65172 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.10 146 398 72 298 28 63.6 MiB 0.06 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.000418181 0.00038256 0.0070167 0.00650899 -1 -1 -1 -1 130 4.06250 54 1.68750 215 509 15144 2919 646728 646728 138825. 3856.24 24 3164 19284 -1 2.05191 2.05191 -93.8814 -2.05191 0 0 0.02 -1 -1 63.6 MiB 0.24 0.0355426 0.0317424 63.6 MiB -1 0.03 + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.97 vpr 66.65 MiB -1 -1 0.84 23052 4 0.17 -1 -1 33056 -1 -1 15 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68248 11 2 303 283 2 78 28 7 7 49 clb auto 27.1 MiB 0.31 264 1036 209 767 60 66.6 MiB 0.17 0.00 2.03811 -163.536 -2.03811 1.90043 0.00 0.0010174 0.000936861 0.0267115 0.0245008 -1 -1 -1 -1 252 3.50000 103 1.43056 122 199 4265 1218 1.07788e+06 808410 219490. 4479.39 12 5100 32136 -1 2.11264 1.93889 -160.659 -2.11264 0 0 0.04 -1 -1 66.6 MiB 0.15 0.0627365 0.0575288 66.6 MiB -1 0.04 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_reconverge/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_reconverge/config/golden_results.txt index 841d34cb942..447a074d109 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_reconverge/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_route_reconverge/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 38.48 vpr 82.47 MiB -1 -1 4.61 55284 5 1.75 -1 -1 41244 -1 -1 149 193 5 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 84452 193 205 2738 2672 1 1350 552 20 20 400 memory auto 44.9 MiB 2.49 10888 82.5 MiB 1.93 0.03 4.6568 -2665.16 -4.6568 4.6568 1.09 0.00474891 0.00396255 0.536529 0.46283 74 23337 51 2.07112e+07 1.07702e+07 1.98511e+06 4962.77 18.74 2.40373 2.12841 21197 45 6812 20354 4357792 1609648 5.52076 5.52076 -3182.57 -5.52076 -12.8369 -0.360359 2.48015e+06 6200.37 0.76 2.01 0.540364 0.492833 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 46.36 vpr 82.59 MiB -1 -1 8.22 52832 5 2.16 -1 -1 39584 -1 -1 153 193 5 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 84572 193 205 2718 2652 1 1312 556 20 20 400 memory auto 41.4 MiB 2.16 10365 229056 86247 118235 24574 82.3 MiB 2.34 0.03 4.93042 -2712.69 -4.93042 4.93042 1.49 0.00671843 0.00610927 0.880709 0.785571 -1 -1 -1 -1 82 19408 37 2.07112e+07 1.09858e+07 2.14661e+06 5366.52 23.21 5.08072 4.56727 53670 456392 -1 17785 16 4760 12593 961685 215487 5.25964 5.25964 -2873.25 -5.25964 -10.2812 -0.29768 2.68822e+06 6720.56 0.74 0.58 0.45 -1 -1 0.74 0.348182 0.32009 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_init_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_init_timing/config/golden_results.txt index 1d9f45afdd1..3029284bb73 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_init_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_init_timing/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_all_critical 1.69 vpr 68.47 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 70112 8 63 748 811 0 474 151 13 13 169 clb auto 30.5 MiB 0.31 4777 68.5 MiB 0.31 0.01 3.87527 -172.209 -3.87527 nan 0.01 0.00129043 0.00106865 0.110054 0.0974715 6819 4027 15012 710111 104954 6.63067e+06 4.31152e+06 714925. 4230.32 22 4.25667 nan -190.549 -4.25667 0 0 68.5 MiB 0.35 0.269955 0.246126 68.5 MiB 0.19 - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_lookahead 1.58 vpr 68.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 70068 8 63 748 811 0 474 151 13 13 169 clb auto 30.5 MiB 0.32 4777 68.4 MiB 0.25 0.00 3.87527 -172.209 -3.87527 nan 0.01 0.00128648 0.00106757 0.0740619 0.0634109 6692 4105 15099 691406 103895 6.63067e+06 4.31152e+06 714925. 4230.32 24 4.29629 nan -191.279 -4.29629 0 0 68.4 MiB 0.38 0.228129 0.206067 68.4 MiB 0.22 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_all_critical 2.47 vpr 69.09 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70748 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.54 4989 14482 2605 10909 968 69.1 MiB 0.33 0.01 4.15324 -188.164 -4.15324 nan 0.00 0.00355218 0.00311968 0.123812 0.109233 -1 -1 -1 -1 6805 14.9560 1830 4.02198 3625 14263 570126 87469 9.20055e+06 4.79657e+06 867065. 4423.80 19 18088 133656 -1 4.17843 nan -185.467 -4.17843 0 0 0.15 -1 -1 69.1 MiB 0.41 0.278836 0.250118 69.1 MiB -1 0.28 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_lookahead 2.71 vpr 69.07 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70728 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.58 4989 14482 2605 10909 968 69.1 MiB 0.30 0.01 4.15324 -188.164 -4.15324 nan 0.00 0.00262291 0.00213676 0.106954 0.095917 -1 -1 -1 -1 6877 15.1143 1848 4.06154 3712 14523 564432 88116 9.20055e+06 4.79657e+06 867065. 4423.80 19 18088 133656 -1 4.14924 nan -185.7 -4.14924 0 0 0.14 -1 -1 69.1 MiB 0.44 0.258375 0.232966 69.1 MiB -1 0.34 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_lookahead/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_lookahead/config/golden_results.txt index 8a39b0e4462..15eaa3bf41e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_lookahead/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_lookahead/config/golden_results.txt @@ -1,5 +1,5 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_classic 1.46 vpr 67.44 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69056 8 63 748 811 0 474 151 13 13 169 clb auto 28.2 MiB 0.33 4925 14186 2812 10318 1056 67.4 MiB 0.22 0.01 3.93703 -166.673 -3.93703 nan 0.02 0.00225693 0.00200229 0.0979565 0.0884414 6903 14.5633 1898 4.00422 3929 14413 1232679 208639 6.63067e+06 4.31152e+06 577501. 3417.16 23 13292 85338 -1 4.36892 nan -190.868 -4.36892 0 0 0.09 -1 -1 67.4 MiB 0.33 0.226128 0.201736 -1 -1 -1 -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_map 1.53 vpr 67.52 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69144 8 63 748 811 0 474 151 13 13 169 clb auto 28.3 MiB 0.32 4860 15790 3063 11462 1265 67.5 MiB 0.24 0.01 4.29693 -193.727 -4.29693 nan 0.00 0.00226483 0.00201463 0.106166 0.0957802 6879 14.5127 1879 3.96413 4087 15882 659925 103848 6.63067e+06 4.31152e+06 577501. 3417.16 24 13292 85338 -1 4.41049 nan -200.759 -4.41049 0 0 0.09 -1 -1 67.5 MiB 0.30 0.250433 0.224299 67.5 MiB -1 0.13 -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map 2.42 vpr 67.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69116 8 63 748 811 0 474 151 13 13 169 clb auto 28.3 MiB 0.31 4839 12582 2336 9502 744 67.5 MiB 0.19 0.01 3.61483 -159.25 -3.61483 nan 0.03 0.00228626 0.0020217 0.0847617 0.0764979 7006 14.7806 1933 4.07806 4489 16137 1303855 215072 6.63067e+06 4.31152e+06 577501. 3417.16 27 13292 85338 -1 4.34694 nan -183.291 -4.34694 0 0 0.09 -1 -1 67.5 MiB 0.39 0.229114 0.203112 -1 -1 -1 -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map_--reorder_rr_graph_nodes_algorithm_random_shuffle 2.41 vpr 67.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69228 8 63 748 811 0 474 151 13 13 169 clb auto 28.3 MiB 0.31 4839 12582 2336 9502 744 67.6 MiB 0.19 0.01 3.61483 -159.25 -3.61483 nan 0.03 0.00229369 0.00203749 0.0853409 0.0771116 7006 14.7806 1933 4.07806 4489 16137 1303855 215072 6.63067e+06 4.31152e+06 577501. 3417.16 27 13292 85338 -1 4.34694 nan -183.291 -4.34694 0 0 0.09 -1 -1 67.6 MiB 0.39 0.232245 0.205938 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_classic 2.55 vpr 69.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70784 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.60 4981 18388 4106 12671 1611 69.1 MiB 0.49 0.01 3.67827 -162.703 -3.67827 nan 0.04 0.00317376 0.00278185 0.166614 0.146475 -1 -1 -1 -1 6929 15.2286 1856 4.07912 4031 16057 1191599 209386 9.20055e+06 4.79657e+06 701736. 3580.29 21 16332 105598 -1 4.26894 nan -186.127 -4.26894 0 0 0.09 -1 -1 69.1 MiB 0.54 0.351918 0.315357 -1 -1 -1 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_map 2.62 vpr 69.03 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70684 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.61 4947 14048 2843 10376 829 69.0 MiB 0.36 0.01 4.36787 -194.851 -4.36787 nan 0.00 0.00347735 0.00296792 0.131799 0.115232 -1 -1 -1 -1 7013 15.4132 1882 4.13626 4368 18266 702728 114564 9.20055e+06 4.79657e+06 701736. 3580.29 22 16332 105598 -1 4.35011 nan -200.403 -4.35011 0 0 0.11 -1 -1 69.0 MiB 0.50 0.320884 0.285698 69.0 MiB -1 0.23 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map 3.96 vpr 69.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70868 8 63 748 811 0 455 160 14 14 196 clb auto 29.7 MiB 0.63 4953 17954 4036 12536 1382 69.2 MiB 0.51 0.01 3.75278 -163.938 -3.75278 nan 0.07 0.00355287 0.00313746 0.160864 0.141994 -1 -1 -1 -1 7096 15.5956 1936 4.25495 3839 15635 1250449 222869 9.20055e+06 4.79657e+06 701736. 3580.29 22 16332 105598 -1 4.31984 nan -190.626 -4.31984 0 0 0.09 -1 -1 69.2 MiB 0.68 0.350893 0.31266 -1 -1 -1 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map_--reorder_rr_graph_nodes_algorithm_random_shuffle 3.84 vpr 69.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70800 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.60 4953 17954 4036 12536 1382 69.1 MiB 0.45 0.01 3.75278 -163.938 -3.75278 nan 0.07 0.00233095 0.00207468 0.141454 0.125813 -1 -1 -1 -1 7096 15.5956 1936 4.25495 3839 15635 1250449 222869 9.20055e+06 4.79657e+06 701736. 3580.29 22 16332 105598 -1 4.31984 nan -190.626 -4.31984 0 0 0.12 -1 -1 69.1 MiB 0.66 0.321273 0.286755 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_update_lb_delays/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_update_lb_delays/config/golden_results.txt index 6f33da5c44d..85f2b790a31 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_update_lb_delays/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_router_update_lb_delays/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_off 1.61 vpr 68.63 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 70280 8 63 748 811 0 474 151 13 13 169 clb auto 30.7 MiB 0.30 4780 68.6 MiB 0.29 0.01 3.97907 -175.625 -3.97907 nan 0.01 0.00144343 0.00116823 0.0869147 0.073976 6590 4348 15331 681750 105919 6.63067e+06 4.31152e+06 648366. 3836.48 32 4.32984 nan -195.219 -4.32984 0 0 68.6 MiB 0.36 0.2289 0.204365 68.6 MiB 0.27 - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_on 1.47 vpr 68.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 69772 8 63 748 811 0 474 151 13 13 169 clb auto 30.2 MiB 0.29 4780 68.1 MiB 0.27 0.01 3.97907 -175.625 -3.97907 nan 0.01 0.00136787 0.00112947 0.0779088 0.0669529 6579 4366 15469 686319 106529 6.63067e+06 4.31152e+06 648366. 3836.48 32 4.32984 nan -195.219 -4.32984 0 0 68.1 MiB 0.37 0.239706 0.216262 68.1 MiB 0.17 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_off 2.44 vpr 69.01 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70664 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.60 5081 14916 3009 10977 930 69.0 MiB 0.47 0.01 4.4281 -198.501 -4.4281 nan 0.00 0.00389538 0.00357453 0.140004 0.12435 -1 -1 -1 -1 6741 14.8154 1803 3.96264 3315 13570 497205 81432 9.20055e+06 4.79657e+06 787177. 4016.21 19 17112 118924 -1 4.40099 nan -202.066 -4.40099 0 0 0.12 -1 -1 69.0 MiB 0.33 0.283749 0.254966 69.0 MiB -1 0.26 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_on 2.38 vpr 69.02 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70672 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.61 5081 14916 3009 10977 930 69.0 MiB 0.41 0.01 4.4281 -198.501 -4.4281 nan 0.00 0.00305314 0.00262997 0.138499 0.118452 -1 -1 -1 -1 6767 14.8725 1813 3.98462 3295 13377 489418 80231 9.20055e+06 4.79657e+06 787177. 4016.21 18 17112 118924 -1 4.40099 nan -201.997 -4.40099 0 0 0.13 -1 -1 69.0 MiB 0.39 0.297323 0.263941 69.0 MiB -1 0.24 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt index 6942d680eeb..cee3d6a8fdb 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/config/golden_results.txt @@ -1,7 +1,7 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets -timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.21 vpr 62.14 MiB -1 -1 0.15 16500 1 0.05 -1 -1 32040 -1 -1 2 6 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63632 6 1 16 17 2 10 9 17 17 289 -1 auto 23.6 MiB 0.02 82 27 5 22 0 62.1 MiB 0.00 0.00 1.83313 -4.52227 -1.83313 0.805 0.63 4.5928e-05 3.9482e-05 0.000306382 0.000268718 -1 -1 -1 -1 20 145 2 1.34605e+07 107788 411619. 1424.29 0.44 0.00206436 0.00190427 24098 82050 -1 147 4 15 15 35806 12084 2.78102 0.805 -5.85443 -2.78102 -0.654148 -0.329288 535376. 1852.51 0.14 0.23 0.08 -1 -1 0.14 0.001773 0.00165079 1 9 -timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 1.97 vpr 61.79 MiB -1 -1 0.13 16288 1 0.02 -1 -1 29984 -1 -1 1 3 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63268 3 1 5 6 1 4 5 13 13 169 -1 auto 23.2 MiB 0.01 38 12 1 11 0 61.8 MiB 0.00 0.00 1.01347 -1.57988 -1.01347 1.01347 0.32 2.0625e-05 1.4202e-05 0.000120894 9.6334e-05 -1 -1 -1 -1 20 59 2 6.63067e+06 53894 227243. 1344.63 0.25 0.00144866 0.00135193 13251 44387 -1 61 1 4 4 4268 1433 1.65474 1.65474 -1.68612 -1.65474 -0.226831 -0.226831 294987. 1745.49 0.07 0.12 0.04 -1 -1 0.07 0.00122606 0.00118524 0 4 -timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.18 vpr 62.38 MiB -1 -1 0.16 16412 1 0.05 -1 -1 32020 -1 -1 2 6 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63876 6 1 16 17 2 10 9 17 17 289 -1 auto 23.8 MiB 0.02 82 27 5 22 0 62.4 MiB 0.00 0.00 1.83475 -4.52496 -1.83475 0.805 0.62 4.5751e-05 3.913e-05 0.000305815 0.00026722 -1 -1 -1 -1 20 145 1 1.34605e+07 107788 424167. 1467.71 0.45 0.00198627 0.00183447 24098 84646 -1 135 1 9 9 13287 4443 2.34012 0.805 -4.96572 -2.34012 -0.653042 -0.329288 547923. 1895.93 0.13 0.22 0.07 -1 -1 0.13 0.00144006 0.00137507 1 9 -timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 1.97 vpr 61.91 MiB -1 -1 0.15 16456 1 0.02 -1 -1 29860 -1 -1 1 3 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63400 3 1 5 6 1 4 5 13 13 169 -1 auto 23.2 MiB 0.01 38 12 1 11 0 61.9 MiB 0.00 0.00 1.01347 -1.57988 -1.01347 1.01347 0.33 2.0238e-05 1.4745e-05 0.000129581 0.000104722 -1 -1 -1 -1 20 64 2 6.63067e+06 53894 235789. 1395.20 0.25 0.00142631 0.0013266 13251 46155 -1 65 1 4 4 4385 1450 1.86348 1.86348 -1.89487 -1.86348 -0.226831 -0.226831 303533. 1796.05 0.07 0.13 0.04 -1 -1 0.07 0.0011908 0.00115451 0 4 -timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.19 vpr 62.24 MiB -1 -1 0.15 16528 1 0.05 -1 -1 32172 -1 -1 2 6 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63736 6 1 16 17 2 10 9 17 17 289 -1 auto 23.6 MiB 0.02 82 27 5 22 0 62.2 MiB 0.00 0.00 1.83313 -4.52227 -1.83313 0.805 0.61 4.6371e-05 3.9834e-05 0.000306462 0.000268405 -1 -1 -1 -1 20 623 2 1.34605e+07 107788 408865. 1414.76 0.44 0.00202292 0.00185851 24098 82150 -1 625 4 15 15 40897 15620 3.72331 0.805 -7.73802 -3.72331 -2.53872 -1.27157 532630. 1843.01 0.14 0.24 0.08 -1 -1 0.14 0.00176742 0.00164337 1 9 -timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 1.92 vpr 62.05 MiB -1 -1 0.15 16428 1 0.02 -1 -1 29824 -1 -1 1 3 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63536 3 1 5 6 1 4 5 13 13 169 -1 auto 23.5 MiB 0.01 38 12 1 11 0 62.0 MiB 0.00 0.00 1.01347 -1.57988 -1.01347 1.01347 0.32 3.6518e-05 3.0924e-05 0.000166856 0.000130421 -1 -1 -1 -1 20 190 2 6.63067e+06 53894 225153. 1332.26 0.24 0.00163269 0.00149103 13251 44463 -1 192 1 4 4 1305 345 2.27397 2.27397 -2.27397 -2.27397 -0.846062 -0.846062 292904. 1733.16 0.07 0.12 0.04 -1 -1 0.07 0.00124345 0.00120483 0 4 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets + timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 4.82 vpr 64.82 MiB -1 -1 0.15 17544 1 0.06 -1 -1 32228 -1 -1 2 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66372 6 1 16 17 2 10 9 17 17 289 -1 auto 26.1 MiB 0.03 30 162 45 109 8 64.8 MiB 0.09 0.00 1.4327 -4.13089 -1.4327 0.805 0.87 0.000186474 0.000145053 0.00220998 0.00182998 -1 -1 -1 -1 20 95 2 1.34605e+07 107788 411619. 1424.29 0.70 0.00469902 0.00412949 24098 82050 -1 103 2 14 14 8039 3790 2.67718 0.805 -5.78255 -2.67718 -1.39285 -0.696976 535376. 1852.51 0.22 0.33 0.08 -1 -1 0.22 0.00213527 0.00203038 1 9 + timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.09 vpr 64.87 MiB -1 -1 0.11 17384 1 0.02 -1 -1 29996 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66428 3 1 5 6 1 4 5 13 13 169 -1 auto 26.1 MiB 0.03 35 12 3 8 1 64.9 MiB 0.01 0.00 1.12186 -1.54831 -1.12186 1.12186 0.48 2.8473e-05 2.3109e-05 0.000199018 0.000164788 -1 -1 -1 -1 20 62 1 6.63067e+06 53894 227243. 1344.63 0.37 0.00185586 0.00172162 13251 44387 -1 55 1 4 4 2056 1112 1.77078 1.77078 -1.77078 -1.77078 -0.365681 -0.365681 294987. 1745.49 0.10 0.18 0.05 -1 -1 0.10 0.00158341 0.00153323 0 4 + timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 4.83 vpr 64.72 MiB -1 -1 0.13 17592 1 0.07 -1 -1 32164 -1 -1 2 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66272 6 1 16 17 2 10 9 17 17 289 -1 auto 25.9 MiB 0.02 30 162 45 109 8 64.7 MiB 0.09 0.00 1.43377 -4.13192 -1.43377 0.805 0.93 6.1161e-05 4.7651e-05 0.00173334 0.0014267 -1 -1 -1 -1 20 96 2 1.34605e+07 107788 424167. 1467.71 0.63 0.00414802 0.00366881 24098 84646 -1 93 2 14 14 7618 3614 2.36211 0.805 -5.14799 -2.36211 -1.39063 -0.695869 547923. 1895.93 0.21 0.32 0.08 -1 -1 0.21 0.00216645 0.00203322 1 9 + timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.02 vpr 64.86 MiB -1 -1 0.13 17428 1 0.02 -1 -1 30016 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66416 3 1 5 6 1 4 5 13 13 169 -1 auto 26.2 MiB 0.03 35 12 3 8 1 64.9 MiB 0.00 0.00 1.12186 -1.54831 -1.12186 1.12186 0.48 2.3262e-05 1.8246e-05 0.000166554 0.000134906 -1 -1 -1 -1 20 58 1 6.63067e+06 53894 235789. 1395.20 0.40 0.00173302 0.00160946 13251 46155 -1 59 1 4 4 2248 1144 1.92085 1.92085 -1.92085 -1.92085 -0.365681 -0.365681 303533. 1796.05 0.09 0.18 0.05 -1 -1 0.09 0.00168955 0.00163685 0 4 + timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/multiclock_output_and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 4.88 vpr 64.75 MiB -1 -1 0.14 17432 1 0.06 -1 -1 32172 -1 -1 2 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66304 6 1 16 17 2 10 9 17 17 289 -1 auto 26.0 MiB 0.03 30 162 45 109 8 64.8 MiB 0.09 0.00 1.4327 -4.13089 -1.4327 0.805 0.92 0.000151459 0.00012099 0.0026464 0.00223102 -1 -1 -1 -1 20 573 2 1.34605e+07 107788 408865. 1414.76 0.67 0.00496297 0.0043779 24098 82150 -1 581 2 13 13 6255 3245 3.57936 0.805 -7.58692 -3.57936 -3.19721 -1.59916 532630. 1843.01 0.22 0.36 0.10 -1 -1 0.22 0.00223048 0.00210515 1 9 + timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/and_latch.v common_--target_utilization_0.01_--two_stage_clock_routing_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_routing_constraints/multi_clock_routing_constraints.xml_--clock_modeling_dedicated_network 3.10 vpr 64.75 MiB -1 -1 0.15 17324 1 0.02 -1 -1 29932 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66308 3 1 5 6 1 4 5 13 13 169 -1 auto 26.0 MiB 0.03 35 12 3 8 1 64.8 MiB 0.00 0.00 1.12186 -1.54831 -1.12186 1.12186 0.46 2.059e-05 1.5632e-05 0.000148678 0.000118416 -1 -1 -1 -1 20 193 1 6.63067e+06 53894 225153. 1332.26 0.49 0.00184377 0.00171779 13251 44463 -1 186 1 4 4 914 327 2.39001 2.39001 -2.39001 -2.39001 -0.984912 -0.984912 292904. 1733.16 0.11 0.20 0.07 -1 -1 0.11 0.00185429 0.00178578 0 4 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_differing_modes/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_differing_modes/config/golden_results.txt index ee111ce8129..b0a1541d4c4 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_differing_modes/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_differing_modes/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -slicem.xml carry_chain.blif common 1.01 vpr 55.52 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 56856 1 -1 48 34 1 35 6 5 5 25 BLK_IG-SLICEM auto 17.1 MiB 0.18 70 85 17 60 8 55.5 MiB 0.01 0.00 0.645672 -5.8162 -0.645672 0.645672 0.00 0.000144263 0.000132656 0.00287964 0.00265788 25 269 16 133321 74067 -1 -1 0.44 0.0717801 0.0582621 1252 5405 -1 304 21 172 172 62949 28904 1.84417 1.84417 -18.3175 -1.84417 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.00658481 0.00563623 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + slicem.xml carry_chain.blif common 1.93 vpr 57.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58880 1 -1 48 34 1 35 6 5 5 25 BLK_IG-SLICEM auto 18.4 MiB 0.26 70 15 2 12 1 57.5 MiB 0.04 0.00 0.645672 -5.8162 -0.645672 0.645672 0.02 0.000258504 0.000238009 0.00107156 0.000998425 -1 -1 -1 -1 25 294 14 133321 74067 -1 -1 0.87 0.0364979 0.0304333 1252 5405 -1 287 14 116 116 21465 12891 1.98076 1.98076 -20.8107 -1.98076 0 0 -1 -1 0.01 0.05 0.01 -1 -1 0.01 0.00555954 0.00497644 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_modes/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_modes/config/golden_results.txt index dbb7b1a05c4..ee663247acc 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_modes/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_routing_modes/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - arch.xml ndff.blif common 0.28 vpr 55.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56796 4 4 10 14 1 10 11 4 4 16 ff_tile io_tile auto 17.2 MiB 0.01 24 55.5 MiB 0.00 0.00 0.248622 -2.00015 -0.248622 0.248622 0.00 1.231e-05 7.868e-06 9.9052e-05 7.4337e-05 4 27 5 59253.6 44440.2 -1 -1 0.01 0.0013541 0.000981513 25 3 13 18 944 358 0.319802 0.319802 -2.61174 -0.319802 0 0 -1 -1 0.00 0.00 0.000283947 0.000241999 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + arch.xml ndff.blif common 0.79 vpr 56.75 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58108 4 4 10 14 1 10 11 4 4 16 ff_tile io_tile auto 17.9 MiB 0.01 31 35 6 27 2 56.7 MiB 0.00 0.00 0.212927 -2.22016 -0.212927 0.212927 0.00 3.8012e-05 2.9599e-05 0.000219444 0.000180809 -1 -1 -1 -1 4 28 4 59253.6 44440.2 -1 -1 0.12 0.00506904 0.00414914 184 632 -1 29 2 13 18 795 367 0.309802 0.309802 -2.85512 -0.309802 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.00167546 0.00160294 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_scale_delay_budgets/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_scale_delay_budgets/config/golden_results.txt index a68414911e5..71d0a37b2c3 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_scale_delay_budgets/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_scale_delay_budgets/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.34 vpr 64.91 MiB -1 -1 0.48 25584 4 0.13 -1 -1 36740 -1 -1 15 11 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66464 11 2 303 283 2 83 28 7 7 49 clb auto 26.5 MiB 0.15 274 64.9 MiB 0.01 0.00 3.97333 0 0 3.83641 0.00 0.000160546 0.000126514 0.00597045 0.00516466 313 112 162 3263 911 1.07788e+06 808410 219490. 4479.39 4 4.11203 3.92602 0 0 -197.842 -1.707 64.9 MiB 0.01 0.0157126 0.0144832 64.9 MiB 0.03 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.29 vpr 66.64 MiB -1 -1 0.68 22960 4 0.18 -1 -1 33204 -1 -1 15 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68244 11 2 303 283 2 81 28 7 7 49 clb auto 27.0 MiB 0.32 332 112 32 50 30 66.6 MiB 0.02 0.00 4.11769 0 0 3.94108 0.00 0.000730069 0.000683064 0.00633623 0.00608273 -1 -1 -1 -1 376 5.01333 137 1.82667 100 150 2999 863 1.07788e+06 808410 219490. 4479.39 3 5100 32136 -1 4.1682 4.01568 0 0 -197.816 -1.707 0.04 -1 -1 66.6 MiB 0.02 0.0267422 0.0255335 66.6 MiB -1 0.04 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sdc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sdc/config/golden_results.txt index b9704023605..b4860612047 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sdc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sdc/config/golden_results.txt @@ -1,7 +1,7 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/A.sdc 0.26 vpr 63.03 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64544 5 3 11 14 2 9 10 4 4 16 clb auto 24.7 MiB 0.00 22 30 9 14 7 63.0 MiB 0.00 0.00 0.814339 -2.77068 -0.814339 0.571 0.01 3.21e-05 2.4325e-05 0.000202798 0.000163594 -1 -1 -1 -1 8 18 2 107788 107788 4794.78 299.674 0.01 0.00183578 0.00170245 564 862 -1 18 4 10 10 199 87 0.757297 0.571 -2.63894 -0.757297 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00182289 0.00172861 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/B.sdc 0.26 vpr 62.89 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64400 5 3 11 14 2 9 10 4 4 16 clb auto 24.4 MiB 0.00 23 30 5 16 9 62.9 MiB 0.00 0.00 0.571 0 0 0.571 0.01 2.7071e-05 2.112e-05 0.000180878 0.000149129 -1 -1 -1 -1 8 27 3 107788 107788 4794.78 299.674 0.01 0.00188235 0.00175706 564 862 -1 25 5 14 14 430 265 0.571 0.571 0 0 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00179432 0.00170513 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/C.sdc 0.26 vpr 62.85 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64360 5 3 11 14 2 9 10 4 4 16 clb auto 24.5 MiB 0.00 20 30 10 18 2 62.9 MiB 0.00 0.00 0.645658 -2.18842 -0.645658 0.571 0.01 3.7729e-05 2.5928e-05 0.000260113 0.000177741 -1 -1 -1 -1 8 17 3 107788 107788 4794.78 299.674 0.01 0.00195031 0.00174505 564 862 -1 14 5 15 15 285 110 0.571526 0.571 -1.89284 -0.571526 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00183013 0.00171342 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/D.sdc 0.26 vpr 62.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64484 5 3 11 14 2 9 10 4 4 16 clb auto 24.5 MiB 0.00 20 30 11 18 1 63.0 MiB 0.00 0.00 1.64534 -5.31677 -1.64534 0.571 0.01 3.8442e-05 2.5618e-05 0.00023637 0.000176478 -1 -1 -1 -1 8 17 8 107788 107788 4794.78 299.674 0.01 0.00229296 0.00202345 564 862 -1 15 8 21 21 324 150 1.57153 0.571 -4.91875 -1.57153 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00192818 0.00176248 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/E.sdc 0.26 vpr 62.90 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64408 5 3 11 14 2 9 10 4 4 16 clb auto 24.4 MiB 0.01 20 30 8 18 4 62.9 MiB 0.00 0.00 1.44871 -2.90839 -1.44871 0.571 0.01 4.1447e-05 3.1048e-05 0.000250166 0.000200113 -1 -1 -1 -1 8 33 10 107788 107788 4794.78 299.674 0.01 0.0023527 0.00209277 564 862 -1 19 2 11 11 275 141 1.39454 0.571 -2.72425 -1.39454 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00169051 0.00161308 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/F.sdc 0.25 vpr 62.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:43:23 fv-az801-114 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64488 5 3 11 14 2 9 10 4 4 16 clb auto 24.5 MiB 0.00 21 100 23 56 21 63.0 MiB 0.00 0.00 0.145339 0 0 0.571 0.01 3.0426e-05 2.4245e-05 0.000455896 0.00036643 -1 -1 -1 -1 8 22 3 107788 107788 4794.78 299.674 0.01 0.00222626 0.00202944 564 862 -1 36 2 9 9 213 106 0.0724097 0.571 0 0 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00168704 0.00161249 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/A.sdc 0.62 vpr 62.88 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64392 5 3 11 14 2 9 10 4 4 16 clb auto 24.2 MiB 0.01 22 30 9 14 7 62.9 MiB 0.01 0.00 0.814339 -2.77068 -0.814339 0.571 0.01 3.5189e-05 2.7933e-05 0.00027775 0.00023103 -1 -1 -1 -1 8 18 2 107788 107788 4794.78 299.674 0.02 0.00211257 0.00195587 564 862 -1 18 4 10 10 199 87 0.757297 0.571 -2.63894 -0.757297 0 0 5401.54 337.596 0.01 0.05 0.00 -1 -1 0.01 0.00199426 0.00185344 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/B.sdc 0.74 vpr 62.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64480 5 3 11 14 2 9 10 4 4 16 clb auto 24.2 MiB 0.01 23 30 6 15 9 63.0 MiB 0.00 0.00 0.571 0 0 0.571 0.01 2.8611e-05 2.2607e-05 0.000202208 0.00017077 -1 -1 -1 -1 8 26 3 107788 107788 4794.78 299.674 0.01 0.0028111 0.00267833 564 862 -1 25 5 13 13 435 272 0.571 0.571 0 0 0 0 5401.54 337.596 0.00 0.05 0.01 -1 -1 0.00 0.00202607 0.00188727 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/C.sdc 0.80 vpr 63.17 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64684 5 3 11 14 2 9 10 4 4 16 clb auto 24.5 MiB 0.05 20 30 10 18 2 63.2 MiB 0.01 0.00 0.645658 -2.18842 -0.645658 0.571 0.02 4.2927e-05 3.0224e-05 0.000271182 0.000205133 -1 -1 -1 -1 8 17 3 107788 107788 4794.78 299.674 0.01 0.00218974 0.00197452 564 862 -1 14 5 15 15 285 110 0.571526 0.571 -1.89284 -0.571526 0 0 5401.54 337.596 0.00 0.02 0.00 -1 -1 0.00 0.00202523 0.00186469 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/D.sdc 0.73 vpr 62.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64348 5 3 11 14 2 9 10 4 4 16 clb auto 24.1 MiB 0.04 20 30 12 17 1 62.8 MiB 0.05 0.00 1.64534 -5.31677 -1.64534 0.571 0.02 9.4962e-05 7.3986e-05 0.000396852 0.000314184 -1 -1 -1 -1 8 19 8 107788 107788 4794.78 299.674 0.06 0.00289715 0.00253727 564 862 -1 15 2 8 8 156 74 1.57153 0.571 -4.92067 -1.57153 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00169004 0.00159575 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/E.sdc 1.04 vpr 62.90 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64408 5 3 11 14 2 9 10 4 4 16 clb auto 24.1 MiB 0.04 20 30 8 18 4 62.9 MiB 0.05 0.00 1.44871 -2.90839 -1.44871 0.571 0.02 7.5837e-05 6.5211e-05 0.000364341 0.000304084 -1 -1 -1 -1 8 33 10 107788 107788 4794.78 299.674 0.16 0.00341365 0.00298684 564 862 -1 19 2 11 11 275 141 1.39454 0.571 -2.72425 -1.39454 0 0 5401.54 337.596 0.00 0.03 0.00 -1 -1 0.00 0.00194921 0.0018382 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/F.sdc 0.93 vpr 62.91 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64424 5 3 11 14 2 9 10 4 4 16 clb auto 24.2 MiB 0.02 20 110 34 46 30 62.9 MiB 0.08 0.00 0.145339 0 0 0.571 0.04 5.4987e-05 4.5804e-05 0.00111315 0.000934972 -1 -1 -1 -1 8 25 4 107788 107788 4794.78 299.674 0.02 0.00324582 0.00292657 564 862 -1 36 5 15 15 690 511 0.0724097 0.571 0 0 0 0 5401.54 337.596 0.00 0.05 0.00 -1 -1 0.00 0.0020967 0.00194205 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_soft_multipliers/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_soft_multipliers/config/golden_results.txt index b7f2a2955a3..98fbf8c8bd7 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_soft_multipliers/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_soft_multipliers/config/golden_results.txt @@ -1,7 +1,7 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_4x4.v common 1.50 vpr 61.94 MiB -1 -1 0.09 17516 1 0.02 -1 -1 30028 -1 -1 3 9 0 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63428 9 8 75 70 1 34 20 5 5 25 clb auto 23.3 MiB 0.50 88 74 35 39 0 61.9 MiB 0.01 0.00 2.64007 -29.3871 -2.64007 2.64007 0.02 0.000193184 0.000179032 0.00152567 0.00145934 38 209 14 151211 75605.7 48493.3 1939.73 0.19 0.0481005 0.0395297 2100 8065 -1 140 7 94 107 3384 1658 2.87707 2.87707 -33.0324 -2.87707 0 0 61632.8 2465.31 0.00 0.01 0.01 -1 -1 0.00 0.00552764 0.00502737 13 18 -1 -1 -1 -1 -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_5x5.v common 3.42 vpr 62.11 MiB -1 -1 0.14 17680 1 0.02 -1 -1 30212 -1 -1 2 11 0 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63604 11 10 108 97 1 49 23 4 4 16 clb auto 23.6 MiB 2.30 116 151 53 75 23 62.1 MiB 0.01 0.00 3.45122 -42.8784 -3.45122 3.45122 0.01 0.000258737 0.000240187 0.00257917 0.00245554 36 251 31 50403.8 50403.8 22423.4 1401.47 0.20 0.0729551 0.060517 1036 3262 -1 161 14 154 170 4989 2978 3.92522 3.92522 -48.6612 -3.92522 0 0 28178.5 1761.16 0.00 0.02 0.00 -1 -1 0.00 0.00971238 0.00859034 15 27 -1 -1 -1 -1 -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_6x6.v common 5.46 vpr 62.34 MiB -1 -1 0.16 17804 1 0.02 -1 -1 30060 -1 -1 6 13 0 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 63836 13 12 149 129 1 69 31 5 5 25 clb auto 23.7 MiB 4.14 173 847 227 595 25 62.3 MiB 0.02 0.00 3.49758 -52.4024 -3.49758 3.49758 0.02 0.00033925 0.000315509 0.00778096 0.00731691 46 367 29 151211 151211 57775.2 2311.01 0.32 0.113445 0.0949541 2220 9391 -1 257 11 244 295 9674 4548 3.49231 3.49231 -56.1098 -3.49231 0 0 73020.3 2920.81 0.01 0.02 0.01 -1 -1 0.01 0.0112246 0.0100608 24 38 -1 -1 -1 -1 -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_7x7.v common 3.39 vpr 62.64 MiB -1 -1 0.14 17680 1 0.03 -1 -1 30188 -1 -1 6 15 0 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64144 15 14 196 165 1 94 35 5 5 25 clb auto 24.2 MiB 2.06 280 1973 437 1489 47 62.6 MiB 0.03 0.00 3.87456 -65.034 -3.87456 3.87456 0.02 0.000423915 0.000393946 0.0170551 0.0159481 46 568 26 151211 151211 57775.2 2311.01 0.36 0.128482 0.109181 2220 9391 -1 433 18 426 716 22285 10128 3.95872 3.95872 -74.6819 -3.95872 0 0 73020.3 2920.81 0.01 0.03 0.01 -1 -1 0.01 0.0185495 0.0164357 37 51 -1 -1 -1 -1 -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_8x8.v common 5.04 vpr 62.52 MiB -1 -1 0.17 17892 1 0.03 -1 -1 30308 -1 -1 5 17 0 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64024 17 16 251 206 1 124 38 5 5 25 clb auto 24.1 MiB 3.49 388 983 335 639 9 62.5 MiB 0.02 0.00 3.97994 -77.3306 -3.97994 3.97994 0.02 0.000533426 0.000495609 0.0112804 0.0106247 48 694 38 151211 126010 59785.0 2391.40 0.46 0.167348 0.141322 2244 9614 -1 509 21 641 958 28775 13054 4.74452 4.74452 -87.1934 -4.74452 0 0 75076.4 3003.05 0.01 0.04 0.01 -1 -1 0.01 0.0251856 0.022136 47 66 -1 -1 -1 -1 -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_9x9.v common 5.61 vpr 62.80 MiB -1 -1 0.13 17948 1 0.03 -1 -1 30364 -1 -1 7 19 0 -1 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64304 19 18 308 249 1 142 44 6 6 36 clb auto 24.4 MiB 3.78 448 1507 414 1087 6 62.8 MiB 0.03 0.00 4.8135 -97.4436 -4.8135 4.8135 0.05 0.000626375 0.000581574 0.0158934 0.014926 50 888 22 403230 176413 107229. 2978.57 0.66 0.195576 0.166921 3946 19047 -1 788 17 763 1295 51979 19940 5.45496 5.45496 -117.79 -5.45496 0 0 134937. 3748.26 0.01 0.05 0.02 -1 -1 0.01 0.0259613 0.0231126 55 83 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_4x4.v common 3.08 vpr 63.73 MiB -1 -1 0.13 17836 1 0.04 -1 -1 30188 -1 -1 3 9 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65260 9 8 75 70 1 34 20 5 5 25 clb auto 24.3 MiB 0.77 86 452 135 313 4 63.7 MiB 0.06 0.00 2.64007 -28.8002 -2.64007 2.64007 0.04 0.000176675 0.000162569 0.00460188 0.00429403 -1 -1 -1 -1 26 211 21 151211 75605.7 37105.9 1484.24 0.81 0.0541272 0.0457299 1908 5841 -1 127 12 86 111 2724 1535 2.42625 2.42625 -30.8606 -2.42625 0 0 45067.1 1802.68 0.01 0.05 0.01 -1 -1 0.01 0.00806965 0.00737112 13 18 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_5x5.v common 4.46 vpr 63.92 MiB -1 -1 0.11 17900 1 0.03 -1 -1 30160 -1 -1 2 11 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65452 11 10 108 97 1 49 23 4 4 16 clb auto 24.7 MiB 2.73 138 87 33 42 12 63.9 MiB 0.01 0.00 3.45122 -43.3524 -3.45122 3.45122 0.01 0.000201429 0.000183002 0.00257604 0.00248464 -1 -1 -1 -1 34 217 45 50403.8 50403.8 21558.4 1347.40 0.20 0.0492626 0.0420827 1020 3049 -1 176 15 182 199 5640 3466 3.92522 3.92522 -51.7346 -3.92522 0 0 26343.3 1646.46 0.01 0.15 0.00 -1 -1 0.01 0.0136853 0.0123259 15 27 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_6x6.v common 8.63 vpr 64.31 MiB -1 -1 0.14 17828 1 0.03 -1 -1 30240 -1 -1 7 13 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65856 13 12 149 129 1 68 32 6 6 36 clb auto 24.9 MiB 5.01 198 932 296 626 10 64.3 MiB 0.07 0.00 3.49758 -52.5769 -3.49758 3.49758 0.05 0.000575762 0.000545987 0.00855835 0.00805083 -1 -1 -1 -1 40 371 22 403230 176413 88484.8 2457.91 1.86 0.1398 0.120669 3734 16003 -1 302 13 290 358 12780 5849 3.44595 3.44595 -57.0613 -3.44595 0 0 110337. 3064.92 0.03 0.04 0.02 -1 -1 0.03 0.0197264 0.0176 25 38 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_7x7.v common 6.05 vpr 64.62 MiB -1 -1 0.14 18180 1 0.03 -1 -1 30148 -1 -1 7 15 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66176 15 14 196 165 1 92 36 6 6 36 clb auto 24.8 MiB 2.57 301 980 184 766 30 64.6 MiB 0.04 0.00 3.62628 -64.321 -3.62628 3.62628 0.05 0.000340747 0.000313302 0.00984916 0.00930715 -1 -1 -1 -1 52 612 36 403230 176413 110337. 3064.92 1.44 0.161491 0.139542 4014 20275 -1 519 17 441 623 24147 10156 4.0567 4.0567 -75.6699 -4.0567 0 0 143382. 3982.83 0.04 0.21 0.02 -1 -1 0.04 0.022191 0.0203236 37 51 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_8x8.v common 9.18 vpr 64.91 MiB -1 -1 0.13 18156 1 0.03 -1 -1 30520 -1 -1 5 17 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66468 17 16 251 206 1 119 38 5 5 25 clb auto 25.1 MiB 6.50 399 2117 534 1560 23 64.9 MiB 0.09 0.00 4.01364 -77.6621 -4.01364 4.01364 0.03 0.000417359 0.000385331 0.0217452 0.020383 -1 -1 -1 -1 46 659 28 151211 126010 57775.2 2311.01 0.98 0.133566 0.118166 2220 9391 -1 557 21 689 1063 30471 14107 5.4787 5.4787 -101.9 -5.4787 0 0 73020.3 2920.81 0.01 0.10 0.01 -1 -1 0.01 0.0322818 0.0292918 44 66 -1 -1 -1 -1 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_9x9.v common 8.82 vpr 65.02 MiB -1 -1 0.16 18400 1 0.04 -1 -1 30676 -1 -1 6 19 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66576 19 18 308 249 1 133 43 5 5 25 clb auto 25.4 MiB 5.91 453 1993 498 1475 20 65.0 MiB 0.14 0.00 4.85986 -99.1517 -4.85986 4.85986 0.04 0.000524482 0.000482714 0.0388578 0.0376049 -1 -1 -1 -1 48 705 25 151211 151211 59785.0 2391.40 0.96 0.168776 0.152151 2244 9614 -1 614 16 592 999 32515 15691 4.9757 4.9757 -106.674 -4.9757 0 0 75076.4 3003.05 0.01 0.17 0.01 -1 -1 0.01 0.0312715 0.028896 53 83 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles/config/golden_results.txt index 0c45267727f..b2a92d253ed 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - sub_tiles.xml sub_tiles.blif common 7.46 vpr 55.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56784 6 7 19 26 0 19 26 3 3 9 -1 auto 16.6 MiB 0.01 38 55.5 MiB 0.00 0.00 3.87729 -27.141 -3.87729 nan 6.47 1.1318e-05 7.769e-06 7.1954e-05 5.2025e-05 6 19 3 14813.4 192574 -1 -1 0.07 0.000302216 0.000211664 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.000138435 0.000108924 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + sub_tiles.xml sub_tiles.blif common 7.44 vpr 56.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57804 6 7 19 26 0 19 26 3 3 9 -1 auto 17.7 MiB 0.04 51 216 43 63 110 56.4 MiB 0.19 0.01 3.682 -25.774 -3.682 nan 5.70 9.9275e-05 8.7239e-05 0.00080976 0.000700914 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.17 0.00664803 0.00634555 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.01 0.05 0.04 -1 -1 0.01 0.00241331 0.00228144 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles_directs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles_directs/config/golden_results.txt index 495e79e3e2c..7566db0b692 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles_directs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sub_tiles_directs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - heterogeneous_tile.xml sub_tile_directs.blif common 0.22 vpr 55.42 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 56748 2 2 4 5 0 4 5 3 3 9 -1 auto 16.8 MiB 0.00 8 55.4 MiB 0.00 0.00 2.02889 -4.05778 -2.02889 nan 0.01 7.584e-06 4.553e-06 4.6815e-05 3.0395e-05 3 8 2 0 0 -1 -1 0.00 0.000211133 0.000137791 8 2 5 5 258 212 2.09013 nan -4.05732 -2.09013 0 0 -1 -1 0.00 0.00 7.4782e-05 5.2273e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + heterogeneous_tile.xml sub_tile_directs.blif common 0.62 vpr 56.41 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57764 2 2 4 5 0 4 5 3 3 9 -1 auto 17.7 MiB 0.04 8 12 0 0 12 56.4 MiB 0.03 0.00 1.899 -3.798 -1.899 nan 0.03 2.0146e-05 1.5134e-05 0.000136441 0.000104751 -1 -1 -1 -1 3 8 1 0 0 -1 -1 0.06 0.00289731 0.0027087 132 326 -1 8 1 4 4 200 164 2.09013 nan -4.05732 -2.09013 0 0 -1 -1 0.00 0.00 0.00 -1 -1 0.00 0.00137522 0.00133686 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sweep_constant_outputs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sweep_constant_outputs/config/golden_results.txt index b5954039019..df06df92e99 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sweep_constant_outputs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_sweep_constant_outputs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml ch_intrinsics.v common 1.69 vpr 62.93 MiB -1 -1 0.24 22092 3 0.07 -1 -1 36748 -1 -1 17 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64436 99 73 291 364 1 178 190 8 8 64 io memory auto 24.3 MiB 0.08 562 62.9 MiB 0.06 0.00 1.62355 -111.333 -1.62355 1.62355 0.09 0.000326387 0.000284469 0.0118933 0.0104324 46 1386 13 2.23746e+06 1.4642e+06 144579. 2259.05 0.36 0.127156 0.118738 929 10 587 838 52635 15926 1.90524 1.90524 -132.49 -1.90524 -0.118254 -0.10383 184668. 2885.44 0.04 0.02 0.0123857 0.0116361 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml ch_intrinsics.v common 4.39 vpr 64.02 MiB -1 -1 0.45 18932 3 0.10 -1 -1 33272 -1 -1 19 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65552 99 73 292 365 1 173 192 8 8 64 io memory auto 24.8 MiB 0.19 683 14570 2226 10547 1797 64.0 MiB 0.07 0.00 2.10913 -115.89 -2.10913 2.10913 0.14 0.000747466 0.000694634 0.0201045 0.0187259 -1 -1 -1 -1 32 1229 14 2.23746e+06 1.57199e+06 106908. 1670.44 2.05 0.296954 0.265952 4378 18911 -1 1110 9 491 754 35474 12126 1.99714 1.99714 -132.662 -1.99714 -0.34191 -0.0876569 130676. 2041.82 0.05 0.13 0.03 -1 -1 0.05 0.027581 0.0256138 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt index 3a406d5970c..9ce2a117a77 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_target_pin_util/config/golden_results.txt @@ -1,14 +1,14 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -EArch.xml styr.blif common_--target_ext_pin_util_1 1.22 vpr 64.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65800 10 10 168 178 1 73 31 6 6 36 clb auto 25.7 MiB 0.14 407 463 89 357 17 64.3 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000635562 0.000587698 0.00980998 0.00922481 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.42 0.143103 0.121539 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0295304 0.0261483 -EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.36 vpr 64.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65684 10 10 168 178 1 73 31 6 6 36 clb auto 25.5 MiB 0.12 407 463 89 357 17 64.1 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000630926 0.000582868 0.00981682 0.00922691 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.199297 0.168347 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0297651 0.0264108 -EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 3.77 vpr 64.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66168 10 10 168 178 1 162 111 14 14 196 clb auto 25.8 MiB 0.83 1425 5963 761 4903 299 64.6 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.41 0.000628333 0.000580338 0.0171828 0.0159216 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 384449. 1961.47 1.29 0.0929065 0.0799229 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.09 0.06 0.06 -1 -1 0.09 0.0204062 0.0180589 -EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.26 vpr 64.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65752 10 10 168 178 1 75 33 7 7 49 clb auto 25.7 MiB 0.17 406 657 105 529 23 64.2 MiB 0.02 0.00 2.37613 -26.9385 -2.37613 2.37613 0.06 0.000635754 0.000588385 0.0117044 0.0109781 -1 -1 -1 -1 26 1250 31 1.07788e+06 700622 75813.7 1547.22 0.30 0.101986 0.0876865 3816 13734 -1 911 16 447 1582 77100 25463 2.91114 2.91114 -35.9881 -2.91114 0 0 91376.6 1864.83 0.02 0.05 0.01 -1 -1 0.02 0.0271559 0.0242615 -EArch.xml styr.blif common_--target_ext_pin_util_0.0 3.71 vpr 64.85 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66408 10 10 168 178 1 163 124 14 14 196 clb auto 26.0 MiB 0.97 1418 6922 992 5687 243 64.9 MiB 0.05 0.00 3.05445 -36.9858 -3.05445 3.05445 0.42 0.000635632 0.000586828 0.0170342 0.0157603 -1 -1 -1 -1 24 2880 12 9.20055e+06 5.60498e+06 355930. 1815.97 1.01 0.0998456 0.0858149 18592 71249 -1 2826 12 527 2385 139582 29980 3.66329 3.66329 -43.9798 -3.66329 0 0 449262. 2292.15 0.11 0.05 0.07 -1 -1 0.11 0.0202055 0.0179411 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.33 vpr 64.17 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65708 10 10 168 178 1 73 31 6 6 36 clb auto 25.6 MiB 0.14 407 463 89 357 17 64.2 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000637222 0.000589815 0.00986031 0.00927104 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.54 0.202892 0.171821 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.03 0.01 -1 -1 0.01 0.0188685 0.0172348 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.41 vpr 64.06 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65600 10 10 168 178 1 73 31 6 6 36 clb auto 25.5 MiB 0.16 407 463 89 357 17 64.1 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000644635 0.000597098 0.0102053 0.0096131 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.20199 0.170925 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0296093 0.026251 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 3.94 vpr 64.81 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66364 10 10 168 178 1 162 111 14 14 196 clb auto 26.0 MiB 0.88 1425 5963 761 4903 299 64.8 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.42 0.00065084 0.000601408 0.0175552 0.0162626 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 384449. 1961.47 1.31 0.0953188 0.0822017 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.10 0.06 0.06 -1 -1 0.10 0.0213208 0.0188927 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.36 vpr 63.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65308 10 10 168 178 1 73 31 6 6 36 clb auto 25.2 MiB 0.13 407 463 89 357 17 63.8 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000634693 0.000587229 0.00982727 0.00924077 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.200884 0.169805 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0297589 0.0264115 -EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.17 vpr 25.53 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26140 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 23.4 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.17 vpr 25.86 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26476 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.16 vpr 26.09 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26712 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.15 vpr 25.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:12:21 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 26400 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 24.3 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + EArch.xml styr.blif common_--target_ext_pin_util_1 3.33 vpr 66.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67708 10 10 168 178 1 73 31 6 6 36 clb auto 26.5 MiB 0.25 396 511 91 400 20 66.1 MiB 0.09 0.00 2.39024 -27.2311 -2.39024 2.39024 0.06 0.000971201 0.000900811 0.0143984 0.0134813 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 1.65 0.234894 0.204034 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.17 0.01 -1 -1 0.01 0.0431247 0.0391487 + EArch.xml styr.blif common_--target_ext_pin_util_0.7 3.34 vpr 66.22 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67808 10 10 168 178 1 73 31 6 6 36 clb auto 26.6 MiB 0.22 396 511 91 400 20 66.2 MiB 0.08 0.00 2.39024 -27.2311 -2.39024 2.39024 0.06 0.00063912 0.000574742 0.0133256 0.0125205 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 1.99 0.279091 0.24285 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.08 0.01 -1 -1 0.01 0.0417208 0.0376776 + EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 6.02 vpr 66.53 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68128 10 10 168 178 1 162 111 14 14 196 clb auto 26.8 MiB 0.95 1456 5963 865 4880 218 66.5 MiB 0.13 0.00 3.05524 -37.9348 -3.05524 3.05524 0.59 0.000646566 0.000596261 0.02071 0.019112 -1 -1 -1 -1 26 2865 15 9.20055e+06 4.90435e+06 387483. 1976.95 2.42 0.211695 0.185383 18784 74779 -1 2696 13 472 1947 107713 24081 3.50167 3.50167 -42.0838 -3.50167 0 0 467681. 2386.13 0.16 0.11 0.07 -1 -1 0.16 0.0279753 0.0255829 + EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 2.84 vpr 66.18 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67764 10 10 168 178 1 75 33 7 7 49 clb auto 26.6 MiB 0.23 404 813 125 661 27 66.2 MiB 0.10 0.00 2.45517 -27.3027 -2.45517 2.45517 0.09 0.000647339 0.000599538 0.0197487 0.0185137 -1 -1 -1 -1 26 1116 28 1.07788e+06 700622 75813.7 1547.22 1.14 0.148701 0.13165 3816 13734 -1 925 18 487 1699 71725 25249 2.97305 2.97305 -35.2593 -2.97305 0 0 91376.6 1864.83 0.02 0.24 0.01 -1 -1 0.02 0.0460889 0.0423163 + EArch.xml styr.blif common_--target_ext_pin_util_0.0 5.34 vpr 66.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68236 10 10 168 178 1 163 124 14 14 196 clb auto 26.9 MiB 1.00 1516 7540 1142 6103 295 66.6 MiB 0.21 0.00 3.06133 -37.7953 -3.06133 3.06133 0.60 0.000630456 0.00057306 0.0281512 0.0261658 -1 -1 -1 -1 20 2911 18 9.20055e+06 5.60498e+06 295730. 1508.82 1.60 0.106074 0.094968 18004 60473 -1 2874 12 603 2265 131794 29163 3.74152 3.74152 -44.1586 -3.74152 0 0 387483. 1976.95 0.14 0.17 0.06 -1 -1 0.14 0.0262615 0.0240198 + EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 3.16 vpr 66.17 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67760 10 10 168 178 1 73 31 6 6 36 clb auto 26.5 MiB 0.20 396 511 91 400 20 66.2 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.05 0.000653728 0.000608322 0.012902 0.0121572 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 1.78 0.26636 0.230807 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.17 0.01 -1 -1 0.01 0.0463537 0.0422043 + EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 3.43 vpr 66.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67944 10 10 168 178 1 73 31 6 6 36 clb auto 26.8 MiB 0.22 396 511 91 400 20 66.4 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.04 0.000508161 0.000456687 0.0109247 0.0102847 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 1.85 0.27407 0.239119 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.27 0.01 -1 -1 0.01 0.0493788 0.0449139 + EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 6.33 vpr 66.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68212 10 10 168 178 1 162 111 14 14 196 clb auto 26.8 MiB 0.96 1456 5963 865 4880 218 66.6 MiB 0.14 0.00 3.05524 -37.9348 -3.05524 3.05524 0.62 0.000637905 0.00057522 0.0218552 0.0201449 -1 -1 -1 -1 26 2865 15 9.20055e+06 4.90435e+06 387483. 1976.95 2.71 0.215189 0.189178 18784 74779 -1 2696 13 472 1947 107713 24081 3.50167 3.50167 -42.0838 -3.50167 0 0 467681. 2386.13 0.18 0.11 0.06 -1 -1 0.18 0.0286783 0.0262735 + EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 3.51 vpr 66.18 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67772 10 10 168 178 1 73 31 6 6 36 clb auto 26.5 MiB 0.24 396 511 91 400 20 66.2 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.05 0.000503086 0.00045843 0.00994809 0.00934025 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 1.86 0.256569 0.222631 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.28 0.01 -1 -1 0.01 0.0490284 0.0446 + EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.19 vpr 27.92 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28592 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.6 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.19 vpr 27.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28608 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.5 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.13 vpr 27.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28604 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.6 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.26 vpr 28.03 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28700 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.6 MiB 0.01 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/golden_results.txt index 833c4df40e1..070dd53f47f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml bigkey.blif common_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/bigkey_tight.xml 7.06 vpr 72.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 149 229 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 74736 229 197 2152 2349 1 1011 575 16 16 256 io auto 35.6 MiB 2.58 8243 73.0 MiB 1.15 0.02 2.69979 -598.935 -2.69979 2.69979 0.04 0.00335255 0.00286435 0.318486 0.278508 -1 11385 11 1.05632e+07 8.03021e+06 4.24953e+06 16599.7 0.22 0.468953 0.419533 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml bigkey.blif common_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/bigkey_tight.xml 9.14 vpr 72.92 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 150 229 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 74668 229 197 2152 2349 1 1013 576 16 16 256 io auto 33.4 MiB 3.18 8848 180201 52690 111830 15681 72.9 MiB 1.51 0.02 2.99388 -664.24 -2.99388 2.99388 0.00 0.00626795 0.00568046 0.542629 0.481854 -1 -1 -1 -1 -1 11423 9 1.05632e+07 8.0841e+06 4.24953e+06 16599.7 0.27 0.752915 0.676781 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt index a5312f38fc9..e837cb2407d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 2.72 vpr 63.91 MiB -1 -1 0.18 18244 3 0.15 -1 -1 33476 -1 -1 68 99 1 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 65444 99 130 343 473 1 225 298 12 12 144 clb auto 25.5 MiB 0.10 599 63.9 MiB 0.15 0.00 1.62851 -108.153 -1.62851 1.62851 0.22 0.0005716 0.000537284 0.0435 0.0407889 36 1445 27 5.66058e+06 4.21279e+06 305235. 2119.69 0.98 0.22339 0.203215 12238 58442 -1 1263 12 429 686 37045 11418 0 0 37045 11418 686 536 0 0 1992 1802 0 0 2359 1992 0 0 742 603 0 0 15126 3546 0 0 16140 2939 0 0 686 0 0 257 388 336 2661 0 0 1.99752 1.99752 -139.829 -1.99752 -0.305022 -0.0771249 378970. 2631.74 0.08 0.03 0.04 -1 -1 0.08 0.0189281 0.0175612 -k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_--router_algorithm_parallel_--num_workers_4 2.26 vpr 64.16 MiB -1 -1 0.19 18428 3 0.15 -1 -1 33484 -1 -1 68 99 1 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 65700 99 130 343 473 1 225 298 12 12 144 clb auto 25.6 MiB 0.10 599 64.2 MiB 0.15 0.00 1.62851 -108.153 -1.62851 1.62851 0.22 0.000550016 0.000510375 0.0416236 0.0381932 36 1454 19 5.66058e+06 4.21279e+06 305235. 2119.69 0.52 0.126906 0.113733 12238 58442 -1 1272 12 419 668 36954 11455 0 0 36954 11455 668 526 0 0 2004 1826 0 0 2365 2004 0 0 724 593 0 0 15013 3573 0 0 16180 2933 0 0 668 0 0 249 384 322 2589 0 0 1.99231 1.99231 -140.914 -1.99231 -0.305022 -0.0771249 378970. 2631.74 0.08 0.03 0.04 -1 -1 0.08 0.0174112 0.0155977 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 6.33 vpr 65.84 MiB -1 -1 0.42 18744 3 0.10 -1 -1 33376 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67424 99 130 344 474 1 227 298 12 12 144 clb auto 26.1 MiB 0.24 717 72933 22876 34411 15646 65.8 MiB 0.50 0.01 1.84343 -118.171 -1.84343 1.84343 0.34 0.000999398 0.000934504 0.0982577 0.092362 -1 -1 -1 -1 38 1540 14 5.66058e+06 4.21279e+06 319130. 2216.18 2.76 0.374935 0.344885 12522 62564 -1 1261 9 399 607 24533 7188 1.90841 1.90841 -134.095 -1.90841 -1.28606 -0.31945 406292. 2821.48 0.14 0.13 0.07 -1 -1 0.14 0.0314453 0.0295015 + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_--router_algorithm_parallel_--num_workers_4 6.28 vpr 65.81 MiB -1 -1 0.35 18932 3 0.11 -1 -1 33264 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67392 99 130 344 474 1 227 298 12 12 144 clb auto 26.0 MiB 0.23 717 72933 22876 34411 15646 65.8 MiB 0.47 0.00 1.84343 -118.171 -1.84343 1.84343 0.37 0.000579812 0.000531042 0.0759736 0.0701905 -1 -1 -1 -1 38 1540 14 5.66058e+06 4.21279e+06 319130. 2216.18 2.68 0.230578 0.208922 12522 62564 -1 1261 9 399 607 24533 7188 1.90841 1.90841 -134.095 -1.90841 -1.28606 -0.31945 406292. 2821.48 0.13 0.14 0.07 -1 -1 0.13 0.0211432 0.0195748 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_fail/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_fail/config/golden_results.txt index 7c008959c3a..0caf65de4b1 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_fail/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_fail/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/impossible_pass_timing.sdc 2.44 vpr 64.36 MiB -1 -1 0.21 22020 3 0.06 -1 -1 36596 -1 -1 68 99 1 0 exited with return code 1 v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 65904 99 130 343 473 1 231 298 12 12 144 clb auto 25.9 MiB 0.13 551 64.4 MiB 0.13 0.00 1.62851 -64.9717 -1.62851 1.62851 0.26 0.000181149 0.000144317 0.013716 0.011017 40 1365 11 5.66058e+06 4.21279e+06 333335. 2314.82 1.12 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/impossible_pass_timing.sdc 6.52 vpr 66.06 MiB -1 -1 0.44 19044 3 0.11 -1 -1 33268 -1 -1 68 99 1 0 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67644 99 130 344 474 1 225 298 12 12 144 clb auto 26.2 MiB 0.22 734 75918 23628 39360 12930 66.1 MiB 0.49 0.01 1.84343 -75.0087 -1.84343 1.84343 0.33 0.000857681 0.000789515 0.0812026 0.0751694 -1 -1 -1 -1 36 1518 6 5.66058e+06 4.21279e+06 305235. 2119.69 3.85 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_no_fail/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_no_fail/config/golden_results.txt index 2b13903987c..120a1a483e0 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_no_fail/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_no_fail/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/easy_pass_timing.sdc 2.59 vpr 63.91 MiB -1 -1 0.20 22056 3 0.06 -1 -1 36676 -1 -1 68 99 1 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 65444 99 130 343 473 1 221 298 12 12 144 clb auto 25.9 MiB 0.11 548 63.9 MiB 0.12 0.00 1.86083 0 0 1.86083 0.26 0.000138757 0.00010733 0.0119604 0.0096173 36 1444 8 5.66058e+06 4.21279e+06 305235. 2119.69 0.99 0.0674892 0.0553703 1244 6 292 407 20379 6218 2.02544 2.02544 0 0 0 0 378970. 2631.74 0.10 0.01 0.00611756 0.00569055 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/easy_pass_timing.sdc 6.29 vpr 65.84 MiB -1 -1 0.44 18932 3 0.10 -1 -1 33272 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67416 99 130 344 474 1 218 298 12 12 144 clb auto 26.1 MiB 0.29 706 75918 21357 39248 15313 65.8 MiB 0.45 0.00 2.17824 0 0 2.17824 0.39 0.000858537 0.000799712 0.0715997 0.0663405 -1 -1 -1 -1 38 1473 11 5.66058e+06 4.21279e+06 319130. 2216.18 2.60 0.302049 0.26108 12522 62564 -1 1300 5 274 392 20827 6674 2.27647 2.27647 0 0 0 0 406292. 2821.48 0.14 0.10 0.06 -1 -1 0.14 0.0177896 0.0166081 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_report_detail/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_report_detail/config/golden_results.txt index 7215e53a674..2d3ef814bc3 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_report_detail/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_report_detail/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_netlist 0.32 vpr 62.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 63752 5 3 11 14 2 9 10 4 4 16 clb auto 23.5 MiB 0.01 16 62.3 MiB 0.00 0.00 0.545 -3.1332 -0.545 0.545 0.01 1.7592e-05 1.0796e-05 0.000137523 9.9024e-05 20 25 8 107788 107788 10441.3 652.579 0.01 0.000650754 0.000496836 25 1 7 7 220 148 0.959369 0.545 -3.98622 -0.959369 0 0 13752.8 859.551 0.00 0.00 0.000228765 0.000191032 - k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_aggregated 0.34 vpr 62.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64344 5 3 11 14 2 9 10 4 4 16 clb auto 24.0 MiB 0.01 16 62.8 MiB 0.00 0.00 0.545 -3.1332 -0.545 0.545 0.01 1.8342e-05 1.1151e-05 0.000135028 9.6191e-05 20 25 8 107788 107788 10441.3 652.579 0.01 0.000625192 0.000472161 25 1 7 7 220 148 0.959369 0.545 -3.98622 -0.959369 0 0 13752.8 859.551 0.00 0.00 0.00027376 0.000231455 - k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_detailed 0.32 vpr 62.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 64108 5 3 11 14 2 9 10 4 4 16 clb auto 23.8 MiB 0.01 16 62.6 MiB 0.00 0.00 0.545 -3.1332 -0.545 0.545 0.01 1.7833e-05 1.1325e-05 0.000140171 0.000101226 20 25 8 107788 107788 10441.3 652.579 0.01 0.000605993 0.000459098 25 1 7 7 220 148 0.959369 0.545 -3.98622 -0.959369 0 0 13752.8 859.551 0.00 0.00 0.000276053 0.000234404 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_netlist 0.99 vpr 64.89 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66448 5 3 11 14 2 9 10 4 4 16 clb auto 26.2 MiB 0.03 20 30 10 17 3 64.9 MiB 0.05 0.00 0.619658 -3.41326 -0.619658 0.545 0.02 8.2559e-05 6.5087e-05 0.000398248 0.000321879 -1 -1 -1 -1 20 15 1 107788 107788 10441.3 652.579 0.06 0.00241051 0.0022076 750 1675 -1 15 1 7 7 94 62 0.562699 0.545 -3.33969 -0.562699 0 0 13752.8 859.551 0.00 0.00 0.00 -1 -1 0.00 0.00164607 0.00157893 + k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_aggregated 1.08 vpr 64.95 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66508 5 3 11 14 2 9 10 4 4 16 clb auto 26.2 MiB 0.04 20 30 10 17 3 64.9 MiB 0.05 0.00 0.619658 -3.41326 -0.619658 0.545 0.03 4.7357e-05 3.5078e-05 0.000316498 0.00025661 -1 -1 -1 -1 20 15 1 107788 107788 10441.3 652.579 0.07 0.00236598 0.00217158 750 1675 -1 15 1 7 7 94 62 0.562699 0.545 -3.33969 -0.562699 0 0 13752.8 859.551 0.01 0.02 0.00 -1 -1 0.01 0.00296841 0.00285153 + k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_detailed 0.91 vpr 64.79 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66344 5 3 11 14 2 9 10 4 4 16 clb auto 26.0 MiB 0.03 20 30 10 17 3 64.8 MiB 0.05 0.00 0.619658 -3.41326 -0.619658 0.545 0.01 5.2206e-05 3.8166e-05 0.000401216 0.000334324 -1 -1 -1 -1 20 15 1 107788 107788 10441.3 652.579 0.08 0.003085 0.00285493 750 1675 -1 15 1 7 7 94 62 0.562699 0.545 -3.33969 -0.562699 0 0 13752.8 859.551 0.00 0.00 0.00 -1 -1 0.00 0.00168486 0.00161817 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_diff/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_diff/config/golden_results.txt index 48a01c1d240..f51e39ff90c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_diff/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_diff/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.77 vpr 65.06 MiB -1 -1 0.46 25492 4 0.12 -1 -1 36572 -1 -1 15 11 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 66620 11 2 303 283 2 80 28 7 7 49 clb auto 26.5 MiB 0.17 260 65.1 MiB 0.02 0.00 1.86505 -148.495 -1.86505 1.77255 0.00 0.000219187 0.000165987 0.00753775 0.00645225 -1 278 4 1.07788e+06 808410 219490. 4479.39 0.01 0.0187223 0.0171387 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 4.53 vpr 66.47 MiB -1 -1 0.88 23160 4 0.16 -1 -1 33060 -1 -1 15 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68068 11 2 303 283 2 78 28 7 7 49 clb auto 26.9 MiB 0.44 264 1036 209 767 60 66.5 MiB 0.10 0.00 2.03811 -163.536 -2.03811 1.90043 0.00 0.000562272 0.000493381 0.0211263 0.0192484 -1 -1 -1 -1 -1 252 12 1.07788e+06 808410 219490. 4479.39 0.11 0.0624165 0.0568117 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt index 37fb4f22f53..9362353dbf8 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_timing_update_type/config/golden_results.txt @@ -1,7 +1,7 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_auto 1.43 vpr 61.82 MiB -1 -1 0.34 22744 5 0.31 -1 -1 33812 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63308 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.8 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.00021372 0.000192501 0.00180931 0.00171502 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0128896 0.0113993 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full 1.39 vpr 61.79 MiB -1 -1 0.34 22548 5 0.32 -1 -1 33868 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63276 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.8 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.000213827 0.000192479 0.00182632 0.00173178 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0128195 0.0112985 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental 1.37 vpr 61.70 MiB -1 -1 0.32 22740 5 0.30 -1 -1 33952 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63184 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.7 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 6.0326e-05 4.8099e-05 0.00129504 0.00122282 -1 163 21 646728 646728 138825. 3856.24 0.01 0.00725272 0.00528838 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--quench_recompute_divider_999999999 1.44 vpr 61.68 MiB -1 -1 0.34 22584 5 0.34 -1 -1 33880 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63156 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.7 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.000173798 8.9569e-05 0.00138827 0.00124749 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0112762 0.00755481 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--router_algorithm_parallel_--num_workers_4 1.40 vpr 61.78 MiB -1 -1 0.33 22868 5 0.31 -1 -1 33924 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63264 10 2 181 183 1 40 24 6 6 36 clb auto 23.2 MiB 0.03 171 61.8 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 8.3175e-05 5.0203e-05 0.00133949 0.00121351 -1 163 21 646728 646728 138825. 3856.24 0.01 0.00784067 0.00532275 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full_--router_algorithm_parallel_--num_workers_4 1.42 vpr 61.66 MiB -1 -1 0.34 22744 5 0.30 -1 -1 33908 -1 -1 12 10 0 0 success v8.0.0-8293-gcafae33ff-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-197-generic x86_64 2023-08-02T01:36:29 redacted.eecg.utoronto.ca /home/redacted/par1/vtr-verilog-to-routing/vtr_flow/tasks 63140 10 2 181 183 1 40 24 6 6 36 clb auto 23.1 MiB 0.03 171 61.7 MiB 0.01 0.00 2.06897 -87.8888 -2.06897 2.06897 0.00 0.000453545 0.000422888 0.00262389 0.00239838 -1 163 21 646728 646728 138825. 3856.24 0.02 0.0186074 0.0163246 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_auto 2.80 vpr 63.72 MiB -1 -1 0.89 23420 5 0.16 -1 -1 33496 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65252 10 2 181 183 1 35 24 6 6 36 clb auto 24.3 MiB 0.18 146 398 72 298 28 63.7 MiB 0.11 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.000499863 0.00046066 0.00865418 0.0080588 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 0.24 0.0402973 0.0330423 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full 2.83 vpr 63.66 MiB -1 -1 0.80 23512 5 0.19 -1 -1 33392 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65184 10 2 181 183 1 35 24 6 6 36 clb auto 24.2 MiB 0.21 146 398 72 298 28 63.7 MiB 0.10 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.000520313 0.000485956 0.0108727 0.0101292 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 0.21 0.0390899 0.0350474 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental 2.77 vpr 63.91 MiB -1 -1 0.93 23472 5 0.18 -1 -1 33404 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65448 10 2 181 183 1 35 24 6 6 36 clb auto 24.4 MiB 0.20 146 398 72 298 28 63.9 MiB 0.09 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 2.0662e-05 7.982e-06 0.00379409 0.00346778 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 0.15 0.0197222 0.0139137 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--quench_recompute_divider_999999999 2.83 vpr 63.69 MiB -1 -1 0.94 23484 5 0.18 -1 -1 33404 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65220 10 2 181 183 1 35 24 6 6 36 clb auto 24.3 MiB 0.24 146 398 72 298 28 63.7 MiB 0.08 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.000152071 3.7143e-05 0.0036681 0.00317106 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 0.15 0.0186284 0.0137477 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--router_algorithm_parallel_--num_workers_4 2.80 vpr 63.70 MiB -1 -1 0.90 23532 5 0.15 -1 -1 33352 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65228 10 2 181 183 1 35 24 6 6 36 clb auto 24.3 MiB 0.17 146 398 72 298 28 63.7 MiB 0.10 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 2.2661e-05 4.617e-06 0.00351006 0.00294492 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 0.25 0.0171787 0.012971 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full_--router_algorithm_parallel_--num_workers_4 2.92 vpr 63.56 MiB -1 -1 0.89 23528 5 0.16 -1 -1 33396 -1 -1 12 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65088 10 2 181 183 1 35 24 6 6 36 clb auto 24.4 MiB 0.25 146 398 72 298 28 63.6 MiB 0.08 0.00 2.14835 -92.8998 -2.14835 2.14835 0.00 0.00212777 0.00209414 0.00814338 0.00754222 -1 -1 -1 -1 -1 130 24 646728 646728 138825. 3856.24 0.25 0.0344922 0.0314797 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan/config/golden_results.txt index 318ec994044..cbf1d188143 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_DSP num_M9K num_M144K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - stratixiv_arch.timing.xml ucsb_152_tap_fir_stratixiv_arch_timing.blif common 58.78 vpr 1.12 GiB 42 750 0 0 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 1171016 13 29 26295 20086 1 12166 792 39 29 1131 LAB auto 1047.5 MiB 11.58 73134 1097.2 MiB 8.64 0.13 5.09794 -4680.59 -4.09794 2.56822 4.90 0.0239667 0.0207817 1.8203 1.50657 80255 27932 41672 32788183 2856931 0 0 2.05958e+07 18210.3 17 5.28804 2.67454 -5275.78 -4.28804 0 0 1103.1 MiB 4.24 3.17151 2.69689 1097.2 MiB 12.22 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_DSP num_M9K num_M144K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + stratixiv_arch.timing.xml ucsb_152_tap_fir_stratixiv_arch_timing.blif common 79.71 vpr 1.16 GiB 42 758 0 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1213252 13 29 26295 20086 1 12439 800 39 29 1131 LAB auto 1062.8 MiB 17.41 70903 253216 51547 191577 10092 1176.1 MiB 11.03 0.15 4.99319 -5223.26 -3.99319 2.64446 0.01 0.0404503 0.0335948 3.08815 2.57709 83183 6.68835 19827 1.59419 25954 36248 10076288 1815088 0 0 2.05929e+07 18207.7 15 331560 3499109 -1 5.28806 2.7363 -5589.94 -4.28806 0 0 7.56 -1 -1 1176.1 MiB 4.03 4.74901 4.02053 1176.1 MiB -1 19.41 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan_s10/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan_s10/config/golden_results.txt index 04284eca4ae..159ae69716e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan_s10/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_titan_s10/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_MLAB num_DSP num_M20K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time -stratix10_arch.timing.xml murax_stratix10_arch_timing.blif common 18.76 vpr 381.10 MiB 35 81 0 0 8 0 success v8.0.0-11333-g6a44da44e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T20:37:10 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 390248 18 17 2338 2195 1 2048 124 17 13 221 io_cell auto 340.2 MiB 7.40 11993 12793 2027 9633 1133 381.1 MiB 0.68 0.01 3.53131 -3315.03 -2.53131 3.53131 0.00 0.0063198 0.0052349 0.319872 0.278146 13741 6.71932 4058 1.98435 8350 20021 12585105 1465964 0 0 3.37726e+06 15281.7 56 52540 541133 -1 3.067 3.067 -3019.02 -2.067 0 0 1.25 -1 -1 381.1 MiB 2.36 1.01657 0.879494 381.1 MiB -1 1.18 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_MLAB num_DSP num_M20K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + stratix10_arch.timing.xml murax_stratix10_arch_timing.blif common 20.78 vpr 383.20 MiB 35 93 0 0 8 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 392392 18 17 2338 2195 1 2035 136 17 13 221 io_cell auto 341.0 MiB 8.88 11702 14096 2182 10467 1447 383.2 MiB 0.99 0.02 3.767 -3201.39 -2.767 3.767 0.00 0.00771503 0.0062784 0.427042 0.368396 12703 6.25148 3920 1.92913 6529 15398 3929307 843439 0 0 3.37726e+06 15281.7 12 52540 541133 -1 3.447 3.447 -2841.9 -2.447 0 0 1.26 -1 -1 383.2 MiB 1.58 0.852394 0.762998 383.2 MiB -1 2.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_two_chains/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_two_chains/config/golden_results.txt index af6f4da43ad..05a82915baf 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_two_chains/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_two_chains/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length -k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml diffeq2.v common 14.42 vpr 67.74 MiB -1 -1 0.22 25248 5 0.14 -1 -1 37884 -1 -1 16 66 0 -1 success v8.0.0-10947-g0222054f4-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-08-02T07:25:03 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/tasks/regression_tests/vtr_reg_strong 69368 66 96 983 697 1 554 190 16 16 256 mult_27 auto 29.8 MiB 0.86 4414 48238 17023 25695 5520 67.7 MiB 0.38 0.01 17.8642 -987.177 -17.8642 17.8642 0.74 0.000855849 0.000743555 0.0943972 0.0830861 64 10764 25 4.83877e+06 1.00808e+06 1.35562e+06 5295.38 9.28 0.507301 0.459906 40360 280887 -1 9902 21 3569 7097 2047268 538057 17.7619 17.7619 -1087.06 -17.7619 0 0 1.67258e+06 6533.53 0.46 0.38 0.19 -1 -1 0.46 0.0706231 0.0666912 139 200 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml diffeq2.v common 17.29 vpr 67.58 MiB -1 -1 0.41 22592 5 0.17 -1 -1 34192 -1 -1 17 66 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 69200 66 96 983 697 1 557 191 16 16 256 mult_27 auto 28.6 MiB 2.01 4754 40817 12099 23524 5194 67.6 MiB 0.65 0.01 16.4391 -978.659 -16.4391 16.4391 0.88 0.00273549 0.00258048 0.232507 0.218951 -1 -1 -1 -1 64 11429 28 4.83877e+06 1.03328e+06 1.35562e+06 5295.38 9.13 0.948515 0.877899 40360 280887 -1 10218 18 3342 7052 1691763 500137 17.028 17.028 -1086.21 -17.028 0 0 1.67258e+06 6533.53 0.58 0.52 0.31 -1 -1 0.58 0.136104 0.128889 138 202 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_unroute_analysis/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_unroute_analysis/config/golden_results.txt index 5e4606126a0..c6d02a55f5a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_unroute_analysis/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_unroute_analysis/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20 0.41 vpr 61.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62680 6 8 39 47 1 20 17 5 5 25 clb auto 22.7 MiB 0.03 51 61.2 MiB 0.01 0.00 1.10382 -14.2793 -1.10382 1.10382 0.00 3.7752e-05 2.9009e-05 0.00105406 0.000901646 75 130 167 6598 2896 323364 161682 20103.2 804.128 21 1.3315 1.3315 -16.1007 -1.3315 0 0 61.2 MiB 0.01 0.00402357 0.00352275 61.2 MiB 0.00 - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20_--analysis 0.27 vpr 61.20 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62672 6 8 39 47 1 20 17 5 5 25 clb auto 22.6 MiB 0.01 51 61.2 MiB 0.00 0.00 1.10382 -14.2793 -1.10382 1.10382 0.00 3.6532e-05 2.7844e-05 0.000989748 0.000839055 75 130 167 6598 2896 323364 161682 20103.2 804.128 21 1.3315 1.3315 -16.1007 -1.3315 0 0 61.2 MiB 0.01 0.00407276 0.00357987 61.2 MiB 0.00 - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8 0.20 vpr 61.48 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62960 6 8 39 47 1 20 17 5 5 25 clb auto 22.9 MiB 0.01 51 61.5 MiB 0.00 0.00 1.10205 -14.2135 -1.10205 1.10205 0.00 3.646e-05 2.7918e-05 0.000932154 0.000793304 -1 2425 3157 243025 177681 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 61.5 MiB 0.08 -1 -1 61.5 MiB 0.00 - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8_--analysis 0.22 vpr 61.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 62924 6 8 39 47 1 20 17 5 5 25 clb auto 22.9 MiB 0.01 51 61.4 MiB 0.00 0.00 1.10205 -14.2135 -1.10205 1.10205 0.00 3.6205e-05 2.7925e-05 0.000920418 0.000783317 131 2425 3157 243025 177681 323364 161682 9037.03 361.481 -1 1.73639 1.73639 -19.938 -1.73639 0 0 61.4 MiB 0.08 -1 -1 61.4 MiB 0.00 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20 1.14 vpr 62.96 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64472 6 8 39 47 1 20 17 5 5 25 clb auto 24.5 MiB 0.06 69 227 71 153 3 63.0 MiB 0.06 0.00 1.42251 -15.9524 -1.42251 1.42251 0.00 0.00015298 0.000138828 0.00249541 0.00229004 -1 -1 -1 -1 86 4.52632 45 2.36842 140 253 6063 2435 323364 161682 20103.2 804.128 19 1140 2762 -1 1.32969 1.32969 -16.56 -1.32969 0 0 0.00 -1 -1 63.0 MiB 0.12 0.0136734 0.0121602 63.0 MiB -1 0.01 + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20_--analysis 1.13 vpr 62.89 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64404 6 8 39 47 1 20 17 5 5 25 clb auto 24.5 MiB 0.06 69 227 71 153 3 62.9 MiB 0.07 0.00 1.42251 -15.9524 -1.42251 1.42251 0.00 0.000157491 0.000141647 0.00278966 0.00257008 -1 -1 -1 -1 86 4.52632 45 2.36842 140 253 6063 2435 323364 161682 20103.2 804.128 19 1140 2762 -1 1.32969 1.32969 -16.56 -1.32969 0 0 0.00 -1 -1 62.9 MiB 0.10 0.0124481 0.0108976 62.9 MiB -1 0.01 + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8 0.72 vpr 62.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64488 6 8 39 47 1 20 17 5 5 25 clb auto 24.6 MiB 0.06 69 227 71 153 3 63.0 MiB 0.07 0.00 1.42347 -15.9604 -1.42347 1.42347 0.00 0.000217166 0.000199351 0.00282597 0.00262228 -1 -1 -1 -1 -1 -1 -1 -1 723 1098 45498 29013 -1 -1 -1 -1 -1 996 1634 -1 -1 -1 -1 -1 -1 -1 0.00 -1 -1 63.0 MiB 0.25 -1 -1 63.0 MiB -1 0.00 + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8_--analysis 0.77 vpr 62.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64344 6 8 39 47 1 20 17 5 5 25 clb auto 24.4 MiB 0.08 69 227 71 153 3 62.8 MiB 0.05 0.00 1.42347 -15.9604 -1.42347 1.42347 0.00 0.000206522 0.000185386 0.00269457 0.0024909 -1 -1 -1 -1 142 7.47368 68 3.57895 723 1098 45498 29013 323364 161682 9037.03 361.481 -1 996 1634 -1 1.87665 1.87665 -21.7004 -1.87665 0 0 0.00 -1 -1 62.8 MiB 0.28 -1 -1 62.8 MiB -1 0.00 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph/config/golden_results.txt index 3d6020c77de..311f7681759 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k4_N4_90nm.xml stereovision3.v common 1.67 vpr 56.43 MiB -1 -1 0.45 25384 6 0.13 -1 -1 35724 -1 -1 26 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 57788 10 2 186 188 1 49 38 8 8 64 clb auto 18.2 MiB 0.02 224 56.4 MiB 0.01 0.00 2.40278 -103.067 -2.40278 2.40278 0.00 0.000119899 9.7708e-05 0.00253947 0.0021251 203 186 417 22870 4288 80255.5 57962.3 276194. 4315.53 12 2.46522 2.46522 -111.211 -2.46522 -0.0734 -0.0734 56.4 MiB 0.01 0.00769657 0.00673067 56.4 MiB 0.03 - k6_frac_N10_40nm.xml stereovision3.v common 1.49 vpr 57.75 MiB -1 -1 0.45 25728 5 0.13 -1 -1 35988 -1 -1 7 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 59136 10 2 181 183 1 37 19 5 5 25 clb auto 19.5 MiB 0.05 109 57.8 MiB 0.01 0.00 1.93928 -79.4364 -1.93928 1.93928 0.00 0.000117405 9.5811e-05 0.00377247 0.00328288 95 62 85 1742 528 485046 377258 99699.4 3987.98 5 2.07705 2.07705 -87.1807 -2.07705 0 0 57.8 MiB 0.01 0.00934793 0.00856098 57.8 MiB 0.01 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k4_N4_90nm.xml stereovision3.v common 4.21 vpr 57.70 MiB -1 -1 0.80 23328 6 0.19 -1 -1 33384 -1 -1 28 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59088 10 2 186 188 1 48 40 8 8 64 clb auto 17.8 MiB 0.19 230 1196 187 947 62 57.7 MiB 0.08 0.00 2.65254 -112.238 -2.65254 2.65254 0.00 0.000511628 0.000471787 0.00947363 0.00865334 -1 -1 -1 -1 214 4.75556 214 4.75556 166 391 15410 3128 80255.5 62421 276194. 4315.53 14 9480 40228 -1 2.5901 2.5901 -115.226 -2.5901 -0.0734 -0.0734 0.06 -1 -1 57.7 MiB 0.11 0.0294044 0.0261959 57.7 MiB -1 0.04 + k6_frac_N10_40nm.xml stereovision3.v common 3.65 vpr 59.24 MiB -1 -1 0.83 23296 5 0.20 -1 -1 33392 -1 -1 7 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60664 10 2 181 183 1 37 19 5 5 25 clb auto 19.7 MiB 0.25 118 444 83 324 37 59.2 MiB 0.10 0.00 2.09635 -87.6091 -2.09635 2.09635 0.00 0.000727323 0.000670846 0.0133214 0.0124002 -1 -1 -1 -1 93 2.73529 48 1.41176 48 64 1145 344 485046 377258 99699.4 3987.98 3 2523 14238 -1 1.97843 1.97843 -87.1605 -1.97843 0 0 0.02 -1 -1 59.2 MiB 0.05 0.0264495 0.0247146 59.2 MiB -1 0.01 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_bin/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_bin/config/golden_results.txt index 1753ade2111..108c515e439 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_bin/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_bin/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k4_N4_90nm.xml stereovision3.v common 1.47 vpr 56.66 MiB -1 -1 0.41 25364 6 0.13 -1 -1 36008 -1 -1 26 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 58020 10 2 186 188 1 49 38 8 8 64 clb auto 18.4 MiB 0.02 224 56.7 MiB 0.01 0.00 2.40278 -103.067 -2.40278 2.40278 0.00 0.000117309 9.3494e-05 0.00260532 0.00216361 203 186 417 22870 4288 80255.5 57962.3 276194. 4315.53 12 2.46522 2.46522 -111.211 -2.46522 -0.0734 -0.0734 56.7 MiB 0.01 0.00851265 0.00743512 56.7 MiB 0.03 - k6_frac_N10_40nm.xml stereovision3.v common 1.30 vpr 57.68 MiB -1 -1 0.41 25756 5 0.13 -1 -1 35872 -1 -1 7 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 59064 10 2 181 183 1 37 19 5 5 25 clb auto 19.4 MiB 0.05 109 57.7 MiB 0.01 0.00 1.93928 -79.4364 -1.93928 1.93928 0.00 0.000105574 8.2998e-05 0.00421587 0.00371708 95 62 85 1742 528 485046 377258 99699.4 3987.98 5 2.07705 2.07705 -87.1807 -2.07705 0 0 57.7 MiB 0.01 0.0115604 0.0106404 57.7 MiB 0.01 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k4_N4_90nm.xml stereovision3.v common 3.18 vpr 57.75 MiB -1 -1 0.67 23320 6 0.16 -1 -1 33560 -1 -1 28 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59132 10 2 186 188 1 48 40 8 8 64 clb auto 17.9 MiB 0.03 230 1196 187 947 62 57.7 MiB 0.04 0.00 2.65254 -112.238 -2.65254 2.65254 0.00 0.00041108 0.00037781 0.00872984 0.0079342 -1 -1 -1 -1 214 4.75556 214 4.75556 166 391 15410 3128 80255.5 62421 276194. 4315.53 14 9480 40228 -1 2.5901 2.5901 -115.226 -2.5901 -0.0734 -0.0734 0.05 -1 -1 57.7 MiB 0.05 0.025576 0.0229291 57.7 MiB -1 0.05 + k6_frac_N10_40nm.xml stereovision3.v common 3.35 vpr 59.19 MiB -1 -1 0.94 23284 5 0.18 -1 -1 33436 -1 -1 7 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60608 10 2 181 183 1 37 19 5 5 25 clb auto 19.7 MiB 0.17 118 444 83 324 37 59.2 MiB 0.12 0.00 2.09635 -87.6091 -2.09635 2.09635 0.00 0.000568296 0.000529924 0.0148823 0.0140252 -1 -1 -1 -1 93 2.73529 48 1.41176 48 64 1145 344 485046 377258 99699.4 3987.98 3 2523 14238 -1 1.97843 1.97843 -87.1605 -1.97843 0 0 0.01 -1 -1 59.2 MiB 0.07 0.0262726 0.0248022 59.2 MiB -1 0.02 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_titan/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_titan/config/golden_results.txt index b1cbc85b929..9a1ccef4106 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_titan/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_verify_rr_graph_titan/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - stratixiv_arch.timing.xml styr.blif common 20.87 vpr 937.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-6989-g4a9293e1e-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T01:37:29 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 960440 10 10 168 178 1 62 30 11 8 88 io auto 914.8 MiB 0.43 339 937.9 MiB 0.04 0.00 6.45778 -70.0303 -6.45778 6.45778 0.01 0.00015423 0.000126396 0.00629049 0.00562157 723 459 1886 164820 67565 0 0 100248. 1139.18 17 7.04301 7.04301 -76.5897 -7.04301 0 0 937.9 MiB 0.05 0.0216527 0.0199734 937.9 MiB 0.02 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + stratixiv_arch.timing.xml styr.blif common 35.89 vpr 976.41 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999840 10 10 168 178 1 68 30 11 8 88 io auto 953.2 MiB 0.64 354 536 67 434 35 976.4 MiB 0.09 0.00 6.57169 -72.0462 -6.57169 6.57169 0.00 0.000503078 0.000459561 0.0104853 0.00985191 -1 -1 -1 -1 586 8.74627 178 2.65672 259 971 58705 26468 0 0 194014. 2204.70 13 11730 32605 -1 6.82307 6.82307 -73.1617 -6.82307 0 0 0.07 -1 -1 976.4 MiB 0.07 0.0420166 0.0389946 976.4 MiB -1 0.08 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test/config/golden_results.txt index 5575a9d2faa..a5aa1efe307 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test/config/golden_results.txt @@ -1,3 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 13.08 vpr 72.01 MiB 0.11 7880 -1 -1 1 0.06 -1 -1 32108 -1 -1 12 130 0 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73736 130 40 596 562 1 356 185 14 14 196 dsp_top auto 33.4 MiB 0.18 1694 72.0 MiB 0.18 0.00 5.12303 -569.743 -5.12303 5.12303 0.82 0.00114716 0.00103742 0.0885122 0.0802698 64 3864 19 4.93594e+06 1.0962e+06 1.01626e+06 5185.02 9.04 0.75255 0.697875 3466 8 820 892 206340 72581 4.57723 4.57723 -703.108 -4.57723 0 0 1.25183e+06 6386.87 0.33 0.10 0.0403696 0.0387165 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 13.08 vpr 72.01 MiB 0.11 7880 -1 -1 1 0.06 -1 -1 32108 -1 -1 12 130 0 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73736 130 40 596 562 1 356 185 14 14 196 dsp_top auto 33.4 MiB 0.18 1694 72.0 MiB 0.18 0.00 5.12303 -569.743 -5.12303 5.12303 0.82 0.00114716 0.00103742 0.0885122 0.0802698 64 3864 19 4.93594e+06 1.0962e+06 1.01626e+06 5185.02 9.04 0.75255 0.697875 3466 8 820 892 206340 72581 4.57723 4.57723 -703.108 -4.57723 0 0 1.25183e+06 6386.87 0.33 0.10 0.0403696 0.0387165 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 6.81 vpr 74.85 MiB 0.09 7796 -1 -1 1 0.08 -1 -1 32232 -1 -1 12 130 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76648 130 40 596 562 1 356 185 14 14 196 dsp_top auto 35.9 MiB 0.18 1873 36479 12233 19905 4341 74.9 MiB 0.21 0.00 5.12303 -652.04 -5.12303 5.12303 0.82 0.00140021 0.00130659 0.105265 0.098455 -1 -1 -1 -1 64 3939 11 4.93594e+06 1.0962e+06 976140. 4980.31 2.47 0.398489 0.366481 31408 195022 -1 3669 7 846 891 204483 79938 4.57723 4.57723 -704.235 -4.57723 0 0 1.23909e+06 6321.90 0.32 0.09 0.28 -1 -1 0.32 0.0391394 0.037187 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test_no_hb/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test_no_hb/config/golden_results.txt index 3691e817cf7..314721e6341 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test_no_hb/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/koios_test_no_hb/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 19.08 vpr 73.94 MiB 0.22 11264 -1 -1 1 0.10 -1 -1 34084 -1 -1 23 130 0 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 75712 130 40 1203 1030 1 591 196 14 14 196 dsp_top auto 36.0 MiB 0.69 2454 73.9 MiB 0.44 0.01 5.45806 -562.941 -5.45806 5.45806 0.63 0.00128984 0.00111356 0.118468 0.104978 128 4882 22 4.93594e+06 1.40315e+06 1.84644e+06 9420.63 12.65 0.949313 0.856984 4475 22 2453 2541 364135 100138 6.74828 6.74828 -745.721 -6.74828 0 0 2.29480e+06 11708.2 0.68 0.29 0.109664 0.102365 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml test.v common 17.10 vpr 78.69 MiB 0.17 10856 -1 -1 1 0.12 -1 -1 34140 -1 -1 23 130 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 80580 130 40 1203 1030 1 586 196 14 14 196 dsp_top auto 38.7 MiB 0.49 2582 41733 12251 23272 6210 78.7 MiB 0.33 0.01 6.49756 -686.499 -6.49756 6.49756 0.76 0.00167814 0.00153244 0.158674 0.146165 -1 -1 -1 -1 108 5040 43 4.93594e+06 1.40315e+06 1.55765e+06 7947.21 11.29 1.3413 1.19961 36552 325092 -1 4509 22 2486 2554 274402 92406 6.62048 6.62048 -743.865 -6.62048 0 0 1.93951e+06 9895.46 0.56 0.19 0.69 -1 -1 0.56 0.107178 0.0988592 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_absorb_buffers/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_absorb_buffers/config/golden_results.txt index 2eaf4ac7e37..44b0c3fb49b 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_absorb_buffers/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_absorb_buffers/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_on 1.81 vpr 67.35 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 83 130 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 68964 130 150 1169 1319 1 890 363 12 12 144 clb auto 30.0 MiB 1.16 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00689854 0.0060926 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_off 2.02 vpr 67.40 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 130 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 69020 130 150 1216 1366 1 923 369 12 12 144 clb auto 30.2 MiB 1.36 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00461195 0.0040759 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_on 1.85 vpr 70.16 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 83 130 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71840 130 150 1169 1319 1 886 363 12 12 144 clb auto 30.0 MiB 1.25 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00639293 0.00599457 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml riscv_core_lut6.blif common_--absorb_buffer_luts_off 1.78 vpr 69.49 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 90 130 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71156 130 150 1216 1366 1 933 370 12 12 144 clb auto 29.8 MiB 1.20 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.0055812 0.00507678 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analysis_only/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analysis_only/config/golden_results.txt index 229d13039ee..9750f0dd17a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analysis_only/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analysis_only/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml stereovision3.v common 2.28 vpr 61.18 MiB 0.08 9852 -1 -1 4 0.18 -1 -1 33256 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62648 11 30 262 292 2 104 60 7 7 49 clb auto 22.5 MiB 0.11 398 61.2 MiB 0.11 0.00 2.2193 -164.973 -2.2193 2.11301 0.01 0.000432848 0.000355618 0.0151388 0.0130385 450 1044 2368 112213 20819 1.07788e+06 1.02399e+06 207176. 4228.08 27 2.35756 2.2409 -178.918 -2.35756 0 0 61.2 MiB 0.30 0.058926 0.052611 61.2 MiB 0.03 - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.60 vpr 62.85 MiB 0.22 10104 -1 -1 5 0.17 -1 -1 33180 -1 -1 14 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64356 11 30 313 321 2 118 55 7 7 49 clb auto 24.9 MiB 0.43 405 62.8 MiB 0.15 0.00 2.27922 -160.669 -2.27922 2.09152 0.00 0.000813098 0.000693543 0.024233 0.0211052 547 246 449 12463 3797 1.07788e+06 754516 219490. 4479.39 8 2.45141 2.26844 -175.456 -2.45141 0 0 62.8 MiB 0.12 0.0509239 0.0463062 62.8 MiB 0.05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml stereovision3.v common 1.31 vpr 64.46 MiB 0.07 9980 -1 -1 4 0.20 -1 -1 33464 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66008 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.10 421 2049 269 1715 65 64.5 MiB 0.04 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 0.000669291 0.000596999 0.0160309 0.0145218 -1 -1 -1 -1 424 4.46316 163 1.71579 617 1399 45810 10033 1.07788e+06 1.02399e+06 207176. 4228.08 16 4440 29880 -1 2.36464 2.27781 -179.43 -2.36464 0 0 0.04 -1 -1 64.5 MiB 0.05 0.0483486 0.0432361 64.5 MiB -1 0.04 + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.59 vpr 66.95 MiB 0.07 10224 -1 -1 5 0.19 -1 -1 33224 -1 -1 14 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68560 11 30 313 321 2 115 55 7 7 49 clb auto 27.2 MiB 0.33 466 2759 556 2108 95 67.0 MiB 0.05 0.00 2.67362 -172.647 -2.67362 2.30794 0.00 0.000721207 0.000645031 0.0268996 0.0245416 -1 -1 -1 -1 574 5.26606 231 2.11927 216 452 11450 3638 1.07788e+06 754516 219490. 4479.39 7 5100 32136 -1 2.71877 2.35385 -178.475 -2.71877 0 0 0.04 -1 -1 67.0 MiB 0.03 0.0557218 0.0513892 67.0 MiB -1 0.04 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analytic_placer/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analytic_placer/config/golden_results.txt index 19310244140..297d9cc2e7d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analytic_placer/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_analytic_placer/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 4.04 vpr 62.37 MiB 0.15 9556 -1 -1 3 0.30 -1 -1 36400 -1 -1 65 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63868 99 130 363 493 1 251 295 12 12 144 clb auto 24.2 MiB 0.15 783 62.4 MiB 0.21 0.00 2.08915 -197.081 -2.08915 2.08915 0.38 0.00073259 0.000667062 0.00557402 0.0053286 40 1791 23 5.66058e+06 4.05111e+06 333335. 2314.82 1.03 0.147136 0.135993 1454 8 577 746 66810 21955 2.69852 2.69852 -225.913 -2.69852 0 0 419432. 2912.72 0.13 0.04 0.0196997 0.0186669 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 4.34 vpr 65.27 MiB 0.06 9400 -1 -1 3 0.30 -1 -1 34668 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66836 99 130 363 493 1 251 298 12 12 144 clb auto 26.0 MiB 0.14 973 1293 313 844 136 65.3 MiB 0.07 0.00 2.2425 -218.261 -2.2425 2.2425 0.39 0.000963196 0.000901211 0.00562254 0.00542751 -1 -1 -1 -1 36 1866 35 5.66058e+06 4.21279e+06 305235. 2119.69 1.87 0.362594 0.328428 12238 58442 -1 1566 9 567 738 58151 19831 2.59207 2.59207 -232.729 -2.59207 0 0 378970. 2631.74 0.12 0.05 0.07 -1 -1 0.12 0.0271537 0.0253871 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bidir/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bidir/config/golden_results.txt index 6755b01d420..75b4dc8cff1 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bidir/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bidir/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_n4_v7_bidir.xml styr.blif common 1.46 vpr 60.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61832 10 10 253 263 1 168 86 11 11 121 clb auto 22.0 MiB 0.03 1321 5000 862 3861 277 60.4 MiB 0.03 0.00 5.9335 -73.3937 -5.9335 5.9335 0.11 0.000247272 0.000211104 0.00802341 0.00702182 16 2231 44 2.43e+06 1.98e+06 -1 -1 0.80 0.100183 0.0859706 3522 30407 -1 1953 31 1359 4378 262510 29492 8.05167 8.05167 -93.2354 -8.05167 0 0 -1 -1 0.04 0.05 0.01 -1 -1 0.04 0.0184167 0.0164077 - k4_n4_v7_longline_bidir.xml styr.blif common 1.34 vpr 60.29 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61740 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1283 3299 376 2835 88 60.3 MiB 0.02 0.00 4.65232 -54.7485 -4.65232 4.65232 0.17 0.000255437 0.000220893 0.00609942 0.00538587 18 2324 34 2.43e+06 1.98e+06 -1 -1 0.49 0.0663873 0.0571989 3282 34431 -1 2358 20 1330 4111 330217 37900 9.15177 9.15177 -106.099 -9.15177 0 0 -1 -1 0.08 0.05 0.01 -1 -1 0.08 0.0143078 0.0127944 - k4_n4_v7_l1_bidir.xml styr.blif common 1.66 vpr 60.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61704 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1308 8591 1804 6310 477 60.3 MiB 0.05 0.00 7.13454 -91.9395 -7.13454 7.13454 0.16 0.000242373 0.000209231 0.012888 0.0113219 11 1687 50 2.43e+06 1.98e+06 -1 -1 0.84 0.0704665 0.0610222 4842 26197 -1 1434 21 1413 4826 393565 72389 8.93712 8.93712 -111.541 -8.93712 0 0 -1 -1 0.04 0.07 0.01 -1 -1 0.04 0.014159 0.0126913 - k4_n4_v7_bidir_pass_gate.xml styr.blif common 1.73 vpr 60.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 66 10 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61704 10 10 253 263 1 168 86 11 11 121 clb auto 21.9 MiB 0.03 1271 3677 486 3031 160 60.3 MiB 0.03 0.00 3.40634 -44.4904 -3.40634 3.40634 0.11 0.000245519 0.000209021 0.00658945 0.00577606 16 2163 32 2.43e+06 1.98e+06 -1 -1 0.92 0.0663956 0.0571149 3522 30407 -1 2237 32 1642 5759 1828879 289403 29.985 29.985 -297.537 -29.985 0 0 -1 -1 0.04 0.21 0.01 -1 -1 0.04 0.0183895 0.0162618 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_n4_v7_bidir.xml styr.blif common 2.49 vpr 58.58 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59988 10 10 253 263 1 165 89 11 11 121 clb auto 18.8 MiB 0.05 1298 4445 695 3556 194 58.6 MiB 0.05 0.00 5.53812 -72.6437 -5.53812 5.53812 0.17 0.000586889 0.000523181 0.0184266 0.016854 -1 -1 -1 -1 14 2029 36 2.43e+06 2.07e+06 -1 -1 1.20 0.252134 0.219147 3402 27531 -1 1944 19 1218 4569 249188 30978 7.47374 7.47374 -94.8537 -7.47374 0 0 -1 -1 0.06 0.11 0.02 -1 -1 0.06 0.0414153 0.0362194 + k4_n4_v7_longline_bidir.xml styr.blif common 2.81 vpr 58.10 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59496 10 10 253 263 1 165 89 11 11 121 clb auto 18.9 MiB 0.06 1243 3851 530 3175 146 58.1 MiB 0.04 0.00 4.42129 -53.6285 -4.42129 4.42129 0.23 0.000610037 0.000548673 0.0158349 0.0144995 -1 -1 -1 -1 19 2381 26 2.43e+06 2.07e+06 -1 -1 1.40 0.224268 0.192635 3282 34431 -1 2331 24 1499 5264 384444 46394 8.40637 8.40637 -105.933 -8.40637 0 0 -1 -1 0.07 0.11 0.02 -1 -1 0.07 0.0377239 0.0326406 + k4_n4_v7_l1_bidir.xml styr.blif common 4.06 vpr 58.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60052 10 10 253 263 1 165 89 11 11 121 clb auto 18.9 MiB 0.06 1249 6821 1452 5028 341 58.6 MiB 0.06 0.00 6.30077 -80.949 -6.30077 6.30077 0.22 0.000518755 0.000463783 0.0228285 0.0206741 -1 -1 -1 -1 10 1483 31 2.43e+06 2.07e+06 -1 -1 2.61 0.268076 0.234279 4482 22551 -1 1280 20 1321 4798 303501 58064 7.52318 7.52318 -89.7629 -7.52318 0 0 -1 -1 0.04 0.12 0.02 -1 -1 0.04 0.037522 0.0333295 + k4_n4_v7_bidir_pass_gate.xml styr.blif common 3.10 vpr 58.02 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 69 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59416 10 10 253 263 1 165 89 11 11 121 clb auto 18.8 MiB 0.05 1252 4247 601 3492 154 58.0 MiB 0.05 0.00 3.38007 -43.5291 -3.38007 3.38007 0.18 0.00064054 0.000577227 0.0176541 0.0161473 -1 -1 -1 -1 14 2047 30 2.43e+06 2.07e+06 -1 -1 1.68 0.248457 0.216641 3402 27531 -1 2099 29 1484 5383 889715 156716 22.7353 22.7353 -261.092 -22.7353 0 0 -1 -1 0.05 0.25 0.02 -1 -1 0.05 0.0493955 0.0438566 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_binary/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_binary/config/golden_results.txt index 78e638c381a..84fc98735c4 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_binary/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_binary/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_off 2.66 vpr 60.95 MiB 0.06 9900 -1 -1 4 0.18 -1 -1 33256 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62412 11 30 262 292 2 104 60 7 7 49 clb auto 22.3 MiB 0.11 415 60.9 MiB 0.06 0.00 2.23761 -166.997 -2.23761 2.13034 0.08 0.000493503 0.000403993 0.0143102 0.0121374 20 640 27 1.07788e+06 1.02399e+06 49980.0 1020.00 0.28 0.0872588 0.0747357 567 29 938 2409 75783 23211 2.53293 2.38259 -188.878 -2.53293 0 0 65453.8 1335.79 0.01 0.09 0.0350543 0.0308701 - k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_on 3.36 vpr 61.28 MiB 0.07 9924 -1 -1 4 0.18 -1 -1 33260 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62748 11 30 262 292 2 104 60 7 7 49 clb auto 22.6 MiB 0.09 415 61.3 MiB 0.08 0.00 2.23761 -166.997 -2.23761 2.13034 0.08 0.000388392 0.000309642 0.0131867 0.0111255 20 640 27 1.07788e+06 1.02399e+06 49980.0 1020.00 1.00 0.256547 0.224659 567 29 938 2409 75783 23211 2.53293 2.38259 -188.878 -2.53293 0 0 65453.8 1335.79 0.02 0.33 0.0393525 0.0344681 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_off 1.95 vpr 64.38 MiB 0.06 10036 -1 -1 4 0.21 -1 -1 33304 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65924 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.09 439 1932 239 1639 54 64.4 MiB 0.03 0.00 2.45489 -180.196 -2.45489 2.33213 0.07 0.000611032 0.000541625 0.0144591 0.0130681 -1 -1 -1 -1 20 684 34 1.07788e+06 1.02399e+06 49980.0 1020.00 0.25 0.116805 0.09949 2664 9102 -1 585 25 992 2191 68660 23567 2.62928 2.46785 -187.223 -2.62928 0 0 65453.8 1335.79 0.02 0.07 0.01 -1 -1 0.02 0.0375678 0.0325723 + k6_N10_mem32K_40nm.xml stereovision3.v common_--verify_binary_search_on 2.27 vpr 64.50 MiB 0.06 9904 -1 -1 4 0.20 -1 -1 33384 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66052 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 439 1932 239 1639 54 64.5 MiB 0.04 0.00 2.45489 -180.196 -2.45489 2.33213 0.08 0.000680402 0.00060982 0.017209 0.0157151 -1 -1 -1 -1 20 684 34 1.07788e+06 1.02399e+06 49980.0 1020.00 0.55 0.238978 0.201081 2664 9102 -1 585 25 992 2191 68660 23567 2.62928 2.46785 -187.223 -2.62928 0 0 65453.8 1335.79 0.02 0.07 0.01 -1 -1 0.02 0.0406365 0.0353306 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_blocks_with_no_inputs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_blocks_with_no_inputs/config/golden_results.txt index 2efbc1a0f7e..46602a07176 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_blocks_with_no_inputs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_blocks_with_no_inputs/config/golden_results.txt @@ -1,9 +1,9 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml ch_intrinsics.v common 4.16 vpr 61.71 MiB 0.05 9356 -1 -1 3 0.32 -1 -1 36424 -1 -1 70 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63192 99 130 363 493 1 255 300 12 12 144 clb auto 23.0 MiB 0.09 651 61.7 MiB 0.25 0.00 2.12937 -209.611 -2.12937 2.12937 0.36 0.000776998 0.000687895 0.0452586 0.0404722 45 1327 20 5.66058e+06 4.32058e+06 306247. 2126.71 1.32 0.218639 0.19888 1152 12 739 1046 92976 29786 2.59213 2.59213 -230.045 -2.59213 0 0 388532. 2698.14 0.11 0.10 0.0235111 0.0220819 - k6_N10_mem32K_40nm.xml diffeq1.v common 15.34 vpr 65.20 MiB 0.22 9376 -1 -1 15 0.55 -1 -1 34800 -1 -1 52 162 0 5 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 66764 162 96 999 932 1 707 315 16 16 256 mult_36 auto 27.3 MiB 0.26 5727 65.2 MiB 0.80 0.01 20.0262 -1714.67 -20.0262 20.0262 0.88 0.00329273 0.00304787 0.267812 0.246983 48 10769 39 1.21132e+07 4.78249e+06 721839. 2819.68 9.16 1.84461 1.71187 9509 27 3851 8094 2113049 494039 21.894 21.894 -1860.91 -21.894 0 0 926152. 3617.78 0.32 0.68 0.198378 0.187088 - k6_N10_mem32K_40nm.xml single_wire.v common 0.73 vpr 59.00 MiB 0.01 5820 -1 -1 1 0.01 -1 -1 29912 -1 -1 0 1 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60412 1 1 1 2 0 1 2 3 3 9 -1 auto 20.3 MiB 0.00 2 59.0 MiB 0.03 0.00 0.205011 -0.205011 -0.205011 nan 0.05 7.2e-06 3.866e-06 5.8595e-05 3.7101e-05 2 1 1 53894 0 1165.58 129.509 0.01 0.000144043 9.3417e-05 1 1 1 1 17 8 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 5.5588e-05 3.5966e-05 - k6_N10_mem32K_40nm.xml single_ff.v common 0.77 vpr 59.09 MiB 0.01 5860 -1 -1 1 0.00 -1 -1 29820 -1 -1 1 2 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60504 2 1 3 4 1 3 4 3 3 9 -1 auto 20.5 MiB 0.00 4 59.1 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.00 9.436e-06 5.971e-06 6.3709e-05 4.2746e-05 2 2 2 53894 53894 1165.58 129.509 0.00 0.000196127 0.000137887 2 2 3 3 69 44 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.02 0.000173861 0.000131604 - k6_N10_mem32K_40nm_i_or_o.xml ch_intrinsics.v common 8.99 vpr 61.77 MiB 0.09 9312 -1 -1 3 0.29 -1 -1 36356 -1 -1 70 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63252 99 130 363 493 1 255 300 19 19 361 o auto 23.1 MiB 0.14 800 61.8 MiB 0.26 0.00 2.24791 -230.459 -2.24791 2.24791 2.91 0.0005582 0.000498419 0.0555622 0.0501035 40 1280 16 1.79173e+07 4.32058e+06 906867. 2512.10 2.16 0.207297 0.189733 1241 12 778 1126 134073 41570 2.55107 2.55107 -252.035 -2.55107 0 0 1.13758e+06 3151.19 0.49 0.07 0.025106 0.0234034 - k6_N10_mem32K_40nm_i_or_o.xml diffeq1.v common 20.07 vpr 71.32 MiB 0.04 9396 -1 -1 15 0.50 -1 -1 34800 -1 -1 52 162 0 5 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73036 162 96 999 932 1 707 315 24 24 576 i auto 27.4 MiB 0.26 7207 71.3 MiB 0.53 0.01 20.2142 -1837.38 -20.2142 20.2142 4.45 0.00145323 0.00131694 0.172225 0.157408 40 12238 26 3.08128e+07 4.78249e+06 1.48112e+06 2571.38 9.30 1.16853 1.08743 11047 26 3966 8287 2230724 516845 22.0014 22.0014 -1964.22 -22.0014 0 0 1.85846e+06 3226.49 0.70 0.44 0.11325 0.107226 - k6_N10_mem32K_40nm_i_or_o.xml single_wire.v common 0.92 vpr 58.94 MiB 0.03 5688 -1 -1 1 0.01 -1 -1 29828 -1 -1 0 1 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60356 1 1 1 2 0 1 2 4 4 16 i auto 20.3 MiB 0.00 3 58.9 MiB 0.02 0.00 0.205011 -0.205011 -0.205011 nan 0.03 2.5743e-05 1.7531e-05 8.4508e-05 5.5426e-05 4 2 1 215576 0 2092.17 130.760 0.01 0.000172542 0.000108545 2 1 1 1 18 8 0.229376 nan -0.229376 -0.229376 0 0 3281.68 205.105 0.00 0.00 5.6908e-05 3.5403e-05 - k6_N10_mem32K_40nm_i_or_o.xml single_ff.v common 0.61 vpr 59.26 MiB 0.01 5860 -1 -1 1 0.01 -1 -1 29824 -1 -1 1 2 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60684 2 1 3 4 1 3 4 4 4 16 i auto 20.5 MiB 0.02 5 59.3 MiB 0.00 0.00 0.669261 -1.04327 -0.669261 0.669261 0.01 9.404e-06 5.885e-06 6.4997e-05 4.4835e-05 6 3 1 215576 53894 3281.68 205.105 0.01 0.000211115 0.000149985 4 2 4 4 89 48 0.652118 0.652118 -1.05145 -0.652118 0 0 4601.64 287.602 0.00 0.00 0.000137064 0.000106037 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml ch_intrinsics.v common 4.95 vpr 65.09 MiB 0.05 9384 -1 -1 3 0.35 -1 -1 34600 -1 -1 75 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66648 99 130 363 493 1 255 305 13 13 169 clb auto 25.3 MiB 0.09 908 74177 24418 37403 12356 65.1 MiB 0.21 0.00 2.24932 -227.778 -2.24932 2.24932 0.43 0.000870718 0.000814627 0.0677126 0.0632932 -1 -1 -1 -1 32 1516 16 6.63067e+06 4.59005e+06 323148. 1912.12 2.19 0.456283 0.413595 11612 59521 -1 1275 27 730 1142 95340 32482 2.40779 2.40779 -232.565 -2.40779 0 0 396943. 2348.77 0.14 0.10 0.06 -1 -1 0.14 0.055174 0.0502939 + k6_N10_mem32K_40nm.xml diffeq1.v common 10.90 vpr 68.98 MiB 0.04 9404 -1 -1 15 0.48 -1 -1 34660 -1 -1 60 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70636 162 96 999 932 1 661 323 16 16 256 mult_36 auto 28.8 MiB 0.31 5495 75599 21207 48608 5784 69.0 MiB 0.55 0.01 21.6615 -1879.46 -21.6615 21.6615 0.70 0.00319094 0.00302093 0.229143 0.215114 -1 -1 -1 -1 44 10097 29 1.21132e+07 5.21364e+06 665287. 2598.78 6.02 1.39802 1.29282 20656 131250 -1 8720 22 3466 7443 973330 268208 22.2123 22.2123 -1936.09 -22.2123 0 0 864808. 3378.16 0.31 0.42 0.14 -1 -1 0.31 0.180893 0.168332 + k6_N10_mem32K_40nm.xml single_wire.v common 0.55 vpr 63.05 MiB 0.01 6576 -1 -1 1 0.02 -1 -1 30004 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64568 1 1 1 2 0 1 2 3 3 9 -1 auto 24.3 MiB 0.00 2 3 0 3 0 63.1 MiB 0.00 0.00 0.18684 -0.18684 -0.18684 nan 0.00 1.1357e-05 6.922e-06 7.8063e-05 5.3338e-05 -1 -1 -1 -1 2 1 1 53894 0 1165.58 129.509 0.00 0.0015524 0.00147403 254 297 -1 1 1 1 1 19 15 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00228467 0.00224801 + k6_N10_mem32K_40nm.xml single_ff.v common 0.54 vpr 62.95 MiB 0.01 6420 -1 -1 1 0.02 -1 -1 30176 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64464 2 1 3 4 1 3 4 3 3 9 -1 auto 24.2 MiB 0.00 6 9 5 1 3 63.0 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.4537e-05 1.0143e-05 0.00010139 7.6283e-05 -1 -1 -1 -1 2 2 2 53894 53894 1165.58 129.509 0.00 0.00162892 0.00154661 254 297 -1 2 2 3 3 56 18 0.577715 0.577715 -0.9588 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.00170661 0.00165742 + k6_N10_mem32K_40nm_i_or_o.xml ch_intrinsics.v common 9.72 vpr 65.00 MiB 0.06 9380 -1 -1 3 0.32 -1 -1 34636 -1 -1 75 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66556 99 130 363 493 1 255 305 19 19 361 o auto 25.3 MiB 0.09 1017 84437 21849 44018 18570 65.0 MiB 0.27 0.00 2.33845 -237.624 -2.33845 2.33845 2.83 0.00101195 0.000938816 0.0893341 0.0836814 -1 -1 -1 -1 36 1395 26 1.79173e+07 4.59005e+06 833707. 2309.44 3.44 0.417472 0.379057 24998 161561 -1 1299 23 891 1465 81711 22668 2.61943 2.61943 -244.023 -2.61943 0 0 1.02328e+06 2834.56 0.39 0.08 0.14 -1 -1 0.39 0.042041 0.0384715 + k6_N10_mem32K_40nm_i_or_o.xml diffeq1.v common 24.30 vpr 83.81 MiB 0.04 9376 -1 -1 15 0.46 -1 -1 34644 -1 -1 60 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 85820 162 96 999 932 1 661 323 24 24 576 i auto 28.7 MiB 0.31 7217 101060 28985 60644 11431 83.8 MiB 0.72 0.01 21.9602 -1888.96 -21.9602 21.9602 4.32 0.00297924 0.00279786 0.307712 0.28877 -1 -1 -1 -1 32 14521 46 3.08128e+07 5.21364e+06 1.24505e+06 2161.54 14.07 1.70494 1.57192 39974 242477 -1 11428 25 4677 10335 1474881 391876 23.1722 23.1722 -1992.17 -23.1722 0 0 1.54255e+06 2678.04 0.44 0.51 0.21 -1 -1 0.44 0.195655 0.181464 + k6_N10_mem32K_40nm_i_or_o.xml single_wire.v common 0.58 vpr 62.93 MiB 0.01 6452 -1 -1 1 0.02 -1 -1 30116 -1 -1 0 1 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64440 1 1 1 2 0 1 2 4 4 16 i auto 24.2 MiB 0.00 3 3 0 0 3 62.9 MiB 0.00 0.00 0.280667 -0.280667 -0.280667 nan 0.01 9.703e-06 5.942e-06 7.6566e-05 5.0557e-05 -1 -1 -1 -1 4 2 1 215576 0 2092.17 130.760 0.01 0.00148096 0.00139624 324 600 -1 2 1 1 1 16 6 0.229376 nan -0.229376 -0.229376 0 0 3281.68 205.105 0.00 0.00 0.00 -1 -1 0.00 0.00141364 0.00138107 + k6_N10_mem32K_40nm_i_or_o.xml single_ff.v common 0.64 vpr 62.77 MiB 0.01 6452 -1 -1 1 0.04 -1 -1 29928 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64280 2 1 3 4 1 3 4 4 4 16 i auto 24.0 MiB 0.00 7 9 0 2 7 62.8 MiB 0.00 0.00 0.647256 -1.07419 -0.647256 0.647256 0.01 1.9097e-05 1.4095e-05 0.000118864 8.987e-05 -1 -1 -1 -1 6 3 2 215576 53894 3281.68 205.105 0.01 0.00164593 0.00153585 340 760 -1 3 2 3 3 71 25 0.569757 0.569757 -0.969092 -0.569757 0 0 4601.64 287.602 0.00 0.00 0.00 -1 -1 0.00 0.00152593 0.00147741 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bounding_box/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bounding_box/config/golden_results.txt index 52c459a24dd..b913a54f802 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bounding_box/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_bounding_box/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 2.34 vpr 61.05 MiB 0.06 9908 -1 -1 4 0.18 -1 -1 33196 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62520 11 30 262 292 2 104 60 7 7 49 clb auto 22.3 MiB 0.14 418 61.1 MiB 0.01 0.00 -1 -1 -1 -1 -1 0 0 0 0 22 604 27 1.07788e+06 1.02399e+06 54623.3 1114.76 0.19 0.0699607 0.0599014 609 25 940 2233 101257 31301 2.66326 2.39639 -188.778 -2.66326 0 0 69322.2 1414.74 0.02 0.06 0.0311882 0.0275467 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.03 vpr 64.66 MiB 0.05 9936 -1 -1 4 0.20 -1 -1 33284 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66212 11 30 262 292 2 99 60 7 7 49 clb auto 24.9 MiB 0.09 440 2400 452 1846 102 64.7 MiB 0.01 0.00 -1 -1 -1 -1 -1 0 0 0 0 -1 -1 -1 -1 18 660 35 1.07788e+06 1.02399e+06 45686.6 932.380 0.48 0.165713 0.138611 2616 8308 -1 541 24 785 1721 49987 17392 2.55392 2.37233 -184.833 -2.55392 0 0 59124.6 1206.62 0.01 0.07 0.01 -1 -1 0.01 0.0397954 0.0348173 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_check_route_options/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_check_route_options/config/golden_results.txt index 45cafed5026..eb38f9839e9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_check_route_options/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_check_route_options/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - sub_tiles.xml sub_tiles.blif common_--check_route_full 7.71 vpr 53.59 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 54872 6 7 19 26 0 19 26 3 3 9 -1 auto 15.1 MiB 0.00 38 53.6 MiB 0.01 0.00 3.87729 -27.141 -3.87729 nan 6.43 1.9421e-05 1.3887e-05 0.000120989 9.3561e-05 6 19 3 14813.4 192574 -1 -1 0.16 0.000645816 0.000509144 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.02 0.000324679 0.000268526 - sub_tiles.xml sub_tiles.blif common_--check_route_quick 8.59 vpr 53.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 54896 6 7 19 26 0 19 26 3 3 9 -1 auto 15.2 MiB 0.00 38 53.6 MiB 0.07 0.00 3.87729 -27.141 -3.87729 nan 7.40 4.0217e-05 3.3197e-05 0.000211242 0.000173692 6 19 3 14813.4 192574 -1 -1 0.14 0.00111429 0.000954268 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.01 0.000317811 0.000266852 - sub_tiles.xml sub_tiles.blif common_--check_route_off 7.70 vpr 53.83 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 55124 6 7 19 26 0 19 26 3 3 9 -1 auto 15.4 MiB 0.00 38 53.8 MiB 0.05 0.01 3.87729 -27.141 -3.87729 nan 6.39 3.009e-05 2.2938e-05 0.000185462 0.000145411 6 19 3 14813.4 192574 -1 -1 0.16 0.000756205 0.000608162 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.000226261 0.000180039 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + sub_tiles.xml sub_tiles.blif common_--check_route_full 6.55 vpr 56.57 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57924 6 7 19 26 0 19 26 3 3 9 -1 auto 17.8 MiB 0.01 51 216 43 63 110 56.6 MiB 0.00 0.00 3.682 -25.774 -3.682 nan 5.46 4.4866e-05 3.8779e-05 0.000407849 0.000352025 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.09 0.0024538 0.00222966 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.04 -1 -1 0.00 0.00174299 0.00165115 + sub_tiles.xml sub_tiles.blif common_--check_route_quick 7.53 vpr 56.73 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58092 6 7 19 26 0 19 26 3 3 9 -1 auto 18.1 MiB 0.00 51 216 43 63 110 56.7 MiB 0.00 0.00 3.682 -25.774 -3.682 nan 6.42 3.9294e-05 3.2838e-05 0.000360177 0.000299223 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.11 0.00240249 0.00218766 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.04 -1 -1 0.00 0.00179459 0.00169524 + sub_tiles.xml sub_tiles.blif common_--check_route_off 6.86 vpr 56.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57856 6 7 19 26 0 19 26 3 3 9 -1 auto 17.8 MiB 0.00 51 216 43 63 110 56.5 MiB 0.00 0.00 3.682 -25.774 -3.682 nan 5.82 4.4091e-05 3.8299e-05 0.000449038 0.000394449 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.08 0.00230139 0.00207606 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.04 -1 -1 0.00 0.00164487 0.00155669 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_cin_tie_off/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_cin_tie_off/config/golden_results.txt index cd1c68f4910..573110a1f9d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_cin_tie_off/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_cin_tie_off/config/golden_results.txt @@ -1,3 +1,3 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length - k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.21 vpr 63.90 MiB 0.01 5888 -1 -1 1 0.02 -1 -1 35760 -1 -1 3 9 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 65436 9 8 71 66 1 35 20 5 5 25 clb auto 25.5 MiB 0.55 102 371 120 247 4 63.9 MiB 0.01 0.00 2.68643 -28.5368 -2.68643 2.68643 0.03 0.000105979 9.1341e-05 0.00248903 0.00227506 -1 -1 -1 -1 34 229 25 151211 75605.7 45067.1 1802.68 0.09 0.022787 0.019687 2028 7167 -1 171 16 182 242 7354 3960 3.16043 3.16043 -38.0845 -3.16043 0 0 54748.7 2189.95 0.01 0.01 0.01 -1 -1 0.01 0.00650462 0.00600276 14 17 16 6 0 0 - k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 5.11 vpr 65.14 MiB 0.01 6144 -1 -1 1 0.02 -1 -1 34136 -1 -1 8 19 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66708 19 18 299 240 1 150 45 6 6 36 clb auto 26.9 MiB 3.57 505 2525 548 1948 29 65.1 MiB 0.04 0.00 4.80824 -97.6181 -4.80824 4.80824 0.06 0.000351768 0.000312054 0.0152117 0.0138406 -1 -1 -1 -1 68 855 19 403230 201615 143382. 3982.83 0.68 0.159122 0.139456 4366 25715 -1 697 19 708 1171 41239 15710 5.0764 5.0764 -103.347 -5.0764 0 0 176130. 4892.50 0.02 0.04 0.03 -1 -1 0.02 0.0232049 0.021551 62 82 85 13 0 0 + k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_4x4.v common 1.67 vpr 63.84 MiB 0.01 6676 -1 -1 1 0.03 -1 -1 30204 -1 -1 3 9 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65376 9 8 71 66 1 35 20 5 5 25 clb auto 24.5 MiB 0.59 106 155 56 98 1 63.8 MiB 0.01 0.00 2.68643 -28.4691 -2.68643 2.68643 0.03 0.000140881 0.000128293 0.00202868 0.00191784 -1 -1 -1 -1 24 237 22 151211 75605.7 33517.4 1340.70 0.18 0.041091 0.034289 1884 5578 -1 191 17 213 274 8835 4764 3.58807 3.58807 -39.9558 -3.58807 0 0 43252.0 1730.08 0.00 0.02 0.01 -1 -1 0.00 0.00832021 0.00744946 14 17 16 6 0 0 + k6_frac_N10_4add_2chains_tie_off_depop50_mem20K_22nm.xml mult_9x9.v common 6.57 vpr 65.18 MiB 0.01 6688 -1 -1 1 0.04 -1 -1 30640 -1 -1 8 19 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66748 19 18 299 240 1 146 45 6 6 36 clb auto 25.6 MiB 4.69 492 845 209 626 10 65.2 MiB 0.02 0.00 4.85986 -99.0252 -4.85986 4.85986 0.05 0.000469766 0.000432273 0.00954877 0.00903161 -1 -1 -1 -1 50 1141 29 403230 201615 107229. 2978.57 0.79 0.20538 0.176607 3946 19047 -1 909 23 1044 1578 59654 24287 5.61482 5.61482 -122.009 -5.61482 0 0 134937. 3748.26 0.02 0.06 0.02 -1 -1 0.02 0.032608 0.0295156 62 82 85 13 0 0 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases/config/golden_results.txt index 39d7267adf0..bd8837584d4 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases/config/golden_results.txt @@ -1,4 +1,4 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk.sdc 5.41 vpr 210.32 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success 5941692-dirty release IPO VTR_ASSERT_LEVEL=3 sanitizers GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-27T23:00:35 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64611 1 4 28 32 2 10 9 4 4 16 clb auto 51.6 MiB 0.14 20 27 15 8 4 193.4 MiB 0.03 0.00 2.44626 0 0 2.44626 0.51 0.000583141 0.000535113 0.00311475 0.00261673 8 12 5 72000 72000 5593.62 349.601 2.10 0.0862302 0.0767113 672 1128 -1 12 6 24 24 485 152 2.38921 2.38921 0 0 0 0 6492.02 405.751 0.01 0.04 0.17 -1 -1 0.01 0.0109455 0.00960207 -timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk_assign.sdc 7.10 vpr 394.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success 5941692-dirty release IPO VTR_ASSERT_LEVEL=3 sanitizers GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-27T23:00:35 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 80782 1 4 28 32 2 10 9 4 4 16 clb auto 51.6 MiB 0.14 20 27 15 8 4 193.6 MiB 0.03 0.00 2.44626 0 0 2.44626 0.51 0.000585834 0.000538181 0.00313704 0.0026163 8 12 5 72000 72000 5593.62 349.601 2.10 0.0854666 0.0759832 672 1128 -1 12 6 24 24 485 152 2.38921 2.38921 0 0 0 0 6492.02 405.751 0.01 0.04 0.17 -1 -1 0.01 0.0110022 0.00964644 -timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/counter_clk.sdc 5.33 vpr 210.00 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success 5941692-dirty release IPO VTR_ASSERT_LEVEL=3 sanitizers GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-27T23:00:35 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64510 1 4 28 32 2 10 9 4 4 16 clb auto 51.7 MiB 0.14 20 27 15 8 4 193.7 MiB 0.03 0.00 2.44626 0 0 2.44626 0.50 0.000588315 0.000539577 0.00308844 0.0026033 8 12 5 72000 72000 5593.62 349.601 2.09 0.0840539 0.0747826 672 1128 -1 12 6 24 24 485 152 2.38921 2.38921 0 0 0 0 6492.02 405.751 0.01 0.04 0.17 -1 -1 0.01 0.0100088 0.0087372 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk.sdc 0.38 vpr 57.45 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58828 1 4 28 32 2 10 9 4 4 16 clb auto 18.5 MiB 0.01 21 27 11 8 8 57.4 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 6.9608e-05 6.1171e-05 0.000528542 0.000484521 -1 -1 -1 -1 8 12 5 72000 72000 5593.62 349.601 0.03 0.00817962 0.0068183 672 1128 -1 13 8 23 23 458 156 2.39017 2.39017 0 0 0 0 6492.02 405.751 0.00 0.01 0.00 -1 -1 0.00 0.00303766 0.0027903 + timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/clk_assign.sdc 0.40 vpr 57.54 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58924 1 4 28 32 2 10 9 4 4 16 clb auto 18.6 MiB 0.01 21 27 11 8 8 57.5 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 6.7493e-05 5.9709e-05 0.00053006 0.00048841 -1 -1 -1 -1 8 12 5 72000 72000 5593.62 349.601 0.03 0.00837217 0.00702901 672 1128 -1 13 8 23 23 458 156 2.39017 2.39017 0 0 0 0 6492.02 405.751 0.00 0.00 0.00 -1 -1 0.00 0.00268284 0.00246934 + timing/k6_N10_40nm.xml clock_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/counter_clk.sdc 0.45 vpr 57.49 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58868 1 4 28 32 2 10 9 4 4 16 clb auto 18.4 MiB 0.01 21 27 11 8 8 57.5 MiB 0.00 0.00 2.44626 0 0 2.44626 0.01 6.8738e-05 6.0915e-05 0.000598804 0.000552999 -1 -1 -1 -1 8 12 5 72000 72000 5593.62 349.601 0.03 0.00819817 0.00689289 672 1128 -1 13 8 23 23 458 156 2.39017 2.39017 0 0 0 0 6492.02 405.751 0.00 0.01 0.00 -1 -1 0.00 0.00319689 0.00291899 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases_set_delay/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases_set_delay/config/golden_results.txt index b5f2f1a2242..c24f6849f4e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases_set_delay/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_aliases_set_delay/config/golden_results.txt @@ -1,2 +1,2 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - timing/k6_N10_40nm.xml clock_set_delay_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/set_delay.sdc 0.20 vpr 57.67 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 2 -1 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 59056 2 2 22 24 2 4 6 4 4 16 clb auto 19.2 MiB 0.00 8 15 5 8 2 57.7 MiB 0.00 0.00 1.297 0 0 1.297 0.01 4.7147e-05 3.8732e-05 0.000324416 0.000284392 -1 -1 -1 -1 6 13 3 72000 36000 4025.56 251.598 0.01 0.00265373 0.002411 660 1032 -1 12 5 7 7 429 325 1.297 1.297 0 0 0 0 5593.62 349.601 0.00 0.00 0.00 -1 -1 0.00 0.00202488 0.00190683 + timing/k6_N10_40nm.xml clock_set_delay_aliases.blif common_-sdc_file_sdc/samples/clock_aliases/set_delay.sdc 0.46 vpr 57.33 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58704 2 2 22 24 2 4 6 4 4 16 clb auto 18.4 MiB 0.01 8 15 5 7 3 57.3 MiB 0.00 0.00 1.297 0 0 1.297 0.01 5.2494e-05 4.4634e-05 0.000448571 0.000405419 -1 -1 -1 -1 6 12 3 72000 36000 4025.56 251.598 0.01 0.00281216 0.00261739 660 1032 -1 15 4 8 8 614 487 1.297 1.297 0 0 0 0 5593.62 349.601 0.00 0.00 0.00 -1 -1 0.00 0.00226716 0.00212992 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_buf/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_buf/config/golden_results.txt index ce46084d4cd..82ec46d8b99 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_buf/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_buf/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack -k6_frac_N10_mem32K_40nm_clk_buf.xml multiclock_buf.blif common 1.65996 0.545 -1 -1 -1 0.545 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.293 -1 -1 -1 0.293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params crit_path_delay_mcw clk_to_clk_cpd clk_to_clk2_cpd clk_to_input_cpd clk_to_output_cpd clk2_to_clk2_cpd clk2_to_clk_cpd clk2_to_input_cpd clk2_to_output_cpd input_to_input_cpd input_to_clk_cpd input_to_clk2_cpd input_to_output_cpd output_to_output_cpd output_to_clk_cpd output_to_clk2_cpd output_to_input_cpd clk_to_clk_setup_slack clk_to_clk2_setup_slack clk_to_input_setup_slack clk_to_output_setup_slack clk2_to_clk2_setup_slack clk2_to_clk_setup_slack clk2_to_input_setup_slack clk2_to_output_setup_slack input_to_input_setup_slack input_to_clk_setup_slack input_to_clk2_setup_slack input_to_output_setup_slack output_to_output_setup_slack output_to_clk_setup_slack output_to_clk2_setup_slack output_to_input_setup_slack clk_to_clk_hold_slack clk_to_clk2_hold_slack clk_to_input_hold_slack clk_to_output_hold_slack clk2_to_clk2_hold_slack clk2_to_clk_hold_slack clk2_to_input_hold_slack clk2_to_output_hold_slack input_to_input_hold_slack input_to_clk_hold_slack input_to_clk2_hold_slack input_to_output_hold_slack output_to_output_hold_slack output_to_clk_hold_slack output_to_clk2_hold_slack output_to_input_hold_slack + k6_frac_N10_mem32K_40nm_clk_buf.xml multiclock_buf.blif common 1.66039 0.545 -1 -1 -1 0.545 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.293 -1 -1 -1 0.293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_modeling/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_modeling/config/golden_results.txt index d7326037de0..cfd2d545cc8 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_modeling/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_modeling/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets -timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 0.39 vpr 55.65 MiB 0.01 5304 -1 -1 1 0.02 -1 -1 29860 -1 -1 1 2 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 56988 2 1 3 4 1 3 4 3 3 9 -1 auto 17.0 MiB 0.00 4 9 3 5 1 55.7 MiB 0.00 0.00 0.55447 -0.91031 -0.55447 0.55447 0.00 1.8112e-05 1.3932e-05 0.000106888 8.4131e-05 -1 2 4 18000 18000 14049.7 1561.07 0.00 0.00149512 0.00141287 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 0.38 vpr 55.80 MiB 0.01 5568 -1 -1 1 0.02 -1 -1 29836 -1 -1 1 2 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 57136 2 1 3 4 1 3 4 3 3 9 -1 auto 17.1 MiB 0.00 6 9 3 3 3 55.8 MiB 0.00 0.00 0.48631 -0.91031 -0.48631 0.48631 0.00 1.786e-05 1.3541e-05 0.000108501 8.4499e-05 -1 4 3 18000 18000 15707.9 1745.32 0.00 0.00125946 0.00117972 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 -timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 4.57 odin 57.74 MiB 0.44 59128 -1 -1 2 1.00 -1 -1 50540 -1 -1 155 5 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 59096 5 156 191 347 1 163 316 15 15 225 clb auto 19.0 MiB 0.05 24 86316 62042 3302 20972 57.7 MiB 0.17 0.00 1.49664 -15.0848 -1.49664 1.49664 0.00 0.000746 0.000696457 0.0607321 0.0565964 -1 47 5 3.042e+06 2.79e+06 863192. 3836.41 0.01 0.0720555 0.0669855 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 154 9 -timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 5.13 odin 57.83 MiB 0.45 59220 -1 -1 2 0.99 -1 -1 50572 -1 -1 155 5 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 59132 5 156 191 347 1 163 316 15 15 225 clb auto 19.1 MiB 0.05 25 85241 61080 3527 20634 57.7 MiB 0.17 0.00 1.47767 -14.6118 -1.47767 1.47767 0.00 0.000728861 0.000679413 0.0591504 0.0549881 -1 53 7 3.042e+06 2.79e+06 892591. 3967.07 0.02 0.0725828 0.0673116 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 153 10 -timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 0.43 vpr 61.20 MiB 0.02 6080 -1 -1 1 0.02 -1 -1 29764 -1 -1 1 2 0 0 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 62672 2 1 3 4 1 3 4 3 3 9 -1 auto 22.7 MiB 0.00 4 9 3 5 1 61.2 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.7649e-05 1.3505e-05 0.000104171 8.1619e-05 -1 2 3 53894 53894 12370.0 1374.45 0.00 0.00133506 0.00125459 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 0.41 vpr 61.33 MiB 0.02 6080 -1 -1 1 0.02 -1 -1 29968 -1 -1 1 2 0 0 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 62800 2 1 3 4 1 3 4 3 3 9 -1 auto 22.8 MiB 0.00 6 9 3 3 3 61.3 MiB 0.00 0.00 0.48631 -0.90831 -0.48631 0.48631 0.00 1.7971e-05 1.3339e-05 0.000105105 7.9721e-05 -1 4 2 53894 53894 14028.3 1558.70 0.00 0.00124985 0.00117578 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 -timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 5.57 vpr 68.89 MiB 0.19 16692 -1 -1 2 0.14 -1 -1 33648 -1 -1 32 311 15 0 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 70540 311 156 972 1128 1 953 514 28 28 784 memory auto 29.1 MiB 0.41 9073 200140 73604 116694 9842 68.9 MiB 1.48 0.02 4.11528 -4377.89 -4.11528 4.11528 0.00 0.00892116 0.00789175 0.893716 0.790022 -1 13615 17 4.25198e+07 9.94461e+06 2.96205e+06 3778.13 0.63 1.23919 1.10313 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 15 938 -timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 5.78 vpr 68.87 MiB 0.19 16732 -1 -1 2 0.13 -1 -1 33696 -1 -1 32 311 15 0 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 70524 311 156 972 1128 1 953 514 28 28 784 memory auto 29.1 MiB 0.45 8245 202198 67541 121665 12992 68.9 MiB 1.50 0.02 3.98528 -3538.17 -3.98528 3.98528 0.00 0.00892513 0.00789066 0.899827 0.793649 -1 12975 16 4.25198e+07 9.94461e+06 3.02951e+06 3864.17 0.62 1.22959 1.0924 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 14 939 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets + timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 0.41 vpr 57.28 MiB 0.00 6388 -1 -1 1 0.03 -1 -1 29960 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58652 2 1 3 4 1 3 4 3 3 9 -1 auto 18.6 MiB 0.00 6 9 3 5 1 57.3 MiB 0.04 0.00 0.55447 -0.91031 -0.55447 0.55447 0.00 2.1796e-05 1.6522e-05 0.000193754 0.00015861 -1 -1 -1 -1 -1 2 4 18000 18000 14049.7 1561.07 0.00 0.00168667 0.00157156 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 + timing/k6_N10_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 0.39 vpr 57.19 MiB 0.00 6340 -1 -1 1 0.03 -1 -1 29884 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58560 2 1 3 4 1 3 4 3 3 9 -1 auto 18.5 MiB 0.00 9 9 3 3 3 57.2 MiB 0.00 0.00 0.48631 -0.91031 -0.48631 0.48631 0.00 1.7329e-05 1.1723e-05 0.000120696 9.1803e-05 -1 -1 -1 -1 -1 4 3 18000 18000 15707.9 1745.32 0.00 0.00149934 0.00140654 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 + timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 5.17 vpr 59.21 MiB 0.36 59164 -1 -1 2 1.59 -1 -1 50532 -1 -1 155 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60628 5 156 191 347 1 163 316 15 15 225 clb auto 19.6 MiB 0.04 29 84166 60542 3208 20416 59.2 MiB 0.13 0.00 1.49664 -15.1312 -1.49664 1.49664 0.00 0.000406843 0.000383604 0.0325033 0.0306122 -1 -1 -1 -1 -1 40 7 3.042e+06 2.79e+06 863192. 3836.41 0.01 0.0416902 0.0390742 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 154 9 + timing/k6_N10_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 5.29 vpr 59.23 MiB 0.44 59264 -1 -1 2 1.66 -1 -1 50664 -1 -1 155 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60656 5 156 191 347 1 163 316 15 15 225 clb auto 19.6 MiB 0.04 36 74491 53339 3165 17987 59.2 MiB 0.11 0.00 1.49775 -14.6149 -1.49775 1.49775 0.00 0.000376659 0.000354057 0.027722 0.0260055 -1 -1 -1 -1 -1 54 6 3.042e+06 2.79e+06 892591. 3967.07 0.01 0.0361212 0.0337603 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 153 10 + timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 0.34 vpr 62.88 MiB 0.01 6524 -1 -1 1 0.03 -1 -1 30032 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64384 2 1 3 4 1 3 4 3 3 9 -1 auto 24.1 MiB 0.00 6 9 3 5 1 62.9 MiB 0.00 0.00 0.55247 -0.90831 -0.55247 0.55247 0.00 1.8462e-05 1.3116e-05 0.000143184 0.000107932 -1 -1 -1 -1 -1 2 3 53894 53894 12370.0 1374.45 0.00 0.00154548 0.00142994 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 + timing/k6_N10_mem32K_40nm.xml microbenchmarks/d_flip_flop.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 0.38 vpr 62.88 MiB 0.01 6520 -1 -1 1 0.02 -1 -1 29980 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64388 2 1 3 4 1 3 4 3 3 9 -1 auto 24.1 MiB 0.00 9 9 3 3 3 62.9 MiB 0.00 0.00 0.48631 -0.90831 -0.48631 0.48631 0.00 1.7389e-05 1.2439e-05 0.000110474 8.1262e-05 -1 -1 -1 -1 -1 4 2 53894 53894 14028.3 1558.70 0.00 0.00162603 0.00153736 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0 3 + timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_ideal_--route_chan_width_60 4.85 vpr 69.68 MiB 0.15 16496 -1 -1 2 0.15 -1 -1 33692 -1 -1 43 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71352 311 156 972 1128 1 953 525 28 28 784 memory auto 30.0 MiB 0.53 9455 210108 77830 122308 9970 69.7 MiB 1.15 0.02 3.97422 -4336.45 -3.97422 3.97422 0.00 0.00487926 0.00437885 0.503553 0.447369 -1 -1 -1 -1 -1 13425 12 4.25198e+07 1.05374e+07 2.96205e+06 3778.13 0.40 0.699755 0.628908 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 15 938 + timing/k6_N10_mem32K_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_route_--route_chan_width_60 5.65 vpr 69.53 MiB 0.19 16512 -1 -1 2 0.16 -1 -1 33768 -1 -1 43 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 71200 311 156 972 1128 1 953 525 28 28 784 memory auto 29.9 MiB 0.55 9870 203757 68308 124561 10888 69.5 MiB 1.17 0.02 3.91483 -3854.15 -3.91483 3.91483 0.00 0.00501054 0.00442487 0.50283 0.44465 -1 -1 -1 -1 -1 13822 12 4.25198e+07 1.05374e+07 3.02951e+06 3864.17 0.47 0.720818 0.646017 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 14 939 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_pll/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_pll/config/golden_results.txt index 32f3b9951ab..0dd8c10602e 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_pll/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_clock_pll/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_frac_N10_mem32K_40nm_clk_pll_valid.xml multiclock_buf.blif common 0.72 vpr 59.88 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 61320 8 4 25 28 5 19 19 6 6 36 clb auto 21.4 MiB 0.44 45 59.9 MiB 0.00 0.00 1.34532 -5.6855 -1.34532 0.545 0.00 3.1514e-05 2.0123e-05 0.000405222 0.000298853 83 15 15 852 323 431152 215576 56755.0 1576.53 2 1.71428 0.545 -6.99972 -1.71428 -0.369657 -0.225079 59.9 MiB 0.00 0.00105149 0.000848223 59.9 MiB 0.01 - k6_frac_N10_mem32K_40nm_clk_pll_invalid.xml multiclock_buf.blif common 0.11 vpr 16.49 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 16884 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_mem32K_40nm_clk_pll_valid.xml multiclock_buf.blif common 0.74 vpr 63.63 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65156 8 4 25 28 5 19 19 6 6 36 clb auto 24.9 MiB 0.49 52 194 34 129 31 63.6 MiB 0.00 0.00 1.3678 -5.84519 -1.3678 0.545 0.00 5.5961e-05 4.3116e-05 0.000686942 0.000559692 -1 -1 -1 -1 94 6.71429 38 2.71429 16 16 1079 432 431152 215576 56755.0 1576.53 2 2184 7490 -1 1.70371 0.545 -7.0897 -1.70371 -0.508975 -0.416549 0.01 -1 -1 63.6 MiB 0.00 0.00293536 0.0026611 63.6 MiB -1 0.01 + k6_frac_N10_mem32K_40nm_clk_pll_invalid.xml multiclock_buf.blif common 0.04 vpr 18.31 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 18748 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_constant_outputs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_constant_outputs/config/golden_results.txt index 35253fe96c2..4ff0e8b463a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_constant_outputs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_constant_outputs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml constant_outputs_only.blif common 0.50 vpr 59.27 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 0 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60692 -1 2 2 4 0 2 4 4 4 16 clb auto 20.7 MiB 0.00 0 59.3 MiB 0.00 0.00 nan 0 0 nan 0.01 8.462e-06 4.16e-06 5.4508e-05 3.2801e-05 2 0 1 107788 107788 1342.00 83.8749 0.01 0.000156079 9.966e-05 0 1 0 0 0 0 nan nan 0 0 0 0 1342.00 83.8749 0.00 0.00 8.0893e-05 5.9489e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml constant_outputs_only.blif common 0.50 vpr 62.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64284 -1 2 2 4 0 2 4 4 4 16 clb auto 24.1 MiB 0.01 0 9 0 2 7 62.8 MiB 0.00 0.00 nan 0 0 nan 0.01 1.5871e-05 9.709e-06 0.000102284 7.0143e-05 -1 -1 -1 -1 2 0 1 107788 107788 1342.00 83.8749 0.00 0.00143641 0.00135809 504 462 -1 0 1 0 0 0 0 nan nan 0 0 0 0 1342.00 83.8749 0.00 0.00 0.00 -1 -1 0.00 0.00160323 0.00154708 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_grid/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_grid/config/golden_results.txt index ec0dbc9b080..be7b1d7e3c9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_grid/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_grid/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -fixed_grid.xml raygentop.v common 29.50 vpr 85.37 MiB 0.51 31612 -1 -1 3 1.11 -1 -1 40528 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 87416 214 305 2963 2869 1 1445 639 25 25 625 -1 25x25 47.5 MiB 3.21 11979 308751 110398 180203 18150 85.4 MiB 2.88 0.05 4.43472 -2560.47 -4.43472 4.43472 1.88 0.00830899 0.007604 0.972452 0.889994 54 24520 26 3.19446e+07 9.20413e+06 2.17988e+06 3487.81 12.32 3.40026 3.10319 67491 446444 -1 20653 17 5587 12191 3073452 717582 4.85783 4.85783 -3021 -4.85783 0 0 2.83116e+06 4529.85 0.80 1.04 0.47 -1 -1 0.80 0.383522 0.357737 -column_io.xml raygentop.v common 40.34 vpr 85.36 MiB 0.49 31700 -1 -1 3 1.13 -1 -1 40528 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 87404 214 305 2963 2869 1 1445 639 25 25 625 io auto 47.6 MiB 3.29 11081 231723 78740 126185 26798 85.4 MiB 2.24 0.04 4.37418 -2576.21 -4.37418 4.37418 1.71 0.00822254 0.00752049 0.723646 0.661916 50 27102 45 2.82259e+07 9.20413e+06 1.88190e+06 3011.03 23.82 2.85787 2.60759 58512 365993 -1 21209 21 7621 16512 4861881 1101015 4.87754 4.87754 -3109.98 -4.87754 0 0 2.41964e+06 3871.43 0.70 1.43 0.38 -1 -1 0.70 0.434873 0.403337 -multiwidth_blocks.xml raygentop.v common 30.07 vpr 85.49 MiB 0.52 31612 -1 -1 3 1.15 -1 -1 40544 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 87544 214 305 2963 2869 1 1445 639 19 19 361 io clb auto 47.7 MiB 3.26 12257 239976 83775 138869 17332 85.5 MiB 2.37 0.04 4.3993 -2505.73 -4.3993 4.3993 0.91 0.00839758 0.00748059 0.763174 0.698023 66 25767 35 1.65001e+07 9.20413e+06 1.25644e+06 3480.44 15.81 4.10154 3.73775 36241 232109 -1 21177 19 6557 14496 2185517 551969 4.72293 4.72293 -3014.1 -4.72293 0 0 1.57029e+06 4349.83 0.38 0.89 0.28 -1 -1 0.38 0.407758 0.379247 -non_column.xml raygentop.v common 46.83 vpr 109.76 MiB 0.69 31936 -1 -1 3 1.10 -1 -1 40448 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 112396 214 305 2963 2869 1 1445 639 33 33 1089 io auto 49.1 MiB 3.28 13840 253731 88984 142185 22562 101.2 MiB 2.38 0.04 4.43258 -2762.41 -4.43258 4.43258 4.25 0.00814729 0.00744498 0.79964 0.731137 50 28348 35 5.44432e+07 9.20413e+06 3.08604e+06 2833.83 25.10 3.93534 3.58375 97038 591669 -1 23690 19 6651 15060 1924558 473952 4.86468 4.86468 -3379.83 -4.86468 0 0 3.94237e+06 3620.18 1.07 0.82 0.90 -1 -1 1.07 0.395332 0.366941 -non_column_tall_aspect_ratio.xml raygentop.v common 34.95 vpr 100.67 MiB 0.77 31772 -1 -1 3 1.09 -1 -1 40492 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 103088 214 305 2963 2869 1 1445 639 23 46 1058 io auto 49.2 MiB 3.25 13067 237225 85620 120305 31300 99.4 MiB 2.32 0.05 4.42151 -2639.88 -4.42151 4.42151 4.04 0.00822522 0.0074872 0.766549 0.70022 46 28130 47 5.05849e+07 9.20413e+06 2.86338e+06 2706.41 13.52 2.9289 2.6715 93033 563632 -1 23281 25 7702 17713 2413970 585378 5.56999 5.56999 -3085.92 -5.56999 0 0 3.65934e+06 3458.74 1.01 1.05 0.88 -1 -1 1.01 0.489348 0.452394 -non_column_wide_aspect_ratio.xml raygentop.v common 45.18 vpr 105.08 MiB 0.73 31964 -1 -1 3 1.20 -1 -1 40464 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 107600 214 305 2963 2869 1 1445 639 43 22 946 io auto 49.2 MiB 3.33 14628 286743 103736 161740 21267 94.0 MiB 2.65 0.03 4.66312 -2857.17 -4.66312 4.66312 3.56 0.00820152 0.00748904 0.893415 0.816363 48 30405 49 4.55909e+07 9.20413e+06 2.61331e+06 2762.48 24.03 4.32522 3.93873 83758 506094 -1 24330 19 6934 15845 2142600 519981 5.53004 5.53004 -3403.95 -5.53004 0 0 3.33573e+06 3526.14 0.89 0.87 0.81 -1 -1 0.89 0.400701 0.372313 -custom_sbloc.xml raygentop.v common 27.65 vpr 85.42 MiB 0.48 31724 -1 -1 3 1.08 -1 -1 40556 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 87472 214 305 2963 2869 1 1445 639 19 19 361 io clb auto 47.7 MiB 3.27 11486 239976 77712 142958 19306 85.4 MiB 2.35 0.04 4.38654 -2594.7 -4.38654 4.38654 0.91 0.00827838 0.00756429 0.766518 0.701997 64 23160 25 1.65001e+07 9.20413e+06 1.19565e+06 3312.06 13.81 3.84549 3.50846 35881 230269 -1 20147 19 6185 13878 1906817 453021 4.72145 4.72145 -3033.78 -4.72145 0 0 1.50465e+06 4168.01 0.34 0.83 0.28 -1 -1 0.34 0.407671 0.379453 -multiple_io_types.xml raygentop.v common 197.39 vpr 493.12 MiB 0.51 31640 -1 -1 3 1.09 -1 -1 40448 -1 -1 112 214 0 8 success v8.0.0-10581-gcdfc1c601-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-09T21:17:41 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 504952 214 305 2963 2869 1 1445 639 67 67 4489 io_left auto 47.8 MiB 4.62 24549 94173 4606 23066 66501 493.1 MiB 1.06 0.03 4.36509 -3314.8 -4.36509 4.36509 36.32 0.00776904 0.00708327 0.306469 0.281446 50 42588 38 2.48753e+08 9.20413e+06 1.23326e+07 2747.29 128.16 3.37579 3.07255 397497 2315172 -1 36081 22 8536 19104 4791078 1096048 5.41781 5.41781 -3906.75 -5.41781 0 0 1.58642e+07 3534.01 4.87 1.48 2.55 -1 -1 4.87 0.434377 0.401511 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + fixed_grid.xml raygentop.v common 33.90 vpr 92.21 MiB 0.48 31696 -1 -1 3 1.32 -1 -1 40548 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 94428 214 305 2963 2869 1 1444 650 25 25 625 -1 25x25 44.0 MiB 3.82 12566 298934 100179 176792 21963 84.9 MiB 2.12 0.03 4.48882 -2692.89 -4.48882 4.48882 2.29 0.00709216 0.00653764 0.858961 0.793235 -1 -1 -1 -1 56 23237 32 3.19446e+07 9.79696e+06 2.27235e+06 3635.76 16.01 3.41745 3.12097 68115 457904 -1 20684 16 5341 11970 1408411 380795 4.73758 4.73758 -2976.98 -4.73758 0 0 2.89946e+06 4639.14 0.78 0.63 0.39 -1 -1 0.78 0.342569 0.318423 + column_io.xml raygentop.v common 38.50 vpr 84.88 MiB 0.44 31584 -1 -1 3 1.32 -1 -1 40468 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86916 214 305 2963 2869 1 1444 650 25 25 625 io auto 44.1 MiB 3.74 11473 259538 92955 142257 24326 84.9 MiB 2.04 0.03 4.47884 -2622.54 -4.47884 4.47884 2.19 0.00782519 0.00725944 0.825246 0.760138 -1 -1 -1 -1 46 25888 44 2.82259e+07 9.79696e+06 1.74878e+06 2798.05 21.24 3.9598 3.60408 57264 344844 -1 20796 16 6055 13443 1912977 469313 4.80041 4.80041 -2970.49 -4.80041 0 0 2.25408e+06 3606.53 0.58 0.69 0.30 -1 -1 0.58 0.341447 0.317119 + multiwidth_blocks.xml raygentop.v common 25.55 vpr 84.75 MiB 0.46 31704 -1 -1 3 1.40 -1 -1 40456 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86780 214 305 2963 2869 1 1444 650 19 19 361 io clb auto 44.0 MiB 3.78 11816 245468 79004 142595 23869 84.7 MiB 1.98 0.03 4.52802 -2725.19 -4.52802 4.52802 0.94 0.00949291 0.00850738 0.847864 0.781876 -1 -1 -1 -1 60 23563 42 1.65001e+07 9.79696e+06 1.13508e+06 3144.28 10.95 3.41073 3.11126 34801 210837 -1 19834 20 6107 14382 2085679 598371 5.05307 5.05307 -2966.13 -5.05307 0 0 1.43369e+06 3971.44 0.44 0.94 0.25 -1 -1 0.44 0.424155 0.39432 + non_column.xml raygentop.v common 47.61 vpr 105.35 MiB 0.62 32012 -1 -1 3 1.48 -1 -1 40516 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 107876 214 305 2963 2869 1 1444 650 33 33 1089 io auto 45.4 MiB 3.85 13747 248282 81945 142793 23544 103.0 MiB 1.76 0.02 4.81737 -2724.33 -4.81737 4.81737 3.97 0.0073023 0.00679977 0.722608 0.667884 -1 -1 -1 -1 44 27797 37 5.44432e+07 9.79696e+06 2.74036e+06 2516.40 25.74 3.75279 3.41577 93774 543488 -1 22309 17 5786 13251 1497600 404581 5.13958 5.13958 -3092.11 -5.13958 0 0 3.56397e+06 3272.70 1.02 0.65 0.61 -1 -1 1.02 0.349553 0.324591 + non_column_tall_aspect_ratio.xml raygentop.v common 49.55 vpr 102.16 MiB 0.66 31936 -1 -1 3 1.40 -1 -1 40480 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 104612 214 305 2963 2869 1 1444 650 23 46 1058 io auto 45.7 MiB 3.89 13776 239840 84223 119240 36377 99.2 MiB 1.69 0.03 4.68258 -2779.01 -4.68258 4.68258 3.29 0.00749757 0.00702299 0.684672 0.633229 -1 -1 -1 -1 42 31648 41 5.05849e+07 9.79696e+06 2.60561e+06 2462.77 28.66 3.51495 3.19945 89863 510592 -1 24152 20 7442 17660 2259951 590976 5.67716 5.67716 -3200.57 -5.67716 0 0 3.28516e+06 3105.07 0.91 0.87 0.58 -1 -1 0.91 0.399372 0.369203 + non_column_wide_aspect_ratio.xml raygentop.v common 41.85 vpr 98.60 MiB 0.69 31936 -1 -1 3 1.59 -1 -1 40616 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 100964 214 305 2963 2869 1 1444 650 43 22 946 io auto 45.4 MiB 3.73 14156 293306 98573 164570 30163 96.1 MiB 2.16 0.02 4.68152 -2812.57 -4.68152 4.68152 3.55 0.00724035 0.00673017 0.925677 0.848397 -1 -1 -1 -1 42 29613 38 4.55909e+07 9.79696e+06 2.29725e+06 2428.38 20.53 3.62206 3.28365 79978 445530 -1 24436 20 8003 18434 2464079 661230 4.86641 4.86641 -3242.4 -4.86641 0 0 2.89121e+06 3056.25 0.80 0.92 0.53 -1 -1 0.80 0.400872 0.370601 + custom_sbloc.xml raygentop.v common 22.72 vpr 84.88 MiB 0.60 31700 -1 -1 3 1.59 -1 -1 40544 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86920 214 305 2963 2869 1 1444 650 19 19 361 io clb auto 44.0 MiB 3.96 11545 253910 83783 147052 23075 84.9 MiB 2.20 0.03 4.53013 -2682.92 -4.53013 4.53013 0.78 0.00994624 0.00941733 0.898398 0.823185 -1 -1 -1 -1 60 22190 29 1.65001e+07 9.79696e+06 1.11685e+06 3093.75 8.02 3.01302 2.74098 34801 214773 -1 19145 15 5739 13180 1453072 396713 4.70711 4.70711 -3011.51 -4.70711 0 0 1.41014e+06 3906.19 0.34 0.44 0.19 -1 -1 0.34 0.223232 0.212144 + multiple_io_types.xml raygentop.v common 134.08 vpr 493.00 MiB 0.37 31604 -1 -1 3 1.38 -1 -1 40464 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 504836 214 305 2963 2869 1 1444 650 67 67 4489 io_left auto 44.2 MiB 4.78 27628 90698 4403 23036 63259 493.0 MiB 0.77 0.02 4.46994 -3778.7 -4.46994 4.46994 30.74 0.00783736 0.0072251 0.300586 0.27767 -1 -1 -1 -1 56 40503 35 2.48753e+08 9.79696e+06 1.37773e+07 3069.12 66.77 3.49776 3.17473 415449 2586128 -1 37151 19 7409 16932 3284490 878151 5.12129 5.12129 -4069.29 -5.12129 0 0 1.75917e+07 3918.84 5.30 1.25 2.49 -1 -1 5.30 0.401056 0.370625 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_pin_locs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_pin_locs/config/golden_results.txt index 05b72aef923..348a34af9ba 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_pin_locs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_pin_locs/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_frac_N10_mem32K_40nm_custom_pins.xml ch_intrinsics.v common 4.11 vpr 64.18 MiB 0.11 9384 -1 -1 3 0.25 -1 -1 34556 -1 -1 65 99 1 0 success v8.0.0-10480-g679618a2e release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-06-23T21:50:39 betzgrp-wintermute.eecg.utoronto.ca /home/shrevena/Documents/vtr/vtr-verilog-to-routing/vtr_flow/tasks 65720 99 130 363 493 1 251 295 12 12 144 clb auto 25.7 MiB 0.12 622 69946 24703 33944 11299 64.2 MiB 0.26 0.00 2.16091 -205.436 -2.16091 2.16091 0.29 0.0012912 0.0012237 0.0961186 0.0910662 48 1444 10 5.66058e+06 4.05111e+06 405754. 2817.73 1.54 0.404478 0.371498 13382 80270 -1 1262 8 582 753 44166 14431 2.70001 2.70001 -235.841 -2.70001 0 0 516884. 3589.47 0.10 0.05 0.08 -1 -1 0.10 0.0277344 0.0257451 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm_custom_pins.xml ch_intrinsics.v common 5.22 vpr 65.48 MiB 0.07 9376 -1 -1 3 0.34 -1 -1 34576 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67052 99 130 363 493 1 251 298 12 12 144 clb auto 26.1 MiB 0.16 830 72933 24114 36385 12434 65.5 MiB 0.26 0.00 2.31523 -217.996 -2.31523 2.31523 0.32 0.00107013 0.00100915 0.0756674 0.0712994 -1 -1 -1 -1 38 1547 11 5.66058e+06 4.21279e+06 328943. 2284.32 2.50 0.428144 0.389705 12522 66188 -1 1392 8 487 648 34594 11334 2.74555 2.74555 -237.815 -2.74555 0 0 418267. 2904.63 0.13 0.05 0.07 -1 -1 0.13 0.0295936 0.0277122 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_switch_block/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_switch_block/config/golden_results.txt index d3d5dd67830..57ef852f6b8 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_switch_block/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_custom_switch_block/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm.xml ch_intrinsics.v common 4.83 vpr 59.37 MiB 0.10 9240 -1 -1 4 0.57 -1 -1 36412 -1 -1 75 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60792 99 130 378 508 1 307 305 15 15 225 memory auto 21.0 MiB 0.29 971 59.4 MiB 0.24 0.01 1.56261 -156.026 -1.56261 1.56261 0.04 0.000654146 0.000579339 0.0439397 0.0393371 1570 703 1646 239519 59539 1.16234e+06 375248 2.18283e+06 9701.45 12 1.90275 1.90275 -175.163 -1.90275 0 0 59.4 MiB 0.13 0.0708208 0.0644061 59.4 MiB 2.19 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm.xml ch_intrinsics.v common 4.48 vpr 62.46 MiB 0.06 9372 -1 -1 4 0.34 -1 -1 34600 -1 -1 75 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63964 99 130 378 508 1 307 305 15 15 225 memory auto 22.6 MiB 0.10 1111 75203 25546 36272 13385 62.5 MiB 0.26 0.00 1.73414 -174.802 -1.73414 1.73414 0.00 0.000976408 0.000916184 0.0779894 0.0732724 -1 -1 -1 -1 1512 6.17143 792 3.23265 713 1663 202968 51102 1.16234e+06 375248 2.18283e+06 9701.45 12 48952 428016 -1 1.89635 1.89635 -187.166 -1.89635 0 0 0.66 -1 -1 62.5 MiB 0.12 0.112709 0.105511 62.5 MiB -1 2.26 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_dedicated_clock/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_dedicated_clock/config/golden_results.txt index 3871a576e49..d18183d9a08 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_dedicated_clock/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_dedicated_clock/config/golden_results.txt @@ -1,4 +1,4 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets -timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_dedicated_network 26.36 vpr 74.05 MiB 0.11 17020 -1 -1 2 0.10 -1 -1 37032 -1 -1 29 311 15 0 success v8.0.0-6991-g9a34a83d8-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T19:57:36 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 75828 311 156 1019 1160 1 965 511 28 28 784 memory auto 32.9 MiB 0.78 7922 71.3 MiB 0.99 0.02 4.6089 -3213.93 -4.6089 4.6089 2.61 0.00301873 0.00255714 0.350717 0.299759 38 14790 13 4.25198e+07 9.78293e+06 2.06185e+06 2629.91 14.42 1.39404 1.24219 13615 14 2730 3088 2816819 1059239 4.92158 4.92158 -4313.29 -4.92158 -517.565 -1.52302 2.60823e+06 3326.82 1.12 2.15 0.13773 0.128211 15 950 -timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_dedicated_network 25.20 vpr 75.03 MiB 0.11 16964 -1 -1 2 0.10 -1 -1 37112 -1 -1 29 311 15 0 success v8.0.0-6991-g9a34a83d8-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T19:57:36 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 76832 311 156 1019 1160 1 965 511 28 28 784 memory auto 33.2 MiB 0.71 7998 72.5 MiB 0.91 0.01 4.42331 -3552.65 -4.42331 4.42331 2.53 0.00292576 0.00249222 0.324859 0.277756 40 14921 13 4.25198e+07 9.78293e+06 2.19000e+06 2793.37 12.79 1.61535 1.44369 13959 12 2660 3055 2441816 674724 4.92126 4.92126 -4318.28 -4.92126 -160.648 -1.27259 2.74289e+06 3498.59 1.49 2.63 0.162026 0.147907 15 950 -timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_dedicated_network 30.77 vpr 74.25 MiB 0.12 16792 -1 -1 2 0.11 -1 -1 37164 -1 -1 29 311 15 0 success v8.0.0-6991-g9a34a83d8-dirty release IPO VTR_ASSERT_LEVEL=3 GNU 11.3.0 on Linux-5.15.0-58-generic x86_64 2023-02-04T19:57:36 dev /home/dev/Desktop/CAS-Atlantic/vtr-verilog-to-routing 76028 311 156 1019 1160 1 965 511 28 28 784 memory auto 32.8 MiB 0.83 7927 71.1 MiB 1.01 0.02 4.61659 -3301.58 -4.61659 4.61659 2.44 0.00384567 0.00340309 0.392768 0.344588 38 16791 18 4.25198e+07 9.78293e+06 2.05729e+06 2624.09 18.46 1.50939 1.35866 15347 14 2809 3171 6777068 4985672 5.61129 5.61129 -4499.81 -5.61129 -1668.73 -3.47306 2.60365e+06 3320.98 0.83 3.13 0.135438 0.126049 15 950 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_global_nets num_routed_nets + timing/k6_frac_N10_frac_chain_mem32K_htree0_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_dedicated_network 28.10 vpr 85.89 MiB 0.23 16788 -1 -1 2 0.16 -1 -1 33892 -1 -1 31 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 87952 311 156 1019 1160 1 965 513 28 28 784 memory auto 32.2 MiB 0.92 8945 195453 67462 117452 10539 83.1 MiB 1.14 0.02 4.24256 -3535.29 -4.24256 4.24256 3.03 0.0047266 0.00420892 0.495161 0.440444 -1 -1 -1 -1 46 14258 14 4.25198e+07 9.89071e+06 2.42825e+06 3097.26 14.01 2.26688 2.03164 81963 495902 -1 13674 12 2508 2888 1039968 435011 4.40824 4.40824 -4330.54 -4.40824 -371.448 -1.34258 3.12000e+06 3979.60 0.98 1.97 0.43 -1 -1 0.98 0.192689 0.174884 15 950 + timing/k6_frac_N10_frac_chain_mem32K_htree0_routedCLK_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_dedicated_network 28.61 vpr 89.27 MiB 0.19 16912 -1 -1 2 0.16 -1 -1 33728 -1 -1 31 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 91412 311 156 1019 1160 1 965 513 28 28 784 memory auto 32.3 MiB 1.00 8945 195453 67462 117452 10539 83.9 MiB 1.09 0.02 4.24256 -3535.29 -4.24256 4.24256 3.23 0.00439673 0.00387964 0.464219 0.409008 -1 -1 -1 -1 46 14278 13 4.25198e+07 9.89071e+06 2.47848e+06 3161.33 14.05 2.05809 1.83585 81963 509322 -1 13687 11 2477 2842 628309 183554 4.6903 4.6903 -4253.53 -4.6903 -195.104 -1.3767 3.17357e+06 4047.92 1.31 2.14 0.43 -1 -1 1.31 0.196452 0.182983 15 950 + timing/k6_frac_N10_frac_chain_mem32K_htree0short_40nm.xml verilog/mkPktMerge.v common_-start_odin_--clock_modeling_dedicated_network 28.86 vpr 86.38 MiB 0.18 16924 -1 -1 2 0.18 -1 -1 33688 -1 -1 31 311 15 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 88452 311 156 1019 1160 1 965 513 28 28 784 memory auto 32.4 MiB 0.86 9287 195453 66686 117509 11258 82.3 MiB 1.11 0.02 4.12801 -3603.7 -4.12801 4.12801 2.98 0.00506386 0.00456663 0.488102 0.431794 -1 -1 -1 -1 46 15578 14 4.25198e+07 9.89071e+06 2.42368e+06 3091.42 14.99 2.15465 1.92472 81963 496068 -1 14973 12 2225 2503 1188709 769601 5.70473 5.70473 -4410.99 -5.70473 -1643.75 -3.31884 3.11542e+06 3973.75 0.91 2.07 0.43 -1 -1 0.91 0.187032 0.169642 15 950 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_default_fc_pinlocs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_default_fc_pinlocs/config/golden_results.txt index 557267499b0..b07d8e1e443 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_default_fc_pinlocs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_default_fc_pinlocs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N4_90nm_default_fc_pinloc.xml diffeq.blif common 27.01 vpr 67.21 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 417 64 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 68824 64 39 1935 1974 1 1104 520 23 23 529 clb auto 29.4 MiB 0.42 9930 67.2 MiB 1.36 0.01 6.88012 -1336.71 -6.88012 6.88012 1.07 0.00418983 0.00362864 0.33057 0.287861 22 12669 27 983127 929624 735934. 1391.18 20.15 1.71634 1.48327 10966 18 7099 24037 1733502 451965 6.88012 6.88012 -1447.76 -6.88012 0 0 927497. 1753.30 0.19 0.79 0.221141 0.19731 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_N4_90nm_default_fc_pinloc.xml diffeq.blif common 14.06 vpr 69.08 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 438 64 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70736 64 39 1935 1974 1 1077 541 23 23 529 clb auto 28.9 MiB 0.36 10085 137127 36539 98027 2561 69.1 MiB 1.18 0.02 7.41831 -1418.64 -7.41831 7.41831 0.87 0.00457621 0.0038989 0.327684 0.280049 -1 -1 -1 -1 22 12754 28 983127 976439 735934. 1391.18 7.82 1.0919 0.944895 35322 121345 -1 11109 19 6608 23845 1462488 382373 7.14816 7.14816 -1474.13 -7.14816 0 0 927497. 1753.30 0.17 0.70 0.15 -1 -1 0.17 0.211387 0.189904 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_depop/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_depop/config/golden_results.txt index 457c5b3e919..58a35002d9a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_depop/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_depop/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 33.95 vpr 82.62 MiB 0.54 30020 -1 -1 4 2.71 -1 -1 38388 -1 -1 165 193 5 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 84604 193 205 2863 2789 1 1383 568 20 20 400 memory auto 45.6 MiB 2.00 10773 82.6 MiB 2.68 0.02 4.49793 -2431.98 -4.49793 4.49793 1.73 0.00847562 0.00762266 1.06536 0.961303 78 21607 21 2.07112e+07 1.16325e+07 2.06176e+06 5154.39 17.88 3.97292 3.55314 19127 16 5185 14790 1471838 344228 4.98283 4.98283 -2814.6 -4.98283 -15.8222 -0.360359 2.60035e+06 6500.87 0.62 0.52 0.265076 0.24725 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 34.24 vpr 86.90 MiB 0.42 29492 -1 -1 4 2.47 -1 -1 38196 -1 -1 169 193 5 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 88984 193 205 2863 2789 1 1374 572 20 20 400 memory auto 43.5 MiB 2.02 11201 252110 92751 131930 27429 84.6 MiB 2.85 0.03 4.45067 -2677.23 -4.45067 4.45067 1.22 0.0117307 0.0109776 1.3522 1.20596 -1 -1 -1 -1 80 22067 39 2.07112e+07 1.18481e+07 2.10510e+06 5262.74 18.77 4.81689 4.2918 53274 447440 -1 19298 16 5571 15462 1144445 252495 4.66289 4.66289 -2899.83 -4.66289 -11.7102 -0.360359 2.64606e+06 6615.15 0.68 0.61 0.38 -1 -1 0.68 0.361937 0.331231 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_detailed_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_detailed_timing/config/golden_results.txt index 7ab2776709b..8ee4a9abbe5 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_detailed_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_detailed_timing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 5.84 vpr 61.98 MiB 0.06 9424 -1 -1 3 0.30 -1 -1 36488 -1 -1 65 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63464 99 130 363 493 1 251 295 12 12 144 clb auto 23.8 MiB 0.28 633 62.0 MiB 0.29 0.00 2.15648 -206.017 -2.15648 2.15648 0.49 0.000480471 0.000430223 0.0494597 0.0444301 44 1516 12 5.66058e+06 4.05111e+06 360780. 2505.42 2.35 0.277984 0.253066 1372 9 633 816 45640 14354 2.55518 2.55518 -237.872 -2.55518 0 0 470765. 3269.20 0.15 0.12 0.0259139 0.0246199 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 5.07 vpr 65.37 MiB 0.06 9596 -1 -1 3 0.31 -1 -1 34612 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66936 99 130 363 493 1 251 298 12 12 144 clb auto 26.0 MiB 0.16 830 72933 24114 36385 12434 65.4 MiB 0.28 0.00 2.31523 -217.996 -2.31523 2.31523 0.35 0.00104781 0.000982566 0.0900921 0.0848773 -1 -1 -1 -1 38 1583 13 5.66058e+06 4.21279e+06 319130. 2216.18 2.23 0.432918 0.394254 12522 62564 -1 1389 8 493 651 37667 12430 2.73633 2.73633 -236.043 -2.73633 0 0 406292. 2821.48 0.13 0.05 0.07 -1 -1 0.13 0.0283815 0.0266422 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt index 8e8f487bfc9..f32816621c9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_40nm.xml stereovision0.v common 1549.26 odin 1.76 GiB 98.39 1840428 -1 -1 5 90.37 -1 -1 79020 -1 -1 1290 157 -1 -1 success 5941692-dirty release IPO VTR_ASSERT_LEVEL=3 sanitizers GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-27T23:00:35 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 346357.2 157 197 21024 21221 1 7745 1644 38 38 1444 clb auto 783.3 MiB 4.4568 54476 961845 345093 595347 21405 1014.1 MiB 13.94 2.34 4.1021 -15015.6 -4.1021 4.1021 129.29 0.389902 0.346585 40.7176 35.9264 46 66086 26 2.3328e+07 2.322e+07 4.77644e+06 3307.78 21.28 144.943 131.243 120184 989140 -1 64416 19 33992 65277 2895642 459795 3.87727 3.87727 -15760.1 -3.87727 0 0 6.15323e+06 4261.24 6.84 1.731 15.59 -1 -1 6.84 8.80011 8.1096 -k6_N10_40nm_diff_switch_for_inc_dec_wires.xml stereovision0.v common 1603.48 odin 1.76 GiB 98.56 1840680 -1 -1 5 90.29 -1 -1 79364 -1 -1 1297 157 -1 -1 success 5941692-dirty release IPO VTR_ASSERT_LEVEL=3 sanitizers GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-08-27T23:00:35 gh-actions-runner-vtr-auto-spawned3 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 352214 157 197 21024 21221 1 7547 1651 39 39 1521 clb auto 790.0 MiB 4.62 51912 967297 355681 587577 24039 1018.2 MiB 13.905 2.35 3.27987 -14557.4 -3.27987 3.27987 136.16 0.388182 0.340036 40.7003 35.6992 46 64729 31 7.37824e+07 6.99019e+07 4.88195e+06 3209.70 22.73 147.381 133.258 126630 998267 -1 62442 28 35421 67860 2863040 490307 3.17524 3.17524 -15310.6 -3.17524 0 0 6.27360e+06 4124.65 7.18 2.33 16.28 -1 -1 7.18 12.2122 11.2365 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_40nm.xml stereovision0.v common 169.74 vpr 277.27 MiB 2.37 126048 -1 -1 5 83.26 -1 -1 75348 -1 -1 1337 157 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 283924 157 197 21024 21221 1 6369 1691 39 39 1521 clb auto 124.0 MiB 4.94 49118 978481 352716 605570 20195 277.3 MiB 10.50 0.11 3.82872 -14985.1 -3.82872 3.82872 9.61 0.030689 0.0261212 3.24668 2.69757 -1 -1 -1 -1 36 61735 32 2.4642e+07 2.4066e+07 4.11737e+06 2707.01 35.88 15.6221 12.8274 115990 821377 -1 57847 23 29862 63292 2473837 450954 3.66887 3.66887 -15765.9 -3.66887 0 0 5.03985e+06 3313.51 1.56 2.53 0.62 -1 -1 1.56 1.85817 1.5961 + k6_N10_40nm_diff_switch_for_inc_dec_wires.xml stereovision0.v common 171.11 vpr 275.04 MiB 2.66 126004 -1 -1 5 87.20 -1 -1 75432 -1 -1 1356 157 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 281640 157 197 21024 21221 1 6467 1710 39 39 1521 clb auto 124.0 MiB 5.16 51290 993147 360680 608362 24105 275.0 MiB 10.32 0.11 3.26166 -14917.8 -3.26166 3.26166 9.34 0.0308111 0.0262182 3.21737 2.66176 -1 -1 -1 -1 42 62756 33 7.37824e+07 7.30817e+07 4.49269e+06 2953.77 32.95 14.6319 12.0222 122070 906769 -1 60178 20 29762 65352 2439585 446633 3.2534 3.2534 -15909.6 -3.2534 0 0 5.60675e+06 3686.23 1.70 2.67 0.70 -1 -1 1.70 1.88443 1.62 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr/config/golden_results.txt index 24a98bd463d..f19ec3ad52a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml test_eblif.eblif common 0.12 vpr 59.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 3 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61424 3 1 5 6 1 4 5 3 3 9 -1 auto 21.5 MiB 0.00 9 12 1 9 2 60.0 MiB 0.00 0.00 0.52647 -0.88231 -0.52647 0.52647 0.00 1.035e-05 7.094e-06 8.8915e-05 6.9209e-05 20 10 1 53894 53894 4880.82 542.314 0.00 0.0011057 0.00104635 379 725 -1 6 1 3 3 36 25 0.605178 0.605178 -1.1507 -0.605178 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00105006 0.00102258 - k6_frac_N10_40nm.xml conn_order.eblif common 0.12 vpr 59.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -1 -1 success e1c7cb1 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.8.0-1014-azure x86_64 2024-09-24T03:47:29 fv-az775-518 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61424 2 1 4 5 1 3 4 3 3 9 -1 auto 21.5 MiB 0.00 6 9 2 3 4 60.0 MiB 0.00 0.00 0.69084 -1.21731 -0.69084 0.69084 0.00 1.0129e-05 6.963e-06 0.000104936 8.568e-05 20 9 1 53894 53894 4880.82 542.314 0.00 0.00111784 0.00105927 379 725 -1 15 1 2 2 25 19 1.701722 1.701722 -2.22723 -1.701722 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00106769 0.00103834 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml test_eblif.eblif common 0.41 vpr 58.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59448 3 1 5 6 1 4 5 3 3 9 -1 auto 19.6 MiB 0.00 9 12 4 4 4 58.1 MiB 0.00 0.00 0.52647 -0.88231 -0.52647 0.52647 0.00 1.4994e-05 1.045e-05 0.000115391 8.7864e-05 -1 -1 -1 -1 20 9 2 53894 53894 4880.82 542.314 0.01 0.00160683 0.00150489 379 725 -1 5 1 3 3 29 19 0.545526 0.545526 -1.07365 -0.545526 0 0 6579.40 731.044 0.00 0.01 0.00 -1 -1 0.00 0.0017143 0.00166299 + k6_frac_N10_40nm.xml conn_order.eblif common 0.37 vpr 58.13 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59528 2 1 4 5 1 3 4 3 3 9 -1 auto 19.7 MiB 0.00 6 9 4 1 4 58.1 MiB 0.00 0.00 0.69084 -1.21731 -0.69084 0.69084 0.00 1.8474e-05 1.3622e-05 0.000123757 9.6624e-05 -1 -1 -1 -1 20 7 2 53894 53894 4880.82 542.314 0.01 0.00168156 0.00158496 379 725 -1 15 1 2 2 51 45 1.70808 1.70808 -2.25272 -1.70808 0 0 6579.40 731.044 0.00 0.00 0.00 -1 -1 0.00 0.00150108 0.00146247 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr_write/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr_write/config/golden_results.txt index ffe4d0fa86a..cc7ced1ba94 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr_write/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_eblif_vpr_write/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - arch.xml eblif_write.eblif common 0.58 vpr 53.39 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 54668 3 2 5 7 1 5 7 4 4 16 ff_tile io_tile auto 13.1 MiB 0.00 9 53.4 MiB 0.04 0.00 0.188521 -0.633403 -0.188521 0.188521 0.00 8.337e-06 4.912e-06 0.000103765 6.6006e-05 2 11 1 59253.6 29626.8 -1 -1 0.08 0.000418298 0.000307306 11 1 4 4 85 45 0.250278 0.250278 -0.937461 -0.250278 0 0 -1 -1 0.00 0.00 0.000103372 7.9728e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + arch.xml eblif_write.eblif common 0.35 vpr 56.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57852 3 2 5 7 1 5 7 4 4 16 ff_tile io_tile auto 17.8 MiB 0.00 14 18 7 10 1 56.5 MiB 0.00 0.00 0.198536 -0.769354 -0.198536 0.198536 0.00 2.0474e-05 1.286e-05 0.000117644 8.503e-05 -1 -1 -1 -1 1 8 1 59253.6 29626.8 -1 -1 0.00 0.00148217 0.00137435 136 248 -1 8 1 4 4 68 40 0.189392 0.189392 -0.755508 -0.189392 0 0 -1 -1 0.00 0.00 0.00 -1 -1 0.00 0.00134946 0.00130933 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_echo_files/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_echo_files/config/golden_results.txt index b780aa439d5..87280012ec8 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_echo_files/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_echo_files/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 2.72 vpr 61.14 MiB 0.09 9880 -1 -1 4 0.24 -1 -1 33200 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62612 11 30 262 292 2 104 60 7 7 49 clb auto 22.5 MiB 0.24 424 61.1 MiB 0.56 0.00 2.23761 -171.715 -2.23761 2.1308 0.00 0.000366997 0.000293463 0.0125444 0.01038 -1 496 20 1.07788e+06 1.02399e+06 90369.8 1844.28 0.04 0.0350655 0.0303894 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 1.90 vpr 63.89 MiB 0.07 9972 -1 -1 4 0.20 -1 -1 33336 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65424 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.22 439 1932 239 1639 54 63.9 MiB 0.17 0.00 2.45279 -180.032 -2.45279 2.33029 0.00 0.000657413 0.000584504 0.0150448 0.0136066 -1 -1 -1 -1 -1 515 20 1.07788e+06 1.02399e+06 90369.8 1844.28 0.06 0.0521894 0.0464461 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_equivalent_sites/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_equivalent_sites/config/golden_results.txt index ccdfd94503a..516b44c0fea 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_equivalent_sites/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_equivalent_sites/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - equivalent.xml equivalent.blif common 0.47 vpr 53.41 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 54696 1 1 3 4 0 3 4 4 4 16 io_site_1 auto 13.1 MiB 0.00 9 53.4 MiB 0.00 0.00 3.81283 -3.81283 -3.81283 nan 0.00 1.0809e-05 6.906e-06 7.2156e-05 3.9577e-05 1 5 1 59253.6 29626.8 -1 -1 0.00 0.000198244 0.000122098 5 1 3 3 93 17 3.81386 nan -3.81386 -3.81386 0 0 -1 -1 0.00 0.01 9.7538e-05 7.1402e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + equivalent.xml equivalent.blif common 0.38 vpr 56.39 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57744 1 1 3 4 0 3 4 4 4 16 io_site_1 auto 17.7 MiB 0.00 9 9 4 5 0 56.4 MiB 0.00 0.00 3.8649 -3.8649 -3.8649 nan 0.00 1.6528e-05 1.0245e-05 0.000103641 7.0812e-05 -1 -1 -1 -1 1 3 1 59253.6 29626.8 -1 -1 0.01 0.00155316 0.00143742 72 304 -1 3 1 3 3 37 15 3.69193 nan -3.69193 -3.69193 0 0 -1 -1 0.00 0.02 0.00 -1 -1 0.00 0.00496134 0.00490329 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fc_abs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fc_abs/config/golden_results.txt index e2270474f54..dd9f37179ee 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fc_abs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fc_abs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm_fc_abs.xml stereovision3.v common 1.31 vpr 64.65 MiB 0.03 9984 -1 -1 4 0.11 -1 -1 40592 -1 -1 19 11 0 0 success 8f82416 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1022-azure x86_64 2024-07-02T00:42:56 fv-az891-246 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66200 11 30 262 292 2 104 60 7 7 49 clb auto 26.2 MiB 0.04 415 2283 332 1882 69 64.6 MiB 0.02 0.00 2.44263 -182.728 -2.44263 2.32857 0.06 0.000267911 0.000223217 0.0079155 0.00682944 16 591 38 1.07788e+06 1.02399e+06 88828.2 1812.82 0.44 0.112865 0.0936047 2520 24504 -1 562 43 1180 3021 124455 29333 3.04672 2.6697 -197.874 -3.04672 0 0 104221. 2126.97 0.02 0.05 0.01 -1 -1 0.02 0.0264744 0.0228002 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm_fc_abs.xml stereovision3.v common 2.34 vpr 63.85 MiB 0.08 9940 -1 -1 4 0.20 -1 -1 33440 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65384 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.14 439 1932 239 1639 54 63.9 MiB 0.04 0.00 2.45862 -180.487 -2.45862 2.33539 0.09 0.00077729 0.000695808 0.0176391 0.0160225 -1 -1 -1 -1 16 612 29 1.07788e+06 1.02399e+06 88828.2 1812.82 0.37 0.136394 0.116654 2520 24504 -1 539 24 882 1910 71912 23696 2.90651 2.60442 -203.665 -2.90651 0 0 104221. 2126.97 0.02 0.08 0.02 -1 -1 0.02 0.0427223 0.0370258 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/apex2_block_locations.place b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/apex2_block_locations.place index 39932395859..9813ce389c5 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/apex2_block_locations.place +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/apex2_block_locations.place @@ -1,180 +1,175 @@ #block name x y subblk layer block number #---------- -- -- ------ ----- ------------ -o_1_ 3 3 5 0 #0 -o_2_ 4 4 5 0 #1 -o_0_ 2 4 2 0 #2 -n_n1827 5 4 3 0 #3 -n_n1829 5 3 0 0 #4 -n_n1812 3 5 2 0 #5 -n_n1866 5 2 3 0 #6 -n_n1865 5 4 2 0 #7 -[493] 3 2 5 0 #8 -n_n544 3 1 0 0 #9 -n_n416 4 4 3 0 #10 -n_n394 4 5 0 0 #11 -n_n391 4 5 5 0 #12 -n_n300 4 5 3 0 #13 -[260] 2 3 0 0 #14 -n_n437 4 2 4 0 #15 -[223] 1 1 4 0 #16 -[79] 1 3 5 0 #17 -[410] 1 1 2 0 #18 -[516] 1 3 3 0 #19 -[245] 1 1 0 0 #20 -[340] 2 4 0 0 #21 -[432] 2 3 2 0 #22 -[80] 2 1 4 0 #23 -[541] 1 1 1 0 #24 -n_n309 3 5 0 0 #25 -[8] 1 3 1 0 #26 -[546] 2 2 0 0 #27 -n_n706 5 4 4 0 #28 -[261] 5 4 0 0 #29 -[463] 3 3 0 0 #30 -n_n1575 1 2 0 0 #31 -n_n1571 2 1 0 0 #32 -[132] 1 4 2 0 #33 -[355] 2 1 1 0 #34 -[214] 2 2 2 0 #35 -[267] 2 2 1 0 #36 -n_n329 5 2 4 0 #37 -[420] 1 2 1 0 #38 -n_n849 5 4 1 0 #39 -[478] 1 1 3 0 #40 -[578] 5 5 3 0 #41 -[253] 4 3 3 0 #42 -[4] 3 4 5 0 #43 -[56] 4 4 1 0 #44 -[226] 4 4 0 0 #45 -[282] 4 3 1 0 #46 -[71] 3 5 4 0 #47 -[319] 3 4 1 0 #48 -[233] 3 1 3 0 #49 -[246] 3 1 2 0 #50 -[301] 1 3 2 0 #51 -[608] 2 2 3 0 #52 -[21] 5 5 2 0 #53 -[311] 4 2 1 0 #54 -[344] 5 3 1 0 #55 -[310] 5 4 5 0 #56 -[315] 4 3 2 0 #57 -[29] 2 4 3 0 #58 -[273] 2 1 5 0 #59 -n_n1690 3 3 2 0 #60 -[383] 3 2 3 0 #61 -[390] 4 3 5 0 #62 -[705] 2 2 5 0 #63 -[41] 3 2 4 0 #64 -[351] 3 4 2 0 #65 -[262] 5 5 0 0 #66 -[484] 3 4 0 0 #67 -[437] 1 1 5 0 #68 -[65] 1 2 2 0 #69 -[221] 2 2 4 0 #70 -[402] 2 1 3 0 #71 -[521] 3 5 1 0 #72 -[767] 3 2 0 0 #73 -[129] 1 4 5 0 #74 -[133] 2 4 5 0 #75 -[234] 2 4 4 0 #76 -[868] 3 5 5 0 #77 -[904] 2 3 4 0 #78 -[906] 4 2 5 0 #79 -[919] 1 2 4 0 #80 -[1283] 4 5 4 0 #81 -[1340] 5 2 1 0 #82 -[1382] 4 5 1 0 #83 -[1404] 5 3 4 0 #84 -[1417] 5 5 4 0 #85 -[1534] 3 3 3 0 #86 -[1615] 1 4 3 0 #87 -[6947] 2 4 1 0 #88 -[7082] 3 1 4 0 #89 -[7159] 2 3 1 0 #90 -[7191] 3 2 1 0 #91 -[7224] 4 2 3 0 #92 -[7319] 4 1 1 0 #93 -[7321] 4 4 2 0 #94 -[7351] 4 3 4 0 #95 -[7388] 4 3 0 0 #96 -[7423] 4 5 2 0 #97 -[7466] 2 3 5 0 #98 -[7782] 3 1 1 0 #99 -[7822] 5 2 5 0 #100 -[7885] 2 5 0 0 #101 -[7888] 1 2 3 0 #102 -[7997] 1 4 4 0 #103 -[8027] 3 1 5 0 #104 -[529] 5 3 5 0 #105 -[503] 5 3 3 0 #106 -n_n1582 1 4 0 0 #107 -[252] 1 2 5 0 #108 -[585] 4 1 4 0 #109 -[365] 3 2 2 0 #110 -[492] 3 3 4 0 #111 -[616] 4 1 5 0 #112 -n_n1870 2 1 2 0 #113 -n_n1716 1 3 4 0 #114 -[254] 3 5 3 0 #115 -[429] 3 4 3 0 #116 -[700] 4 2 2 0 #117 -[739] 3 4 4 0 #118 -[745] 5 3 2 0 #119 -[771] 3 3 1 0 #120 -[18] 5 5 1 0 #121 -[95] 4 1 0 0 #122 -[96] 4 4 4 0 #123 -[356] 1 4 1 0 #124 -[606] 4 2 0 0 #125 -[1015] 5 5 5 0 #126 -[1032] 5 2 2 0 #127 -[1066] 2 5 2 0 #128 -[1419] 5 2 0 0 #129 -[1622] 1 3 0 0 #130 -[7046] 2 3 3 0 #131 -[7211] 4 1 3 0 #132 -[7931] 2 5 5 0 #133 -[7004] 2 5 4 0 #134 -[7559] 2 5 3 0 #135 -[6979] 1 5 0 0 #136 -out:o_1_ 3 6 1 0 #137 -out:o_2_ 4 6 3 0 #138 -out:o_0_ 2 6 4 0 #139 -i_30_ 3 0 3 0 #140 -i_20_ 3 0 6 0 #141 -i_9_ 4 6 6 0 #142 -i_10_ 3 6 5 0 #143 -i_7_ 1 0 1 0 #144 -i_8_ 4 6 0 0 #145 -i_5_ 3 6 4 0 #146 -i_6_ 5 6 6 0 #147 -i_27_ 2 0 6 0 #148 -i_14_ 2 0 7 0 #149 -i_3_ 5 6 5 0 #150 -i_28_ 3 0 5 0 #151 -i_13_ 2 0 1 0 #152 -i_4_ 3 6 7 0 #153 -i_25_ 4 6 5 0 #154 -i_12_ 2 0 5 0 #155 -i_1_ 6 5 6 0 #156 -i_26_ 4 0 4 0 #157 -i_11_ 4 6 1 0 #158 -i_2_ 3 6 0 0 #159 -i_23_ 2 0 4 0 #160 -i_18_ 4 6 4 0 #161 -i_24_ 0 3 1 0 #162 -i_17_ 2 0 0 0 #163 -i_0_ 0 4 5 0 #164 -i_21_ 3 0 0 0 #165 -i_16_ 2 0 3 0 #166 -i_22_ 4 0 5 0 #167 -i_32_ 3 0 4 0 #168 -i_31_ 4 0 7 0 #169 -i_34_ 3 0 1 0 #170 -i_33_ 2 6 0 0 #171 -i_19_ 4 6 7 0 #172 -i_36_ 1 0 6 0 #173 -i_35_ 3 0 2 0 #174 -i_38_ 4 6 2 0 #175 -i_29_ 2 0 2 0 #176 -i_37_ 4 0 2 0 #177 +o_1_ 4 3 2 0 #0 +o_2_ 1 1 2 0 #1 +o_0_ 1 4 4 0 #2 +n_n1827 2 2 3 0 #3 +n_n1829 1 2 5 0 #4 +n_n1812 1 1 3 0 #5 +n_n1866 1 3 4 0 #6 +n_n1865 1 2 4 0 #7 +[493] 4 5 2 0 #8 +n_n544 5 4 5 0 #9 +n_n416 4 1 4 0 #10 +n_n394 2 1 2 0 #11 +n_n391 2 1 3 0 #12 +n_n300 3 1 0 0 #13 +[260] 3 5 3 0 #14 +n_n437 3 3 3 0 #15 +[223] 5 4 1 0 #16 +[79] 3 5 0 0 #17 +[410] 2 4 1 0 #18 +[516] 4 5 4 0 #19 +[245] 3 4 2 0 #20 +[340] 2 5 5 0 #21 +[432] 2 4 5 0 #22 +[80] 3 4 1 0 #23 +[541] 5 3 5 0 #24 +n_n309 2 1 5 0 #25 +[8] 4 5 5 0 #26 +[546] 3 4 5 0 #27 +n_n706 1 2 3 0 #28 +[261] 2 2 1 0 #29 +[463] 4 4 3 0 #30 +n_n1575 3 5 4 0 #31 +n_n1571 2 4 3 0 #32 +[132] 1 5 3 0 #33 +[355] 2 4 2 0 #34 +[214] 4 4 5 0 #35 +[267] 5 4 4 0 #36 +n_n329 3 2 0 0 #37 +[420] 5 2 2 0 #38 +n_n849 2 2 5 0 #39 +[478] 5 4 0 0 #40 +[578] 4 1 3 0 #41 +[253] 4 2 0 0 #42 +[4] 4 1 5 0 #43 +[56] 1 1 4 0 #44 +[226] 3 1 2 0 #45 +[282] 1 3 3 0 #46 +[377] 1 2 1 0 #47 +[71] 1 1 1 0 #48 +[319] 5 2 5 0 #49 +[233] 4 3 1 0 #50 +[246] 3 4 4 0 #51 +[301] 3 5 1 0 #52 +[441] 5 5 0 0 #53 +[608] 5 4 3 0 #54 +[21] 2 1 4 0 #55 +[311] 4 4 1 0 #56 +[344] 3 2 2 0 #57 +[310] 2 2 2 0 #58 +[315] 1 3 2 0 #59 +[29] 1 4 0 0 #60 +[273] 2 4 4 0 #61 +n_n1690 3 4 0 0 #62 +[383] 5 3 1 0 #63 +[390] 2 2 4 0 #64 +[705] 4 4 4 0 #65 +[41] 4 3 5 0 #66 +[351] 4 1 1 0 #67 +[484] 4 2 1 0 #68 +[437] 5 3 4 0 #69 +[349] 3 2 4 0 #70 +[65] 3 5 5 0 #71 +[221] 4 5 1 0 #72 +[402] 2 4 0 0 #73 +[521] 4 1 0 0 #74 +[767] 4 1 2 0 #75 +[133] 2 5 0 0 #76 +[234] 4 3 4 0 #77 +[868] 1 4 3 0 #78 +[904] 4 4 2 0 #79 +[906] 4 2 4 0 #80 +[919] 2 3 3 0 #81 +[1253] 1 3 0 0 #82 +[1283] 3 1 3 0 #83 +[1340] 3 2 3 0 #84 +[1382] 1 1 0 0 #85 +[1404] 3 2 1 0 #86 +[1417] 3 1 1 0 #87 +[1534] 4 3 3 0 #88 +[1615] 3 5 2 0 #89 +[6947] 2 3 2 0 #90 +[7082] 4 3 0 0 #91 +[7159] 4 2 5 0 #92 +[7165] 5 3 2 0 #93 +[7191] 5 3 3 0 #94 +[7319] 3 3 0 0 #95 +[7321] 5 2 0 0 #96 +[7351] 2 3 4 0 #97 +[7388] 1 2 0 0 #98 +[7423] 2 1 0 0 #99 +[7466] 3 2 5 0 #100 +[7782] 4 4 0 0 #101 +[7822] 2 5 4 0 #102 +[7885] 2 5 3 0 #103 +[7888] 2 3 1 0 #104 +[7997] 5 5 2 0 #105 +[8027] 5 2 4 0 #106 +[50] 2 3 0 0 #107 +[288] 3 3 2 0 #108 +[539] 5 2 1 0 #109 +[372] 4 2 3 0 #110 +n_n1584 2 5 1 0 #111 +[196] 2 2 0 0 #112 +[585] 3 3 5 0 #113 +[365] 4 5 3 0 #114 +[492] 1 4 5 0 #115 +[616] 3 3 1 0 #116 +[430] 2 1 1 0 #117 +[663] 1 2 2 0 #118 +[700] 4 2 2 0 #119 +[322] 1 3 5 0 #120 +[739] 3 3 4 0 #121 +[745] 5 3 0 0 #122 +[771] 3 4 3 0 #123 +[95] 4 5 0 0 #124 +[345] 3 1 4 0 #125 +[759] 3 1 5 0 #126 +[1066] 1 3 1 0 #127 +[7199] 5 1 5 0 #128 +[7969] 5 5 3 0 #129 +[7328] 1 4 1 0 #130 +[7559] 5 2 3 0 #131 +out:o_1_ 3 6 1 0 #132 +out:o_2_ 1 0 5 0 #133 +out:o_0_ 1 6 2 0 #134 +i_30_ 3 6 3 0 #135 +i_20_ 4 0 6 0 #136 +i_9_ 3 0 5 0 #137 +i_10_ 0 1 4 0 #138 +i_7_ 2 6 7 0 #139 +i_8_ 3 0 7 0 #140 +i_5_ 2 0 1 0 #141 +i_6_ 3 0 0 0 #142 +i_27_ 4 6 4 0 #143 +i_14_ 2 6 5 0 #144 +i_3_ 3 0 2 0 #145 +i_28_ 2 0 3 0 #146 +i_13_ 2 0 2 0 #147 +i_4_ 3 0 6 0 #148 +i_25_ 1 0 0 0 #149 +i_12_ 2 0 0 0 #150 +i_1_ 4 0 3 0 #151 +i_26_ 1 0 7 0 #152 +i_11_ 4 0 5 0 #153 +i_2_ 3 0 3 0 #154 +i_23_ 4 6 7 0 #155 +i_18_ 4 0 1 0 #156 +i_24_ 2 0 7 0 #157 +i_17_ 4 0 2 0 #158 +i_0_ 2 6 3 0 #159 +i_21_ 5 6 5 0 #160 +i_16_ 4 6 2 0 #161 +i_22_ 1 0 4 0 #162 +i_32_ 4 0 4 0 #163 +i_31_ 2 0 5 0 #164 +i_34_ 3 6 5 0 #165 +i_33_ 1 0 3 0 #166 +i_19_ 6 1 1 0 #167 +i_36_ 3 6 7 0 #168 +i_35_ 2 0 6 0 #169 +i_38_ 3 0 4 0 #170 +i_29_ 2 6 4 0 #171 +i_37_ 4 6 1 0 #172 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/config/golden_results.txt index 475d1372ae8..872db87890a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_clusters/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -fix_clusters_test_arch.xml apex2.blif common 14.68 vpr 71.88 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 137 38 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 73604 38 3 1916 1919 0 1045 178 7 7 49 clb auto 31.3 MiB 3.98 5376 1178 0 0 1178 71.9 MiB 0.08 0.01 5.09511 -14.9435 -5.09511 nan 0.29 0.00817228 0.00750484 0.0566594 0.053921 158 7378 33 1.34735e+06 7.38348e+06 924312. 18863.5 7.38 2.64386 2.41594 18354 286522 -1 7086 16 5502 22089 1016144 327872 5.60881 nan -16.3788 -5.60881 0 0 1.15416e+06 23554.3 0.19 0.62 0.40 -1 -1 0.19 0.343536 0.319822 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + fix_clusters_test_arch.xml apex2.blif common 18.65 vpr 72.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 132 38 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 74548 38 3 1916 1919 0 1054 173 7 7 49 clb auto 32.1 MiB 4.34 5783 1135 0 0 1135 72.8 MiB 0.08 0.01 5.07028 -15.1308 -5.07028 nan 0.25 0.0047809 0.00426017 0.0574249 0.0545498 -1 -1 -1 -1 164 7801 37 1.34735e+06 7.11401e+06 957298. 19536.7 11.19 2.64641 2.25522 18546 296938 -1 7371 18 5579 21538 954225 313419 5.58606 nan -16.4292 -5.58606 0 0 1.19720e+06 24432.6 0.16 0.49 0.20 -1 -1 0.16 0.251401 0.227559 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_pins_random/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_pins_random/config/golden_results.txt index 67f054d3173..b572ada2e35 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_pins_random/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fix_pins_random/config/golden_results.txt @@ -1,2 +1,2 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.89 vpr 64.95 MiB 0.05 10112 -1 -1 4 0.17 -1 -1 38408 -1 -1 19 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66512 11 30 262 292 2 104 60 7 7 49 clb auto 26.2 MiB 0.07 543 1815 85 1663 67 65.0 MiB 0.04 0.00 2.42365 -183.03 -2.42365 2.30003 0.08 0.000468706 0.000384899 0.0139664 0.0124455 -1 -1 -1 -1 32 636 29 1.07788e+06 1.02399e+06 77018.1 1571.80 0.55 0.184182 0.153846 3048 13294 -1 584 18 615 1453 47899 13726 2.38789 2.24182 -185.883 -2.38789 0 0 93715.6 1912.56 0.02 0.04 0.01 -1 -1 0.02 0.0242388 0.0214475 + k6_N10_mem32K_40nm.xml stereovision3.v common 2.74 vpr 64.04 MiB 0.08 10112 -1 -1 4 0.22 -1 -1 33448 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65572 11 30 262 292 2 99 60 7 7 49 clb auto 24.9 MiB 0.12 500 1815 77 1659 79 64.0 MiB 0.04 0.00 2.45489 -182.961 -2.45489 2.31533 0.07 0.000651787 0.000580678 0.0147164 0.0132877 -1 -1 -1 -1 20 654 22 1.07788e+06 1.02399e+06 49980.0 1020.00 0.81 0.247093 0.207481 2664 9102 -1 555 29 713 1765 48495 15174 2.71208 2.45165 -189.124 -2.71208 0 0 65453.8 1335.79 0.01 0.10 0.01 -1 -1 0.01 0.046742 0.040451 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_flyover_wires/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_flyover_wires/config/golden_results.txt index 0b326d341e7..fe1762c812f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_flyover_wires/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_flyover_wires/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - shorted_flyover_wires.xml raygentop.v common 37.01 vpr 82.84 MiB 0.71 31536 -1 -1 3 1.30 -1 -1 40516 -1 -1 112 214 0 8 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 84824 214 305 2963 2869 1 1445 639 19 19 361 io clb auto 45.2 MiB 3.80 11543 82.8 MiB 2.00 0.02 4.58499 -2577.89 -4.58499 4.58499 1.25 0.00763078 0.0069919 0.80328 0.735405 74 26958 42 1.65001e+07 9.20413e+06 1.25887e+06 3487.18 20.91 4.12701 3.77291 24566 17 6126 13667 5281736 1340994 5.0922 5.0922 -3033.1 -5.0922 0 0 1.58087e+06 4379.14 0.38 1.09 0.230127 0.217469 - buffered_flyover_wires.xml raygentop.v common 32.80 vpr 82.64 MiB 0.75 31612 -1 -1 3 1.50 -1 -1 40464 -1 -1 112 214 0 8 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 84624 214 305 2963 2869 1 1445 639 19 19 361 io clb auto 45.0 MiB 3.51 10989 82.6 MiB 2.00 0.02 4.41857 -2530.39 -4.41857 4.41857 0.97 0.00442869 0.0040668 0.764993 0.695964 74 24764 29 1.65001e+07 9.20413e+06 1.30347e+06 3610.72 17.14 3.52084 3.22334 22144 17 6080 12940 4117333 1091550 4.82748 4.82748 -3028.94 -4.82748 0 0 1.64001e+06 4542.95 0.40 0.94 0.267511 0.253696 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + shorted_flyover_wires.xml raygentop.v common 28.11 vpr 85.11 MiB 0.48 31828 -1 -1 3 1.48 -1 -1 40620 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 87156 214 305 2963 2869 1 1444 650 19 19 361 io clb auto 44.1 MiB 3.89 11650 228584 75365 133281 19938 85.1 MiB 1.70 0.02 4.52591 -2650.49 -4.52591 4.52591 0.90 0.00694747 0.00642845 0.678406 0.627386 -1 -1 -1 -1 62 24826 45 1.65001e+07 9.79696e+06 1.07728e+06 2984.15 12.61 3.53011 3.21334 35161 217957 -1 20696 17 6141 14924 1916680 524150 5.05166 5.05166 -3006.03 -5.05166 0 0 1.33769e+06 3705.50 0.54 1.08 0.21 -1 -1 0.54 0.444555 0.407313 + buffered_flyover_wires.xml raygentop.v common 28.01 vpr 84.93 MiB 0.45 31828 -1 -1 3 1.40 -1 -1 40476 -1 -1 123 214 0 8 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 86964 214 305 2963 2869 1 1444 650 19 19 361 io clb auto 44.0 MiB 3.80 11698 253910 84523 146224 23163 84.9 MiB 1.92 0.03 4.66082 -2769.33 -4.66082 4.66082 0.91 0.00707593 0.00652878 0.742599 0.682762 -1 -1 -1 -1 62 26047 33 1.65001e+07 9.79696e+06 1.11546e+06 3089.92 12.71 3.5903 3.26464 35161 215557 -1 20655 16 5970 13512 1728683 469210 4.89641 4.89641 -3008.4 -4.89641 0 0 1.38748e+06 3843.44 0.40 0.76 0.26 -1 -1 0.40 0.354607 0.333482 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fpu_hard_block_arch/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fpu_hard_block_arch/config/golden_results.txt index a5039d57233..f7b51b17509 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fpu_hard_block_arch/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fpu_hard_block_arch/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - hard_fpu_arch_timing.xml mm3.v common 4.17 vpr 59.20 MiB 0.06 6696 -1 -1 1 0.02 -1 -1 30544 -1 -1 0 193 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60620 193 32 545 422 1 289 227 21 21 441 io auto 20.5 MiB 1.75 3145 59.2 MiB 0.47 0.00 2.985 -794.518 -2.985 2.985 0.06 0.00149735 0.00138239 0.127731 0.118837 4241 381 381 1559003 569178 809148 68766.3 979092. 2220.16 6 2.985 2.985 -804.546 -2.985 -21.7856 -0.0851 59.2 MiB 0.57 0.163515 0.153164 59.2 MiB 0.43 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + hard_fpu_arch_timing.xml mm3.v common 3.40 vpr 62.06 MiB 0.03 6628 -1 -1 1 0.04 -1 -1 30748 -1 -1 0 193 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 63552 193 32 545 422 1 289 227 21 21 441 io auto 22.7 MiB 1.72 3760 44515 18630 25456 429 62.1 MiB 0.25 0.00 2.985 -824.754 -2.985 2.985 0.00 0.00161493 0.00152336 0.121894 0.115535 -1 -1 -1 -1 4680 16.2500 1223 4.24653 405 405 152557 41043 809148 68766.3 979092. 2220.16 4 24050 197379 -1 2.985 2.985 -815.015 -2.985 -21.7856 -0.0851 0.27 -1 -1 62.1 MiB 0.09 0.150499 0.142754 62.1 MiB -1 0.46 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fracturable_luts/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fracturable_luts/config/golden_results.txt index 2bdd3fcee11..8d04367586b 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fracturable_luts/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_fracturable_luts/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time - k6_N8_I80_fleI10_fleO2_ff2_nmodes_2.xml ch_intrinsics.v common 4.91 vpr 62.98 MiB 0.16 9324 -1 -1 3 0.29 -1 -1 36376 -1 -1 67 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64488 99 130 363 493 1 250 297 13 13 169 clb auto 24.3 MiB 0.90 595 63.0 MiB 0.23 0.00 36 1461 17 0 0 481804. 2850.91 1.66 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time + k6_N8_I80_fleI10_fleO2_ff2_nmodes_2.xml ch_intrinsics.v common 5.28 vpr 65.87 MiB 0.06 9504 -1 -1 3 0.30 -1 -1 34508 -1 -1 69 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67448 99 130 363 493 1 251 299 13 13 169 clb auto 26.3 MiB 0.79 804 78221 18305 27577 32339 65.9 MiB 0.15 0.00 30 1517 12 0 0 423577. 2506.37 2.58 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_full_stats/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_full_stats/config/golden_results.txt index 3f041b529e8..cb598477e98 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_full_stats/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_full_stats/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.81 vpr 60.93 MiB 0.15 9948 -1 -1 4 0.15 -1 -1 33256 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62392 11 30 262 292 2 104 60 7 7 49 clb auto 22.2 MiB 0.09 424 60.9 MiB 0.03 0.00 2.23761 -171.715 -2.23761 2.1308 0.00 0.000361625 0.000289032 0.0116335 0.00963485 -1 496 20 1.07788e+06 1.02399e+06 90369.8 1844.28 0.13 0.0390457 0.0339917 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 1.50 vpr 64.39 MiB 0.06 9976 -1 -1 4 0.20 -1 -1 33252 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65940 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.08 439 1932 239 1639 54 64.4 MiB 0.03 0.00 2.45279 -180.032 -2.45279 2.33029 0.00 0.000720509 0.000652851 0.0155916 0.0141569 -1 -1 -1 -1 -1 515 20 1.07788e+06 1.02399e+06 90369.8 1844.28 0.13 0.0559681 0.0494905 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_flow/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_flow/config/golden_results.txt index f4cc0373b36..fd632535e93 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_flow/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_flow/config/golden_results.txt @@ -1,21 +1,21 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml const_true.blif common 0.53 vpr 55.13 MiB -1 -1 -1 -1 0 0.00 -1 -1 29796 -1 -1 1 0 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56452 -1 1 1 2 0 1 2 3 3 9 -1 auto 16.3 MiB 0.04 0 55.1 MiB 0.00 0.00 nan 0 0 nan 0.00 8.382e-06 4.187e-06 6.1197e-05 3.7715e-05 -1 0 1 53894 53894 38783.3 4309.26 0.01 0.000139802 9.0197e-05 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml const_false.blif common 0.55 vpr 54.84 MiB -1 -1 -1 -1 0 0.01 -1 -1 29944 -1 -1 1 0 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56156 -1 1 1 2 0 1 2 3 3 9 -1 auto 16.0 MiB 0.02 0 54.8 MiB 0.03 0.00 nan 0 0 nan 0.00 2.0363e-05 1.2495e-05 9.9906e-05 6.3707e-05 -1 0 1 53894 53894 38783.3 4309.26 0.02 0.000213667 0.000142096 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_true.blif common 0.61 vpr 54.95 MiB -1 -1 -1 -1 0 0.02 -1 -1 29948 -1 -1 1 0 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56264 6 1 1 8 0 1 8 3 3 9 -1 auto 16.1 MiB 0.02 0 54.9 MiB 0.04 0.00 nan 0 0 nan 0.00 1.7067e-05 1.0838e-05 9.2742e-05 6.368e-05 -1 0 1 53894 53894 38783.3 4309.26 0.01 0.000233221 0.000160893 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_false.blif common 0.63 vpr 55.17 MiB -1 -1 -1 -1 0 0.01 -1 -1 29864 -1 -1 1 0 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56492 6 1 1 8 0 1 8 3 3 9 -1 auto 16.3 MiB 0.02 0 55.2 MiB 0.04 0.00 nan 0 0 nan 0.00 2.2394e-05 1.3668e-05 9.7482e-05 6.4595e-05 -1 0 1 53894 53894 38783.3 4309.26 0.02 0.000217533 0.000150075 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml and.blif common 0.62 vpr 54.95 MiB -1 -1 -1 -1 1 0.01 -1 -1 29880 -1 -1 1 2 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56264 2 1 3 4 0 3 4 3 3 9 -1 auto 16.6 MiB 0.02 6 54.9 MiB 0.03 0.00 0.708653 -0.708653 -0.708653 nan 0.00 2.6054e-05 1.9535e-05 0.000130326 0.000100132 -1 4 1 53894 53894 38783.3 4309.26 0.02 0.000308915 0.000232793 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.79 vpr 54.91 MiB -1 -1 -1 -1 1 0.03 -1 -1 31488 -1 -1 1 5 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56224 5 1 6 7 0 6 7 3 3 9 -1 auto 16.5 MiB 0.02 12 54.9 MiB 0.04 0.00 0.708653 -0.708653 -0.708653 nan 0.00 4.3558e-05 3.1261e-05 0.000207026 0.000166649 -1 7 11 53894 53894 38783.3 4309.26 0.08 0.000882137 0.000688324 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.62 vpr 54.91 MiB -1 -1 -1 -1 1 0.03 -1 -1 31784 -1 -1 1 5 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56224 5 1 6 7 0 6 7 3 3 9 -1 auto 16.5 MiB 0.02 12 54.9 MiB 0.02 0.00 0.708653 -0.708653 -0.708653 nan 0.00 1.4029e-05 9.618e-06 0.000110635 8.6337e-05 -1 7 11 53894 53894 38783.3 4309.26 0.05 0.000754197 0.000591154 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml and_latch.blif common 0.47 vpr 55.07 MiB -1 -1 -1 -1 1 0.01 -1 -1 29840 -1 -1 1 3 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56396 3 1 5 6 1 4 5 3 3 9 -1 auto 16.6 MiB 0.01 6 55.1 MiB 0.03 0.00 0.544641 -0.918653 -0.544641 0.544641 0.00 1.1584e-05 7.24e-06 0.000118762 9.0315e-05 -1 3 1 53894 53894 38783.3 4309.26 0.02 0.000341902 0.000265572 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml false_path_mux.blif common 0.54 vpr 54.95 MiB -1 -1 -1 -1 1 0.02 -1 -1 32072 -1 -1 1 3 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56264 4 1 4 6 0 4 6 3 3 9 -1 auto 16.5 MiB 0.02 8 54.9 MiB 0.00 0.00 0.708653 -0.708653 -0.708653 nan 0.00 8.596e-06 5.691e-06 8.6865e-05 6.505e-05 -1 6 1 53894 53894 38783.3 4309.26 0.01 0.000241502 0.000185564 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_2x2.blif common 0.72 vpr 55.14 MiB -1 -1 -1 -1 1 0.03 -1 -1 31500 -1 -1 1 4 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56464 4 4 8 12 0 8 9 3 3 9 -1 auto 16.2 MiB 0.03 16 55.1 MiB 0.03 0.00 0.708653 -2.83461 -0.708653 nan 0.00 4.3726e-05 3.5389e-05 0.000225189 0.000189679 -1 11 5 53894 53894 38783.3 4309.26 0.05 0.000998222 0.000842694 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_3x3.blif common 0.74 vpr 55.00 MiB -1 -1 -1 -1 1 0.04 -1 -1 31872 -1 -1 1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56316 6 6 12 18 0 12 13 3 3 9 -1 auto 16.5 MiB 0.03 24 55.0 MiB 0.03 0.00 0.734653 -4.35592 -0.734653 nan 0.00 3.177e-05 2.3505e-05 0.000358245 0.000316016 -1 21 15 53894 53894 38783.3 4309.26 0.07 0.00219454 0.0018794 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_3x4.blif common 0.82 vpr 55.38 MiB -1 -1 -1 -1 2 0.04 -1 -1 32312 -1 -1 3 7 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56712 7 8 22 30 0 15 18 4 4 16 clb auto 16.7 MiB 0.03 34 55.4 MiB 0.04 0.00 1.11427 -6.58687 -1.11427 nan 0.00 9.4481e-05 7.5785e-05 0.0011093 0.000927984 -1 45 9 215576 161682 99039.1 6189.95 0.08 0.003428 0.00302737 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_4x4.blif common 0.85 vpr 55.15 MiB -1 -1 -1 -1 4 0.05 -1 -1 32400 -1 -1 2 8 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56476 8 8 29 37 0 21 18 4 4 16 clb auto 16.8 MiB 0.05 57 55.2 MiB 0.04 0.00 1.81027 -10.6989 -1.81027 nan 0.00 0.000160773 0.000133403 0.00113276 0.0010193 -1 53 12 215576 107788 99039.1 6189.95 0.10 0.00527625 0.00479533 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_5x5.blif common 0.95 vpr 55.27 MiB -1 -1 -1 -1 4 0.06 -1 -1 32412 -1 -1 4 10 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56596 10 10 47 57 0 39 24 4 4 16 clb auto 16.8 MiB 0.07 133 55.3 MiB 0.04 0.01 2.36081 -16.394 -2.36081 nan 0.00 0.00011631 9.7137e-05 0.00152315 0.0014246 -1 126 14 215576 215576 99039.1 6189.95 0.10 0.00921094 0.00855785 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml mult_5x6.blif common 1.08 vpr 55.62 MiB -1 -1 -1 -1 5 0.09 -1 -1 32896 -1 -1 5 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56956 11 11 61 72 0 51 27 5 5 25 clb auto 17.2 MiB 0.10 175 55.6 MiB 0.05 0.00 2.89045 -19.3048 -2.89045 nan 0.00 9.6567e-05 8.4208e-05 0.00358958 0.00320318 -1 207 16 485046 269470 186194. 7447.77 0.08 0.0121457 0.0110683 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_1bit.blif common 0.77 vpr 54.93 MiB -1 -1 -1 -1 1 0.02 -1 -1 30600 -1 -1 1 3 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56248 3 2 5 7 0 5 6 3 3 9 -1 auto 16.5 MiB 0.02 10 54.9 MiB 0.05 0.01 0.708653 -1.41731 -0.708653 nan 0.00 1.7531e-05 1.22e-05 0.000162306 0.000123673 -1 9 1 53894 53894 38783.3 4309.26 0.02 0.000404941 0.000325149 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_2bit.blif common 0.79 vpr 55.14 MiB -1 -1 -1 -1 1 0.03 -1 -1 32012 -1 -1 1 5 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56468 5 3 8 11 0 8 9 3 3 9 -1 auto 16.2 MiB 0.02 16 55.1 MiB 0.05 0.00 0.708653 -2.12596 -0.708653 nan 0.01 5.5204e-05 4.1696e-05 0.000260119 0.000216562 -1 11 1 53894 53894 38783.3 4309.26 0.03 0.000704648 0.000603086 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_3bit.blif common 0.87 vpr 55.01 MiB -1 -1 -1 -1 2 0.03 -1 -1 31964 -1 -1 1 7 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56328 7 4 12 16 0 11 12 3 3 9 -1 auto 16.0 MiB 0.02 22 55.0 MiB 0.05 0.00 1.04365 -3.83961 -1.04365 nan 0.00 4.7486e-05 3.7849e-05 0.000327053 0.000278479 -1 18 11 53894 53894 38783.3 4309.26 0.10 0.00179626 0.0015534 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_4bit.blif common 0.84 vpr 54.86 MiB -1 -1 -1 -1 2 0.03 -1 -1 32028 -1 -1 1 9 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56180 9 5 15 20 0 14 15 3 3 9 -1 auto 16.4 MiB 0.02 28 54.9 MiB 0.01 0.00 1.04365 -4.54826 -1.04365 nan 0.00 4.8013e-05 3.8748e-05 0.000390447 0.000351331 -1 19 14 53894 53894 38783.3 4309.26 0.12 0.00200268 0.00174313 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml rca_5bit.blif common 0.84 vpr 55.00 MiB -1 -1 -1 -1 3 0.03 -1 -1 32120 -1 -1 1 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56320 11 6 19 25 0 17 18 3 3 9 -1 auto 16.5 MiB 0.05 34 55.0 MiB 0.02 0.00 1.37865 -6.93192 -1.37865 nan 0.00 3.005e-05 2.2911e-05 0.000444909 0.00039771 -1 24 11 53894 53894 38783.3 4309.26 0.02 0.00204928 0.00180359 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml const_true.blif common 0.47 vpr 58.11 MiB -1 -1 -1 -1 0 0.02 -1 -1 30028 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59500 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.3 MiB 0.00 0 3 0 0 3 58.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.1407e-05 6.644e-06 7.1183e-05 4.7157e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00151053 0.00144317 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml const_false.blif common 0.49 vpr 58.14 MiB -1 -1 -1 -1 0 0.02 -1 -1 30172 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59532 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.4 MiB 0.00 0 3 0 0 3 58.1 MiB 0.01 0.00 nan 0 0 nan 0.00 1.7072e-05 9.987e-06 0.000106416 7.4745e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00149324 0.00140851 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_true.blif common 0.53 vpr 58.27 MiB -1 -1 -1 -1 0 0.02 -1 -1 29980 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59668 6 1 1 8 0 1 8 3 3 9 -1 auto 19.9 MiB 0.01 0 21 0 10 11 58.3 MiB 0.01 0.00 nan 0 0 nan 0.00 1.3008e-05 7.386e-06 8.9652e-05 6.0451e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00174003 0.00165512 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_false.blif common 0.53 vpr 58.11 MiB -1 -1 -1 -1 0 0.02 -1 -1 29992 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59500 6 1 1 8 0 1 8 3 3 9 -1 auto 19.7 MiB 0.01 0 21 0 10 11 58.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.5792e-05 1.0252e-05 0.000103309 7.4098e-05 -1 -1 -1 -1 -1 0 1 53894 53894 38783.3 4309.26 0.00 0.00156505 0.001486 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml and.blif common 0.56 vpr 57.91 MiB -1 -1 -1 -1 1 0.02 -1 -1 30068 -1 -1 1 2 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59300 2 1 3 4 0 3 4 3 3 9 -1 auto 19.5 MiB 0.00 9 9 3 3 3 57.9 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 2.5498e-05 1.9252e-05 0.000160935 0.000125409 -1 -1 -1 -1 -1 4 1 53894 53894 38783.3 4309.26 0.01 0.00168391 0.00159252 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.62 vpr 58.08 MiB -1 -1 -1 -1 1 0.06 -1 -1 31736 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59476 5 1 6 7 0 6 7 3 3 9 -1 auto 19.6 MiB 0.01 18 18 13 5 0 58.1 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 2.2311e-05 1.6717e-05 0.000157551 0.000125745 -1 -1 -1 -1 -1 7 11 53894 53894 38783.3 4309.26 0.01 0.00219389 0.00197302 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.66 vpr 58.25 MiB -1 -1 -1 -1 1 0.05 -1 -1 31952 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59648 5 1 6 7 0 6 7 3 3 9 -1 auto 19.8 MiB 0.01 18 18 13 5 0 58.2 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 1.9477e-05 1.46e-05 0.000163199 0.000132585 -1 -1 -1 -1 -1 7 11 53894 53894 38783.3 4309.26 0.01 0.00211569 0.00193 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml and_latch.blif common 0.41 vpr 58.29 MiB -1 -1 -1 -1 1 0.03 -1 -1 29892 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59684 3 1 5 6 1 4 5 3 3 9 -1 auto 19.9 MiB 0.00 9 12 7 1 4 58.3 MiB 0.00 0.00 0.52647 -0.88231 -0.52647 0.52647 0.00 1.9413e-05 1.4525e-05 0.000151541 0.000121539 -1 -1 -1 -1 -1 4 1 53894 53894 38783.3 4309.26 0.00 0.00156423 0.0014768 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml false_path_mux.blif common 0.56 vpr 58.16 MiB -1 -1 -1 -1 1 0.05 -1 -1 31904 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59556 4 1 4 6 0 4 6 3 3 9 -1 auto 19.8 MiB 0.00 12 15 9 3 3 58.2 MiB 0.00 0.00 0.67231 -0.67231 -0.67231 nan 0.00 1.6085e-05 1.1811e-05 0.000113992 8.8678e-05 -1 -1 -1 -1 -1 6 11 53894 53894 38783.3 4309.26 0.00 0.00203847 0.00189567 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_2x2.blif common 0.61 vpr 58.12 MiB -1 -1 -1 -1 1 0.05 -1 -1 31660 -1 -1 1 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59512 4 4 8 12 0 8 9 3 3 9 -1 auto 19.7 MiB 0.04 24 27 18 6 3 58.1 MiB 0.01 0.00 0.67231 -2.68924 -0.67231 nan 0.00 4.7416e-05 3.8601e-05 0.000343952 0.00030105 -1 -1 -1 -1 -1 10 9 53894 53894 38783.3 4309.26 0.00 0.00246093 0.00226122 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_3x3.blif common 0.62 vpr 58.05 MiB -1 -1 -1 -1 1 0.06 -1 -1 32468 -1 -1 1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59440 6 6 12 18 0 12 13 3 3 9 -1 auto 19.3 MiB 0.01 36 43 32 7 4 58.0 MiB 0.02 0.00 0.69831 -4.13786 -0.69831 nan 0.00 4.0028e-05 3.3256e-05 0.000373397 0.000331328 -1 -1 -1 -1 -1 17 11 53894 53894 38783.3 4309.26 0.02 0.00325081 0.00295479 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_3x4.blif common 0.68 vpr 58.19 MiB -1 -1 -1 -1 2 0.06 -1 -1 32136 -1 -1 3 7 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59588 7 8 22 30 0 15 18 4 4 16 clb auto 19.3 MiB 0.01 55 64 20 42 2 58.2 MiB 0.01 0.00 1.29035 -7.83841 -1.29035 nan 0.00 9.5936e-05 8.43e-05 0.000897006 0.000832614 -1 -1 -1 -1 -1 46 5 215576 161682 99039.1 6189.95 0.01 0.00479868 0.00447043 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_4x4.blif common 0.69 vpr 58.24 MiB -1 -1 -1 -1 4 0.07 -1 -1 32308 -1 -1 2 8 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59640 8 8 29 37 0 21 18 4 4 16 clb auto 19.3 MiB 0.02 76 64 16 48 0 58.2 MiB 0.03 0.01 2.08631 -12.2832 -2.08631 nan 0.00 0.000311196 0.000286678 0.00152412 0.00143184 -1 -1 -1 -1 -1 58 14 215576 107788 99039.1 6189.95 0.03 0.00857602 0.00778066 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_5x5.blif common 0.76 vpr 58.57 MiB -1 -1 -1 -1 4 0.10 -1 -1 32724 -1 -1 4 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59976 10 10 47 57 0 39 24 4 4 16 clb auto 19.3 MiB 0.03 146 364 62 302 0 58.6 MiB 0.01 0.00 2.72561 -18.4747 -2.72561 nan 0.00 0.000163521 0.000149451 0.00302228 0.00280654 -1 -1 -1 -1 -1 114 16 215576 215576 99039.1 6189.95 0.06 0.012168 0.0109894 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml mult_5x6.blif common 0.88 vpr 58.62 MiB -1 -1 -1 -1 5 0.12 -1 -1 33096 -1 -1 5 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60032 11 11 61 72 0 51 27 5 5 25 clb auto 19.4 MiB 0.04 211 227 56 171 0 58.6 MiB 0.02 0.00 3.36952 -22.7724 -3.36952 nan 0.00 0.000201904 0.000182149 0.00320164 0.00301283 -1 -1 -1 -1 -1 198 15 485046 269470 186194. 7447.77 0.05 0.0153492 0.0139531 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_1bit.blif common 0.50 vpr 58.10 MiB -1 -1 -1 -1 1 0.06 -1 -1 30808 -1 -1 1 3 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59496 3 2 5 7 0 5 6 3 3 9 -1 auto 19.6 MiB 0.00 15 15 9 5 1 58.1 MiB 0.00 0.00 0.67231 -1.34462 -0.67231 nan 0.00 1.7044e-05 1.2452e-05 0.000160751 0.000129921 -1 -1 -1 -1 -1 6 11 53894 53894 38783.3 4309.26 0.00 0.00226265 0.00209457 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_2bit.blif common 0.52 vpr 58.13 MiB -1 -1 -1 -1 1 0.06 -1 -1 32044 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59528 5 3 8 11 0 8 9 3 3 9 -1 auto 19.7 MiB 0.01 24 27 21 6 0 58.1 MiB 0.01 0.00 0.67231 -2.01693 -0.67231 nan 0.00 3.2367e-05 2.4065e-05 0.000233135 0.000195298 -1 -1 -1 -1 -1 10 15 53894 53894 38783.3 4309.26 0.01 0.0026569 0.00237792 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_3bit.blif common 0.52 vpr 58.21 MiB -1 -1 -1 -1 2 0.05 -1 -1 32164 -1 -1 1 7 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59604 7 4 12 16 0 11 12 3 3 9 -1 auto 19.4 MiB 0.01 33 38 24 11 3 58.2 MiB 0.01 0.00 1.08437 -4.00246 -1.08437 nan 0.00 3.5859e-05 2.9193e-05 0.000327122 0.000289863 -1 -1 -1 -1 -1 17 4 53894 53894 38783.3 4309.26 0.01 0.00248269 0.00231913 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_4bit.blif common 0.57 vpr 58.13 MiB -1 -1 -1 -1 2 0.06 -1 -1 32232 -1 -1 1 9 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59528 9 5 15 20 0 14 15 3 3 9 -1 auto 19.3 MiB 0.01 42 51 29 17 5 58.1 MiB 0.00 0.00 1.00731 -4.36655 -1.00731 nan 0.00 6.0384e-05 5.2273e-05 0.000402233 0.000359803 -1 -1 -1 -1 -1 17 14 53894 53894 38783.3 4309.26 0.01 0.00340135 0.00307162 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml rca_5bit.blif common 0.52 vpr 58.16 MiB -1 -1 -1 -1 3 0.06 -1 -1 32252 -1 -1 1 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59552 11 6 19 25 0 17 18 3 3 9 -1 auto 19.4 MiB 0.01 51 64 33 24 7 58.2 MiB 0.00 0.00 1.34231 -6.71386 -1.34231 nan 0.00 6.5618e-05 5.3831e-05 0.000508024 0.000461308 -1 -1 -1 -1 -1 25 11 53894 53894 38783.3 4309.26 0.01 0.00370337 0.00337526 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_vpr/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_vpr/config/golden_results.txt index 1693843b799..853ef78bd3a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_vpr/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_func_formal_vpr/config/golden_results.txt @@ -1,7 +1,7 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml const_true.blif common 0.61 vpr 55.13 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56452 -1 1 1 2 0 1 2 3 3 9 -1 auto 16.3 MiB 0.03 0 55.1 MiB 0.05 0.00 nan 0 0 nan 0.00 1.9098e-05 1.1062e-05 0.000100325 6.3456e-05 -1 0 1 53894 53894 20487.3 2276.37 0.02 0.000211159 0.0001376 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml const_false.blif common 0.66 vpr 54.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56300 -1 1 1 2 0 1 2 3 3 9 -1 auto 16.2 MiB 0.05 0 55.0 MiB 0.14 0.01 nan 0 0 nan 0.00 2.3878e-05 1.4996e-05 0.000121264 7.9718e-05 -1 0 1 53894 53894 20487.3 2276.37 0.03 0.000262738 0.000171803 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_true.blif common 0.72 vpr 54.95 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56264 6 1 7 8 0 7 8 3 3 9 -1 auto 16.6 MiB 0.03 14 54.9 MiB 0.05 0.00 0.736421 -0.736421 -0.736421 nan 0.00 2.4995e-05 1.7878e-05 0.000140411 0.000109974 -1 8 1 53894 53894 20487.3 2276.37 0.03 0.000384293 0.000307794 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml always_false.blif common 0.49 vpr 54.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56304 6 1 7 8 0 7 8 3 3 9 -1 auto 16.5 MiB 0.00 14 55.0 MiB 0.06 0.00 0.736421 -0.736421 -0.736421 nan 0.00 3.1039e-05 2.2553e-05 0.000175439 0.000137483 -1 8 1 53894 53894 20487.3 2276.37 0.03 0.000519599 0.000417757 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.35 vpr 55.13 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56456 5 1 6 7 0 6 7 3 3 9 -1 auto 16.8 MiB 0.01 12 55.1 MiB 0.00 0.00 0.736421 -0.736421 -0.736421 nan 0.00 9.929e-06 6.536e-06 8.86e-05 7.004e-05 -1 7 11 53894 53894 20487.3 2276.37 0.00 0.000415115 0.000321897 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.33 vpr 54.88 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56192 5 1 6 7 0 6 7 3 3 9 -1 auto 16.5 MiB 0.00 12 54.9 MiB 0.00 0.00 0.736421 -0.736421 -0.736421 nan 0.00 9.175e-06 5.784e-06 9.553e-05 7.5308e-05 -1 7 11 53894 53894 20487.3 2276.37 0.00 0.00032005 0.000239356 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml const_true.blif common 0.29 vpr 58.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59448 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.6 MiB 0.00 0 3 0 0 3 58.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.35e-05 7.476e-06 9.9741e-05 6.9647e-05 -1 -1 -1 -1 -1 0 1 53894 53894 20487.3 2276.37 0.00 0.00158 0.00150277 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml const_false.blif common 0.31 vpr 58.01 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 0 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59404 -1 1 1 2 0 1 2 3 3 9 -1 auto 19.3 MiB 0.00 0 3 0 0 3 58.0 MiB 0.00 0.00 nan 0 0 nan 0.00 1.9235e-05 1.1306e-05 9.7577e-05 6.3163e-05 -1 -1 -1 -1 -1 0 1 53894 53894 20487.3 2276.37 0.00 0.00153532 0.00145564 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_true.blif common 0.30 vpr 58.08 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59472 6 1 7 8 0 7 8 3 3 9 -1 auto 19.6 MiB 0.00 21 21 14 7 0 58.1 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.8514e-05 2.102e-05 0.000170414 0.00013803 -1 -1 -1 -1 -1 10 1 53894 53894 20487.3 2276.37 0.00 0.00176222 0.00167853 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml always_false.blif common 0.28 vpr 58.23 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59628 6 1 7 8 0 7 8 3 3 9 -1 auto 19.8 MiB 0.00 21 21 14 7 0 58.2 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.2171e-05 1.4899e-05 0.000148119 0.000118181 -1 -1 -1 -1 -1 10 1 53894 53894 20487.3 2276.37 0.00 0.00158746 0.00149915 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut.blif common 0.35 vpr 58.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59444 5 1 6 7 0 6 7 3 3 9 -1 auto 19.6 MiB 0.00 18 18 13 5 0 58.1 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.235e-05 1.6891e-05 0.00016969 0.000139695 -1 -1 -1 -1 -1 7 1 53894 53894 20487.3 2276.37 0.00 0.001707 0.00162633 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_frac_N10_40nm.xml multiconnected_lut2.blif common 0.36 vpr 57.94 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 5 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59328 5 1 6 7 0 6 7 3 3 9 -1 auto 19.5 MiB 0.00 18 18 13 5 0 57.9 MiB 0.00 0.00 0.69831 -0.69831 -0.69831 nan 0.00 2.3308e-05 1.8079e-05 0.000169741 0.000137603 -1 -1 -1 -1 -1 7 1 53894 53894 20487.3 2276.37 0.00 0.00174494 0.0016591 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_nonuniform/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_nonuniform/config/golden_results.txt index 3813343ed35..34014839d66 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_nonuniform/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_nonuniform/config/golden_results.txt @@ -1,7 +1,7 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - x_gaussian_y_uniform.xml stereovision3.v common 1.42 vpr 65.81 MiB 0.05 9984 -1 -1 4 0.17 -1 -1 37836 -1 -1 13 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67388 11 30 262 292 2 110 54 7 7 49 clb auto 27.0 MiB 0.12 431 2298 449 1774 75 65.8 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000483914 0.000384949 0.0147089 0.012636 -1 -1 -1 -1 12 326 3 1.07788e+06 700622 -1 -1 0.20 0.0742174 0.0638404 2680 3516 -1 316 3 175 255 10988 5508 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0145719 0.0139138 - x_uniform_y_gaussian.xml stereovision3.v common 1.44 vpr 65.54 MiB 0.05 9856 -1 -1 4 0.17 -1 -1 37820 -1 -1 13 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67108 11 30 262 292 2 110 54 7 7 49 clb auto 26.9 MiB 0.11 392 1890 346 1476 68 65.5 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000458868 0.000376323 0.0123402 0.0106294 -1 -1 -1 -1 12 287 5 1.07788e+06 700622 -1 -1 0.21 0.0867101 0.074128 2680 3516 -1 268 3 167 248 10043 4782 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.015461 0.0147632 - x_gaussian_y_gaussian.xml stereovision3.v common 1.50 vpr 65.58 MiB 0.05 9984 -1 -1 4 0.17 -1 -1 37476 -1 -1 13 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67156 11 30 262 292 2 110 54 7 7 49 clb auto 26.9 MiB 0.12 398 2196 430 1697 69 65.6 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000468656 0.000387965 0.0139473 0.0119918 -1 -1 -1 -1 16 284 8 1.07788e+06 700622 -1 -1 0.28 0.0788417 0.0678402 2680 3516 -1 273 3 184 266 11521 5744 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0151497 0.0144591 - x_delta_y_uniform.xml stereovision3.v common 1.67 vpr 65.78 MiB 0.05 9984 -1 -1 4 0.17 -1 -1 40712 -1 -1 13 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67356 11 30 262 292 2 110 54 7 7 49 clb auto 27.0 MiB 0.11 474 1992 348 1574 70 65.8 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000450631 0.000369149 0.0127092 0.0109666 -1 -1 -1 -1 48 367 4 1.07788e+06 700622 -1 -1 0.46 0.187113 0.157611 2680 3516 -1 363 2 162 240 11458 5656 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0141159 0.0135524 - x_delta_y_delta.xml stereovision3.v common 1.41 vpr 65.68 MiB 0.05 9984 -1 -1 4 0.17 -1 -1 38292 -1 -1 13 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67260 11 30 262 292 2 110 54 7 7 49 clb auto 26.9 MiB 0.12 411 2094 373 1653 68 65.7 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000478875 0.000382715 0.0140865 0.0122714 -1 -1 -1 -1 48 306 4 1.07788e+06 700622 -1 -1 0.20 0.107373 0.0919185 2680 3516 -1 300 3 176 263 11898 5867 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.014938 0.0142467 - x_uniform_y_delta.xml stereovision3.v common 1.47 vpr 65.57 MiB 0.05 9984 -1 -1 4 0.17 -1 -1 37488 -1 -1 13 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 67144 11 30 262 292 2 110 54 7 7 49 clb auto 26.9 MiB 0.11 405 2196 394 1718 84 65.6 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000448588 0.000370342 0.0136716 0.0117962 -1 -1 -1 -1 58 286 2 1.07788e+06 700622 -1 -1 0.28 0.112457 0.0956247 2680 3516 -1 286 2 161 239 8848 4226 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0140539 0.0134498 + x_gaussian_y_uniform.xml stereovision3.v common 1.80 vpr 64.59 MiB 0.05 9920 -1 -1 4 0.20 -1 -1 33316 -1 -1 13 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66140 11 30 262 292 2 110 54 7 7 49 clb auto 25.5 MiB 0.13 437 1482 306 1120 56 64.6 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000643567 0.000574681 0.0143423 0.0131271 -1 -1 -1 -1 12 342 4 1.07788e+06 700622 -1 -1 0.19 0.089611 0.0789696 2680 3516 -1 329 3 168 254 12149 6156 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0184131 0.0175473 + x_uniform_y_gaussian.xml stereovision3.v common 1.90 vpr 64.60 MiB 0.07 10112 -1 -1 4 0.20 -1 -1 33352 -1 -1 13 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66152 11 30 262 292 2 110 54 7 7 49 clb auto 25.5 MiB 0.13 407 2196 418 1692 86 64.6 MiB 0.04 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000658043 0.000585568 0.0188587 0.0171531 -1 -1 -1 -1 12 297 4 1.07788e+06 700622 -1 -1 0.25 0.0992671 0.0872902 2680 3516 -1 290 2 161 238 9382 4536 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.0180057 0.0172294 + x_gaussian_y_gaussian.xml stereovision3.v common 2.15 vpr 64.69 MiB 0.06 9984 -1 -1 4 0.20 -1 -1 33348 -1 -1 13 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66244 11 30 262 292 2 110 54 7 7 49 clb auto 25.6 MiB 0.13 454 1584 320 1205 59 64.7 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000634493 0.000563945 0.0146242 0.0133184 -1 -1 -1 -1 14 366 11 1.07788e+06 700622 -1 -1 0.52 0.179464 0.155257 2680 3516 -1 348 15 235 399 18124 8998 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.06 0.00 -1 -1 0.00 0.0336258 0.0306404 + x_delta_y_uniform.xml stereovision3.v common 2.15 vpr 65.34 MiB 0.06 10036 -1 -1 4 0.19 -1 -1 33492 -1 -1 13 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66908 11 30 262 292 2 110 54 7 7 49 clb auto 25.5 MiB 0.13 447 1584 304 1234 46 65.3 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.00060675 0.000538932 0.0145363 0.0132998 -1 -1 -1 -1 58 343 10 1.07788e+06 700622 -1 -1 0.55 0.240804 0.206885 2680 3516 -1 344 2 158 235 10766 5342 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.03 0.00 -1 -1 0.00 0.017128 0.0164094 + x_delta_y_delta.xml stereovision3.v common 2.08 vpr 64.78 MiB 0.07 10108 -1 -1 4 0.21 -1 -1 33260 -1 -1 13 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66336 11 30 262 292 2 110 54 7 7 49 clb auto 25.6 MiB 0.12 507 2196 485 1634 77 64.8 MiB 0.03 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000513893 0.000456075 0.0159956 0.0145097 -1 -1 -1 -1 54 397 16 1.07788e+06 700622 -1 -1 0.50 0.221994 0.188707 2680 3516 -1 391 16 432 703 33205 16363 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.00 0.06 0.00 -1 -1 0.00 0.0309187 0.0279413 + x_uniform_y_delta.xml stereovision3.v common 2.38 vpr 65.23 MiB 0.06 9988 -1 -1 4 0.20 -1 -1 33480 -1 -1 13 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66796 11 30 262 292 2 110 54 7 7 49 clb auto 25.5 MiB 0.11 434 2604 541 1982 81 65.2 MiB 0.04 0.00 1.91988 -135.359 -1.91988 1.85222 0.01 0.000790777 0.00071626 0.0195938 0.0177623 -1 -1 -1 -1 34 315 15 1.07788e+06 700622 -1 -1 0.64 0.293892 0.25135 2680 3516 -1 312 15 303 587 23249 9988 1.91988 1.85222 -135.359 -1.91988 0 0 -1 -1 0.01 0.11 0.01 -1 -1 0.01 0.0358566 0.0326766 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_routing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_routing/config/golden_results.txt index d12d65fc0d2..45783bae7b7 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_routing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_global_routing/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - timing/k6_N10_mem32K_40nm.xml stereovision3.v common 3.45 vpr 61.04 MiB 0.07 9844 -1 -1 4 0.17 -1 -1 33252 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62508 11 30 262 292 2 104 60 7 7 49 clb auto 22.3 MiB 0.13 418 61.0 MiB 0.13 0.00 1.93141 -141.327 -1.93141 1.88461 0.03 0.00119489 0.000975652 0.0153442 0.0134753 8 319 19 1.07788e+06 1.02399e+06 -1 -1 1.09 0.132218 0.117289 328 20 606 1201 100051 42271 1.93141 1.88461 -141.327 -1.93141 0 0 -1 -1 0.01 0.23 0.0372408 0.0341054 - nonuniform_chan_width/k6_N10_mem32K_40nm_nonuniform.xml stereovision3.v common 3.29 vpr 60.90 MiB 0.07 9860 -1 -1 4 0.17 -1 -1 33244 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62360 11 30 262 292 2 104 60 7 7 49 clb auto 22.2 MiB 0.11 404 60.9 MiB 0.11 0.00 1.93141 -141.327 -1.93141 1.88461 0.03 0.000527649 0.00044994 0.0140052 0.0121693 12 311 33 1.07788e+06 1.02399e+06 -1 -1 0.81 0.119323 0.105375 293 18 626 1253 93396 37284 1.93141 1.88461 -141.327 -1.93141 0 0 -1 -1 0.01 0.20 0.0309419 0.0284445 - nonuniform_chan_width/k6_N10_mem32K_40nm_pulse.xml stereovision3.v common 3.57 vpr 60.85 MiB 0.06 9852 -1 -1 4 0.18 -1 -1 33248 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62308 11 30 262 292 2 104 60 7 7 49 clb auto 22.1 MiB 0.11 450 60.8 MiB 0.09 0.00 1.93141 -141.327 -1.93141 1.88461 0.02 0.000537954 0.00045489 0.014779 0.0133295 14 347 18 1.07788e+06 1.02399e+06 -1 -1 1.35 0.178901 0.158164 349 17 634 1308 104026 42732 1.93141 1.88461 -141.327 -1.93141 0 0 -1 -1 0.01 0.17 0.0299926 0.027348 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + timing/k6_N10_mem32K_40nm.xml stereovision3.v common 1.81 vpr 63.86 MiB 0.06 9972 -1 -1 4 0.20 -1 -1 33444 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65396 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.09 425 2049 385 1607 57 63.9 MiB 0.03 0.00 1.93141 -140.772 -1.93141 1.88461 0.01 0.000539136 0.000477079 0.0137959 0.0125271 -1 -1 -1 -1 8 277 16 1.07788e+06 1.02399e+06 -1 -1 0.23 0.0995243 0.0866078 2100 3116 -1 273 21 567 1118 57694 28121 1.93141 1.88461 -140.772 -1.93141 0 0 -1 -1 0.00 0.08 0.00 -1 -1 0.00 0.0377719 0.0335488 + nonuniform_chan_width/k6_N10_mem32K_40nm_nonuniform.xml stereovision3.v common 1.77 vpr 64.53 MiB 0.07 9928 -1 -1 4 0.20 -1 -1 33420 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66080 11 30 262 292 2 99 60 7 7 49 clb auto 24.7 MiB 0.08 437 1698 295 1347 56 64.5 MiB 0.03 0.00 1.93141 -140.772 -1.93141 1.88461 0.01 0.000564734 0.000501615 0.0121215 0.0110071 -1 -1 -1 -1 12 311 21 1.07788e+06 1.02399e+06 -1 -1 0.20 0.103275 0.0897267 2100 3116 -1 280 16 541 967 52659 26082 1.93141 1.88461 -140.772 -1.93141 0 0 -1 -1 0.00 0.07 0.00 -1 -1 0.00 0.0337495 0.0305254 + nonuniform_chan_width/k6_N10_mem32K_40nm_pulse.xml stereovision3.v common 1.73 vpr 64.50 MiB 0.07 9852 -1 -1 4 0.19 -1 -1 33472 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66048 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 458 2049 322 1664 63 64.5 MiB 0.04 0.00 1.93141 -140.772 -1.93141 1.88461 0.01 0.00067398 0.000608186 0.0192321 0.0176286 -1 -1 -1 -1 14 304 18 1.07788e+06 1.02399e+06 -1 -1 0.18 0.09714 0.0842011 2100 3116 -1 308 19 560 1062 59748 29836 1.93141 1.88461 -140.772 -1.93141 0 0 -1 -1 0.00 0.06 0.00 -1 -1 0.00 0.0318622 0.028394 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_graphics_commands/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_graphics_commands/config/golden_results.txt index aa653ae6c98..0367bfe7230 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_graphics_commands/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_graphics_commands/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 6.58 vpr 60.87 MiB 0.07 9832 -1 -1 4 0.15 -1 -1 33228 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62332 11 30 262 292 2 104 60 7 7 49 clb auto 22.5 MiB 0.12 398 60.9 MiB 2.24 0.00 2.2193 -164.973 -2.2193 2.11301 0.00 0.000617105 0.00052754 0.0167387 0.0143922 -1 450 27 1.07788e+06 1.02399e+06 207176. 4228.08 1.37 0.0571616 0.0502664 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 5.37 vpr 63.99 MiB 0.10 9968 -1 -1 4 0.20 -1 -1 33400 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65528 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 421 2049 269 1715 65 64.0 MiB 1.89 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 0.00057386 0.000512781 0.0146636 0.0132498 -1 -1 -1 -1 -1 424 16 1.07788e+06 1.02399e+06 207176. 4228.08 1.13 0.0484194 0.0434429 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_manual_annealing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_manual_annealing/config/golden_results.txt index bfa8da591a0..acbedece480 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_manual_annealing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_manual_annealing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml stereovision3.v common 4.30 vpr 56.50 MiB 0.11 9472 -1 -1 4 0.18 -1 -1 33168 -1 -1 13 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 57856 11 30 262 292 2 110 54 6 6 36 clb auto 18.4 MiB 0.14 381 56.5 MiB 0.07 0.00 2.24325 -157.312 -2.24325 2.08574 0.04 0.000383119 0.000300427 0.021027 0.0172661 32 758 33 862304 700622 60095.3 1669.31 0.16 0.266546 0.23059 585 18 491 901 39740 14738 2.70595 2.33237 -183.179 -2.70595 0 0 72928.5 2025.79 0.01 0.17 0.0320137 0.0292536 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml stereovision3.v common 1.99 vpr 60.15 MiB 0.06 9668 -1 -1 4 0.17 -1 -1 33476 -1 -1 13 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61592 11 30 262 292 2 110 54 6 6 36 clb auto 20.4 MiB 0.13 423 4182 3462 630 90 60.1 MiB 0.08 0.00 2.57043 -171.237 -2.57043 2.32238 0.05 0.00089131 0.000815522 0.0388204 0.0350413 -1 -1 -1 -1 32 775 32 862304 700622 60095.3 1669.31 0.30 0.160018 0.138863 2828 10782 -1 624 11 377 562 17524 7204 2.60136 2.32286 -183.634 -2.60136 0 0 72928.5 2025.79 0.01 0.04 0.01 -1 -1 0.01 0.0300283 0.0274063 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_mcnc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_mcnc/config/golden_results.txt index 4f149cfe3ed..ce0ea8dc839 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_mcnc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_mcnc/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N4_90nm.xml diffeq.blif common 27.08 vpr 66.77 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 417 64 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 68368 64 39 1935 1974 1 1104 520 23 23 529 clb auto 29.0 MiB 0.47 9930 66.8 MiB 1.24 0.02 6.88012 -1336.71 -6.88012 6.88012 1.10 0.0047538 0.00423621 0.324427 0.28444 22 12669 27 983127 929624 735934. 1391.18 20.06 1.71425 1.48399 10966 18 7099 24037 1733502 451965 6.88012 6.88012 -1447.76 -6.88012 0 0 927497. 1753.30 0.19 0.82 0.239416 0.215404 - k4_N4_90nm.xml ex5p.blif common 24.47 vpr 62.76 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 346 8 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64268 8 63 1072 1135 0 909 417 21 21 441 clb auto 24.8 MiB 0.33 11775 62.8 MiB 0.93 0.02 6.73044 -287.966 -6.73044 nan 0.65 0.00399168 0.00327065 0.198265 0.174411 34 15442 28 804782 771343 910617. 2064.89 19.22 0.970616 0.850621 13437 19 7666 25446 2656403 652155 6.73044 nan -299.64 -6.73044 0 0 1.15594e+06 2621.17 0.17 0.66 0.0893314 0.080238 - k4_N4_90nm.xml s298.blif common 22.80 vpr 69.37 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 571 4 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 71036 4 6 1942 1948 1 1193 581 26 26 676 clb auto 32.0 MiB 0.47 14113 69.4 MiB 1.59 0.03 11.3201 -90.4013 -11.3201 11.3201 1.16 0.00602192 0.00530585 0.373576 0.323605 26 18559 39 1.28409e+06 1.27294e+06 1.12979e+06 1671.28 13.19 1.52797 1.30057 16626 19 8719 42915 3886758 808027 11.4152 11.4152 -91.9094 -11.4152 0 0 1.43821e+06 2127.53 0.66 1.67 0.291526 0.255585 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k4_N4_90nm.xml diffeq.blif common 14.82 vpr 69.00 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 438 64 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70652 64 39 1935 1974 1 1077 541 23 23 529 clb auto 28.8 MiB 0.46 10085 137127 36539 98027 2561 69.0 MiB 1.29 0.02 7.41831 -1418.64 -7.41831 7.41831 0.93 0.00542256 0.0043447 0.391364 0.336096 -1 -1 -1 -1 22 12754 28 983127 976439 735934. 1391.18 8.01 1.19718 1.03739 35322 121345 -1 11109 19 6608 23845 1462488 382373 7.14816 7.14816 -1474.13 -7.14816 0 0 927497. 1753.30 0.20 0.73 0.16 -1 -1 0.20 0.232845 0.209152 + k4_N4_90nm.xml ex5p.blif common 30.39 vpr 64.52 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 366 8 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66072 8 63 1072 1135 0 894 437 22 22 484 clb auto 25.1 MiB 0.32 11802 104828 31007 71723 2098 64.5 MiB 0.99 0.02 6.54351 -290.193 -6.54351 nan 0.80 0.00510866 0.00465601 0.247547 0.215944 -1 -1 -1 -1 34 15886 35 891726 815929 1.00654e+06 2079.64 24.52 1.13626 0.978644 45600 169672 -1 13479 18 7616 26985 2968727 818222 6.43932 nan -293.77 -6.43932 0 0 1.27783e+06 2640.15 0.20 0.82 0.22 -1 -1 0.20 0.123294 0.109373 + k4_N4_90nm.xml s298.blif common 53.24 vpr 70.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 580 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 72636 4 6 1942 1948 1 1169 590 27 27 729 clb auto 30.8 MiB 0.42 13579 163808 47993 114862 953 70.9 MiB 1.53 0.02 12.0403 -94.3066 -12.0403 12.0403 1.25 0.00553281 0.00453291 0.434948 0.364606 -1 -1 -1 -1 24 19358 45 1.39333e+06 1.29301e+06 1.12265e+06 1539.99 44.05 2.01627 1.70098 54650 192211 -1 16862 23 9147 49878 4855038 894292 11.751 11.751 -96.5615 -11.751 0 0 1.47093e+06 2017.74 0.26 1.56 0.23 -1 -1 0.26 0.263955 0.229636 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_minimax_budgets/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_minimax_budgets/config/golden_results.txt index 8094dd27fda..7b4d40ad61c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_minimax_budgets/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_minimax_budgets/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.49 vpr 62.64 MiB 0.18 9928 -1 -1 5 0.16 -1 -1 33224 -1 -1 13 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64148 11 30 313 321 2 119 54 7 7 49 clb auto 24.6 MiB 0.32 416 62.6 MiB 0.13 0.00 4.27922 0 0 4.05316 0.00 0.000499923 0.000427289 0.0196577 0.0174309 633 223 365 10637 2953 1.07788e+06 700622 219490. 4479.39 5 4.59927 4.27983 0 0 -164.579 -1.707 62.6 MiB 0.26 0.146256 0.141433 62.6 MiB 0.07 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.89 vpr 67.16 MiB 0.08 10336 -1 -1 5 0.21 -1 -1 33252 -1 -1 14 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68768 11 30 313 321 2 114 55 7 7 49 clb auto 27.4 MiB 0.33 439 1511 357 1028 126 67.2 MiB 0.07 0.00 4.62621 0 0 4.30823 0.00 0.00078995 0.00071828 0.0210334 0.0197012 -1 -1 -1 -1 639 5.91667 232 2.14815 379 726 16470 4839 1.07788e+06 754516 219490. 4479.39 10 5100 32136 -1 4.76665 4.41703 0 0 -164.948 -1.707 0.04 -1 -1 67.2 MiB 0.16 0.162181 0.155936 67.2 MiB -1 0.05 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_no_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_no_timing/config/golden_results.txt index 219baee58cc..20374de3e27 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_no_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_no_timing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ch_intrinsics.v common 5.46 vpr 63.09 MiB 0.14 9396 -1 -1 3 0.35 -1 -1 36364 -1 -1 64 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64608 99 130 363 493 1 248 294 12 12 144 clb auto 24.7 MiB 0.15 820 63.1 MiB 0.18 0.00 34 2264 20 5.66058e+06 3.99722e+06 317980. 2208.19 3.05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time + k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ch_intrinsics.v common 2.74 vpr 66.21 MiB 0.07 9628 -1 -1 3 0.35 -1 -1 34640 -1 -1 66 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67804 99 130 363 493 1 250 296 12 12 144 clb auto 27.0 MiB 0.19 914 65372 15140 25128 25104 66.2 MiB 0.10 0.00 34 2054 14 5.66058e+06 4.105e+06 317980. 2208.19 0.75 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack/config/golden_results.txt index 54f99e569b4..7d08de7d57f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.49 vpr 60.87 MiB 0.14 9908 -1 -1 4 0.16 -1 -1 33340 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62332 11 30 262 292 2 104 60 7 7 49 clb auto 22.2 MiB 0.12 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.000498093 0.000386293 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 1.18 vpr 64.60 MiB 0.08 9968 -1 -1 4 0.19 -1 -1 33248 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66148 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.08 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00212704 0.00202414 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_and_place/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_and_place/config/golden_results.txt index 91f6012e3bf..a85975233a5 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_and_place/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_and_place/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 1.66 vpr 60.89 MiB 0.14 9836 -1 -1 4 0.19 -1 -1 33196 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62352 11 30 262 292 2 104 60 7 7 49 clb auto 22.2 MiB 0.10 415 60.9 MiB 0.08 0.00 2.23761 -166.997 -2.23761 2.13034 0.09 0.000437186 0.000376185 0.0295979 0.0276449 -1 -1 -1 -1 -1 -1 -1 -1 0.030172 0.0281076 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 1.29 vpr 64.50 MiB 0.08 9892 -1 -1 4 0.20 -1 -1 33360 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66052 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 439 1932 239 1639 54 64.5 MiB 0.03 0.00 2.45489 -180.196 -2.45489 2.33213 0.07 0.000557675 0.000497069 0.0140116 0.0127239 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.0161027 0.014718 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_disable/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_disable/config/golden_results.txt index cffc358b0ae..c26de4c60a8 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_disable/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_pack_disable/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml mult_5x6.blif common 0.78 vpr 55.72 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 57056 11 11 59 70 0 48 26 4 4 16 clb auto 17.3 MiB 0.06 156 55.7 MiB 0.07 0.00 2.26753 -18.5589 -2.26753 nan 0.02 0.000127844 0.000105805 0.003466 0.00304351 32 232 34 215576 215576 19628.8 1226.80 0.17 0.0235068 0.0203823 232 18 233 497 14973 8367 2.96713 nan -25.7572 -2.96713 0 0 23512.3 1469.52 0.00 0.02 0.0078595 0.00723538 - k6_frac_N10_40nm_disable_packing.xml mult_5x6.blif common 0.09 vpr 18.17 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 18604 11 11 59 70 0 -1 -1 -1 -1 -1 -1 -1 16.4 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml mult_5x6.blif common 0.77 vpr 58.57 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59976 11 11 59 70 0 48 26 4 4 16 clb auto 19.2 MiB 0.04 179 634 146 488 0 58.6 MiB 0.01 0.00 2.51353 -20.6332 -2.51353 nan 0.01 0.000235015 0.000215515 0.00574618 0.00532029 -1 -1 -1 -1 30 199 15 215576 215576 18771.3 1173.21 0.19 0.061719 0.0519663 1016 3020 -1 198 17 257 591 8958 4396 2.73234 nan -23.1489 -2.73234 0 0 22855.5 1428.47 0.01 0.02 0.01 -1 -1 0.01 0.0122134 0.0110341 + k6_frac_N10_40nm_disable_packing.xml mult_5x6.blif common 0.05 vpr 21.55 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 22068 11 11 59 70 0 -1 -1 -1 -1 -1 -1 -1 19.1 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place/config/golden_results.txt index 5bc7801a6f3..0266ed5293a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml multiclock.blif common 0.35 vpr 58.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60384 5 3 11 14 2 9 10 4 4 16 clb auto -1 -1 16 59.0 MiB 0.01 0.00 0.571 -3.2372 -0.571 0.571 0.02 3.4411e-05 2.3104e-05 0.000228954 0.000160901 -1 -1 -1 -1 -1 -1 -1 -1 0.000228954 0.000160901 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml multiclock.blif common 0.29 vpr 62.64 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64140 5 3 11 14 2 9 10 4 4 16 clb auto -1 -1 20 30 10 17 3 62.6 MiB 0.00 0.00 0.645658 -3.51726 -0.645658 0.571 0.01 4.8438e-05 3.4201e-05 0.00152576 0.00147521 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.00152576 0.00147521 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_calc_method/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_calc_method/config/golden_results.txt index 5210bd22522..5ab315508dd 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_calc_method/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_calc_method/config/golden_results.txt @@ -1,5 +1,5 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_astar 34.95 vpr 975.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 999264 10 10 168 178 1 68 30 11 8 88 io auto 953.0 MiB 0.51 420 582 82 470 30 975.8 MiB 0.07 0.00 6.38568 -70.463 -6.38568 6.38568 3.83 0.0011575 0.00107635 0.0190909 0.0179312 20 909 46 0 0 100248. 1139.18 1.00 0.220943 0.20054 11180 23751 -1 803 20 495 1987 182273 69910 6.92851 6.92851 -75.9518 -6.92851 0 0 125464. 1425.72 0.03 0.12 0.10 -1 -1 0.03 0.0520487 0.047733 -stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_astar 36.19 vpr 975.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 999352 10 10 168 178 1 68 30 11 8 88 io auto 953.1 MiB 0.51 395 582 95 453 34 975.9 MiB 0.10 0.00 6.37094 -69.85 -6.37094 6.37094 3.90 0.00115739 0.00107675 0.0208402 0.0195903 30 698 21 0 0 144567. 1642.81 1.91 0.378306 0.34262 11730 32605 -1 613 13 256 907 102553 34444 6.74537 6.74537 -72.8995 -6.74537 0 0 194014. 2204.70 0.04 0.09 0.13 -1 -1 0.04 0.0384272 0.0355085 -stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_dijkstra 37.58 vpr 975.73 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 999148 10 10 168 178 1 68 30 11 8 88 io auto 953.0 MiB 0.51 397 720 67 602 51 975.7 MiB 0.08 0.00 6.26392 -69.0334 -6.26392 6.26392 5.22 0.00115722 0.00107709 0.0227346 0.021333 28 756 41 0 0 134428. 1527.59 1.91 0.438049 0.396121 11590 29630 -1 630 13 314 1267 123272 45348 6.70457 6.70457 -73.6326 -6.70457 0 0 173354. 1969.93 0.03 0.09 0.11 -1 -1 0.03 0.0385845 0.0356554 -stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_dijkstra 38.17 vpr 975.73 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 999148 10 10 168 178 1 68 30 11 8 88 io auto 953.0 MiB 0.50 389 720 68 606 46 975.7 MiB 0.08 0.00 6.38744 -69.2885 -6.38744 6.38744 5.25 0.00115672 0.00107669 0.0224942 0.0210923 30 789 25 0 0 144567. 1642.81 1.85 0.359123 0.324985 11730 32605 -1 641 13 341 1402 154982 50243 6.64135 6.64135 -73.6773 -6.64135 0 0 194014. 2204.70 0.04 0.11 0.13 -1 -1 0.04 0.0387743 0.0358249 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_astar 38.59 vpr 976.47 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999904 10 10 168 178 1 68 30 11 8 88 io auto 953.3 MiB 0.63 393 628 105 491 32 976.5 MiB 0.06 0.00 6.51193 -69.1178 -6.51193 6.51193 3.11 0.000480842 0.000431377 0.0112949 0.0105397 -1 -1 -1 -1 20 893 28 0 0 100248. 1139.18 0.66 0.109748 0.0976349 11180 23751 -1 831 19 496 1987 121384 60113 6.91414 6.91414 -78.1319 -6.91414 0 0 125464. 1425.72 0.02 0.09 0.07 -1 -1 0.02 0.0302143 0.0267735 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_astar 38.84 vpr 976.57 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1000004 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.62 380 628 91 496 41 976.6 MiB 0.06 0.00 6.52338 -69.1003 -6.52338 6.52338 3.24 0.000527135 0.000462877 0.0115671 0.0108087 -1 -1 -1 -1 30 673 12 0 0 144567. 1642.81 0.58 0.0925956 0.0823255 11730 32605 -1 585 9 216 698 45031 21119 6.8993 6.8993 -73.7008 -6.8993 0 0 194014. 2204.70 0.03 0.06 0.10 -1 -1 0.03 0.0207007 0.0188861 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_--place_delta_delay_matrix_calculation_method_dijkstra 40.21 vpr 976.52 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999952 10 10 168 178 1 68 30 11 8 88 io auto 953.3 MiB 0.62 369 766 101 608 57 976.5 MiB 0.07 0.00 6.29548 -69.1499 -6.29548 6.29548 3.96 0.000642065 0.000578628 0.0144046 0.0134125 -1 -1 -1 -1 20 979 39 0 0 100248. 1139.18 1.54 0.210388 0.179459 11180 23751 -1 730 15 326 1149 70174 36157 6.70251 6.70251 -75.6785 -6.70251 0 0 125464. 1425.72 0.02 0.07 0.07 -1 -1 0.02 0.0262708 0.0234853 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override_--place_delta_delay_matrix_calculation_method_dijkstra 39.65 vpr 976.56 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999996 10 10 168 178 1 68 30 11 8 88 io auto 953.5 MiB 0.62 393 720 70 599 51 976.6 MiB 0.06 0.00 6.29266 -69.3194 -6.29266 6.29266 3.95 0.000492354 0.000450911 0.0121985 0.0113493 -1 -1 -1 -1 30 792 16 0 0 144567. 1642.81 0.52 0.0829003 0.0732049 11730 32605 -1 644 15 284 1326 83485 37502 6.72776 6.72776 -73.9475 -6.72776 0 0 194014. 2204.70 0.03 0.07 0.10 -1 -1 0.03 0.0265404 0.0237185 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_model/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_model/config/golden_results.txt index b984fa79a61..550a3bb84c1 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_model/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_delay_model/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta 35.53 vpr 975.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 999348 10 10 168 178 1 68 30 11 8 88 io auto 953.1 MiB 0.50 420 582 82 470 30 975.9 MiB 0.10 0.00 6.38568 -70.463 -6.38568 6.38568 3.83 0.00116152 0.0010805 0.0194281 0.0182661 20 909 46 0 0 100248. 1139.18 1.11 0.221992 0.201633 11180 23751 -1 803 20 495 1987 182273 69910 6.92851 6.92851 -75.9518 -6.92851 0 0 125464. 1425.72 0.03 0.12 0.10 -1 -1 0.03 0.0523375 0.0480481 -stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override 36.16 vpr 975.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 999260 10 10 168 178 1 68 30 11 8 88 io auto 953.0 MiB 0.50 395 582 95 453 34 975.8 MiB 0.08 0.00 6.37094 -69.85 -6.37094 6.37094 3.91 0.00116292 0.00108314 0.0202559 0.0190173 30 698 21 0 0 144567. 1642.81 1.91 0.378554 0.342874 11730 32605 -1 613 13 256 907 102553 34444 6.74537 6.74537 -72.8995 -6.74537 0 0 194014. 2204.70 0.04 0.09 0.13 -1 -1 0.04 0.0389162 0.0359761 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta 39.27 vpr 976.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 999936 10 10 168 178 1 68 30 11 8 88 io auto 953.4 MiB 0.61 393 628 105 491 32 976.5 MiB 0.06 0.00 6.51193 -69.1178 -6.51193 6.51193 3.33 0.000569129 0.000496002 0.012275 0.0114625 -1 -1 -1 -1 20 893 28 0 0 100248. 1139.18 0.66 0.116406 0.101755 11180 23751 -1 831 19 496 1987 121384 60113 6.91414 6.91414 -78.1319 -6.91414 0 0 125464. 1425.72 0.02 0.09 0.07 -1 -1 0.02 0.0312385 0.0276729 + stratixiv_arch.timing.xml styr.blif common_--place_delay_model_delta_override 36.90 vpr 976.67 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1000112 10 10 168 178 1 68 30 11 8 88 io auto 953.7 MiB 0.60 380 628 91 496 41 976.7 MiB 0.06 0.00 6.52338 -69.1003 -6.52338 6.52338 3.10 0.000501046 0.000450601 0.0117982 0.0109963 -1 -1 -1 -1 30 673 12 0 0 144567. 1642.81 0.47 0.0799941 0.0704629 11730 32605 -1 585 9 216 698 45031 21119 6.8993 6.8993 -73.7008 -6.8993 0 0 194014. 2204.70 0.03 0.06 0.10 -1 -1 0.03 0.0206622 0.0188402 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_effort_scaling/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_effort_scaling/config/golden_results.txt index 04a0a57f427..02e9ce0dfc9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_effort_scaling/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_effort_scaling/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - EArch.xml ex5p.blif common_--place_effort_scaling_circuit 3.35 vpr 71.40 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73112 8 63 1072 1135 0 626 130 11 11 121 clb auto 33.5 MiB 1.74 5954 71.4 MiB 0.53 0.01 4.50897 -193.431 -4.50897 nan 0.31 0.00163588 0.00143748 0.145591 0.130361 -1 -1 -1 -1 -1 -1 -1 -1 0.147812 0.13232 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit 3.35 vpr 71.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73376 8 63 1072 1135 0 626 130 11 11 121 clb auto 33.8 MiB 1.68 5963 71.7 MiB 0.52 0.01 4.47285 -191.751 -4.47285 nan 0.34 0.00348115 0.00316124 0.150919 0.134533 -1 -1 -1 -1 -1 -1 -1 -1 0.15409 0.137256 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - EArch.xml ex5p.blif common_--place_effort_scaling_circuit_--target_utilization_0.1 8.96 vpr 71.40 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73112 8 63 1072 1135 0 626 130 27 27 729 -1 auto 33.5 MiB 1.73 6840 71.4 MiB 0.68 0.01 4.98975 -232.432 -4.98975 nan 3.27 0.00222673 0.00190773 0.220622 0.195273 -1 -1 -1 -1 -1 -1 -1 -1 0.22441 0.198549 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit_--target_utilization_0.1 9.73 vpr 71.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 59 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 73216 8 63 1072 1135 0 626 130 27 27 729 -1 auto 33.6 MiB 1.65 6725 71.5 MiB 1.22 0.02 5.07863 -230.426 -5.07863 nan 3.05 0.00152463 0.00134745 0.235038 0.20865 -1 -1 -1 -1 -1 -1 -1 -1 0.237056 0.210386 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + EArch.xml ex5p.blif common_--place_effort_scaling_circuit 4.11 vpr 74.34 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76128 8 63 1072 1135 0 619 135 12 12 144 clb auto 34.5 MiB 2.33 6183 12245 2318 9041 886 74.3 MiB 0.42 0.01 4.99539 -218.829 -4.99539 nan 0.40 0.00404212 0.00341765 0.184837 0.163351 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.189101 0.167214 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit 4.01 vpr 74.36 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 76144 8 63 1072 1135 0 619 135 12 12 144 clb auto 34.3 MiB 2.38 6325 11326 2120 8412 794 74.4 MiB 0.36 0.01 4.96391 -216.681 -4.96391 nan 0.38 0.00390508 0.00360049 0.150898 0.136289 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.155447 0.140327 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml ex5p.blif common_--place_effort_scaling_circuit_--target_utilization_0.1 9.78 vpr 78.00 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 79868 8 63 1072 1135 0 619 135 27 27 729 -1 auto 34.2 MiB 2.05 6780 22625 6869 14375 1381 77.8 MiB 0.53 0.01 5.57619 -254.596 -5.57619 nan 3.24 0.00298107 0.00257554 0.222411 0.19574 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.226597 0.199503 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml ex5p.blif common_--place_effort_scaling_device_circuit_--target_utilization_0.1 10.33 vpr 78.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 64 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 79920 8 63 1072 1135 0 619 135 27 27 729 -1 auto 34.4 MiB 2.32 6916 70425 20372 45422 4631 78.0 MiB 1.06 0.02 5.61138 -254.037 -5.61138 nan 3.32 0.00308249 0.00275482 0.219018 0.196554 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0.223523 0.200574 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_quench_slack/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_quench_slack/config/golden_results.txt index b0541d9e274..894bbbd344b 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_quench_slack/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_place_quench_slack/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common 2.93 vpr 60.99 MiB 0.13 9868 -1 -1 4 0.18 -1 -1 33212 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62456 11 30 262 292 2 104 60 7 7 49 clb auto 22.4 MiB 0.17 433 61.0 MiB 0.11 0.05 2.21834 -167.282 -2.21834 2.12115 0.07 0.0521684 0.0402998 0.0703424 0.0571342 22 678 25 1.07788e+06 1.02399e+06 54623.3 1114.76 0.59 0.242717 0.205883 715 27 866 2161 94097 29092 2.67576 2.48474 -192.504 -2.67576 0 0 69322.2 1414.74 0.02 0.10 0.036351 0.0323536 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common 2.45 vpr 64.46 MiB 0.06 10080 -1 -1 4 0.19 -1 -1 33316 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66004 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.08 439 1932 239 1639 54 64.5 MiB 0.03 0.00 2.45489 -180.196 -2.45489 2.33213 0.08 0.000661458 0.000589394 0.0146171 0.0132586 -1 -1 -1 -1 20 684 34 1.07788e+06 1.02399e+06 49980.0 1020.00 0.62 0.239102 0.203363 2664 9102 -1 585 25 992 2191 68660 23567 2.62928 2.46785 -187.223 -2.62928 0 0 65453.8 1335.79 0.02 0.09 0.01 -1 -1 0.02 0.0513972 0.044921 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_post_routing_sync/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_post_routing_sync/config/golden_results.txt index a3d3b0a40d7..d972ea27949 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_post_routing_sync/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_post_routing_sync/config/golden_results.txt @@ -1,21 +1,21 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_true.blif common 0.29 vpr 60.26 MiB -1 -1 -1 -1 0 0.01 -1 -1 33120 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61704 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.9 MiB 0.00 0 3 0 0 3 60.3 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2243e-05 6.312e-06 7.1764e-05 4.4203e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00136779 0.00130369 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_false.blif common 0.29 vpr 59.90 MiB -1 -1 -1 -1 0 0.01 -1 -1 33592 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61340 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.6 MiB 0.00 0 3 0 0 3 59.9 MiB 0.00 0.00 nan 0 0 nan 0.00 1.1612e-05 6.272e-06 7.7714e-05 5.1887e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00142631 0.00136526 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_true.blif common 0.28 vpr 60.26 MiB -1 -1 -1 -1 0 0.01 -1 -1 33216 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61704 6 1 1 8 0 1 8 3 3 9 -1 auto 21.9 MiB 0.00 0 21 0 11 10 60.3 MiB 0.00 0.00 nan 0 0 nan 0.00 1.1852e-05 6.392e-06 6.8669e-05 4.2721e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.0013672 0.00130787 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_false.blif common 0.29 vpr 60.14 MiB -1 -1 -1 -1 0 0.01 -1 -1 35488 -1 -1 1 0 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61584 6 1 1 8 0 1 8 3 3 9 -1 auto 21.7 MiB 0.00 0 21 0 11 10 60.1 MiB 0.00 0.00 nan 0 0 nan 0.00 1.2493e-05 6.943e-06 7.0049e-05 4.3822e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.00 0.00137931 0.00131604 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and.blif common 0.29 vpr 60.16 MiB -1 -1 -1 -1 1 0.01 -1 -1 35268 -1 -1 1 2 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61600 2 1 3 4 0 3 4 3 3 9 -1 auto 21.9 MiB 0.00 9 9 4 3 2 60.2 MiB 0.00 0.00 0.443777 -0.443777 -0.443777 nan 0.00 1.4447e-05 9.778e-06 9.3896e-05 6.9199e-05 -1 -1 -1 -1 -1 6 17 3900 3900 7855.82 872.868 0.00 0.00172192 0.00155013 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut.blif common 0.38 vpr 60.34 MiB -1 -1 -1 -1 2 0.04 -1 -1 37228 -1 -1 1 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61792 5 1 7 8 0 7 7 3 3 9 -1 auto 22.0 MiB 0.00 20 18 2 11 5 60.3 MiB 0.00 0.00 0.70303 -0.70303 -0.70303 nan 0.00 1.9817e-05 1.4998e-05 0.000137998 0.000111519 -1 -1 -1 -1 -1 11 16 3900 3900 7855.82 872.868 0.00 0.00198062 0.00179885 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut2.blif common 0.40 vpr 60.25 MiB -1 -1 -1 -1 2 0.04 -1 -1 38656 -1 -1 1 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61700 5 1 7 8 0 7 7 3 3 9 -1 auto 21.9 MiB 0.00 20 18 3 11 4 60.3 MiB 0.00 0.00 0.70303 -0.70303 -0.70303 nan 0.00 2.088e-05 1.567e-05 0.000139813 0.00011204 -1 -1 -1 -1 -1 10 16 3900 3900 7855.82 872.868 0.00 0.0019744 0.00178405 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and_latch.blif common 0.25 vpr 62.17 MiB -1 -1 -1 -1 1 0.01 -1 -1 33596 -1 -1 1 3 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 63660 3 1 5 6 1 4 5 3 3 9 -1 auto 23.9 MiB 0.00 9 12 5 3 4 62.2 MiB 0.00 0.00 0.274843 -0.536407 -0.274843 0.274843 0.00 1.7953e-05 1.3104e-05 0.000115054 8.8775e-05 -1 -1 -1 -1 -1 10 5 3900 3900 7855.82 872.868 0.00 0.00160244 0.00150131 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml false_path_mux.blif common 0.39 vpr 60.26 MiB -1 -1 -1 -1 1 0.04 -1 -1 37528 -1 -1 1 3 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61704 4 1 4 6 0 4 6 3 3 9 -1 auto 22.0 MiB 0.00 12 15 6 8 1 60.3 MiB 0.00 0.00 0.443777 -0.443777 -0.443777 nan 0.00 1.7723e-05 1.2513e-05 9.7453e-05 7.2816e-05 -1 -1 -1 -1 -1 8 13 3900 3900 7855.82 872.868 0.00 0.00170031 0.00155698 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_2x2.blif common 0.39 vpr 60.35 MiB -1 -1 -1 -1 1 0.04 -1 -1 37884 -1 -1 1 4 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61796 4 4 8 12 0 8 9 3 3 9 -1 auto 22.0 MiB 0.00 25 27 10 13 4 60.3 MiB 0.00 0.00 0.443777 -1.77511 -0.443777 nan 0.00 2.7832e-05 2.1961e-05 0.000191958 0.000161551 -1 -1 -1 -1 -1 39 17 3900 3900 7855.82 872.868 0.00 0.0022588 0.00202292 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x3.blif common 0.43 vpr 60.50 MiB -1 -1 -1 -1 3 0.05 -1 -1 37644 -1 -1 3 6 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61952 6 6 28 34 0 28 15 5 5 25 clb auto 22.1 MiB 0.01 105 51 11 40 0 60.5 MiB 0.00 0.00 1.2267 -5.62751 -1.2267 nan 0.00 7.1834e-05 6.0292e-05 0.000517436 0.000467862 -1 -1 -1 -1 -1 185 18 23400 11700 33739.5 1349.58 0.01 0.00448242 0.00402683 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x4.blif common 0.45 vpr 60.52 MiB -1 -1 -1 -1 4 0.05 -1 -1 36864 -1 -1 5 7 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61968 7 8 39 47 0 39 20 5 5 25 clb auto 22.2 MiB 0.01 166 236 53 171 12 60.5 MiB 0.00 0.00 1.48724 -7.65174 -1.48724 nan 0.00 8.3876e-05 7.2856e-05 0.00121626 0.00108223 -1 -1 -1 -1 -1 340 19 23400 19500 33739.5 1349.58 0.02 0.00625284 0.00558683 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_4x4.blif common 0.50 vpr 60.75 MiB -1 -1 -1 -1 8 0.06 -1 -1 40004 -1 -1 7 8 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62212 8 8 51 59 0 51 23 6 6 36 clb auto 22.4 MiB 0.01 209 503 61 428 14 60.8 MiB 0.01 0.00 2.58988 -12.6437 -2.58988 nan 0.00 0.00011259 9.7552e-05 0.00239763 0.00211088 -1 -1 -1 -1 -1 458 20 165600 27300 61410.5 1705.85 0.03 0.00853388 0.00757617 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x5.blif common 0.61 vpr 60.94 MiB -1 -1 -1 -1 7 0.08 -1 -1 39640 -1 -1 11 10 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62404 10 10 95 105 0 95 31 6 6 36 clb auto 22.5 MiB 0.02 448 559 74 447 38 60.9 MiB 0.01 0.00 2.54509 -18.4246 -2.54509 nan 0.00 0.000183001 0.000158586 0.00295601 0.00264355 -1 -1 -1 -1 -1 1021 25 165600 42900 61410.5 1705.85 0.07 0.0138975 0.0123401 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x6.blif common 0.64 vpr 61.04 MiB -1 -1 -1 -1 8 0.08 -1 -1 40504 -1 -1 11 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62500 11 11 94 105 0 94 33 6 6 36 clb auto 22.5 MiB 0.02 438 501 77 394 30 61.0 MiB 0.01 0.00 2.87483 -21.0971 -2.87483 nan 0.00 0.000173626 0.000152686 0.00266615 0.00241062 -1 -1 -1 -1 -1 912 25 165600 42900 61410.5 1705.85 0.07 0.0136411 0.0121689 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_1bit.blif common 0.39 vpr 60.32 MiB -1 -1 -1 -1 1 0.04 -1 -1 36592 -1 -1 1 3 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61768 3 2 5 7 0 5 6 3 3 9 -1 auto 21.9 MiB 0.00 15 15 4 10 1 60.3 MiB 0.00 0.00 0.443777 -0.887553 -0.443777 nan 0.00 1.9948e-05 1.4848e-05 0.000131337 0.000104295 -1 -1 -1 -1 -1 13 16 3900 3900 7855.82 872.868 0.00 0.00192581 0.00173854 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_2bit.blif common 0.40 vpr 60.36 MiB -1 -1 -1 -1 2 0.05 -1 -1 36940 -1 -1 1 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 61812 5 3 9 12 0 9 9 3 3 9 -1 auto 21.9 MiB 0.00 26 27 10 10 7 60.4 MiB 0.00 0.00 0.70303 -1.84984 -0.70303 nan 0.00 2.9656e-05 2.3654e-05 0.000204453 0.000151212 -1 -1 -1 -1 -1 22 8 3900 3900 7855.82 872.868 0.00 0.00203437 0.00185928 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_3bit.blif common 0.40 vpr 60.61 MiB -1 -1 -1 -1 3 0.04 -1 -1 35980 -1 -1 1 7 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62068 7 4 13 17 0 13 12 3 3 9 -1 auto 22.0 MiB 0.00 37 38 21 15 2 60.6 MiB 0.00 0.00 0.962283 -3.07137 -0.962283 nan 0.00 3.4354e-05 2.8323e-05 0.000241069 0.000210002 -1 -1 -1 -1 -1 44 18 3900 3900 7855.82 872.868 0.00 0.00265483 0.00238484 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_4bit.blif common 0.40 vpr 60.56 MiB -1 -1 -1 -1 4 0.05 -1 -1 39856 -1 -1 1 9 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62016 9 5 17 22 0 17 15 3 3 9 -1 auto 22.0 MiB 0.00 48 51 24 19 8 60.6 MiB 0.00 0.00 1.22154 -4.55216 -1.22154 nan 0.00 4.1837e-05 3.4674e-05 0.000324556 0.000288489 -1 -1 -1 -1 -1 48 8 3900 3900 7855.82 872.868 0.00 0.00249205 0.00230732 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_5bit.blif common 0.42 vpr 60.59 MiB -1 -1 -1 -1 4 0.05 -1 -1 37732 -1 -1 2 11 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 62048 11 6 24 30 0 24 19 4 4 16 clb auto 22.1 MiB 0.01 85 69 11 46 12 60.6 MiB 0.00 0.00 1.38857 -6.95415 -1.38857 nan 0.00 5.5384e-05 4.4994e-05 0.000379349 0.000336047 -1 -1 -1 -1 -1 121 17 7800 7800 17482.0 1092.63 0.01 0.00377088 0.00338701 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_true.blif common 0.51 vpr 60.07 MiB -1 -1 -1 -1 0 0.02 -1 -1 30028 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61512 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.3 MiB 0.00 0 3 0 0 3 60.1 MiB 0.01 0.00 nan 0 0 nan 0.00 1.7627e-05 1.1573e-05 0.000113513 8.1967e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.01 0.00151028 0.00142155 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml const_false.blif common 0.50 vpr 60.09 MiB -1 -1 -1 -1 0 0.02 -1 -1 30092 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61532 -1 1 1 2 0 1 2 3 3 9 -1 auto 21.4 MiB 0.01 0 3 0 0 3 60.1 MiB 0.01 0.00 nan 0 0 nan 0.00 3.6083e-05 2.8637e-05 0.000127329 9.3377e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.01 0.0017273 0.00163154 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_true.blif common 0.50 vpr 60.15 MiB -1 -1 -1 -1 0 0.02 -1 -1 30080 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61592 6 1 1 8 0 1 8 3 3 9 -1 auto 21.5 MiB 0.00 0 21 0 11 10 60.1 MiB 0.02 0.00 nan 0 0 nan 0.00 5.004e-05 3.7372e-05 0.000166294 0.000125745 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.01 0.00163661 0.00154889 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml always_false.blif common 0.49 vpr 60.31 MiB -1 -1 -1 -1 0 0.02 -1 -1 30084 -1 -1 1 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61760 6 1 1 8 0 1 8 3 3 9 -1 auto 21.6 MiB 0.00 0 21 0 11 10 60.3 MiB 0.01 0.00 nan 0 0 nan 0.00 1.6169e-05 1.0582e-05 9.2682e-05 6.5639e-05 -1 -1 -1 -1 -1 0 1 3900 3900 7855.82 872.868 0.01 0.00147233 0.0013956 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and.blif common 0.58 vpr 60.43 MiB -1 -1 -1 -1 1 0.03 -1 -1 30112 -1 -1 1 2 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61884 2 1 3 4 0 3 4 3 3 9 -1 auto 21.7 MiB 0.00 9 9 5 0 4 60.4 MiB 0.01 0.00 0.443777 -0.443777 -0.443777 nan 0.00 5.398e-05 3.9502e-05 0.000289519 0.000214291 -1 -1 -1 -1 -1 6 9 3900 3900 7855.82 872.868 0.03 0.00192535 0.00172273 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut.blif common 0.55 vpr 60.17 MiB -1 -1 -1 -1 2 0.06 -1 -1 31600 -1 -1 1 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61612 5 1 7 8 0 7 7 3 3 9 -1 auto 21.4 MiB 0.00 20 18 12 0 6 60.2 MiB 0.00 0.00 0.70303 -0.70303 -0.70303 nan 0.00 2.2816e-05 1.7643e-05 0.000143814 0.000116096 -1 -1 -1 -1 -1 8 6 3900 3900 7855.82 872.868 0.00 0.00174662 0.00161678 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml multiconnected_lut2.blif common 0.54 vpr 60.26 MiB -1 -1 -1 -1 2 0.06 -1 -1 31636 -1 -1 1 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61704 5 1 7 8 0 7 7 3 3 9 -1 auto 21.6 MiB 0.00 20 18 13 0 5 60.3 MiB 0.00 0.00 0.70303 -0.70303 -0.70303 nan 0.00 2.084e-05 1.5868e-05 0.000134512 0.00010872 -1 -1 -1 -1 -1 11 12 3900 3900 7855.82 872.868 0.00 0.00195725 0.00178645 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml and_latch.blif common 0.38 vpr 60.29 MiB -1 -1 -1 -1 1 0.03 -1 -1 30040 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61736 3 1 5 6 1 4 5 3 3 9 -1 auto 21.6 MiB 0.00 9 12 9 0 3 60.3 MiB 0.00 0.00 0.274843 -0.536407 -0.274843 0.274843 0.00 2.0381e-05 1.5173e-05 0.000137972 0.000108819 -1 -1 -1 -1 -1 5 8 3900 3900 7855.82 872.868 0.01 0.00181726 0.00166296 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml false_path_mux.blif common 0.50 vpr 60.15 MiB -1 -1 -1 -1 1 0.05 -1 -1 31856 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61592 4 1 4 6 0 4 6 3 3 9 -1 auto 21.5 MiB 0.00 12 15 11 0 4 60.1 MiB 0.00 0.00 0.443777 -0.443777 -0.443777 nan 0.00 1.7856e-05 1.3398e-05 0.000108277 8.4344e-05 -1 -1 -1 -1 -1 7 16 3900 3900 7855.82 872.868 0.01 0.0019029 0.00171691 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_2x2.blif common 0.50 vpr 60.13 MiB -1 -1 -1 -1 1 0.05 -1 -1 31628 -1 -1 1 4 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61576 4 4 8 12 0 8 9 3 3 9 -1 auto 21.4 MiB 0.01 25 27 23 0 4 60.1 MiB 0.00 0.00 0.443777 -1.77511 -0.443777 nan 0.00 3.0119e-05 2.4685e-05 0.000212004 0.000181584 -1 -1 -1 -1 -1 27 13 3900 3900 7855.82 872.868 0.01 0.0021155 0.0018911 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x3.blif common 0.60 vpr 60.32 MiB -1 -1 -1 -1 3 0.06 -1 -1 32464 -1 -1 3 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61768 6 6 28 34 0 28 15 5 5 25 clb auto 21.9 MiB 0.01 103 51 13 38 0 60.3 MiB 0.00 0.00 1.2267 -5.62618 -1.2267 nan 0.00 8.5564e-05 7.5629e-05 0.000593143 0.000543033 -1 -1 -1 -1 -1 193 16 23400 11700 33739.5 1349.58 0.02 0.00517237 0.00460917 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_3x4.blif common 0.57 vpr 60.45 MiB -1 -1 -1 -1 4 0.07 -1 -1 32140 -1 -1 5 7 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61904 7 8 39 47 0 39 20 5 5 25 clb auto 21.9 MiB 0.01 172 74 13 56 5 60.5 MiB 0.00 0.00 1.56314 -7.84574 -1.56314 nan 0.00 0.000117668 0.0001038 0.000782581 0.000724192 -1 -1 -1 -1 -1 327 16 23400 19500 33739.5 1349.58 0.02 0.00618715 0.00546308 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_4x4.blif common 0.64 vpr 60.37 MiB -1 -1 -1 -1 8 0.08 -1 -1 32128 -1 -1 7 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61820 8 8 51 59 0 51 23 6 6 36 clb auto 21.8 MiB 0.02 214 503 64 428 11 60.4 MiB 0.01 0.00 2.63385 -12.7463 -2.63385 nan 0.00 0.000148329 0.000135235 0.00292836 0.0026818 -1 -1 -1 -1 -1 520 19 165600 27300 61410.5 1705.85 0.04 0.0103845 0.00916876 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x5.blif common 0.80 vpr 60.91 MiB -1 -1 -1 -1 7 0.10 -1 -1 32644 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62376 10 10 95 105 0 95 31 6 6 36 clb auto 21.6 MiB 0.02 451 655 100 526 29 60.9 MiB 0.01 0.00 2.57174 -18.2179 -2.57174 nan 0.00 0.000247651 0.000224086 0.0044842 0.00411671 -1 -1 -1 -1 -1 1075 30 165600 42900 61410.5 1705.85 0.11 0.0228064 0.0198831 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml mult_5x6.blif common 0.88 vpr 60.67 MiB -1 -1 -1 -1 8 0.11 -1 -1 32800 -1 -1 11 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 62124 11 11 94 105 0 94 33 6 6 36 clb auto 21.4 MiB 0.02 445 709 84 587 38 60.7 MiB 0.01 0.00 2.8791 -21.3962 -2.8791 nan 0.00 0.000236171 0.000215994 0.00436128 0.00400831 -1 -1 -1 -1 -1 1004 29 165600 42900 61410.5 1705.85 0.12 0.0229619 0.0201826 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_1bit.blif common 0.57 vpr 60.10 MiB -1 -1 -1 -1 1 0.06 -1 -1 31048 -1 -1 1 3 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61544 3 2 5 7 0 5 6 3 3 9 -1 auto 21.3 MiB 0.00 15 15 11 0 4 60.1 MiB 0.00 0.00 0.443777 -0.887553 -0.443777 nan 0.00 2.2394e-05 1.7356e-05 0.000138272 0.000110194 -1 -1 -1 -1 -1 12 16 3900 3900 7855.82 872.868 0.01 0.00204794 0.00183814 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_2bit.blif common 0.59 vpr 60.23 MiB -1 -1 -1 -1 2 0.06 -1 -1 32036 -1 -1 1 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61680 5 3 9 12 0 9 9 3 3 9 -1 auto 21.4 MiB 0.00 26 27 24 0 3 60.2 MiB 0.00 0.00 0.70303 -1.84984 -0.70303 nan 0.00 2.8297e-05 2.2857e-05 0.000196846 0.000166486 -1 -1 -1 -1 -1 19 17 3900 3900 7855.82 872.868 0.01 0.0024366 0.00217707 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_3bit.blif common 0.60 vpr 60.23 MiB -1 -1 -1 -1 3 0.07 -1 -1 31928 -1 -1 1 7 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61680 7 4 13 17 0 13 12 3 3 9 -1 auto 21.4 MiB 0.01 37 38 34 0 4 60.2 MiB 0.01 0.00 0.962283 -3.07137 -0.962283 nan 0.00 3.752e-05 3.1451e-05 0.000277912 0.000245482 -1 -1 -1 -1 -1 42 18 3900 3900 7855.82 872.868 0.01 0.00310669 0.00275063 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_4bit.blif common 0.61 vpr 60.27 MiB -1 -1 -1 -1 4 0.06 -1 -1 31932 -1 -1 1 9 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61712 9 5 17 22 0 17 15 3 3 9 -1 auto 21.6 MiB 0.01 48 51 43 0 8 60.3 MiB 0.00 0.00 1.22154 -4.55216 -1.22154 nan 0.00 3.2524e-05 2.7271e-05 0.000285083 0.000254871 -1 -1 -1 -1 -1 65 19 3900 3900 7855.82 872.868 0.01 0.00477156 0.00432496 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k4_N8_topology-0.85sL2-0.15gL4-on-cb-off-sb_22nm_22nm_nonLR.xml rca_5bit.blif common 0.61 vpr 60.07 MiB -1 -1 -1 -1 4 0.06 -1 -1 32012 -1 -1 2 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 61516 11 6 24 30 0 24 19 4 4 16 clb auto 21.7 MiB 0.01 83 69 18 40 11 60.1 MiB 0.00 0.00 1.35387 -6.69849 -1.35387 nan 0.00 6.3642e-05 5.2484e-05 0.000532237 0.000477721 -1 -1 -1 -1 -1 125 12 7800 7800 17482.0 1092.63 0.01 0.00395115 0.00350668 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt index 97d4936b71c..6a4e552e822 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_power/config/golden_results.txt @@ -1,3 +1,3 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc -k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 4.58 vpr 64.71 MiB 0.07 9300 -1 -1 3 0.26 -1 -1 34484 -1 52824 65 99 1 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 66264 99 130 363 493 1 251 295 12 12 144 clb auto 25.4 MiB 0.11 909 69946 28257 33534 8155 64.7 MiB 0.25 0.00 2.12504 -215.887 -2.12504 2.12504 0.26 0.00128833 0.00122051 0.0963439 0.0912538 -1 -1 -1 -1 46 1697 19 5.66058e+06 4.05111e+06 378970. 2631.74 1.64 0.526586 0.482138 13238 73581 -1 1542 10 552 711 43732 13783 2.26353 2.26353 -226.249 -2.26353 0 0 486261. 3376.82 0.09 0.05 0.07 -1 -1 0.09 0.0314505 0.0291634 0.009964 0.2127 0.07165 0.7157 -k6_frac_N10_mem32K_40nm.xml diffeq1.v common 11.98 vpr 68.15 MiB 0.06 9324 -1 -1 15 0.35 -1 -1 34500 -1 54668 36 162 0 5 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 69788 162 96 999 932 1 690 299 16 16 256 mult_36 auto 28.8 MiB 0.34 5749 83216 24669 51521 7026 68.2 MiB 0.64 0.01 21.0703 -1905.66 -21.0703 21.0703 0.51 0.00347553 0.00328327 0.306112 0.288446 -1 -1 -1 -1 46 12588 23 1.21132e+07 3.92018e+06 727248. 2840.81 6.10 1.15443 1.06726 24972 144857 -1 10123 18 3121 6008 939171 237744 22.8099 22.8099 -2079.35 -22.8099 0 0 934704. 3651.19 0.20 0.32 0.12 -1 -1 0.20 0.142001 0.132207 0.007787 0.3477 0.01624 0.6361 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 5.32 vpr 65.56 MiB 0.06 9324 -1 -1 3 0.35 -1 -1 34640 -1 52944 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67136 99 130 363 493 1 251 298 12 12 144 clb auto 26.3 MiB 0.14 892 61988 19791 31117 11080 65.6 MiB 0.20 0.00 2.45187 -222.514 -2.45187 2.45187 0.36 0.000915265 0.000857739 0.0611213 0.0573235 -1 -1 -1 -1 42 1632 14 5.66058e+06 4.21279e+06 345702. 2400.71 1.98 0.420146 0.379604 12810 66778 -1 1532 10 491 638 43042 14380 2.64362 2.64362 -241.091 -2.64362 0 0 434679. 3018.61 0.14 0.06 0.07 -1 -1 0.14 0.0352631 0.033178 0.008708 0.223 0.06667 0.7103 + k6_frac_N10_mem32K_40nm.xml diffeq1.v common 13.86 vpr 69.06 MiB 0.04 9360 -1 -1 15 0.45 -1 -1 34776 -1 54676 38 162 0 5 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70720 162 96 999 932 1 689 301 16 16 256 mult_36 auto 29.7 MiB 0.41 5715 87997 27324 53359 7314 69.1 MiB 0.74 0.01 21.0193 -1891.98 -21.0193 21.0193 0.81 0.00444774 0.00422894 0.323103 0.304448 -1 -1 -1 -1 46 12696 36 1.21132e+07 4.02797e+06 727248. 2840.81 6.60 1.22942 1.13708 24972 144857 -1 9788 21 3242 6502 928862 268718 22.8323 22.8323 -2032.58 -22.8323 0 0 934704. 3651.19 0.32 0.43 0.16 -1 -1 0.32 0.182261 0.17068 0.007695 0.3421 0.01642 0.6414 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_only/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_only/config/golden_results.txt index cb27a0882af..84ecf217097 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_only/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_only/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml stereovision3.v common 2.24 vpr 60.88 MiB 0.17 9932 -1 -1 4 0.13 -1 -1 33168 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62344 11 30 262 292 2 104 60 7 7 49 clb auto 22.2 MiB 0.34 398 60.9 MiB 0.18 0.00 2.2193 -164.973 -2.2193 2.11301 0.00 0.000276596 0.000223181 0.0151039 0.0128046 450 1044 2368 112213 20819 1.07788e+06 1.02399e+06 207176. 4228.08 27 2.35756 2.2409 -178.918 -2.35756 0 0 60.9 MiB 0.26 0.0540063 0.0474786 60.9 MiB 0.04 - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.24 vpr 62.58 MiB 0.09 9992 -1 -1 5 0.15 -1 -1 33252 -1 -1 14 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64084 11 30 313 321 2 118 55 7 7 49 clb auto 24.6 MiB 0.45 405 62.6 MiB 0.12 0.00 2.27922 -160.669 -2.27922 2.09152 0.00 0.000399488 0.00031742 0.0297157 0.026198 547 246 449 12463 3797 1.07788e+06 754516 219490. 4479.39 8 2.45141 2.26844 -175.456 -2.45141 0 0 62.6 MiB 0.11 0.0569255 0.0515604 62.6 MiB 0.04 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml stereovision3.v common 1.42 vpr 64.63 MiB 0.08 10092 -1 -1 4 0.21 -1 -1 33404 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66180 11 30 262 292 2 99 60 7 7 49 clb auto 24.9 MiB 0.09 421 2049 269 1715 65 64.6 MiB 0.04 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 0.000642825 0.000574377 0.0150724 0.0136437 -1 -1 -1 -1 424 4.46316 163 1.71579 617 1399 45810 10033 1.07788e+06 1.02399e+06 207176. 4228.08 16 4440 29880 -1 2.36464 2.27781 -179.43 -2.36464 0 0 0.03 -1 -1 64.6 MiB 0.06 0.0447701 0.039887 64.6 MiB -1 0.04 + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.66 vpr 67.05 MiB 0.06 10172 -1 -1 5 0.18 -1 -1 33356 -1 -1 14 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68656 11 30 313 321 2 115 55 7 7 49 clb auto 27.3 MiB 0.32 466 2759 556 2108 95 67.0 MiB 0.06 0.00 2.67362 -172.647 -2.67362 2.30794 0.00 0.000887719 0.000807056 0.0300856 0.0276351 -1 -1 -1 -1 574 5.26606 231 2.11927 216 452 11450 3638 1.07788e+06 754516 219490. 4479.39 7 5100 32136 -1 2.71877 2.35385 -178.475 -2.71877 0 0 0.04 -1 -1 67.0 MiB 0.03 0.057894 0.0532276 67.0 MiB -1 0.04 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_reconverge/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_reconverge/config/golden_results.txt index 3428ac1bb4a..e9f8c264924 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_reconverge/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_route_reconverge/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 35.86 vpr 82.16 MiB 0.79 29876 -1 -1 4 2.32 -1 -1 38468 -1 -1 165 193 5 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 84136 193 205 2863 2789 1 1383 568 20 20 400 memory auto 45.1 MiB 2.15 10773 82.2 MiB 2.39 0.03 4.49793 -2431.98 -4.49793 4.49793 1.62 0.0136275 0.0125532 0.954405 0.863641 78 21607 22 2.07112e+07 1.16325e+07 2.06176e+06 5154.39 18.84 4.22067 3.79486 19127 17 5185 14790 1471838 344228 4.98283 4.98283 -2814.6 -4.98283 -15.8222 -0.360359 2.60035e+06 6500.87 1.21 1.09 0.567815 0.523619 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 38.30 vpr 86.88 MiB 0.47 29360 -1 -1 4 2.33 -1 -1 37992 -1 -1 169 193 5 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 88968 193 205 2863 2789 1 1374 572 20 20 400 memory auto 43.4 MiB 1.96 11201 252110 92751 131930 27429 84.4 MiB 2.44 0.03 4.45067 -2677.23 -4.45067 4.45067 1.78 0.00740583 0.00674714 0.935753 0.830726 -1 -1 -1 -1 80 22067 51 2.07112e+07 1.18481e+07 2.10510e+06 5262.74 22.74 5.25463 4.68017 53274 447440 -1 19298 17 5571 15462 1144445 252495 4.66289 4.66289 -2899.83 -4.66289 -11.7102 -0.360359 2.64606e+06 6615.15 0.68 0.62 0.38 -1 -1 0.68 0.376497 0.344469 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_init_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_init_timing/config/golden_results.txt index 8a71c8b8093..82ee8b5f85d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_init_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_init_timing/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_all_critical 2.71 vpr 66.38 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 67972 8 63 748 811 0 474 151 13 13 169 clb auto 28.5 MiB 0.60 4777 66.4 MiB 0.41 0.01 3.87527 -172.209 -3.87527 nan 0.06 0.0017425 0.00147877 0.122032 0.107708 6819 4027 15012 710111 104954 6.63067e+06 4.31152e+06 714925. 4230.32 22 4.25667 nan -190.549 -4.25667 0 0 66.4 MiB 0.54 0.284059 0.255325 66.4 MiB 0.23 - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_lookahead 2.47 vpr 66.13 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 67720 8 63 748 811 0 474 151 13 13 169 clb auto 28.2 MiB 0.54 4777 66.1 MiB 0.51 0.01 3.87527 -172.209 -3.87527 nan 0.02 0.00250899 0.00216605 0.12476 0.109908 6692 4105 15099 691406 103895 6.63067e+06 4.31152e+06 714925. 4230.32 24 4.29629 nan -191.279 -4.29629 0 0 66.1 MiB 0.52 0.296288 0.265369 66.1 MiB 0.19 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_all_critical 2.28 vpr 69.06 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70720 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.53 4989 14482 2605 10909 968 69.1 MiB 0.29 0.01 4.15324 -188.164 -4.15324 nan 0.00 0.00281296 0.00243514 0.139942 0.124398 -1 -1 -1 -1 6805 14.9560 1830 4.02198 3625 14263 570126 87469 9.20055e+06 4.79657e+06 867065. 4423.80 19 18088 133656 -1 4.17843 nan -185.467 -4.17843 0 0 0.16 -1 -1 69.1 MiB 0.45 0.325496 0.291568 69.1 MiB -1 0.29 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_initial_timing_lookahead 2.22 vpr 69.11 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70764 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.51 4989 14482 2605 10909 968 69.1 MiB 0.29 0.01 4.15324 -188.164 -4.15324 nan 0.00 0.00262456 0.00232451 0.12615 0.110723 -1 -1 -1 -1 6877 15.1143 1848 4.06154 3712 14523 564432 88116 9.20055e+06 4.79657e+06 867065. 4423.80 19 18088 133656 -1 4.14924 nan -185.7 -4.14924 0 0 0.15 -1 -1 69.1 MiB 0.40 0.298349 0.266584 69.1 MiB -1 0.30 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_lookahead/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_lookahead/config/golden_results.txt index a344f7d6fb5..9e26968d0ac 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_lookahead/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_lookahead/config/golden_results.txt @@ -1,5 +1,5 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_classic 1.41 vpr 67.52 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69136 8 63 748 811 0 474 151 13 13 169 clb auto 28.3 MiB 0.31 4925 14186 2812 10318 1056 67.5 MiB 0.21 0.01 3.93703 -166.673 -3.93703 nan 0.02 0.002265 0.00201026 0.0957948 0.0863492 6903 14.5633 1898 4.00422 3929 14413 1232679 208639 6.63067e+06 4.31152e+06 577501. 3417.16 23 13292 85338 -1 4.36892 nan -190.868 -4.36892 0 0 0.09 -1 -1 67.5 MiB 0.33 0.22016 0.196204 -1 -1 -1 -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_map 1.51 vpr 67.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69228 8 63 748 811 0 474 151 13 13 169 clb auto 28.4 MiB 0.31 4860 15790 3063 11462 1265 67.6 MiB 0.24 0.01 4.29693 -193.727 -4.29693 nan 0.00 0.00229611 0.00204527 0.104137 0.0937984 6879 14.5127 1879 3.96413 4087 15882 659925 103848 6.63067e+06 4.31152e+06 577501. 3417.16 24 13292 85338 -1 4.41049 nan -200.759 -4.41049 0 0 0.09 -1 -1 67.6 MiB 0.31 0.240893 0.214452 67.6 MiB -1 0.12 -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map 2.35 vpr 67.60 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69224 8 63 748 811 0 474 151 13 13 169 clb auto 28.4 MiB 0.28 4839 12582 2336 9502 744 67.6 MiB 0.19 0.01 3.61483 -159.25 -3.61483 nan 0.03 0.00226371 0.00200769 0.0849314 0.0767223 7006 14.7806 1933 4.07806 4489 16137 1303855 215072 6.63067e+06 4.31152e+06 577501. 3417.16 27 13292 85338 -1 4.34694 nan -183.291 -4.34694 0 0 0.09 -1 -1 67.6 MiB 0.39 0.227297 0.201685 -1 -1 -1 -k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map_--reorder_rr_graph_nodes_algorithm_random_shuffle 2.46 vpr 67.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-11389-g625a61047 release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-23T17:49:05 betzgrp-wintermute.eecg.utoronto.ca /home/gholam39/vtr/vtr-verilog-to-routing/vtr_flow 69052 8 63 748 811 0 474 151 13 13 169 clb auto 28.2 MiB 0.31 4839 12582 2336 9502 744 67.4 MiB 0.19 0.01 3.61483 -159.25 -3.61483 nan 0.03 0.0022842 0.00202119 0.0859867 0.0776221 7006 14.7806 1933 4.07806 4489 16137 1303855 215072 6.63067e+06 4.31152e+06 577501. 3417.16 27 13292 85338 -1 4.34694 nan -183.291 -4.34694 0 0 0.09 -1 -1 67.4 MiB 0.38 0.231554 0.205592 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_classic 2.11 vpr 69.09 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70752 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.50 4981 18388 4106 12671 1611 69.1 MiB 0.33 0.01 3.67827 -162.703 -3.67827 nan 0.04 0.00316093 0.00267964 0.156067 0.137885 -1 -1 -1 -1 6929 15.2286 1856 4.07912 4031 16057 1191599 209386 9.20055e+06 4.79657e+06 701736. 3580.29 21 16332 105598 -1 4.26894 nan -186.127 -4.26894 0 0 0.12 -1 -1 69.1 MiB 0.45 0.320906 0.286349 -1 -1 -1 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_map 2.11 vpr 69.04 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70696 8 63 748 811 0 455 160 14 14 196 clb auto 29.4 MiB 0.50 4947 14048 2843 10376 829 69.0 MiB 0.27 0.01 4.36787 -194.851 -4.36787 nan 0.00 0.00329553 0.00282923 0.129786 0.114331 -1 -1 -1 -1 7013 15.4132 1882 4.13626 4368 18266 702728 114564 9.20055e+06 4.79657e+06 701736. 3580.29 22 16332 105598 -1 4.35011 nan -200.403 -4.35011 0 0 0.12 -1 -1 69.0 MiB 0.41 0.312316 0.278054 69.0 MiB -1 0.23 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map 3.39 vpr 69.09 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70752 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.50 4953 17954 4036 12536 1382 69.1 MiB 0.35 0.01 3.75278 -163.938 -3.75278 nan 0.07 0.0033402 0.00290592 0.147752 0.129486 -1 -1 -1 -1 7096 15.5956 1936 4.25495 3839 15635 1250449 222869 9.20055e+06 4.79657e+06 701736. 3580.29 22 16332 105598 -1 4.31984 nan -190.626 -4.31984 0 0 0.14 -1 -1 69.1 MiB 0.53 0.335395 0.295263 -1 -1 -1 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_lookahead_extended_map_--reorder_rr_graph_nodes_algorithm_random_shuffle 3.38 vpr 69.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70780 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.50 4953 17954 4036 12536 1382 69.1 MiB 0.33 0.01 3.75278 -163.938 -3.75278 nan 0.07 0.00358739 0.00315042 0.148074 0.130756 -1 -1 -1 -1 7096 15.5956 1936 4.25495 3839 15635 1250449 222869 9.20055e+06 4.79657e+06 701736. 3580.29 22 16332 105598 -1 4.31984 nan -190.626 -4.31984 0 0 0.14 -1 -1 69.1 MiB 0.56 0.339968 0.302409 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_update_lb_delays/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_update_lb_delays/config/golden_results.txt index a6502552f61..42d0070c39d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_update_lb_delays/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_router_update_lb_delays/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_off 2.87 vpr 66.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 67852 8 63 748 811 0 474 151 13 13 169 clb auto 28.4 MiB 0.51 4780 66.3 MiB 0.41 0.01 3.97907 -175.625 -3.97907 nan 0.04 0.00207465 0.00177233 0.13151 0.116397 6590 4348 15331 681750 105919 6.63067e+06 4.31152e+06 648366. 3836.48 32 4.32984 nan -195.219 -4.32984 0 0 66.3 MiB 0.82 0.336416 0.299116 66.3 MiB 0.19 - k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_on 2.88 vpr 66.01 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 80 8 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 67592 8 63 748 811 0 474 151 13 13 169 clb auto 28.1 MiB 0.53 4780 66.0 MiB 0.40 0.01 3.97907 -175.625 -3.97907 nan 0.03 0.0024203 0.0021384 0.132712 0.117663 6579 4366 15469 686319 106529 6.63067e+06 4.31152e+06 648366. 3836.48 32 4.32984 nan -195.219 -4.32984 0 0 66.0 MiB 0.78 0.339262 0.303521 66.0 MiB 0.20 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_off 1.98 vpr 69.08 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70736 8 63 748 811 0 455 160 14 14 196 clb auto 29.5 MiB 0.45 5081 14916 3009 10977 930 69.1 MiB 0.27 0.01 4.4281 -198.501 -4.4281 nan 0.00 0.00300537 0.00251178 0.118094 0.103153 -1 -1 -1 -1 6741 14.8154 1803 3.96264 3315 13570 497205 81432 9.20055e+06 4.79657e+06 787177. 4016.21 19 17112 118924 -1 4.40099 nan -202.066 -4.40099 0 0 0.13 -1 -1 69.1 MiB 0.34 0.282273 0.252167 69.1 MiB -1 0.26 + k6_N10_mem32K_40nm.xml ex5p.blif common_--router_update_lower_bound_delays_on 2.02 vpr 69.16 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 89 8 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 70816 8 63 748 811 0 455 160 14 14 196 clb auto 29.6 MiB 0.53 5081 14916 3009 10977 930 69.2 MiB 0.26 0.01 4.4281 -198.501 -4.4281 nan 0.00 0.00303209 0.00274882 0.116032 0.102412 -1 -1 -1 -1 6767 14.8725 1813 3.98462 3295 13377 489418 80231 9.20055e+06 4.79657e+06 787177. 4016.21 18 17112 118924 -1 4.40099 nan -201.997 -4.40099 0 0 0.13 -1 -1 69.2 MiB 0.33 0.270765 0.24325 69.2 MiB -1 0.28 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_differing_modes/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_differing_modes/config/golden_results.txt index c069d48ad7c..8e0c47bf03f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_differing_modes/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_differing_modes/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -slicem.xml carry_chain.blif common 1.22 vpr 55.89 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-11333-g6a44da44e-dirty release VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-09-18T21:53:04 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 57236 1 -1 48 34 1 35 6 5 5 25 BLK_IG-SLICEM auto 17.4 MiB 0.18 70 85 17 60 8 55.9 MiB 0.01 0.00 0.645672 -5.8162 -0.645672 0.645672 0.00 0.000202979 0.000185835 0.00398122 0.00365881 25 269 16 133321 74067 -1 -1 0.60 0.109406 0.0935311 1252 5405 -1 304 21 172 172 62949 28904 1.84417 1.84417 -18.3175 -1.84417 0 0 -1 -1 0.00 0.03 0.01 -1 -1 0.00 0.00917624 0.00807438 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + slicem.xml carry_chain.blif common 0.90 vpr 57.32 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 1 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58700 1 -1 48 34 1 35 6 5 5 25 BLK_IG-SLICEM auto 18.2 MiB 0.24 70 15 2 12 1 57.3 MiB 0.00 0.00 0.645672 -5.8162 -0.645672 0.645672 0.00 0.000120184 0.000109173 0.000865636 0.00080802 -1 -1 -1 -1 25 294 14 133321 74067 -1 -1 0.23 0.0266638 0.0220764 1252 5405 -1 287 14 116 116 21465 12891 1.98076 1.98076 -20.8107 -1.98076 0 0 -1 -1 0.01 0.02 0.00 -1 -1 0.01 0.0055322 0.00492928 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_modes/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_modes/config/golden_results.txt index cb32ea69592..d6a3abf2024 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_modes/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_routing_modes/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - arch.xml ndff.blif common 0.82 vpr 53.25 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 54528 4 4 10 14 1 10 11 4 4 16 ff_tile io_tile auto 14.8 MiB 0.02 24 53.2 MiB 0.02 0.00 0.248622 -2.00015 -0.248622 0.248622 0.00 3.5834e-05 2.6534e-05 0.000189619 0.000148108 4 27 5 59253.6 44440.2 -1 -1 0.17 0.00267156 0.00196857 25 3 13 18 944 358 0.319802 0.319802 -2.61174 -0.319802 0 0 -1 -1 0.00 0.01 0.000340034 0.000288371 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + arch.xml ndff.blif common 0.46 vpr 56.42 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57772 4 4 10 14 1 10 11 4 4 16 ff_tile io_tile auto 17.6 MiB 0.01 31 35 6 27 2 56.4 MiB 0.01 0.00 0.212927 -2.22016 -0.212927 0.212927 0.00 5.0007e-05 3.8931e-05 0.000238974 0.000194906 -1 -1 -1 -1 4 28 4 59253.6 44440.2 -1 -1 0.06 0.0047932 0.00391937 184 632 -1 29 2 13 18 795 367 0.309802 0.309802 -2.85512 -0.309802 0 0 -1 -1 0.00 0.00 0.00 -1 -1 0.00 0.00161011 0.00154347 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_scale_delay_budgets/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_scale_delay_budgets/config/golden_results.txt index 1fae7fc76a7..282c80c20d3 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_scale_delay_budgets/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_scale_delay_budgets/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.41 vpr 62.43 MiB 0.16 10056 -1 -1 5 0.16 -1 -1 33224 -1 -1 13 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63928 11 30 313 321 2 119 54 7 7 49 clb auto 24.4 MiB 0.46 416 62.4 MiB 0.08 0.00 4.27922 0 0 4.05316 0.00 0.000359709 0.000287924 0.016846 0.0147985 633 177 307 9455 2634 1.07788e+06 700622 219490. 4479.39 5 4.59927 4.27983 0 0 -164.579 -1.707 62.4 MiB 0.05 0.0372113 0.03418 62.4 MiB 0.05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 1.68 vpr 67.04 MiB 0.07 10084 -1 -1 5 0.18 -1 -1 33256 -1 -1 14 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68648 11 30 313 321 2 114 55 7 7 49 clb auto 27.3 MiB 0.34 439 1511 357 1028 126 67.0 MiB 0.04 0.00 4.62621 0 0 4.30823 0.00 0.000680839 0.000625665 0.0199326 0.0187542 -1 -1 -1 -1 639 5.91667 232 2.14815 338 674 15463 4560 1.07788e+06 754516 219490. 4479.39 10 5100 32136 -1 4.76665 4.41703 0 0 -164.948 -1.707 0.04 -1 -1 67.0 MiB 0.05 0.0545015 0.0506933 67.0 MiB -1 0.04 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sdc/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sdc/config/golden_results.txt index 1ae1f7fe791..93ad79df1cb 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sdc/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sdc/config/golden_results.txt @@ -1,7 +1,7 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/A.sdc 0.25 vpr 63.04 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64552 5 3 11 14 2 9 10 4 4 16 clb auto 24.7 MiB 0.00 22 30 9 14 7 63.0 MiB 0.00 0.00 0.814339 -2.77068 -0.814339 0.571 0.01 3.3273e-05 2.5789e-05 0.000195305 0.000156493 -1 -1 -1 -1 8 18 2 107788 107788 4794.78 299.674 0.01 0.00191594 0.00178193 564 862 -1 18 4 10 10 199 87 0.757297 0.571 -2.63894 -0.757297 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.0017257 0.00162955 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/B.sdc 0.25 vpr 62.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64304 5 3 11 14 2 9 10 4 4 16 clb auto 24.5 MiB 0.00 23 30 5 16 9 62.8 MiB 0.00 0.00 0.571 0 0 0.571 0.01 2.9394e-05 2.3103e-05 0.000166559 0.000136184 -1 -1 -1 -1 8 27 3 107788 107788 4794.78 299.674 0.01 0.00191206 0.00174692 564 862 -1 25 5 14 14 430 265 0.571 0.571 0 0 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00178866 0.00169955 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/C.sdc 0.25 vpr 63.10 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64612 5 3 11 14 2 9 10 4 4 16 clb auto 24.7 MiB 0.00 20 30 10 18 2 63.1 MiB 0.00 0.00 0.645658 -2.18842 -0.645658 0.571 0.01 3.9483e-05 2.7812e-05 0.000241821 0.000190264 -1 -1 -1 -1 8 17 3 107788 107788 4794.78 299.674 0.01 0.00193712 0.00176247 564 862 -1 14 5 15 15 285 110 0.571526 0.571 -1.89284 -0.571526 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00179303 0.00167797 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/D.sdc 0.25 vpr 62.99 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64500 5 3 11 14 2 9 10 4 4 16 clb auto 24.7 MiB 0.00 20 30 11 18 1 63.0 MiB 0.00 0.00 1.64534 -5.31677 -1.64534 0.571 0.01 4.3501e-05 2.9475e-05 0.000247333 0.000183292 -1 -1 -1 -1 8 17 8 107788 107788 4794.78 299.674 0.01 0.00222242 0.00195057 564 862 -1 15 8 21 21 324 150 1.57153 0.571 -4.91875 -1.57153 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.0019705 0.00180493 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/E.sdc 0.25 vpr 63.02 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64536 5 3 11 14 2 9 10 4 4 16 clb auto 24.7 MiB 0.00 20 30 8 18 4 63.0 MiB 0.00 0.00 1.44871 -2.90839 -1.44871 0.571 0.01 4.0285e-05 2.9986e-05 0.000237512 0.000186077 -1 -1 -1 -1 8 33 10 107788 107788 4794.78 299.674 0.01 0.00230311 0.00203041 564 862 -1 19 2 11 11 275 141 1.39454 0.571 -2.72425 -1.39454 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00171065 0.00163028 - k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/F.sdc 0.24 vpr 62.87 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 64376 5 3 11 14 2 9 10 4 4 16 clb auto 24.7 MiB 0.00 21 100 23 56 21 62.9 MiB 0.00 0.00 0.145339 0 0 0.571 0.01 3.1088e-05 2.4636e-05 0.000450966 0.000361847 -1 -1 -1 -1 8 22 3 107788 107788 4794.78 299.674 0.01 0.00226169 0.0020643 564 862 -1 36 2 9 9 213 106 0.0724097 0.571 0 0 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00164492 0.00157611 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/A.sdc 0.46 vpr 63.03 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64540 5 3 11 14 2 9 10 4 4 16 clb auto 24.3 MiB 0.01 22 30 9 14 7 63.0 MiB 0.00 0.00 0.814339 -2.77068 -0.814339 0.571 0.01 4.6237e-05 3.9054e-05 0.0002174 0.000180615 -1 -1 -1 -1 8 18 2 107788 107788 4794.78 299.674 0.02 0.00197825 0.00183539 564 862 -1 18 4 10 10 199 87 0.757297 0.571 -2.63894 -0.757297 0 0 5401.54 337.596 0.00 0.01 0.00 -1 -1 0.00 0.00215654 0.00203426 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/B.sdc 0.51 vpr 62.91 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64424 5 3 11 14 2 9 10 4 4 16 clb auto 24.2 MiB 0.01 23 30 6 15 9 62.9 MiB 0.01 0.00 0.571 0 0 0.571 0.02 3.7988e-05 2.9784e-05 0.000252809 0.000212792 -1 -1 -1 -1 8 26 3 107788 107788 4794.78 299.674 0.03 0.00214308 0.00198029 564 862 -1 25 5 13 13 435 272 0.571 0.571 0 0 0 0 5401.54 337.596 0.00 0.01 0.00 -1 -1 0.00 0.00179325 0.00170005 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/C.sdc 0.53 vpr 63.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64568 5 3 11 14 2 9 10 4 4 16 clb auto 24.3 MiB 0.01 20 30 10 18 2 63.1 MiB 0.00 0.00 0.645658 -2.18842 -0.645658 0.571 0.01 4.2928e-05 3.0736e-05 0.000257589 0.000202685 -1 -1 -1 -1 8 17 3 107788 107788 4794.78 299.674 0.01 0.00208504 0.00188215 564 862 -1 14 5 15 15 285 110 0.571526 0.571 -1.89284 -0.571526 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00184632 0.00172634 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/D.sdc 0.57 vpr 62.89 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64396 5 3 11 14 2 9 10 4 4 16 clb auto 24.2 MiB 0.01 20 30 12 17 1 62.9 MiB 0.01 0.00 1.64534 -5.31677 -1.64534 0.571 0.01 5.3727e-05 3.88e-05 0.000288614 0.00022112 -1 -1 -1 -1 8 19 8 107788 107788 4794.78 299.674 0.05 0.00254374 0.00221143 564 862 -1 15 2 8 8 156 74 1.57153 0.571 -4.92067 -1.57153 0 0 5401.54 337.596 0.00 0.01 0.00 -1 -1 0.00 0.00180866 0.00171184 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/E.sdc 0.51 vpr 62.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64496 5 3 11 14 2 9 10 4 4 16 clb auto 24.2 MiB 0.01 20 30 8 18 4 63.0 MiB 0.00 0.00 1.44871 -2.90839 -1.44871 0.571 0.01 3.8739e-05 2.8831e-05 0.000233335 0.000188434 -1 -1 -1 -1 8 33 10 107788 107788 4794.78 299.674 0.02 0.0025966 0.00229332 564 862 -1 19 2 11 11 275 141 1.39454 0.571 -2.72425 -1.39454 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00164291 0.00155522 + k6_N10_mem32K_40nm.xml multiclock.blif common_-sdc_file_sdc/samples/F.sdc 0.51 vpr 62.82 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64328 5 3 11 14 2 9 10 4 4 16 clb auto 24.0 MiB 0.01 20 110 34 46 30 62.8 MiB 0.00 0.00 0.145339 0 0 0.571 0.01 3.5398e-05 2.9142e-05 0.000512135 0.000417096 -1 -1 -1 -1 8 25 4 107788 107788 4794.78 299.674 0.02 0.00232795 0.00209925 564 862 -1 36 5 15 15 690 511 0.0724097 0.571 0 0 0 0 5401.54 337.596 0.00 0.00 0.00 -1 -1 0.00 0.00186912 0.00175661 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_soft_multipliers/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_soft_multipliers/config/golden_results.txt index bc9ec03821b..c791c5fd70f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_soft_multipliers/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_soft_multipliers/config/golden_results.txt @@ -1,7 +1,7 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_4x4.v common 1.41 vpr 64.17 MiB 0.01 5888 -1 -1 1 0.02 -1 -1 35996 -1 -1 3 9 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 65708 9 8 75 70 1 36 20 5 5 25 clb auto 25.6 MiB 0.63 96 317 77 236 4 64.2 MiB 0.01 0.00 2.64007 -27.5319 -2.64007 2.64007 0.03 0.000117229 0.000102411 0.00252036 0.00231706 -1 -1 -1 -1 34 208 20 151211 75605.7 45067.1 1802.68 0.21 0.0483912 0.0409783 2028 7167 -1 146 13 129 164 5008 2755 2.69675 2.69675 -32.4037 -2.69675 0 0 54748.7 2189.95 0.01 0.01 0.01 -1 -1 0.01 0.00628304 0.00582 13 18 19 7 0 0 - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_5x5.v common 3.43 vpr 64.39 MiB 0.01 5888 -1 -1 1 0.01 -1 -1 35804 -1 -1 2 11 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 65932 11 10 108 97 1 47 23 4 4 16 clb auto 26.0 MiB 2.77 126 279 82 170 27 64.4 MiB 0.01 0.00 3.45122 -41.8536 -3.45122 3.45122 0.01 0.000141635 0.000124693 0.00271733 0.00252984 -1 -1 -1 -1 30 209 26 50403.8 50403.8 19887.8 1242.99 0.12 0.0412667 0.0354872 992 2748 -1 174 20 189 249 6058 3739 4.13904 4.13904 -51.6262 -4.13904 0 0 24232.7 1514.54 0.00 0.01 0.00 -1 -1 0.00 0.0093508 0.00857168 15 27 29 8 0 0 - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_6x6.v common 6.12 vpr 64.70 MiB 0.01 6016 -1 -1 1 0.02 -1 -1 33796 -1 -1 6 13 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66252 13 12 149 129 1 70 31 5 5 25 clb auto 26.0 MiB 5.14 204 367 106 257 4 64.7 MiB 0.01 0.00 3.51316 -52.8806 -3.51316 3.51316 0.03 0.000231923 0.000207708 0.00359144 0.00336509 -1 -1 -1 -1 50 313 26 151211 151211 61632.8 2465.31 0.33 0.0920019 0.0790762 2268 9834 -1 266 21 387 544 15360 7352 3.72931 3.72931 -55.4836 -3.72931 0 0 77226.2 3089.05 0.01 0.02 0.01 -1 -1 0.01 0.0138134 0.0121839 24 38 42 9 0 0 - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_7x7.v common 3.51 vpr 64.76 MiB 0.01 6144 -1 -1 1 0.02 -1 -1 33988 -1 -1 6 15 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66316 15 14 196 165 1 95 35 5 5 25 clb auto 26.2 MiB 2.52 312 890 161 714 15 64.8 MiB 0.02 0.00 3.70184 -64.7866 -3.70184 3.70184 0.03 0.000248815 0.000219771 0.00652185 0.00601657 -1 -1 -1 -1 46 526 19 151211 151211 57775.2 2311.01 0.30 0.0881015 0.0767655 2220 9391 -1 468 29 602 889 29687 14619 5.0047 5.0047 -86.5643 -5.0047 0 0 73020.3 2920.81 0.01 0.03 0.01 -1 -1 0.01 0.0191079 0.0173568 37 51 57 11 0 0 - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_8x8.v common 6.15 vpr 64.95 MiB 0.01 6272 -1 -1 1 0.02 -1 -1 33860 -1 -1 5 17 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66504 17 16 251 206 1 121 38 5 5 25 clb auto 26.7 MiB 5.21 416 1172 260 902 10 64.9 MiB 0.02 0.00 3.96728 -77.1582 -3.96728 3.96728 0.03 0.000312603 0.000276757 0.00891672 0.00816741 -1 -1 -1 -1 48 720 38 151211 126010 59785.0 2391.40 0.23 0.0869702 0.0759046 2244 9614 -1 524 20 583 895 27498 12778 4.50985 4.50985 -86.7796 -4.50985 0 0 75076.4 3003.05 0.01 0.03 0.01 -1 -1 0.01 0.0200765 0.0185829 46 66 75 13 0 0 - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_9x9.v common 6.32 vpr 64.98 MiB 0.01 6272 -1 -1 1 0.02 -1 -1 34236 -1 -1 7 19 0 -1 success 30aea82 Release IPO VTR_ASSERT_LEVEL=3 GNU 11.4.0 on Linux-6.5.0-1025-azure x86_64 2024-10-28T23:46:21 fv-az1380-902 /home/runner/work/vtr-verilog-to-routing/vtr-verilog-to-routing 66544 19 18 308 249 1 143 44 6 6 36 clb auto 26.7 MiB 4.89 497 1276 264 1003 9 65.0 MiB 0.03 0.00 4.80824 -98.9586 -4.80824 4.80824 0.05 0.000341127 0.000298748 0.00919291 0.00839652 -1 -1 -1 -1 50 1289 35 403230 176413 107229. 2978.57 0.62 0.162204 0.143118 3946 19047 -1 902 18 729 1242 47058 19455 5.94454 5.94454 -126.053 -5.94454 0 0 134937. 3748.26 0.02 0.04 0.02 -1 -1 0.02 0.0225376 0.0208341 55 83 93 14 0 0 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_4x4.v common 1.90 vpr 63.86 MiB 0.01 6660 -1 -1 1 0.03 -1 -1 30168 -1 -1 3 9 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65396 9 8 75 70 1 36 20 5 5 25 clb auto 24.5 MiB 0.67 99 236 93 142 1 63.9 MiB 0.01 0.00 2.64007 -27.5545 -2.64007 2.64007 0.03 0.000150101 0.000136839 0.0027255 0.00257173 -1 -1 -1 -1 44 132 11 151211 75605.7 54748.7 2189.95 0.29 0.0536282 0.0447591 2196 9177 -1 123 7 84 95 3114 1581 2.22275 2.22275 -27.95 -2.22275 0 0 71025.7 2841.03 0.01 0.01 0.01 -1 -1 0.01 0.00628819 0.00587337 13 18 19 7 0 0 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_5x5.v common 4.06 vpr 64.08 MiB 0.01 6644 -1 -1 1 0.03 -1 -1 30172 -1 -1 2 11 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65620 11 10 108 97 1 47 23 4 4 16 clb auto 24.7 MiB 2.90 130 119 34 71 14 64.1 MiB 0.02 0.00 3.45122 -42.2328 -3.45122 3.45122 0.02 0.00022162 0.000202735 0.00277225 0.00266397 -1 -1 -1 -1 32 246 49 50403.8 50403.8 20844.1 1302.76 0.19 0.0635376 0.0536173 1004 2840 -1 156 14 159 209 5514 3395 3.66504 3.66504 -47.9227 -3.66504 0 0 24991.0 1561.94 0.00 0.02 0.00 -1 -1 0.00 0.0101538 0.0089849 15 27 29 8 0 0 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_6x6.v common 6.21 vpr 64.25 MiB 0.02 6556 -1 -1 1 0.03 -1 -1 30528 -1 -1 7 13 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65792 13 12 149 129 1 69 32 6 6 36 clb auto 24.8 MiB 4.92 213 1182 380 774 28 64.2 MiB 0.02 0.00 3.51316 -53.0648 -3.51316 3.51316 0.05 0.000206158 0.000187115 0.00735065 0.00685129 -1 -1 -1 -1 50 378 21 403230 176413 107229. 2978.57 0.23 0.0627034 0.0537731 3946 19047 -1 356 16 276 387 14108 5999 3.51316 3.51316 -57.4904 -3.51316 0 0 134937. 3748.26 0.02 0.02 0.02 -1 -1 0.02 0.014322 0.0130425 25 38 42 9 0 0 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_7x7.v common 4.02 vpr 64.81 MiB 0.01 6608 -1 -1 1 0.05 -1 -1 30256 -1 -1 6 15 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66368 15 14 196 165 1 93 35 5 5 25 clb auto 25.0 MiB 2.37 300 1346 309 1009 28 64.8 MiB 0.03 0.00 3.75042 -65.1319 -3.75042 3.75042 0.03 0.000351053 0.000323744 0.0137524 0.0128999 -1 -1 -1 -1 52 464 29 151211 151211 63348.9 2533.96 0.55 0.128869 0.11071 2316 10503 -1 401 15 409 589 20950 9847 4.67732 4.67732 -77.987 -4.67732 0 0 82390.3 3295.61 0.02 0.05 0.01 -1 -1 0.02 0.0215504 0.0198136 36 51 57 11 0 0 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_8x8.v common 8.23 vpr 64.92 MiB 0.01 6684 -1 -1 1 0.04 -1 -1 30264 -1 -1 5 17 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66480 17 16 251 206 1 119 38 5 5 25 clb auto 25.3 MiB 6.53 402 1424 302 1116 6 64.9 MiB 0.06 0.00 4.01364 -77.5944 -4.01364 4.01364 0.04 0.000638029 0.00057449 0.0201591 0.0188678 -1 -1 -1 -1 52 572 17 151211 126010 63348.9 2533.96 0.57 0.18627 0.160969 2316 10503 -1 511 21 627 1044 32807 14764 4.80785 4.80785 -90.325 -4.80785 0 0 82390.3 3295.61 0.01 0.04 0.01 -1 -1 0.01 0.025349 0.0229586 44 66 75 13 0 0 + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml mult_9x9.v common 7.93 vpr 65.04 MiB 0.01 6560 -1 -1 1 0.04 -1 -1 30652 -1 -1 8 19 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66600 19 18 308 249 1 137 45 6 6 36 clb auto 25.5 MiB 5.82 477 1245 268 971 6 65.0 MiB 0.03 0.00 4.8546 -99.0847 -4.8546 4.8546 0.05 0.000431245 0.000395584 0.0118328 0.0111482 -1 -1 -1 -1 62 774 36 403230 201615 131137. 3642.71 0.93 0.239205 0.206338 4226 23319 -1 685 20 672 1088 36828 14161 5.13584 5.13584 -108.067 -5.13584 0 0 160622. 4461.73 0.02 0.07 0.02 -1 -1 0.02 0.037832 0.0338494 55 83 93 14 0 0 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles/config/golden_results.txt index 5c952a9465c..6d0dc10b927 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - sub_tiles.xml sub_tiles.blif common 6.96 vpr 52.46 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 53724 6 7 19 26 0 19 26 3 3 9 -1 auto 14.0 MiB 0.06 38 52.5 MiB 0.00 0.00 3.87729 -27.141 -3.87729 nan 5.76 2.1768e-05 1.5902e-05 0.000120732 9.1711e-05 6 19 3 14813.4 192574 -1 -1 0.13 0.000683146 0.000527707 19 2 33 35 8627 4321 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.00 0.000253632 0.000207213 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + sub_tiles.xml sub_tiles.blif common 6.87 vpr 56.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 6 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 58140 6 7 19 26 0 19 26 3 3 9 -1 auto 18.1 MiB 0.00 51 216 43 63 110 56.8 MiB 0.00 0.00 3.682 -25.774 -3.682 nan 5.75 4.0855e-05 3.4458e-05 0.0004697 0.000404466 -1 -1 -1 -1 6 19 3 14813.4 192574 -1 -1 0.11 0.00249677 0.00223949 1370 14749 -1 19 3 36 39 5809 2843 3.87729 nan -27.141 -3.87729 0 0 -1 -1 0.00 0.01 0.04 -1 -1 0.00 0.00171008 0.00161397 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles_directs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles_directs/config/golden_results.txt index 23abe8e3257..effb073b2f4 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles_directs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sub_tiles_directs/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - heterogeneous_tile.xml sub_tile_directs.blif common 0.84 vpr 52.18 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 53428 2 2 4 5 0 4 5 3 3 9 -1 auto 13.4 MiB 0.08 8 52.2 MiB 0.01 0.00 2.02889 -4.05778 -2.02889 nan 0.04 9.745e-06 6.069e-06 7.7614e-05 5.4983e-05 3 8 2 0 0 -1 -1 0.09 0.000653069 0.000400216 8 2 5 5 258 212 2.09013 nan -4.05732 -2.09013 0 0 -1 -1 0.00 0.01 0.000111271 8.2662e-05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + heterogeneous_tile.xml sub_tile_directs.blif common 0.44 vpr 56.48 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 4 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 57836 2 2 4 5 0 4 5 3 3 9 -1 auto 17.7 MiB 0.04 8 12 0 0 12 56.5 MiB 0.00 0.00 1.899 -3.798 -1.899 nan 0.02 2.1799e-05 1.5659e-05 0.000138032 0.000105158 -1 -1 -1 -1 3 8 1 0 0 -1 -1 0.01 0.00174536 0.00159206 132 326 -1 8 1 4 4 200 164 2.09013 nan -4.05732 -2.09013 0 0 -1 -1 0.00 0.00 0.00 -1 -1 0.00 0.00138279 0.00133491 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sweep_constant_outputs/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sweep_constant_outputs/config/golden_results.txt index c0fef449a49..423988067a7 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sweep_constant_outputs/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_sweep_constant_outputs/config/golden_results.txt @@ -1,2 +1,2 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml ch_intrinsics.v common 3.09 vpr 63.72 MiB 0.07 9152 -1 -1 3 0.38 -1 -1 36988 -1 -1 14 99 1 0 success v8.0.0-7652-gea38ef7-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-21T13:35:55 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 65252 99 74 307 381 1 199 188 8 8 64 io memory auto 24.9 MiB 0.07 644 63.7 MiB 0.17 0.00 1.98017 -195.698 -1.98017 1.98017 0.14 0.000334875 0.000286206 0.0291975 0.0252332 34 1451 25 2.23746e+06 1.30252e+06 111309. 1739.21 1.21 0.18456 0.163977 4442 19988 -1 1153 18 884 1337 115477 39941 0 0 115477 39941 1337 1162 0 0 7075 6648 0 0 7731 7085 0 0 7083 4324 0 0 46230 10104 0 0 46021 10618 0 0 1337 0 0 542 584 487 4390 0 0 2.25308 2.25308 -221.643 -2.25308 0 0 136889. 2138.88 0.05 0.06 0.02 -1 -1 0.05 0.0248708 0.0229926 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml ch_intrinsics.v common 2.62 vpr 64.77 MiB 0.12 9348 -1 -1 3 0.34 -1 -1 34748 -1 -1 19 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66324 99 74 307 381 1 199 193 8 8 64 io memory auto 25.0 MiB 0.09 843 15232 2608 11323 1301 64.8 MiB 0.09 0.00 2.09714 -214.522 -2.09714 2.09714 0.11 0.00118231 0.00110602 0.0292446 0.027405 -1 -1 -1 -1 32 1663 43 2.23746e+06 1.57199e+06 106908. 1670.44 0.66 0.202684 0.181951 4378 18911 -1 1205 26 736 1206 90558 33684 2.26594 2.26594 -220.489 -2.26594 0 0 130676. 2041.82 0.04 0.09 0.03 -1 -1 0.04 0.0490947 0.0443597 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt index 1135db78e8c..392197825ab 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_target_pin_util/config/golden_results.txt @@ -1,14 +1,14 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -EArch.xml styr.blif common_--target_ext_pin_util_1 1.35 vpr 63.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65020 10 10 168 178 1 73 31 6 6 36 clb auto 24.8 MiB 0.14 407 463 89 357 17 63.5 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000639236 0.000591353 0.00984498 0.00926038 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.203286 0.17206 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0294657 0.0261082 -EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.36 vpr 63.36 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64884 10 10 168 178 1 73 31 6 6 36 clb auto 24.6 MiB 0.14 407 463 89 357 17 63.4 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000639716 0.000592026 0.0099357 0.0093488 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.201688 0.170527 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0298547 0.02646 -EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 3.94 vpr 64.05 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65592 10 10 168 178 1 162 111 14 14 196 clb auto 24.9 MiB 0.89 1425 5963 761 4903 299 64.1 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.42 0.000636581 0.000587323 0.0172709 0.0159953 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 384449. 1961.47 1.35 0.0957477 0.0825025 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.10 0.06 0.06 -1 -1 0.10 0.0212067 0.0187473 -EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.23 vpr 63.33 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64852 10 10 168 178 1 75 33 7 7 49 clb auto 24.6 MiB 0.17 406 657 105 529 23 63.3 MiB 0.02 0.00 2.37613 -26.9385 -2.37613 2.37613 0.06 0.00063646 0.000588776 0.0117407 0.0110135 -1 -1 -1 -1 26 1250 31 1.07788e+06 700622 75813.7 1547.22 0.31 0.101863 0.0875653 3816 13734 -1 911 16 447 1582 77100 25463 2.91114 2.91114 -35.9881 -2.91114 0 0 91376.6 1864.83 0.02 0.05 0.01 -1 -1 0.02 0.0271153 0.0242202 -EArch.xml styr.blif common_--target_ext_pin_util_0.0 3.63 vpr 64.01 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65544 10 10 168 178 1 163 124 14 14 196 clb auto 25.2 MiB 0.96 1418 6922 992 5687 243 64.0 MiB 0.05 0.00 3.05445 -36.9858 -3.05445 3.05445 0.41 0.000641634 0.000592847 0.017123 0.0158404 -1 -1 -1 -1 24 2880 12 9.20055e+06 5.60498e+06 355930. 1815.97 1.01 0.0995734 0.0854586 18592 71249 -1 2826 12 527 2385 139582 29980 3.66329 3.66329 -43.9798 -3.66329 0 0 449262. 2292.15 0.11 0.05 0.07 -1 -1 0.11 0.020324 0.0180622 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.38 vpr 63.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64640 10 10 168 178 1 73 31 6 6 36 clb auto 24.5 MiB 0.14 407 463 89 357 17 63.1 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000633422 0.000585646 0.0098961 0.00929741 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.202108 0.171036 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0303475 0.0269842 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.35 vpr 63.32 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64836 10 10 168 178 1 73 31 6 6 36 clb auto 24.7 MiB 0.14 407 463 89 357 17 63.3 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000638094 0.000590083 0.00989619 0.00930981 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.200907 0.169845 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0298866 0.0264679 -EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 3.84 vpr 63.84 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 65376 10 10 168 178 1 162 111 14 14 196 clb auto 24.8 MiB 0.87 1425 5963 761 4903 299 63.8 MiB 0.05 0.00 3.12847 -37.0503 -3.12847 3.12847 0.41 0.000641613 0.000592378 0.0171905 0.0159105 -1 -1 -1 -1 20 2956 16 9.20055e+06 4.90435e+06 384449. 1961.47 1.29 0.0945882 0.0814975 18004 60473 -1 2785 13 638 2511 146344 31166 3.597 3.597 -45.2096 -3.597 0 0 387483. 1976.95 0.09 0.06 0.06 -1 -1 0.09 0.0210426 0.0186659 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.34 vpr 63.39 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 64912 10 10 168 178 1 73 31 6 6 36 clb auto 24.7 MiB 0.14 407 463 89 357 17 63.4 MiB 0.02 0.00 2.36035 -27.3667 -2.36035 2.36035 0.04 0.000641471 0.000587156 0.009815 0.00922212 -1 -1 -1 -1 32 838 28 646728 592834 58122.9 1614.52 0.53 0.200614 0.16952 2724 10283 -1 702 19 470 1535 59936 21931 2.39503 2.39503 -32.2138 -2.39503 0 0 70489.2 1958.03 0.01 0.05 0.01 -1 -1 0.01 0.0302449 0.0267933 -EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.12 vpr 24.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25396 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 22.7 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.14 vpr 24.97 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25568 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 22.9 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.12 vpr 24.66 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25252 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 23.0 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.12 vpr 24.93 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11548-gf337eb353-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-10-12T10:23:35 betzgrp-wintermute.eecg.utoronto.ca /home/singera8/vtr-verilog-to-routing/vtr_flow/tasks 25532 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 22.6 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + EArch.xml styr.blif common_--target_ext_pin_util_1 1.86 vpr 66.18 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67772 10 10 168 178 1 73 31 6 6 36 clb auto 26.5 MiB 0.22 396 511 91 400 20 66.2 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.05 0.000501126 0.000456082 0.0105682 0.00992181 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 0.69 0.187639 0.16041 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.07 0.01 -1 -1 0.01 0.0401307 0.0361321 + EArch.xml styr.blif common_--target_ext_pin_util_0.7 1.85 vpr 66.26 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67848 10 10 168 178 1 73 31 6 6 36 clb auto 26.7 MiB 0.24 396 511 91 400 20 66.3 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.05 0.00050814 0.000464386 0.0102811 0.00966555 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 0.71 0.196479 0.168384 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.07 0.01 -1 -1 0.01 0.0330747 0.0297042 + EArch.xml styr.blif common_--target_ext_pin_util_0.1,0.5 5.19 vpr 66.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68216 10 10 168 178 1 162 111 14 14 196 clb auto 26.9 MiB 0.89 1456 5963 865 4880 218 66.6 MiB 0.06 0.00 3.05524 -37.9348 -3.05524 3.05524 0.65 0.000523477 0.000473123 0.0172523 0.0158836 -1 -1 -1 -1 26 2865 15 9.20055e+06 4.90435e+06 387483. 1976.95 1.88 0.188569 0.163851 18784 74779 -1 2696 13 472 1947 107713 24081 3.50167 3.50167 -42.0838 -3.50167 0 0 467681. 2386.13 0.17 0.07 0.07 -1 -1 0.17 0.0274362 0.0252919 + EArch.xml styr.blif common_--target_ext_pin_util_0.5,0.3 1.60 vpr 66.12 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 13 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67712 10 10 168 178 1 75 33 7 7 49 clb auto 26.6 MiB 0.24 404 813 125 661 27 66.1 MiB 0.04 0.00 2.45517 -27.3027 -2.45517 2.45517 0.08 0.00050798 0.000465116 0.0193336 0.0182759 -1 -1 -1 -1 26 1116 28 1.07788e+06 700622 75813.7 1547.22 0.35 0.112548 0.0995004 3816 13734 -1 925 18 487 1699 71725 25249 2.97305 2.97305 -35.2593 -2.97305 0 0 91376.6 1864.83 0.02 0.09 0.01 -1 -1 0.02 0.036074 0.0329384 + EArch.xml styr.blif common_--target_ext_pin_util_0.0 4.47 vpr 66.50 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 104 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68092 10 10 168 178 1 163 124 14 14 196 clb auto 26.8 MiB 1.03 1516 7540 1142 6103 295 66.5 MiB 0.06 0.00 3.06133 -37.7953 -3.06133 3.06133 0.57 0.000550538 0.000486087 0.0169228 0.0153939 -1 -1 -1 -1 20 2911 18 9.20055e+06 5.60498e+06 295730. 1508.82 1.28 0.0956201 0.0845563 18004 60473 -1 2874 12 603 2265 131794 29163 3.74152 3.74152 -44.1586 -3.74152 0 0 387483. 1976.95 0.13 0.05 0.05 -1 -1 0.13 0.0197556 0.0180756 + EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7 1.87 vpr 66.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67724 10 10 168 178 1 73 31 6 6 36 clb auto 26.5 MiB 0.19 396 511 91 400 20 66.1 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.05 0.00050848 0.000463468 0.0108023 0.0101532 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 0.76 0.210723 0.180638 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.07 0.01 -1 -1 0.01 0.0400523 0.0363482 + EArch.xml styr.blif common_--target_ext_pin_util_clb_0.7_0.8 1.86 vpr 66.30 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67892 10 10 168 178 1 73 31 6 6 36 clb auto 26.6 MiB 0.24 396 511 91 400 20 66.3 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.04 0.000515808 0.000471915 0.0113979 0.0107292 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 0.69 0.195893 0.168677 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.07 0.01 -1 -1 0.01 0.0384733 0.0348156 + EArch.xml styr.blif common_--target_ext_pin_util_clb_0.1_0.8 5.12 vpr 66.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 91 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68400 10 10 168 178 1 162 111 14 14 196 clb auto 27.1 MiB 0.91 1456 5963 865 4880 218 66.8 MiB 0.06 0.00 3.05524 -37.9348 -3.05524 3.05524 0.57 0.000858666 0.000789693 0.0217968 0.0201256 -1 -1 -1 -1 26 2865 15 9.20055e+06 4.90435e+06 387483. 1976.95 1.84 0.178818 0.155234 18784 74779 -1 2696 13 472 1947 107713 24081 3.50167 3.50167 -42.0838 -3.50167 0 0 467681. 2386.13 0.17 0.06 0.08 -1 -1 0.17 0.0255381 0.023411 + EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0 1.90 vpr 66.23 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 11 10 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67816 10 10 168 178 1 73 31 6 6 36 clb auto 26.6 MiB 0.23 396 511 91 400 20 66.2 MiB 0.02 0.00 2.39024 -27.2311 -2.39024 2.39024 0.05 0.000710376 0.000647785 0.0115236 0.0108448 -1 -1 -1 -1 28 809 33 646728 592834 52494.1 1458.17 0.72 0.206379 0.177028 2620 9165 -1 829 25 747 2300 88210 34485 2.99961 2.99961 -36.9596 -2.99961 0 0 62803.0 1744.53 0.01 0.11 0.01 -1 -1 0.01 0.0399536 0.0360531 + EArch.xml styr.blif common_--target_ext_pin_util_-0.1 0.21 vpr 27.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28648 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.4 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml styr.blif common_--target_ext_pin_util_1.1 0.21 vpr 27.98 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28656 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.6 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_1.0 0.19 vpr 28.04 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28716 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.6 MiB 0.01 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + EArch.xml styr.blif common_--target_ext_pin_util_io_0.1,0.1_clb_0.7_0.8,1.0_clb_1.0 0.19 vpr 28.15 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 28828 10 10 168 178 1 -1 -1 -1 -1 -1 -1 -1 25.6 MiB 0.00 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_tight_floorplan/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_tight_floorplan/config/golden_results.txt index 56337249d30..af6269be78f 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_tight_floorplan/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_tight_floorplan/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_40nm.xml bigkey.blif common_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/bigkey_tight.xml 8.71 vpr 70.53 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 149 229 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 72224 229 197 2152 2349 1 1011 575 16 16 256 io auto 33.2 MiB 2.77 8243 70.5 MiB 1.33 0.02 2.69979 -598.935 -2.69979 2.69979 0.04 0.00486556 0.00421131 0.481613 0.427074 -1 11385 11 1.05632e+07 8.03021e+06 4.24953e+06 16599.7 0.41 0.751105 0.674123 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_40nm.xml bigkey.blif common_-read_vpr_constraints_tasks/regression_tests/vtr_reg_strong/strong_tight_floorplan/bigkey_tight.xml 8.71 vpr 73.06 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 150 229 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 74812 229 197 2152 2349 1 1013 576 16 16 256 io auto 33.5 MiB 3.13 8848 180201 52690 111830 15681 73.1 MiB 1.31 0.03 2.99388 -664.24 -2.99388 2.99388 0.00 0.00538594 0.00461218 0.480806 0.428342 -1 -1 -1 -1 -1 11423 9 1.05632e+07 8.0841e+06 4.24953e+06 16599.7 0.23 0.688229 0.621836 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing/config/golden_results.txt index d3b96c6c8a9..956417a33e9 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 6.30 vpr 61.65 MiB 0.15 9344 -1 -1 3 0.32 -1 -1 36356 -1 -1 65 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63128 99 130 363 493 1 251 295 12 12 144 clb auto 23.5 MiB 0.23 633 61.6 MiB 0.28 0.00 2.15648 -206.017 -2.15648 2.15648 0.38 0.000612541 0.000542696 0.0519809 0.0466649 44 1516 12 5.66058e+06 4.05111e+06 360780. 2505.42 2.86 0.290179 0.265705 1372 9 633 816 45640 14354 2.55518 2.55518 -237.872 -2.55518 0 0 470765. 3269.20 0.15 0.10 0.0257665 0.0243805 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 5.18 vpr 65.63 MiB 0.10 9360 -1 -1 3 0.29 -1 -1 34572 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67208 99 130 363 493 1 251 298 12 12 144 clb auto 26.3 MiB 0.15 830 72933 24114 36385 12434 65.6 MiB 0.26 0.00 2.31523 -217.996 -2.31523 2.31523 0.32 0.000917378 0.000858642 0.0838167 0.0788673 -1 -1 -1 -1 38 1583 13 5.66058e+06 4.21279e+06 319130. 2216.18 2.38 0.45942 0.419671 12522 62564 -1 1389 8 493 651 37667 12430 2.73633 2.73633 -236.043 -2.73633 0 0 406292. 2821.48 0.13 0.04 0.07 -1 -1 0.13 0.0261213 0.0244905 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_fail/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_fail/config/golden_results.txt index 9f2a9bf6306..3fa9e969200 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_fail/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_fail/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/impossible_pass_timing.sdc 3.81 vpr 61.60 MiB 0.12 9252 -1 -1 3 0.37 -1 -1 36376 -1 -1 65 99 1 0 exited with return code 1 v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63080 99 130 363 493 1 251 295 12 12 144 clb auto 23.5 MiB 0.23 670 61.6 MiB 0.26 0.00 2.00435 -128.873 -2.00435 2.00435 0.35 0.000249822 0.000207261 0.0249586 0.0210657 38 1798 12 5.66058e+06 4.05111e+06 319130. 2216.18 1.20 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/impossible_pass_timing.sdc 3.11 vpr 65.57 MiB 0.10 9356 -1 -1 3 0.35 -1 -1 34624 -1 -1 68 99 1 0 exited with return code 1 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 67140 99 130 363 493 1 251 298 12 12 144 clb auto 26.2 MiB 0.16 850 68953 24096 34301 10556 65.6 MiB 0.21 0.00 2.17528 -135.263 -2.17528 2.17528 0.36 0.000607948 0.000558569 0.0540788 0.0494279 -1 -1 -1 -1 36 1722 23 5.66058e+06 4.21279e+06 305235. 2119.69 0.88 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_no_fail/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_no_fail/config/golden_results.txt index bce201fe40d..13ad07bee3b 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_no_fail/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_no_fail/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/easy_pass_timing.sdc 4.85 vpr 61.82 MiB 0.10 9400 -1 -1 3 0.28 -1 -1 36444 -1 -1 65 99 1 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 63300 99 130 363 493 1 252 295 12 12 144 clb auto 23.7 MiB 0.23 617 61.8 MiB 0.30 0.00 2.27192 0 0 2.27192 0.30 0.000460277 0.000392675 0.0292879 0.0245891 42 1517 8 5.66058e+06 4.05111e+06 345702. 2400.71 1.53 0.1211 0.103555 1390 8 469 589 42967 13470 2.82944 2.82944 0 0 0 0 434679. 3018.61 0.11 0.07 0.0139317 0.0129103 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common_-sdc_file_sdc/samples/easy_pass_timing.sdc 6.73 vpr 65.30 MiB 0.11 9496 -1 -1 3 0.35 -1 -1 34624 -1 -1 68 99 1 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66864 99 130 363 493 1 252 298 12 12 144 clb auto 26.0 MiB 0.14 765 78903 26762 38665 13476 65.3 MiB 0.25 0.00 2.31285 0 0 2.31285 0.36 0.000595835 0.000546064 0.0568252 0.0524192 -1 -1 -1 -1 38 1556 15 5.66058e+06 4.21279e+06 319130. 2216.18 3.88 0.700323 0.59673 12522 62564 -1 1352 7 424 536 26689 9017 2.96222 2.96222 0 0 0 0 406292. 2821.48 0.13 0.03 0.07 -1 -1 0.13 0.0171393 0.0157816 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_report_detail/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_report_detail/config/golden_results.txt index 9921e41b4df..26ddabd3b5a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_report_detail/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_report_detail/config/golden_results.txt @@ -1,4 +1,4 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_netlist 0.97 vpr 59.43 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 60852 5 3 11 14 2 9 10 4 4 16 clb auto 20.7 MiB 0.05 16 59.4 MiB 0.02 0.00 0.545 -3.1332 -0.545 0.545 0.04 2.474e-05 1.5234e-05 0.000309588 0.000240107 20 25 8 107788 107788 10441.3 652.579 0.07 0.00128442 0.000977024 25 1 7 7 220 148 0.959369 0.545 -3.98622 -0.959369 0 0 13752.8 859.551 0.00 0.01 0.000324547 0.000273076 - k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_aggregated 0.98 vpr 59.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 61216 5 3 11 14 2 9 10 4 4 16 clb auto 21.1 MiB 0.05 16 59.8 MiB 0.03 0.00 0.545 -3.1332 -0.545 0.545 0.03 1.962e-05 1.2966e-05 0.000252004 0.000192056 20 25 8 107788 107788 10441.3 652.579 0.08 0.00126847 0.000977472 25 1 7 7 220 148 0.959369 0.545 -3.98622 -0.959369 0 0 13752.8 859.551 0.00 0.01 0.000360382 0.000306957 - k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_detailed 0.97 vpr 59.61 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 61040 5 3 11 14 2 9 10 4 4 16 clb auto 21.1 MiB 0.05 16 59.6 MiB 0.02 0.00 0.545 -3.1332 -0.545 0.545 0.03 5.7581e-05 4.4859e-05 0.00037382 0.000271014 20 25 8 107788 107788 10441.3 652.579 0.07 0.00142325 0.00107289 25 1 7 7 220 148 0.959369 0.545 -3.98622 -0.959369 0 0 13752.8 859.551 0.00 0.01 0.00035762 0.000305061 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_netlist 0.68 vpr 65.00 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66556 5 3 11 14 2 9 10 4 4 16 clb auto 26.3 MiB 0.02 20 30 10 17 3 65.0 MiB 0.01 0.00 0.619658 -3.41326 -0.619658 0.545 0.01 3.9442e-05 2.8479e-05 0.000264801 0.000213415 -1 -1 -1 -1 20 15 1 107788 107788 10441.3 652.579 0.05 0.00220927 0.00202353 750 1675 -1 15 1 7 7 94 62 0.562699 0.545 -3.33969 -0.562699 0 0 13752.8 859.551 0.00 0.00 0.00 -1 -1 0.00 0.00165203 0.0015765 + k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_aggregated 0.64 vpr 64.77 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66324 5 3 11 14 2 9 10 4 4 16 clb auto 26.0 MiB 0.02 20 30 10 17 3 64.8 MiB 0.01 0.00 0.619658 -3.41326 -0.619658 0.545 0.01 4.7331e-05 3.4794e-05 0.000313679 0.000255977 -1 -1 -1 -1 20 15 1 107788 107788 10441.3 652.579 0.02 0.00210853 0.00193266 750 1675 -1 15 1 7 7 94 62 0.562699 0.545 -3.33969 -0.562699 0 0 13752.8 859.551 0.00 0.00 0.00 -1 -1 0.00 0.0016735 0.00159778 + k6_frac_N10_frac_chain_mem32K_40nm.xml multiclock.blif common_--timing_report_detail_detailed 0.70 vpr 64.80 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 2 5 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66360 5 3 11 14 2 9 10 4 4 16 clb auto 26.0 MiB 0.03 20 30 10 17 3 64.8 MiB 0.04 0.00 0.619658 -3.41326 -0.619658 0.545 0.01 5.5384e-05 4.0883e-05 0.000339161 0.000274106 -1 -1 -1 -1 20 15 1 107788 107788 10441.3 652.579 0.02 0.00305328 0.00284599 750 1675 -1 15 1 7 7 94 62 0.562699 0.545 -3.33969 -0.562699 0 0 13752.8 859.551 0.00 0.00 0.00 -1 -1 0.00 0.00161855 0.0015492 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_diff/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_diff/config/golden_results.txt index 2712d6d9047..d75c4e0f2bb 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_diff/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_diff/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 4.07 vpr 62.50 MiB 0.16 10064 -1 -1 5 0.14 -1 -1 33372 -1 -1 14 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 64004 11 30 313 321 2 118 55 7 7 49 clb auto 24.4 MiB 0.45 405 62.5 MiB 0.14 0.00 2.27922 -160.669 -2.27922 2.09152 0.00 0.00063458 0.000492411 0.0239991 0.0204211 -1 547 8 1.07788e+06 754516 219490. 4479.39 0.12 0.0493362 0.0439991 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_frac_N10_frac_chain_mem32K_40nm.xml stereovision3.v common 2.86 vpr 66.88 MiB 0.12 10144 -1 -1 5 0.18 -1 -1 33460 -1 -1 14 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 68484 11 30 313 321 2 115 55 7 7 49 clb auto 27.2 MiB 0.36 466 2759 556 2108 95 66.9 MiB 0.06 0.00 2.67362 -172.647 -2.67362 2.30794 0.00 0.000854492 0.000777061 0.032919 0.0303032 -1 -1 -1 -1 -1 574 7 1.07788e+06 754516 219490. 4479.39 0.04 0.063998 0.0591785 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_type/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_type/config/golden_results.txt index a1dce0ad599..2c41099abe5 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_type/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_timing_update_type/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_auto 2.29 vpr 60.52 MiB 0.17 9776 -1 -1 4 0.20 -1 -1 33200 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 61972 11 30 262 292 2 104 60 7 7 49 clb auto 21.8 MiB 0.15 398 60.5 MiB 0.12 0.00 2.2193 -164.973 -2.2193 2.11301 0.01 0.000450293 0.000370745 0.0179219 0.015617 -1 450 27 1.07788e+06 1.02399e+06 207176. 4228.08 0.27 0.0638881 0.0568426 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full 2.28 vpr 60.34 MiB 0.16 9928 -1 -1 4 0.17 -1 -1 33256 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 61788 11 30 262 292 2 104 60 7 7 49 clb auto 21.7 MiB 0.20 398 60.3 MiB 0.12 0.00 2.2193 -164.973 -2.2193 2.11301 0.00 0.000398609 0.000305458 0.0157266 0.013222 -1 450 27 1.07788e+06 1.02399e+06 207176. 4228.08 0.26 0.0568837 0.0495799 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental 2.22 vpr 60.75 MiB 0.13 9764 -1 -1 4 0.18 -1 -1 33184 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 62208 11 30 262 292 2 104 60 7 7 49 clb auto 22.3 MiB 0.18 398 60.8 MiB 0.12 0.00 2.2193 -164.973 -2.2193 2.11301 0.00 5.7121e-05 4.4285e-05 0.0134004 0.011754 -1 450 27 1.07788e+06 1.02399e+06 207176. 4228.08 0.30 0.0454763 0.0386411 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--quench_recompute_divider_999999999 2.19 vpr 60.45 MiB 0.16 9880 -1 -1 4 0.18 -1 -1 33300 -1 -1 19 11 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 61900 11 30 262 292 2 104 60 7 7 49 clb auto 22.1 MiB 0.17 398 60.4 MiB 0.09 0.00 2.2193 -164.973 -2.2193 2.11301 0.01 0.000558978 0.000243257 0.0104204 0.00839301 -1 450 27 1.07788e+06 1.02399e+06 207176. 4228.08 0.23 0.0418815 0.034824 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_auto 1.56 vpr 64.55 MiB 0.11 10036 -1 -1 4 0.23 -1 -1 33332 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66096 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 421 2049 269 1715 65 64.5 MiB 0.05 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 0.000901868 0.000816005 0.0182749 0.0165852 -1 -1 -1 -1 -1 424 16 1.07788e+06 1.02399e+06 207176. 4228.08 0.07 0.0493513 0.0440772 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_full 1.56 vpr 64.68 MiB 0.09 9896 -1 -1 4 0.22 -1 -1 33244 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 66236 11 30 262 292 2 99 60 7 7 49 clb auto 24.9 MiB 0.09 421 2049 269 1715 65 64.7 MiB 0.03 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 0.000505662 0.000447982 0.0141131 0.0127631 -1 -1 -1 -1 -1 424 16 1.07788e+06 1.02399e+06 207176. 4228.08 0.07 0.0443633 0.0397038 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental 1.55 vpr 64.02 MiB 0.12 10036 -1 -1 4 0.21 -1 -1 33388 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65552 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 421 2049 269 1715 65 64.0 MiB 0.03 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 8.432e-06 2.592e-06 0.00561579 0.00470719 -1 -1 -1 -1 -1 424 16 1.07788e+06 1.02399e+06 207176. 4228.08 0.05 0.0266554 0.0212939 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 + k6_N10_mem32K_40nm.xml stereovision3.v common_--timing_update_type_incremental_--quench_recompute_divider_999999999 1.55 vpr 63.92 MiB 0.12 9868 -1 -1 4 0.21 -1 -1 33312 -1 -1 19 11 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 65456 11 30 262 292 2 99 60 7 7 49 clb auto 24.8 MiB 0.09 421 2049 269 1715 65 63.9 MiB 0.03 0.00 2.53105 -179.908 -2.53105 2.34917 0.00 0.000527965 0.000121671 0.00657296 0.00525257 -1 -1 -1 -1 -1 424 16 1.07788e+06 1.02399e+06 207176. 4228.08 0.05 0.0298469 0.0235615 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_titan/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_titan/config/golden_results.txt index 59bd7e6da9a..676a758e26d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_titan/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_titan/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_DSP num_M9K num_M144K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - stratixiv_arch.timing.xml ucsb_152_tap_fir_stratixiv_arch_timing.blif common 67.51 vpr 1.12 GiB 42 750 0 0 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 1169536 13 29 26295 20086 1 12166 792 39 29 1131 LAB auto 1045.4 MiB 15.83 73134 1095.5 MiB 5.90 0.08 5.09794 -4680.59 -4.09794 2.56822 4.44 0.0243976 0.0214121 1.85193 1.56085 80255 27932 41672 32788183 2856931 0 0 2.05958e+07 18210.3 17 5.28804 2.67454 -5275.78 -4.28804 0 0 1101.7 MiB 4.13 3.28507 2.83115 1095.5 MiB 12.81 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error num_io num_LAB num_DSP num_M9K num_M144K num_PLL vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + stratixiv_arch.timing.xml ucsb_152_tap_fir_stratixiv_arch_timing.blif common 69.07 vpr 1.16 GiB 42 758 0 0 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1213468 13 29 26295 20086 1 12439 800 39 29 1131 LAB auto 1063.1 MiB 14.23 70903 253216 51547 191577 10092 1176.3 MiB 10.33 0.14 4.99319 -5223.26 -3.99319 2.64446 0.01 0.0393935 0.0325965 2.91026 2.41968 83183 6.68835 19827 1.59419 25954 36248 10076288 1815088 0 0 2.05929e+07 18207.7 15 331560 3499109 -1 5.28806 2.7363 -5589.94 -4.28806 0 0 6.16 -1 -1 1176.3 MiB 4.02 4.55065 3.84457 1176.3 MiB -1 12.94 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_two_chains/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_two_chains/config/golden_results.txt index 367caadcf4f..f9dc973d7ee 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_two_chains/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_two_chains/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length - k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml diffeq2.v common 22.52 vpr 64.48 MiB 0.08 9612 -1 -1 6 0.15 -1 -1 33820 -1 -1 15 66 0 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 66032 66 96 1000 687 1 574 192 18 18 324 mult_27 auto 26.4 MiB 1.96 5293 64.5 MiB 0.61 0.02 15.5776 -880.096 -15.5776 15.5776 1.29 0.00409449 0.00375619 0.212903 0.196373 56 12558 37 6.4517e+06 1.13409e+06 1.55150e+06 4788.57 12.52 1.10716 1.03508 11892 41 5372 13588 5310568 1426010 17.4243 17.4243 -1114.83 -17.4243 0 0 1.95585e+06 6036.58 0.72 1.91 0.272043 0.257902 134 200 146 33 66 33 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length + k6_frac_N10_4add_2chains_depop50_mem20K_22nm.xml diffeq2.v common 16.79 vpr 67.83 MiB 0.08 9652 -1 -1 6 0.16 -1 -1 34060 -1 -1 15 66 0 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 69456 66 96 1000 687 1 578 192 18 18 324 mult_27 auto 28.6 MiB 1.69 5343 48856 15321 28109 5426 67.8 MiB 0.58 0.01 16.5319 -985.557 -16.5319 16.5319 1.33 0.00284838 0.00269661 0.271323 0.256526 -1 -1 -1 -1 56 12644 31 6.4517e+06 1.13409e+06 1.55150e+06 4788.57 8.30 0.994052 0.922886 50684 323660 -1 11612 24 4774 11145 2601588 732828 16.8532 16.8532 -1120.15 -16.8532 0 0 1.95585e+06 6036.58 0.72 0.84 0.31 -1 -1 0.72 0.163283 0.153391 133 202 146 33 66 33 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_unroute_analysis/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_unroute_analysis/config/golden_results.txt index 13f767bf8dc..bb1d1e6ccea 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_unroute_analysis/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_unroute_analysis/config/golden_results.txt @@ -1,5 +1,5 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20 1.23 vpr 58.07 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 59468 6 8 39 47 1 20 17 5 5 25 clb auto 19.6 MiB 0.11 51 58.1 MiB 0.02 0.00 1.10382 -14.2793 -1.10382 1.10382 0.00 5.8714e-05 4.7628e-05 0.00169436 0.00147025 75 130 167 6598 2896 323364 161682 20103.2 804.128 21 1.3315 1.3315 -16.1007 -1.3315 0 0 58.1 MiB 0.14 0.00884099 0.00776272 58.1 MiB 0.01 - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20_--analysis 1.28 vpr 58.14 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 59536 6 8 39 47 1 20 17 5 5 25 clb auto 19.6 MiB 0.11 51 58.1 MiB 0.03 0.00 1.10382 -14.2793 -1.10382 1.10382 0.00 6.9468e-05 5.5774e-05 0.00183566 0.00158701 75 130 167 6598 2896 323364 161682 20103.2 804.128 21 1.3315 1.3315 -16.1007 -1.3315 0 0 58.1 MiB 0.14 0.00914878 0.0080189 58.1 MiB 0.01 - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8 1.26 vpr 58.10 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 59492 6 8 39 47 1 20 17 5 5 25 clb auto 19.5 MiB 0.11 51 58.1 MiB 0.04 0.00 1.10205 -14.2135 -1.10205 1.10205 0.01 6.339e-05 5.0157e-05 0.00174556 0.00152949 -1 2425 3157 243025 177681 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 58.1 MiB 0.77 -1 -1 58.1 MiB 0.01 - k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8_--analysis 1.28 vpr 57.96 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 59356 6 8 39 47 1 20 17 5 5 25 clb auto 19.4 MiB 0.10 51 58.0 MiB 0.04 0.00 1.10205 -14.2135 -1.10205 1.10205 0.01 8.0753e-05 6.6072e-05 0.00169726 0.00146521 131 2425 3157 243025 177681 323364 161682 9037.03 361.481 -1 1.73639 1.73639 -19.938 -1.73639 0 0 58.0 MiB 0.71 -1 -1 58.0 MiB 0.01 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20 0.67 vpr 62.91 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64420 6 8 39 47 1 20 17 5 5 25 clb auto 24.5 MiB 0.03 69 227 71 153 3 62.9 MiB 0.01 0.00 1.42251 -15.9524 -1.42251 1.42251 0.00 0.000117366 0.000105443 0.00207021 0.0019072 -1 -1 -1 -1 86 4.52632 45 2.36842 140 253 6063 2435 323364 161682 20103.2 804.128 19 1140 2762 -1 1.32969 1.32969 -16.56 -1.32969 0 0 0.00 -1 -1 62.9 MiB 0.02 0.00917762 0.00816725 62.9 MiB -1 0.00 + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_20_--analysis 0.65 vpr 62.88 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64384 6 8 39 47 1 20 17 5 5 25 clb auto 24.5 MiB 0.03 69 227 71 153 3 62.9 MiB 0.01 0.00 1.42251 -15.9524 -1.42251 1.42251 0.00 0.000188315 0.000170732 0.00297437 0.002743 -1 -1 -1 -1 86 4.52632 45 2.36842 140 253 6063 2435 323364 161682 20103.2 804.128 19 1140 2762 -1 1.32969 1.32969 -16.56 -1.32969 0 0 0.00 -1 -1 62.9 MiB 0.02 0.0122453 0.0107752 62.9 MiB -1 0.00 + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8 0.36 vpr 63.08 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64592 6 8 39 47 1 20 17 5 5 25 clb auto 24.7 MiB 0.03 69 227 71 153 3 63.1 MiB 0.01 0.00 1.42347 -15.9604 -1.42347 1.42347 0.00 0.000131128 0.000118797 0.00230482 0.00213538 -1 -1 -1 -1 -1 -1 -1 -1 723 1098 45498 29013 -1 -1 -1 -1 -1 996 1634 -1 -1 -1 -1 -1 -1 -1 0.00 -1 -1 63.1 MiB 0.05 -1 -1 63.1 MiB -1 0.00 + k6_N10_mem32K_40nm.xml traffic.blif common_--route_chan_width_8_--analysis 0.36 vpr 62.83 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 3 6 0 0 exited with return code 2 v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 64336 6 8 39 47 1 20 17 5 5 25 clb auto 24.4 MiB 0.05 69 227 71 153 3 62.8 MiB 0.01 0.00 1.42347 -15.9604 -1.42347 1.42347 0.00 0.000130321 0.00011848 0.00234416 0.00216136 -1 -1 -1 -1 142 7.47368 68 3.57895 723 1098 45498 29013 323364 161682 9037.03 361.481 -1 996 1634 -1 1.87665 1.87665 -21.7004 -1.87665 0 0 0.00 -1 -1 62.8 MiB 0.05 -1 -1 62.8 MiB -1 0.00 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph/config/golden_results.txt index 4dc21c94e18..949cccb520a 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k4_N4_90nm.xml stereovision3.v common 5.74 vpr 55.18 MiB 0.14 9392 -1 -1 6 0.18 -1 -1 33252 -1 -1 66 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56504 11 30 336 366 2 186 107 11 11 121 clb auto 17.1 MiB 0.16 1019 55.2 MiB 0.12 0.00 3.34892 -233.718 -3.34892 3.1336 0.01 0.000837 0.000719499 0.0181904 0.015038 945 883 2563 162625 32660 180575 147135 597941. 4941.66 17 3.34892 3.1336 -239.994 -3.34892 -0.21991 -0.0734 55.2 MiB 0.16 0.0476581 0.0414999 55.2 MiB 0.16 - k6_frac_N10_40nm.xml stereovision3.v common 3.73 vpr 56.27 MiB 0.17 9416 -1 -1 4 0.16 -1 -1 33304 -1 -1 13 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 57616 11 30 262 292 2 110 54 6 6 36 clb auto 18.2 MiB 0.21 352 56.3 MiB 0.12 0.00 2.2451 -155.394 -2.2451 2.08659 0.01 0.000434802 0.000335271 0.0190322 0.0162699 402 201 304 8190 2804 862304 700622 161034. 4473.17 12 2.5204 2.30025 -173.041 -2.5204 0 0 56.3 MiB 0.16 0.0489754 0.0434924 56.3 MiB 0.03 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k4_N4_90nm.xml stereovision3.v common 2.82 vpr 58.30 MiB 0.12 9420 -1 -1 6 0.20 -1 -1 33332 -1 -1 69 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59700 11 30 336 366 2 175 110 11 11 121 clb auto 19.3 MiB 0.08 1069 7737 1075 6148 514 58.3 MiB 0.07 0.00 3.58466 -257.927 -3.58466 3.35525 0.00 0.000795143 0.000713058 0.0296855 0.0265178 -1 -1 -1 -1 1020 5.96491 1020 5.96491 830 2510 115386 26241 180575 153823 597941. 4941.66 12 20106 83797 -1 3.41136 3.2074 -256.892 -3.41136 -0.21991 -0.0734 0.14 -1 -1 58.3 MiB 0.12 0.0657665 0.0592709 58.3 MiB -1 0.11 + k6_frac_N10_40nm.xml stereovision3.v common 2.09 vpr 59.37 MiB 0.15 9312 -1 -1 4 0.21 -1 -1 33464 -1 -1 13 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60796 11 30 262 292 2 110 54 6 6 36 clb auto 20.2 MiB 0.14 411 1380 237 1087 56 59.4 MiB 0.03 0.00 2.57043 -171.117 -2.57043 2.32238 0.00 0.000673202 0.000603541 0.0138837 0.0127263 -1 -1 -1 -1 489 4.61321 218 2.05660 216 331 9092 3075 862304 700622 161034. 4473.17 7 3844 24048 -1 2.49787 2.27724 -178.279 -2.49787 0 0 0.03 -1 -1 59.4 MiB 0.04 0.0384913 0.0354677 59.4 MiB -1 0.02 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_bin/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_bin/config/golden_results.txt index 8fe653a7c8c..43fe9e64de6 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_bin/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_bin/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - k4_N4_90nm.xml stereovision3.v common 3.98 vpr 55.32 MiB 0.15 9436 -1 -1 6 0.18 -1 -1 33228 -1 -1 66 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 56644 11 30 336 366 2 186 107 11 11 121 clb auto 17.2 MiB 0.16 1019 55.3 MiB 0.15 0.00 3.34892 -233.718 -3.34892 3.1336 0.01 0.000610246 0.000497546 0.0184119 0.0152846 945 883 2563 162625 32660 180575 147135 597941. 4941.66 17 3.34892 3.1336 -239.994 -3.34892 -0.21991 -0.0734 55.3 MiB 0.20 0.0492304 0.0428967 55.3 MiB 0.09 - k6_frac_N10_40nm.xml stereovision3.v common 3.12 vpr 56.29 MiB 0.15 9460 -1 -1 4 0.15 -1 -1 33224 -1 -1 13 11 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 57636 11 30 262 292 2 110 54 6 6 36 clb auto 18.2 MiB 0.21 352 56.3 MiB 0.11 0.00 2.2451 -155.394 -2.2451 2.08659 0.00 0.000468024 0.000417734 0.0166369 0.0142314 402 201 304 8190 2804 862304 700622 161034. 4473.17 12 2.5204 2.30025 -173.041 -2.5204 0 0 56.3 MiB 0.09 0.0419611 0.0372158 56.3 MiB 0.02 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + k4_N4_90nm.xml stereovision3.v common 2.46 vpr 58.19 MiB 0.15 9392 -1 -1 6 0.20 -1 -1 33308 -1 -1 69 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 59584 11 30 336 366 2 175 110 11 11 121 clb auto 19.2 MiB 0.06 1069 7737 1075 6148 514 58.2 MiB 0.11 0.00 3.58466 -257.927 -3.58466 3.35525 0.00 0.00113995 0.0010258 0.0368023 0.0330354 -1 -1 -1 -1 1020 5.96491 1020 5.96491 830 2510 115386 26241 180575 153823 597941. 4941.66 12 20106 83797 -1 3.41136 3.2074 -256.892 -3.41136 -0.21991 -0.0734 0.11 -1 -1 58.2 MiB 0.08 0.070273 0.063129 58.2 MiB -1 0.09 + k6_frac_N10_40nm.xml stereovision3.v common 2.05 vpr 59.43 MiB 0.14 9392 -1 -1 4 0.20 -1 -1 33336 -1 -1 13 11 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 60860 11 30 262 292 2 110 54 6 6 36 clb auto 20.2 MiB 0.14 411 1380 237 1087 56 59.4 MiB 0.04 0.00 2.57043 -171.117 -2.57043 2.32238 0.00 0.000753376 0.000667515 0.0140933 0.0129404 -1 -1 -1 -1 489 4.61321 218 2.05660 216 331 9092 3075 862304 700622 161034. 4473.17 7 3844 24048 -1 2.49787 2.27724 -178.279 -2.49787 0 0 0.03 -1 -1 59.4 MiB 0.04 0.0397773 0.0366976 59.4 MiB -1 0.02 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_titan/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_titan/config/golden_results.txt index e2a502448d6..369954619cf 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_titan/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_verify_rr_graph_titan/config/golden_results.txt @@ -1,2 +1,2 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time routed_wirelength total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem router_lookahead_computation_time - stratixiv_arch.timing.xml styr.blif common 33.10 vpr 935.62 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-6793-gb52911b9f release IPO VTR_ASSERT_LEVEL=2 GNU 7.5.0 on Linux-4.15.0-167-generic x86_64 2022-11-27T15:52:14 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/pack_refactor/vtr-verilog-to-routing 958072 10 10 168 178 1 62 30 11 8 88 io auto 911.5 MiB 0.74 339 935.6 MiB 0.06 0.00 6.45778 -70.0303 -6.45778 6.45778 0.02 0.000278505 0.000231418 0.0101016 0.00898791 723 459 1886 164820 67565 0 0 100248. 1139.18 17 7.04301 7.04301 -76.5897 -7.04301 0 0 935.6 MiB 0.23 0.0389235 0.0357448 935.6 MiB 0.05 + arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time ap_mem ap_time ap_full_legalizer_mem ap_full_legalizer_time routed_wirelength avg_routed_wirelength routed_wiresegment avg_routed_wiresegment total_nets_routed total_connections_routed total_heap_pushes total_heap_pops logic_block_area_total logic_block_area_used routing_area_total routing_area_per_tile crit_path_route_success_iteration num_rr_graph_nodes num_rr_graph_edges collapsed_nodes critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS create_rr_graph_time create_intra_cluster_rr_graph_time adding_internal_edges route_mem crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time router_lookahead_mem tile_lookahead_computation_time router_lookahead_computation_time + stratixiv_arch.timing.xml styr.blif common 33.96 vpr 976.78 MiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 10 -1 -1 success v8.0.0-11852-g026644d7f-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-11-21T16:04:00 betzgrp-wintermute.eecg.utoronto.ca /home/elgamma8/research/temp/temp2/vtr-verilog-to-routing 1000220 10 10 168 178 1 68 30 11 8 88 io auto 953.8 MiB 0.62 354 536 67 434 35 976.8 MiB 0.06 0.00 6.57169 -72.0462 -6.57169 6.57169 0.00 0.000450859 0.000408422 0.0103745 0.00973574 -1 -1 -1 -1 586 8.74627 178 2.65672 259 971 58705 26468 0 0 194014. 2204.70 13 11730 32605 -1 6.82307 6.82307 -73.1617 -6.82307 0 0 0.08 -1 -1 976.8 MiB 0.07 0.0397393 0.0369452 976.8 MiB -1 0.04