From b4be0a53c9a6dea7a4631c2b490303b1c797f629 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Tue, 16 Jul 2024 07:24:02 -0700 Subject: [PATCH 001/146] changed the architecture parser to allow definition of mux_inc and mux_dec for specifiying different switches for wires with different direction --- libs/libarchfpga/src/physical_types.h | 14 +++- libs/libarchfpga/src/read_xml_arch_file.cpp | 88 +++++++++++++++++---- 2 files changed, 82 insertions(+), 20 deletions(-) diff --git a/libs/libarchfpga/src/physical_types.h b/libs/libarchfpga/src/physical_types.h index 422fb107535..47c197690c9 100644 --- a/libs/libarchfpga/src/physical_types.h +++ b/libs/libarchfpga/src/physical_types.h @@ -1561,6 +1561,12 @@ enum e_Fc_type { * relation to the switches from the architecture file, * * not the expanded list of switches that is built * * at the end of build_rr_graph * + * @param arch_wire_switch_dec: Same as arch_wire_switch but used only for * + * decremental tracks if it is specified in the * + * architecture file. * + * @param arch_opin_switch_dec: Same as arch_opin_switch but used only for * + * decremental tracks if it is specified in the * + * architecture file * * * * @param arch_opin_between_dice_switch: Index of the switch type that * * connects output pins (OPINs) *to* this segment from * @@ -1579,14 +1585,14 @@ enum e_Fc_type { * Cmetal: Capacitance of a routing track, per unit logic block length. * * Rmetal: Resistance of a routing track, per unit logic block length. * * (UDSD by AY) drivers: How do signals driving a routing track connect to * - * the track? + * the track? * * seg_index: The index of the segment as stored in the appropriate Segs list* * Upon loading the architecture, we use this field to keep track * * the segment's index in the unified segment_inf vector. This is * * useful when building the rr_graph for different Y & X channels * - * in terms of track distribution and segment type. * + * in terms of track distribution and segment type. * * res_type: Determines the routing network to which the segment belongs. * - * Possible values are: + * Possible values are: * * - GENERAL: The segment is part of the general routing * * resources. * * - GCLK: The segment is part of the global routing network. * @@ -1600,6 +1606,8 @@ struct t_segment_inf { int length; short arch_wire_switch; short arch_opin_switch; + short arch_wire_switch_dec; + short arch_opin_switch_dec; short arch_opin_between_dice_switch = -1; float frac_cb; float frac_sb; diff --git a/libs/libarchfpga/src/read_xml_arch_file.cpp b/libs/libarchfpga/src/read_xml_arch_file.cpp index 359a5410b0c..f3a9ffaa683 100644 --- a/libs/libarchfpga/src/read_xml_arch_file.cpp +++ b/libs/libarchfpga/src/read_xml_arch_file.cpp @@ -3766,6 +3766,10 @@ static void ProcessSegments(pugi::xml_node Parent, //Unidir requires the following tags expected_subtags.emplace_back("mux"); expected_subtags.emplace_back("mux_inter_die"); + //with the following two tags, we can allow the architecture file to define + //different muxes with different delays for wires with different directions + expected_subtags.emplace_back("mux_inc"); + expected_subtags.emplace_back("mux_dec"); } else { @@ -3796,28 +3800,78 @@ static void ProcessSegments(pugi::xml_node Parent, /* Get the wire and opin switches, or mux switch if unidir */ if (UNI_DIRECTIONAL == Segs[i].directionality) { //Get the switch name for same die wire and track connections - SubElem = get_single_child(Node, "mux", loc_data); - tmp = get_attribute(SubElem, "name", loc_data).value(); - - /* Match names */ - for (j = 0; j < NumSwitches; ++j) { - if (0 == strcmp(tmp, Switches[j].name.c_str())) { - break; /* End loop so j is where we want it */ + SubElem = get_single_child(Node, "mux", loc_data, ReqOpt::OPTIONAL); + tmp = get_attribute(SubElem, "name", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); + + //check if tag is defined in the architecture, otherwise we should look for and + if(tmp){ + /* Match names */ + for (j = 0; j < NumSwitches; ++j) { + if (0 == strcmp(tmp, Switches[j].name.c_str())) { + break; /* End loop so j is where we want it */ + } } + if (j >= NumSwitches) { + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "'%s' is not a valid mux name.\n", tmp); + } + + /* Unidir muxes must have the same switch + * for wire and opin fanin since there is + * really only the mux in unidir. */ + Segs[i].arch_wire_switch = j; + Segs[i].arch_opin_switch = j; } - if (j >= NumSwitches) { - archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), - "'%s' is not a valid mux name.\n", tmp); - } + else { //if a general mux is not defined, we should look for specific mux for each direction in the architecture file + SubElem = get_single_child(Node, "mux_inc", loc_data, ReqOpt::OPTIONAL); + tmp = get_attribute(SubElem, "name", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); + if(!tmp){ + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "if mux is not specified in a wire segment, both mux_inc and mux_dec should be specified"); + } else{ + /* Match names */ + for (j = 0; j < NumSwitches; ++j) { + if (0 == strcmp(tmp, Switches[j].name.c_str())) { + break; /* End loop so j is where we want it */ + } + } + if (j >= NumSwitches) { + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "'%s' is not a valid mux name.\n", tmp); + } - /* Unidir muxes must have the same switch - * for wire and opin fanin since there is - * really only the mux in unidir. */ - Segs[i].arch_wire_switch = j; - Segs[i].arch_opin_switch = j; + /* Unidir muxes must have the same switch + * for wire and opin fanin since there is + * really only the mux in unidir. */ + Segs[i].arch_wire_switch = j; + Segs[i].arch_opin_switch = j; + } - } + SubElem = get_single_child(Node, "mux_dec", loc_data, ReqOpt::OPTIONAL); + tmp = get_attribute(SubElem, "name", loc_data, ReqOpt::OPTIONAL).as_string(nullptr); + if(!tmp){ + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "if mux is not specified in a wire segment, both mux_inc and mux_dec should be specified"); + } else{ + /* Match names */ + for (j = 0; j < NumSwitches; ++j) { + if (0 == strcmp(tmp, Switches[j].name.c_str())) { + break; /* End loop so j is where we want it */ + } + } + if (j >= NumSwitches) { + archfpga_throw(loc_data.filename_c_str(), loc_data.line(SubElem), + "'%s' is not a valid mux name.\n", tmp); + } + /* Unidir muxes must have the same switch + * for wire and opin fanin since there is + * really only the mux in unidir. */ + Segs[i].arch_wire_switch_dec = j; + Segs[i].arch_opin_switch_dec = j; + } + } + } else { VTR_ASSERT(BI_DIRECTIONAL == Segs[i].directionality); SubElem = get_single_child(Node, "wire_switch", loc_data); From 5ea2e5399a30372e13ac3b74bce4069caadbaaf1 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Tue, 16 Jul 2024 08:12:52 -0700 Subject: [PATCH 002/146] changed the RR graph switch selection for wires with different directions --- vpr/src/route/rr_graph2.cpp | 21 +++++++++++++++++---- 1 file changed, 17 insertions(+), 4 deletions(-) diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp index f77839736a4..4e44d105968 100644 --- a/vpr/src/route/rr_graph2.cpp +++ b/vpr/src/route/rr_graph2.cpp @@ -300,7 +300,8 @@ t_seg_details* alloc_and_load_seg_details(int* max_chan_width, * as they will not be staggered by different segment start points. */ int cur_track, ntracks, itrack, length, j, index; - int arch_wire_switch, arch_opin_switch, fac, num_sets, tmp; + int fac, num_sets, tmp; + int arch_wire_switch, arch_opin_switch, arch_wire_switch_dec, arch_opin_switch_dec; int arch_opin_between_dice_switch; int group_start, first_track; std::unique_ptr sets_per_seg_type; @@ -352,8 +353,10 @@ t_seg_details* alloc_and_load_seg_details(int* max_chan_width, arch_wire_switch = segment_inf[i].arch_wire_switch; arch_opin_switch = segment_inf[i].arch_opin_switch; + arch_wire_switch_dec = segment_inf[i].arch_wire_switch_dec; + arch_opin_switch_dec = segment_inf[i].arch_opin_switch_dec; arch_opin_between_dice_switch = segment_inf[i].arch_opin_between_dice_switch; - VTR_ASSERT((arch_wire_switch == arch_opin_switch) || (directionality != UNI_DIRECTIONAL)); + VTR_ASSERT((arch_wire_switch == arch_opin_switch && arch_wire_switch_dec == arch_opin_switch_dec) || (directionality != UNI_DIRECTIONAL)); /* Set up the tracks of same type */ group_start = 0; @@ -416,8 +419,6 @@ t_seg_details* alloc_and_load_seg_details(int* max_chan_width, seg_details[cur_track].Cmetal = segment_inf[i].Cmetal; //seg_details[cur_track].Cmetal_per_m = segment_inf[i].Cmetal_per_m; - seg_details[cur_track].arch_wire_switch = arch_wire_switch; - seg_details[cur_track].arch_opin_switch = arch_opin_switch; seg_details[cur_track].arch_opin_between_dice_switch = arch_opin_between_dice_switch; if (BI_DIRECTIONAL == directionality) { @@ -427,6 +428,18 @@ t_seg_details* alloc_and_load_seg_details(int* max_chan_width, seg_details[cur_track].direction = (itrack % 2) ? Direction::DEC : Direction::INC; } + //check for directionality to set the wire_switch and opin_switch + //if not specified in the architecture file, we will use a same mux for both directions + if (seg_details[cur_track].direction == Direction::INC || arch_wire_switch_dec == -1){ + seg_details[cur_track].arch_opin_switch = arch_opin_switch; + seg_details[cur_track].arch_wire_switch = arch_wire_switch; + } + else { + VTR_ASSERT(seg_details[cur_track].direction == Direction::DEC); + seg_details[cur_track].arch_opin_switch = arch_opin_switch_dec; + seg_details[cur_track].arch_wire_switch = arch_wire_switch_dec; + } + seg_details[cur_track].index = i; seg_details[cur_track].abs_index = segment_inf[i].seg_index; From 4610a9d8e131cc7e5d1d04ea5e92070f72ca25f8 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Tue, 16 Jul 2024 14:26:23 -0700 Subject: [PATCH 003/146] added the extra missing condition for bidir segments --- vpr/src/route/rr_graph2.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/vpr/src/route/rr_graph2.cpp b/vpr/src/route/rr_graph2.cpp index 4e44d105968..751556fd3f4 100644 --- a/vpr/src/route/rr_graph2.cpp +++ b/vpr/src/route/rr_graph2.cpp @@ -430,7 +430,7 @@ t_seg_details* alloc_and_load_seg_details(int* max_chan_width, //check for directionality to set the wire_switch and opin_switch //if not specified in the architecture file, we will use a same mux for both directions - if (seg_details[cur_track].direction == Direction::INC || arch_wire_switch_dec == -1){ + if (seg_details[cur_track].direction == Direction::INC || seg_details[cur_track].direction == Direction::BIDIR || arch_wire_switch_dec == -1){ seg_details[cur_track].arch_opin_switch = arch_opin_switch; seg_details[cur_track].arch_wire_switch = arch_wire_switch; } From ac4f788d6b41466f552711932c3b3d09218a9415 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 16 Jul 2024 17:42:42 -0400 Subject: [PATCH 004/146] add golden results for 3d regression test --- .../vpr_tight_floorplan_3d/config/config.txt | 2 +- .../vpr_tight_floorplan_3d/config/golden_results.txt | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) create mode 100644 vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/golden_results.txt diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/config.txt index 6259b6d82ad..f536515b9ef 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/config.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/config.txt @@ -21,7 +21,7 @@ parse_file=vpr_standard.txt qor_parse_file=qor_standard.txt # Pass requirements -#pass_requirements_file=pass_requirements.txt +pass_requirements_file=pass_requirements.txt # Script parameters script_params_common =-starting_stage vpr --route_chan_width 300 --max_router_iterations 400 --router_lookahead map --initial_pres_fac 1.0 --router_profiler_astar_fac 1.5 --seed 3 --device neuron3d diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/golden_results.txt new file mode 100644 index 00000000000..7b7954f2f05 --- /dev/null +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/config/golden_results.txt @@ -0,0 +1,4 @@ +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +3d_full_OPIN_inter_die_stratixiv_arch.timing.xml neuron_stratixiv_arch_timing.blif common_-sdc_file_sdc/samples/neuron_stratixiv_arch_timing.sdc_-read_vpr_constraints_tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/one_big_partition.xml 835.38 vpr 2.86 GiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 42 -1 -1 success 16adbfa-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-15T00:59:58 gh-actions-runner-vtr-auto-spawned49 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2998168 42 35 119888 86875 1 50931 3418 92 68 12512 -1 neuron3d 1871.5 MiB 125.92 471295 2911586 1070954 1811088 29544 2883.9 MiB 225.67 2.10 7.73071 -71900.2 -6.73071 5.03261 0.22 0.369023 0.308324 43.731 35.9598 -1 672628 24 0 0 2.71622e+08 21708.9 79.02 68.1319 57.7539 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +3d_full_OPIN_inter_die_stratixiv_arch.timing.xml neuron_stratixiv_arch_timing.blif common_-sdc_file_sdc/samples/neuron_stratixiv_arch_timing.sdc_-read_vpr_constraints_tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/half_blocks_right_left.xml 820.30 vpr 2.86 GiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 42 -1 -1 success 16adbfa-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-15T00:59:58 gh-actions-runner-vtr-auto-spawned49 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2995656 42 35 119888 86875 1 50982 3427 92 68 12512 -1 neuron3d 1869.5 MiB 127.02 455014 2973417 1101001 1762977 109439 2881.6 MiB 223.03 1.76 7.42684 -70436.4 -6.42684 5.75387 0.23 0.367143 0.304401 44.7203 37.4852 -1 654498 28 0 0 2.71622e+08 21708.9 78.86 71.0006 61.0273 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +3d_full_OPIN_inter_die_stratixiv_arch.timing.xml neuron_stratixiv_arch_timing.blif common_-sdc_file_sdc/samples/neuron_stratixiv_arch_timing.sdc_-read_vpr_constraints_tasks/regression_tests/vtr_reg_nightly_test5/vpr_tight_floorplan_3d/half_blocks_up_down.xml 812.45 vpr 2.86 GiB -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 42 -1 -1 success 16adbfa-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-15T00:59:58 gh-actions-runner-vtr-auto-spawned49 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2995760 42 35 119888 86875 1 50982 3427 92 68 12512 -1 neuron3d 1869.6 MiB 125.77 465634 3050895 1119051 1501125 430719 2881.9 MiB 206.05 1.47 7.58328 -72552.7 -6.58328 5.5951 0.22 0.365879 0.300546 45.7365 37.5853 -1 663695 23 0 0 2.71622e+08 21708.9 79.71 69.6049 58.853 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 From ccad435fe83b377f3e4b9648e657038267498c5a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 16 Jul 2024 19:55:44 -0400 Subject: [PATCH 005/146] moved ERROR_TOL to net_cost_handler.h --- vpr/src/place/net_cost_handler.cpp | 8 +------- vpr/src/place/net_cost_handler.h | 11 +++++++++-- vpr/src/place/place.cpp | 5 ----- 3 files changed, 10 insertions(+), 14 deletions(-) diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 888f2bea130..f247747e47c 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -19,13 +19,7 @@ enum class NetUpdateState { GOT_FROM_SCRATCH }; -/** - * @brief The error tolerance due to round off for the total cost computation. - * When we check it from scratch vs. incrementally. 0.01 means that there is a 1% error tolerance. - */ -#define ERROR_TOL .01 - -const int MAX_FANOUT_CROSSING_COUNT = 50; +static constexpr int MAX_FANOUT_CROSSING_COUNT = 50; /** * @brief Crossing counts for nets with different #'s of pins. From diff --git a/vpr/src/place/net_cost_handler.h b/vpr/src/place/net_cost_handler.h index 57c64cadca5..23197030a8c 100644 --- a/vpr/src/place/net_cost_handler.h +++ b/vpr/src/place/net_cost_handler.h @@ -4,9 +4,16 @@ #include "move_transactions.h" #include "place_util.h" + +/** + * @brief The error tolerance due to round off for the total cost computation. + * When we check it from scratch vs. incrementally. 0.01 means that there is a 1% error tolerance. + */ +constexpr double ERROR_TOL = .01; + /** - * @brief The method used to calculate palcement cost - * @details For comp_cost. NORMAL means use the method that generates updateable bounding boxes for speed. + * @brief The method used to calculate placement cost + * @details For comp_cost. NORMAL means use the method that generates updatable bounding boxes for speed. * CHECK means compute all bounding boxes from scratch using a very simple routine to allow checks * of the other costs. * NORMAL: Compute cost efficiently using incremental techniques. diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 4e7f448c34b..4b18d01bcf6 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -88,11 +88,6 @@ using std::max; using std::min; /************** Types and defines local to place.c ***************************/ - -/* This defines the error tolerance for floating points variables used in * - * cost computation. 0.01 means that there is a 1% error tolerance. */ -static constexpr double ERROR_TOL = .01; - /* This defines the maximum number of swap attempts before invoking the * * once-in-a-while placement legality check as well as floating point * * variables round-offs check. */ From f11aaea3f642d2112065688e362b6fabf5048e46 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 10:19:02 -0400 Subject: [PATCH 006/146] update documentation for segment definition in the architecture file --- doc/src/arch/reference.rst | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/doc/src/arch/reference.rst b/doc/src/arch/reference.rst index 8a0510c2772..8e1cc975e75 100644 --- a/doc/src/arch/reference.rst +++ b/doc/src/arch/reference.rst @@ -2036,6 +2036,26 @@ The ```` tag and its contents are described below. Tag must be included and ``name`` must be the same as the name you give in `` + + :req_param name: + Name of the mux switch type used to drive the incremental wires in this segment from both block outputs and other wires. + Incremental wires are tracks within this segment that are heading in the "right" direction on the x-axis and the "top" direction on the y-axis. + This information is used during rr-graph construction, and a custom switch block can override this switch type for specific connections if desired. + + .. note:: For UNIDIRECTIONAL only. + +.. arch:tag:: + + :req_param name: + Name of the mux switch type used to drive the decremental wires in this segment from both block outputs and other wires. + Incremental wires are tracks within this segment that are heading in the "left" direction on the x-axis and the "bottom" direction on the y-axis. + This information is used during rr-graph construction, and a custom switch block can override this switch type for specific connections if desired. + + .. note:: For UNIDIRECTIONAL only. + + .. note:: For unidirectional segments, either tag or both and should be defined in the architecture file. If only the tag is defined, we assume that the same mux drives both incremental and decremental wires within this segment. + .. arch:tag:: :req_param name: Name of the switch type used by other wires to drive this type of segment by default. This information is used during rr-graph construction, and a custom switch block can override this switch type for specific connections if desired. From 762ac7c0d9b84131c9c318372fbc43b9fd36b2c7 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 11:03:16 -0400 Subject: [PATCH 007/146] added a simple architecture to test different mux for inc and dec wires --- ...N10_40nm_diff_switch_for_inc_dec_wires.xml | 288 ++++++++++++++++++ 1 file changed, 288 insertions(+) create mode 100644 vtr_flow/arch/timing/k6_N10_40nm_diff_switch_for_inc_dec_wires.xml diff --git a/vtr_flow/arch/timing/k6_N10_40nm_diff_switch_for_inc_dec_wires.xml b/vtr_flow/arch/timing/k6_N10_40nm_diff_switch_for_inc_dec_wires.xml new file mode 100644 index 00000000000..27a00e767f6 --- /dev/null +++ b/vtr_flow/arch/timing/k6_N10_40nm_diff_switch_for_inc_dec_wires.xml @@ -0,0 +1,288 @@ + + + + + + + + + + + + + + + + + io.outpad io.inpad io.clock + io.outpad io.inpad io.clock + io.outpad io.inpad io.clock + io.outpad io.inpad io.clock + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 1 1 1 1 1 + 1 1 1 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 261e-12 + 261e-12 + 261e-12 + 261e-12 + 261e-12 + 261e-12 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + From bada3f40f9c16c8afe2656746f9401ca486407d5 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 11:20:36 -0400 Subject: [PATCH 008/146] added a single task to compare diff mux for inc/dec with normal architecture --- .../config/config.txt | 28 +++++++++++++++++++ .../config/golden_results.txt | 3 ++ 2 files changed, 31 insertions(+) create mode 100644 vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/config.txt create mode 100644 vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/config.txt new file mode 100644 index 00000000000..6aa68196bfc --- /dev/null +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/config.txt @@ -0,0 +1,28 @@ +############################################## +# Configuration file for running experiments +############################################## + +# Path to directory of circuits to use +circuits_dir=benchmarks/verilog + +# Path to directory of architectures to use +archs_dir=arch/timing + +# Add circuits to list to sweep +circuit_list_add=stereovision0.v + +# Add architectures to list to sweep +arch_list_add=k6_N10_40nm.xml +arch_list_add=k6_N10_40nm_diff_switch_for_inc_dec_wires.xml + +# Parse info and how to parse +parse_file=vpr_standard.txt + +# How to parse QoR info +qor_parse_file=qor_standard.txt + +# Pass requirements +pass_requirements_file=pass_requirements.txt + +# Script parameters +script_params = -crit_path_router_iterations 150 \ No newline at end of file diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt new file mode 100644 index 00000000000..aeff2922e33 --- /dev/null +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt @@ -0,0 +1,3 @@ +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6_N10_40nm.xml stereovision0.v common 140.15 vpr 272.04 MiB -1 -1 12.85 119508 5 37.98 -1 -1 65828 -1 -1 1307 169 -1 -1 success v8.0.0-10642-gf11aaea3f release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-18T10:51:58 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/inc_dec_wires/vtr-verilog-to-routing/vtr_flow/tasks 278564 169 197 21166 21363 1 7566 1673 39 39 1521 clb auto 140.8 MiB 3.95 53142 974519 347458 607168 19893 272.0 MiB 10.23 0.10 3.63366 -15348.4 -3.63366 3.63366 9.71 0.0315035 0.026913 3.45179 2.89228 44 69063 46 7.37824e+07 7.04408e+07 4.68145e+06 3077.88 43.27 19.1637 16.0718 125110 968779 -1 63965 24 33902 65662 2813140 489196 3.57565 3.57565 -16119.5 -3.57565 0 0 6.05227e+06 3979.14 1.97 2.96 0.84 -1 -1 1.97 2.09287 1.80452 +k6_N10_40nm_diff_switch_for_inc_dec_wires.xml stereovision0.v common 138.68 vpr 271.91 MiB -1 -1 12.57 119440 5 36.46 -1 -1 65388 -1 -1 1307 169 -1 -1 success v8.0.0-10642-gf11aaea3f release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-18T10:51:58 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/inc_dec_wires/vtr-verilog-to-routing/vtr_flow/tasks 278432 169 197 21166 21363 1 7566 1673 39 39 1521 clb auto 140.7 MiB 3.96 53142 974519 347458 607168 19893 271.9 MiB 11.12 0.11 3.63366 -15348.4 -3.63366 3.63366 9.48 0.037164 0.0323029 4.04546 3.42407 44 69063 46 7.37824e+07 7.04408e+07 4.68145e+06 3077.88 43.94 19.9593 16.7643 125110 968779 -1 63965 24 33902 65662 2813140 489196 3.57565 3.57565 -16119.5 -3.57565 0 0 6.05227e+06 3979.14 2.02 2.80 0.83 -1 -1 2.02 1.87812 1.62699 From 87ad1b92b10ed300c3091f2dc918ed5c5a4eeca0 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 13:01:35 -0400 Subject: [PATCH 009/146] added a similar task for odin --- .../config/config.txt | 28 +++++++++++++++++++ .../config/golden_results.txt | 3 ++ 2 files changed, 31 insertions(+) create mode 100644 vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/config.txt create mode 100644 vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/config.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/config.txt new file mode 100644 index 00000000000..5836533b276 --- /dev/null +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/config.txt @@ -0,0 +1,28 @@ +############################################## +# Configuration file for running experiments +############################################## + +# Path to directory of circuits to use +circuits_dir=benchmarks/verilog + +# Path to directory of architectures to use +archs_dir=arch/timing + +# Add circuits to list to sweep +circuit_list_add=stereovision0.v + +# Add architectures to list to sweep +arch_list_add=k6_N10_40nm.xml +arch_list_add=k6_N10_40nm_diff_switch_for_inc_dec_wires.xml + +# Parse info and how to parse +parse_file=vpr_standard.txt + +# How to parse QoR info +qor_parse_file=qor_standard.txt + +# Pass requirements +pass_requirements_file=pass_requirements.txt + +# Script parameters +script_params = -start odin -crit_path_router_iterations 150 \ No newline at end of file diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt new file mode 100644 index 00000000000..873a4df06d4 --- /dev/null +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires/config/golden_results.txt @@ -0,0 +1,3 @@ +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6_N10_40nm.xml stereovision0.v common 170.85 vpr 277.04 MiB 2.40 125884 -1 -1 5 83.06 -1 -1 75508 -1 -1 1297 157 -1 -1 success v8.0.0-10644-gbada3f40f release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-18T12:52:25 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/inc_dec_wires/vtr-verilog-to-routing/vtr_flow/tasks 283692 157 197 21024 21221 1 7547 1651 39 39 1521 clb auto 144.7 MiB 3.96 51912 967297 355681 587577 24039 277.0 MiB 10.10 0.10 3.27987 -14557.4 -3.27987 3.27987 9.63 0.0317477 0.0266474 3.48443 2.90114 46 64729 31 7.37824e+07 6.99019e+07 4.88195e+06 3209.70 35.95 15.7549 13.2195 126630 998267 -1 62442 28 35421 67860 2863040 490307 3.17524 3.17524 -15310.6 -3.17524 0 0 6.27360e+06 4124.65 1.97 3.27 0.83 -1 -1 1.97 2.34241 2.01697 +k6_N10_40nm_diff_switch_for_inc_dec_wires.xml stereovision0.v common 170.38 vpr 277.10 MiB 2.43 126080 -1 -1 5 82.80 -1 -1 75404 -1 -1 1297 157 -1 -1 success v8.0.0-10644-gbada3f40f release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-4.15.0-213-generic x86_64 2024-07-18T12:52:25 betzgrp-wintermute.eecg.utoronto.ca /home/mahmo494/Desktop/inc_dec_wires/vtr-verilog-to-routing/vtr_flow/tasks 283748 157 197 21024 21221 1 7547 1651 39 39 1521 clb auto 144.6 MiB 4.05 51912 967297 355681 587577 24039 277.1 MiB 10.27 0.10 3.27987 -14557.4 -3.27987 3.27987 9.61 0.0323462 0.0271905 3.52052 2.92391 46 64729 31 7.37824e+07 6.99019e+07 4.88195e+06 3209.70 34.80 15.1519 12.6486 126630 998267 -1 62442 28 35421 67860 2863040 490307 3.17524 3.17524 -15310.6 -3.17524 0 0 6.27360e+06 4124.65 1.87 3.85 0.81 -1 -1 1.87 2.71824 2.34292 From b8ef971c29ebf6907378a13910e82f10e4074a9a Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 13:02:51 -0400 Subject: [PATCH 010/146] update task list for both strong and strong_odin --- vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt | 1 + .../tasks/regression_tests/vtr_reg_strong_odin/task_list.txt | 1 + 2 files changed, 2 insertions(+) diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt index 322e7de030d..3fd9485c892 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt @@ -20,6 +20,7 @@ regression_tests/vtr_reg_strong/strong_dedicated_clock regression_tests/vtr_reg_strong/strong_default_fc_pinlocs regression_tests/vtr_reg_strong/strong_depop regression_tests/vtr_reg_strong/strong_detailed_timing +regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires regression_tests/vtr_reg_strong/strong_eblif_vpr regression_tests/vtr_reg_strong/strong_eblif_vpr_write regression_tests/vtr_reg_strong/strong_echo_files diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/task_list.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/task_list.txt index ab44aee0cf4..37eedf040f0 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/task_list.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong_odin/task_list.txt @@ -20,6 +20,7 @@ regression_tests/vtr_reg_strong_odin/strong_dedicated_clock regression_tests/vtr_reg_strong_odin/strong_default_fc_pinlocs regression_tests/vtr_reg_strong_odin/strong_depop regression_tests/vtr_reg_strong_odin/strong_detailed_timing +regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires regression_tests/vtr_reg_strong_odin/strong_eblif_vpr regression_tests/vtr_reg_strong_odin/strong_eblif_vpr_write regression_tests/vtr_reg_strong_odin/strong_echo_files From 4cea89ff944810eacd0471b6987696d1ef5ecf04 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 13:22:33 -0400 Subject: [PATCH 011/146] update the tag within wire segments --- doc/src/arch/reference.rst | 2 ++ 1 file changed, 2 insertions(+) diff --git a/doc/src/arch/reference.rst b/doc/src/arch/reference.rst index 8e1cc975e75..e1ba9e6726d 100644 --- a/doc/src/arch/reference.rst +++ b/doc/src/arch/reference.rst @@ -2031,6 +2031,8 @@ The ```` tag and its contents are described below. .. arch:tag:: :req_param name: Name of the mux switch type used to drive this type of segment by default, from both block outputs and other wires. This information is used during rr-graph construction, and a custom switch block can override this switch type for specific connections if desired. + The switch type specified with the tag will be used for both the incrementing and decrementing wires within this segment. + If more control is needed, the mux_inc and mux_dec tags can be used to assign different muxes to drive incremental and decremental wires within the segment. .. note:: For UNIDIRECTIONAL only. From 4d2affa84d36a61f64f987226c97970088270eb3 Mon Sep 17 00:00:00 2001 From: saaramahmoudi Date: Thu, 18 Jul 2024 13:29:55 -0400 Subject: [PATCH 012/146] initialize the dec muxes to -1 to avoid any random values if not specified --- libs/libarchfpga/src/physical_types.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libs/libarchfpga/src/physical_types.h b/libs/libarchfpga/src/physical_types.h index 47c197690c9..2bd65530b94 100644 --- a/libs/libarchfpga/src/physical_types.h +++ b/libs/libarchfpga/src/physical_types.h @@ -1606,8 +1606,8 @@ struct t_segment_inf { int length; short arch_wire_switch; short arch_opin_switch; - short arch_wire_switch_dec; - short arch_opin_switch_dec; + short arch_wire_switch_dec = -1; + short arch_opin_switch_dec = -1; short arch_opin_between_dice_switch = -1; float frac_cb; float frac_sb; From 476d5b683ed1aea4d75616757abdfd7883312080 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 12:51:43 -0400 Subject: [PATCH 013/146] add t_swap_stats --- vpr/src/place/move_utils.h | 12 ++++ vpr/src/place/noc_place_utils.cpp | 11 ++- vpr/src/place/place.cpp | 108 +++++++++++++----------------- 3 files changed, 70 insertions(+), 61 deletions(-) diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index ce599492358..17cb926c558 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -87,6 +87,18 @@ struct t_range_limiters { float dm_rlim; }; +/** + * These variables keep track of the number of swaps + * rejected, accepted or aborted. The total number of swap attempts + * is the sum of the three number. + */ +struct t_swap_stats { + int num_swap_rejected = 0; + int num_swap_accepted = 0; + int num_swap_aborted = 0; + int num_ts_called = 0; +}; + //Records a reasons for an aborted move void log_move_abort(std::string_view reason); diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index 0b9e274b85b..0d1ee5797df 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -657,7 +657,16 @@ double calculate_noc_cost(const NocCostTerms& cost_terms, * is computed. Weighting factors determine the contribution of each * normalized term to the sum. */ - cost = noc_opts.noc_placement_weighting * (cost_terms.aggregate_bandwidth * norm_factors.aggregate_bandwidth * noc_opts.noc_aggregate_bandwidth_weighting + cost_terms.latency * norm_factors.latency * noc_opts.noc_latency_weighting + cost_terms.latency_overrun * norm_factors.latency_overrun * noc_opts.noc_latency_constraints_weighting + cost_terms.congestion * norm_factors.congestion * noc_opts.noc_congestion_weighting); + // clang-format off + cost = + noc_opts.noc_placement_weighting * + ( + cost_terms.aggregate_bandwidth * norm_factors.aggregate_bandwidth * noc_opts.noc_aggregate_bandwidth_weighting + + cost_terms.latency * norm_factors.latency * noc_opts.noc_latency_weighting + + cost_terms.latency_overrun * norm_factors.latency_overrun * noc_opts.noc_latency_constraints_weighting + + cost_terms.congestion * norm_factors.congestion * noc_opts.noc_congestion_weighting + ); + // clang-format on return cost; } diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 4b18d01bcf6..c0553d96592 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -98,13 +98,6 @@ constexpr float INVALID_COST = std::numeric_limits::quiet_NaN(); /********************** Variables local to place.c ***************************/ -/* These file-scoped variables keep track of the number of swaps * - * rejected, accepted or aborted. The total number of swap attempts * - * is the sum of the three number. */ -static int num_swap_rejected = 0; -static int num_swap_accepted = 0; -static int num_swap_aborted = 0; -static int num_ts_called = 0; std::unique_ptr f_move_stats_file(nullptr, vtr::fclose); @@ -221,7 +214,8 @@ static e_move_result try_swap(const t_annealing_state* state, MoveTypeStat& move_type_stat, const t_place_algorithm& place_algorithm, float timing_bb_factor, - bool manual_move_enabled); + bool manual_move_enabled, + t_swap_stats& swap_stats); static void check_place(const t_placer_costs& costs, const PlaceDelayModel* delay_model, @@ -251,7 +245,8 @@ static float starting_t(const t_annealing_state* state, t_pl_blocks_to_be_moved& blocks_affected, const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, - MoveTypeStat& move_type_stat); + MoveTypeStat& move_type_stat, + t_swap_stats& swap_stats); static int count_connections(); @@ -303,7 +298,8 @@ static void placement_inner_loop(const t_annealing_state* state, SetupTimingInfo* timing_info, const t_place_algorithm& place_algorithm, MoveTypeStat& move_type_stat, - float timing_bb_factor); + float timing_bb_factor, + t_swap_stats& swap_stats); static void generate_post_place_timing_reports(const t_placer_opts& placer_opts, const t_analysis_opts& analysis_opts, @@ -333,7 +329,7 @@ static void print_place_status(const t_annealing_state& state, static void print_resources_utilization(); -static void print_placement_swaps_stats(const t_annealing_state& state); +static void print_placement_swaps_stats(const t_annealing_state& state, const t_swap_stats& swap_stats); static void print_placement_move_types_stats(const MoveTypeStat& move_type_stat); @@ -392,22 +388,16 @@ void try_place(const Netlist<>& net_list, std::unique_ptr place_delay_model; std::unique_ptr move_generator; std::unique_ptr move_generator2; - std::unique_ptr manual_move_generator; + std::unique_ptr manual_move_generator = std::make_unique(); std::unique_ptr placer_setup_slacks; std::unique_ptr placer_criticalities; std::unique_ptr pin_timing_invalidator; - manual_move_generator = std::make_unique(); + t_pl_blocks_to_be_moved blocks_affected(net_list.blocks().size()); - t_pl_blocks_to_be_moved blocks_affected( - net_list.blocks().size()); - - /* init file scope variables */ - num_swap_rejected = 0; - num_swap_accepted = 0; - num_swap_aborted = 0; - num_ts_called = 0; + // Swap statistics keep record of the number accepted/rejected/aborted swaps. + t_swap_stats swap_stats; if (placer_opts.place_algorithm.is_timing_driven()) { /*do this before the initial placement to avoid messing up the initial placement */ @@ -435,9 +425,7 @@ void try_place(const Netlist<>& net_list, VTR_LOG("Bounding box mode is %s\n", (cube_bb ? "Cube" : "Per-layer")); VTR_LOG("\n"); - int move_lim = 1; - move_lim = (int)(annealing_sched.inner_num - * pow(net_list.blocks().size(), 1.3333)); + int move_lim = (int)(annealing_sched.inner_num * pow(net_list.blocks().size(), 1.3333)); alloc_and_load_placement_structs(placer_opts.place_cost_exp, placer_opts, noc_opts, directs, num_directs); @@ -447,9 +435,7 @@ void try_place(const Netlist<>& net_list, normalize_noc_cost_weighting_factor(const_cast(noc_opts)); } - initial_placement(placer_opts, - placer_opts.constraints_file.c_str(), - noc_opts); + initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts); //create the move generator based on the chosen strategy create_move_generators(move_generator, move_generator2, placer_opts, move_lim, noc_opts.noc_centroid_weight); @@ -714,7 +700,8 @@ void try_place(const Netlist<>& net_list, place_delay_model.get(), placer_criticalities.get(), placer_setup_slacks.get(), timing_info.get(), *move_generator, *manual_move_generator, pin_timing_invalidator.get(), - blocks_affected, placer_opts, noc_opts, move_type_stat); + blocks_affected, placer_opts, noc_opts, move_type_stat, + swap_stats); if (!placer_opts.move_stats_file.empty()) { f_move_stats_file = std::unique_ptr( @@ -785,7 +772,8 @@ void try_place(const Netlist<>& net_list, *current_move_generator, *manual_move_generator, blocks_affected, timing_info.get(), placer_opts.place_algorithm, move_type_stat, - timing_bb_factor); + timing_bb_factor, + swap_stats); //move the update used move_generator to its original variable update_move_generator(move_generator, move_generator2, agent_state, @@ -851,7 +839,8 @@ void try_place(const Netlist<>& net_list, *current_move_generator, *manual_move_generator, blocks_affected, timing_info.get(), placer_opts.place_quench_algorithm, move_type_stat, - timing_bb_factor); + timing_bb_factor, + swap_stats); //move the update used move_generator to its original variable update_move_generator(move_generator, move_generator2, agent_state, @@ -920,7 +909,7 @@ void try_place(const Netlist<>& net_list, //Some stats VTR_LOG("\n"); - VTR_LOG("Swaps called: %d\n", num_ts_called); + VTR_LOG("Swaps called: %d\n", swap_stats.num_ts_called); report_aborted_moves(); if (placer_opts.place_algorithm.is_timing_driven()) { @@ -973,7 +962,7 @@ void try_place(const Netlist<>& net_list, // Print out swap statistics print_resources_utilization(); - print_placement_swaps_stats(state); + print_placement_swaps_stats(state, swap_stats); print_placement_move_types_stats(move_type_stat); @@ -1054,33 +1043,31 @@ static void placement_inner_loop(const t_annealing_state* state, SetupTimingInfo* timing_info, const t_place_algorithm& place_algorithm, MoveTypeStat& move_type_stat, - float timing_bb_factor) { - int inner_crit_iter_count, inner_iter; - - int inner_placement_save_count = 0; //How many times have we dumped placement to a file this temperature? + float timing_bb_factor, + t_swap_stats& swap_stats) { + //How many times have we dumped placement to a file this temperature? + int inner_placement_save_count = 0; stats->reset(); - inner_crit_iter_count = 1; - bool manual_move_enabled = false; /* Inner loop begins */ - for (inner_iter = 0; inner_iter < state->move_lim; inner_iter++) { + for (int inner_iter = 0, inner_crit_iter_count = 1; inner_iter < state->move_lim; inner_iter++) { e_move_result swap_result = try_swap(state, costs, move_generator, manual_move_generator, timing_info, pin_timing_invalidator, blocks_affected, delay_model, criticalities, setup_slacks, placer_opts, noc_opts, move_type_stat, place_algorithm, - timing_bb_factor, manual_move_enabled); + timing_bb_factor, manual_move_enabled, swap_stats); if (swap_result == ACCEPTED) { /* Move was accepted. Update statistics that are useful for the annealing schedule. */ stats->single_swap_update(*costs); - num_swap_accepted++; + swap_stats.num_swap_accepted++; } else if (swap_result == ABORTED) { - num_swap_aborted++; + swap_stats.num_swap_aborted++; } else { // swap_result == REJECTED - num_swap_rejected++; + swap_stats.num_swap_rejected++; } if (place_algorithm.is_timing_driven()) { @@ -1169,7 +1156,8 @@ static float starting_t(const t_annealing_state* state, t_pl_blocks_to_be_moved& blocks_affected, const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, - MoveTypeStat& move_type_stat) { + MoveTypeStat& move_type_stat, + t_swap_stats& swap_stats) { if (annealing_sched.type == USER_SCHED) { return (annealing_sched.init_t); } @@ -1202,17 +1190,17 @@ static float starting_t(const t_annealing_state* state, manual_move_generator, timing_info, pin_timing_invalidator, blocks_affected, delay_model, criticalities, setup_slacks, placer_opts, noc_opts, move_type_stat, placer_opts.place_algorithm, - REWARD_BB_TIMING_RELATIVE_WEIGHT, manual_move_enabled); + REWARD_BB_TIMING_RELATIVE_WEIGHT, manual_move_enabled, swap_stats); if (swap_result == ACCEPTED) { num_accepted++; av += costs->cost; sum_of_squares += costs->cost * costs->cost; - num_swap_accepted++; + swap_stats.num_swap_accepted++; } else if (swap_result == ABORTED) { - num_swap_aborted++; + swap_stats.num_swap_aborted++; } else { - num_swap_rejected++; + swap_stats.num_swap_rejected++; } } @@ -1271,7 +1259,8 @@ static e_move_result try_swap(const t_annealing_state* state, MoveTypeStat& move_type_stat, const t_place_algorithm& place_algorithm, float timing_bb_factor, - bool manual_move_enabled) { + bool manual_move_enabled, + t_swap_stats& swap_stats) { /* Picks some block and moves it to another spot. If this spot is * * occupied, switch the blocks. Assess the change in cost function. * * rlim is the range limiter. * @@ -1288,7 +1277,7 @@ static e_move_result try_swap(const t_annealing_state* state, // move type and block type chosen by the agent t_propose_action proposed_action{e_move_type::UNIFORM, -1}; - num_ts_called++; + swap_stats.num_ts_called++; MoveOutcomeStats move_outcome_stats; @@ -2308,7 +2297,7 @@ static void print_resources_utilization() { std::map> num_placed_instances; - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { auto block_loc = place_ctx.block_locs[blk_id]; auto loc = block_loc.loc; @@ -2336,24 +2325,23 @@ static void print_resources_utilization() { VTR_LOG("\n"); } -static void print_placement_swaps_stats(const t_annealing_state& state) { - size_t total_swap_attempts = num_swap_rejected + num_swap_accepted - + num_swap_aborted; +static void print_placement_swaps_stats(const t_annealing_state& state, const t_swap_stats& swap_stats) { + size_t total_swap_attempts = swap_stats.num_swap_rejected + swap_stats.num_swap_accepted + swap_stats.num_swap_aborted; VTR_ASSERT(total_swap_attempts > 0); size_t num_swap_print_digits = ceil(log10(total_swap_attempts)); - float reject_rate = (float)num_swap_rejected / total_swap_attempts; - float accept_rate = (float)num_swap_accepted / total_swap_attempts; - float abort_rate = (float)num_swap_aborted / total_swap_attempts; + float reject_rate = (float)swap_stats.num_swap_rejected / total_swap_attempts; + float accept_rate = (float)swap_stats.num_swap_accepted / total_swap_attempts; + float abort_rate = (float)swap_stats.num_swap_aborted / total_swap_attempts; VTR_LOG("Placement number of temperatures: %d\n", state.num_temps); VTR_LOG("Placement total # of swap attempts: %*d\n", num_swap_print_digits, total_swap_attempts); VTR_LOG("\tSwaps accepted: %*d (%4.1f %%)\n", num_swap_print_digits, - num_swap_accepted, 100 * accept_rate); + swap_stats.num_swap_accepted, 100 * accept_rate); VTR_LOG("\tSwaps rejected: %*d (%4.1f %%)\n", num_swap_print_digits, - num_swap_rejected, 100 * reject_rate); + swap_stats.num_swap_rejected, 100 * reject_rate); VTR_LOG("\tSwaps aborted: %*d (%4.1f %%)\n", num_swap_print_digits, - num_swap_aborted, 100 * abort_rate); + swap_stats.num_swap_aborted, 100 * abort_rate); } static void print_placement_move_types_stats(const MoveTypeStat& move_type_stat) { From 4862a91cc94721a1ebeadbf621b51613d81543ba Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 13:01:21 -0400 Subject: [PATCH 014/146] changed the signitaure of create_move_generators() --- vpr/src/place/RL_agent_util.cpp | 41 ++++++++++++++++++--------------- vpr/src/place/RL_agent_util.h | 8 +++---- vpr/src/place/place.cpp | 4 +--- 3 files changed, 26 insertions(+), 27 deletions(-) diff --git a/vpr/src/place/RL_agent_util.cpp b/vpr/src/place/RL_agent_util.cpp index aa149b5d4e4..9ac7f6b9553 100644 --- a/vpr/src/place/RL_agent_util.cpp +++ b/vpr/src/place/RL_agent_util.cpp @@ -2,11 +2,12 @@ #include "static_move_generator.h" #include "manual_move_generator.h" -void create_move_generators(std::unique_ptr& move_generator, - std::unique_ptr& move_generator2, - const t_placer_opts& placer_opts, - int move_lim, - float noc_attraction_weight) { +std::pair, std::unique_ptr> create_move_generators(const t_placer_opts& placer_opts, + int move_lim, + double noc_attraction_weight) { + + std::pair, std::unique_ptr> move_generators; + if (!placer_opts.RL_agent_placement) { // RL agent is disabled auto move_types = placer_opts.place_static_move_prob; move_types.resize((int)e_move_type::NUMBER_OF_AUTO_MOVES, 0.0f); @@ -18,8 +19,8 @@ void create_move_generators(std::unique_ptr& move_generator, move_name.c_str(), placer_opts.place_static_move_prob[move_type]); } - move_generator = std::make_unique(placer_opts.place_static_move_prob); - move_generator2 = std::make_unique(placer_opts.place_static_move_prob); + move_generators.first = std::make_unique(placer_opts.place_static_move_prob); + move_generators.second = std::make_unique(placer_opts.place_static_move_prob); } else { //RL based placement /* For the non timing driven placement: the agent has a single state * * - Available moves are (Uniform / Median / Centroid) * @@ -71,17 +72,17 @@ void create_move_generators(std::unique_ptr& move_generator, placer_opts.place_agent_epsilon); } karmed_bandit_agent1->set_step(placer_opts.place_agent_gamma, move_lim); - move_generator = std::make_unique(karmed_bandit_agent1, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.first = std::make_unique(karmed_bandit_agent1, + noc_attraction_weight, + placer_opts.place_high_fanout_net); //agent's 2nd state karmed_bandit_agent2 = std::make_unique(second_state_avail_moves, e_agent_space::MOVE_TYPE, placer_opts.place_agent_epsilon); karmed_bandit_agent2->set_step(placer_opts.place_agent_gamma, move_lim); - move_generator2 = std::make_unique(karmed_bandit_agent2, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.second = std::make_unique(karmed_bandit_agent2, + noc_attraction_weight, + placer_opts.place_high_fanout_net); } else { std::unique_ptr karmed_bandit_agent1, karmed_bandit_agent2; //agent's 1st state @@ -95,18 +96,20 @@ void create_move_generators(std::unique_ptr& move_generator, e_agent_space::MOVE_TYPE); } karmed_bandit_agent1->set_step(placer_opts.place_agent_gamma, move_lim); - move_generator = std::make_unique(karmed_bandit_agent1, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.first = std::make_unique(karmed_bandit_agent1, + noc_attraction_weight, + placer_opts.place_high_fanout_net); //agent's 2nd state karmed_bandit_agent2 = std::make_unique(second_state_avail_moves, e_agent_space::MOVE_TYPE); karmed_bandit_agent2->set_step(placer_opts.place_agent_gamma, move_lim); - move_generator2 = std::make_unique(karmed_bandit_agent2, - noc_attraction_weight, - placer_opts.place_high_fanout_net); + move_generators.second = std::make_unique(karmed_bandit_agent2, + noc_attraction_weight, + placer_opts.place_high_fanout_net); } } + + return move_generators; } void assign_current_move_generator(std::unique_ptr& move_generator, diff --git a/vpr/src/place/RL_agent_util.h b/vpr/src/place/RL_agent_util.h index b50e2caed42..fd104ecfcd8 100644 --- a/vpr/src/place/RL_agent_util.h +++ b/vpr/src/place/RL_agent_util.h @@ -17,11 +17,9 @@ enum class e_agent_state { * It returns a unique pointer for each move generator in move_generator and move_generator2 * move_lim: represents the num of moves per temp. */ -void create_move_generators(std::unique_ptr& move_generator, - std::unique_ptr& move_generator2, - const t_placer_opts& placer_opts, - int move_lim, - float noc_attraction_weight); +std::pair, std::unique_ptr> create_move_generators(const t_placer_opts& placer_opts, + int move_lim, + double noc_attraction_weight); /** * @brief copy one of the available move_generators to be the current move_generator that would be used in the placement based on the placer_options and the agent state diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index c0553d96592..9163c56092e 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -386,8 +386,6 @@ void try_place(const Netlist<>& net_list, std::shared_ptr timing_info; std::shared_ptr placement_delay_calc; std::unique_ptr place_delay_model; - std::unique_ptr move_generator; - std::unique_ptr move_generator2; std::unique_ptr manual_move_generator = std::make_unique(); std::unique_ptr placer_setup_slacks; @@ -438,7 +436,7 @@ void try_place(const Netlist<>& net_list, initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts); //create the move generator based on the chosen strategy - create_move_generators(move_generator, move_generator2, placer_opts, move_lim, noc_opts.noc_centroid_weight); + auto [move_generator, move_generator2] = create_move_generators(placer_opts, move_lim, noc_opts.noc_centroid_weight); if (!placer_opts.write_initial_place_file.empty()) { print_place(nullptr, From 6d54b143a6d8615f8a21dc0427496c5126bb4e49 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 14:49:00 -0400 Subject: [PATCH 015/146] don't access global place context in get_coordinate_of_pin() --- vpr/src/place/directed_moves_util.cpp | 22 ++++++------ vpr/src/place/directed_moves_util.h | 2 +- vpr/src/place/initial_placement.cpp | 8 ++--- vpr/src/place/place.cpp | 51 ++++++++++----------------- 4 files changed, 34 insertions(+), 49 deletions(-) diff --git a/vpr/src/place/directed_moves_util.cpp b/vpr/src/place/directed_moves_util.cpp index 7cfdab8e16c..2a543ce5441 100644 --- a/vpr/src/place/directed_moves_util.cpp +++ b/vpr/src/place/directed_moves_util.cpp @@ -2,21 +2,23 @@ #include "directed_moves_util.h" #include "centroid_move_generator.h" -void get_coordinate_of_pin(ClusterPinId pin, t_physical_tile_loc& tile_loc) { +t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; - auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); int pnum = tile_pin_index(pin); ClusterBlockId block = cluster_ctx.clb_nlist.pin_block(pin); - tile_loc.x = place_ctx.block_locs[block].loc.x + physical_tile_type(block)->pin_width_offset[pnum]; - tile_loc.y = place_ctx.block_locs[block].loc.y + physical_tile_type(block)->pin_height_offset[pnum]; - tile_loc.layer_num = place_ctx.block_locs[block].loc.layer; + t_physical_tile_loc tile_loc; + tile_loc.x = block_locs[block].loc.x + physical_tile_type(block)->pin_width_offset[pnum]; + tile_loc.y = block_locs[block].loc.y + physical_tile_type(block)->pin_height_offset[pnum]; + tile_loc.layer_num = block_locs[block].loc.layer; tile_loc.x = std::max(std::min(tile_loc.x, (int)grid.width() - 2), 1); //-2 for no perim channels tile_loc.y = std::max(std::min(tile_loc.y, (int)grid.height() - 2), 1); //-2 for no perim channels + + return tile_loc; } void calculate_centroid_loc(ClusterBlockId b_from, @@ -28,8 +30,6 @@ void calculate_centroid_loc(ClusterBlockId b_from, auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); - t_physical_tile_loc tile_loc; - int ipin; float acc_weight = 0; float acc_x = 0; float acc_y = 0; @@ -68,14 +68,14 @@ void calculate_centroid_loc(ClusterBlockId b_from, * This case rarely happens but causes QoR degradation */ if (pin_id == sink_pin_id) continue; - ipin = cluster_ctx.clb_nlist.pin_net_index(sink_pin_id); + int ipin = cluster_ctx.clb_nlist.pin_net_index(sink_pin_id); if (timing_weights) { weight = criticalities->criticality(net_id, ipin); } else { weight = 1; } - get_coordinate_of_pin(sink_pin_id, tile_loc); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, place_ctx.block_locs); acc_x += tile_loc.x * weight; acc_y += tile_loc.y * weight; @@ -86,7 +86,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, //else the pin is sink --> only care about its driver else { - ipin = cluster_ctx.clb_nlist.pin_net_index(pin_id); + int ipin = cluster_ctx.clb_nlist.pin_net_index(pin_id); if (timing_weights) { weight = criticalities->criticality(net_id, ipin); } else { @@ -95,7 +95,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, ClusterPinId source_pin = cluster_ctx.clb_nlist.net_driver(net_id); - get_coordinate_of_pin(source_pin, tile_loc); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, place_ctx.block_locs); acc_x += tile_loc.x * weight; acc_y += tile_loc.y * weight; diff --git a/vpr/src/place/directed_moves_util.h b/vpr/src/place/directed_moves_util.h index dc2f07c4643..89c61f72e16 100644 --- a/vpr/src/place/directed_moves_util.h +++ b/vpr/src/place/directed_moves_util.h @@ -17,7 +17,7 @@ enum e_reward_function { e_reward_function string_to_reward(const std::string& st); ///@brief Helper function that returns the x, y coordinates of a pin -void get_coordinate_of_pin(ClusterPinId pin, t_physical_tile_loc& tile_loc); +t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const vtr::vector_map& block_locs); /** * @brief Calculates the exact centroid location diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 2b4f9bfdf4f..c82d27b0dfc 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -360,8 +360,8 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, t_pl_loc& centroid) { auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& place_ctx = g_vpr_ctx.placement(); - t_physical_tile_loc tile_loc; float acc_weight = 0; float acc_x = 0; float acc_y = 0; @@ -399,7 +399,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) { continue; } - for (auto sink_pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId sink_pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { /* Ignore if one of the sinks is the block itself*/ if (pin_id == sink_pin_id) continue; @@ -410,7 +410,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, continue; } - get_coordinate_of_pin(sink_pin_id, tile_loc); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, place_ctx.block_locs); if (find_layer) { VTR_ASSERT(tile_loc.layer_num != OPEN); layer_count[tile_loc.layer_num]++; @@ -430,7 +430,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, continue; } - get_coordinate_of_pin(source_pin, tile_loc); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, place_ctx.block_locs); if (find_layer) { VTR_ASSERT(tile_loc.layer_num != OPEN); layer_count[tile_loc.layer_num]++; diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 9163c56092e..38b95c5aa31 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -367,10 +367,9 @@ void try_place(const Netlist<>& net_list, auto& timing_ctx = g_vpr_ctx.timing(); auto pre_place_timing_stats = timing_ctx.stats; - int tot_iter, moves_since_cost_recompute, num_connections, - outer_crit_iter_count, inner_recompute_limit; - float first_crit_exponent, first_rlim, first_t; - int first_move_lim; + int tot_iter, moves_since_cost_recompute, num_connections, outer_crit_iter_count; + float first_crit_exponent; + t_placer_costs costs(placer_opts.place_algorithm); @@ -388,7 +387,6 @@ void try_place(const Netlist<>& net_list, std::unique_ptr place_delay_model; std::unique_ptr manual_move_generator = std::make_unique(); std::unique_ptr placer_setup_slacks; - std::unique_ptr placer_criticalities; std::unique_ptr pin_timing_invalidator; @@ -458,7 +456,7 @@ void try_place(const Netlist<>& net_list, #endif /* ENABLE_ANALYTIC_PLACE */ // Update physical pin values - for (auto block_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { place_sync_external_block_connections(block_id); } @@ -468,8 +466,7 @@ void try_place(const Netlist<>& net_list, /* Allocated here because it goes into timing critical code where each memory allocation is expensive */ IntraLbPbPinLookup pb_gpin_lookup(device_ctx.logical_block_types); //Enables fast look-up of atom pins connect to CLB pins - ClusteredPinAtomPinsLookup netlist_pin_lookup(cluster_ctx.clb_nlist, - atom_ctx.nlist, pb_gpin_lookup); + ClusteredPinAtomPinsLookup netlist_pin_lookup(cluster_ctx.clb_nlist, atom_ctx.nlist, pb_gpin_lookup); /* Gets initial cost and loads bounding boxes. */ @@ -500,19 +497,15 @@ void try_place(const Netlist<>& net_list, atom_ctx.lookup, p_timing_ctx.connection_delay, is_flat); - placement_delay_calc->set_tsu_margin_relative( - placer_opts.tsu_rel_margin); - placement_delay_calc->set_tsu_margin_absolute( - placer_opts.tsu_abs_margin); + placement_delay_calc->set_tsu_margin_relative(placer_opts.tsu_rel_margin); + placement_delay_calc->set_tsu_margin_absolute(placer_opts.tsu_abs_margin); timing_info = make_setup_timing_info(placement_delay_calc, placer_opts.timing_update_type); - placer_setup_slacks = std::make_unique( - cluster_ctx.clb_nlist, netlist_pin_lookup); + placer_setup_slacks = std::make_unique(cluster_ctx.clb_nlist, netlist_pin_lookup); - placer_criticalities = std::make_unique( - cluster_ctx.clb_nlist, netlist_pin_lookup); + placer_criticalities = std::make_unique(cluster_ctx.clb_nlist, netlist_pin_lookup); pin_timing_invalidator = make_net_pin_timing_invalidator( placer_opts.timing_update_type, @@ -541,8 +534,8 @@ void try_place(const Netlist<>& net_list, *timing_ctx.graph, *timing_ctx.constraints, *placement_delay_calc, timing_info->analyzer()); - tatum::NodeId debug_tnode = id_or_pin_name_to_tnode( - analysis_opts.echo_dot_timing_graph_node); + tatum::NodeId debug_tnode = id_or_pin_name_to_tnode(analysis_opts.echo_dot_timing_graph_node); + write_setup_timing_graph_dot( getEchoFileName(E_ECHO_INITIAL_PLACEMENT_TIMING_GRAPH) + std::string(".dot"), @@ -616,8 +609,7 @@ void try_place(const Netlist<>& net_list, VTR_LOG("\n"); VTR_LOG("Initial placement estimated setup slack histogram:\n"); - print_histogram( - create_setup_slack_histogram(*timing_info->setup_analyzer())); + print_histogram(create_setup_slack_histogram(*timing_info->setup_analyzer())); } size_t num_macro_members = 0; @@ -644,12 +636,11 @@ void try_place(const Netlist<>& net_list, print_place(nullptr, nullptr, filename.c_str()); } - first_move_lim = get_initial_move_lim(placer_opts, annealing_sched); + int first_move_lim = get_initial_move_lim(placer_opts, annealing_sched); + int inner_recompute_limit; if (placer_opts.inner_loop_recompute_divider != 0) { - inner_recompute_limit = (int)(0.5 - + (float)first_move_lim - / (float)placer_opts.inner_loop_recompute_divider); + inner_recompute_limit = static_cast(0.5 + (float)first_move_lim / (float)placer_opts.inner_loop_recompute_divider); } else { /*don't do an inner recompute */ inner_recompute_limit = first_move_lim + 1; @@ -659,9 +650,7 @@ void try_place(const Netlist<>& net_list, * the commandline option quench_recompute_divider */ int quench_recompute_limit; if (placer_opts.quench_recompute_divider != 0) { - quench_recompute_limit = (int)(0.5 - + (float)move_lim - / (float)placer_opts.quench_recompute_divider); + quench_recompute_limit = static_cast(0.5 + (float)move_lim / (float)placer_opts.quench_recompute_divider); } else { /*don't do an quench recompute */ quench_recompute_limit = first_move_lim + 1; @@ -679,15 +668,11 @@ void try_place(const Netlist<>& net_list, move_type_stat.rejected_moves.resize({device_ctx.logical_block_types.size(), (int)e_move_type::NUMBER_OF_AUTO_MOVES}, 0); /* Get the first range limiter */ - first_rlim = (float)max(device_ctx.grid.width() - 1, - device_ctx.grid.height() - 1); + float first_rlim = (float)max(device_ctx.grid.width() - 1, device_ctx.grid.height() - 1); place_move_ctx.first_rlim = first_rlim; - /* Set the temperature low to ensure that initial placement quality will be preserved */ - first_t = EPSILON; - t_annealing_state state(annealing_sched, - first_t, + EPSILON, // Set the temperature low to ensure that initial placement quality will be preserved first_rlim, first_move_lim, first_crit_exponent, From 05f4eb94a7ba2485404445c49e5e3bb53f8859a5 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 15:19:30 -0400 Subject: [PATCH 016/146] remove place_ctx.block_locs from noc_place_utils --- vpr/src/place/initial_noc_placement.cpp | 3 +- vpr/src/place/noc_place_utils.cpp | 49 ++++++++++++------------- vpr/src/place/noc_place_utils.h | 12 ++++-- vpr/src/place/place.cpp | 41 ++++++++------------- vpr/src/place/place_util.cpp | 2 +- vpr/test/test_noc_place_utils.cpp | 4 +- 6 files changed, 51 insertions(+), 60 deletions(-) diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 2cf2bf3f1f3..ff8b9370575 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -219,11 +219,10 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts) { // Generate and evaluate router moves for (int i_move = 0; i_move < N_MOVES; i_move++) { - e_create_move create_move_outcome = e_create_move::ABORT; clear_move_blocks(blocks_affected); // Shrink the range limit over time float r_lim_decayed = 1.0f + (N_MOVES - i_move) * (max_r_lim / N_MOVES); - create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed); + e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, g_vpr_ctx.placement().block_locs); if (create_move_outcome != e_create_move::ABORT) { apply_move_blocks(blocks_affected); diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index 0d1ee5797df..b224f3bafac 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -44,7 +44,8 @@ static std::unordered_set affected_noc_links; */ static bool select_random_router_cluster(ClusterBlockId& b_from, t_pl_loc& from, - t_logical_block_type_ptr& cluster_from_type); + t_logical_block_type_ptr& cluster_from_type, + const vtr::vector_map& block_locs); /** * @brief Given two traffic flow routes, finds links that appear @@ -451,13 +452,12 @@ double comp_noc_congestion_cost() { return congestion_cost; } -int check_noc_placement_costs(const t_placer_costs& costs, double error_tolerance, const t_noc_opts& noc_opts) { +int check_noc_placement_costs(const t_placer_costs& costs, + double error_tolerance, + const t_noc_opts& noc_opts, + const vtr::vector_map& block_locs) { int error = 0; - NocCostTerms cost_check{0.0, 0.0, 0.0, 0.0}; - - // get current router block locations - auto& place_ctx = g_vpr_ctx.placement(); - const vtr::vector_map& placed_cluster_block_locations = place_ctx.block_locs; + NocCostTerms cost_check{0.0, 0.0, 0.0, 0.0};; auto& noc_ctx = g_vpr_ctx.noc(); const NocStorage& noc_model = noc_ctx.noc_model; @@ -485,8 +485,8 @@ int check_noc_placement_costs(const t_placer_costs& costs, double error_toleranc ClusterBlockId logical_sink_router_block_id = curr_traffic_flow.sink_router_cluster_id; // get the ids of the hard router blocks where the logical router cluster blocks have been placed - NocRouterId source_router_block_id = noc_model.get_router_at_grid_location(placed_cluster_block_locations[logical_source_router_block_id].loc); - NocRouterId sink_router_block_id = noc_model.get_router_at_grid_location(placed_cluster_block_locations[logical_sink_router_block_id].loc); + NocRouterId source_router_block_id = noc_model.get_router_at_grid_location(block_locs[logical_source_router_block_id].loc); + NocRouterId sink_router_block_id = noc_model.get_router_at_grid_location(block_locs[logical_sink_router_block_id].loc); // route the current traffic flow temp_noc_routing_algorithm->route_flow(source_router_block_id, sink_router_block_id, traffic_flow_id, temp_found_noc_route, noc_model); @@ -500,7 +500,7 @@ int check_noc_placement_costs(const t_placer_costs& costs, double error_toleranc cost_check.latency_overrun += curr_traffic_flow_latency_overrun_cost; // increase bandwidth utilization for the links that constitute the current flow's route - for (auto& link_id : temp_found_noc_route) { + for (NocLinkId link_id : temp_found_noc_route) { auto& link = temp_noc_link_storage[link_id]; double curr_link_bw_util = link.get_bandwidth_usage(); link.set_bandwidth_usage(curr_link_bw_util + curr_traffic_flow.traffic_flow_bandwidth); @@ -789,12 +789,12 @@ bool check_for_router_swap(int user_supplied_noc_router_swap_percentage) { return (vtr::irand(99) < user_supplied_noc_router_swap_percentage); } -static bool select_random_router_cluster(ClusterBlockId& b_from, t_pl_loc& from, t_logical_block_type_ptr& cluster_from_type) { +static bool select_random_router_cluster(ClusterBlockId& b_from, + t_pl_loc& from, + t_logical_block_type_ptr& cluster_from_type, + const vtr::vector_map& block_locs) { // need to access all the router cluster blocks in the design auto& noc_ctx = g_vpr_ctx.noc(); - // - auto& place_ctx = g_vpr_ctx.placement(); - // auto& cluster_ctx = g_vpr_ctx.clustering(); // get a reference to the collection of router cluster blocks in the design @@ -812,11 +812,11 @@ static bool select_random_router_cluster(ClusterBlockId& b_from, t_pl_loc& from, b_from = router_clusters[random_cluster_block_index]; //check if the block is movable - if (place_ctx.block_locs[b_from].is_fixed) { + if (block_locs[b_from].is_fixed) { return false; } - from = place_ctx.block_locs[b_from].loc; + from = block_locs[b_from].loc; cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); @@ -824,17 +824,18 @@ static bool select_random_router_cluster(ClusterBlockId& b_from, t_pl_loc& from, return true; } -e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, float rlim) { +e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, + float rlim, + const vtr::vector_map& block_locs) { // block ID for the randomly selected router cluster ClusterBlockId b_from; // current location of the randomly selected router cluster t_pl_loc from; // logical block type of the randomly selected router cluster t_logical_block_type_ptr cluster_from_type; - bool random_select_success = false; // Randomly select a router cluster - random_select_success = select_random_router_cluster(b_from, from, cluster_from_type); + bool random_select_success = select_random_router_cluster(b_from, from, cluster_from_type, block_locs); // If a random router cluster could not be selected, no move can be proposed if (!random_select_success) { @@ -858,11 +859,10 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, floa return create_move; } -void write_noc_placement_file(const std::string& file_name) { +void write_noc_placement_file(const std::string& file_name, + const vtr::vector_map& block_locs) { // we need the clustered netlist to get the names of all the NoC router cluster blocks auto& cluster_ctx = g_vpr_ctx.clustering(); - // we need to the placement context to determine the final placed locations of the NoC router cluster blocks - auto& placement_ctx = g_vpr_ctx.placement(); // we need the NoC context to identify the physical router ids based on their locations on the device auto& noc_ctx = g_vpr_ctx.noc(); @@ -888,9 +888,6 @@ void write_noc_placement_file(const std::string& file_name) { // get a reference to the clustered netlist const ClusteredNetlist& cluster_block_netlist = cluster_ctx.clb_nlist; - // get a reference to the clustered block placement locations - const vtr::vector_map& clustered_block_placed_locations = placement_ctx.block_locs; - // go through all the cluster blocks and write out their information in the placement file for (const auto& single_cluster_id : router_clusters) { // check if the current cluster id is valid @@ -903,7 +900,7 @@ void write_noc_placement_file(const std::string& file_name) { const std::string& cluster_name = cluster_block_netlist.block_name(single_cluster_id); //get the placement location of the current router cluster block - const t_block_loc& cluster_location = clustered_block_placed_locations[single_cluster_id]; + const t_block_loc& cluster_location = block_locs[single_cluster_id]; // now get the corresponding physical router block id the cluster is located on NocRouterId physical_router_cluster_is_placed_on = noc_model.get_router_at_grid_location(cluster_location.loc); diff --git a/vpr/src/place/noc_place_utils.h b/vpr/src/place/noc_place_utils.h index a0e675ea7d7..d5067d7911a 100644 --- a/vpr/src/place/noc_place_utils.h +++ b/vpr/src/place/noc_place_utils.h @@ -356,7 +356,10 @@ double comp_noc_congestion_cost(); * a non-zero values indicates the current NoC costs are above the error * tolerance. */ -int check_noc_placement_costs(const t_placer_costs& costs, double error_tolerance, const t_noc_opts& noc_opts); +int check_noc_placement_costs(const t_placer_costs& costs, + double error_tolerance, + const t_noc_opts& noc_opts, + const vtr::vector_map& block_locs); /** * @brief Determines the aggregate bandwidth cost of a routed traffic flow. @@ -526,7 +529,9 @@ bool check_for_router_swap(int user_supplied_noc_router_swap_percentage); * cluster block can travel (this is within the compressed block space) * @return e_create_move Result of proposing the move */ -e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, float rlim); +e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, + float rlim, + const vtr::vector_map& block_locs); /** * @brief Writes out the locations of the router cluster blocks in the @@ -544,7 +549,8 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, floa * information. * */ -void write_noc_placement_file(const std::string& file_name); +void write_noc_placement_file(const std::string& file_name, + const vtr::vector_map& block_locs); /** * @brief This function checks whether the routing configuration for NoC traffic flows diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 38b95c5aa31..5bc1683e834 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -950,7 +950,7 @@ void try_place(const Netlist<>& net_list, print_placement_move_types_stats(move_type_stat); if (noc_opts.noc) { - write_noc_placement_file(noc_opts.noc_placement_file_name); + write_noc_placement_file(noc_opts.noc_placement_file_name, g_vpr_ctx.placement().block_locs); } free_placement_structs(placer_opts, noc_opts); @@ -1298,7 +1298,7 @@ static e_move_result try_swap(const t_annealing_state* state, #endif //NO_GRAPHICS } else if (router_block_move) { // generate a move where two random router blocks are swapped - create_move_outcome = propose_router_swap(blocks_affected, rlim); + create_move_outcome = propose_router_swap(blocks_affected, rlim, g_vpr_ctx.placement().block_locs); proposed_action.move_type = e_move_type::UNIFORM; } else { //Generate a new move (perturbation) used to explore the space of possible placements @@ -1809,15 +1809,10 @@ static void alloc_and_load_placement_structs(float place_cost_exp, const t_noc_opts& noc_opts, t_direct_inf* directs, int num_directs) { - int max_pins_per_clb; - unsigned int ipin; - const auto& device_ctx = g_vpr_ctx.device(); const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - const auto& cube_bb = place_ctx.cube_bb; - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); auto& place_move_ctx = g_placer_ctx.mutable_move(); @@ -1827,7 +1822,7 @@ static void alloc_and_load_placement_structs(float place_cost_exp, init_placement_context(); - max_pins_per_clb = 0; + int max_pins_per_clb = 0; for (const auto& type : device_ctx.physical_tile_types) { max_pins_per_clb = max(max_pins_per_clb, type.num_pins); } @@ -1851,8 +1846,7 @@ static void alloc_and_load_placement_structs(float place_cost_exp, p_timing_ctx.net_timing_cost.resize(num_nets, 0.); for (auto net_id : cluster_ctx.clb_nlist.nets()) { - for (ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); - ipin++) { + for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ipin++) { p_timing_ctx.connection_delay[net_id][ipin] = 0; p_timing_ctx.proposed_connection_delay[net_id][ipin] = INVALID_DELAY; @@ -1868,11 +1862,11 @@ static void alloc_and_load_placement_structs(float place_cost_exp, init_place_move_structs(num_nets); - if (cube_bb) { + if (place_ctx.cube_bb) { place_move_ctx.bb_coords.resize(num_nets, t_bb()); place_move_ctx.bb_num_on_edges.resize(num_nets, t_bb()); } else { - VTR_ASSERT_SAFE(!cube_bb); + VTR_ASSERT_SAFE(!place_ctx.cube_bb); place_move_ctx.layer_bb_num_on_edges.resize(num_nets, std::vector(num_layers, t_2D_bb())); place_move_ctx.layer_bb_coords.resize(num_nets, std::vector(num_layers, t_2D_bb())); } @@ -1885,7 +1879,7 @@ static void alloc_and_load_placement_structs(float place_cost_exp, alloc_and_load_chan_w_factors_for_place_cost (place_cost_exp); - alloc_and_load_try_swap_structs(cube_bb); + alloc_and_load_try_swap_structs(place_ctx.cube_bb); place_ctx.pl_macros = alloc_and_load_placement_macros(directs, num_directs); @@ -1972,7 +1966,7 @@ static void check_place(const t_placer_costs& costs, if (noc_opts.noc) { // check the NoC costs during placement if the user is using the NoC supported flow - error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts); + error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts, g_vpr_ctx.placement().block_locs); // make sure NoC routing configuration does not create any cycles in CDG error += (int)noc_routing_has_cycle(); } @@ -2127,11 +2121,10 @@ int check_macro_placement_consistency() { for (size_t imacro = 0; imacro < place_ctx.pl_macros.size(); imacro++) { auto head_iblk = pl_macros[imacro].members[0].blk_index; - for (size_t imember = 0; imember < pl_macros[imacro].members.size(); - imember++) { + for (size_t imember = 0; imember < pl_macros[imacro].members.size(); imember++) { auto member_iblk = pl_macros[imacro].members[imember].blk_index; - // Compute the suppossed member's x,y,z location + // Compute the supposed member's x,y,z location t_pl_loc member_pos = place_ctx.block_locs[head_iblk].loc + pl_macros[imacro].members[imember].offset; @@ -2144,8 +2137,7 @@ int check_macro_placement_consistency() { } // Then check the place_ctx.grid data structure - if (place_ctx.grid_blocks.block_at_location(member_pos) - != member_iblk) { + if (place_ctx.grid_blocks.block_at_location(member_pos) != member_iblk) { VTR_LOG_ERROR( "Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", size_t(member_iblk), imacro); @@ -2277,9 +2269,8 @@ static void print_resources_utilization() { //Record the resource requirement std::map num_type_instances; - std::map> - num_placed_instances; + std::map> num_placed_instances; + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { auto block_loc = place_ctx.block_locs[blk_id]; auto loc = block_loc.loc; @@ -2290,10 +2281,8 @@ static void print_resources_utilization() { num_type_instances[logical_block]++; num_placed_instances[logical_block][physical_tile]++; - max_block_name = std::max(max_block_name, - strlen(logical_block->name)); - max_tile_name = std::max(max_tile_name, - strlen(physical_tile->name)); + max_block_name = std::max(max_block_name, strlen(logical_block->name)); + max_tile_name = std::max(max_tile_name, strlen(physical_tile->name)); } VTR_LOG("\n"); diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 52b9fdeb3d1..0463b7ebdc8 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -21,7 +21,7 @@ void init_placement_context() { auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); - /* Intialize the lookup of CLB block positions */ + /* Initialize the lookup of CLB block positions */ place_ctx.block_locs.clear(); place_ctx.block_locs.resize(cluster_ctx.clb_nlist.blocks().size()); diff --git a/vpr/test/test_noc_place_utils.cpp b/vpr/test/test_noc_place_utils.cpp index 80023cf8b81..229d4afdf4c 100644 --- a/vpr/test/test_noc_place_utils.cpp +++ b/vpr/test/test_noc_place_utils.cpp @@ -1952,7 +1952,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { SECTION("Case where check place works after initial placement") { // run the test function - int error = check_noc_placement_costs(costs, error_tolerance, noc_opts); + int error = check_noc_placement_costs(costs, error_tolerance, noc_opts, place_ctx.block_locs); // we expect error to be 0 here, meaning the found costs are within the error tolerance of the noc golden costs REQUIRE(error == 0); @@ -1974,7 +1974,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { } // run the test function - int error = check_noc_placement_costs(costs, error_tolerance, noc_opts); + int error = check_noc_placement_costs(costs, error_tolerance, noc_opts, place_ctx.block_locs); // we expect error to be 4 here, meaning the found costs are not within the tolerance range REQUIRE(error == 4); From ba408fd4fe81e907b268f55a6cf6a826f4162eb1 Mon Sep 17 00:00:00 2001 From: sara_mahmoudi Date: Mon, 22 Jul 2024 13:02:12 -0700 Subject: [PATCH 017/146] Fixed a typo in task list --- vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt index 3fd9485c892..06cc6351f9c 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/task_list.txt @@ -20,7 +20,7 @@ regression_tests/vtr_reg_strong/strong_dedicated_clock regression_tests/vtr_reg_strong/strong_default_fc_pinlocs regression_tests/vtr_reg_strong/strong_depop regression_tests/vtr_reg_strong/strong_detailed_timing -regression_tests/vtr_reg_strong_odin/strong_diff_mux_for_inc_dec_wires +regression_tests/vtr_reg_strong/strong_diff_mux_for_inc_dec_wires regression_tests/vtr_reg_strong/strong_eblif_vpr regression_tests/vtr_reg_strong/strong_eblif_vpr_write regression_tests/vtr_reg_strong/strong_echo_files @@ -85,4 +85,4 @@ regression_tests/vtr_reg_strong/strong_timing_fail regression_tests/vtr_reg_strong/strong_timing_no_fail regression_tests/vtr_reg_strong/strong_noc regression_tests/vtr_reg_strong/strong_flat_router -regression_tests/vtr_reg_strong/strong_routing_constraints \ No newline at end of file +regression_tests/vtr_reg_strong/strong_routing_constraints From 8cf3b069eb68fd3bf7d9abf7c23b7fa20dfeae57 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 16:15:28 -0400 Subject: [PATCH 018/146] remove place_ctx.block_locs from initial placement --- vpr/src/base/read_place.cpp | 4 +- vpr/src/pack/re_cluster_util.cpp | 2 +- vpr/src/place/initial_noc_placement.cpp | 47 +++++--- vpr/src/place/initial_noc_placment.h | 5 +- vpr/src/place/initial_placement.cpp | 146 ++++++++++++++---------- vpr/src/place/initial_placement.h | 22 +++- vpr/src/place/noc_place_checkpoint.cpp | 14 +-- vpr/src/place/noc_place_checkpoint.h | 5 +- vpr/src/place/place.cpp | 2 +- vpr/src/place/place_constraints.cpp | 10 +- vpr/src/place/place_constraints.h | 2 +- vpr/src/place/place_util.cpp | 4 +- vpr/src/place/place_util.h | 7 +- 13 files changed, 158 insertions(+), 112 deletions(-) diff --git a/vpr/src/base/read_place.cpp b/vpr/src/base/read_place.cpp index f3374e89824..87dc0042e06 100644 --- a/vpr/src/base/read_place.cpp +++ b/vpr/src/base/read_place.cpp @@ -305,7 +305,7 @@ void read_place_body(std::ifstream& placement_file, loc.layer = block_layer; if (seen_blocks[blk_id] == 0) { - set_block_location(blk_id, loc); + set_block_location(blk_id, loc, place_ctx.block_locs); } //need to lock down blocks if it is a constraints file @@ -327,7 +327,7 @@ void read_place_body(std::ifstream& placement_file, //For place files, check that all blocks have been read //For constraints files, not all blocks need to be read if (is_place_file) { - for (auto block_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { if (seen_blocks[block_id] == 0) { VPR_THROW(VPR_ERROR_PLACE, "Block %d has not been read from the place file. \n", block_id); } diff --git a/vpr/src/pack/re_cluster_util.cpp b/vpr/src/pack/re_cluster_util.cpp index 1e23ec468b8..7993ba5cf83 100644 --- a/vpr/src/pack/re_cluster_util.cpp +++ b/vpr/src/pack/re_cluster_util.cpp @@ -85,7 +85,7 @@ void commit_mol_move(ClusterBlockId old_clb, g_vpr_ctx.mutable_placement().block_locs.resize(g_vpr_ctx.placement().block_locs.size() + 1); get_imacro_from_iblk(&imacro, old_clb, g_vpr_ctx.placement().pl_macros); set_imacro_for_iblk(&imacro, new_clb); - place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr); + place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr, g_vpr_ctx.mutable_placement().block_locs); } } diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index ff8b9370575..73a1d50056a 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -32,7 +32,8 @@ static bool accept_noc_swap(double delta_cost, double prob); * * @param router_blk_id NoC router cluster block ID */ -static void place_constrained_noc_router(ClusterBlockId router_blk_id); +static void place_constrained_noc_router(ClusterBlockId router_blk_id, + vtr::vector_map& block_locs); /** * @brief Randomly places unconstrained NoC routers. @@ -42,14 +43,16 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id); * @param seed Used for shuffling NoC routers. */ static void place_noc_routers_randomly(std::vector& unfixed_routers, - int seed); + int seed, + vtr::vector_map& block_locs); /** * @brief Runs a simulated annealing optimizer for NoC routers. * * @param noc_opts Contains weighting factors for NoC cost terms. */ -static void noc_routers_anneal(const t_noc_opts& noc_opts); +static void noc_routers_anneal(const t_noc_opts& noc_opts, + vtr::vector_map& block_locs); static bool accept_noc_swap(double delta_cost, double prob) { if (delta_cost <= 0.0) { @@ -68,7 +71,8 @@ static bool accept_noc_swap(double delta_cost, double prob) { } } -static void place_constrained_noc_router(ClusterBlockId router_blk_id) { +static void place_constrained_noc_router(ClusterBlockId router_blk_id, + vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& floorplanning_ctx = g_vpr_ctx.floorplanning(); @@ -84,11 +88,11 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id) { bool macro_placed = false; for (int i_try = 0; i_try < MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY && !macro_placed; i_try++) { - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE, block_locs); } if (!macro_placed) { - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE, block_locs); } if (!macro_placed) { @@ -96,7 +100,9 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id) { } } -static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed) { +static void place_noc_routers_randomly(std::vector& unfixed_routers, + int seed, + vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.placement(); auto& noc_ctx = g_vpr_ctx.noc(); auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -131,7 +137,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout // Iterate over shuffled physical routers to place logical routers // Since physical routers are shuffled, router placement would be random - for (const auto& phy_router : noc_phy_routers) { + for (const NocRouter& phy_router : noc_phy_routers) { t_physical_tile_loc router_phy_loc = phy_router.get_router_physical_location(); // Find a compatible sub-tile @@ -153,7 +159,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout t_pl_macro pl_macro; pl_macro.members.push_back(macro_member); - bool legal = try_place_macro(pl_macro, loc); + bool legal = try_place_macro(pl_macro, loc, block_locs); if (!legal) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Could not place a router cluster into an empty physical router."); } @@ -166,7 +172,8 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout } // end for of random router placement } -static void noc_routers_anneal(const t_noc_opts& noc_opts) { +static void noc_routers_anneal(const t_noc_opts& noc_opts, + vtr::vector_map& block_locs) { auto& noc_ctx = g_vpr_ctx.noc(); // Only NoC related costs are considered @@ -222,7 +229,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts) { clear_move_blocks(blocks_affected); // Shrink the range limit over time float r_lim_decayed = 1.0f + (N_MOVES - i_move) * (max_r_lim / N_MOVES); - e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, g_vpr_ctx.placement().block_locs); + e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, block_locs); if (create_move_outcome != e_create_move::ABORT) { apply_move_blocks(blocks_affected); @@ -241,7 +248,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts) { costs += noc_delta_c; // check if the current placement is better than the stored checkpoint if (costs.cost < checkpoint.get_cost() || !checkpoint.is_valid()) { - checkpoint.save_checkpoint(costs.cost); + checkpoint.save_checkpoint(costs.cost, block_locs); } } else { // The proposed move is rejected revert_move_blocks(blocks_affected); @@ -251,11 +258,13 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts) { } if (checkpoint.get_cost() < costs.cost) { - checkpoint.restore_checkpoint(costs); + checkpoint.restore_checkpoint(costs, block_locs); } } -void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts) { +void initial_noc_placement(const t_noc_opts& noc_opts, + const t_placer_opts& placer_opts, + vtr::vector_map& block_locs) { vtr::ScopedStartFinishTimer timer("Initial NoC Placement"); auto& noc_ctx = g_vpr_ctx.noc(); @@ -265,27 +274,27 @@ void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& plac std::vector unfixed_routers; // Check for floorplanning constraints and place constrained NoC routers - for (auto router_blk_id : router_blk_ids) { + for (ClusterBlockId router_blk_id : router_blk_ids) { // The block is fixed and was placed in mark_fixed_blocks() - if (is_block_placed((router_blk_id))) { + if (is_block_placed(router_blk_id, block_locs)) { continue; } if (is_cluster_constrained(router_blk_id)) { - place_constrained_noc_router(router_blk_id); + place_constrained_noc_router(router_blk_id, block_locs); } else { unfixed_routers.push_back(router_blk_id); } } // Place unconstrained NoC routers randomly - place_noc_routers_randomly(unfixed_routers, placer_opts.seed); + place_noc_routers_randomly(unfixed_routers, placer_opts.seed, block_locs); // populate internal data structures to maintain route, bandwidth usage, and latencies initial_noc_routing({}); // Run the simulated annealing optimizer for NoC routers - noc_routers_anneal(noc_opts); + noc_routers_anneal(noc_opts, block_locs); // check if there is any cycles bool has_cycle = noc_routing_has_cycle(); diff --git a/vpr/src/place/initial_noc_placment.h b/vpr/src/place/initial_noc_placment.h index 7727f15f6aa..e5d365ef036 100644 --- a/vpr/src/place/initial_noc_placment.h +++ b/vpr/src/place/initial_noc_placment.h @@ -3,6 +3,7 @@ #define VTR_INITIAL_NOC_PLACMENT_H #include "vpr_types.h" +#include "vtr_vector_map.h" /** * @brief Randomly places NoC routers, then runs a quick simulated annealing @@ -10,6 +11,8 @@ * * @param noc_opts NoC-related options. Used to calculate NoC-related costs. */ -void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts); +void initial_noc_placement(const t_noc_opts& noc_opts, + const t_placer_opts& placer_opts, + vtr::vector_map& block_locs); #endif //VTR_INITIAL_NOC_PLACMENT_H diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index c82d27b0dfc..c8437e06ac1 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -68,7 +68,8 @@ static bool place_macro(int macros_max_num_tries, const t_pl_macro& pl_macro, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - vtr::vector& block_scores); + vtr::vector& block_scores, + vtr::vector_map& block_locs); /* * Assign scores to each block based on macro size and floorplanning constraints. @@ -129,7 +130,10 @@ static std::vector init_blk_types_empty_locations( * @param loc The location at which the head of the macro is placed. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. */ -static inline void fix_IO_block_types(const t_pl_macro& pl_macro, t_pl_loc loc, enum e_pad_loc_type pad_loc_type); +static inline void fix_IO_block_types(const t_pl_macro& pl_macro, + t_pl_loc loc, + enum e_pad_loc_type pad_loc_type, + vtr::vector_map& block_locs); /** * @brief Determine whether a specific macro can be placed in a specific location. @@ -153,7 +157,9 @@ static bool is_loc_legal(const t_pl_loc& loc, * * @return a vector of blocks that are connected to this block but not yet placed so their scores can later be updated. */ -static std::vector find_centroid_loc(const t_pl_macro& pl_macro, t_pl_loc& centroid); +static std::vector find_centroid_loc(const t_pl_macro& pl_macro, + t_pl_loc& centroid, + const vtr::vector_map& block_locs); /** * @brief Tries to find a nearest location to the centroid location if calculated centroid location is not legal or is occupied. @@ -182,7 +188,8 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - vtr::vector& block_scores); + vtr::vector& block_scores, + vtr::vector_map& block_locs); /** * @brief Looks for a valid placement location for macro in second iteration, tries to place as many macros as possible in one column @@ -201,7 +208,8 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - std::vector* blk_types_empty_locs_in_grid); + std::vector* blk_types_empty_locs_in_grid, + vtr::vector_map& ); /** * @brief Tries for MAX_INIT_PLACE_ATTEMPTS times to place all blocks considering their floorplanning constraints and the device size @@ -212,29 +220,30 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, - const char* constraints_file); + const char* constraints_file, + vtr::vector_map& block_locs); /** * @brief If any blocks remain unplaced after all initial placement iterations, this routine * throws an error indicating that initial placement can not be done with the current device size or * floorplanning constraints. */ -static void check_initial_placement_legality(); +static void check_initial_placement_legality(const vtr::vector_map& block_locs); /** * @brief Fills movable_blocks in global PlacementContext */ static void alloc_and_load_movable_blocks(); -static void check_initial_placement_legality() { +static void check_initial_placement_legality(const vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); int unplaced_blocks = 0; - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - if (place_ctx.block_locs[blk_id].loc.x == INVALID_X) { + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + if (block_locs[blk_id].loc.x == INVALID_X) { VTR_LOG("Block %s (# %d) of type %s could not be placed during initial placement iteration %d\n", cluster_ctx.clb_nlist.block_name(blk_id).c_str(), blk_id, @@ -252,7 +261,7 @@ static void check_initial_placement_legality() { } for (auto movable_blk_id : place_ctx.movable_blocks) { - if (place_ctx.block_locs[movable_blk_id].is_fixed) { + if (block_locs[movable_blk_id].is_fixed) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Fixed block was mistakenly marked as movable during initial placement.\n"); } } @@ -260,7 +269,7 @@ static void check_initial_placement_legality() { for (const auto& logical_block_type : device_ctx.logical_block_types) { const auto& movable_blocks_of_type = place_ctx.movable_blocks_per_type[logical_block_type.index]; for (const auto& movable_blk_id : movable_blocks_of_type) { - if (place_ctx.block_locs[movable_blk_id].is_fixed) { + if (block_locs[movable_blk_id].is_fixed) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Fixed block %d of logical type %s was mistakenly marked as movable during initial placement.\n", (size_t)movable_blk_id, logical_block_type.name); } @@ -274,10 +283,9 @@ static void check_initial_placement_legality() { } } -bool is_block_placed(ClusterBlockId blk_id) { - auto& place_ctx = g_vpr_ctx.placement(); - - return (place_ctx.block_locs[blk_id].loc.x != INVALID_X); +bool is_block_placed(ClusterBlockId blk_id, + const vtr::vector_map& block_locs) { + return (block_locs[blk_id].loc.x != INVALID_X); } static bool is_loc_legal(const t_pl_loc& loc, @@ -358,20 +366,20 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ return legal; } -static std::vector find_centroid_loc(const t_pl_macro& pl_macro, t_pl_loc& centroid) { +static std::vector find_centroid_loc(const t_pl_macro& pl_macro, + t_pl_loc& centroid, + const vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); float acc_weight = 0; float acc_x = 0; float acc_y = 0; - int head_layer_num = OPEN; bool find_layer = false; std::vector layer_count(g_vpr_ctx.device().grid.get_num_layers(), 0); ClusterBlockId head_blk = pl_macro.members.at(0).blk_index; // For now, we put the macro in the same layer as the head block - head_layer_num = g_vpr_ctx.placement().block_locs[head_blk].loc.layer; + int head_layer_num = block_locs[head_blk].loc.layer; // If block is placed, we use the layer of the block. Otherwise, the layer will be determined later if (head_layer_num == OPEN) { find_layer = true; @@ -404,13 +412,13 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, if (pin_id == sink_pin_id) continue; - if (!is_block_placed(cluster_ctx.clb_nlist.pin_block(sink_pin_id))) { + if (!is_block_placed(cluster_ctx.clb_nlist.pin_block(sink_pin_id), block_locs)) { //add unplaced block to connected_blocks_to_update vector to update its score later. connected_blocks_to_update.push_back(cluster_ctx.clb_nlist.pin_block(sink_pin_id)); continue; } - t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, place_ctx.block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, block_locs); if (find_layer) { VTR_ASSERT(tile_loc.layer_num != OPEN); layer_count[tile_loc.layer_num]++; @@ -424,13 +432,13 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, //else the pin is sink --> only care about its driver else { ClusterPinId source_pin = cluster_ctx.clb_nlist.net_driver(net_id); - if (!is_block_placed(cluster_ctx.clb_nlist.pin_block(source_pin))) { + if (!is_block_placed(cluster_ctx.clb_nlist.pin_block(source_pin), block_locs)) { //add unplaced block to connected_blocks_to_update vector to update its score later. connected_blocks_to_update.push_back(cluster_ctx.clb_nlist.pin_block(source_pin)); continue; } - t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, place_ctx.block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, block_locs); if (find_layer) { VTR_ASSERT(tile_loc.layer_num != OPEN); layer_count[tile_loc.layer_num]++; @@ -461,11 +469,12 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - vtr::vector& block_scores) { + vtr::vector& block_scores, + vtr::vector_map& block_locs) { t_pl_loc centroid_loc(OPEN, OPEN, OPEN, OPEN); std::vector unplaced_blocks_to_update_their_score; - unplaced_blocks_to_update_their_score = find_centroid_loc(pl_macro, centroid_loc); + unplaced_blocks_to_update_their_score = find_centroid_loc(pl_macro, centroid_loc, block_locs); //no suggestion was available for this block type if (!is_loc_on_chip({centroid_loc.x, centroid_loc.y, centroid_loc.layer})) { @@ -504,10 +513,10 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, bool legal; - legal = try_place_macro(pl_macro, centroid_loc); + legal = try_place_macro(pl_macro, centroid_loc, block_locs); if (legal) { - fix_IO_block_types(pl_macro, centroid_loc, pad_loc_type); + fix_IO_block_types(pl_macro, centroid_loc, pad_loc_type, block_locs); //after placing the current block, its connections' score must be updated. for (auto blk_id : unplaced_blocks_to_update_their_score) { @@ -605,15 +614,18 @@ static std::vector init_blk_types_empty_locations( return block_type_empty_locs; } -static inline void fix_IO_block_types(const t_pl_macro& pl_macro, t_pl_loc loc, enum e_pad_loc_type pad_loc_type) { +static inline void fix_IO_block_types(const t_pl_macro& pl_macro, + t_pl_loc loc, + enum e_pad_loc_type pad_loc_type, + vtr::vector_map& block_locs) { const auto& device_ctx = g_vpr_ctx.device(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); + //If the user marked the IO block pad_loc_type as RANDOM, that means it should be randomly //placed and then stay fixed to that location, which is why the macro members are marked as fixed. const auto& type = device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer}); if (is_io_type(type) && pad_loc_type == RANDOM) { for (const auto& pl_macro_member : pl_macro.members) { - place_ctx.block_locs[pl_macro_member.blk_index].is_fixed = true; + block_locs[pl_macro_member.blk_index].is_fixed = true; } } } @@ -621,7 +633,8 @@ static inline void fix_IO_block_types(const t_pl_macro& pl_macro, t_pl_loc loc, bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type) { + enum e_pad_loc_type pad_loc_type, + vtr::vector_map& block_locs) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; t_pl_loc loc; @@ -684,10 +697,10 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - legal = try_place_macro(pl_macro, loc); + legal = try_place_macro(pl_macro, loc, block_locs); if (legal) { - fix_IO_block_types(pl_macro, loc, pad_loc_type); + fix_IO_block_types(pl_macro, loc, pad_loc_type, block_locs); } return legal; @@ -696,7 +709,8 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type) { + enum e_pad_loc_type pad_loc_type, + vtr::vector_map& block_locs) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; auto& place_ctx = g_vpr_ctx.mutable_placement(); @@ -745,10 +759,10 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, to_loc.sub_tile = subtile; if (place_ctx.grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { - placed = try_place_macro(pl_macro, to_loc); + placed = try_place_macro(pl_macro, to_loc, block_locs); if (placed) { - fix_IO_block_types(pl_macro, to_loc, pad_loc_type); + fix_IO_block_types(pl_macro, to_loc, pad_loc_type, block_locs); } } } else { @@ -760,9 +774,9 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, for (int st = st_low; st <= st_high && !placed; st++) { to_loc.sub_tile = st; if (place_ctx.grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { - placed = try_place_macro(pl_macro, to_loc); + placed = try_place_macro(pl_macro, to_loc, block_locs); if (placed) { - fix_IO_block_types(pl_macro, to_loc, pad_loc_type); + fix_IO_block_types(pl_macro, to_loc, pad_loc_type, block_locs); } } } @@ -785,7 +799,8 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - std::vector* blk_types_empty_locs_in_grid) { + std::vector* blk_types_empty_locs_in_grid, + vtr::vector_map& block_locs) { t_pl_loc loc; int column_index = get_blk_type_first_loc(loc, pl_macro, blk_types_empty_locs_in_grid); @@ -801,11 +816,10 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - bool legal = false; - legal = try_place_macro(pl_macro, loc); + bool legal = try_place_macro(pl_macro, loc, block_locs); if (legal) { - fix_IO_block_types(pl_macro, loc, pad_loc_type); + fix_IO_block_types(pl_macro, loc, pad_loc_type, block_locs); } //Dense placement found a legal position for pl_macro; @@ -814,7 +828,9 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, return legal; } -bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos) { +bool try_place_macro(const t_pl_macro& pl_macro, + t_pl_loc head_pos, + vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.mutable_placement(); VTR_LOGV_DEBUG(place_ctx.f_placer_debug, "\t\t\t\tTry to place the macro at %dx%dx%dx%d\n", @@ -841,7 +857,7 @@ bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos) { ClusterBlockId iblk = pl_macro_member.blk_index; - set_block_location(iblk, member_pos); + set_block_location(iblk, member_pos, block_locs); } // Finish placing all the members in the macro } @@ -853,11 +869,12 @@ static bool place_macro(int macros_max_num_tries, const t_pl_macro& pl_macro, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - vtr::vector& block_scores) { + vtr::vector& block_scores, + vtr::vector_map& block_locs) { ClusterBlockId blk_id = pl_macro.members[0].blk_index; VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tHead of the macro is Block %d\n", size_t(blk_id)); - if (is_block_placed(blk_id)) { + if (is_block_placed(blk_id, block_locs)) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tBlock is already placed\n", size_t(blk_id)); return true; } @@ -881,18 +898,18 @@ static bool place_macro(int macros_max_num_tries, //We need to place densely in second iteration to be able to find a legal initial placement solution if (blk_types_empty_locs_in_grid != nullptr && !blk_types_empty_locs_in_grid->empty()) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry dense placement\n"); - macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid); + macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, block_locs); } if (!macro_placed) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry centroid placement\n"); - macro_placed = try_centroid_placement(pl_macro, pr, block_type, pad_loc_type, block_scores); + macro_placed = try_centroid_placement(pl_macro, pr, block_type, pad_loc_type, block_scores, block_locs); } VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tMacro is placed: %d\n", macro_placed); // If macro is not placed yet, try to place the macro randomly for the max number of random tries for (int itry = 0; itry < macros_max_num_tries && !macro_placed; itry++) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry random place iter: %d\n", itry); - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, pad_loc_type); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, pad_loc_type, block_locs); } // Finished all tries if (!macro_placed) { @@ -904,7 +921,7 @@ static bool place_macro(int macros_max_num_tries, // Exhaustive placement of carry macros VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry exhaustive placement\n"); - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, pad_loc_type); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, pad_loc_type, block_locs); } return macro_placed; } @@ -958,7 +975,8 @@ static vtr::vector assign_block_scores() { static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, - const char* constraints_file) { + const char* constraints_file, + vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); @@ -1016,7 +1034,7 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, blocks_placed_since_heap_update++; - bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores); + bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, block_locs); //update heap based on update_heap_freq calculated above if (blocks_placed_since_heap_update % (update_heap_freq) == 0) { @@ -1115,14 +1133,15 @@ static void clear_all_grid_locs() { clear_block_type_grid_locs(blk_types_to_be_cleared); } -bool place_one_block(const ClusterBlockId& blk_id, +bool place_one_block(const ClusterBlockId blk_id, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - vtr::vector* block_scores) { + vtr::vector* block_scores, + vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.placement(); //Check if block has already been placed - if (is_block_placed(blk_id)) { + if (is_block_placed(blk_id, block_locs)) { return true; } @@ -1136,7 +1155,7 @@ bool place_one_block(const ClusterBlockId& blk_id, if (imacro != -1) { //If the block belongs to a macro, pass that macro to the placement routines VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tBelongs to a macro %d\n", imacro); pl_macro = place_ctx.pl_macros[imacro]; - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, (*block_scores)); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, block_locs); } else { //If it does not belong to a macro, create a macro with the one block and then pass to the placement routines //This is done so that the initial placement flow can be the same whether the block belongs to a macro or not @@ -1146,7 +1165,7 @@ bool place_one_block(const ClusterBlockId& blk_id, macro_member.blk_index = blk_id; macro_member.offset = block_offset; pl_macro.members.push_back(macro_member); - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, (*block_scores)); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, block_locs); } return placed_macro; @@ -1178,7 +1197,8 @@ static void alloc_and_load_movable_blocks() { void initial_placement(const t_placer_opts& placer_opts, const char* constraints_file, - const t_noc_opts& noc_opts) { + const t_noc_opts& noc_opts, + vtr::vector_map& block_locs) { vtr::ScopedStartFinishTimer timer("Initial Placement"); /* Initialize the grid blocks to empty. @@ -1193,7 +1213,7 @@ void initial_placement(const t_placer_opts& placer_opts, /*Mark the blocks that have already been locked to one spot via floorplan constraints * as fixed, so they do not get moved during initial placement or later during the simulated annealing stage of placement*/ - mark_fixed_blocks(); + mark_fixed_blocks(block_locs); // Compute and store compressed floorplanning constraints alloc_and_load_compressed_cluster_constraints(); @@ -1206,7 +1226,7 @@ void initial_placement(const t_placer_opts& placer_opts, if (noc_opts.noc) { // NoC routers are placed before other blocks - initial_noc_placement(noc_opts, placer_opts); + initial_noc_placement(noc_opts, placer_opts, block_locs); propagate_place_constraints(); } @@ -1214,12 +1234,12 @@ void initial_placement(const t_placer_opts& placer_opts, vtr::vector block_scores = assign_block_scores(); //Place all blocks - place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file); + place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, block_locs); alloc_and_load_movable_blocks(); // ensure all blocks are placed and that NoC routing has no cycles - check_initial_placement_legality(); + check_initial_placement_legality(block_locs); //#ifdef VERBOSE // VTR_LOG("At end of initial_placement.\n"); diff --git a/vpr/src/place/initial_placement.h b/vpr/src/place/initial_placement.h index 44a3772087d..71c1bc1cdf7 100644 --- a/vpr/src/place/initial_placement.h +++ b/vpr/src/place/initial_placement.h @@ -4,6 +4,7 @@ #include "vpr_types.h" #include "place_macro.h" #include "partition_region.h" +#include "vtr_vector_map.h" /* The maximum number of tries when trying to place a macro at a * * random location before trying exhaustive placement - find the first * @@ -59,7 +60,8 @@ struct t_grid_empty_locs_block_type { bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type); + enum e_pad_loc_type pad_loc_type, + vtr::vector_map& block_locs); /** * @brief Looks for a valid placement location for macro exhaustively once the maximum number of random locations have been tried. @@ -75,7 +77,8 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type); + enum e_pad_loc_type pad_loc_type, + vtr::vector_map& block_locs); /** * @brief Places the macro if the head position passed in is legal, and all the resulting @@ -86,7 +89,9 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, * * @return true if macro was placed, false if not. */ -bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos); +bool try_place_macro(const t_pl_macro& pl_macro, + t_pl_loc head_pos, + vtr::vector_map& block_locs); /** * @brief Checks whether the block is already placed @@ -95,7 +100,8 @@ bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos); * * @return true if the block was placed, false if not. */ -bool is_block_placed(ClusterBlockId blk_id); +bool is_block_placed(ClusterBlockId blk_id, + const vtr::vector_map& block_locs); /** * @brief Tries to find an initial placement location for each block considering floorplanning constraints @@ -113,7 +119,8 @@ bool is_block_placed(ClusterBlockId blk_id); */ void initial_placement(const t_placer_opts& placer_opts, const char* constraints_file, - const t_noc_opts& noc_opts); + const t_noc_opts& noc_opts, + vtr::vector_map& block_locs); /** * @brief Looks for a valid placement location for block. @@ -125,5 +132,8 @@ void initial_placement(const t_placer_opts& placer_opts, * * @return true if the block gets placed, false if not. */ -bool place_one_block(const ClusterBlockId& blk_id, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores); +bool place_one_block(const ClusterBlockId blk_id, + enum e_pad_loc_type pad_loc_type, + std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores, + vtr::vector_map& block_locs); #endif diff --git a/vpr/src/place/noc_place_checkpoint.cpp b/vpr/src/place/noc_place_checkpoint.cpp index 3e11d9c8eb6..a39f49993c1 100644 --- a/vpr/src/place/noc_place_checkpoint.cpp +++ b/vpr/src/place/noc_place_checkpoint.cpp @@ -13,26 +13,26 @@ NoCPlacementCheckpoint::NoCPlacementCheckpoint() router_locations_.clear(); // Initializes checkpoint locations to invalid - for (const auto& router_bid : router_bids) { + for (const ClusterBlockId router_bid : router_bids) { router_locations_[router_bid] = t_pl_loc(OPEN, OPEN, OPEN, OPEN); } } -void NoCPlacementCheckpoint::save_checkpoint(double cost) { +void NoCPlacementCheckpoint::save_checkpoint(double cost, const vtr::vector_map& block_locs) { const auto& noc_ctx = g_vpr_ctx.noc(); - const auto& place_ctx = g_vpr_ctx.placement(); const std::vector& router_bids = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); - for (const auto& router_bid : router_bids) { - t_pl_loc loc = place_ctx.block_locs[router_bid].loc; + for (const ClusterBlockId router_bid : router_bids) { + t_pl_loc loc = block_locs[router_bid].loc; router_locations_[router_bid] = loc; } valid_ = true; cost_ = cost; } -void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs) { +void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, + vtr::vector_map& block_locs) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& device_ctx = g_vpr_ctx.device(); auto& place_ctx = g_vpr_ctx.mutable_placement(); @@ -64,7 +64,7 @@ void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs) { ClusterBlockId router_blk_id = router_loc.first; t_pl_loc location = router_loc.second; - set_block_location(router_blk_id, location); + set_block_location(router_blk_id, location, block_locs); } // Re-initialize routes and static variables that keep track of NoC-related costs diff --git a/vpr/src/place/noc_place_checkpoint.h b/vpr/src/place/noc_place_checkpoint.h index 11df0a50732..698caafb240 100644 --- a/vpr/src/place/noc_place_checkpoint.h +++ b/vpr/src/place/noc_place_checkpoint.h @@ -38,14 +38,15 @@ class NoCPlacementCheckpoint { * * @param cost: The placement cost associated with the current placement */ - void save_checkpoint(double cost); + void save_checkpoint(double cost, const vtr::vector_map& block_locs); /** * @brief Loads the save checkpoint into global placement data structues. * * @param costs: Used to load NoC related costs for the checkpoint */ - void restore_checkpoint(t_placer_costs& costs); + void restore_checkpoint(t_placer_costs& costs, + vtr::vector_map& block_locs); /** * @brief Indicates whether the object is empty or it has already stored a diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 5bc1683e834..c97db48668c 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -431,7 +431,7 @@ void try_place(const Netlist<>& net_list, normalize_noc_cost_weighting_factor(const_cast(noc_opts)); } - initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts); + initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts, g_vpr_ctx.mutable_placement().block_locs); //create the move generator based on the chosen strategy auto [move_generator, move_generator2] = create_move_generators(placer_opts, move_lim, noc_opts.noc_centroid_weight); diff --git a/vpr/src/place/place_constraints.cpp b/vpr/src/place/place_constraints.cpp index 51da069db38..cfb51e2779a 100644 --- a/vpr/src/place/place_constraints.cpp +++ b/vpr/src/place/place_constraints.cpp @@ -254,12 +254,11 @@ void load_cluster_constraints() { } } -void mark_fixed_blocks() { +void mark_fixed_blocks(vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& floorplanning_ctx = g_vpr_ctx.floorplanning(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { if (!is_cluster_constrained(blk_id)) { continue; } @@ -273,9 +272,8 @@ void mark_fixed_blocks() { * and mark it as fixed. */ if (is_pr_size_one(pr, block_type, loc)) { - set_block_location(blk_id, loc); - - place_ctx.block_locs[blk_id].is_fixed = true; + set_block_location(blk_id, loc, block_locs); + block_locs[blk_id].is_fixed = true; } } } diff --git a/vpr/src/place/place_constraints.h b/vpr/src/place/place_constraints.h index ff5aacbb092..e8a1d9531d7 100644 --- a/vpr/src/place/place_constraints.h +++ b/vpr/src/place/place_constraints.h @@ -137,7 +137,7 @@ void load_cluster_constraints(); * Marking them as fixed indicates that they cannot be moved * during initial placement and simulated annealing. */ -void mark_fixed_blocks(); +void mark_fixed_blocks(vtr::vector_map& block_locs); /** * @brief Converts the floorplanning constraints from grid location to diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 0463b7ebdc8..66ff6290cc7 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -365,7 +365,9 @@ void alloc_and_load_legal_placement_locations(std::vector& block_locs) { auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index 36c544ef344..379735f4850 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -347,8 +347,11 @@ void load_grid_blocks_from_block_locs(); */ void alloc_and_load_legal_placement_locations(std::vector>>& legal_pos); -///@brief Performs error checking to see if location is legal for block type, and sets the location and grid usage of the block if it is legal. -void set_block_location(ClusterBlockId blk_id, const t_pl_loc& location); +///@brief Performs error checking to see if location is legal for block type, +/// and sets the location and grid usage of the block if it is legal. +void set_block_location(ClusterBlockId blk_id, + const t_pl_loc& location, + vtr::vector_map& block_locs); /// @brief check if a specified location is within the device grid inline bool is_loc_on_chip(t_physical_tile_loc loc) { From 8b1b5686df1ee2b0f06e3766d3cc15fd6340d4a4 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 17:07:09 -0400 Subject: [PATCH 019/146] remove place_ctx.block_locs from move generators --- vpr/src/draw/manual_moves.cpp | 16 +++++- vpr/src/draw/manual_moves.h | 12 +++- vpr/src/place/centroid_move_generator.cpp | 6 +- vpr/src/place/centroid_move_generator.h | 3 +- .../place/critical_uniform_move_generator.cpp | 14 +++-- .../place/critical_uniform_move_generator.h | 7 ++- .../place/feasible_region_move_generator.cpp | 22 +++++--- .../place/feasible_region_move_generator.h | 7 ++- vpr/src/place/manual_move_generator.cpp | 16 +++++- vpr/src/place/manual_move_generator.h | 7 ++- vpr/src/place/median_move_generator.cpp | 56 ++++++++++--------- vpr/src/place/median_move_generator.h | 7 ++- vpr/src/place/move_generator.h | 7 ++- vpr/src/place/place.cpp | 6 +- vpr/src/place/place_util.cpp | 4 +- vpr/src/place/simpleRL_move_generator.cpp | 5 +- vpr/src/place/simpleRL_move_generator.h | 3 +- vpr/src/place/static_move_generator.cpp | 5 +- vpr/src/place/static_move_generator.h | 3 +- vpr/src/place/uniform_move_generator.cpp | 10 +++- vpr/src/place/uniform_move_generator.h | 7 ++- .../weighted_centroid_move_generator.cpp | 10 +++- .../place/weighted_centroid_move_generator.h | 7 ++- .../place/weighted_median_move_generator.cpp | 19 +++++-- .../place/weighted_median_move_generator.h | 7 ++- 25 files changed, 185 insertions(+), 81 deletions(-) diff --git a/vpr/src/draw/manual_moves.cpp b/vpr/src/draw/manual_moves.cpp index 3d907550396..d37526494c5 100644 --- a/vpr/src/draw/manual_moves.cpp +++ b/vpr/src/draw/manual_moves.cpp @@ -5,7 +5,11 @@ * @brief Contains the function definitions needed for manual moves feature. * * Includes the graphics/gtk function for manual moves. The Manual Move Generator class is defined manual_move_generator.h/cpp. - * The manual move feature allows the user to select a move by choosing the block to move, x position, y position, subtile position. If the placer accepts the move, the user can accept or reject the move with respect to the delta cost, delta timing and delta bounding box cost displayed on the UI. The manual move feature interacts with placement through the ManualMoveGenerator class in the manual_move_generator.cpp/h files and in the place.cpp file by checking if the manual move toggle button in the UI is active or not, and calls the function needed. + * The manual move feature allows the user to select a move by choosing the block to move, x position, y position, subtile position. + * If the placer accepts the move, the user can accept or reject the move with respect to the delta cost, + * delta timing and delta bounding box cost displayed on the UI. The manual move feature interacts with placement through + * the ManualMoveGenerator class in the manual_move_generator.cpp/h files and in the place.cpp file by checking + * if the manual move toggle button in the UI is active or not, and calls the function needed. */ #include "manual_moves.h" @@ -301,12 +305,18 @@ e_move_result pl_do_manual_move(double d_cost, double d_timing, double d_boundin return move_outcome; } -e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_generator, t_pl_blocks_to_be_moved& blocks_affected, e_move_type& move_type, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) { +e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_generator, + t_pl_blocks_to_be_moved& blocks_affected, + e_move_type& move_type, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { draw_manual_moves_window(""); update_screen(ScreenUpdatePriority::MAJOR, " ", PLACEMENT, nullptr); move_type = e_move_type::MANUAL_MOVE; t_propose_action proposed_action{move_type, -1}; //no need to specify block type in manual move "propose_move" function - return manual_move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + return manual_move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, block_locs); } #endif /*NO_GRAPHICS*/ diff --git a/vpr/src/draw/manual_moves.h b/vpr/src/draw/manual_moves.h index 94d981a1e35..9ea70912c0b 100644 --- a/vpr/src/draw/manual_moves.h +++ b/vpr/src/draw/manual_moves.h @@ -149,11 +149,19 @@ bool string_is_a_number(const std::string& block_id); * @param d_bounding_box: Delta bounding box for cost summary dialog function. * @param move_outcome: Move result from placement for cost summary dialog function. * - * Helper function used in place.cpp. The ManualMovesState variable are updated and the manual_move_cost_summary_dialog is called to display the cost members to the user in the UI and waits for the user to either ACCPET/REJECT the manual move. + * Helper function used in place.cpp. The ManualMovesState variable are updated and + * the manual_move_cost_summary_dialog is called to display the cost members to the user + * in the UI and waits for the user to either ACCPET/REJECT the manual move. */ e_move_result pl_do_manual_move(double d_cost, double d_timing, double d_bounding_box, e_move_result& move_outcome); -e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_generator, t_pl_blocks_to_be_moved& blocks_affected, e_move_type& move_type, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities); +e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_generator, + t_pl_blocks_to_be_moved& blocks_affected, + e_move_type& move_type, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs); #endif /*NO_GRAPHICS*/ diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index a1b79b92f7a..637d00a81c7 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -38,7 +38,8 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/) { + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) { // Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, @@ -58,11 +59,10 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block } const auto& device_ctx = g_vpr_ctx.device(); - const auto& place_ctx = g_vpr_ctx.placement(); const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = g_placer_ctx.mutable_move(); - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); diff --git a/vpr/src/place/centroid_move_generator.h b/vpr/src/place/centroid_move_generator.h index 2a0b99234c5..c56455f9988 100644 --- a/vpr/src/place/centroid_move_generator.h +++ b/vpr/src/place/centroid_move_generator.h @@ -62,7 +62,8 @@ class CentroidMoveGenerator : public MoveGenerator { t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/) override; + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) override; private: /** A value in range [0, 1] that specifies how much the centroid location diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index 9fbc93a7645..20e24f3b17b 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -3,7 +3,14 @@ #include "place_constraints.h" #include "move_utils.h" -e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) { +e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) { + auto& cluster_ctx = g_vpr_ctx.clustering(); + ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type @@ -14,15 +21,12 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved &pin_from); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Critical Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); - auto& place_ctx = g_vpr_ctx.placement(); - auto& cluster_ctx = g_vpr_ctx.clustering(); - if (!b_from) { //No movable block found VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tNo movable block found\n"); return e_create_move::ABORT; } - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); diff --git a/vpr/src/place/critical_uniform_move_generator.h b/vpr/src/place/critical_uniform_move_generator.h index a5a08af7c3b..ef7181644cb 100644 --- a/vpr/src/place/critical_uniform_move_generator.h +++ b/vpr/src/place/critical_uniform_move_generator.h @@ -15,7 +15,12 @@ * Returns its choices by filling in affected_blocks. */ class CriticalUniformMoveGenerator : public MoveGenerator { - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& /*placer_opts*/, const PlacerCriticalities* /*criticalities*/) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& /*placer_opts*/, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) override; }; #endif diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 995c2a37836..e0b887a903d 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -5,7 +5,15 @@ #include "place_constraints.h" #include "move_utils.h" -e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) { +e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& place_move_ctx = g_placer_ctx.mutable_move(); + ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type @@ -21,12 +29,8 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - auto& place_ctx = g_vpr_ctx.placement(); - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); - //from block data - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); @@ -50,8 +54,8 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& ipin = cluster_ctx.clb_nlist.pin_net_index(pin_id); if (criticalities->criticality(net_id, ipin) > placer_opts.place_crit_limit) { bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - place_move_ctx.X_coord.push_back(place_ctx.block_locs[bnum].loc.x); - place_move_ctx.Y_coord.push_back(place_ctx.block_locs[bnum].loc.y); + place_move_ctx.X_coord.push_back(block_locs[bnum].loc.x); + place_move_ctx.Y_coord.push_back(block_locs[bnum].loc.y); } } if (!place_move_ctx.X_coord.empty()) { @@ -69,7 +73,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& //Get the most critical output of the node int xt, yt; ClusterBlockId b_output = cluster_ctx.clb_nlist.net_pin_block(net_from, pin_from); - t_pl_loc output_loc = place_ctx.block_locs[b_output].loc; + t_pl_loc output_loc = block_locs[b_output].loc; xt = output_loc.x; yt = output_loc.y; diff --git a/vpr/src/place/feasible_region_move_generator.h b/vpr/src/place/feasible_region_move_generator.h index 0f635c00a57..a7021aef2eb 100644 --- a/vpr/src/place/feasible_region_move_generator.h +++ b/vpr/src/place/feasible_region_move_generator.h @@ -19,7 +19,12 @@ * */ class FeasibleRegionMoveGenerator : public MoveGenerator { - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) override; }; #endif diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index 6e2cf43d5cc..b9c2beb0c71 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -2,7 +2,12 @@ * @file manual_move_generator.cpp * @author Paula Perdomo * @date 2021-07-19 - * @brief Contains the ManualMoveGenerator class memeber definitions. The ManualMoveGenerator class inherits from the MoveGenerator class. The class contains a propose_move function that checks if the block requested to move by the user exists and determines whether the manual move is VALID/ABORTED by the placer. If the manual move is determined VALID, the move is created. A manual move is ABORTED if the block requested is not found or movable and if there aren't any compatible subtiles. + * @brief Contains the ManualMoveGenerator class member definitions. + * The ManualMoveGenerator class inherits from the MoveGenerator class. + * The class contains a propose_move function that checks if the block requested + * to move by the user exists and determines whether the manual move is VALID/ABORTED + * by the placer. If the manual move is determined VALID, the move is created. + * A manual move is ABORTED if the block requested is not found or movable and if there aren't any compatible subtiles. */ #include "manual_move_generator.h" @@ -13,7 +18,12 @@ #endif //NO_GRAPHICS //Manual Move Generator function -e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& /*proposed_action*/, float /*rlim*/, const t_placer_opts& /*placer_opts*/, const PlacerCriticalities* /*criticalities*/) { +e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& /*proposed_action*/, + float /*rlim*/, + const t_placer_opts& /*placer_opts*/, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) { int block_id = -1; t_pl_loc to; @@ -35,7 +45,7 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ auto& device_ctx = g_vpr_ctx.device(); //Gets the current location of the block to move. - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); diff --git a/vpr/src/place/manual_move_generator.h b/vpr/src/place/manual_move_generator.h index 2995006e908..64f79474941 100644 --- a/vpr/src/place/manual_move_generator.h +++ b/vpr/src/place/manual_move_generator.h @@ -27,7 +27,12 @@ class ManualMoveGenerator : public MoveGenerator { public: //Evaluates if move is successful and legal or unable to do. - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& /*proposed_action*/, float /*rlim*/, const t_placer_opts& /*placer_opts*/, const PlacerCriticalities* /*criticalities*/) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& /*proposed_action*/, + float /*rlim*/, + const t_placer_opts& /*placer_opts*/, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) override; }; #endif /*VPR_MANUAL_MOVE_GEN_H */ diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 20ef207221d..b10c0f286b5 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -14,9 +14,18 @@ static bool get_bb_incrementally(ClusterNetId net_id, int ynew, int layer_new); -static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, t_bb& bb_coord_new, ClusterBlockId block_id, bool& skip_net); - -e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) { +static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, + t_bb& bb_coord_new, + ClusterBlockId block_id, + bool& skip_net, + const vtr::vector_map& block_locs); + +e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) { //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, @@ -30,7 +39,6 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; } - auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); auto& place_move_ctx = g_placer_ctx.mutable_move(); @@ -38,7 +46,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ const int num_layers = device_ctx.grid.get_num_layers(); - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; int from_layer = from.layer; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from_layer}); @@ -75,7 +83,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ continue; if (cluster_ctx.clb_nlist.net_sinks(net_id).size() < SMALL_NET) { //calculate the bb from scratch - get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net); + get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net, block_locs); if (skip_net) continue; } else { @@ -90,9 +98,9 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ bnum = cluster_ctx.clb_nlist.pin_block(pin_id); pnum = tile_pin_index(pin_id); VTR_ASSERT(pnum >= 0); - xold = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - yold = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; - layer_old = place_ctx.block_locs[bnum].loc.layer; + xold = block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; + yold = block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; + layer_old = block_locs[bnum].loc.layer; xold = std::max(std::min(xold, (int)device_ctx.grid.width() - 2), 1); //-2 for no perim channels yold = std::max(std::min(yold, (int)device_ctx.grid.height() - 2), 1); //-2 for no perim channels @@ -118,18 +126,11 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ layer_new = net_bb_coords.layer_min; } - // If the mvoing block is on the border of the bounding box, we cannot get - // the bounding box incrementatlly. In that case, bounding box should be calculated + // If the moving block is on the border of the bounding box, we cannot get + // the bounding box incrementally. In that case, bounding box should be calculated // from scratch. - if (!get_bb_incrementally(net_id, - coords, - xold, - yold, - layer_old, - xnew, - ynew, - layer_new)) { - get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net); + if (!get_bb_incrementally(net_id, coords, xold, yold, layer_old, xnew, ynew, layer_new)) { + get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net, block_locs); if (skip_net) continue; } @@ -197,7 +198,11 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ * Currently assumes channels on both sides of the CLBs forming the * * edges of the bounding box can be used. Essentially, I am assuming * * the pins always lie on the outside of the bounding box. */ -static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, t_bb& bb_coord_new, ClusterBlockId block_id, bool& skip_net) { +static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, + t_bb& bb_coord_new, + ClusterBlockId block_id, + bool& skip_net, + const vtr::vector_map& block_locs) { //TODO: account for multiple physical pin instances per logical pin skip_net = true; @@ -213,7 +218,6 @@ static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, t_bb& bb_co int pnum; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); @@ -222,9 +226,9 @@ static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, t_bb& bb_co if (bnum != block_id) { skip_net = false; pnum = net_pin_to_tile_pin_index(net_id, 0); - int src_x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - int src_y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; - int src_layer = place_ctx.block_locs[bnum].loc.layer; + int src_x = block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; + int src_y = block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; + int src_layer = block_locs[bnum].loc.layer; xmin = src_x; ymin = src_y; @@ -241,7 +245,7 @@ static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, t_bb& bb_co if (bnum == block_id) continue; skip_net = false; - const auto& block_loc = place_ctx.block_locs[bnum].loc; + const auto& block_loc = block_locs[bnum].loc; int x = block_loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; int y = block_loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; int layer = block_loc.layer; diff --git a/vpr/src/place/median_move_generator.h b/vpr/src/place/median_move_generator.h index ccecdf86a0e..e27ceb5c59f 100644 --- a/vpr/src/place/median_move_generator.h +++ b/vpr/src/place/median_move_generator.h @@ -16,7 +16,12 @@ * around it */ class MedianMoveGenerator : public MoveGenerator { - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) override; }; #endif diff --git a/vpr/src/place/move_generator.h b/vpr/src/place/move_generator.h index 34d6d01cfa9..6dee6ee0553 100644 --- a/vpr/src/place/move_generator.h +++ b/vpr/src/place/move_generator.h @@ -59,7 +59,12 @@ class MoveGenerator { * @param placer_opts: all the placer options * @param criticalities: the placer criticalities, useful for timing directed moves */ - virtual e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) = 0; + virtual e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) = 0; /** * @brief Recieves feedback about the outcome of the previously proposed move diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index c97db48668c..e8ef8ee393d 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1291,7 +1291,9 @@ static e_move_result try_swap(const t_annealing_state* state, //When manual move toggle button is active, the manual move window asks the user for input. if (manual_move_enabled) { #ifndef NO_GRAPHICS - create_move_outcome = manual_move_display_and_propose(manual_move_generator, blocks_affected, proposed_action.move_type, rlim, placer_opts, criticalities); + create_move_outcome = manual_move_display_and_propose(manual_move_generator, blocks_affected, + proposed_action.move_type, rlim, placer_opts, + criticalities, g_vpr_ctx.placement().block_locs); #else //NO_GRAPHICS //Cast to void to explicitly avoid warning. (void)manual_move_generator; @@ -1302,7 +1304,7 @@ static e_move_result try_swap(const t_annealing_state* state, proposed_action.move_type = e_move_type::UNIFORM; } else { //Generate a new move (perturbation) used to explore the space of possible placements - create_move_outcome = move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + create_move_outcome = move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, g_vpr_ctx.placement().block_locs); } if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 66ff6290cc7..9a5b74e98ce 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -381,7 +381,7 @@ void set_block_location(ClusterBlockId blk_id, } //Set the location of the block - place_ctx.block_locs[blk_id].loc = location; + block_locs[blk_id].loc = location; //Check if block is at an illegal location auto physical_tile = device_ctx.grid.get_physical_type({location.x, location.y, location.layer}); @@ -391,7 +391,7 @@ void set_block_location(ClusterBlockId blk_id, VPR_THROW(VPR_ERROR_PLACE, "Block %s subtile number (%d) is out of range. \n", block_name.c_str(), location.sub_tile); } - if (!is_sub_tile_compatible(physical_tile, logical_block, place_ctx.block_locs[blk_id].loc.sub_tile)) { + if (!is_sub_tile_compatible(physical_tile, logical_block, block_locs[blk_id].loc.sub_tile)) { VPR_THROW(VPR_ERROR_PLACE, "Attempt to place block %s with ID %d at illegal location (%d,%d,%d). \n", block_name.c_str(), blk_id, diff --git a/vpr/src/place/simpleRL_move_generator.cpp b/vpr/src/place/simpleRL_move_generator.cpp index 45e43e05762..7e59be3dd60 100644 --- a/vpr/src/place/simpleRL_move_generator.cpp +++ b/vpr/src/place/simpleRL_move_generator.cpp @@ -19,9 +19,10 @@ e_create_move SimpleRLMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities) { + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { proposed_action = karmed_bandit_agent->propose_action(); - return all_moves[proposed_action.move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + return all_moves[proposed_action.move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, block_locs); } void SimpleRLMoveGenerator::process_outcome(double reward, e_reward_function reward_fun) { diff --git a/vpr/src/place/simpleRL_move_generator.h b/vpr/src/place/simpleRL_move_generator.h index 179c653f965..6d2dffadc6e 100644 --- a/vpr/src/place/simpleRL_move_generator.h +++ b/vpr/src/place/simpleRL_move_generator.h @@ -223,7 +223,8 @@ class SimpleRLMoveGenerator : public MoveGenerator { t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities) override; + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) override; // Receives feedback about the outcome of the previously proposed move void process_outcome(double reward, e_reward_function reward_fun) override; diff --git a/vpr/src/place/static_move_generator.cpp b/vpr/src/place/static_move_generator.cpp index b5920f1ffeb..d5f4f4c3342 100644 --- a/vpr/src/place/static_move_generator.cpp +++ b/vpr/src/place/static_move_generator.cpp @@ -43,13 +43,14 @@ e_create_move StaticMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities) { + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { float rand_num = vtr::frand() * total_prob; for (auto move_type : cumm_move_probs.keys()) { if (rand_num <= cumm_move_probs[move_type]) { proposed_action.move_type = move_type; - return all_moves[move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); + return all_moves[move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, block_locs); } } diff --git a/vpr/src/place/static_move_generator.h b/vpr/src/place/static_move_generator.h index 56b42eea671..feb9e61260e 100644 --- a/vpr/src/place/static_move_generator.h +++ b/vpr/src/place/static_move_generator.h @@ -23,6 +23,7 @@ class StaticMoveGenerator : public MoveGenerator { t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities) override; + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) override; }; #endif diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index 6560c32af24..48c8548e4c6 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -3,7 +3,12 @@ #include "place_constraints.h" #include "move_utils.h" -e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) { +e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) { //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, @@ -17,10 +22,9 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks return e_create_move::ABORT; } - auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); diff --git a/vpr/src/place/uniform_move_generator.h b/vpr/src/place/uniform_move_generator.h index 0ea4a8a9d8d..8a8b3f11339 100644 --- a/vpr/src/place/uniform_move_generator.h +++ b/vpr/src/place/uniform_move_generator.h @@ -9,7 +9,12 @@ * a range limit centered on from_block in the compressed block grid space */ class UniformMoveGenerator : public MoveGenerator { - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& /*placer_opts*/, const PlacerCriticalities* /*criticalities*/) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& /*placer_opts*/, + const PlacerCriticalities* /*criticalities*/, + const vtr::vector_map& block_locs) override; }; #endif diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index 93dd5c796f8..b31b7028151 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -4,7 +4,12 @@ #include "place_constraints.h" #include "move_utils.h" -e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) { +e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, @@ -19,12 +24,11 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move } auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); auto& place_move_ctx = g_placer_ctx.mutable_move(); - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); diff --git a/vpr/src/place/weighted_centroid_move_generator.h b/vpr/src/place/weighted_centroid_move_generator.h index 7aea1b6941c..8b0514bb9f3 100644 --- a/vpr/src/place/weighted_centroid_move_generator.h +++ b/vpr/src/place/weighted_centroid_move_generator.h @@ -13,7 +13,12 @@ * "Learn to Place: FPGA Placement using Reinforcement Learning and Directed Moves", ICFPT2020 */ class WeightedCentroidMoveGenerator : public MoveGenerator { - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) override; }; #endif diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index a9e2aaac526..a529bda8002 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -7,9 +7,19 @@ #define CRIT_MULT_FOR_W_MEDIAN 10 -static void get_bb_cost_for_net_excluding_block(ClusterNetId net_id, ClusterBlockId block_id, ClusterPinId moving_pin_id, const PlacerCriticalities* criticalities, t_bb_cost* coords, bool& skip_net); - -e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) { +static void get_bb_cost_for_net_excluding_block(ClusterNetId net_id, + ClusterBlockId block_id, + ClusterPinId moving_pin_id, + const PlacerCriticalities* criticalities, + t_bb_cost* coords, + bool& skip_net); + +e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, @@ -23,14 +33,13 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = g_placer_ctx.mutable_move(); int num_layers = g_vpr_ctx.device().grid.get_num_layers(); - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); diff --git a/vpr/src/place/weighted_median_move_generator.h b/vpr/src/place/weighted_median_move_generator.h index c0be89b7c5f..edb355352c4 100644 --- a/vpr/src/place/weighted_median_move_generator.h +++ b/vpr/src/place/weighted_median_move_generator.h @@ -13,7 +13,12 @@ * "Learn to Place: FPGA Placement using Reinforcement Learning and Directed Moves", ICFPT2020 */ class WeightedMedianMoveGenerator : public MoveGenerator { - e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) override; + e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, + t_propose_action& proposed_action, + float rlim, + const t_placer_opts& placer_opts, + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) override; }; #endif From db5214768f0b70b9b52c3dfa6e2ae9465be9778a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 18:05:28 -0400 Subject: [PATCH 020/146] remove place_ctx.block_locs from directed_moves_utils --- vpr/src/place/centroid_move_generator.cpp | 2 +- vpr/src/place/directed_moves_util.cpp | 12 ++++++------ vpr/src/place/directed_moves_util.h | 11 +++++++---- vpr/src/place/weighted_centroid_move_generator.cpp | 2 +- 4 files changed, 15 insertions(+), 12 deletions(-) diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index 637d00a81c7..a1b8b5fb994 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -74,7 +74,7 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block t_pl_loc to, centroid; /* Calculate the centroid location*/ - calculate_centroid_loc(b_from, false, centroid, nullptr, noc_attraction_enabled_, noc_attraction_w_); + calculate_centroid_loc(b_from, false, centroid, nullptr, noc_attraction_enabled_, noc_attraction_w_, block_locs); // Centroid location is not necessarily a valid location, and the downstream location expects a valid // layer for the centroid location. So if the layer is not valid, we set it to the same layer as from loc. diff --git a/vpr/src/place/directed_moves_util.cpp b/vpr/src/place/directed_moves_util.cpp index 2a543ce5441..f77b6a032ee 100644 --- a/vpr/src/place/directed_moves_util.cpp +++ b/vpr/src/place/directed_moves_util.cpp @@ -26,9 +26,9 @@ void calculate_centroid_loc(ClusterBlockId b_from, t_pl_loc& centroid, const PlacerCriticalities* criticalities, bool noc_attraction_enabled, - float noc_attraction_weight) { + float noc_attraction_weight, + const vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); float acc_weight = 0; float acc_x = 0; @@ -36,7 +36,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, float acc_layer = 0; float weight = 1; - int from_block_layer_num = g_vpr_ctx.placement().block_locs[b_from].loc.layer; + int from_block_layer_num = block_locs[b_from].loc.layer; VTR_ASSERT(from_block_layer_num != OPEN); //iterate over the from block pins @@ -75,7 +75,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, weight = 1; } - t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, place_ctx.block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, block_locs); acc_x += tile_loc.x * weight; acc_y += tile_loc.y * weight; @@ -95,7 +95,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, ClusterPinId source_pin = cluster_ctx.clb_nlist.net_driver(net_id); - t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, place_ctx.block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, block_locs); acc_x += tile_loc.x * weight; acc_y += tile_loc.y * weight; @@ -118,7 +118,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, acc_weight *= (1.0f - noc_attraction_weight); for (ClusterBlockId router_blk_id : noc_routers) { - t_block_loc router_loc = place_ctx.block_locs[router_blk_id]; + t_block_loc router_loc = block_locs[router_blk_id]; acc_x += router_loc.loc.x * single_noc_weight; acc_y += router_loc.loc.y * single_noc_weight; acc_weight += single_noc_weight; diff --git a/vpr/src/place/directed_moves_util.h b/vpr/src/place/directed_moves_util.h index 89c61f72e16..9d05249df58 100644 --- a/vpr/src/place/directed_moves_util.h +++ b/vpr/src/place/directed_moves_util.h @@ -17,7 +17,8 @@ enum e_reward_function { e_reward_function string_to_reward(const std::string& st); ///@brief Helper function that returns the x, y coordinates of a pin -t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const vtr::vector_map& block_locs); +t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, + const vtr::vector_map& block_locs); /** * @brief Calculates the exact centroid location @@ -46,13 +47,15 @@ void calculate_centroid_loc(ClusterBlockId b_from, t_pl_loc& centroid, const PlacerCriticalities* criticalities, bool noc_attraction_enabled, - float noc_attraction_weight); + float noc_attraction_weight, + const vtr::vector_map& block_locs); inline void calculate_centroid_loc(ClusterBlockId b_from, bool timing_weights, t_pl_loc& centroid, - const PlacerCriticalities* criticalities) { - calculate_centroid_loc(b_from, timing_weights, centroid, criticalities, false, 0.0f); + const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs) { + calculate_centroid_loc(b_from, timing_weights, centroid, criticalities, false, 0.0f, block_locs); } #endif diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index b31b7028151..46af9610dfe 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -40,7 +40,7 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move t_pl_loc to, centroid; /* Calculate the weighted centroid */ - calculate_centroid_loc(b_from, true, centroid, criticalities); + calculate_centroid_loc(b_from, true, centroid, criticalities, block_locs); // Centroid location is not necessarily a valid location, and the downstream location expect a valid // layer for "to" location. So if the layer is not valid, we set it to the same layer as from loc. From dd99e6066367b49bd85395e171a33298d095a2ae Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 18:27:14 -0400 Subject: [PATCH 021/146] remove a few more place_ctx.block_locs --- vpr/src/place/initial_noc_placement.cpp | 6 ++-- vpr/src/place/initial_placement.cpp | 26 +++++++++-------- vpr/src/place/noc_place_checkpoint.cpp | 2 +- vpr/src/place/noc_place_utils.cpp | 39 +++++++++++++++---------- vpr/src/place/noc_place_utils.h | 21 ++++++++----- vpr/src/place/place.cpp | 17 ++++------- vpr/src/place/place_checkpoint.cpp | 2 +- 7 files changed, 62 insertions(+), 51 deletions(-) diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 73a1d50056a..f0899020d19 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -235,7 +235,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, apply_move_blocks(blocks_affected); NocCostTerms noc_delta_c; - find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, block_locs); double delta_cost = calculate_noc_cost(noc_delta_c, costs.noc_cost_norm_factors, noc_opts); double prob = starting_prob - i_move * prob_step; @@ -252,7 +252,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, } } else { // The proposed move is rejected revert_move_blocks(blocks_affected); - revert_noc_traffic_flow_routes(blocks_affected); + revert_noc_traffic_flow_routes(blocks_affected, block_locs); } } } @@ -291,7 +291,7 @@ void initial_noc_placement(const t_noc_opts& noc_opts, place_noc_routers_randomly(unfixed_routers, placer_opts.seed, block_locs); // populate internal data structures to maintain route, bandwidth usage, and latencies - initial_noc_routing({}); + initial_noc_routing({}, block_locs); // Run the simulated annealing optimizer for NoC routers noc_routers_anneal(noc_opts, block_locs); diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index c8437e06ac1..6c926450152 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -38,13 +38,14 @@ static constexpr int SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR = 100; * @param unplaced_blk_types_index Block types that their grid locations must be cleared. * */ -static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index); +static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, + vtr::vector_map& block_locs); /** * @brief Initializes the grid to empty. It also initialized the location for * all blocks to unplaced. */ -static void clear_all_grid_locs(); +static void clear_all_grid_locs(vtr::vector_map& block_locs); /** * @brief Control routine for placing a macro. @@ -233,7 +234,7 @@ static void check_initial_placement_legality(const vtr::vector_map& block_locs); static void check_initial_placement_legality(const vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -999,7 +1000,7 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, for (auto iter_no = 0; iter_no < MAX_INIT_PLACE_ATTEMPTS; iter_no++) { //clear grid for a new placement iteration - clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr); + clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, block_locs); unplaced_blk_type_in_curr_itr.clear(); // read the constraint file if the user has provided one and this is not the first attempt @@ -1071,7 +1072,8 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, } } -static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index) { +static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, + vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); bool clear_all_block_types = false; @@ -1111,12 +1113,12 @@ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_b for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { auto blk_type = cluster_ctx.clb_nlist.block_type(blk_id)->index; if (clear_all_block_types || unplaced_blk_types_index.count(blk_type)) { - place_ctx.block_locs[blk_id].loc = t_pl_loc(); + block_locs[blk_id].loc = t_pl_loc(); } } } -static void clear_all_grid_locs() { +static void clear_all_grid_locs(vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); std::unordered_set blk_types_to_be_cleared; @@ -1130,7 +1132,7 @@ static void clear_all_grid_locs() { } } - clear_block_type_grid_locs(blk_types_to_be_cleared); + clear_block_type_grid_locs(blk_types_to_be_cleared, block_locs); } bool place_one_block(const ClusterBlockId blk_id, @@ -1171,7 +1173,7 @@ bool place_one_block(const ClusterBlockId blk_id, return placed_macro; } -static void alloc_and_load_movable_blocks() { +static void alloc_and_load_movable_blocks(const vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.mutable_placement(); const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& device_ctx = g_vpr_ctx.device(); @@ -1185,7 +1187,7 @@ static void alloc_and_load_movable_blocks() { // iterate over all clustered blocks and store block ids of movable ones for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - const auto& loc = place_ctx.block_locs[blk_id]; + const auto& loc = block_locs[blk_id]; if (!loc.is_fixed) { place_ctx.movable_blocks.push_back(blk_id); @@ -1204,7 +1206,7 @@ void initial_placement(const t_placer_opts& placer_opts, /* Initialize the grid blocks to empty. * Initialize all the blocks to unplaced. */ - clear_all_grid_locs(); + clear_all_grid_locs(block_locs); /* Go through cluster blocks to calculate the tightest placement * floorplan constraint for each constrained block @@ -1236,7 +1238,7 @@ void initial_placement(const t_placer_opts& placer_opts, //Place all blocks place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, block_locs); - alloc_and_load_movable_blocks(); + alloc_and_load_movable_blocks(block_locs); // ensure all blocks are placed and that NoC routing has no cycles check_initial_placement_legality(block_locs); diff --git a/vpr/src/place/noc_place_checkpoint.cpp b/vpr/src/place/noc_place_checkpoint.cpp index a39f49993c1..5f7d5ad4f49 100644 --- a/vpr/src/place/noc_place_checkpoint.cpp +++ b/vpr/src/place/noc_place_checkpoint.cpp @@ -68,7 +68,7 @@ void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, } // Re-initialize routes and static variables that keep track of NoC-related costs - reinitialize_noc_routing(costs, {}); + reinitialize_noc_routing(costs, {}, block_locs); } bool NoCPlacementCheckpoint::is_valid() const { diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index b224f3bafac..602c69c09d2 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -59,7 +59,8 @@ static bool select_random_router_cluster(ClusterBlockId& b_from, static std::vector find_affected_links_by_flow_reroute(std::vector& prev_links, std::vector& curr_links); -void initial_noc_routing(const vtr::vector>& new_traffic_flow_routes) { +void initial_noc_routing(const vtr::vector>& new_traffic_flow_routes, + const vtr::vector_map& block_locs) { // need to update the link usages within after routing all the traffic flows // also need to route all the traffic flows and store them auto& noc_ctx = g_vpr_ctx.mutable_noc(); @@ -75,14 +76,14 @@ void initial_noc_routing(const vtr::vector& curr_traffic_flow_route = new_traffic_flow_routes.empty() - ? route_traffic_flow(traffic_flow_id, noc_ctx.noc_model, noc_traffic_flows_storage, *noc_ctx.noc_flows_router) + ? route_traffic_flow(traffic_flow_id, noc_ctx.noc_model, noc_traffic_flows_storage, *noc_ctx.noc_flows_router, block_locs) : new_traffic_flow_routes[traffic_flow_id]; if (!new_traffic_flow_routes.empty()) { @@ -95,7 +96,8 @@ void initial_noc_routing(const vtr::vector>& new_traffic_flow_routes) { + const vtr::vector>& new_traffic_flow_routes, + const vtr::vector_map& block_locs) { // used to access NoC links and modify them auto& noc_ctx = g_vpr_ctx.mutable_noc(); @@ -108,7 +110,7 @@ void reinitialize_noc_routing(t_placer_costs& costs, } // Route traffic flows and update link bandwidth usage - initial_noc_routing(new_traffic_flow_routes); + initial_noc_routing(new_traffic_flow_routes, block_locs); // Initialize traffic_flow_costs costs.noc_cost_terms.aggregate_bandwidth = comp_noc_aggregate_bandwidth_cost(); @@ -117,7 +119,8 @@ void reinitialize_noc_routing(t_placer_costs& costs, } void find_affected_noc_routers_and_update_noc_costs(const t_pl_blocks_to_be_moved& blocks_affected, - NocCostTerms& delta_c) { + NocCostTerms& delta_c, + const vtr::vector_map& block_locs) { /* For speed, delta_c is passed by reference instead of being returned. * We expect delta cost terms to be zero to ensure correctness. */ @@ -143,7 +146,7 @@ void find_affected_noc_routers_and_update_noc_costs(const t_pl_blocks_to_be_move // check if the current moved block is a noc router if (noc_traffic_flows_storage.check_if_cluster_block_has_traffic_flows(blk)) { // current block is a router, so re-route all the traffic flows it is a part of - re_route_associated_traffic_flows(blk, noc_traffic_flows_storage, noc_ctx.noc_model, *noc_ctx.noc_flows_router, updated_traffic_flows); + re_route_associated_traffic_flows(blk, noc_traffic_flows_storage, noc_ctx.noc_model, *noc_ctx.noc_flows_router, updated_traffic_flows, block_locs); } } @@ -205,7 +208,8 @@ void commit_noc_costs() { std::vector& route_traffic_flow(NocTrafficFlowId traffic_flow_id, const NocStorage& noc_model, NocTrafficFlows& noc_traffic_flows_storage, - NocRouting& noc_flows_router) { + NocRouting& noc_flows_router, + const vtr::vector_map& block_locs) { // provides the positions where the affected blocks have moved to auto& place_ctx = g_vpr_ctx.placement(); @@ -217,8 +221,8 @@ std::vector& route_traffic_flow(NocTrafficFlowId traffic_flow_id, ClusterBlockId logical_sink_router_block_id = curr_traffic_flow.sink_router_cluster_id; // get the ids of the hard router blocks where the logical router cluster blocks have been placed - NocRouterId source_router_block_id = noc_model.get_router_at_grid_location(place_ctx.block_locs[logical_source_router_block_id].loc); - NocRouterId sink_router_block_id = noc_model.get_router_at_grid_location(place_ctx.block_locs[logical_sink_router_block_id].loc); + NocRouterId source_router_block_id = noc_model.get_router_at_grid_location(block_locs[logical_source_router_block_id].loc); + NocRouterId sink_router_block_id = noc_model.get_router_at_grid_location(block_locs[logical_sink_router_block_id].loc); // route the current traffic flow std::vector& curr_traffic_flow_route = noc_traffic_flows_storage.get_mutable_traffic_flow_route(traffic_flow_id); @@ -248,7 +252,8 @@ void re_route_associated_traffic_flows(ClusterBlockId moved_block_router_id, NocTrafficFlows& noc_traffic_flows_storage, NocStorage& noc_model, NocRouting& noc_flows_router, - std::unordered_set& updated_traffic_flows) { + std::unordered_set& updated_traffic_flows, + const vtr::vector_map& block_locs) { // get all the associated traffic flows for the logical router cluster block const auto& assoc_traffic_flows = noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(moved_block_router_id); @@ -261,7 +266,7 @@ void re_route_associated_traffic_flows(ClusterBlockId moved_block_router_id, std::vector prev_traffic_flow_links = noc_traffic_flows_storage.get_traffic_flow_route(traffic_flow_id); // now update the current traffic flow by re-routing it based on the new locations of its src and destination routers - re_route_traffic_flow(traffic_flow_id, noc_traffic_flows_storage, noc_model, noc_flows_router); + re_route_traffic_flow(traffic_flow_id, noc_traffic_flows_storage, noc_model, noc_flows_router, block_locs); // now make sure we don't update this traffic flow a second time by adding it to the group of updated traffic flows updated_traffic_flows.insert(traffic_flow_id); @@ -282,7 +287,8 @@ void re_route_associated_traffic_flows(ClusterBlockId moved_block_router_id, } } -void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affected) { +void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affected, + const vtr::vector_map& block_locs) { auto& noc_ctx = g_vpr_ctx.mutable_noc(); NocTrafficFlows& noc_traffic_flows_storage = noc_ctx.noc_traffic_flows_storage; @@ -307,7 +313,7 @@ void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affect // first check to see whether we have already reverted the current traffic flow and only revert it if we haven't already. if (reverted_traffic_flows.find(traffic_flow_id) == reverted_traffic_flows.end()) { // Revert the traffic flow route by re-routing it - re_route_traffic_flow(traffic_flow_id, noc_traffic_flows_storage, noc_ctx.noc_model, *noc_ctx.noc_flows_router); + re_route_traffic_flow(traffic_flow_id, noc_traffic_flows_storage, noc_ctx.noc_model, *noc_ctx.noc_flows_router, block_locs); // make sure we do not revert this traffic flow again reverted_traffic_flows.insert(traffic_flow_id); @@ -320,7 +326,8 @@ void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affect void re_route_traffic_flow(NocTrafficFlowId traffic_flow_id, NocTrafficFlows& noc_traffic_flows_storage, NocStorage& noc_model, - NocRouting& noc_flows_router) { + NocRouting& noc_flows_router, + const vtr::vector_map& block_locs) { // get the current traffic flow info const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); @@ -333,7 +340,7 @@ void re_route_traffic_flow(NocTrafficFlowId traffic_flow_id, update_traffic_flow_link_usage(curr_traffic_flow_route, noc_model, -1, curr_traffic_flow.traffic_flow_bandwidth); // now get the re-routed traffic flow route and increment all the link usages with this reverted route - std::vector& re_routed_traffic_flow_route = route_traffic_flow(traffic_flow_id, noc_model, noc_traffic_flows_storage, noc_flows_router); + std::vector& re_routed_traffic_flow_route = route_traffic_flow(traffic_flow_id, noc_model, noc_traffic_flows_storage, noc_flows_router, block_locs); update_traffic_flow_link_usage(re_routed_traffic_flow_route, noc_model, 1, curr_traffic_flow.traffic_flow_bandwidth); } diff --git a/vpr/src/place/noc_place_utils.h b/vpr/src/place/noc_place_utils.h index d5067d7911a..681ea7ecf25 100644 --- a/vpr/src/place/noc_place_utils.h +++ b/vpr/src/place/noc_place_utils.h @@ -54,7 +54,8 @@ struct TrafficFlowPlaceCost { * @param new_traffic_flow_routes Traffic flow routes used to initialize link bandwidth utilization. * If an empty vector is passed, this function uses a routing algorithm to route traffic flows. */ -void initial_noc_routing(const vtr::vector>& new_traffic_flow_routes); +void initial_noc_routing(const vtr::vector>& new_traffic_flow_routes, + const vtr::vector_map& block_locs); /** * @brief Re-initializes all link bandwidth usages by either re-routing @@ -76,7 +77,8 @@ void initial_noc_routing(const vtr::vector>& new_traffic_flow_routes); + const vtr::vector>& new_traffic_flow_routes, + const vtr::vector_map& block_locs); /** * @brief Goes through all the cluster blocks that were moved @@ -112,7 +114,8 @@ void reinitialize_noc_routing(t_placer_costs& costs, * here. */ void find_affected_noc_routers_and_update_noc_costs(const t_pl_blocks_to_be_moved& blocks_affected, - NocCostTerms& delta_c); + NocCostTerms& delta_c, + const vtr::vector_map& block_locs); /** * @brief Updates static datastructures found in 'noc_place_utils.cpp' @@ -162,7 +165,8 @@ void commit_noc_costs(); std::vector& route_traffic_flow(NocTrafficFlowId traffic_flow_id, const NocStorage& noc_model, NocTrafficFlows& noc_traffic_flows_storage, - NocRouting& noc_flows_router); + NocRouting& noc_flows_router, + const vtr::vector_map& block_locs); /** * @brief Updates the bandwidth usages of links found in a routed traffic flow. @@ -217,7 +221,8 @@ void re_route_associated_traffic_flows(ClusterBlockId moved_router_block_id, NocTrafficFlows& noc_traffic_flows_storage, NocStorage& noc_model, NocRouting& noc_flows_router, - std::unordered_set& updated_traffic_flows); + std::unordered_set& updated_traffic_flows, + const vtr::vector_map& block_locs); /** * @brief Used to re-route all the traffic flows associated to logical @@ -232,7 +237,8 @@ void re_route_associated_traffic_flows(ClusterBlockId moved_router_block_id, * the moved blocks, their previous locations and their new locations * after being moved. */ -void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affected); +void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affected, + const vtr::vector_map& block_locs); /** * @brief Removes the route of a traffic flow and updates the links to indicate @@ -251,7 +257,8 @@ void revert_noc_traffic_flow_routes(const t_pl_blocks_to_be_moved& blocks_affect void re_route_traffic_flow(NocTrafficFlowId traffic_flow_id, NocTrafficFlows& noc_traffic_flows_storage, NocStorage& noc_model, - NocRouting& noc_flows_router); + NocRouting& noc_flows_router, + const vtr::vector_map& block_locs); /** * @brief Recompute the NoC costs (aggregate bandwidth and latency) by diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index e8ef8ee393d..64236a42c3b 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1406,7 +1406,7 @@ static e_move_result try_swap(const t_annealing_state* state, NocCostTerms noc_delta_c; // change in NoC cost /* Update the NoC datastructure and costs*/ if (noc_opts.noc) { - find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, g_vpr_ctx.placement().block_locs); // Include the NoC delta costs in the total cost change for this swap delta_c += calculate_noc_cost(noc_delta_c, costs->noc_cost_norm_factors, noc_opts); @@ -1512,21 +1512,18 @@ static e_move_result try_swap(const t_annealing_state* state, } /* Revert the traffic flow routes within the NoC*/ if (noc_opts.noc) { - revert_noc_traffic_flow_routes(blocks_affected); + revert_noc_traffic_flow_routes(blocks_affected, g_vpr_ctx.placement().block_locs); } } move_outcome_stats.delta_cost_norm = delta_c; - move_outcome_stats.delta_bb_cost_norm = bb_delta_c - * costs->bb_cost_norm; - move_outcome_stats.delta_timing_cost_norm = timing_delta_c - * costs->timing_cost_norm; + move_outcome_stats.delta_bb_cost_norm = bb_delta_c * costs->bb_cost_norm; + move_outcome_stats.delta_timing_cost_norm = timing_delta_c * costs->timing_cost_norm; move_outcome_stats.delta_bb_cost_abs = bb_delta_c; move_outcome_stats.delta_timing_cost_abs = timing_delta_c; - LOG_MOVE_STATS_OUTCOME(delta_c, bb_delta_c, timing_delta_c, - (move_outcome ? "ACCEPTED" : "REJECTED"), ""); + LOG_MOVE_STATS_OUTCOME(delta_c, bb_delta_c, timing_delta_c, (move_outcome ? "ACCEPTED" : "REJECTED"), ""); } move_outcome_stats.outcome = move_outcome; @@ -1607,15 +1604,13 @@ static void update_placement_cost_normalization_factors(t_placer_costs* costs, c /* Update the cost normalization factors */ costs->update_norm_factors(); - // update the noc normalization factors if the palcement includes the NoC + // update the noc normalization factors if the placement includes the NoC if (noc_opts.noc) { update_noc_normalization_factors(*costs); } // update the current total placement cost costs->cost = get_total_cost(costs, placer_opts, noc_opts); - - return; } /** diff --git a/vpr/src/place/place_checkpoint.cpp b/vpr/src/place/place_checkpoint.cpp index 86af65142c3..5e36b7ad27d 100644 --- a/vpr/src/place/place_checkpoint.cpp +++ b/vpr/src/place/place_checkpoint.cpp @@ -63,7 +63,7 @@ void restore_best_placement(t_placement_checkpoint& placement_checkpoint, * and need to be re-computed from scratch. */ if (noc_opts.noc) { - reinitialize_noc_routing(costs, {}); + reinitialize_noc_routing(costs, {}, g_vpr_ctx.placement().block_locs); } VTR_LOG("\nCheckpoint restored\n"); From e4e7b8b34e984418b99d5620d6efa41c6526ca0f Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 22 Jul 2024 19:05:15 -0400 Subject: [PATCH 022/146] remove place_ctx.block_locs from move_transactions.cpp --- vpr/src/place/centroid_move_generator.cpp | 12 +- .../place/critical_uniform_move_generator.cpp | 8 +- .../place/feasible_region_move_generator.cpp | 8 +- vpr/src/place/initial_noc_placement.cpp | 4 +- vpr/src/place/manual_move_generator.cpp | 2 +- vpr/src/place/median_move_generator.cpp | 6 +- vpr/src/place/move_transactions.cpp | 26 ++-- vpr/src/place/move_transactions.h | 11 +- vpr/src/place/move_utils.cpp | 145 +++++++++++------- vpr/src/place/move_utils.h | 65 ++++++-- vpr/src/place/noc_place_utils.cpp | 8 +- vpr/src/place/place.cpp | 4 +- vpr/src/place/uniform_move_generator.cpp | 9 +- .../weighted_centroid_move_generator.cpp | 9 +- .../place/weighted_median_move_generator.cpp | 11 +- 15 files changed, 189 insertions(+), 139 deletions(-) diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index a1b8b5fb994..8f9ebf312a8 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -41,11 +41,7 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block const PlacerCriticalities* /*criticalities*/, const vtr::vector_map& block_locs) { // Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - false, - nullptr, - nullptr); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Centroid Move Choose Block %d - rlim %f\n", @@ -84,7 +80,7 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { @@ -135,7 +131,7 @@ void CentroidMoveGenerator::initialize_noc_groups(size_t high_fanout_net) { const auto router_block_type = cluster_ctx.clb_nlist.block_type(router_blk_ids[0]); // iterate over logical NoC routers and start a BFS - for (auto router_blk_id : router_blk_ids) { + for (ClusterBlockId router_blk_id : router_blk_ids) { if (block_visited[router_blk_id]) { continue; @@ -181,7 +177,7 @@ void CentroidMoveGenerator::initialize_noc_groups(size_t high_fanout_net) { } if (cluster_ctx.clb_nlist.pin_type(pin_id) == PinType::DRIVER) { - for (auto sink_pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId sink_pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { ClusterBlockId sink_block_id = cluster_ctx.clb_nlist.pin_block(sink_pin_id); if (!block_visited[sink_block_id]) { block_visited[sink_block_id] = true; diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index 20e24f3b17b..1130a76ef0c 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -14,11 +14,7 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - true, - &net_from, - &pin_from); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, block_locs); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Critical Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -37,7 +33,7 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index e0b887a903d..91b4a024490 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -17,11 +17,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - true, - &net_from, - &pin_from); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, block_locs); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Feasible Region Move Choose Block %di - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -130,7 +126,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index f0899020d19..565a0ee199e 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -232,7 +232,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, block_locs); if (create_move_outcome != e_create_move::ABORT) { - apply_move_blocks(blocks_affected); + apply_move_blocks(blocks_affected, block_locs); NocCostTerms noc_delta_c; find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, block_locs); @@ -251,7 +251,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, checkpoint.save_checkpoint(costs.cost, block_locs); } } else { // The proposed move is rejected - revert_move_blocks(blocks_affected); + revert_move_blocks(blocks_affected, block_locs); revert_noc_traffic_flow_routes(blocks_affected, block_locs); } } diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index b9c2beb0c71..623614d5c16 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -61,6 +61,6 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); return create_move; } diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index b10c0f286b5..301b93b7a2d 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -31,7 +31,9 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ proposed_action.logical_blk_type_index, false, nullptr, - nullptr); + nullptr, + block_locs); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -178,7 +180,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index f36dd4d5e39..3b92426c070 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -4,16 +4,17 @@ #include "place_util.h" //Records that block 'blk' should be moved to the specified 'to' location -e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId blk, t_pl_loc to) { +e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId blk, + t_pl_loc to, + const vtr::vector_map& block_locs) { auto res = blocks_affected.moved_to.emplace(to); if (!res.second) { log_move_abort("duplicate block move to location"); return e_block_move_result::ABORT; } - auto& place_ctx = g_vpr_ctx.mutable_placement(); - - t_pl_loc from = place_ctx.block_locs[blk].loc; + t_pl_loc from = block_locs[blk].loc; auto res2 = blocks_affected.moved_from.emplace(from); if (!res2.second) { @@ -21,7 +22,7 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, return e_block_move_result::ABORT; } - VTR_ASSERT_SAFE(to.sub_tile < int(place_ctx.grid_blocks.num_blocks_at_location({to.x, to.y, to.layer}))); + VTR_ASSERT_SAFE(to.sub_tile < int(g_vpr_ctx.placement().grid_blocks.num_blocks_at_location({to.x, to.y, to.layer}))); // Sets up the blocks moved int imoved_blk = blocks_affected.num_moved_blocks; @@ -34,8 +35,8 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, } //Moves the blocks in blocks_affected to their new locations -void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); +void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, + vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); //Swap the blocks, but don't swap the nets or update place_ctx.grid_blocks @@ -47,7 +48,7 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { const t_pl_loc& new_loc = blocks_affected.moved_blocks[iblk].new_loc; // move the block to its new location - place_ctx.block_locs[blk].loc = new_loc; + block_locs[blk].loc = new_loc; // get physical tile type of the old location t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); @@ -92,8 +93,8 @@ void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { } //Moves the blocks in blocks_affected to their old locations -void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); +void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, + vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); // Swap the blocks back, nets not yet swapped they don't need to be changed @@ -104,7 +105,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { const t_pl_loc& new_loc = blocks_affected.moved_blocks[iblk].new_loc; // return the block to where it was before the swap - place_ctx.block_locs[blk].loc = old_loc; + block_locs[blk].loc = old_loc; // get physical tile type of the old location t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); @@ -116,7 +117,8 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { place_sync_external_block_connections(blk); } - VTR_ASSERT_SAFE_MSG(place_ctx.grid_blocks.block_at_location(old_loc) == blk, "Grid blocks should only have been updated if swap committed (not reverted)"); + VTR_ASSERT_SAFE_MSG(g_vpr_ctx.placement().grid_blocks.block_at_location(old_loc) == blk, + "Grid blocks should only have been updated if swap committed (not reverted)"); } } diff --git a/vpr/src/place/move_transactions.h b/vpr/src/place/move_transactions.h index 27dd2b1b3c6..c2216c59a9f 100644 --- a/vpr/src/place/move_transactions.h +++ b/vpr/src/place/move_transactions.h @@ -52,13 +52,18 @@ enum class e_block_move_result { INVERT_VALID //Completed inverted move }; -e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId blk, t_pl_loc to); +e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId blk, + t_pl_loc to, + const vtr::vector_map& block_locs); -void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); +void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, + vtr::vector_map& block_locs); void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); -void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); +void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, + vtr::vector_map& block_locs); void clear_move_blocks(t_pl_blocks_to_be_moved& blocks_affected); diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 8c6ae2a6249..5b1a7e27151 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -38,8 +38,11 @@ void report_aborted_moves() { } } -e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to) { - e_block_move_result outcome = find_affected_blocks(blocks_affected, b_from, to); +e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId b_from, + t_pl_loc to, + const vtr::vector_map& block_locs) { + e_block_move_result outcome = find_affected_blocks(blocks_affected, b_from, to, block_locs); if (outcome == e_block_move_result::INVERT) { //Try inverting the swap direction @@ -51,9 +54,9 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlock log_move_abort("inverted move no to block"); outcome = e_block_move_result::ABORT; } else { - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; - outcome = find_affected_blocks(blocks_affected, b_to, from); + outcome = find_affected_blocks(blocks_affected, b_to, from, block_locs); if (outcome == e_block_move_result::INVERT) { log_move_abort("inverted move recursion"); @@ -71,7 +74,10 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlock } } -e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to) { +e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId b_from, + t_pl_loc to, + const vtr::vector_map& block_locs) { /* Finds and set ups the affected_blocks array. * Returns abort_swap. */ VTR_ASSERT_SAFE(b_from); @@ -81,7 +87,7 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte auto& place_ctx = g_vpr_ctx.placement(); - t_pl_loc from = place_ctx.block_locs[b_from].loc; + t_pl_loc from = block_locs[b_from].loc; auto& pl_macros = place_ctx.pl_macros; @@ -93,7 +99,7 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte t_pl_offset swap_offset = to - from; int imember_from = 0; - outcome = record_macro_swaps(blocks_affected, imacro_from, imember_from, swap_offset); + outcome = record_macro_swaps(blocks_affected, imacro_from, imember_from, swap_offset, block_locs); VTR_ASSERT_SAFE(outcome != e_block_move_result::VALID || imember_from == int(pl_macros[imacro_from].members.size())); @@ -110,7 +116,7 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte outcome = e_block_move_result::INVERT; } else { // This is not a macro - I could use the from and to info from before - outcome = record_single_block_swap(blocks_affected, b_from, to); + outcome = record_single_block_swap(blocks_affected, b_from, to, block_locs); } } // Finish handling cases for blocks in macro and otherwise @@ -118,7 +124,10 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte return outcome; } -e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to) { +e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId b_from, + t_pl_loc to, + const vtr::vector_map& block_locs) { /* Find all the blocks affected when b_from is swapped with b_to. * Returns abort_swap. */ @@ -126,7 +135,7 @@ e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_aff auto& place_ctx = g_vpr_ctx.mutable_placement(); - if (place_ctx.block_locs[b_from].is_fixed) { + if (block_locs[b_from].is_fixed) { return e_block_move_result::ABORT; } @@ -134,32 +143,32 @@ e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_aff ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(to); - t_pl_loc curr_from = place_ctx.block_locs[b_from].loc; + t_pl_loc curr_from = block_locs[b_from].loc; e_block_move_result outcome = e_block_move_result::VALID; // Check whether the to_location is empty if (b_to == EMPTY_BLOCK_ID) { // Sets up the blocks moved - outcome = record_block_move(blocks_affected, b_from, to); + outcome = record_block_move(blocks_affected, b_from, to, block_locs); } else if (b_to != INVALID_BLOCK_ID) { // Check whether block to is compatible with from location if (b_to != EMPTY_BLOCK_ID && b_to != INVALID_BLOCK_ID) { - if (!(is_legal_swap_to_location(b_to, curr_from)) || place_ctx.block_locs[b_to].is_fixed) { + if (!(is_legal_swap_to_location(b_to, curr_from, block_locs)) || block_locs[b_to].is_fixed) { return e_block_move_result::ABORT; } } // Sets up the blocks moved - outcome = record_block_move(blocks_affected, b_from, to); + outcome = record_block_move(blocks_affected, b_from, to, block_locs); if (outcome != e_block_move_result::VALID) { return outcome; } - t_pl_loc from = place_ctx.block_locs[b_from].loc; - outcome = record_block_move(blocks_affected, b_to, from); + t_pl_loc from = block_locs[b_from].loc; + outcome = record_block_move(blocks_affected, b_to, from, block_locs); } // Finish swapping the blocks and setting up blocks_affected @@ -169,7 +178,11 @@ e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_aff //Records all the block movements required to move the macro imacro_from starting at member imember_from //to a new position offset from its current position by swap_offset. The new location may be a //single (non-macro) block, or another macro. -e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, int& imember_from, t_pl_offset swap_offset) { +e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, + const int imacro_from, + int& imember_from, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.placement(); auto& pl_macros = place_ctx.pl_macros; @@ -180,7 +193,7 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, // cannot use the old from and to info ClusterBlockId curr_b_from = pl_macros[imacro_from].members[imember_from].blk_index; - t_pl_loc curr_from = place_ctx.block_locs[curr_b_from].loc; + t_pl_loc curr_from = block_locs[curr_b_from].loc; t_pl_loc curr_to = curr_from + swap_offset; @@ -190,8 +203,8 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, // * match the correct block type // //Note that we need to explicitly check that the types match, since the device floorplan is not - //(neccessarily) translationally invariant for an arbitrary macro - if (!is_legal_swap_to_location(curr_b_from, curr_to)) { + //(necessarily) translationally invariant for an arbitrary macro + if (!is_legal_swap_to_location(curr_b_from, curr_to, block_locs)) { log_move_abort("macro_from swap to location illegal"); outcome = e_block_move_result::ABORT; } else { @@ -203,11 +216,11 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, //To block is a macro if (imacro_from == imacro_to) { - outcome = record_macro_self_swaps(blocks_affected, imacro_from, swap_offset); + outcome = record_macro_self_swaps(blocks_affected, imacro_from, swap_offset, block_locs); imember_from = pl_macros[imacro_from].members.size(); break; //record_macro_self_swaps() handles this case completely, so we don't need to continue the loop } else { - outcome = record_macro_macro_swaps(blocks_affected, imacro_from, imember_from, imacro_to, b_to, swap_offset); + outcome = record_macro_macro_swaps(blocks_affected, imacro_from, imember_from, imacro_to, b_to, swap_offset, block_locs); if (outcome == e_block_move_result::INVERT_VALID) { break; //The move was inverted and successfully proposed, don't need to continue the loop } @@ -215,7 +228,7 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, } } else { //To block is not a macro - outcome = record_single_block_swap(blocks_affected, curr_b_from, curr_to); + outcome = record_single_block_swap(blocks_affected, curr_b_from, curr_to, block_locs); } } } // Finish going through all the blocks in the macro @@ -225,7 +238,13 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, //Records all the block movements required to move the macro imacro_from starting at member imember_from //to a new position offset from its current position by swap_offset. The new location must be where //blk_to is located and blk_to must be part of imacro_to. -e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, int& imember_from, const int imacro_to, ClusterBlockId blk_to, t_pl_offset swap_offset) { +e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, + const int imacro_from, + int& imember_from, + const int imacro_to, + ClusterBlockId blk_to, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs) { //Adds the macro imacro_to to the set of affected block caused by swapping 'blk_to' to its //new position. // @@ -242,7 +261,7 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff //allows these blocks to swap) if (place_ctx.pl_macros[imacro_to].members[0].blk_index != blk_to) { int imember_to = 0; - auto outcome = record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset); + auto outcome = record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset, block_locs); if (outcome == e_block_move_result::INVERT) { log_move_abort("invert recursion2"); outcome = e_block_move_result::ABORT; @@ -254,7 +273,7 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff //From/To blocks should be exactly the swap offset appart ClusterBlockId blk_from = place_ctx.pl_macros[imacro_from].members[imember_from].blk_index; - VTR_ASSERT_SAFE(place_ctx.block_locs[blk_from].loc + swap_offset == place_ctx.block_locs[blk_to].loc); + VTR_ASSERT_SAFE(block_locs[blk_from].loc + swap_offset == block_locs[blk_to].loc); //Continue walking along the overlapping parts of the from and to macros, recording //each block swap. @@ -282,25 +301,25 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff ClusterBlockId b_from = place_ctx.pl_macros[imacro_from].members[imember_from].blk_index; - t_pl_loc curr_to = place_ctx.block_locs[b_from].loc + swap_offset; - t_pl_loc curr_from = place_ctx.block_locs[b_from].loc; + t_pl_loc curr_to = block_locs[b_from].loc + swap_offset; + t_pl_loc curr_from = block_locs[b_from].loc; ClusterBlockId b_to = place_ctx.pl_macros[imacro_to].members[imember_to].blk_index; - VTR_ASSERT_SAFE(curr_to == place_ctx.block_locs[b_to].loc); + VTR_ASSERT_SAFE(curr_to == block_locs[b_to].loc); // Check whether block to is compatible with from location if (b_to != EMPTY_BLOCK_ID && b_to != INVALID_BLOCK_ID) { - if (!(is_legal_swap_to_location(b_to, curr_from))) { + if (!(is_legal_swap_to_location(b_to, curr_from, block_locs))) { return e_block_move_result::ABORT; } } - if (!is_legal_swap_to_location(b_from, curr_to)) { + if (!is_legal_swap_to_location(b_from, curr_to, block_locs)) { log_move_abort("macro_from swap to location illegal"); return e_block_move_result::ABORT; } - auto outcome = record_single_block_swap(blocks_affected, b_from, curr_to); + auto outcome = record_single_block_swap(blocks_affected, b_from, curr_to, block_locs); if (outcome != e_block_move_result::VALID) { return outcome; } @@ -311,7 +330,7 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff // //Swap the remainder of the 'to' macro to locations after the 'from' macro. //Note that we are swapping in the opposite direction so the swap offsets are inverted. - return record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset); + return record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset, block_locs); } return e_block_move_result::VALID; @@ -326,22 +345,23 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, std::vector& displaced_blocks, const int imacro, - t_pl_offset swap_offset) { + t_pl_offset swap_offset, + const vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.placement(); for (const t_pl_macro_member& member : place_ctx.pl_macros[imacro].members) { - t_pl_loc from = place_ctx.block_locs[member.blk_index].loc; + t_pl_loc from = block_locs[member.blk_index].loc; t_pl_loc to = from + swap_offset; - if (!is_legal_swap_to_location(member.blk_index, to)) { + if (!is_legal_swap_to_location(member.blk_index, to, block_locs)) { log_move_abort("macro move to location illegal"); return e_block_move_result::ABORT; } ClusterBlockId blk_to = place_ctx.grid_blocks.block_at_location(to); - record_block_move(blocks_affected, member.blk_index, to); + record_block_move(blocks_affected, member.blk_index, to, block_locs); int imacro_to = -1; get_imacro_from_iblk(&imacro_to, blk_to, place_ctx.pl_macros); @@ -355,17 +375,20 @@ e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, //Returns the set of macros affected by moving imacro by the specified offset // //The resulting 'macros' may contain duplicates -e_block_move_result identify_macro_self_swap_affected_macros(std::vector& macros, const int imacro, t_pl_offset swap_offset) { +e_block_move_result identify_macro_self_swap_affected_macros(std::vector& macros, + const int imacro, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs) { e_block_move_result outcome = e_block_move_result::VALID; auto& place_ctx = g_vpr_ctx.placement(); for (size_t imember = 0; imember < place_ctx.pl_macros[imacro].members.size() && outcome == e_block_move_result::VALID; ++imember) { ClusterBlockId blk = place_ctx.pl_macros[imacro].members[imember].blk_index; - t_pl_loc from = place_ctx.block_locs[blk].loc; + t_pl_loc from = block_locs[blk].loc; t_pl_loc to = from + swap_offset; - if (!is_legal_swap_to_location(blk, to)) { + if (!is_legal_swap_to_location(blk, to, block_locs)) { log_move_abort("macro move to location illegal"); return e_block_move_result::ABORT; } @@ -379,7 +402,7 @@ e_block_move_result identify_macro_self_swap_affected_macros(std::vector& m auto itr = std::find(macros.begin(), macros.end(), imacro_to); if (itr == macros.end()) { macros.push_back(imacro_to); - outcome = identify_macro_self_swap_affected_macros(macros, imacro_to, swap_offset); + outcome = identify_macro_self_swap_affected_macros(macros, imacro_to, swap_offset, block_locs); } } } @@ -388,7 +411,8 @@ e_block_move_result identify_macro_self_swap_affected_macros(std::vector& m e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro, - t_pl_offset swap_offset) { + t_pl_offset swap_offset, + const vtr::vector_map& block_locs) { auto& place_ctx = g_vpr_ctx.placement(); //Reset any partial move @@ -396,8 +420,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe //Collect the macros affected std::vector affected_macros; - auto outcome = identify_macro_self_swap_affected_macros(affected_macros, imacro, - swap_offset); + auto outcome = identify_macro_self_swap_affected_macros(affected_macros, imacro, swap_offset, block_locs); if (outcome != e_block_move_result::VALID) { return outcome; @@ -410,7 +433,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe //Move all the affected macros by the offset for (int imacro_affected : affected_macros) { - outcome = record_macro_move(blocks_affected, displaced_blocks, imacro_affected, swap_offset); + outcome = record_macro_move(blocks_affected, displaced_blocks, imacro_affected, swap_offset, block_locs); if (outcome != e_block_move_result::VALID) { return outcome; @@ -438,14 +461,16 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe //Fit the displaced blocks into the empty locations auto loc_itr = empty_locs.begin(); for (auto blk : non_macro_displaced_blocks) { - outcome = record_block_move(blocks_affected, blk, *loc_itr); + outcome = record_block_move(blocks_affected, blk, *loc_itr, block_locs); ++loc_itr; } return outcome; } -bool is_legal_swap_to_location(ClusterBlockId blk, t_pl_loc to) { +bool is_legal_swap_to_location(ClusterBlockId blk, + t_pl_loc to, + const vtr::vector_map& block_locs) { //Make sure that the swap_to location is valid //It must be: // * on chip, and @@ -473,9 +498,9 @@ bool is_legal_swap_to_location(ClusterBlockId blk, t_pl_loc to) { return false; } // If the destination block is user constrained, abort this swap - auto b_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(to); if (b_to != INVALID_BLOCK_ID && b_to != EMPTY_BLOCK_ID) { - if (place_ctx.block_locs[b_to].is_fixed) { + if (block_locs[b_to].is_fixed) { return false; } } @@ -565,14 +590,15 @@ ClusterBlockId propose_block_to_move(const t_placer_opts& /* placer_opts */, int& logical_blk_type_index, bool highly_crit_block, ClusterNetId* net_from, - int* pin_from) { + int* pin_from, + const vtr::vector_map& block_locs) { #endif ClusterBlockId b_from = ClusterBlockId::INVALID(); auto& cluster_ctx = g_vpr_ctx.clustering(); if (logical_blk_type_index == -1) { //If the block type is unspecified, choose any random block to be swapped with another random block if (highly_crit_block) { - b_from = pick_from_highly_critical_block(*net_from, *pin_from); + b_from = pick_from_highly_critical_block(*net_from, *pin_from, block_locs); } else { b_from = pick_from_block(); } @@ -583,7 +609,7 @@ ClusterBlockId propose_block_to_move(const t_placer_opts& /* placer_opts */, } } else { //If the block type is specified, choose a random block with blk_type to be swapped with another random block if (highly_crit_block) { - b_from = pick_from_highly_critical_block(*net_from, *pin_from, logical_blk_type_index); + b_from = pick_from_highly_critical_block(*net_from, *pin_from, logical_blk_type_index, block_locs); } else { b_from = pick_from_block(logical_blk_type_index); } @@ -640,9 +666,10 @@ ClusterBlockId pick_from_block(const int logical_blk_type_index) { //Pick a random highly critical block to be swapped with another random block. //If none is found return ClusterBlockId::INVALID() -ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from) { +ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, + int& pin_from, + const vtr::vector_map& block_locs) { auto& place_move_ctx = g_placer_ctx.move(); - auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); //Initialize critical net and pin to be invalid @@ -658,7 +685,7 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_ std::pair crit_pin = place_move_ctx.highly_crit_pins[vtr::irand(place_move_ctx.highly_crit_pins.size() - 1)]; ClusterBlockId b_from = cluster_ctx.clb_nlist.net_driver_block(crit_pin.first); - if (place_ctx.block_locs[b_from].is_fixed) { + if (block_locs[b_from].is_fixed) { return ClusterBlockId::INVALID(); //Block is fixed, cannot move } @@ -672,9 +699,11 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_ //Pick a random highly critical block with a specified block type to be swapped with another random block. //If none is found return ClusterBlockId::INVALID() -ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, const int logical_blk_type_index) { +ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, + int& pin_from, + const int logical_blk_type_index, + const vtr::vector_map& block_locs) { auto& place_move_ctx = g_placer_ctx.move(); - auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); //Initialize critical net and pin to be invalid @@ -694,7 +723,7 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_ //blk_type from propose move doesn't account for the EMPTY type auto b_from_type = cluster_ctx.clb_nlist.block_type(b_from); if (b_from_type->index == logical_blk_type_index) { - if (place_ctx.block_locs[b_from].is_fixed) { + if (block_locs[b_from].is_fixed) { return ClusterBlockId::INVALID(); //Block is fixed, cannot move } diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index 17cb926c558..7b8366d7287 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -105,7 +105,10 @@ void log_move_abort(std::string_view reason); //Prints a breif report about aborted move reasons and counts void report_aborted_moves(); -e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to); +e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId b_from, + t_pl_loc to, + const vtr::vector_map& block_locs); /** * @brief Find the blocks that will be affected by a move of b_from to to_loc @@ -115,19 +118,45 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlock * @return e_block_move_result ABORT if either of the the moving blocks are already stored, or either of the blocks are fixed, to location is not * compatible, etc. INVERT if the "from" block is a single block and the "to" block is a macro. VALID otherwise. */ -e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to); - -e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to); - -e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, int& imember_from, t_pl_offset swap_offset); -e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, int& imember_from, const int imacro_to, ClusterBlockId blk_to, t_pl_offset swap_offset); +e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId b_from, + t_pl_loc to, + const vtr::vector_map& block_locs); + +e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_affected, + ClusterBlockId b_from, + t_pl_loc to, + const vtr::vector_map& block_locs); + +e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, + const int imacro_from, + int& imember_from, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs); + +e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, + const int imacro_from, + int& imember_from, + const int imacro_to, + ClusterBlockId blk_to, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs); e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, std::vector& displaced_blocks, const int imacro, - t_pl_offset swap_offset); -e_block_move_result identify_macro_self_swap_affected_macros(std::vector& macros, const int imacro, t_pl_offset swap_offset); -e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro, t_pl_offset swap_offset); + t_pl_offset swap_offset, + const vtr::vector_map& block_locs); + +e_block_move_result identify_macro_self_swap_affected_macros(std::vector& macros, + const int imacro, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs); + +e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affected, + const int imacro, + t_pl_offset swap_offset, + const vtr::vector_map& block_locs); /** * @brief Check whether the "to" location is legal for the given "blk" @@ -135,7 +164,9 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe * @param to * @return True if this would be a legal move, false otherwise */ -bool is_legal_swap_to_location(ClusterBlockId blk, t_pl_loc to); +bool is_legal_swap_to_location(ClusterBlockId blk, + t_pl_loc to, + const vtr::vector_map& block_locs); std::set determine_locations_emptied_by_move(t_pl_blocks_to_be_moved& blocks_affected); @@ -153,7 +184,8 @@ ClusterBlockId propose_block_to_move(const t_placer_opts& placer_opts, int& logical_blk_type_index, bool highly_crit_block, ClusterNetId* net_from, - int* pin_from); + int* pin_from, + const vtr::vector_map& block_locs); /** * Returns all movable clustered blocks with a specified logical block type. @@ -183,7 +215,9 @@ ClusterBlockId pick_from_block(int logical_blk_type_index); * * @return BlockId of the selected block, ClusterBlockId::INVALID() if no block with specified block type found */ -ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from); +ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, + int& pin_from, + const vtr::vector_map& block_locs); /** * @brief Find a block with a specific block type to be swapped with another block @@ -192,7 +226,10 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_ * * @return BlockId of the selected block, ClusterBlockId::INVALID() if no block with specified block type found */ -ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, int logical_blk_type_index); +ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, + int& pin_from, + int logical_blk_type_index, + const vtr::vector_map& block_locs); bool find_to_loc_uniform(t_logical_block_type_ptr type, float rlim, diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index 602c69c09d2..31af13c2c7d 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -161,8 +161,7 @@ void find_affected_noc_routers_and_update_noc_costs(const t_pl_blocks_to_be_move // calculate the new aggregate bandwidth and latency costs for the affected traffic flow proposed_traffic_flow_costs[traffic_flow_id].aggregate_bandwidth = calculate_traffic_flow_aggregate_bandwidth_cost(traffic_flow_route, curr_traffic_flow); std::tie(proposed_traffic_flow_costs[traffic_flow_id].latency, - proposed_traffic_flow_costs[traffic_flow_id].latency_overrun) - = calculate_traffic_flow_latency_cost(traffic_flow_route, noc_ctx.noc_model, curr_traffic_flow); + proposed_traffic_flow_costs[traffic_flow_id].latency_overrun) = calculate_traffic_flow_latency_cost(traffic_flow_route, noc_ctx.noc_model, curr_traffic_flow); // compute how much the aggregate bandwidth and latency costs change with this swap delta_c.aggregate_bandwidth += proposed_traffic_flow_costs[traffic_flow_id].aggregate_bandwidth - traffic_flow_costs[traffic_flow_id].aggregate_bandwidth; @@ -210,9 +209,6 @@ std::vector& route_traffic_flow(NocTrafficFlowId traffic_flow_id, NocTrafficFlows& noc_traffic_flows_storage, NocRouting& noc_flows_router, const vtr::vector_map& block_locs) { - // provides the positions where the affected blocks have moved to - auto& place_ctx = g_vpr_ctx.placement(); - // get the traffic flow with the current id const t_noc_traffic_flow& curr_traffic_flow = noc_traffic_flows_storage.get_single_noc_traffic_flow(traffic_flow_id); @@ -856,7 +852,7 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 64236a42c3b..0f4db0569dc 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1340,7 +1340,7 @@ static e_move_result try_swap(const t_annealing_state* state, */ /* Update the block positions */ - apply_move_blocks(blocks_affected); + apply_move_blocks(blocks_affected, g_vpr_ctx.mutable_placement().block_locs); //Find all the nets affected by this swap and update the wiring costs. //This cost value doesn't depend on the timing info. @@ -1478,7 +1478,7 @@ static e_move_result try_swap(const t_annealing_state* state, reset_move_nets(num_nets_affected); /* Restore the place_ctx.block_locs data structures to their state before the move. */ - revert_move_blocks(blocks_affected); + revert_move_blocks(blocks_affected, g_vpr_ctx.mutable_placement().block_locs); if (place_algorithm == SLACK_TIMING_PLACE) { /* Revert the timing delays and costs to pre-update values. */ diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index 48c8548e4c6..7c8acfefd66 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -10,11 +10,8 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks const PlacerCriticalities* /*criticalities*/, const vtr::vector_map& block_locs) { //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - false, - nullptr, - nullptr); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -48,7 +45,7 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks VTR_LOG("\n"); #endif - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index 46af9610dfe..22d958d3423 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -11,11 +11,8 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move const PlacerCriticalities* criticalities, const vtr::vector_map& block_locs) { //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - false, - nullptr, - nullptr); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Centroid Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -49,7 +46,7 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index a529bda8002..a1bffc66a68 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -1,7 +1,7 @@ #include "weighted_median_move_generator.h" #include "globals.h" #include -#include "math.h" +#include #include "place_constraints.h" #include "move_utils.h" @@ -21,11 +21,8 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& const PlacerCriticalities* criticalities, const vtr::vector_map& block_locs) { //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, - proposed_action.logical_blk_type_index, - false, - nullptr, - nullptr); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -137,7 +134,7 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { From 3febe663f9c4951b19ac683c0ecc692f8da2d31a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 23 Jul 2024 10:05:54 -0400 Subject: [PATCH 023/146] remove place_ctx.block_locs from noc_routing_has_cycle() --- vpr/src/place/initial_noc_placement.cpp | 2 +- vpr/src/place/noc_place_utils.cpp | 10 +++++----- vpr/src/place/noc_place_utils.h | 5 +++-- vpr/src/place/place.cpp | 4 +--- vpr/src/place/place_delay_model.cpp | 8 +++----- vpr/src/place/placer_context.h | 4 +--- 6 files changed, 14 insertions(+), 19 deletions(-) diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 565a0ee199e..ab185fc8474 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -297,7 +297,7 @@ void initial_noc_placement(const t_noc_opts& noc_opts, noc_routers_anneal(noc_opts, block_locs); // check if there is any cycles - bool has_cycle = noc_routing_has_cycle(); + bool has_cycle = noc_routing_has_cycle(block_locs); if (has_cycle) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "At least one cycle was found in NoC channel dependency graph. This may cause a deadlock " diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index 31af13c2c7d..f8f28b1855f 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -916,25 +916,25 @@ void write_noc_placement_file(const std::string& file_name, noc_placement_file.close(); } -bool noc_routing_has_cycle() { +bool noc_routing_has_cycle(const vtr::vector_map& block_locs) { // used to access traffic flow routes const auto& noc_ctx = g_vpr_ctx.noc(); // get all traffic flow routes const auto& traffic_flow_routes = noc_ctx.noc_traffic_flows_storage.get_all_traffic_flow_routes(); - bool has_cycle = noc_routing_has_cycle(traffic_flow_routes); + bool has_cycle = noc_routing_has_cycle(traffic_flow_routes, block_locs); return has_cycle; } -bool noc_routing_has_cycle(const vtr::vector>& routes) { +bool noc_routing_has_cycle(const vtr::vector>& routes, + const vtr::vector_map& block_locs) { const auto& noc_ctx = g_vpr_ctx.noc(); - const auto& place_ctx = g_vpr_ctx.placement(); ChannelDependencyGraph channel_dependency_graph(noc_ctx.noc_model, noc_ctx.noc_traffic_flows_storage, routes, - place_ctx.block_locs); + block_locs); bool has_cycles = channel_dependency_graph.has_cycles(); diff --git a/vpr/src/place/noc_place_utils.h b/vpr/src/place/noc_place_utils.h index 681ea7ecf25..dbd54724182 100644 --- a/vpr/src/place/noc_place_utils.h +++ b/vpr/src/place/noc_place_utils.h @@ -572,7 +572,7 @@ void write_noc_placement_file(const std::string& file_name, * * @return bool Indicates whether NoC traffic flow routes form a cycle. */ -bool noc_routing_has_cycle(); +bool noc_routing_has_cycle(const vtr::vector_map& block_locs); /** * @brief Check if the channel dependency graph created from the given traffic flow routes @@ -580,7 +580,8 @@ bool noc_routing_has_cycle(); * @param routes The user provided traffic flow routes. * @return True if there is any cycles in the channel dependency graph. */ -bool noc_routing_has_cycle(const vtr::vector>& routes); +bool noc_routing_has_cycle(const vtr::vector>& routes, + const vtr::vector_map& block_locs); /** * @brief Invokes NoC SAT router and print new NoC cost terms after SAT router diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 0f4db0569dc..b314c058b94 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1534,8 +1534,6 @@ static e_move_result try_swap(const t_annealing_state* state, if (!router_block_move) { calculate_reward_and_process_outcome(placer_opts, move_outcome_stats, delta_c, timing_bb_factor, move_generator); - } else { -// std::cout << "Group move delta cost: " << delta_c << std::endl; } #ifdef VTR_ENABLE_DEBUG_LOGGING @@ -1965,7 +1963,7 @@ static void check_place(const t_placer_costs& costs, // check the NoC costs during placement if the user is using the NoC supported flow error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts, g_vpr_ctx.placement().block_locs); // make sure NoC routing configuration does not create any cycles in CDG - error += (int)noc_routing_has_cycle(); + error += (int)noc_routing_has_cycle(g_vpr_ctx.placement().block_locs); } if (error == 0) { diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index 8f9e440d621..e1399d8f8a0 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -382,10 +382,8 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, Cluste * In particular this approach does not accurately capture the effect * of fast carry-chain connections. */ - delay_source_to_sink = delay_model->delay({source_x, source_y, source_layer}, - source_block_ipin, - {sink_x, sink_y, sink_layer}, - sink_block_ipin); + delay_source_to_sink = delay_model->delay({source_x, source_y, source_layer}, source_block_ipin, + {sink_x, sink_y, sink_layer}, sink_block_ipin); if (delay_source_to_sink < 0) { VPR_ERROR(VPR_ERROR_PLACE, "in comp_td_single_connection_delay: Bad delay_source_to_sink value %g from %s (at %d,%d) to %s (at %d,%d)\n" @@ -407,7 +405,7 @@ void comp_td_connection_delays(const PlaceDelayModel* delay_model) { auto& p_timing_ctx = g_placer_ctx.mutable_timing(); auto& connection_delay = p_timing_ctx.connection_delay; - for (auto net_id : cluster_ctx.clb_nlist.nets()) { + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ++ipin) { connection_delay[net_id][ipin] = comp_td_single_connection_delay(delay_model, net_id, ipin); } diff --git a/vpr/src/place/placer_context.h b/vpr/src/place/placer_context.h index 5a7e4c6860f..fcc49ce99d9 100644 --- a/vpr/src/place/placer_context.h +++ b/vpr/src/place/placer_context.h @@ -51,8 +51,6 @@ struct PlacerTimingContext : public Context { /** * @brief Net connection timing costs (i.e. criticality * delay) * of committed block positions. See PlacerTimingCosts. - * - * */ PlacerTimingCosts connection_timing_cost; @@ -106,7 +104,7 @@ struct PlacerMoveContext : public Context { // [0..cluster_ctx.clb_nlist.nets().size()-1]. Store the number of blocks on each layer () vtr::Matrix num_sink_pin_layer; - // The first range limit calculated by the anneal + // The first range limit calculated by the annealer float first_rlim; // Scratch vectors that are used by different directed moves for temporary calculations (allocated here to save runtime) From e68dd7a5f3335831cf5ff1c1abee8162018d1835 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 23 Jul 2024 10:33:55 -0400 Subject: [PATCH 024/146] remove place_ctx.block_locs from placement_checkpoint --- vpr/src/place/place.cpp | 7 +++-- vpr/src/place/place_checkpoint.cpp | 49 ++++++++++++++++++------------ vpr/src/place/place_checkpoint.h | 44 ++++++++++++++++++--------- vpr/src/place/place_util.cpp | 28 ++++++++--------- vpr/src/place/place_util.h | 5 +-- 5 files changed, 79 insertions(+), 54 deletions(-) diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index b314c058b94..4f660025653 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -737,7 +737,8 @@ void try_place(const Netlist<>& net_list, if (placer_opts.place_checkpointing && agent_state == e_agent_state::LATE_IN_THE_ANNEAL) { - save_placement_checkpoint_if_needed(placement_checkpoint, + save_placement_checkpoint_if_needed(g_vpr_ctx.placement().block_locs, + placement_checkpoint, timing_info, costs, critical_path.delay()); } } @@ -859,7 +860,9 @@ void try_place(const Netlist<>& net_list, //See if our latest checkpoint is better than the current placement solution if (placer_opts.place_checkpointing) - restore_best_placement(placement_checkpoint, timing_info, costs, + restore_best_placement(g_vpr_ctx.mutable_placement().block_locs, + g_vpr_ctx.mutable_placement().grid_blocks, + placement_checkpoint, timing_info, costs, placer_criticalities, placer_setup_slacks, place_delay_model, pin_timing_invalidator, crit_params, noc_opts); diff --git a/vpr/src/place/place_checkpoint.cpp b/vpr/src/place/place_checkpoint.cpp index 5e36b7ad27d..9775550c50b 100644 --- a/vpr/src/place/place_checkpoint.cpp +++ b/vpr/src/place/place_checkpoint.cpp @@ -1,33 +1,42 @@ #include "place_checkpoint.h" #include "noc_place_utils.h" -float t_placement_checkpoint::get_cp_cpd() { return cpd; } -double t_placement_checkpoint::get_cp_bb_cost() { return costs.bb_cost; } -bool t_placement_checkpoint::cp_is_valid() { return valid; } +float t_placement_checkpoint::get_cp_cpd() const { return cpd_; } -void t_placement_checkpoint::save_placement(const t_placer_costs& placement_costs, const float& critical_path_delay) { - auto& place_ctx = g_vpr_ctx.placement(); - block_locs = place_ctx.block_locs; - valid = true; - cpd = critical_path_delay; - costs = placement_costs; +double t_placement_checkpoint::get_cp_bb_cost() const { return costs_.bb_cost; } + +bool t_placement_checkpoint::cp_is_valid() const { return valid_; } + +void t_placement_checkpoint::save_placement(const vtr::vector_map& block_locs, + const t_placer_costs& placement_costs, + const float critical_path_delay) { + block_locs_ = block_locs; + valid_ = true; + cpd_ = critical_path_delay; + costs_ = placement_costs; } -t_placer_costs t_placement_checkpoint::restore_placement() { - auto& mutable_place_ctx = g_vpr_ctx.mutable_placement(); - mutable_place_ctx.block_locs = block_locs; - load_grid_blocks_from_block_locs(); - return costs; +t_placer_costs t_placement_checkpoint::restore_placement(vtr::vector_map& block_locs, + GridBlock& grid_blocks) { + block_locs = block_locs_; + load_grid_blocks_from_block_locs(grid_blocks, block_locs); + return costs_; } -void save_placement_checkpoint_if_needed(t_placement_checkpoint& placement_checkpoint, std::shared_ptr timing_info, t_placer_costs& costs, float cpd) { - if (placement_checkpoint.cp_is_valid() == false || (timing_info->least_slack_critical_path().delay() < placement_checkpoint.get_cp_cpd() && costs.bb_cost <= placement_checkpoint.get_cp_bb_cost())) { - placement_checkpoint.save_placement(costs, cpd); +void save_placement_checkpoint_if_needed(const vtr::vector_map& block_locs, + t_placement_checkpoint& placement_checkpoint, + const std::shared_ptr& timing_info, + t_placer_costs& costs, + float cpd) { + if (!placement_checkpoint.cp_is_valid() || (timing_info->least_slack_critical_path().delay() < placement_checkpoint.get_cp_cpd() && costs.bb_cost <= placement_checkpoint.get_cp_bb_cost())) { + placement_checkpoint.save_placement(block_locs, costs, cpd); VTR_LOG("Checkpoint saved: bb_costs=%g, TD costs=%g, CPD=%7.3f (ns) \n", costs.bb_cost, costs.timing_cost, 1e9 * cpd); } } -void restore_best_placement(t_placement_checkpoint& placement_checkpoint, +void restore_best_placement(vtr::vector_map& block_locs, + GridBlock& grid_blocks, + t_placement_checkpoint& placement_checkpoint, std::shared_ptr& timing_info, t_placer_costs& costs, std::unique_ptr& placer_criticalities, @@ -43,7 +52,7 @@ void restore_best_placement(t_placement_checkpoint& placement_checkpoint, */ if (placement_checkpoint.cp_is_valid() && timing_info->least_slack_critical_path().delay() > placement_checkpoint.get_cp_cpd() && costs.bb_cost * 1.05 > placement_checkpoint.get_cp_bb_cost()) { //restore the latest placement checkpoint - costs = placement_checkpoint.restore_placement(); + costs = placement_checkpoint.restore_placement(block_locs, grid_blocks); //recompute timing from scratch placer_criticalities.get()->set_recompute_required(); @@ -63,7 +72,7 @@ void restore_best_placement(t_placement_checkpoint& placement_checkpoint, * and need to be re-computed from scratch. */ if (noc_opts.noc) { - reinitialize_noc_routing(costs, {}, g_vpr_ctx.placement().block_locs); + reinitialize_noc_routing(costs, {}, block_locs); } VTR_LOG("\nCheckpoint restored\n"); diff --git a/vpr/src/place/place_checkpoint.h b/vpr/src/place/place_checkpoint.h index d3315aca2f2..e52b9451fd3 100644 --- a/vpr/src/place/place_checkpoint.h +++ b/vpr/src/place/place_checkpoint.h @@ -10,12 +10,12 @@ #include "place_delay_model.h" #include "place_timing_update.h" -//Placement checkpoint + /** * @brief Data structure that stores the placement state and saves it as a checkpoint. * * The placement checkpoints are very useful to solve the problem of critical - * delay oscillations, expecially very late in the annealer. + * delay oscillations, especially very late in the annealer. * * @param cost The weighted average of the wiring cost and the timing cost. * @param block_locs saves the location of each block @@ -24,31 +24,47 @@ */ class t_placement_checkpoint { private: - vtr::vector_map block_locs; - float cpd; - bool valid = false; - t_placer_costs costs; + vtr::vector_map block_locs_; + float cpd_; + bool valid_ = false; + t_placer_costs costs_; public: //save the block locations from placement context with the current placement cost and cpd - void save_placement(const t_placer_costs& placement_costs, const float& critical_path_delay); + void save_placement(const vtr::vector_map& block_locs, + const t_placer_costs& placement_costs, + const float critical_path_delay); //restore the placement solution saved in the checkpoint and update the placement context accordingly - t_placer_costs restore_placement(); + t_placer_costs restore_placement(vtr::vector_map& block_locs, + GridBlock& grid_blocks); //return the critical path delay of the saved checkpoint - float get_cp_cpd(); + float get_cp_cpd() const; //return the WL cost of the saved checkpoint - double get_cp_bb_cost(); + double get_cp_bb_cost() const; //return true if the checkpoint is valid - bool cp_is_valid(); + bool cp_is_valid() const; }; -//save placement checkpoint if checkpointing is enabled and checkpoint conditions occured -void save_placement_checkpoint_if_needed(t_placement_checkpoint& placement_checkpoint, std::shared_ptr timing_info, t_placer_costs& costs, float cpd); +//save placement checkpoint if checkpointing is enabled and checkpoint conditions occurred +void save_placement_checkpoint_if_needed(const vtr::vector_map& block_locs, + t_placement_checkpoint& placement_checkpoint, + const std::shared_ptr& timing_info, + t_placer_costs& costs, + float cpd); //restore the checkpoint if it's better than the latest placement solution -void restore_best_placement(t_placement_checkpoint& placement_checkpoint, std::shared_ptr& timing_info, t_placer_costs& costs, std::unique_ptr& placer_criticalities, std::unique_ptr& placer_setup_slacks, std::unique_ptr& place_delay_model, std::unique_ptr& pin_timing_invalidator, PlaceCritParams crit_params, const t_noc_opts& noc_opts); +void restore_best_placement(vtr::vector_map& block_locs, + GridBlock& grid_blocks, + t_placement_checkpoint& placement_checkpoint, + std::shared_ptr& timing_info, + t_placer_costs& costs, + std::unique_ptr& placer_criticalities, + std::unique_ptr& placer_setup_slacks, + std::unique_ptr& place_delay_model, + std::unique_ptr& pin_timing_invalidator, + PlaceCritParams crit_params, const t_noc_opts& noc_opts); #endif diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 9a5b74e98ce..98a7a486c7f 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -272,45 +272,41 @@ double get_std_dev(int n, double sum_x_squared, double av_x) { return (std_dev > 0.) ? sqrt(std_dev) : 0.; } -void load_grid_blocks_from_block_locs() { +void load_grid_blocks_from_block_locs(GridBlock& grid_blocks, + const vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& device_ctx = g_vpr_ctx.device(); - zero_initialize_grid_blocks(); + zero_initialize_grid_blocks(grid_blocks); - auto blocks = cluster_ctx.clb_nlist.blocks(); - for (auto blk_id : blocks) { - t_pl_loc location; - location = place_ctx.block_locs[blk_id].loc; + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc location = block_locs[blk_id].loc; VTR_ASSERT(location.x < (int)device_ctx.grid.width()); VTR_ASSERT(location.y < (int)device_ctx.grid.height()); - place_ctx.grid_blocks.set_block_at_location(location, blk_id); - place_ctx.grid_blocks.set_usage({location.x, location.y, location.layer}, - place_ctx.grid_blocks.get_usage({location.x, location.y, location.layer}) + 1); + grid_blocks.set_block_at_location(location, blk_id); + grid_blocks.set_usage({location.x, location.y, location.layer}, + grid_blocks.get_usage({location.x, location.y, location.layer}) + 1); } } -void zero_initialize_grid_blocks() { +void zero_initialize_grid_blocks(GridBlock& grid_blocks) { auto& device_ctx = g_vpr_ctx.device(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); /* Initialize all occupancy to zero. */ - for (int layer_num = 0; layer_num < (int)device_ctx.grid.get_num_layers(); layer_num++) { for (int i = 0; i < (int)device_ctx.grid.width(); i++) { for (int j = 0; j < (int)device_ctx.grid.height(); j++) { - place_ctx.grid_blocks.set_usage({i, j, layer_num}, 0); + grid_blocks.set_usage({i, j, layer_num}, 0); auto tile = device_ctx.grid.get_physical_type({i, j, layer_num}); for (const auto& sub_tile : tile->sub_tiles) { auto capacity = sub_tile.capacity; for (int k = 0; k < capacity.total(); k++) { - if (place_ctx.grid_blocks.block_at_location({i, j, k + capacity.low, layer_num}) != INVALID_BLOCK_ID) { - place_ctx.grid_blocks.set_block_at_location({i, j, k + capacity.low, layer_num}, EMPTY_BLOCK_ID); + if (grid_blocks.block_at_location({i, j, k + capacity.low, layer_num}) != INVALID_BLOCK_ID) { + grid_blocks.set_block_at_location({i, j, k + capacity.low, layer_num}, EMPTY_BLOCK_ID); } } } diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index 379735f4850..a05a17d352c 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -331,10 +331,11 @@ int get_initial_move_lim(const t_placer_opts& placer_opts, const t_annealing_sch double get_std_dev(int n, double sum_x_squared, double av_x); ///@brief Initialize usage to 0 and blockID to EMPTY_BLOCK_ID for all place_ctx.grid_block locations -void zero_initialize_grid_blocks(); +void zero_initialize_grid_blocks(GridBlock& grid_blocks); ///@brief a utility to calculate grid_blocks given the updated block_locs (used in restore_checkpoint) -void load_grid_blocks_from_block_locs(); +void load_grid_blocks_from_block_locs(GridBlock& grid_blocks, + const vtr::vector_map& block_locs); /** * @brief Builds (alloc and load) legal_pos that holds all the legal locations for placement From 0b9851c5e6a001c51a759094f25e8a8e7c600bf8 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 23 Jul 2024 11:56:10 -0400 Subject: [PATCH 025/146] remove place_ctx.block_locs from read_place.cpp --- vpr/src/base/place_and_route.cpp | 13 ++-- vpr/src/base/read_place.cpp | 102 +++++++++++++++------------- vpr/src/base/read_place.h | 22 +++--- vpr/src/base/vpr_api.cpp | 7 +- vpr/src/base/vpr_signal_handler.cpp | 2 +- vpr/src/place/initial_placement.cpp | 4 +- vpr/src/place/place.cpp | 29 ++++---- 7 files changed, 93 insertions(+), 86 deletions(-) diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 2701b46cc09..66eea89a0bd 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -348,7 +348,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, ScreenUpdatePriority::MINOR, is_flat); - if (success && Fc_clipped == false) { + if (success && !Fc_clipped) { final = current; save_routing(best_routing, route_ctx.clb_opins_used_locally, @@ -357,8 +357,9 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, if (placer_opts.place_freq == PLACE_ALWAYS) { auto& cluster_ctx = g_vpr_ctx.clustering(); // Cluster-based net_list is used for placement - print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str()); + std::string placement_id = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), + filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().block_locs); + g_vpr_ctx.mutable_placement().placement_id = placement_id; } } @@ -562,11 +563,11 @@ static float comp_width(t_chan* chan, float x, float separation) { /** * @brief After placement, logical pins for blocks, and nets must be updated to correspond with physical pins of type. * - * This is required by blocks with capacity > 1 (e.g. typically IOs with multiple instaces in each placement - * gride location). Since they may be swapped around during placement, we need to update which pins the various + * This is required by blocks with capacity > 1 (e.g. typically IOs with multiple instances in each placement + * grid location). Since they may be swapped around during placement, we need to update which pins the various * nets use. * - * This updates both the external inter-block net connecitivity (i.e. the clustered netlist), and the intra-block + * This updates both the external inter-block net connectivity (i.e. the clustered netlist), and the intra-block * connectivity (since the internal pins used also change). * * This function should only be called once diff --git a/vpr/src/base/read_place.cpp b/vpr/src/base/read_place.cpp index 87dc0042e06..c90c8b9e2a6 100644 --- a/vpr/src/base/read_place.cpp +++ b/vpr/src/base/read_place.cpp @@ -17,23 +17,22 @@ #include "read_xml_arch_file.h" #include "place_util.h" -void read_place_header( - std::ifstream& placement_file, - const char* net_file, - const char* place_file, - bool verify_file_hashes, - const DeviceGrid& grid); - -void read_place_body( - std::ifstream& placement_file, - const char* place_file, - bool is_place_file); - -void read_place( - const char* net_file, - const char* place_file, - bool verify_file_digests, - const DeviceGrid& grid) { +static void read_place_header(std::ifstream& placement_file, + const char* net_file, + const char* place_file, + bool verify_file_digests, + const DeviceGrid& grid); + +static std::string read_place_body(std::ifstream& placement_file, + vtr::vector_map& block_locs, + const char* place_file, + bool is_place_file); + +std::string read_place(const char* net_file, + const char* place_file, + vtr::vector_map& block_locs, + bool verify_file_digests, + const DeviceGrid& grid) { std::ifstream fstream(place_file); if (!fstream) { VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, @@ -47,13 +46,16 @@ void read_place( VTR_LOG("\n"); read_place_header(fstream, net_file, place_file, verify_file_digests, grid); - read_place_body(fstream, place_file, is_place_file); + std::string placement_id = read_place_body(fstream, block_locs, place_file, is_place_file); VTR_LOG("Successfully read %s.\n", place_file); VTR_LOG("\n"); + + return placement_id; } -void read_constraints(const char* constraints_file) { +void read_constraints(const char* constraints_file, + vtr::vector_map& block_locs) { std::ifstream fstream(constraints_file); if (!fstream) { VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, @@ -66,7 +68,7 @@ void read_constraints(const char* constraints_file) { VTR_LOG("Reading %s.\n", constraints_file); VTR_LOG("\n"); - read_place_body(fstream, constraints_file, is_place_file); + read_place_body(fstream, block_locs, constraints_file, is_place_file); VTR_LOG("Successfully read constraints file %s.\n", constraints_file); VTR_LOG("\n"); @@ -80,11 +82,11 @@ void read_constraints(const char* constraints_file) { * The verify_file_digests bool is used to decide whether to give a warning or an error if the netlist files do not match. * An error is given if the grid size has changed. */ -void read_place_header(std::ifstream& placement_file, - const char* net_file, - const char* place_file, - bool verify_file_digests, - const DeviceGrid& grid) { +static void read_place_header(std::ifstream& placement_file, + const char* net_file, + const char* place_file, + bool verify_file_digests, + const DeviceGrid& grid) { auto& cluster_ctx = g_vpr_ctx.clustering(); std::string line; @@ -205,11 +207,11 @@ void read_place_header(std::ifstream& placement_file, * The bool is_place_file indicates if the file should be read as a place file (is_place_file = true) * or a constraints file (is_place_file = false). */ -void read_place_body(std::ifstream& placement_file, - const char* place_file, - bool is_place_file) { +static std::string read_place_body(std::ifstream& placement_file, + vtr::vector_map& block_locs, + const char* place_file, + bool is_place_file) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& atom_ctx = g_vpr_ctx.atom(); std::string line; @@ -286,10 +288,10 @@ void read_place_body(std::ifstream& placement_file, //Check if block is listed multiple times with conflicting locations in constraints file if (seen_blocks[blk_id] > 0) { - if (block_x != place_ctx.block_locs[blk_id].loc.x || - block_y != place_ctx.block_locs[blk_id].loc.y || - sub_tile_index != place_ctx.block_locs[blk_id].loc.sub_tile || - block_layer != place_ctx.block_locs[blk_id].loc.layer) { + if (block_x != block_locs[blk_id].loc.x || + block_y != block_locs[blk_id].loc.y || + sub_tile_index != block_locs[blk_id].loc.sub_tile || + block_layer != block_locs[blk_id].loc.layer) { std::string cluster_name = cluster_ctx.clb_nlist.block_name(blk_id); VPR_THROW(VPR_ERROR_PLACE, "The location of cluster %s (#%d) is specified %d times in the constraints file with conflicting locations. \n" @@ -305,12 +307,12 @@ void read_place_body(std::ifstream& placement_file, loc.layer = block_layer; if (seen_blocks[blk_id] == 0) { - set_block_location(blk_id, loc, place_ctx.block_locs); + set_block_location(blk_id, loc, block_locs); } //need to lock down blocks if it is a constraints file if (!is_place_file) { - place_ctx.block_locs[blk_id].is_fixed = true; + block_locs[blk_id].is_fixed = true; } //mark the block as seen @@ -336,7 +338,9 @@ void read_place_body(std::ifstream& placement_file, //Want to make a hash for place file to be used during routing for error checking if (is_place_file) { - place_ctx.placement_id = vtr::secure_digest_file(place_file); + return vtr::secure_digest_file(place_file); + } else { + return {}; } } @@ -346,15 +350,15 @@ void read_place_body(std::ifstream& placement_file, * The architecture and netlist files used to generate this placement are recorded * in the file to avoid loading a placement with the wrong support file later. */ -void print_place(const char* net_file, - const char* net_id, - const char* place_file, - bool is_place_file) { +std::string print_place(const char* net_file, + const char* net_id, + const char* place_file, + const vtr::vector_map& block_locs, + bool is_place_file) { FILE* fp; auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); fp = fopen(place_file, "w"); @@ -367,10 +371,10 @@ void print_place(const char* net_file, fprintf(fp, "#----------\t--\t--\t------\t-----\t------------\n"); } - if (!place_ctx.block_locs.empty()) { //Only if placement exists - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { + if (!block_locs.empty()) { //Only if placement exists + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { // if block is not placed, skip (useful for printing legalizer output) - if (!is_place_file && (place_ctx.block_locs[blk_id].loc.x == INVALID_X)) { + if (!is_place_file && (block_locs[blk_id].loc.x == INVALID_X)) { continue; } fprintf(fp, "%s\t", cluster_ctx.clb_nlist.block_pb(blk_id)->name); @@ -378,15 +382,15 @@ void print_place(const char* net_file, fprintf(fp, "\t"); fprintf(fp, "%d\t%d\t%d\t%d", - place_ctx.block_locs[blk_id].loc.x, - place_ctx.block_locs[blk_id].loc.y, - place_ctx.block_locs[blk_id].loc.sub_tile, - place_ctx.block_locs[blk_id].loc.layer); + block_locs[blk_id].loc.x, + block_locs[blk_id].loc.y, + block_locs[blk_id].loc.sub_tile, + block_locs[blk_id].loc.layer); fprintf(fp, "\t#%zu\n", size_t(blk_id)); } } fclose(fp); //Calculate the ID of the placement - place_ctx.placement_id = vtr::secure_digest_file(place_file); + return vtr::secure_digest_file(place_file); } diff --git a/vpr/src/base/read_place.h b/vpr/src/base/read_place.h index 4dfd9aef82e..9eef4a95702 100644 --- a/vpr/src/base/read_place.h +++ b/vpr/src/base/read_place.h @@ -6,16 +6,17 @@ * It takes in the current netlist file and grid dimensions to check that they match those that were used when placement was generated. * The verify_file_hashes bool is used to decide whether to give a warning or an error if the netlist files do not match. */ -void read_place( - const char* net_file, - const char* place_file, - bool verify_file_hashes, - const DeviceGrid& grid); +std::string read_place(const char* net_file, + const char* place_file, + vtr::vector_map& block_locs, + bool verify_file_hashes, + const DeviceGrid& grid); /** * This function is used to read a constraints file that specifies the desired locations of blocks. */ -void read_constraints(const char* constraints_file); +void read_constraints(const char* constraints_file, + vtr::vector_map& block_locs); /** * This function prints out a place file. @@ -27,9 +28,10 @@ void read_constraints(const char* constraints_file); * will not be included; this file is used as a placement constraints * file when running placement in order to place orphan clusters. */ -void print_place(const char* net_file, - const char* net_id, - const char* place_file, - bool is_place_file = true); +std::string print_place(const char* net_file, + const char* net_id, + const char* place_file, + const vtr::vector_map& block_locs, + bool is_place_file = true); #endif diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index fac75c5fbb3..a23fadcf975 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -820,7 +820,8 @@ void vpr_place(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str()); + filename_opts.PlaceFile.c_str(), + g_vpr_ctx.placement().block_locs); } void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { @@ -834,7 +835,9 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { init_placement_context(); //Load an existing placement from a file - read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), filename_opts.verify_file_digests, device_ctx.grid); + place_ctx.placement_id = read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), + place_ctx.block_locs, + filename_opts.verify_file_digests, device_ctx.grid); //Ensure placement macros are loaded so that they can be drawn after placement (e.g. during routing) place_ctx.pl_macros = alloc_and_load_placement_macros(arch.Directs, arch.num_directs); diff --git a/vpr/src/base/vpr_signal_handler.cpp b/vpr/src/base/vpr_signal_handler.cpp index a8fff7b4394..79f4eb78dfc 100644 --- a/vpr/src/base/vpr_signal_handler.cpp +++ b/vpr/src/base/vpr_signal_handler.cpp @@ -90,7 +90,7 @@ void checkpoint() { std::string placer_checkpoint_file = "placer_checkpoint.place"; VTR_LOG("Attempting to checkpoint current placement to file: %s\n", placer_checkpoint_file.c_str()); - print_place(nullptr, nullptr, placer_checkpoint_file.c_str()); + print_place(nullptr, nullptr, placer_checkpoint_file.c_str(), g_vpr_ctx.placement().block_locs); std::string router_checkpoint_file = "router_checkpoint.route"; VTR_LOG("Attempting to checkpoint current routing to file: %s\n", router_checkpoint_file.c_str()); diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 6c926450152..3d49d50ea36 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -1005,7 +1005,7 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, // read the constraint file if the user has provided one and this is not the first attempt if (strlen(constraints_file) != 0 && iter_no != 0) { - read_constraints(constraints_file); + read_constraints(constraints_file, block_locs); } //resize the vector to store unplaced block types empty locations @@ -1223,7 +1223,7 @@ void initial_placement(const t_placer_opts& placer_opts, // read the constraint file and place fixed blocks if (strlen(constraints_file) != 0) { - read_constraints(constraints_file); + read_constraints(constraints_file, block_locs); } if (noc_opts.noc) { diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 4f660025653..5216c6494e4 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -437,9 +437,8 @@ void try_place(const Netlist<>& net_list, auto [move_generator, move_generator2] = create_move_generators(placer_opts, move_lim, noc_opts.noc_centroid_weight); if (!placer_opts.write_initial_place_file.empty()) { - print_place(nullptr, - nullptr, - (placer_opts.write_initial_place_file + ".init.place").c_str()); + print_place(nullptr, nullptr, (placer_opts.write_initial_place_file + ".init.place").c_str(), + g_vpr_ctx.placement().block_locs); } #ifdef ENABLE_ANALYTIC_PLACE @@ -633,7 +632,7 @@ void try_place(const Netlist<>& net_list, std::string filename = vtr::string_fmt("placement_%03d_%03d.place", 0, 0); VTR_LOG("Saving initial placement to file: %s\n", filename.c_str()); - print_place(nullptr, nullptr, filename.c_str()); + print_place(nullptr, nullptr, filename.c_str(), g_vpr_ctx.placement().block_locs); } int first_move_lim = get_initial_move_lim(placer_opts, annealing_sched); @@ -870,7 +869,7 @@ void try_place(const Netlist<>& net_list, std::string filename = vtr::string_fmt("placement_%03d_%03d.place", state.num_temps + 1, 0); VTR_LOG("Saving final placement to file: %s\n", filename.c_str()); - print_place(nullptr, nullptr, filename.c_str()); + print_place(nullptr, nullptr, filename.c_str(), g_vpr_ctx.placement().block_locs); } // TODO: @@ -1095,16 +1094,12 @@ static void placement_inner_loop(const t_annealing_state* state, } if (placer_opts.placement_saves_per_temperature >= 1 && inner_iter > 0 - && (inner_iter + 1) - % (state->move_lim - / placer_opts.placement_saves_per_temperature) - == 0) { + && (inner_iter + 1) % (state->move_lim / placer_opts.placement_saves_per_temperature) == 0) { std::string filename = vtr::string_fmt("placement_%03d_%03d.place", state->num_temps + 1, inner_placement_save_count); - VTR_LOG( - "Saving placement to file at temperature move %d / %d: %s\n", - inner_iter, state->move_lim, filename.c_str()); - print_place(nullptr, nullptr, filename.c_str()); + VTR_LOG("Saving placement to file at temperature move %d / %d: %s\n", + inner_iter, state->move_lim, filename.c_str()); + print_place(nullptr, nullptr, filename.c_str(), g_vpr_ctx.placement().block_locs); ++inner_placement_save_count; } } @@ -1115,12 +1110,14 @@ static void placement_inner_loop(const t_annealing_state* state, /*only count non-global connections */ static int count_connections() { + auto& cluster_ctx = g_vpr_ctx.clustering(); + int count = 0; - auto& cluster_ctx = g_vpr_ctx.clustering(); - for (auto net_id : cluster_ctx.clb_nlist.nets()) { - if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { + if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) { continue; + } count += cluster_ctx.clb_nlist.net_sinks(net_id).size(); } From a839891807b7eebc70b8a1e43a19870b3398c481 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 23 Jul 2024 15:07:33 -0400 Subject: [PATCH 026/146] replace some accesses outside the placement stage to place_ctx.block_locs with get_block_locs() --- utils/fasm/src/fasm.cpp | 10 ++-- utils/fasm/test/test_fasm.cpp | 2 +- vpr/src/base/load_flat_place.cpp | 4 +- vpr/src/base/place_and_route.cpp | 2 +- vpr/src/base/vpr_constraints_writer.cpp | 10 ++-- vpr/src/base/vpr_context.h | 18 +++++-- vpr/src/base/vpr_signal_handler.cpp | 2 +- vpr/src/route/route_common.cpp | 6 +-- vpr/src/util/vpr_utils.cpp | 12 ++--- vpr/src/util/vpr_utils.h | 14 ++++-- vpr/test/test_noc_place_utils.cpp | 63 +++++++++++++------------ 11 files changed, 81 insertions(+), 62 deletions(-) diff --git a/utils/fasm/src/fasm.cpp b/utils/fasm/src/fasm.cpp index 5a1f314d331..53fce2f1392 100644 --- a/utils/fasm/src/fasm.cpp +++ b/utils/fasm/src/fasm.cpp @@ -37,9 +37,9 @@ void FasmWriterVisitor::visit_top_impl(const char* top_level_name) { } void FasmWriterVisitor::visit_clb_impl(ClusterBlockId blk_id, const t_pb* clb) { - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); current_blk_id_ = blk_id; @@ -48,10 +48,10 @@ void FasmWriterVisitor::visit_clb_impl(ClusterBlockId blk_id, const t_pb* clb) { root_clb_ = clb->pb_graph_node; - int x = place_ctx.block_locs[blk_id].loc.x; - int y = place_ctx.block_locs[blk_id].loc.y; - int layer_num = place_ctx.block_locs[blk_id].loc.layer; - int sub_tile = place_ctx.block_locs[blk_id].loc.sub_tile; + int x = block_locs[blk_id].loc.x; + int y = block_locs[blk_id].loc.y; + int layer_num = block_locs[blk_id].loc.layer; + int sub_tile = block_locs[blk_id].loc.sub_tile; physical_tile_ = device_ctx.grid.get_physical_type({x, y, layer_num}); logical_block_ = cluster_ctx.clb_nlist.block_type(blk_id); const auto& grid_meta = device_ctx.grid.get_metadata({x, y, layer_num}); diff --git a/utils/fasm/test/test_fasm.cpp b/utils/fasm/test/test_fasm.cpp index b700211825f..8eb4e4876fb 100644 --- a/utils/fasm/test/test_fasm.cpp +++ b/utils/fasm/test/test_fasm.cpp @@ -569,7 +569,7 @@ TEST_CASE("fasm_integration_test", "[fasm]") { // Verify occupied grid LOCs const auto & place_ctx = g_vpr_ctx.placement(); - for (const auto& loc: place_ctx.block_locs) { + for (const auto& loc: place_ctx.get_block_locs()) { // Do not consider "IOB" tiles. They do not have fasm features // defined in the arch. diff --git a/vpr/src/base/load_flat_place.cpp b/vpr/src/base/load_flat_place.cpp index 01b2978a310..6cc7fa485b7 100644 --- a/vpr/src/base/load_flat_place.cpp +++ b/vpr/src/base/load_flat_place.cpp @@ -11,7 +11,7 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, std::vector& atoms) { auto& atom_ctx = g_vpr_ctx.atom(); - t_pl_loc loc = g_vpr_ctx.placement().block_locs[iblk].loc; + t_pl_loc loc = g_vpr_ctx.placement().get_block_locs()[iblk].loc; size_t bnum = size_t(iblk); for (auto atom : atoms) { @@ -32,7 +32,7 @@ void print_flat_placement(const char* flat_place_file) { ClusterAtomsLookup atoms_lookup; auto& cluster_ctx = g_vpr_ctx.clustering(); - if (!g_vpr_ctx.placement().block_locs.empty()) { + if (!g_vpr_ctx.placement().get_block_locs().empty()) { fp = fopen(flat_place_file, "w"); for (auto iblk : cluster_ctx.clb_nlist.blocks()) { auto atoms = atoms_lookup.atoms_in_cluster(iblk); diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 66eea89a0bd..f7fab9bb7c3 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -358,7 +358,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, auto& cluster_ctx = g_vpr_ctx.clustering(); // Cluster-based net_list is used for placement std::string placement_id = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().block_locs); + filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().get_block_locs()); g_vpr_ctx.mutable_placement().placement_id = placement_id; } } diff --git a/vpr/src/base/vpr_constraints_writer.cpp b/vpr/src/base/vpr_constraints_writer.cpp index 62cb2f666d2..190f6051a10 100644 --- a/vpr/src/base/vpr_constraints_writer.cpp +++ b/vpr/src/base/vpr_constraints_writer.cpp @@ -54,7 +54,7 @@ void write_vpr_floorplan_constraints(const char* file_name, int expand, bool sub void setup_vpr_floorplan_constraints_one_loc(VprConstraints& constraints, int expand, bool subtile) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); int part_id = 0; /* @@ -69,7 +69,7 @@ void setup_vpr_floorplan_constraints_one_loc(VprConstraints& constraints, int ex Partition part; part.set_name(part_name); - const auto& loc = place_ctx.block_locs[blk_id].loc; + const auto& loc = block_locs[blk_id].loc; PartitionRegion pr; Region reg(loc.x - expand, loc.y - expand, @@ -94,7 +94,7 @@ void setup_vpr_floorplan_constraints_one_loc(VprConstraints& constraints, int ex void setup_vpr_floorplan_constraints_cutpoints(VprConstraints& constraints, int horizontal_cutpoints, int vertical_cutpoints) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); auto& device_ctx = g_vpr_ctx.device(); const int n_layers = device_ctx.grid.get_num_layers(); @@ -159,8 +159,8 @@ void setup_vpr_floorplan_constraints_cutpoints(VprConstraints& constraints, int */ for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { const std::unordered_set& atoms = cluster_to_atoms(blk_id); - int x = place_ctx.block_locs[blk_id].loc.x; - int y = place_ctx.block_locs[blk_id].loc.y; + int x = block_locs[blk_id].loc.x; + int y = block_locs[blk_id].loc.y; int width = device_ctx.grid.width(); int height = device_ctx.grid.height(); VTR_ASSERT(x >= 0 && x < width); diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 376a5c6e01e..a9e5148632e 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -383,15 +383,27 @@ struct PackingMultithreadingContext : public Context { * or related placer algorithm state. */ struct PlacementContext : public Context { + private: ///@brief Clustered block placement locations vtr::vector_map block_locs; - ///@brief Clustered pin placement mapping with physical pin - vtr::vector_map physical_pins; - ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) GridBlock grid_blocks; + bool loc_vars_are_accessible_ = true; + + public: + + const vtr::vector_map& get_block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } + vtr::vector_map& get_mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } + const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } + GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } + void lock_loc_vars() { loc_vars_are_accessible_ = false; } + void unlock_loc_vars() { loc_vars_are_accessible_ = true; } + + ///@brief Clustered pin placement mapping with physical pin + vtr::vector_map physical_pins; + ///@brief The pl_macros array stores all the placement macros (usually carry chains). std::vector pl_macros; diff --git a/vpr/src/base/vpr_signal_handler.cpp b/vpr/src/base/vpr_signal_handler.cpp index 79f4eb78dfc..e98e0a49a06 100644 --- a/vpr/src/base/vpr_signal_handler.cpp +++ b/vpr/src/base/vpr_signal_handler.cpp @@ -90,7 +90,7 @@ void checkpoint() { std::string placer_checkpoint_file = "placer_checkpoint.place"; VTR_LOG("Attempting to checkpoint current placement to file: %s\n", placer_checkpoint_file.c_str()); - print_place(nullptr, nullptr, placer_checkpoint_file.c_str(), g_vpr_ctx.placement().block_locs); + print_place(nullptr, nullptr, placer_checkpoint_file.c_str(), g_vpr_ctx.placement().get_block_locs()); std::string router_checkpoint_file = "router_checkpoint.route"; VTR_LOG("Attempting to checkpoint current routing to file: %s\n", router_checkpoint_file.c_str()); diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index 466c1ab8b95..ab3049859d8 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -347,12 +347,10 @@ static t_clb_opins_used alloc_and_load_clb_opins_used_locally() { if (is_io_type(type)) continue; - int pin_low = 0; - int pin_high = 0; - get_pin_range_for_block(blk_id, &pin_low, &pin_high); + const auto [pin_low, pin_high] = get_pin_range_for_block(blk_id); for (clb_pin = pin_low; clb_pin <= pin_high; clb_pin++) { - auto net = cluster_ctx.clb_nlist.block_net(blk_id, clb_pin); + ClusterNetId net = cluster_ctx.clb_nlist.block_net(blk_id, clb_pin); if (!net || (net && cluster_ctx.clb_nlist.net_sinks(net).size() == 0)) { //There is no external net connected to this pin diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 6f47cf100cb..678746fc229 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -143,7 +143,7 @@ void sync_grid_to_blocks() { /* Go through each block */ auto& cluster_ctx = g_vpr_ctx.clustering(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { const auto& blk_loc = place_ctx.block_locs[blk_id].loc; int blk_x = place_ctx.block_locs[blk_id].loc.x; int blk_y = place_ctx.block_locs[blk_id].loc.y; @@ -651,9 +651,7 @@ t_class_range get_class_range_for_block(const ParentBlockId blk_id, bool is_flat } } -void get_pin_range_for_block(const ClusterBlockId blk_id, - int* pin_low, - int* pin_high) { +std::pair get_pin_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ auto& place_ctx = g_vpr_ctx.placement(); @@ -666,8 +664,10 @@ void get_pin_range_for_block(const ClusterBlockId blk_id, int rel_pin_low = rel_capacity * (sub_tile.num_phy_pins / sub_tile_capacity); int rel_pin_high = (rel_capacity + 1) * (sub_tile.num_phy_pins / sub_tile_capacity) - 1; - *pin_low = sub_tile.sub_tile_to_tile_pin_indices[rel_pin_low]; - *pin_high = sub_tile.sub_tile_to_tile_pin_indices[rel_pin_high]; + int pin_low = sub_tile.sub_tile_to_tile_pin_indices[rel_pin_low]; + int pin_high = sub_tile.sub_tile_to_tile_pin_indices[rel_pin_high]; + + return {pin_low, pin_high}; } t_physical_tile_type_ptr find_tile_type_by_name(const std::string& name, const std::vector& types) { diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index 9382660142c..c7dbcc3716d 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -47,11 +47,15 @@ t_class_range get_class_range_for_block(const AtomBlockId atom_blk); t_class_range get_class_range_for_block(const ParentBlockId blk_id, bool is_flat); -//Returns the physical pin range relative to a block id. This must be called after placement -//as the block id is used to retrieve the information of the used physical tile. -void get_pin_range_for_block(const ClusterBlockId blk_id, - int* pin_low, - int* pin_high); +// +/** + * @brief Returns the physical pin range relative to a block id. This must be called after placement + * as the block id is used to retrieve the information of the used physical tile. + * + * @param blk_id The unique ID of a clustered block whose pin range is desired. + * @return std::pair --> (pin_low, pin_high) + */ +std::pair get_pin_range_for_block(const ClusterBlockId blk_id); t_block_loc get_block_loc(const ParentBlockId& block_id, bool is_flat); diff --git a/vpr/test/test_noc_place_utils.cpp b/vpr/test/test_noc_place_utils.cpp index 229d4afdf4c..7c568971679 100644 --- a/vpr/test/test_noc_place_utils.cpp +++ b/vpr/test/test_noc_place_utils.cpp @@ -29,11 +29,12 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = place_ctx.get_mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); noc_ctx.noc_traffic_flows_storage.clear_traffic_flows(); - place_ctx.block_locs.clear(); + block_locs.clear(); // store the reference to device grid with // the grid width will be the size of the noc mesh @@ -112,7 +113,7 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { hard_router_block.get_router_layer_position()); // now add the cluster and its placed location to the placement datastructures - place_ctx.block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); + block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); } // similar parameters for all traffic flows @@ -194,7 +195,7 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { } // now call the test function - initial_noc_routing({}); + initial_noc_routing({}, block_locs); // now verify the function by comparing the link bandwidths in the noc model (should have been updated by the test function) to the golden set int number_of_links = golden_link_bandwidths.size(); @@ -226,11 +227,12 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = place_ctx.get_mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); noc_ctx.noc_traffic_flows_storage.clear_traffic_flows(); - place_ctx.block_locs.clear(); + block_locs.clear(); // store the reference to device grid with // the grid width will be the size of the noc mesh @@ -309,7 +311,7 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { hard_router_block.get_router_layer_position()); // now add the cluster and its placed location to the placement datastructures - place_ctx.block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); + block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); } noc_ctx.noc_model.set_noc_link_latency(1); @@ -389,7 +391,7 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { // assume this works // this is needed to set up the global noc packet router and also global datastructures - initial_noc_routing({}); + initial_noc_routing({}, block_locs); SECTION("test_comp_noc_aggregate_bandwidth_cost") { //initialize all the cost calculator datastructures @@ -500,11 +502,12 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = place_ctx.get_mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); noc_ctx.noc_traffic_flows_storage.clear_traffic_flows(); - place_ctx.block_locs.clear(); + block_locs.clear(); // store the reference to device grid with // the grid width will be the size of the noc mesh @@ -592,7 +595,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ router_where_cluster_is_placed.push_back((NocRouterId)cluster_block_number); // now add the cluster and its placed location to the placement datastructures - place_ctx.block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); + block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); } // similar parameters for all traffic flows @@ -676,7 +679,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // assume this works // this is needed to set up the global noc packet router and also global datastructures - initial_noc_routing({}); + initial_noc_routing({}, block_locs); // datastructure below will store the bandwidth usages of all the links // and will be updated throughout this test. @@ -776,8 +779,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ router_where_cluster_is_placed[swap_router_block_two] = router_first_swap_cluster_location; // now move the blocks in the placement datastructures - place_ctx.block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; - place_ctx.block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; + block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; + block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; // get all the associated traffic flows of the moved cluster blocks const std::vector& assoc_traffic_flows_block_one = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_one); @@ -866,7 +869,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ NocCostTerms delta_cost; // call the test function - find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost, block_locs); // update the test noc cost terms based on the cost changes found by the test functions test_noc_costs.aggregate_bandwidth += delta_cost.aggregate_bandwidth; @@ -932,8 +935,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ router_where_cluster_is_placed[swap_router_block_two] = router_first_swap_cluster_location; // now move the blocks in the placement datastructures - place_ctx.block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; - place_ctx.block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; + block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; + block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; // get all the associated traffic flows of the moved cluster blocks const std::vector& assoc_traffic_flows_block_one = noc_ctx.noc_traffic_flows_storage.get_traffic_flows_associated_to_router_block(swap_router_block_one); @@ -1014,7 +1017,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ NocCostTerms delta_cost; // call the test function - find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost, block_locs); // update the test noc cost terms based on the cost changes found by the test functions test_noc_costs.aggregate_bandwidth += delta_cost.aggregate_bandwidth; @@ -1068,8 +1071,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ router_where_cluster_is_placed[swap_router_block_two] = router_first_swap_cluster_location; // now move the blocks in the placement datastructures - place_ctx.block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; - place_ctx.block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; + block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; + block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; // get all the associated traffic flows of the moved cluster blocks // remember that the first cluster block doesn't have any traffic flows associated to it @@ -1115,7 +1118,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ delta_cost = NocCostTerms(); // call the test function - find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost, block_locs); // update the test noc cost terms based on the cost changes found by the test functions test_noc_costs.aggregate_bandwidth += delta_cost.aggregate_bandwidth; @@ -1171,8 +1174,8 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ router_where_cluster_is_placed[swap_router_block_two] = router_first_swap_cluster_location; // now move the blocks in the placement datastructures - place_ctx.block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; - place_ctx.block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; + block_locs[swap_router_block_one].loc = blocks_affected.moved_blocks[0].new_loc; + block_locs[swap_router_block_two].loc = blocks_affected.moved_blocks[1].new_loc; // we don't have to calculate the costs or update bandwidths because the swapped router blocks do not have any associated traffic flows // @@ -1180,7 +1183,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ delta_cost = NocCostTerms(); // call the test function - find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, delta_cost, block_locs); // update the test noc cost terms based on the cost changes found by the test functions test_noc_costs.aggregate_bandwidth += delta_cost.aggregate_bandwidth; @@ -1377,11 +1380,12 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = place_ctx.get_mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); noc_ctx.noc_traffic_flows_storage.clear_traffic_flows(); - place_ctx.block_locs.clear(); + block_locs.clear(); // store the reference to device grid with // the grid width will be the size of the noc mesh @@ -1467,7 +1471,7 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { router_where_cluster_is_placed.push_back((NocRouterId)cluster_block_number); // now add the cluster and its placed location to the placement datastructures - place_ctx.block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); + block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); } // similar parameters for all traffic flows @@ -1540,7 +1544,7 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // assume this works // this is needed to set up the global noc packet router and also global datastructures - initial_noc_routing({}); + initial_noc_routing({}, block_locs); // datastructure below will store the bandwidth usages of all the links // and will be updated throughout this test. @@ -1694,7 +1698,7 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // To undo this we just need to update the noc link bandwidths as if there was no swap (we do this by calling the test function) // This should then re-update the noc link bandwidths to their values before we imitated the swap above // THe result is that the link bandwidths should match the golden link bandwidths that never changed after the initial router block placement (at a point before block swapping) - revert_noc_traffic_flow_routes(blocks_affected); + revert_noc_traffic_flow_routes(blocks_affected, block_locs); // now verify if the test function worked correctly by comparing the noc link bandwidths to the golden link bandwidths int number_of_links = golden_link_bandwidths.size(); @@ -1728,11 +1732,12 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = place_ctx.get_mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); noc_ctx.noc_traffic_flows_storage.clear_traffic_flows(); - place_ctx.block_locs.clear(); + block_locs.clear(); // store the reference to device grid with // the grid width will be the size of the noc mesh @@ -1823,7 +1828,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { router_where_cluster_is_placed.push_back((NocRouterId)cluster_block_number); // now add the cluster and its placed location to the placement datastructures - place_ctx.block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); + block_locs.insert(ClusterBlockId(cluster_block_number), current_cluster_block_location); } // similar parameters for all traffic flows @@ -1952,7 +1957,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { SECTION("Case where check place works after initial placement") { // run the test function - int error = check_noc_placement_costs(costs, error_tolerance, noc_opts, place_ctx.block_locs); + int error = check_noc_placement_costs(costs, error_tolerance, noc_opts, block_locs); // we expect error to be 0 here, meaning the found costs are within the error tolerance of the noc golden costs REQUIRE(error == 0); @@ -1974,7 +1979,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { } // run the test function - int error = check_noc_placement_costs(costs, error_tolerance, noc_opts, place_ctx.block_locs); + int error = check_noc_placement_costs(costs, error_tolerance, noc_opts, block_locs); // we expect error to be 4 here, meaning the found costs are not within the tolerance range REQUIRE(error == 4); From 5151eb401813d86ebef506c3ccf95852c746dab9 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Wed, 24 Jul 2024 12:07:57 -0400 Subject: [PATCH 027/146] remove some accesses to place_ctx.block_locs --- vpr/src/base/read_route.cpp | 10 ++- vpr/src/base/vpr_api.cpp | 8 +- vpr/src/base/vpr_context.h | 12 ++- vpr/src/draw/draw.cpp | 7 +- vpr/src/draw/draw_basic.cpp | 38 +++++----- vpr/src/draw/draw_types.cpp | 23 +++--- vpr/src/draw/intra_logic_block.cpp | 13 ++-- vpr/src/pack/post_routing_pb_pin_fixup.cpp | 2 +- vpr/src/place/initial_placement.cpp | 2 +- vpr/src/place/net_cost_handler.cpp | 11 +-- vpr/src/place/place.cpp | 21 +++--- vpr/src/place/place_checkpoint.cpp | 3 +- vpr/src/place/place_constraints.cpp | 7 +- vpr/src/place/place_constraints.h | 2 +- vpr/src/place/place_delay_model.cpp | 23 +++--- vpr/src/place/place_delay_model.h | 8 +- vpr/src/place/place_timing_update.cpp | 33 ++++++--- vpr/src/place/place_timing_update.h | 13 +++- .../place/weighted_median_move_generator.cpp | 74 +++++++++---------- vpr/src/route/rr_graph.cpp | 19 ++--- vpr/src/util/vpr_utils.cpp | 47 +++++------- 21 files changed, 196 insertions(+), 180 deletions(-) diff --git a/vpr/src/base/read_route.cpp b/vpr/src/base/read_route.cpp index 777ca226710..04462698eff 100644 --- a/vpr/src/base/read_route.cpp +++ b/vpr/src/base/read_route.cpp @@ -323,7 +323,9 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN ptc = atoi(tokens[5 + offset].c_str()); if (rr_graph.node_ptc_num(RRNodeId(inode)) != ptc) { vpr_throw(VPR_ERROR_ROUTE, filename, lineno, - "The ptc num of node %d does not match the rr graph, Running without flat routing; if this file was created with flat routing, re-run vpr with the --flat_routing option", inode); + "The ptc num of node %d does not match the rr graph, Running without flat routing; " + "if this file was created with flat routing, re-run vpr with the --flat_routing option", + inode); } /*Process switches and pb pin info if it is ipin or opin type*/ @@ -340,7 +342,7 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN std::tie(sub_tile, sub_tile_rel_cap) = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); int sub_tile_offset = sub_tile->capacity.low + sub_tile_rel_cap; - ClusterBlockId iblock = place_ctx.grid_blocks.block_at_location({x - width_offset, y - height_offset, sub_tile_offset, layer_num}); + ClusterBlockId iblock = place_ctx.get_grid_blocks().block_at_location({x - width_offset, y - height_offset, sub_tile_offset, layer_num}); VTR_ASSERT(iblock); const t_pb_graph_pin* pb_pin; @@ -647,8 +649,8 @@ void print_route(const Netlist<>& net_list, std::tie(sub_tile, sub_tile_rel_cap) = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); int sub_tile_offset = sub_tile->capacity.low + sub_tile_rel_cap; - ClusterBlockId iblock = place_ctx.grid_blocks.block_at_location({ilow - xoffset, jlow - yoffset, - sub_tile_offset, layer_num}); + ClusterBlockId iblock = place_ctx.get_grid_blocks().block_at_location({ilow - xoffset, jlow - yoffset, + sub_tile_offset, layer_num}); VTR_ASSERT(iblock); const t_pb_graph_pin* pb_pin; if (is_pin_on_tile(physical_tile, pin_num)) { diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index a23fadcf975..2854615ce55 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -821,7 +821,7 @@ void vpr_place(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), filename_opts.PlaceFile.c_str(), - g_vpr_ctx.placement().block_locs); + g_vpr_ctx.placement().get_block_locs()); } void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { @@ -836,7 +836,7 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { //Load an existing placement from a file place_ctx.placement_id = read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), - place_ctx.block_locs, + place_ctx.get_mutable_block_locs(), filename_opts.verify_file_digests, device_ctx.grid); //Ensure placement macros are loaded so that they can be drawn after placement (e.g. during routing) @@ -1280,8 +1280,8 @@ static void free_atoms() { static void free_placement() { auto& place_ctx = g_vpr_ctx.mutable_placement(); - place_ctx.block_locs.clear(); - place_ctx.grid_blocks.clear(); + place_ctx.get_mutable_block_locs().clear(); + place_ctx.get_mutable_grid_blocks().clear(); } static void free_routing() { diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index a9e5148632e..60a38ee9c02 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -384,16 +384,18 @@ struct PackingMultithreadingContext : public Context { */ struct PlacementContext : public Context { private: - ///@brief Clustered block placement locations - vtr::vector_map block_locs; - ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) - GridBlock grid_blocks; bool loc_vars_are_accessible_ = true; public: + ///@brief Clustered block placement locations + vtr::vector_map block_locs; + + ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) + GridBlock grid_blocks; + const vtr::vector_map& get_block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } vtr::vector_map& get_mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } @@ -401,6 +403,8 @@ struct PlacementContext : public Context { void lock_loc_vars() { loc_vars_are_accessible_ = false; } void unlock_loc_vars() { loc_vars_are_accessible_ = true; } + + ///@brief Clustered pin placement mapping with physical pin vtr::vector_map physical_pins; diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index ec4f764868f..565ddf4c81c 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -1011,7 +1011,7 @@ static void highlight_blocks(double x, double y) { } auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); VTR_ASSERT(clb_index != EMPTY_BLOCK_ID); @@ -1033,8 +1033,8 @@ static void highlight_blocks(double x, double y) { clb_index); sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", size_t(clb_index), cluster_ctx.clb_nlist.block_name(clb_index).c_str(), - place_ctx.block_locs[clb_index].loc.x, - place_ctx.block_locs[clb_index].loc.y); + block_locs[clb_index].loc.x, + block_locs[clb_index].loc.y); } //If manual moves is activated, then user can select block from the grid. @@ -1047,7 +1047,6 @@ static void highlight_blocks(double x, double y) { application.update_message(msg); application.refresh_drawing(); - return; } ClusterBlockId get_cluster_block_id_from_xy_loc(double x, double y) { diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index e37de7a84fa..8856b9f2c97 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -230,7 +230,7 @@ void drawnets(ezgl::renderer* g) { ClusterBlockId b1, b2; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); float transparency_factor; float NET_ALPHA = draw_state->net_alpha; @@ -244,7 +244,7 @@ void drawnets(ezgl::renderer* g) { /* Draw the net as a star from the source to each sink. Draw from centers of * * blocks (or sub blocks in the case of IOs). */ - for (auto net_id : cluster_ctx.clb_nlist.nets()) { + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) { continue; /* Don't draw */ } @@ -256,7 +256,7 @@ void drawnets(ezgl::renderer* g) { b1 = cluster_ctx.clb_nlist.net_driver_block(net_id); //The layer of the net driver block - driver_block_layer_num = place_ctx.block_locs[b1].loc.layer; + driver_block_layer_num = block_locs[b1].loc.layer; //To only show nets that are connected to currently active layers on the screen if (!draw_state->draw_layer_display[driver_block_layer_num].visible) { @@ -264,11 +264,11 @@ void drawnets(ezgl::renderer* g) { } ezgl::point2d driver_center = draw_coords->get_absolute_clb_bbox(b1, cluster_ctx.clb_nlist.block_type(b1)).center(); - for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { b2 = cluster_ctx.clb_nlist.pin_block(pin_id); //the layer of the pin block (net sinks) - sink_block_layer_num = place_ctx.block_locs[b2].loc.layer; + sink_block_layer_num =block_locs[b2].loc.layer; t_draw_layer_display element_visibility = get_element_visibility_and_transparency(driver_block_layer_num, sink_block_layer_num); @@ -277,7 +277,7 @@ void drawnets(ezgl::renderer* g) { } transparency_factor = element_visibility.alpha; - //Take the higher of the 2 transparency values that the user can select from the UI + //Take the highest of the 2 transparency values that the user can select from the UI // Compare the current cross layer transparency to the overall Net transparency set by the user. g->set_color(draw_state->net_color[net_id], fmin(transparency_factor, draw_state->net_color[net_id].alpha * NET_ALPHA)); @@ -793,7 +793,7 @@ bool is_edge_valid_to_draw(RRNodeId current_node, RRNodeId prev_node) { } /* Draws any placement macros (e.g. carry chains, which require specific relative placements - * between some blocks) if the Placement Macros (in the GUI) is seelected. + * between some blocks) if the Placement Macros (in the GUI) is selected. */ void draw_placement_macros(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); @@ -804,8 +804,9 @@ void draw_placement_macros(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& place_ctx = g_vpr_ctx.placement(); - for (size_t imacro = 0; imacro < place_ctx.pl_macros.size(); ++imacro) { - const t_pl_macro* pl_macro = &place_ctx.pl_macros[imacro]; + auto& block_locs = place_ctx.get_block_locs(); + + for (const t_pl_macro& pl_macro : place_ctx.pl_macros) { //TODO: for now we just draw the bounding box of the macro, which is incorrect for non-rectangular macros... int xlow = std::numeric_limits::max(); @@ -815,19 +816,18 @@ void draw_placement_macros(ezgl::renderer* g) { int x_root = OPEN; int y_root = OPEN; - for (size_t imember = 0; imember < pl_macro->members.size(); - ++imember) { - const t_pl_macro_member* member = &pl_macro->members[imember]; + for (size_t imember = 0; imember < pl_macro.members.size(); ++imember) { + const t_pl_macro_member& member = pl_macro.members[imember]; - ClusterBlockId blk = member->blk_index; + ClusterBlockId blk = member.blk_index; if (imember == 0) { - x_root = place_ctx.block_locs[blk].loc.x; - y_root = place_ctx.block_locs[blk].loc.y; + x_root = block_locs[blk].loc.x; + y_root = block_locs[blk].loc.y; } - int x = x_root + member->offset.x; - int y = y_root + member->offset.y; + int x = x_root + member.offset.x; + int y = y_root + member.offset.y; xlow = std::min(xlow, x); ylow = std::min(ylow, y); @@ -1187,13 +1187,13 @@ void draw_crit_path_elements(const std::vector& paths, const } int get_timing_path_node_layer_num(tatum::NodeId node) { - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); auto& atom_ctx = g_vpr_ctx.atom(); AtomPinId atom_pin = atom_ctx.lookup.tnode_atom_pin(node); AtomBlockId atom_block = atom_ctx.nlist.pin_block(atom_pin); ClusterBlockId clb_block = atom_ctx.lookup.atom_clb(atom_block); - return place_ctx.block_locs[clb_block].loc.layer; + return block_locs[clb_block].loc.layer; } bool is_flyline_valid_to_draw(int src_layer, int sink_layer) { diff --git a/vpr/src/draw/draw_types.cpp b/vpr/src/draw/draw_types.cpp index bd63798d398..a54bc089f1d 100644 --- a/vpr/src/draw/draw_types.cpp +++ b/vpr/src/draw/draw_types.cpp @@ -13,10 +13,12 @@ *******************************************/ ezgl::color t_draw_state::block_color(ClusterBlockId blk) const { if (use_default_block_color_[blk]) { - t_physical_tile_type_ptr tile_type = nullptr; + auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); - if (place_ctx.block_locs.empty()) { //No placement, pick best match + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + + t_physical_tile_type_ptr tile_type = nullptr; + if (block_locs.empty()) { //No placement, pick best match tile_type = pick_physical_type(cluster_ctx.clb_nlist.block_type(blk)); } else { // Have placement, select physical tile implementing blk tile_type = physical_tile_type(blk); @@ -85,12 +87,13 @@ float t_draw_coords::get_tile_height() { } ezgl::rectangle t_draw_coords::get_pb_bbox(ClusterBlockId clb_index, const t_pb_graph_node& pb_gnode) { - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); auto& cluster_ctx = g_vpr_ctx.clustering(); - return get_pb_bbox(place_ctx.block_locs[clb_index].loc.layer, - place_ctx.block_locs[clb_index].loc.x, - place_ctx.block_locs[clb_index].loc.y, - place_ctx.block_locs[clb_index].loc.sub_tile, + + return get_pb_bbox(block_locs[clb_index].loc.layer, + block_locs[clb_index].loc.x, + block_locs[clb_index].loc.y, + block_locs[clb_index].loc.sub_tile, cluster_ctx.clb_nlist.block_type(clb_index), pb_gnode); } @@ -149,9 +152,9 @@ ezgl::rectangle t_draw_coords::get_absolute_pb_bbox(const ClusterBlockId clb_ind } ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(const ClusterBlockId clb_index, const t_logical_block_type_ptr block_type) { - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - t_pl_loc loc = place_ctx.block_locs[clb_index].loc; + t_pl_loc loc = block_locs[clb_index].loc; return get_pb_bbox(loc.layer, loc.x, loc.y, loc.sub_tile, block_type); } diff --git a/vpr/src/draw/intra_logic_block.cpp b/vpr/src/draw/intra_logic_block.cpp index 214ba01fe23..b047f112d56 100644 --- a/vpr/src/draw/intra_logic_block.cpp +++ b/vpr/src/draw/intra_logic_block.cpp @@ -260,7 +260,6 @@ static void draw_internal_load_coords(int type_descrip_index, t_pb_graph_node* p } } } - return; } /* Helper function which computes bounding box values for a sub-block. The coordinates @@ -329,8 +328,6 @@ draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node *blk_width = child_width; *blk_height = child_height; - - return; } # ifndef NO_GRAPHICS @@ -342,7 +339,7 @@ static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezg t_draw_coords* draw_coords = get_draw_coords_vars(); t_draw_state* draw_state = get_draw_state_vars(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); t_selected_sub_block_info& sel_sub_info = get_selected_sub_block_info(); @@ -350,7 +347,7 @@ static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezg ezgl::rectangle temp = draw_coords->get_pb_bbox(clb_index, *pb->pb_graph_node); ezgl::rectangle abs_bbox = temp + parent_bbox.bottom_left(); - int layer_num = place_ctx.block_locs[clb_index].loc.layer; + int layer_num = block_locs[clb_index].loc.layer; int transparency_factor = draw_state->draw_layer_display[layer_num].alpha; // if we've gone too far, don't draw anything @@ -560,7 +557,7 @@ void draw_logical_connections(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); auto& atom_ctx = g_vpr_ctx.atom(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); g->set_line_dash(ezgl::line_dash::none); @@ -578,7 +575,7 @@ void draw_logical_connections(ezgl::renderer* g) { AtomBlockId src_blk_id = atom_ctx.nlist.pin_block(driver_pin_id); ClusterBlockId src_clb = atom_ctx.lookup.atom_clb(src_blk_id); - int src_layer_num = place_ctx.block_locs[src_clb].loc.layer; + int src_layer_num = block_locs[src_clb].loc.layer; //To only show primitive nets that are connected to currently active layers on the screen if (!draw_state->draw_layer_display[src_layer_num].visible) { continue; /* Don't Draw */ @@ -593,7 +590,7 @@ void draw_logical_connections(ezgl::renderer* g) { AtomBlockId sink_blk_id = atom_ctx.nlist.pin_block(sink_pin_id); const t_pb_graph_node* sink_pb_gnode = atom_ctx.lookup.atom_pb_graph_node(sink_blk_id); ClusterBlockId sink_clb = atom_ctx.lookup.atom_clb(sink_blk_id); - int sink_layer_num = place_ctx.block_locs[sink_clb].loc.layer; + int sink_layer_num = block_locs[sink_clb].loc.layer; t_draw_layer_display element_visibility = get_element_visibility_and_transparency(src_layer_num, sink_layer_num); diff --git a/vpr/src/pack/post_routing_pb_pin_fixup.cpp b/vpr/src/pack/post_routing_pb_pin_fixup.cpp index ceb9263e12b..04f4ea3f8ef 100644 --- a/vpr/src/pack/post_routing_pb_pin_fixup.cpp +++ b/vpr/src/pack/post_routing_pb_pin_fixup.cpp @@ -1090,7 +1090,7 @@ void sync_netlists_to_routing(const Netlist<>& net_list, device_ctx, clustering_ctx, rr_node_nets, - placement_ctx.block_locs[clb_blk_id].loc, + placement_ctx.get_block_locs()[clb_blk_id].loc, clb_blk_id, num_mismatches, verbose, diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 3d49d50ea36..bb977eb3d82 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -1186,7 +1186,7 @@ static void alloc_and_load_movable_blocks(const vtr::vector_maptiming_cost, "timing_cost"); costs->timing_cost = new_timing_cost; } else { diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 5216c6494e4..d8877cb123f 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -486,7 +486,7 @@ void try_place(const Netlist<>& net_list, VTR_LOG("\n"); //Update the point-to-point delays from the initial placement - comp_td_connection_delays(place_delay_model.get()); + comp_td_connection_delays(place_delay_model.get(), g_vpr_ctx.placement().block_locs); /* * Initialize timing analysis @@ -520,7 +520,7 @@ void try_place(const Netlist<>& net_list, crit_params.crit_exponent = first_crit_exponent; crit_params.crit_limit = placer_opts.place_crit_limit; - initialize_timing_info(crit_params, place_delay_model.get(), + initialize_timing_info(crit_params, place_delay_model.get(), g_vpr_ctx.placement().block_locs, placer_criticalities.get(), placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), &costs); @@ -850,7 +850,7 @@ void try_place(const Netlist<>& net_list, crit_params.crit_limit = placer_opts.place_crit_limit; if (placer_opts.place_algorithm.is_timing_driven()) { - perform_full_timing_update(crit_params, place_delay_model.get(), + perform_full_timing_update(crit_params, place_delay_model.get(), g_vpr_ctx.placement().block_locs, placer_criticalities.get(), placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), &costs); VTR_LOG("post-quench CPD = %g (ns) \n", @@ -998,7 +998,7 @@ static void outer_loop_update_timing_info(const t_placer_opts& placer_opts, crit_params.crit_limit = placer_opts.place_crit_limit; //Update all timing related classes - perform_full_timing_update(crit_params, delay_model, criticalities, + perform_full_timing_update(crit_params, delay_model, g_vpr_ctx.placement().block_locs, criticalities, setup_slacks, pin_timing_invalidator, timing_info, costs); *outer_crit_iter_count = 0; @@ -1072,7 +1072,7 @@ static void placement_inner_loop(const t_annealing_state* state, crit_params.crit_limit = placer_opts.place_crit_limit; //Update all timing related classes - perform_full_timing_update(crit_params, delay_model, + perform_full_timing_update(crit_params, delay_model, g_vpr_ctx.placement().block_locs, criticalities, setup_slacks, pin_timing_invalidator, timing_info, costs); } @@ -1484,8 +1484,8 @@ static e_move_result try_swap(const t_annealing_state* state, /* Revert the timing delays and costs to pre-update values. */ /* These routines must be called after reverting the block moves. */ //TODO: make this process incremental - comp_td_connection_delays(delay_model); - comp_td_costs(delay_model, *criticalities, &costs->timing_cost); + comp_td_connection_delays(delay_model, g_vpr_ctx.placement().block_locs); + comp_td_costs(delay_model, *criticalities, g_vpr_ctx.placement().block_locs, &costs->timing_cost); /* Re-invalidate the affected sink pins since the proposed * * move is rejected, and the same blocks are reverted to * @@ -1955,9 +1955,8 @@ static void check_place(const t_placer_costs& costs, int error = 0; error += check_placement_consistency(); - error += check_placement_costs(costs, delay_model, criticalities, - place_algorithm); - error += check_placement_floorplanning(); + error += check_placement_costs(costs, delay_model, criticalities, place_algorithm); + error += check_placement_floorplanning(g_vpr_ctx.placement().block_locs); if (noc_opts.noc) { // check the NoC costs during placement if the user is using the NoC supported flow @@ -2003,7 +2002,7 @@ static int check_placement_costs(const t_placer_costs& costs, } if (place_algorithm.is_timing_driven()) { - comp_td_costs(delay_model, *criticalities, &timing_cost_check); + comp_td_costs(delay_model, *criticalities, g_vpr_ctx.placement().block_locs, &timing_cost_check); //VTR_LOG("timing_cost recomputed from scratch: %g\n", timing_cost_check); if (fabs( timing_cost_check diff --git a/vpr/src/place/place_checkpoint.cpp b/vpr/src/place/place_checkpoint.cpp index 9775550c50b..292430d6c04 100644 --- a/vpr/src/place/place_checkpoint.cpp +++ b/vpr/src/place/place_checkpoint.cpp @@ -57,9 +57,10 @@ void restore_best_placement(vtr::vector_map& block_ //recompute timing from scratch placer_criticalities.get()->set_recompute_required(); placer_setup_slacks.get()->set_recompute_required(); - comp_td_connection_delays(place_delay_model.get()); + comp_td_connection_delays(place_delay_model.get(), block_locs); perform_full_timing_update(crit_params, place_delay_model.get(), + block_locs, placer_criticalities.get(), placer_setup_slacks.get(), pin_timing_invalidator.get(), diff --git a/vpr/src/place/place_constraints.cpp b/vpr/src/place/place_constraints.cpp index cfb51e2779a..f85640ea494 100644 --- a/vpr/src/place/place_constraints.cpp +++ b/vpr/src/place/place_constraints.cpp @@ -13,13 +13,12 @@ #include "place_util.h" #include "re_cluster_util.h" -int check_placement_floorplanning() { +int check_placement_floorplanning(const vtr::vector_map& block_locs) { int error = 0; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - auto loc = place_ctx.block_locs[blk_id].loc; + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc loc = block_locs[blk_id].loc; if (!cluster_floorplanning_legal(blk_id, loc)) { error++; VTR_LOG_ERROR("Block %zu is not in correct floorplanning region.\n", size_t(blk_id)); diff --git a/vpr/src/place/place_constraints.h b/vpr/src/place/place_constraints.h index e8a1d9531d7..64285728e96 100644 --- a/vpr/src/place/place_constraints.h +++ b/vpr/src/place/place_constraints.h @@ -21,7 +21,7 @@ * * @return int The number of errors (inconsistencies in adherence to floorplanning constraints). */ -int check_placement_floorplanning(); +int check_placement_floorplanning(const vtr::vector_map& block_locs); /** diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index e1399d8f8a0..1d2ed985354 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -352,9 +352,11 @@ std::unique_ptr alloc_lookups_and_delay_model(const Netlist<>& * Only estimate delay for signals routed through the inter-block routing network. * TODO: Do how should we compute the delay for globals. "Global signals are assumed to have zero delay." */ -float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, ClusterNetId net_id, int ipin) { +float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs, + ClusterNetId net_id, + int ipin) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); float delay_source_to_sink = 0.; @@ -368,12 +370,12 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, Cluste int source_block_ipin = cluster_ctx.clb_nlist.pin_logical_index(source_pin); int sink_block_ipin = cluster_ctx.clb_nlist.pin_logical_index(sink_pin); - int source_x = place_ctx.block_locs[source_block].loc.x; - int source_y = place_ctx.block_locs[source_block].loc.y; - int source_layer = place_ctx.block_locs[source_block].loc.layer; - int sink_x = place_ctx.block_locs[sink_block].loc.x; - int sink_y = place_ctx.block_locs[sink_block].loc.y; - int sink_layer = place_ctx.block_locs[sink_block].loc.layer; + int source_x = block_locs[source_block].loc.x; + int source_y = block_locs[source_block].loc.y; + int source_layer = block_locs[source_block].loc.layer; + int sink_x = block_locs[sink_block].loc.x; + int sink_y = block_locs[sink_block].loc.y; + int sink_layer = block_locs[sink_block].loc.layer; /** * This heuristic only considers delta_x and delta_y, a much better @@ -400,14 +402,15 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, Cluste } ///@brief Recompute all point to point delays, updating `connection_delay` matrix. -void comp_td_connection_delays(const PlaceDelayModel* delay_model) { +void comp_td_connection_delays(const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs) { const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& p_timing_ctx = g_placer_ctx.mutable_timing(); auto& connection_delay = p_timing_ctx.connection_delay; for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ++ipin) { - connection_delay[net_id][ipin] = comp_td_single_connection_delay(delay_model, net_id, ipin); + connection_delay[net_id][ipin] = comp_td_single_connection_delay(delay_model, block_locs, net_id, ipin); } } } diff --git a/vpr/src/place/place_delay_model.h b/vpr/src/place/place_delay_model.h index 681cc136d87..5b61d18eaf2 100644 --- a/vpr/src/place/place_delay_model.h +++ b/vpr/src/place/place_delay_model.h @@ -39,10 +39,14 @@ std::unique_ptr alloc_lookups_and_delay_model(const Netlist<>& bool is_flat); ///@brief Returns the delay of one point to point connection. -float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, ClusterNetId net_id, int ipin); +float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs, + ClusterNetId net_id, + int ipin); ///@brief Recompute all point to point delays, updating `connection_delay` matrix. -void comp_td_connection_delays(const PlaceDelayModel* delay_model); +void comp_td_connection_delays(const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs); ///@brief Abstract interface to a placement delay model. class PlaceDelayModel { diff --git a/vpr/src/place/place_timing_update.cpp b/vpr/src/place/place_timing_update.cpp index 619ea0ad068..e198592b33f 100644 --- a/vpr/src/place/place_timing_update.cpp +++ b/vpr/src/place/place_timing_update.cpp @@ -11,6 +11,7 @@ /* Routines local to place_timing_update.cpp */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, + const vtr::vector_map& block_locs, ClusterNetId net, int ipin); static double sum_td_net_cost(ClusterNetId net); @@ -27,6 +28,7 @@ static constexpr bool INCR_COMP_TD_COSTS = true; */ void initialize_timing_info(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, @@ -47,6 +49,7 @@ void initialize_timing_info(const PlaceCritParams& crit_params, //Perform first time update for all timing related classes perform_full_timing_update(crit_params, delay_model, + block_locs, criticalities, setup_slacks, pin_timing_invalidator, @@ -75,6 +78,7 @@ void initialize_timing_info(const PlaceCritParams& crit_params, */ void perform_full_timing_update(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, @@ -92,6 +96,7 @@ void perform_full_timing_update(const PlaceCritParams& crit_params, /* Update the timing cost with new connection criticalities. */ update_timing_cost(delay_model, criticalities, + block_locs, &costs->timing_cost); /* Commit the setup slacks since they are updated. */ @@ -155,11 +160,12 @@ void update_timing_classes(const PlaceCritParams& crit_params, */ void update_timing_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs, double* timing_cost) { #ifdef INCR_COMP_TD_COSTS - update_td_costs(delay_model, *criticalities, timing_cost); + update_td_costs(delay_model, *criticalities, block_locs, timing_cost); #else - comp_td_costs(delay_model, *criticalities, timing_cost); + comp_td_costs(delay_model, *criticalities, block_locs, timing_cost); #endif } @@ -240,7 +246,10 @@ bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks) { * * See PlacerTimingCosts object used to represent connection_timing_costs for details. */ -void update_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, double* timing_cost) { +void update_td_costs(const PlaceDelayModel* delay_model, + const PlacerCriticalities& place_crit, + const vtr::vector_map& block_locs, + double* timing_cost) { vtr::Timer t; auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; @@ -264,7 +273,7 @@ void update_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticaliti int ipin = clb_nlist.pin_net_index(clb_pin); VTR_ASSERT_SAFE(ipin >= 1 && ipin < int(clb_nlist.net_pins(clb_net).size())); - double new_timing_cost = comp_td_connection_cost(delay_model, place_crit, clb_net, ipin); + double new_timing_cost = comp_td_connection_cost(delay_model, place_crit, block_locs, clb_net, ipin); //Record new value connection_timing_cost[clb_net][ipin] = new_timing_cost; @@ -301,18 +310,21 @@ void update_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticaliti * * For a more efficient incremental update, see update_td_costs(). */ -void comp_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, double* timing_cost) { +void comp_td_costs(const PlaceDelayModel* delay_model, + const PlacerCriticalities& place_crit, + const vtr::vector_map& block_locs, + double* timing_cost) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& p_timing_ctx = g_placer_ctx.mutable_timing(); auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; auto& net_timing_cost = p_timing_ctx.net_timing_cost; - for (auto net_id : cluster_ctx.clb_nlist.nets()) { + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) continue; for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ipin++) { - float conn_timing_cost = comp_td_connection_cost(delay_model, place_crit, net_id, ipin); + float conn_timing_cost = comp_td_connection_cost(delay_model, place_crit, block_locs, net_id, ipin); /* Record new value */ connection_timing_cost[net_id][ipin] = conn_timing_cost; @@ -332,13 +344,14 @@ void comp_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, + const vtr::vector_map& block_locs, ClusterNetId net, int ipin) { const auto& p_timing_ctx = g_placer_ctx.timing(); VTR_ASSERT_SAFE_MSG(ipin > 0, "Shouldn't be calculating connection timing cost for driver pins"); - VTR_ASSERT_SAFE_MSG(p_timing_ctx.connection_delay[net][ipin] == comp_td_single_connection_delay(delay_model, net, ipin), + VTR_ASSERT_SAFE_MSG(p_timing_ctx.connection_delay[net][ipin] == comp_td_single_connection_delay(delay_model, block_locs, net, ipin), "Connection delays should already be updated"); double conn_timing_cost = place_crit.criticality(net, ipin) * p_timing_ctx.connection_delay[net][ipin]; @@ -366,14 +379,14 @@ static double sum_td_net_cost(ClusterNetId net) { return net_td_cost; } -///@brief Returns the total timing cost accross all nets based on the values in net_timing_cost. +///@brief Returns the total timing cost across all nets based on the values in net_timing_cost. static double sum_td_costs() { const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& p_timing_ctx = g_placer_ctx.timing(); const auto& net_timing_cost = p_timing_ctx.net_timing_cost; double td_cost = 0; - for (auto net_id : cluster_ctx.clb_nlist.nets()) { + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) { continue; } diff --git a/vpr/src/place/place_timing_update.h b/vpr/src/place/place_timing_update.h index 67fca81b3ee..89f98a568f7 100644 --- a/vpr/src/place/place_timing_update.h +++ b/vpr/src/place/place_timing_update.h @@ -12,6 +12,7 @@ ///@brief Initialize the timing information and structures in the placer. void initialize_timing_info(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, @@ -21,6 +22,7 @@ void initialize_timing_info(const PlaceCritParams& crit_params, ///@brief Updates every timing related classes, variables and structures. void perform_full_timing_update(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, + const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, @@ -37,13 +39,20 @@ void update_timing_classes(const PlaceCritParams& crit_params, ///@brief Updates the timing driven (td) costs. void update_timing_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, + const vtr::vector_map& block_locs, double* timing_cost); ///@brief Incrementally updates timing cost based on the current delays and criticality estimates. -void update_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, double* timing_cost); +void update_td_costs(const PlaceDelayModel* delay_model, + const PlacerCriticalities& place_crit, + const vtr::vector_map& block_locs, + double* timing_cost); ///@brief Recomputes timing cost from scratch based on the current delays and criticality estimates. -void comp_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, double* timing_cost); +void comp_td_costs(const PlaceDelayModel* delay_model, + const PlacerCriticalities& place_crit, + const vtr::vector_map& block_locs, + double* timing_cost); /** * @brief Commit all the setup slack values from the PlacerSetupSlacks diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index a1bffc66a68..aece9cf22b8 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -7,12 +7,11 @@ #define CRIT_MULT_FOR_W_MEDIAN 10 -static void get_bb_cost_for_net_excluding_block(ClusterNetId net_id, - ClusterBlockId block_id, +static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, ClusterPinId moving_pin_id, const PlacerCriticalities* criticalities, t_bb_cost* coords, - bool& skip_net); + const vtr::vector_map& block_locs); e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, @@ -54,9 +53,6 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& place_move_ctx.layer_coord.clear(); std::vector layer_blk_cnt(num_layers, 0); - //true if the net is a feedback from the block to itself (all the net terminals are connected to the same block) - bool skip_net; - //iterate over block pins for (ClusterPinId pin_id : cluster_ctx.clb_nlist.block_pins(b_from)) { ClusterNetId net_id = cluster_ctx.clb_nlist.pin_net(pin_id); @@ -69,10 +65,12 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& * * Note: skip_net returns true if this net should be skipped. Currently, the only case to skip a net is the feedback nets * (a net that all its terminals connected to the same block). Logically, this net should be neglected as it is only connected - * to the moving block. Experimentally, we found that including these nets into calculations badly affect the averall placement + * to the moving block. Experimentally, we found that including these nets into calculations badly affect the overall placement * solution especillay for some large designs. + * + * Note: skip_net true if the net is a feedback from the block to itself (all the net terminals are connected to the same block) */ - get_bb_cost_for_net_excluding_block(net_id, b_from, pin_id, criticalities, &coords, skip_net); + bool skip_net = get_bb_cost_for_net_excluding_block(net_id, pin_id, criticalities, &coords, block_locs); if (skip_net) continue; @@ -159,58 +157,56 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& * - moving_pin_id: pin (which should be on this net) on a block that is being moved. * - criticalities: the timing criticalities of all connections */ -static void get_bb_cost_for_net_excluding_block(ClusterNetId net_id, ClusterBlockId, ClusterPinId moving_pin_id, const PlacerCriticalities* criticalities, t_bb_cost* coords, bool& skip_net) { - int pnum, x, y, layer, xmin, xmax, ymin, ymax, layer_min, layer_max; - float xmin_cost, xmax_cost, ymin_cost, ymax_cost, layer_min_cost, layer_max_cost, cost; - - skip_net = true; - - xmin = 0; - xmax = 0; - ymin = 0; - ymax = 0; - layer_min = 0; - layer_max = 0; - - cost = 0.0; - xmin_cost = 0.0; - xmax_cost = 0.0; - ymin_cost = 0.0; - ymax_cost = 0.0; - layer_min_cost = 0.; - layer_max_cost = 0.; +static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, + ClusterPinId moving_pin_id, + const PlacerCriticalities* criticalities, + t_bb_cost* coords, + const vtr::vector_map& block_locs) { + bool skip_net = true; + + int xmin = 0; + int xmax = 0; + int ymin = 0; + int ymax = 0; + int layer_min = 0; + int layer_max = 0; + + float xmin_cost = 0.f; + float xmax_cost = 0.f; + float ymin_cost = 0.f; + float ymax_cost = 0.f; + float layer_min_cost = 0.f; + float layer_max_cost = 0.f; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; - ClusterBlockId bnum; bool is_first_block = true; - int ipin; - for (auto pin_id : cluster_ctx.clb_nlist.net_pins(net_id)) { - bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - layer = place_ctx.block_locs[bnum].loc.layer; + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_pins(net_id)) { + ClusterBlockId bnum = cluster_ctx.clb_nlist.pin_block(pin_id); + int layer = block_locs[bnum].loc.layer; if (pin_id != moving_pin_id) { skip_net = false; - pnum = tile_pin_index(pin_id); + int pnum = tile_pin_index(pin_id); /** * Calculates the pin index of the correct pin to calculate the required connection * * if the current pin is the driver, we only care about one sink (the moving pin) * else if the current pin is a sink, calculate the criticality of itself */ + int ipin; if (cluster_ctx.clb_nlist.pin_type(pin_id) == PinType::DRIVER) { ipin = cluster_ctx.clb_nlist.pin_net_index(moving_pin_id); } else { ipin = cluster_ctx.clb_nlist.pin_net_index(pin_id); } - cost = criticalities->criticality(net_id, ipin); + float cost = criticalities->criticality(net_id, ipin); VTR_ASSERT(pnum >= 0); - x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; + int x = block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; + int y = block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; x = std::max(std::min(x, (int)grid.width() - 2), 1); //-2 for no perim channels y = std::max(std::min(y, (int)grid.height() - 2), 1); //-2 for no perim channels @@ -270,4 +266,6 @@ static void get_bb_cost_for_net_excluding_block(ClusterNetId net_id, ClusterBloc coords->ymax = {ymax, ymax_cost}; coords->layer_min = {layer_min, layer_min_cost}; coords->layer_max = {layer_max, layer_max_cost}; + + return skip_net; } diff --git a/vpr/src/route/rr_graph.cpp b/vpr/src/route/rr_graph.cpp index ee25b1d3531..076a73dce19 100644 --- a/vpr/src/route/rr_graph.cpp +++ b/vpr/src/route/rr_graph.cpp @@ -803,11 +803,11 @@ static void add_intra_cluster_edges_rr_graph(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(is_flat); /* This function should be called if placement is done! */ - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); auto& cluster_net_list = g_vpr_ctx.clustering().clb_nlist; int num_collapsed_nodes = 0; - for (auto cluster_blk_id : cluster_net_list.blocks()) { - auto block_loc = place_ctx.block_locs[cluster_blk_id].loc; + for (ClusterBlockId cluster_blk_id : cluster_net_list.blocks()) { + t_pl_loc block_loc = block_locs[cluster_blk_id].loc; int i = block_loc.x; int j = block_loc.y; int layer = block_loc.layer; @@ -2180,17 +2180,12 @@ static void set_clusters_pin_chains(const ClusteredNetlist& clb_nlist, bool is_flat) { VTR_ASSERT(is_flat); - const auto& place_ctx = g_vpr_ctx.placement(); + const auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - t_physical_tile_type_ptr physical_type; - t_logical_block_type_ptr logical_block; - const t_sub_tile* sub_tile; - int rel_cap; - - for (auto cluster_blk_id : clb_nlist.blocks()) { - auto block_loc = place_ctx.block_locs[cluster_blk_id].loc; + for (ClusterBlockId cluster_blk_id : clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[cluster_blk_id].loc; int abs_cap = block_loc.sub_tile; - std::tie(physical_type, sub_tile, rel_cap, logical_block) = get_cluster_blk_physical_spec(cluster_blk_id); + const auto [physical_type, sub_tile, rel_cap, logical_block] = get_cluster_blk_physical_spec(cluster_blk_id); auto cluster_pins = get_cluster_block_pins(physical_type, cluster_blk_id, diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 678746fc229..a38906b772a 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -102,7 +102,7 @@ const t_model_ports* find_model_port(const t_model* model, const std::string& na } if (required) { - VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find port '%s; on architecture modedl '%s'\n", name.c_str(), model->name); + VPR_FATAL_ERROR(VPR_ERROR_ARCH, "Failed to find port '%s; on architecture model '%s'\n", name.c_str(), model->name); } return nullptr; @@ -124,18 +124,19 @@ void sync_grid_to_blocks() { auto& device_ctx = g_vpr_ctx.device(); auto& device_grid = device_ctx.grid; - int num_layers = device_ctx.grid.get_num_layers(); + const int num_layers = device_ctx.grid.get_num_layers(); + + auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); + auto& block_locs = place_ctx.get_block_locs(); /* Reset usage and allocate blocks list if needed */ - place_ctx.grid_blocks = GridBlock(device_grid.width(), - device_grid.height(), - device_ctx.grid.get_num_layers()); - auto& grid_blocks = place_ctx.grid_blocks; + grid_blocks = GridBlock(device_grid.width(), device_grid.height(), device_ctx.grid.get_num_layers()); + for (int layer_num = 0; layer_num < num_layers; layer_num++) { for (int x = 0; x < (int)device_grid.width(); ++x) { for (int y = 0; y < (int)device_grid.height(); ++y) { - const auto& type = device_ctx.grid.get_physical_type({x, y, layer_num}); + const t_physical_tile_type_ptr type = device_ctx.grid.get_physical_type({x, y, layer_num}); grid_blocks.initialized_grid_block_at_location({x, y, layer_num}, type->capacity); } } @@ -144,11 +145,11 @@ void sync_grid_to_blocks() { /* Go through each block */ auto& cluster_ctx = g_vpr_ctx.clustering(); for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { - const auto& blk_loc = place_ctx.block_locs[blk_id].loc; - int blk_x = place_ctx.block_locs[blk_id].loc.x; - int blk_y = place_ctx.block_locs[blk_id].loc.y; - int blk_z = place_ctx.block_locs[blk_id].loc.sub_tile; - int blk_layer = place_ctx.block_locs[blk_id].loc.layer; + const auto& blk_loc = block_locs[blk_id].loc; + int blk_x = block_locs[blk_id].loc.x; + int blk_y = block_locs[blk_id].loc.y; + int blk_z = block_locs[blk_id].loc.sub_tile; + int blk_layer = block_locs[blk_id].loc.layer; auto type = physical_tile_type(blk_id); @@ -170,8 +171,8 @@ void sync_grid_to_blocks() { } /* Check already in use */ - if ((EMPTY_BLOCK_ID != place_ctx.grid_blocks.block_at_location(blk_loc)) - && (INVALID_BLOCK_ID != place_ctx.grid_blocks.block_at_location(blk_loc))) { + if ((EMPTY_BLOCK_ID != grid_blocks.block_at_location(blk_loc)) + && (INVALID_BLOCK_ID != grid_blocks.block_at_location(blk_loc))) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Location (%d, %d, %d, %d) is used more than once.\n", blk_x, blk_y, blk_z, blk_layer); } @@ -184,18 +185,10 @@ void sync_grid_to_blocks() { /* Set the block */ for (int width = 0; width < type->width; ++width) { for (int height = 0; height < type->height; ++height) { - place_ctx.grid_blocks.set_block_at_location({blk_x + width, - blk_y + height, - blk_z, - blk_layer}, - blk_id); - place_ctx.grid_blocks.set_usage({blk_x + width, - blk_y + height, - blk_layer}, - place_ctx.grid_blocks.get_usage({blk_x + width, - blk_y + height, - blk_layer}) - + 1); + grid_blocks.set_block_at_location({blk_x + width, blk_y + height, blk_z, blk_layer}, blk_id); + grid_blocks.set_usage({blk_x + width, blk_y + height, blk_layer}, + grid_blocks.get_usage({blk_x + width, blk_y + height, blk_layer}) + 1); + VTR_ASSERT(device_ctx.grid.get_width_offset({blk_x + width, blk_y + height, blk_layer}) == width); VTR_ASSERT(device_ctx.grid.get_height_offset({blk_x + width, blk_y + height, blk_layer}) == height); } @@ -692,7 +685,7 @@ t_block_loc get_block_loc(const ParentBlockId& block_id, bool is_flat) { } VTR_ASSERT(cluster_block_id != ClusterBlockId::INVALID()); - auto blk_loc = place_ctx.block_locs[cluster_block_id]; + auto blk_loc = place_ctx.get_block_locs()[cluster_block_id]; return blk_loc; } From bc22a201a0189109875294a580e55bfbc12306f4 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Wed, 24 Jul 2024 12:29:03 -0400 Subject: [PATCH 028/146] remove place_ctx.block_locs from timing graph resolver --- .../libtatum/libtatum/tatum/TimingReporter.cpp | 4 ++-- vpr/src/timing/PreClusterTimingGraphResolver.cpp | 11 ++++++----- vpr/src/timing/VprTimingGraphResolver.cpp | 11 ++++++----- 3 files changed, 14 insertions(+), 12 deletions(-) diff --git a/libs/EXTERNAL/libtatum/libtatum/tatum/TimingReporter.cpp b/libs/EXTERNAL/libtatum/libtatum/tatum/TimingReporter.cpp index 69c9ba07a83..69e8e4bbd18 100644 --- a/libs/EXTERNAL/libtatum/libtatum/tatum/TimingReporter.cpp +++ b/libs/EXTERNAL/libtatum/libtatum/tatum/TimingReporter.cpp @@ -606,7 +606,7 @@ Time TimingReporter::report_timing_data_arrival_subpath(std::ostream& os, { //Input constraint - TATUM_ASSERT(subpath.elements().size() > 0); + TATUM_ASSERT(!subpath.elements().empty()); const TimingPathElem& path_elem = *(subpath.elements().begin()); Time input_constraint; @@ -712,7 +712,7 @@ bool TimingReporter::nearly_equal(const Time& lhs, const Time& rhs) const { size_t TimingReporter::estimate_point_print_width(const TimingPath& path) const { size_t width = 60; //default - for(auto subpath : {path.clock_launch_path(), path.data_arrival_path(), path.clock_capture_path()}) { + for(const auto& subpath : {path.clock_launch_path(), path.data_arrival_path(), path.clock_capture_path()}) { for(auto elem : subpath.elements()) { //Take the longest typical point name std::string point = name_resolver_.node_name(elem.node()) + " (" + name_resolver_.node_type_name(elem.node()) + ")"; diff --git a/vpr/src/timing/PreClusterTimingGraphResolver.cpp b/vpr/src/timing/PreClusterTimingGraphResolver.cpp index c6de97ae868..3433ba054f3 100644 --- a/vpr/src/timing/PreClusterTimingGraphResolver.cpp +++ b/vpr/src/timing/PreClusterTimingGraphResolver.cpp @@ -27,12 +27,13 @@ std::string PreClusterTimingGraphResolver::node_type_name(tatum::NodeId node) co if (detail_level() == e_timing_report_detail::AGGREGATED) { //Annotate primitive grid location, if known auto& atom_ctx = g_vpr_ctx.atom(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); ClusterBlockId cb = atom_ctx.lookup.atom_clb(blk); - if (cb && place_ctx.block_locs.count(cb)) { - int x = place_ctx.block_locs[cb].loc.x; - int y = place_ctx.block_locs[cb].loc.y; - name += " at (" + std::to_string(x) + "," + std::to_string(y) + ")"; + if (cb && block_locs.count(cb)) { + int x = block_locs[cb].loc.x; + int y = block_locs[cb].loc.y; + int layer = block_locs[cb].loc.layer; + name += " at (" + std::to_string(x) + ", " + std::to_string(y) + ", " + std::to_string(layer) + ")"; } } diff --git a/vpr/src/timing/VprTimingGraphResolver.cpp b/vpr/src/timing/VprTimingGraphResolver.cpp index cdc1124ef6e..793a5f0424f 100644 --- a/vpr/src/timing/VprTimingGraphResolver.cpp +++ b/vpr/src/timing/VprTimingGraphResolver.cpp @@ -31,12 +31,13 @@ std::string VprTimingGraphResolver::node_type_name(tatum::NodeId node) const { //Detailed report consist of the aggregated reported with a breakdown of inter-block routing //Annotate primitive grid location, if known auto& atom_ctx = g_vpr_ctx.atom(); - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); ClusterBlockId cb = atom_ctx.lookup.atom_clb(blk); - if (cb && place_ctx.block_locs.count(cb)) { - int x = place_ctx.block_locs[cb].loc.x; - int y = place_ctx.block_locs[cb].loc.y; - name += " at (" + std::to_string(x) + "," + std::to_string(y) + ")"; + if (cb && block_locs.count(cb)) { + int x = block_locs[cb].loc.x; + int y = block_locs[cb].loc.y; + int layer = block_locs[cb].loc.layer; + name += " at (" + std::to_string(x) + ", " + std::to_string(y) + ", " + std::to_string(layer) + ")"; } if (detail_level() == e_timing_report_detail::DEBUG) { name += " tnode(" + std::to_string(size_t(node)) + ")"; From f73092f51131eb4e83fe1335d8ce626bc8d9fe21 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Wed, 24 Jul 2024 12:38:34 -0400 Subject: [PATCH 029/146] remove more accesses to place_ctx.block_locs --- vpr/src/draw/manual_moves.cpp | 6 ++-- vpr/src/draw/search_bar.cpp | 4 ++- vpr/src/pack/re_cluster_util.cpp | 4 +-- vpr/src/place/analytic_placer.cpp | 12 +++---- vpr/src/place/cut_spreader.cpp | 52 ++++++++++++++++++------------- vpr/src/route/overuse_report.cpp | 2 +- 6 files changed, 46 insertions(+), 34 deletions(-) diff --git a/vpr/src/draw/manual_moves.cpp b/vpr/src/draw/manual_moves.cpp index d37526494c5..9d939fd37cf 100644 --- a/vpr/src/draw/manual_moves.cpp +++ b/vpr/src/draw/manual_moves.cpp @@ -173,16 +173,16 @@ bool is_manual_move_legal(ClusterBlockId block_id, t_pl_loc to) { } //If the destination block is user constrained, abort this swap - auto b_to = place_ctx.grid_blocks.block_at_location(to); + auto b_to = place_ctx.get_grid_blocks().block_at_location(to); if (b_to != INVALID_BLOCK_ID && b_to != EMPTY_BLOCK_ID) { - if (place_ctx.block_locs[b_to].is_fixed) { + if (place_ctx.get_block_locs()[b_to].is_fixed) { invalid_breakpoint_entry_window("Block is fixed"); return false; } } //If the block requested is already in that location. - t_pl_loc current_block_loc = place_ctx.block_locs[block_id].loc; + t_pl_loc current_block_loc = place_ctx.get_block_locs()[block_id].loc; if (to.x == current_block_loc.x && to.y == current_block_loc.y && to.sub_tile == current_block_loc.sub_tile) { invalid_breakpoint_entry_window("The block is currently in this location"); return false; diff --git a/vpr/src/draw/search_bar.cpp b/vpr/src/draw/search_bar.cpp index bd7e160d4ad..27de47bb0ac 100644 --- a/vpr/src/draw/search_bar.cpp +++ b/vpr/src/draw/search_bar.cpp @@ -300,7 +300,9 @@ void highlight_cluster_block(ClusterBlockId clb_index) { } else { /* Highlight block and fan-in/fan-outs. */ draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(clb_index), clb_index); - sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", size_t(clb_index), cluster_ctx.clb_nlist.block_name(clb_index).c_str(), place_ctx.block_locs[clb_index].loc.x, place_ctx.block_locs[clb_index].loc.y); + sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", + size_t(clb_index), cluster_ctx.clb_nlist.block_name(clb_index).c_str(), + place_ctx.get_block_locs()[clb_index].loc.x, place_ctx.get_block_locs()[clb_index].loc.y); } application.update_message(msg); diff --git a/vpr/src/pack/re_cluster_util.cpp b/vpr/src/pack/re_cluster_util.cpp index 7993ba5cf83..793bf216824 100644 --- a/vpr/src/pack/re_cluster_util.cpp +++ b/vpr/src/pack/re_cluster_util.cpp @@ -82,10 +82,10 @@ void commit_mol_move(ClusterBlockId old_clb, //place the new cluster if this function called during placement (after the initial placement is done) if (!during_packing && new_clb_created) { int imacro; - g_vpr_ctx.mutable_placement().block_locs.resize(g_vpr_ctx.placement().block_locs.size() + 1); + g_vpr_ctx.mutable_placement().get_mutable_block_locs().resize(g_vpr_ctx.placement().get_block_locs().size() + 1); get_imacro_from_iblk(&imacro, old_clb, g_vpr_ctx.placement().pl_macros); set_imacro_for_iblk(&imacro, new_clb); - place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr, g_vpr_ctx.mutable_placement().block_locs); + place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr, g_vpr_ctx.mutable_placement().get_mutable_block_locs()); } } diff --git a/vpr/src/place/analytic_placer.cpp b/vpr/src/place/analytic_placer.cpp index 4752756bba3..5b9891d673f 100644 --- a/vpr/src/place/analytic_placer.cpp +++ b/vpr/src/place/analytic_placer.cpp @@ -301,11 +301,11 @@ void AnalyticPlacer::build_legal_locations() { // initialize other data members void AnalyticPlacer::init() { const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - PlacementContext& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); for (auto blk_id : clb_nlist.blocks()) { blk_locs.insert(blk_id, BlockLocation{}); - blk_locs[blk_id].loc = place_ctx.block_locs[blk_id].loc; // transfer of initial placement + blk_locs[blk_id].loc = block_locs[blk_id].loc; // transfer of initial placement row_num.insert(blk_id, DONT_SOLVE); // no blocks are moved by default, until they are setup in setup_solve_blks() } @@ -320,7 +320,7 @@ void AnalyticPlacer::init() { }; for (auto blk_id : clb_nlist.blocks()) { - if (!place_ctx.block_locs[blk_id].is_fixed && has_connections(blk_id)) + if (!block_locs[blk_id].is_fixed && has_connections(blk_id)) // not fixed and has connections // matrix equation is formulated based on connections, so requires at least one connection if (imacro(blk_id) == NO_MACRO || macro_head(blk_id) == blk_id) { @@ -741,7 +741,7 @@ std::string AnalyticPlacer::print_overlap(vtr::Matrix& overlap, FILE* fp) { void AnalyticPlacer::print_place(const char* place_file) { const DeviceContext& device_ctx = g_vpr_ctx.device(); const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - PlacementContext& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); FILE* fp; @@ -772,7 +772,7 @@ void AnalyticPlacer::print_place(const char* place_file) { "------------", "--------"); - if (!place_ctx.block_locs.empty()) { //Only if placement exists + if (!block_locs.empty()) { //Only if placement exists for (auto blk_id : clb_nlist.blocks()) { fprintf(fp, "%-25s %-18s %-12s %-25s %-5d %-5d %-10d #%-13zu %-8s\n", clb_nlist.block_name(blk_id).c_str(), @@ -783,7 +783,7 @@ void AnalyticPlacer::print_place(const char* place_file) { blk_locs[blk_id].loc.y, blk_locs[blk_id].loc.sub_tile, size_t(blk_id), - (place_ctx.block_locs[blk_id].is_fixed ? "true" : "false")); + (block_locs[blk_id].is_fixed ? "true" : "false")); } fprintf(fp, "\ntotal_HPWL: %d\n", total_hpwl()); vtr::Matrix overlap; diff --git a/vpr/src/place/cut_spreader.cpp b/vpr/src/place/cut_spreader.cpp index 88b0f913346..711a6b953f0 100644 --- a/vpr/src/place/cut_spreader.cpp +++ b/vpr/src/place/cut_spreader.cpp @@ -805,14 +805,15 @@ void CutSpreader::linear_spread_subarea(std::vector& cut_blks, */ void CutSpreader::strict_legalize() { auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = place_ctx.get_block_locs(); int max_x = g_vpr_ctx.device().grid.width(); int max_y = g_vpr_ctx.device().grid.height(); // clear the location of all blocks in place_ctx for (auto blk : clb_nlist.blocks()) { - if (!place_ctx.block_locs[blk].is_fixed && (ap->row_num[blk] != DONT_SOLVE || (imacro(blk) != NO_MACRO && ap->row_num[macro_head(blk)] != DONT_SOLVE))) { - unbind_tile(place_ctx.block_locs[blk].loc); + if (!block_locs[blk].is_fixed && (ap->row_num[blk] != DONT_SOLVE || (imacro(blk) != NO_MACRO && ap->row_num[macro_head(blk)] != DONT_SOLVE))) { + unbind_tile(block_locs[blk].loc); } } @@ -821,7 +822,7 @@ void CutSpreader::strict_legalize() { // length of the macro they are in (for single blocks, priority = 1). // This prioritizes the placement of longest macros over single blocks std::priority_queue> remaining; - for (auto blk : ap->solve_blks) { + for (ClusterBlockId blk : ap->solve_blks) { if (imacro(blk) != NO_MACRO) // blk is head block of a macro (only head blks are solved) remaining.emplace(place_ctx.pl_macros[imacro(blk)].members.size(), blk); else @@ -962,12 +963,15 @@ void CutSpreader::strict_legalize() { */ void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { auto& place_ctx = g_vpr_ctx.mutable_placement(); - VTR_ASSERT(place_ctx.grid_blocks.block_at_location(sub_tile) == EMPTY_BLOCK_ID); - VTR_ASSERT(place_ctx.block_locs[blk].is_fixed == false); - place_ctx.grid_blocks.set_block_at_location(sub_tile, blk); - place_ctx.block_locs[blk].loc = sub_tile; - place_ctx.grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, - place_ctx.grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) + 1); + auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); + auto& block_locs = place_ctx.get_mutable_block_locs(); + + VTR_ASSERT(grid_blocks.block_at_location(sub_tile) == EMPTY_BLOCK_ID); + VTR_ASSERT(block_locs[blk].is_fixed == false); + grid_blocks.set_block_at_location(sub_tile, blk); + block_locs[blk].loc = sub_tile; + grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, + place_ctx.grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) + 1); ap->blk_locs[blk].loc = sub_tile; } @@ -977,13 +981,16 @@ void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { */ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { auto& place_ctx = g_vpr_ctx.mutable_placement(); - VTR_ASSERT(place_ctx.grid_blocks.block_at_location(sub_tile) != EMPTY_BLOCK_ID); - ClusterBlockId blk = place_ctx.grid_blocks.block_at_location(sub_tile); - VTR_ASSERT(place_ctx.block_locs[blk].is_fixed == false); - place_ctx.block_locs[blk].loc = t_pl_loc{}; - place_ctx.grid_blocks.set_block_at_location(sub_tile, EMPTY_BLOCK_ID); - place_ctx.grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, - place_ctx.grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) - 1); + auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); + auto& block_locs = place_ctx.get_mutable_block_locs(); + + VTR_ASSERT(grid_blocks.block_at_location(sub_tile) != EMPTY_BLOCK_ID); + ClusterBlockId blk = grid_blocks.block_at_location(sub_tile); + VTR_ASSERT(block_locs[blk].is_fixed == false); + block_locs[blk].loc = t_pl_loc{}; + grid_blocks.set_block_at_location(sub_tile, EMPTY_BLOCK_ID); + grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, + place_ctx.grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) - 1); } /* @@ -992,10 +999,13 @@ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { * the block in place_ctx.grid_blocks) */ bool CutSpreader::is_placed(ClusterBlockId blk) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); - if (place_ctx.block_locs[blk].loc != t_pl_loc{}) { - auto loc = place_ctx.block_locs[blk].loc; - VTR_ASSERT(place_ctx.grid_blocks.block_at_location(loc) == blk); + auto& place_ctx = g_vpr_ctx.placement(); + auto& grid_blocks = place_ctx.get_grid_blocks(); + auto& block_locs = place_ctx.get_block_locs(); + + if (block_locs[blk].loc != t_pl_loc{}) { + auto loc = block_locs[blk].loc; + VTR_ASSERT(grid_blocks.block_at_location(loc) == blk); return true; } return false; diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 2e07f446314..4577e942a18 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -336,7 +336,7 @@ static void report_congested_nets(const Netlist<>& net_list, } else { cluster_block_id = convert_to_cluster_block_id(net_list.pin_block(sink_id)); } - auto cluster_loc = g_vpr_ctx.placement().block_locs[cluster_block_id]; + auto cluster_loc = g_vpr_ctx.placement().get_block_locs()[cluster_block_id]; auto physical_type = g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num}); int cluster_layer_num = cluster_loc.loc.layer; int cluster_x = cluster_loc.loc.x - g_vpr_ctx.device().grid.get_physical_type({cluster_loc.loc.x, cluster_loc.loc.y, cluster_layer_num})->width; From d15526dd68febbbf08ef23ef84f39d0b4be62c5d Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Wed, 24 Jul 2024 17:51:17 -0400 Subject: [PATCH 030/146] an attempt to remove calls to physical_tile_type(ClusterBlockId blk) --- vpr/src/base/place_and_route.cpp | 5 +- vpr/src/base/stats.cpp | 15 +- vpr/src/base/vpr_context.h | 2 - vpr/src/draw/draw_basic.cpp | 11 +- vpr/src/draw/draw_searchbar.cpp | 7 +- vpr/src/draw/draw_types.cpp | 3 +- vpr/src/place/directed_moves_util.cpp | 7 +- vpr/src/place/median_move_generator.cpp | 33 ++-- vpr/src/place/move_transactions.cpp | 4 +- vpr/src/place/net_cost_handler.cpp | 153 ++++++++---------- vpr/src/place/place.cpp | 20 +-- vpr/src/place/place_delay_model.cpp | 22 ++- vpr/src/place/place_util.cpp | 2 +- .../place/weighted_median_move_generator.cpp | 7 +- vpr/src/route/check_route.cpp | 22 +-- vpr/src/route/route_common.cpp | 17 +- vpr/src/util/vpr_utils.cpp | 52 ++++-- vpr/src/util/vpr_utils.h | 11 +- 18 files changed, 211 insertions(+), 182 deletions(-) diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index f7fab9bb7c3..1117b3378df 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -575,8 +575,9 @@ static float comp_width(t_chan* chan, float x, float separation) { void post_place_sync() { /* Go through each block */ auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); // Cluster-based netlist is used for placement - for (auto block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id); + for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { + place_sync_external_block_connections(block_id, block_locs); } } diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp index bc09e68418d..008c7a89116 100644 --- a/vpr/src/base/stats.cpp +++ b/vpr/src/base/stats.cpp @@ -60,6 +60,7 @@ void routing_stats(const Netlist<>& net_list, auto& device_ctx = g_vpr_ctx.device(); auto& rr_graph = device_ctx.rr_graph; auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); int num_rr_switch = rr_graph.num_rr_switches(); @@ -93,8 +94,9 @@ void routing_stats(const Netlist<>& net_list, VTR_LOG("\tTotal logic block area (Warning, need to add pitch of routing to blocks with height > 3): %g\n", area); used_area = 0; - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - auto type = physical_tile_type(blk_id); + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[blk_id].loc; + auto type = physical_tile_type(block_loc); if (!is_io_type(type)) { if (type->area == UNDEFINED) { used_area += grid_logic_tile_area * type->width * type->height; @@ -111,8 +113,9 @@ void routing_stats(const Netlist<>& net_list, get_segment_usage_stats(segment_inf); } - if (full_stats == true) + if (full_stats) { print_wirelen_prob_dist(is_flat); + } } /** @@ -427,9 +430,11 @@ void print_lambda() { float lambda; auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - auto type = physical_tile_type(blk_id); + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[blk_id].loc; + auto type = physical_tile_type(block_loc); VTR_ASSERT(type != nullptr); if (!is_io_type(type)) { for (ipin = 0; ipin < type->num_pins; ipin++) { diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 60a38ee9c02..029980bd73f 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -384,8 +384,6 @@ struct PackingMultithreadingContext : public Context { */ struct PlacementContext : public Context { private: - - bool loc_vars_are_accessible_ = true; public: diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index 8856b9f2c97..a2ec9acf7b0 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -831,8 +831,8 @@ void draw_placement_macros(ezgl::renderer* g) { xlow = std::min(xlow, x); ylow = std::min(ylow, y); - xhigh = std::max(xhigh, x + physical_tile_type(blk)->width); - yhigh = std::max(yhigh, y + physical_tile_type(blk)->height); + xhigh = std::max(xhigh, x + physical_tile_type(block_locs[blk].loc)->width); + yhigh = std::max(yhigh, y + physical_tile_type(block_locs[blk].loc)->height); } double draw_xlow = draw_coords->tile_x[xlow]; @@ -1420,6 +1420,7 @@ void draw_block_pin_util() { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); std::map total_input_pins; std::map total_output_pins; @@ -1434,9 +1435,9 @@ void draw_block_pin_util() { auto blks = cluster_ctx.clb_nlist.blocks(); vtr::vector pin_util(blks.size()); - for (auto blk : blks) { - auto type = physical_tile_type(blk); - + for (ClusterBlockId blk : blks) { + t_pl_loc block_loc = block_locs[blk].loc; + auto type = physical_tile_type(block_loc); if (draw_state->show_blk_pin_util == DRAW_BLOCK_PIN_UTIL_TOTAL) { pin_util[blk] = cluster_ctx.clb_nlist.block_pins(blk).size() / float(total_input_pins[type] + total_output_pins[type]); diff --git a/vpr/src/draw/draw_searchbar.cpp b/vpr/src/draw/draw_searchbar.cpp index fd11b0a2f43..c71b3abe56c 100644 --- a/vpr/src/draw/draw_searchbar.cpp +++ b/vpr/src/draw/draw_searchbar.cpp @@ -110,14 +110,17 @@ void draw_highlight_blocks_color(t_logical_block_type_ptr type, t_draw_state* draw_state = get_draw_state_vars(); auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); for (k = 0; k < type->pb_type->num_pins; k++) { /* Each pin on a CLB */ ClusterNetId net_id = cluster_ctx.clb_nlist.block_net(blk_id, k); - if (net_id == ClusterNetId::INVALID()) + if (net_id == ClusterNetId::INVALID()) { continue; + } - auto physical_tile = physical_tile_type(blk_id); + t_pl_loc block_loc = block_locs[blk_id].loc; + auto physical_tile = physical_tile_type(block_loc); int physical_pin = get_physical_pin(physical_tile, type, k); auto class_type = get_pin_type_from_pin_physical_num(physical_tile, physical_pin); diff --git a/vpr/src/draw/draw_types.cpp b/vpr/src/draw/draw_types.cpp index a54bc089f1d..0657fe24770 100644 --- a/vpr/src/draw/draw_types.cpp +++ b/vpr/src/draw/draw_types.cpp @@ -21,7 +21,8 @@ ezgl::color t_draw_state::block_color(ClusterBlockId blk) const { if (block_locs.empty()) { //No placement, pick best match tile_type = pick_physical_type(cluster_ctx.clb_nlist.block_type(blk)); } else { // Have placement, select physical tile implementing blk - tile_type = physical_tile_type(blk); + t_pl_loc block_loc = block_locs[blk].loc; + tile_type = physical_tile_type(block_loc); } VTR_ASSERT(tile_type != nullptr); return get_block_type_color(tile_type); diff --git a/vpr/src/place/directed_moves_util.cpp b/vpr/src/place/directed_moves_util.cpp index f77b6a032ee..dbfdbbc56af 100644 --- a/vpr/src/place/directed_moves_util.cpp +++ b/vpr/src/place/directed_moves_util.cpp @@ -11,9 +11,10 @@ t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const vtr::vector_ma ClusterBlockId block = cluster_ctx.clb_nlist.pin_block(pin); t_physical_tile_loc tile_loc; - tile_loc.x = block_locs[block].loc.x + physical_tile_type(block)->pin_width_offset[pnum]; - tile_loc.y = block_locs[block].loc.y + physical_tile_type(block)->pin_height_offset[pnum]; - tile_loc.layer_num = block_locs[block].loc.layer; + t_pl_loc block_loc = block_locs[block].loc; + tile_loc.x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + tile_loc.y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + tile_loc.layer_num = block_loc.layer; tile_loc.x = std::max(std::min(tile_loc.x, (int)grid.width() - 2), 1); //-2 for no perim channels tile_loc.y = std::max(std::min(tile_loc.y, (int)grid.height() - 2), 1); //-2 for no perim channels diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 301b93b7a2d..a7b22200d4d 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -59,8 +59,6 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ t_bb coords(OPEN, OPEN, OPEN, OPEN, OPEN, OPEN); t_bb limit_coords; - ClusterBlockId bnum; - int pnum, xnew, xold, ynew, yold, layer_new, layer_old; //clear the vectors that saves X & Y coords //reused to save allocation time @@ -86,8 +84,9 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ if (cluster_ctx.clb_nlist.net_sinks(net_id).size() < SMALL_NET) { //calculate the bb from scratch get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net, block_locs); - if (skip_net) + if (skip_net) { continue; + } } else { t_bb union_bb; const bool& cube_bb = g_vpr_ctx.placement().cube_bb; @@ -97,31 +96,36 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ const auto& net_bb_coords = cube_bb ? place_move_ctx.bb_coords[net_id] : union_bb; //use the incremental update of the bb - bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - pnum = tile_pin_index(pin_id); + ClusterBlockId bnum = cluster_ctx.clb_nlist.pin_block(pin_id); + int pnum = tile_pin_index(pin_id); VTR_ASSERT(pnum >= 0); - xold = block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - yold = block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; - layer_old = block_locs[bnum].loc.layer; + t_pl_loc block_loc = block_locs[bnum].loc; + t_physical_tile_type_ptr block_physical_type = physical_tile_type(block_loc); + int xold = block_loc.x + block_physical_type->pin_width_offset[pnum]; + int yold = block_loc.y + block_physical_type->pin_height_offset[pnum]; + int layer_old = block_loc.layer; xold = std::max(std::min(xold, (int)device_ctx.grid.width() - 2), 1); //-2 for no perim channels yold = std::max(std::min(yold, (int)device_ctx.grid.height() - 2), 1); //-2 for no perim channels layer_old = std::max(std::min(layer_old, (int)device_ctx.grid.get_num_layers() - 1), 0); - //To calulate the bb incrementally while excluding the moving block + //To calculate the bb incrementally while excluding the moving block //assume that the moving block is moved to a non-critical coord of the bb + int xnew; if (net_bb_coords.xmin == xold) { xnew = net_bb_coords.xmax; } else { xnew = net_bb_coords.xmin; } + int ynew; if (net_bb_coords.ymin == yold) { ynew = net_bb_coords.ymax; } else { ynew = net_bb_coords.ymin; } + int layer_new; if (net_bb_coords.layer_min == layer_old) { layer_new = net_bb_coords.layer_max; } else { @@ -228,9 +232,10 @@ static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, if (bnum != block_id) { skip_net = false; pnum = net_pin_to_tile_pin_index(net_id, 0); - int src_x = block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - int src_y = block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; - int src_layer = block_locs[bnum].loc.layer; + const t_pl_loc& block_loc = block_locs[bnum].loc; + int src_x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int src_y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + int src_layer = block_loc.layer; xmin = src_x; ymin = src_y; @@ -248,8 +253,8 @@ static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, continue; skip_net = false; const auto& block_loc = block_locs[bnum].loc; - int x = block_loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - int y = block_loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; + int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; int layer = block_loc.layer; if (!first_block) { diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index 3b92426c070..030584085c6 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -57,7 +57,7 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { - place_sync_external_block_connections(blk); + place_sync_external_block_connections(blk, block_locs); } } } @@ -114,7 +114,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { - place_sync_external_block_connections(blk); + place_sync_external_block_connections(blk, block_locs); } VTR_ASSERT_SAFE_MSG(g_vpr_ctx.placement().grid_blocks.block_at_location(old_loc) == blk, diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 445b87f54ab..bcd5791a41c 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -133,9 +133,9 @@ static bool driven_by_moved_block(const ClusterNetId net, * @param blk_pin * @param pl_moved_block */ -static void update_net_bb(const ClusterNetId& net, - const ClusterBlockId& blk, - const ClusterPinId& blk_pin, +static void update_net_bb(const ClusterNetId net, + const ClusterBlockId blk, + const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block); /** @@ -240,9 +240,9 @@ static void get_non_updatable_bb(ClusterNetId net_id, * @param blk_pin ID of the pin connected to the net * @param pl_moved_block Placement info about */ -static void update_net_layer_bb(const ClusterNetId& net, - const ClusterBlockId& blk, - const ClusterPinId& blk_pin, +static void update_net_layer_bb(const ClusterNetId net, + const ClusterBlockId blk, + const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block); /** @@ -491,11 +491,12 @@ static bool driven_by_moved_block(const ClusterNetId net, return is_driven_by_move_blk; } -static void update_net_bb(const ClusterNetId& net, - const ClusterBlockId& blk, - const ClusterPinId& blk_pin, +static void update_net_bb(const ClusterNetId net, + const ClusterBlockId blk, + const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block) { auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().block_locs; if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -510,7 +511,8 @@ static void update_net_bb(const ClusterNetId& net, int iblk_pin = tile_pin_index(blk_pin); bool src_pin = cluster_ctx.clb_nlist.pin_type(blk_pin) == PinType::DRIVER; - t_physical_tile_type_ptr blk_type = physical_tile_type(blk); + t_pl_loc block_loc = block_locs[blk].loc; + t_physical_tile_type_ptr blk_type = physical_tile_type(block_loc); int pin_width_offset = blk_type->pin_width_offset[iblk_pin]; int pin_height_offset = blk_type->pin_height_offset[iblk_pin]; @@ -529,11 +531,12 @@ static void update_net_bb(const ClusterNetId& net, } } -static void update_net_layer_bb(const ClusterNetId& net, - const ClusterBlockId& blk, - const ClusterPinId& blk_pin, +static void update_net_layer_bb(const ClusterNetId net, + const ClusterBlockId blk, + const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block) { auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().block_locs; if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -547,7 +550,8 @@ static void update_net_layer_bb(const ClusterNetId& net, //For large nets, update bounding box incrementally int iblk_pin = tile_pin_index(blk_pin); - t_physical_tile_type_ptr blk_type = physical_tile_type(blk); + t_pl_loc block_loc = block_locs[blk].loc; + t_physical_tile_type_ptr blk_type = physical_tile_type(block_loc); int pin_width_offset = blk_type->pin_width_offset[iblk_pin]; int pin_height_offset = blk_type->pin_height_offset[iblk_pin]; @@ -720,42 +724,36 @@ static void get_non_updatable_bb(ClusterNetId net_id, t_bb& bb_coord_new, vtr::NdMatrixProxy num_sink_pin_layer) { //TODO: account for multiple physical pin instances per logical pin - - int xmax, ymax, layer_max, xmin, ymin, layer_min, x, y, layer; - int pnum; - auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - pnum = net_pin_to_tile_pin_index(net_id, 0); + int pnum = net_pin_to_tile_pin_index(net_id, 0); - x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; - layer = place_ctx.block_locs[bnum].loc.layer; + t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; + int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + int layer = block_loc.layer; - xmin = x; - ymin = y; - layer_min = layer; - xmax = x; - ymax = y; - layer_max = layer; + int xmin = x; + int ymin = y; + int layer_min = layer; + int xmax = x; + int ymax = y; + int layer_max = layer; for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) { num_sink_pin_layer[layer_num] = 0; } - for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); + block_loc = place_ctx.block_locs[bnum].loc; pnum = tile_pin_index(pin_id); - x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; - layer = place_ctx.block_locs[bnum].loc.layer; + x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + layer = block_loc.layer; if (x < xmin) { xmin = x; @@ -800,23 +798,22 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, //TODO: account for multiple physical pin instances per logical pin auto& device_ctx = g_vpr_ctx.device(); + auto& block_locs = g_vpr_ctx.placement().block_locs; + int num_layers = device_ctx.grid.get_num_layers(); for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) { num_sink_layer[layer_num] = 0; } - int pnum; - auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - pnum = net_pin_to_tile_pin_index(net_id, 0); + t_pl_loc block_loc = block_locs[bnum].loc; + int pnum = net_pin_to_tile_pin_index(net_id, 0); - int src_x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - int src_y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; + int src_x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int src_y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; std::vector xmin(num_layers, src_x); std::vector ymin(num_layers, src_y); @@ -825,11 +822,10 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); + block_loc = block_locs[bnum].loc; pnum = tile_pin_index(pin_id); - int x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - int y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; + int x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; int layer_num = place_ctx.block_locs[bnum].loc.layer; num_sink_layer[layer_num]++; @@ -1491,52 +1487,47 @@ static void get_bb_from_scratch(ClusterNetId net_id, t_bb& coords, t_bb& num_on_edges, vtr::NdMatrixProxy num_sink_pin_layer) { - int pnum, x, y, pin_layer, xmin, xmax, ymin, ymax, layer_min, layer_max; - int xmin_edge, xmax_edge, ymin_edge, ymax_edge, layer_min_edge, layer_max_edge; - auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - pnum = net_pin_to_tile_pin_index(net_id, 0); + t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; + int pnum = net_pin_to_tile_pin_index(net_id, 0); VTR_ASSERT_SAFE(pnum >= 0); - x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; - pin_layer = place_ctx.block_locs[bnum].loc.layer; + int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + int pin_layer = block_loc.layer; x = max(min(x, grid.width() - 2), 1); y = max(min(y, grid.height() - 2), 1); pin_layer = max(min(pin_layer, grid.get_num_layers() - 1), 0); - xmin = x; - ymin = y; - layer_min = pin_layer; - xmax = x; - ymax = y; - layer_max = pin_layer; + int xmin = x; + int ymin = y; + int layer_min = pin_layer; + int xmax = x; + int ymax = y; + int layer_max = pin_layer; - xmin_edge = 1; - ymin_edge = 1; - layer_min_edge = 1; - xmax_edge = 1; - ymax_edge = 1; - layer_max_edge = 1; + int xmin_edge = 1; + int ymin_edge = 1; + int layer_min_edge = 1; + int xmax_edge = 1; + int ymax_edge = 1; + int layer_max_edge = 1; for (int layer_num = 0; layer_num < grid.get_num_layers(); layer_num++) { num_sink_pin_layer[layer_num] = 0; } - for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); + block_loc = place_ctx.block_locs[bnum].loc; pnum = tile_pin_index(pin_id); - x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; + x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; pin_layer = place_ctx.block_locs[bnum].loc.layer; /* Code below counts IO blocks as being within the 1..grid.width()-2, 1..grid.height()-2 clb array. * @@ -1634,12 +1625,11 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, auto& grid = device_ctx.grid; ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); + t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; int pnum_src = net_pin_to_tile_pin_index(net_id, 0); VTR_ASSERT_SAFE(pnum_src >= 0); - int x_src = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum_src]; - int y_src = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum_src]; + int x_src = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum_src]; + int y_src = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum_src]; x_src = max(min(x_src, grid.width() - 2), 1); y_src = max(min(y_src, grid.height() - 2), 1); @@ -1658,16 +1648,15 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, ymax_edge[layer_num] = 1; } - for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); + block_loc = place_ctx.block_locs[bnum].loc; int pnum = tile_pin_index(pin_id); int layer = place_ctx.block_locs[bnum].loc.layer; VTR_ASSERT_SAFE(layer >= 0 && layer < num_layers); num_sink_pin_layer[layer]++; - int x = place_ctx.block_locs[bnum].loc.x - + physical_tile_type(bnum)->pin_width_offset[pnum]; - int y = place_ctx.block_locs[bnum].loc.y - + physical_tile_type(bnum)->pin_height_offset[pnum]; + int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; /* Code below counts IO blocks as being within the 1..grid.width()-2, 1..grid.height()-2 clb array. * * This is because channels do not go out of the 0..grid.width()-2, 0..grid.height()-2 range, and * diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index d8877cb123f..971e885fd04 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -456,7 +456,7 @@ void try_place(const Netlist<>& net_list, // Update physical pin values for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id); + place_sync_external_block_connections(block_id, g_vpr_ctx.placement().block_locs); } const int width_fac = placer_opts.place_chan_width; @@ -882,8 +882,8 @@ void try_place(const Netlist<>& net_list, //#endif // Update physical pin values - for (auto block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id); + for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { + place_sync_external_block_connections(block_id, g_vpr_ctx.placement().block_locs); } check_place(costs, @@ -2029,8 +2029,7 @@ static int check_block_placement_consistency() { auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); - vtr::vector bdone( - cluster_ctx.clb_nlist.blocks().size(), 0); + vtr::vector bdone(cluster_ctx.clb_nlist.blocks().size(), 0); /* Step through device grid and placement. Check it against blocks */ for (int layer_num = 0; layer_num < (int)device_ctx.grid.get_num_layers(); layer_num++) { @@ -2041,20 +2040,21 @@ static int check_block_placement_consistency() { if (place_ctx.grid_blocks.get_usage(tile_loc) > type->capacity) { VTR_LOG_ERROR( "%d blocks were placed at grid location (%d,%d,%d), but location capacity is %d.\n", - place_ctx.grid_blocks.get_usage(tile_loc), i, j, layer_num, - type->capacity); + place_ctx.grid_blocks.get_usage(tile_loc), i, j, layer_num, type->capacity); error++; } int usage_check = 0; for (int k = 0; k < type->capacity; k++) { - auto bnum = place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}); - if (EMPTY_BLOCK_ID == bnum || INVALID_BLOCK_ID == bnum) + ClusterBlockId bnum = place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}); + if (EMPTY_BLOCK_ID == bnum || INVALID_BLOCK_ID == bnum) { continue; + } auto logical_block = cluster_ctx.clb_nlist.block_type(bnum); auto physical_tile = type; + t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; - if (physical_tile_type(bnum) != physical_tile) { + if (physical_tile_type(block_loc) != physical_tile) { VTR_LOG_ERROR( "Block %zu type (%s) does not match grid location (%zu,%zu, %d) type (%s).\n", size_t(bnum), logical_block->name, i, j, layer_num, physical_tile->name); diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index 1d2ed985354..78c60d2d081 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -370,12 +370,8 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, int source_block_ipin = cluster_ctx.clb_nlist.pin_logical_index(source_pin); int sink_block_ipin = cluster_ctx.clb_nlist.pin_logical_index(sink_pin); - int source_x = block_locs[source_block].loc.x; - int source_y = block_locs[source_block].loc.y; - int source_layer = block_locs[source_block].loc.layer; - int sink_x = block_locs[sink_block].loc.x; - int sink_y = block_locs[sink_block].loc.y; - int sink_layer = block_locs[sink_block].loc.layer; + t_pl_loc source_block_loc = block_locs[source_block].loc; + t_pl_loc sink_block_loc = block_locs[sink_block].loc; /** * This heuristic only considers delta_x and delta_y, a much better @@ -384,16 +380,16 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, * In particular this approach does not accurately capture the effect * of fast carry-chain connections. */ - delay_source_to_sink = delay_model->delay({source_x, source_y, source_layer}, source_block_ipin, - {sink_x, sink_y, sink_layer}, sink_block_ipin); + delay_source_to_sink = delay_model->delay({source_block_loc.x, source_block_loc.y, source_block_loc.layer}, source_block_ipin, + {sink_block_loc.x, sink_block_loc.y, sink_block_loc.layer}, sink_block_ipin); if (delay_source_to_sink < 0) { VPR_ERROR(VPR_ERROR_PLACE, - "in comp_td_single_connection_delay: Bad delay_source_to_sink value %g from %s (at %d,%d) to %s (at %d,%d)\n" + "in comp_td_single_connection_delay: Bad delay_source_to_sink value %g from %s (at %d,%d,%d) to %s (at %d,%d,%d)\n" "in comp_td_single_connection_delay: Delay is less than 0\n", - block_type_pin_index_to_name(physical_tile_type(source_block), source_block_ipin, false).c_str(), - source_x, source_y, - block_type_pin_index_to_name(physical_tile_type(sink_block), sink_block_ipin, false).c_str(), - sink_x, sink_y, + block_type_pin_index_to_name(physical_tile_type(source_block_loc), source_block_ipin, false).c_str(), + source_block_loc.x, source_block_loc.y, source_block_loc.layer, + block_type_pin_index_to_name(physical_tile_type(sink_block_loc), sink_block_ipin, false).c_str(), + sink_block_loc.x, sink_block_loc.y, sink_block_loc.layer, delay_source_to_sink); } } diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 98a7a486c7f..09a97abb411 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -400,7 +400,7 @@ void set_block_location(ClusterBlockId blk_id, place_ctx.grid_blocks.set_block_at_location(location, blk_id); place_ctx.grid_blocks.set_usage({location.x, location.y, location.layer}, place_ctx.grid_blocks.get_usage({location.x, location.y, location.layer}) + 1); - place_sync_external_block_connections(blk_id); + place_sync_external_block_connections(blk_id, g_vpr_ctx.placement().block_locs); } bool macro_can_be_placed(t_pl_macro pl_macro, t_pl_loc head_pos, bool check_all_legality) { diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index aece9cf22b8..5fa519ca07e 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -185,7 +185,6 @@ static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, bool is_first_block = true; for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_pins(net_id)) { ClusterBlockId bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - int layer = block_locs[bnum].loc.layer; if (pin_id != moving_pin_id) { skip_net = false; @@ -205,8 +204,10 @@ static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, float cost = criticalities->criticality(net_id, ipin); VTR_ASSERT(pnum >= 0); - int x = block_locs[bnum].loc.x + physical_tile_type(bnum)->pin_width_offset[pnum]; - int y = block_locs[bnum].loc.y + physical_tile_type(bnum)->pin_height_offset[pnum]; + const t_pl_loc block_loc = block_locs[bnum].loc; + int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + int layer = block_loc.layer; x = std::max(std::min(x, (int)grid.width() - 2), 1); //-2 for no perim channels y = std::max(std::min(y, (int)grid.height() - 2), 1); //-2 for no perim channels diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp index cf18d894efa..31d847e16d4 100644 --- a/vpr/src/route/check_route.cpp +++ b/vpr/src/route/check_route.cpp @@ -477,6 +477,7 @@ void recompute_occupancy_from_scratch(const Netlist<>& net_list, bool is_flat) { */ auto& route_ctx = g_vpr_ctx.mutable_routing(); auto& device_ctx = g_vpr_ctx.device(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); /* First set the occupancy of everything to zero. */ for (RRNodeId inode : device_ctx.rr_graph.nodes()) @@ -503,8 +504,9 @@ void recompute_occupancy_from_scratch(const Netlist<>& net_list, bool is_flat) { * (CLB outputs used up by being directly wired to subblocks used only * * locally). */ for (auto blk_id : net_list.blocks()) { - auto cluster_blk_id = convert_to_cluster_block_id(blk_id); - for (int iclass = 0; iclass < (int)physical_tile_type(cluster_blk_id)->class_inf.size(); iclass++) { + ClusterBlockId cluster_blk_id = convert_to_cluster_block_id(blk_id); + t_pl_loc block_loc = block_locs[cluster_blk_id].loc; + for (int iclass = 0; iclass < (int)physical_tile_type(block_loc)->class_inf.size(); iclass++) { int num_local_opins = route_ctx.clb_opins_used_locally[cluster_blk_id][iclass].size(); /* Will always be 0 for pads or SINK classes. */ for (int ipin = 0; ipin < num_local_opins; ipin++) { @@ -522,20 +524,20 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ bool is_flat) { /* Checks that enough OPINs on CLBs have been set aside (used up) to make a * * legal routing if subblocks connect to OPINs directly. */ - - int iclass, num_local_opins, ipin; t_rr_type rr_type; auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - for (iclass = 0; iclass < (int)physical_tile_type(blk_id)->class_inf.size(); iclass++) { - num_local_opins = clb_opins_used_locally[blk_id][iclass].size(); + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[blk_id].loc; + for (int iclass = 0; iclass < (int)physical_tile_type(block_loc)->class_inf.size(); iclass++) { + int num_local_opins = clb_opins_used_locally[blk_id][iclass].size(); /* Always 0 for pads and for SINK classes */ - for (ipin = 0; ipin < num_local_opins; ipin++) { + for (int ipin = 0; ipin < num_local_opins; ipin++) { RRNodeId inode = clb_opins_used_locally[blk_id][iclass][ipin]; check_node_and_range(RRNodeId(inode), route_type, is_flat); /* Node makes sense? */ @@ -550,11 +552,11 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ } ipin = rr_graph.node_pin_num(RRNodeId(inode)); - if (get_class_num_from_pin_physical_num(physical_tile_type(blk_id), ipin) != iclass) { + if (get_class_num_from_pin_physical_num(physical_tile_type(block_loc), ipin) != iclass) { VPR_FATAL_ERROR(VPR_ERROR_ROUTE, "in check_locally_used_opins: block #%lu (%s):\n" "\tExpected class %d local OPIN has class %d -- rr_node #: %d.\n", - size_t(blk_id), cluster_ctx.clb_nlist.block_name(blk_id).c_str(), iclass, get_class_num_from_pin_physical_num(physical_tile_type(blk_id), ipin), inode); + size_t(blk_id), cluster_ctx.clb_nlist.block_name(blk_id).c_str(), iclass, get_class_num_from_pin_physical_num(physical_tile_type(block_loc), ipin), inode); } } } diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index ab3049859d8..214bdc7de89 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -334,11 +334,13 @@ static t_clb_opins_used alloc_and_load_clb_opins_used_locally() { int clb_pin, iclass; auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); clb_opins_used_locally.resize(cluster_ctx.clb_nlist.blocks().size()); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - auto type = physical_tile_type(blk_id); + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[blk_id].loc; + auto type = physical_tile_type(block_loc); auto sub_tile = type->sub_tiles[get_sub_tile_index(blk_id)]; auto class_range = get_class_range_for_block(blk_id); @@ -759,10 +761,12 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f auto& route_ctx = g_vpr_ctx.mutable_routing(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); if (rip_up_local_opins) { - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - type = physical_tile_type(blk_id); + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[blk_id].loc; + type = physical_tile_type(block_loc); for (iclass = 0; iclass < (int)type->class_inf.size(); iclass++) { num_local_opin = route_ctx.clb_opins_used_locally[blk_id][iclass].size(); @@ -783,8 +787,9 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f // Make sure heap is empty before we add nodes to the heap. heap->empty_heap(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - type = physical_tile_type(blk_id); + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + t_pl_loc block_loc = block_locs[blk_id].loc; + type = physical_tile_type(block_loc); for (iclass = 0; iclass < (int)type->class_inf.size(); iclass++) { num_local_opin = route_ctx.clb_opins_used_locally[blk_id][iclass].size(); diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index a38906b772a..c0b0e966506 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -151,7 +151,7 @@ void sync_grid_to_blocks() { int blk_z = block_locs[blk_id].loc.sub_tile; int blk_layer = block_locs[blk_id].loc.layer; - auto type = physical_tile_type(blk_id); + auto type = physical_tile_type(blk_loc); /* Check range of block coords */ if (blk_x < 0 || blk_y < 0 @@ -516,29 +516,40 @@ bool is_empty_type(t_logical_block_type_ptr type) { return type == device_ctx.EMPTY_LOGICAL_BLOCK_TYPE; } -t_physical_tile_type_ptr physical_tile_type(ClusterBlockId blk) { - auto& place_ctx = g_vpr_ctx.placement(); +t_physical_tile_type_ptr physical_tile_type(t_pl_loc loc) { auto& device_ctx = g_vpr_ctx.device(); - auto block_loc = place_ctx.block_locs[blk].loc; - - return device_ctx.grid.get_physical_type({block_loc.x, block_loc.y, block_loc.layer}); + return device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer}); } +//t_physical_tile_type_ptr physical_tile_type(ClusterBlockId blk) { +// auto& place_ctx = g_vpr_ctx.placement(); +// auto& device_ctx = g_vpr_ctx.device(); +// +// auto block_loc = place_ctx.block_locs[blk].loc; +// +// return device_ctx.grid.get_physical_type({block_loc.x, block_loc.y, block_loc.layer}); +//} + t_physical_tile_type_ptr physical_tile_type(AtomBlockId atom_blk) { auto& atom_look_up = g_vpr_ctx.atom().lookup; + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - auto cluster_blk = atom_look_up.atom_clb(atom_blk); + ClusterBlockId cluster_blk = atom_look_up.atom_clb(atom_blk); VTR_ASSERT(cluster_blk != ClusterBlockId::INVALID()); - return physical_tile_type(cluster_blk); + return physical_tile_type(block_locs[cluster_blk].loc); } t_physical_tile_type_ptr physical_tile_type(ParentBlockId blk_id, bool is_flat) { + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + if (is_flat) { return physical_tile_type(convert_to_atom_block_id(blk_id)); } else { - return physical_tile_type(convert_to_cluster_block_id(blk_id)); + ClusterBlockId cluster_blk_id = convert_to_cluster_block_id(blk_id); + t_pl_loc block_loc = block_locs[cluster_blk_id].loc; + return physical_tile_type(block_loc); } } @@ -601,7 +612,8 @@ t_class_range get_class_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ auto& place_ctx = g_vpr_ctx.placement(); - auto type = physical_tile_type(blk_id); + t_pl_loc block_loc = place_ctx.get_block_locs()[blk_id].loc; + auto type = physical_tile_type(block_loc); auto sub_tile = type->sub_tiles[get_sub_tile_index(blk_id)]; int sub_tile_capacity = sub_tile.capacity.total(); auto class_range = sub_tile.class_range; @@ -620,7 +632,7 @@ t_class_range get_class_range_for_block(const ClusterBlockId blk_id) { t_class_range get_class_range_for_block(const AtomBlockId atom_blk) { auto& atom_look_up = g_vpr_ctx.atom().lookup; - auto cluster_blk = atom_look_up.atom_clb(atom_blk); + ClusterBlockId cluster_blk = atom_look_up.atom_clb(atom_blk); t_physical_tile_type_ptr physical_tile; const t_sub_tile* sub_tile; @@ -648,7 +660,8 @@ std::pair get_pin_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ auto& place_ctx = g_vpr_ctx.placement(); - auto type = physical_tile_type(blk_id); + t_pl_loc block_loc = place_ctx.get_block_locs()[blk_id].loc; + auto type = physical_tile_type(block_loc); auto sub_tile = type->sub_tiles[get_sub_tile_index(blk_id)]; int sub_tile_capacity = sub_tile.capacity.total(); @@ -696,6 +709,7 @@ int get_block_num_class(const ParentBlockId& block_id, bool is_flat) { } int get_block_pin_class_num(const ParentBlockId& block_id, const ParentPinId& pin_id, bool is_flat) { + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); int class_num; if (is_flat) { @@ -703,8 +717,9 @@ int get_block_pin_class_num(const ParentBlockId& block_id, const ParentPinId& pi class_num = get_atom_pin_class_num(atom_pin_id); } else { ClusterBlockId cluster_block_id = convert_to_cluster_block_id(block_id); + t_pl_loc block_loc = block_locs[cluster_block_id].loc; ClusterPinId cluster_pin_id = convert_to_cluster_pin_id(pin_id); - auto type = physical_tile_type(cluster_block_id); + auto type = physical_tile_type(block_loc); int phys_pin = tile_pin_index(cluster_pin_id); class_num = get_class_num_from_pin_physical_num(type, phys_pin); } @@ -2098,12 +2113,15 @@ void print_switch_usage() { * } */ -void place_sync_external_block_connections(ClusterBlockId iblk) { +void place_sync_external_block_connections(ClusterBlockId iblk, + const vtr::vector_map& block_locs) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto physical_tile = physical_tile_type(iblk); + t_pl_loc block_loc = block_locs[iblk].loc; + + auto physical_tile = physical_tile_type(block_loc); auto logical_block = clb_nlist.block_type(iblk); int sub_tile_index = get_sub_tile_index(iblk); @@ -2114,9 +2132,9 @@ void place_sync_external_block_connections(ClusterBlockId iblk) { int max_num_block_pins = sub_tile.num_phy_pins / sub_tile.capacity.total(); /* Logical location and physical location is offset by z * max_num_block_pins */ - int rel_capacity = place_ctx.block_locs[iblk].loc.sub_tile - sub_tile.capacity.low; + int rel_capacity = block_loc.sub_tile - sub_tile.capacity.low; - for (auto pin : clb_nlist.block_pins(iblk)) { + for (ClusterPinId pin : clb_nlist.block_pins(iblk)) { int logical_pin_index = clb_nlist.pin_logical_index(pin); int sub_tile_pin_index = get_sub_tile_physical_pin(sub_tile_index, physical_tile, logical_block, logical_pin_index); diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index c7dbcc3716d..6e6cd669ead 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -28,7 +28,9 @@ bool is_empty_type(t_physical_tile_type_ptr type); bool is_empty_type(t_logical_block_type_ptr type); //Returns the corresponding physical type given the logical type as parameter -t_physical_tile_type_ptr physical_tile_type(ClusterBlockId blk); +t_physical_tile_type_ptr physical_tile_type(t_pl_loc loc); + +//t_physical_tile_type_ptr physical_tile_type(ClusterBlockId blk); t_physical_tile_type_ptr physical_tile_type(AtomBlockId atom_blk); @@ -222,7 +224,7 @@ AtomBlockId find_memory_sibling(const t_pb* pb); * @param iblk cluster block ID to sync within the assigned physical tile * * This routine updates the physical pins vector of the place context after the placement step - * to syncronize the pins related to the logical block with the actual connection interface of + * to synchronize the pins related to the logical block with the actual connection interface of * the belonging physical tile with the RR graph. * * This step is required as the logical block can be placed at any compatible sub tile locations @@ -233,10 +235,11 @@ AtomBlockId find_memory_sibling(const t_pb* pb); * tile IO pins are selected. * * This routine uses the x,y and sub_tile coordinates of the clb netlist, and expects those to place each netlist block - * at a legal location that can accomodate it. + * at a legal location that can accommodate it. * It does not check for overuse of locations, therefore it can be used with placements that have resource overuse. */ -void place_sync_external_block_connections(ClusterBlockId iblk); +void place_sync_external_block_connections(ClusterBlockId iblk, + const vtr::vector_map& block_locs); //Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index); From 9192990f4609e205f7948266b2f69bc7e475a4bc Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 26 Jul 2024 12:21:40 -0400 Subject: [PATCH 031/146] remove remaining place_ctx.block_locs from vpr_utils.cpp --- vpr/src/place/place_util.cpp | 3 +- vpr/src/util/vpr_utils.cpp | 59 ++++++++++++++---------------------- vpr/src/util/vpr_utils.h | 3 ++ 3 files changed, 28 insertions(+), 37 deletions(-) diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 09a97abb411..c5c2ea0b943 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -400,7 +400,8 @@ void set_block_location(ClusterBlockId blk_id, place_ctx.grid_blocks.set_block_at_location(location, blk_id); place_ctx.grid_blocks.set_usage({location.x, location.y, location.layer}, place_ctx.grid_blocks.get_usage({location.x, location.y, location.layer}) + 1); - place_sync_external_block_connections(blk_id, g_vpr_ctx.placement().block_locs); + + place_sync_external_block_connections(blk_id, block_locs); } bool macro_can_be_placed(t_pl_macro pl_macro, t_pl_loc head_pos, bool check_all_legality) { diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index c0b0e966506..95998578dba 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -553,13 +553,13 @@ t_physical_tile_type_ptr physical_tile_type(ParentBlockId blk_id, bool is_flat) } } -int get_sub_tile_index(ClusterBlockId blk) { - auto& place_ctx = g_vpr_ctx.placement(); +int get_sub_tile_index(ClusterBlockId blk, + const vtr::vector_map& block_locs) { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); auto logical_block = cluster_ctx.clb_nlist.block_type(blk); - auto block_loc = place_ctx.block_locs[blk]; + auto block_loc = block_locs[blk]; auto loc = block_loc.loc; int sub_tile_coordinate = loc.sub_tile; @@ -579,6 +579,11 @@ int get_sub_tile_index(ClusterBlockId blk) { VPR_THROW(VPR_ERROR_PLACE, "The Block Id %d has been placed in an impossible sub tile location.\n", blk); } +int get_sub_tile_index(ClusterBlockId blk) { + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + return get_sub_tile_index(blk, block_locs); +} + /* Each node in the pb_graph for a top-level pb_type can be uniquely identified * by its pins. Since the pins in a cluster of a certain type are densely indexed, * this function will find the pin index (int pin_count_in_cluster) of the first @@ -610,9 +615,9 @@ int get_unique_pb_graph_node_id(const t_pb_graph_node* pb_graph_node) { t_class_range get_class_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - t_pl_loc block_loc = place_ctx.get_block_locs()[blk_id].loc; + t_pl_loc block_loc = block_locs[blk_id].loc; auto type = physical_tile_type(block_loc); auto sub_tile = type->sub_tiles[get_sub_tile_index(blk_id)]; int sub_tile_capacity = sub_tile.capacity.total(); @@ -620,7 +625,7 @@ t_class_range get_class_range_for_block(const ClusterBlockId blk_id) { int class_range_total = class_range.high - class_range.low + 1; VTR_ASSERT((class_range_total) % sub_tile_capacity == 0); - int rel_capacity = place_ctx.block_locs[blk_id].loc.sub_tile - sub_tile.capacity.low; + int rel_capacity = block_locs[blk_id].loc.sub_tile - sub_tile.capacity.low; t_class_range abs_class_range; abs_class_range.low = rel_capacity * (class_range_total / sub_tile_capacity) + class_range.low; @@ -634,11 +639,7 @@ t_class_range get_class_range_for_block(const AtomBlockId atom_blk) { ClusterBlockId cluster_blk = atom_look_up.atom_clb(atom_blk); - t_physical_tile_type_ptr physical_tile; - const t_sub_tile* sub_tile; - int sub_tile_cap; - t_logical_block_type_ptr logical_block; - std::tie(physical_tile, sub_tile, sub_tile_cap, logical_block) = get_cluster_blk_physical_spec(cluster_blk); + auto [physical_tile, sub_tile, sub_tile_cap, logical_block] = get_cluster_blk_physical_spec(cluster_blk); const t_pb_graph_node* pb_graph_node = atom_look_up.atom_pb_graph_node(atom_blk); VTR_ASSERT(pb_graph_node != nullptr); return get_pb_graph_node_class_physical_range(physical_tile, @@ -658,15 +659,15 @@ t_class_range get_class_range_for_block(const ParentBlockId blk_id, bool is_flat std::pair get_pin_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ - auto& place_ctx = g_vpr_ctx.placement(); + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - t_pl_loc block_loc = place_ctx.get_block_locs()[blk_id].loc; + t_pl_loc block_loc = block_locs[blk_id].loc; auto type = physical_tile_type(block_loc); auto sub_tile = type->sub_tiles[get_sub_tile_index(blk_id)]; int sub_tile_capacity = sub_tile.capacity.total(); VTR_ASSERT(sub_tile.num_phy_pins % sub_tile_capacity == 0); - int rel_capacity = place_ctx.block_locs[blk_id].loc.sub_tile - sub_tile.capacity.low; + int rel_capacity = block_loc.sub_tile - sub_tile.capacity.low; int rel_pin_low = rel_capacity * (sub_tile.num_phy_pins / sub_tile_capacity); int rel_pin_high = (rel_capacity + 1) * (sub_tile.num_phy_pins / sub_tile_capacity) - 1; @@ -1343,7 +1344,7 @@ static void load_pin_id_to_pb_mapping_rec(t_pb* cur_pb, t_pb** pin_id_to_pb_mapp */ void free_pin_id_to_pb_mapping(vtr::vector& pin_id_to_pb_mapping) { auto& cluster_ctx = g_vpr_ctx.clustering(); - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { delete[] pin_id_to_pb_mapping[blk_id]; } pin_id_to_pb_mapping.clear(); @@ -1351,8 +1352,8 @@ void free_pin_id_to_pb_mapping(vtr::vector& pin_id_to_pb std::tuple get_cluster_blk_physical_spec(ClusterBlockId cluster_blk_id) { auto& grid = g_vpr_ctx.device().grid; - auto& place_ctx = g_vpr_ctx.placement(); - auto& loc = place_ctx.block_locs[cluster_blk_id].loc; + auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& loc = block_locs[cluster_blk_id].loc; int cap = loc.sub_tile; const auto& physical_type = grid.get_physical_type({loc.x, loc.y, loc.layer}); VTR_ASSERT(grid.get_width_offset({loc.x, loc.y, loc.layer}) == 0 && grid.get_height_offset(t_physical_tile_loc(loc.x, loc.y, loc.layer)) == 0); @@ -1371,12 +1372,7 @@ std::vector get_cluster_internal_class_pairs(const AtomLookup& atom_lookup, ClusterBlockId cluster_block_id) { std::vector class_num_vec; - t_physical_tile_type_ptr physical_tile; - const t_sub_tile* sub_tile; - int rel_cap; - t_logical_block_type_ptr logical_block; - - std::tie(physical_tile, sub_tile, rel_cap, logical_block) = get_cluster_blk_physical_spec(cluster_block_id); + auto [physical_tile, sub_tile, rel_cap, logical_block] = get_cluster_blk_physical_spec(cluster_block_id); class_num_vec.reserve(physical_tile->primitive_class_inf.size()); const auto& cluster_atoms = cluster_to_atoms(cluster_block_id); @@ -1400,12 +1396,7 @@ std::vector get_cluster_internal_pins(ClusterBlockId cluster_blk_id) { auto& cluster_net_list = g_vpr_ctx.clustering().clb_nlist; - t_physical_tile_type_ptr physical_tile; - const t_sub_tile* sub_tile; - int rel_cap; - t_logical_block_type_ptr logical_block; - - std::tie(physical_tile, sub_tile, rel_cap, logical_block) = get_cluster_blk_physical_spec(cluster_blk_id); + auto [physical_tile, sub_tile, rel_cap, logical_block] = get_cluster_blk_physical_spec(cluster_blk_id); internal_pins.reserve(logical_block->pin_logical_num_to_pb_pin_mapping.size()); std::list internal_pbs; @@ -2124,7 +2115,7 @@ void place_sync_external_block_connections(ClusterBlockId iblk, auto physical_tile = physical_tile_type(block_loc); auto logical_block = clb_nlist.block_type(iblk); - int sub_tile_index = get_sub_tile_index(iblk); + int sub_tile_index = get_sub_tile_index(iblk, block_locs); auto sub_tile = physical_tile->sub_tiles[sub_tile_index]; VTR_ASSERT(sub_tile.num_phy_pins % sub_tile.capacity.total() == 0); @@ -2182,11 +2173,7 @@ int get_atom_pin_class_num(const AtomPinId atom_pin_id) { auto atom_blk_id = atom_net_list.pin_block(atom_pin_id); auto cluster_block_id = atom_look_up.atom_clb(atom_blk_id); - t_physical_tile_type_ptr physical_type; - const t_sub_tile* sub_tile; - int sub_tile_rel_cap; - t_logical_block_type_ptr logical_block; - std::tie(physical_type, sub_tile, sub_tile_rel_cap, logical_block) = get_cluster_blk_physical_spec(cluster_block_id); + auto [physical_type, sub_tile, sub_tile_rel_cap, logical_block] = get_cluster_blk_physical_spec(cluster_block_id); auto pb_graph_pin = atom_look_up.atom_pin_pb_graph_pin(atom_pin_id); int pin_physical_num = -1; pin_physical_num = get_pb_pin_physical_num(physical_type, sub_tile, logical_block, sub_tile_rel_cap, pb_graph_pin); @@ -2208,7 +2195,7 @@ t_physical_tile_port find_tile_port_by_name(t_physical_tile_type_ptr type, const } void pretty_print_uint(const char* prefix, size_t value, int num_digits, int scientific_precision) { - //Print as integer if it will fit in the width, other wise scientific + //Print as integer if it will fit in the width, otherwise scientific if (value <= std::pow(10, num_digits) - 1) { //Direct VTR_LOG("%s%*zu", prefix, num_digits, value); diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index 6e6cd669ead..7b31049ff6e 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -37,6 +37,9 @@ t_physical_tile_type_ptr physical_tile_type(AtomBlockId atom_blk); t_physical_tile_type_ptr physical_tile_type(ParentBlockId blk_id, bool is_flat); //Returns the sub tile corresponding to the logical block location within a physical type +int get_sub_tile_index(ClusterBlockId blk, + const vtr::vector_map& block_locs); + int get_sub_tile_index(ClusterBlockId blk); int get_unique_pb_graph_node_id(const t_pb_graph_node* pb_graph_node); From cfb147e083e01cfae9485d5422f5fa83c507ddc7 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 26 Jul 2024 17:05:27 -0400 Subject: [PATCH 032/146] remove g_placer_ctx --- vpr/src/draw/manual_moves.cpp | 5 +- vpr/src/draw/manual_moves.h | 3 +- vpr/src/place/RL_agent_util.cpp | 19 +- vpr/src/place/RL_agent_util.h | 3 +- vpr/src/place/centroid_move_generator.cpp | 30 +-- vpr/src/place/centroid_move_generator.h | 9 +- .../place/critical_uniform_move_generator.cpp | 11 +- .../place/critical_uniform_move_generator.h | 8 +- .../place/feasible_region_move_generator.cpp | 20 +- .../place/feasible_region_move_generator.h | 8 +- vpr/src/place/manual_move_generator.cpp | 16 +- vpr/src/place/manual_move_generator.h | 6 +- vpr/src/place/median_move_generator.cpp | 64 +++--- vpr/src/place/median_move_generator.h | 17 +- vpr/src/place/move_generator.h | 10 +- vpr/src/place/move_utils.cpp | 26 +-- vpr/src/place/move_utils.h | 8 +- vpr/src/place/net_cost_handler.cpp | 142 ++++++------ vpr/src/place/net_cost_handler.h | 5 + vpr/src/place/place.cpp | 204 ++++++++++-------- vpr/src/place/place_checkpoint.cpp | 15 +- vpr/src/place/place_checkpoint.h | 3 +- vpr/src/place/place_delay_model.cpp | 5 +- vpr/src/place/place_delay_model.h | 3 +- vpr/src/place/place_timing_update.cpp | 83 +++---- vpr/src/place/place_timing_update.h | 21 +- vpr/src/place/placer_context.h | 18 ++ vpr/src/place/placer_globals.cpp | 2 +- vpr/src/place/placer_globals.h | 2 +- vpr/src/place/simpleRL_move_generator.cpp | 5 +- vpr/src/place/simpleRL_move_generator.h | 30 +-- vpr/src/place/static_move_generator.cpp | 23 +- vpr/src/place/static_move_generator.h | 7 +- vpr/src/place/timing_place.cpp | 6 +- vpr/src/place/timing_place.h | 19 +- vpr/src/place/uniform_move_generator.cpp | 14 +- vpr/src/place/uniform_move_generator.h | 8 +- .../weighted_centroid_move_generator.cpp | 19 +- .../place/weighted_centroid_move_generator.h | 8 +- .../place/weighted_median_move_generator.cpp | 17 +- .../place/weighted_median_move_generator.h | 8 +- 41 files changed, 542 insertions(+), 388 deletions(-) diff --git a/vpr/src/draw/manual_moves.cpp b/vpr/src/draw/manual_moves.cpp index 9d939fd37cf..c1b0f496770 100644 --- a/vpr/src/draw/manual_moves.cpp +++ b/vpr/src/draw/manual_moves.cpp @@ -310,13 +310,12 @@ e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_g e_move_type& move_type, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* criticalities) { draw_manual_moves_window(""); update_screen(ScreenUpdatePriority::MAJOR, " ", PLACEMENT, nullptr); move_type = e_move_type::MANUAL_MOVE; t_propose_action proposed_action{move_type, -1}; //no need to specify block type in manual move "propose_move" function - return manual_move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, block_locs); + return manual_move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); } #endif /*NO_GRAPHICS*/ diff --git a/vpr/src/draw/manual_moves.h b/vpr/src/draw/manual_moves.h index 9ea70912c0b..44e531a8b26 100644 --- a/vpr/src/draw/manual_moves.h +++ b/vpr/src/draw/manual_moves.h @@ -160,8 +160,7 @@ e_create_move manual_move_display_and_propose(ManualMoveGenerator& manual_move_g e_move_type& move_type, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs); + const PlacerCriticalities* criticalities); #endif /*NO_GRAPHICS*/ diff --git a/vpr/src/place/RL_agent_util.cpp b/vpr/src/place/RL_agent_util.cpp index 9ac7f6b9553..bc89c227803 100644 --- a/vpr/src/place/RL_agent_util.cpp +++ b/vpr/src/place/RL_agent_util.cpp @@ -2,7 +2,8 @@ #include "static_move_generator.h" #include "manual_move_generator.h" -std::pair, std::unique_ptr> create_move_generators(const t_placer_opts& placer_opts, +std::pair, std::unique_ptr> create_move_generators(PlacerContext& placer_ctx, + const t_placer_opts& placer_opts, int move_lim, double noc_attraction_weight) { @@ -19,8 +20,8 @@ std::pair, std::unique_ptr> create move_name.c_str(), placer_opts.place_static_move_prob[move_type]); } - move_generators.first = std::make_unique(placer_opts.place_static_move_prob); - move_generators.second = std::make_unique(placer_opts.place_static_move_prob); + move_generators.first = std::make_unique(placer_ctx, placer_opts.place_static_move_prob); + move_generators.second = std::make_unique(placer_ctx, placer_opts.place_static_move_prob); } else { //RL based placement /* For the non timing driven placement: the agent has a single state * * - Available moves are (Uniform / Median / Centroid) * @@ -72,7 +73,8 @@ std::pair, std::unique_ptr> create placer_opts.place_agent_epsilon); } karmed_bandit_agent1->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.first = std::make_unique(karmed_bandit_agent1, + move_generators.first = std::make_unique(placer_ctx, + karmed_bandit_agent1, noc_attraction_weight, placer_opts.place_high_fanout_net); //agent's 2nd state @@ -80,7 +82,8 @@ std::pair, std::unique_ptr> create e_agent_space::MOVE_TYPE, placer_opts.place_agent_epsilon); karmed_bandit_agent2->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.second = std::make_unique(karmed_bandit_agent2, + move_generators.second = std::make_unique(placer_ctx, + karmed_bandit_agent2, noc_attraction_weight, placer_opts.place_high_fanout_net); } else { @@ -96,14 +99,16 @@ std::pair, std::unique_ptr> create e_agent_space::MOVE_TYPE); } karmed_bandit_agent1->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.first = std::make_unique(karmed_bandit_agent1, + move_generators.first = std::make_unique(placer_ctx, + karmed_bandit_agent1, noc_attraction_weight, placer_opts.place_high_fanout_net); //agent's 2nd state karmed_bandit_agent2 = std::make_unique(second_state_avail_moves, e_agent_space::MOVE_TYPE); karmed_bandit_agent2->set_step(placer_opts.place_agent_gamma, move_lim); - move_generators.second = std::make_unique(karmed_bandit_agent2, + move_generators.second = std::make_unique(placer_ctx, + karmed_bandit_agent2, noc_attraction_weight, placer_opts.place_high_fanout_net); } diff --git a/vpr/src/place/RL_agent_util.h b/vpr/src/place/RL_agent_util.h index fd104ecfcd8..26ab290e54f 100644 --- a/vpr/src/place/RL_agent_util.h +++ b/vpr/src/place/RL_agent_util.h @@ -17,7 +17,8 @@ enum class e_agent_state { * It returns a unique pointer for each move generator in move_generator and move_generator2 * move_lim: represents the num of moves per temp. */ -std::pair, std::unique_ptr> create_move_generators(const t_placer_opts& placer_opts, +std::pair, std::unique_ptr> create_move_generators(PlacerContext& placer_ctx, + const t_placer_opts& placer_opts, int move_lim, double noc_attraction_weight); diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index 8f9ebf312a8..d5b50b8f4d7 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -15,12 +15,16 @@ vtr::vector CentroidMoveGenerator::cluster_to_noc_gr std::map CentroidMoveGenerator::noc_router_to_noc_group_; -CentroidMoveGenerator::CentroidMoveGenerator() - : noc_attraction_w_(0.0f) +CentroidMoveGenerator::CentroidMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) + , noc_attraction_w_(0.0f) , noc_attraction_enabled_(false) {} -CentroidMoveGenerator::CentroidMoveGenerator(float noc_attraction_weight, size_t high_fanout_net) - : noc_attraction_w_(noc_attraction_weight) +CentroidMoveGenerator::CentroidMoveGenerator(PlacerContext& placer_ctx, + float noc_attraction_weight, + size_t high_fanout_net) + : MoveGenerator(placer_ctx) + , noc_attraction_w_(noc_attraction_weight) , noc_attraction_enabled_(true) { VTR_ASSERT(noc_attraction_weight > 0.0 && noc_attraction_weight <= 1.0); @@ -38,10 +42,14 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* /*criticalities*/) { + auto& placer_ctx = placer_ctx_.get(); + const auto& block_locs = placer_ctx.get_block_locs(); + const auto& device_ctx = g_vpr_ctx.device(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& place_move_ctx = placer_ctx.mutable_move(); // Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Centroid Move Choose Block %d - rlim %f\n", @@ -54,13 +62,11 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block return e_create_move::ABORT; } - const auto& device_ctx = g_vpr_ctx.device(); - const auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); + t_pl_loc from = block_locs[b_from].loc; - auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); - auto grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); + t_logical_block_type_ptr cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); + t_physical_tile_type_ptr grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); VTR_ASSERT(is_tile_compatible(grid_from_type, cluster_from_type)); t_range_limiters range_limiters{rlim, diff --git a/vpr/src/place/centroid_move_generator.h b/vpr/src/place/centroid_move_generator.h index c56455f9988..20930a5fc70 100644 --- a/vpr/src/place/centroid_move_generator.h +++ b/vpr/src/place/centroid_move_generator.h @@ -24,7 +24,7 @@ class CentroidMoveGenerator : public MoveGenerator { * The move generator created by calling this constructor only consider * netlist connectivity for computing the centroid location. */ - CentroidMoveGenerator(); + explicit CentroidMoveGenerator(PlacerContext& placer_ctx); /** * The move generator created by calling this constructor considers both @@ -39,7 +39,9 @@ class CentroidMoveGenerator : public MoveGenerator { * @param high_fanout_net All nets with a fanout larger than this number are * ignored when forming NoC groups. */ - CentroidMoveGenerator(float noc_attraction_weight, size_t high_fanout_net); + CentroidMoveGenerator(PlacerContext& placer_ctx, + float noc_attraction_weight, + size_t high_fanout_net); /** @@ -62,8 +64,7 @@ class CentroidMoveGenerator : public MoveGenerator { t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* /*criticalities*/) override; private: /** A value in range [0, 1] that specifies how much the centroid location diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index 1130a76ef0c..0f252f913db 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -3,18 +3,22 @@ #include "place_constraints.h" #include "move_utils.h" +CriticalUniformMoveGenerator::CriticalUniformMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} + e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* /*criticalities*/) { auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& placer_ctx = placer_ctx_.get(); + const auto& block_locs = placer_ctx_.get().get_block_locs(); ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, block_locs); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Critical Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -42,3 +46,4 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved return create_move; } + diff --git a/vpr/src/place/critical_uniform_move_generator.h b/vpr/src/place/critical_uniform_move_generator.h index ef7181644cb..dc914a65511 100644 --- a/vpr/src/place/critical_uniform_move_generator.h +++ b/vpr/src/place/critical_uniform_move_generator.h @@ -15,12 +15,16 @@ * Returns its choices by filling in affected_blocks. */ class CriticalUniformMoveGenerator : public MoveGenerator { + public: + CriticalUniformMoveGenerator() = delete; + explicit CriticalUniformMoveGenerator(PlacerContext& placer_ctx); + + private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& /*placer_opts*/, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* /*criticalities*/) override; }; #endif diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 91b4a024490..77cab4f27b6 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -5,19 +5,23 @@ #include "place_constraints.h" #include "move_utils.h" +FeasibleRegionMoveGenerator::FeasibleRegionMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} + e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* criticalities) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); + auto& placer_ctx = placer_ctx_.get(); + auto& place_move_ctx = placer_ctx.mutable_move(); + auto& block_locs = placer_ctx.get_block_locs(); ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, block_locs); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Feasible Region Move Choose Block %di - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -35,8 +39,6 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& t_pl_loc to; // Currently, we don't change the layer for this move to.layer = from.layer; - int ipin; - ClusterBlockId bnum; int max_x, min_x, max_y, min_y; place_move_ctx.X_coord.clear(); @@ -47,9 +49,9 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) continue; - ipin = cluster_ctx.clb_nlist.pin_net_index(pin_id); + int ipin = cluster_ctx.clb_nlist.pin_net_index(pin_id); if (criticalities->criticality(net_id, ipin) > placer_opts.place_crit_limit) { - bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); + ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); place_move_ctx.X_coord.push_back(block_locs[bnum].loc.x); place_move_ctx.Y_coord.push_back(block_locs[bnum].loc.y); } @@ -134,4 +136,4 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& } return create_move; -} +} \ No newline at end of file diff --git a/vpr/src/place/feasible_region_move_generator.h b/vpr/src/place/feasible_region_move_generator.h index a7021aef2eb..74cd3529fdb 100644 --- a/vpr/src/place/feasible_region_move_generator.h +++ b/vpr/src/place/feasible_region_move_generator.h @@ -19,12 +19,16 @@ * */ class FeasibleRegionMoveGenerator : public MoveGenerator { + public: + FeasibleRegionMoveGenerator() = delete; + explicit FeasibleRegionMoveGenerator(PlacerContext& placer_ctx); + + private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* criticalities) override; }; #endif diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index 623614d5c16..01f726ecb92 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -17,13 +17,20 @@ # include "draw.h" #endif //NO_GRAPHICS +ManualMoveGenerator::ManualMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} + //Manual Move Generator function e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& /*proposed_action*/, float /*rlim*/, const t_placer_opts& /*placer_opts*/, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* /*criticalities*/) { + auto& place_ctx = g_vpr_ctx.placement(); + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& device_ctx = g_vpr_ctx.device(); + auto& block_locs = placer_ctx_.get().get_block_locs(); + int block_id = -1; t_pl_loc to; @@ -40,10 +47,6 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; //No movable block was found } - auto& place_ctx = g_vpr_ctx.placement(); - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& device_ctx = g_vpr_ctx.device(); - //Gets the current location of the block to move. t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); @@ -64,3 +67,4 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); return create_move; } + diff --git a/vpr/src/place/manual_move_generator.h b/vpr/src/place/manual_move_generator.h index 64f79474941..a4797fb98b3 100644 --- a/vpr/src/place/manual_move_generator.h +++ b/vpr/src/place/manual_move_generator.h @@ -26,13 +26,15 @@ */ class ManualMoveGenerator : public MoveGenerator { public: + ManualMoveGenerator() = delete; + explicit ManualMoveGenerator(PlacerContext& placer_ctx); + //Evaluates if move is successful and legal or unable to do. e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& /*proposed_action*/, float /*rlim*/, const t_placer_opts& /*placer_opts*/, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* /*criticalities*/) override; }; #endif /*VPR_MANUAL_MOVE_GEN_H */ diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index a7b22200d4d..89ced73e93f 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -5,34 +5,28 @@ #include "placer_globals.h" #include "move_utils.h" -static bool get_bb_incrementally(ClusterNetId net_id, - t_bb& bb_coord_new, - int xold, - int yold, - int layer_old, - int xnew, - int ynew, - int layer_new); - -static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, - t_bb& bb_coord_new, - ClusterBlockId block_id, - bool& skip_net, - const vtr::vector_map& block_locs); +MedianMoveGenerator::MedianMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* /*criticalities*/) { + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& device_ctx = g_vpr_ctx.device(); + auto& placer_ctx = placer_ctx_.get(); + auto& place_move_ctx = placer_ctx.mutable_move(); + auto& block_locs = placer_ctx.get_block_locs(); + + //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, - block_locs); + placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); @@ -41,10 +35,6 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; } - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& device_ctx = g_vpr_ctx.device(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); - const int num_layers = device_ctx.grid.get_num_layers(); @@ -83,7 +73,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ continue; if (cluster_ctx.clb_nlist.net_sinks(net_id).size() < SMALL_NET) { //calculate the bb from scratch - get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net, block_locs); + get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net); if (skip_net) { continue; } @@ -136,7 +126,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ // the bounding box incrementally. In that case, bounding box should be calculated // from scratch. if (!get_bb_incrementally(net_id, coords, xold, yold, layer_old, xnew, ynew, layer_new)) { - get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net, block_locs); + get_bb_from_scratch_excluding_block(net_id, coords, b_from, skip_net); if (skip_net) continue; } @@ -204,12 +194,12 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ * Currently assumes channels on both sides of the CLBs forming the * * edges of the bounding box can be used. Essentially, I am assuming * * the pins always lie on the outside of the bounding box. */ -static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, - t_bb& bb_coord_new, - ClusterBlockId block_id, - bool& skip_net, - const vtr::vector_map& block_locs) { +void MedianMoveGenerator::get_bb_from_scratch_excluding_block(ClusterNetId net_id, + t_bb& bb_coord_new, + ClusterBlockId block_id, + bool& skip_net) { //TODO: account for multiple physical pin instances per logical pin + auto& block_locs = placer_ctx_.get().get_block_locs(); skip_net = true; @@ -314,18 +304,18 @@ static void get_bb_from_scratch_excluding_block(ClusterNetId net_id, * the pins always lie on the outside of the bounding box. * * The x and y coordinates are the pin's x and y coordinates. */ /* IO blocks are considered to be one cell in for simplicity. */ -static bool get_bb_incrementally(ClusterNetId net_id, - t_bb& bb_coord_new, - int xold, - int yold, - int layer_old, - int xnew, - int ynew, - int layer_new) { +bool MedianMoveGenerator::get_bb_incrementally(ClusterNetId net_id, + t_bb& bb_coord_new, + int xold, + int yold, + int layer_old, + int xnew, + int ynew, + int layer_new) { //TODO: account for multiple physical pin instances per logical pin auto& device_ctx = g_vpr_ctx.device(); - auto& place_move_ctx = g_placer_ctx.move(); + auto& place_move_ctx = placer_ctx_.get().move(); xnew = std::max(std::min(xnew, device_ctx.grid.width() - 2), 1); //-2 for no perim channels ynew = std::max(std::min(ynew, device_ctx.grid.height() - 2), 1); //-2 for no perim channels diff --git a/vpr/src/place/median_move_generator.h b/vpr/src/place/median_move_generator.h index e27ceb5c59f..39db94413d6 100644 --- a/vpr/src/place/median_move_generator.h +++ b/vpr/src/place/median_move_generator.h @@ -16,12 +16,25 @@ * around it */ class MedianMoveGenerator : public MoveGenerator { + public: + MedianMoveGenerator() = delete; + explicit MedianMoveGenerator(PlacerContext& placer_ctx); + + private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* /*criticalities*/) override; + + bool get_bb_incrementally(ClusterNetId net_id, t_bb& bb_coord_new, + int xold, int yold, int layer_old, + int xnew, int ynew, int layer_new); + + void get_bb_from_scratch_excluding_block(ClusterNetId net_id, + t_bb& bb_coord_new, + ClusterBlockId block_id, + bool& skip_net); }; #endif diff --git a/vpr/src/place/move_generator.h b/vpr/src/place/move_generator.h index 6dee6ee0553..629e1db930d 100644 --- a/vpr/src/place/move_generator.h +++ b/vpr/src/place/move_generator.h @@ -42,6 +42,10 @@ struct MoveTypeStat { */ class MoveGenerator { public: + MoveGenerator(PlacerContext& placer_ctx) + : placer_ctx_(placer_ctx) {} + + MoveGenerator() = delete; virtual ~MoveGenerator() = default; /** @@ -63,8 +67,7 @@ class MoveGenerator { t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) = 0; + const PlacerCriticalities* criticalities) = 0; /** * @brief Recieves feedback about the outcome of the previously proposed move @@ -75,6 +78,9 @@ class MoveGenerator { * @param reward_fun: the name of the reward function used */ virtual void process_outcome(double /*reward*/, e_reward_function /*reward_fun*/) {} + + protected: + std::reference_wrapper placer_ctx_; }; #endif diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 5b1a7e27151..d2ae4a311da 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -579,26 +579,18 @@ void enable_placer_debug(const t_placer_opts& placer_opts, } #endif -#ifdef VTR_ENABLE_DEBUG_LOGGING ClusterBlockId propose_block_to_move(const t_placer_opts& placer_opts, - int& logical_blk_type_index, - bool highly_crit_block, - ClusterNetId* net_from, - int* pin_from) { -#else -ClusterBlockId propose_block_to_move(const t_placer_opts& /* placer_opts */, int& logical_blk_type_index, bool highly_crit_block, ClusterNetId* net_from, int* pin_from, - const vtr::vector_map& block_locs) { -#endif + const PlacerContext& placer_ctx) { ClusterBlockId b_from = ClusterBlockId::INVALID(); auto& cluster_ctx = g_vpr_ctx.clustering(); if (logical_blk_type_index == -1) { //If the block type is unspecified, choose any random block to be swapped with another random block if (highly_crit_block) { - b_from = pick_from_highly_critical_block(*net_from, *pin_from, block_locs); + b_from = pick_from_highly_critical_block(*net_from, *pin_from, placer_ctx); } else { b_from = pick_from_block(); } @@ -609,13 +601,15 @@ ClusterBlockId propose_block_to_move(const t_placer_opts& /* placer_opts */, } } else { //If the block type is specified, choose a random block with blk_type to be swapped with another random block if (highly_crit_block) { - b_from = pick_from_highly_critical_block(*net_from, *pin_from, logical_blk_type_index, block_locs); + b_from = pick_from_highly_critical_block(*net_from, *pin_from, logical_blk_type_index, placer_ctx); } else { b_from = pick_from_block(logical_blk_type_index); } } #ifdef VTR_ENABLE_DEBUG_LOGGING enable_placer_debug(placer_opts, b_from); +#else + (void)placer_opts; #endif return b_from; @@ -668,9 +662,10 @@ ClusterBlockId pick_from_block(const int logical_blk_type_index) { //If none is found return ClusterBlockId::INVALID() ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, - const vtr::vector_map& block_locs) { - auto& place_move_ctx = g_placer_ctx.move(); + const PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& place_move_ctx = placer_ctx.move(); + auto& block_locs = placer_ctx.get_block_locs(); //Initialize critical net and pin to be invalid net_from = ClusterNetId::INVALID(); @@ -702,9 +697,10 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, const int logical_blk_type_index, - const vtr::vector_map& block_locs) { - auto& place_move_ctx = g_placer_ctx.move(); + const PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& place_move_ctx = placer_ctx.move(); + auto& block_locs = placer_ctx.get_block_locs(); //Initialize critical net and pin to be invalid net_from = ClusterNetId::INVALID(); diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index 7b8366d7287..fc82c755ecf 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -4,6 +4,8 @@ #include "move_transactions.h" #include "compressed_grid.h" +class PlacerContext; + /* Cut off for incremental bounding box updates. * * 4 is fastest -- I checked. */ /* To turn off incremental bounding box updates, set this to a huge value */ @@ -185,7 +187,7 @@ ClusterBlockId propose_block_to_move(const t_placer_opts& placer_opts, bool highly_crit_block, ClusterNetId* net_from, int* pin_from, - const vtr::vector_map& block_locs); + const PlacerContext& placer_ctx); /** * Returns all movable clustered blocks with a specified logical block type. @@ -217,7 +219,7 @@ ClusterBlockId pick_from_block(int logical_blk_type_index); */ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, - const vtr::vector_map& block_locs); + const PlacerContext& placer_ctx); /** * @brief Find a block with a specific block type to be swapped with another block @@ -229,7 +231,7 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, int& pin_from, int logical_blk_type_index, - const vtr::vector_map& block_locs); + const PlacerContext& placer_ctx); bool find_to_loc_uniform(t_logical_block_type_ptr type, float rlim, diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index bcd5791a41c..d312c1c0a25 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -31,6 +31,8 @@ #include "noc_place_utils.h" #include "vtr_math.h" +#include + using std::max; using std::min; @@ -116,6 +118,12 @@ static vtr::Matrix ts_layer_sink_pin_count; /* [0...num_afftected_nets] -> net_id of the affected nets */ static std::vector ts_nets_to_update; +static std::optional> placer_ctx_ref; + +void set_net_handlers_placer_ctx(PlacerContext& placer_ctx) { + placer_ctx_ref = std::ref(placer_ctx); +} + /** * @param net * @param moved_blocks @@ -478,8 +486,7 @@ static bool driven_by_moved_block(const ClusterNetId net, const std::vector& moved_blocks) { auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; bool is_driven_by_move_blk = false; - ClusterBlockId net_driver_block = clb_nlist.net_driver_block( - net); + ClusterBlockId net_driver_block = clb_nlist.net_driver_block(net); for (int block_num = 0; block_num < num_blocks; block_num++) { if (net_driver_block == moved_blocks[block_num].block_num) { @@ -496,7 +503,8 @@ static void update_net_bb(const ClusterNetId net, const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs; + const auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -536,7 +544,8 @@ static void update_net_layer_bb(const ClusterNetId net, const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs; + const auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -606,18 +615,20 @@ static void update_td_delta_costs(const PlaceDelayModel* delay_model, * for incremental static timing analysis (incremental STA). */ auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); - const auto& connection_delay = g_placer_ctx.timing().connection_delay; - auto& connection_timing_cost = g_placer_ctx.mutable_timing().connection_timing_cost; - auto& proposed_connection_delay = g_placer_ctx.mutable_timing().proposed_connection_delay; - auto& proposed_connection_timing_cost = g_placer_ctx.mutable_timing().proposed_connection_timing_cost; + const auto& connection_delay = placer_ctx.timing().connection_delay; + auto& connection_timing_cost = placer_ctx.mutable_timing().connection_timing_cost; + auto& proposed_connection_delay = placer_ctx.mutable_timing().proposed_connection_delay; + auto& proposed_connection_timing_cost = placer_ctx.mutable_timing().proposed_connection_timing_cost; if (cluster_ctx.clb_nlist.pin_type(pin) == PinType::DRIVER) { /* This pin is a net driver on a moved block. */ /* Recompute all point to point connection delays for the net sinks. */ for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net).size(); ipin++) { - float temp_delay = comp_td_single_connection_delay(delay_model, g_vpr_ctx.placement().block_locs, net, ipin); + float temp_delay = comp_td_single_connection_delay(delay_model, block_locs, net, ipin); /* If the delay hasn't changed, do not mark this pin as affected */ if (temp_delay == connection_delay[net][ipin]) { continue; @@ -643,7 +654,7 @@ static void update_td_delta_costs(const PlaceDelayModel* delay_model, /* Get the sink pin index in the net */ int ipin = cluster_ctx.clb_nlist.pin_net_index(pin); - float temp_delay = comp_td_single_connection_delay(delay_model, g_vpr_ctx.placement().block_locs, net, ipin); + float temp_delay = comp_td_single_connection_delay(delay_model, block_locs, net, ipin); /* If the delay hasn't changed, do not mark this pin as affected */ if (temp_delay == connection_delay[net][ipin]) { return; @@ -699,7 +710,7 @@ static void update_net_info_on_pin_move(const t_place_algorithm& place_algorithm /* Record effected nets */ record_affected_net(net_id, num_affected_nets); - const auto& cube_bb = g_vpr_ctx.placement().cube_bb; + const bool cube_bb = g_vpr_ctx.placement().cube_bb; /* Update the net bounding boxes. */ if (cube_bb) { @@ -725,13 +736,14 @@ static void get_non_updatable_bb(ClusterNetId net_id, vtr::NdMatrixProxy num_sink_pin_layer) { //TODO: account for multiple physical pin instances per logical pin auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); int pnum = net_pin_to_tile_pin_index(net_id, 0); - t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; + t_pl_loc block_loc = block_locs[bnum].loc; int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; int layer = block_loc.layer; @@ -749,7 +761,7 @@ static void get_non_updatable_bb(ClusterNetId net_id, for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - block_loc = place_ctx.block_locs[bnum].loc; + block_loc = block_locs[bnum].loc; pnum = tile_pin_index(pin_id); x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; @@ -796,24 +808,22 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, std::vector& bb_coord_new, vtr::NdMatrixProxy num_sink_layer) { //TODO: account for multiple physical pin instances per logical pin - auto& device_ctx = g_vpr_ctx.device(); - auto& block_locs = g_vpr_ctx.placement().block_locs; + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); int num_layers = device_ctx.grid.get_num_layers(); for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) { num_sink_layer[layer_num] = 0; } - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); - ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); t_pl_loc block_loc = block_locs[bnum].loc; int pnum = net_pin_to_tile_pin_index(net_id, 0); - int src_x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; - int src_y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + int src_x = block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int src_y = block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; std::vector xmin(num_layers, src_x); std::vector ymin(num_layers, src_y); @@ -824,10 +834,10 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, bnum = cluster_ctx.clb_nlist.pin_block(pin_id); block_loc = block_locs[bnum].loc; pnum = tile_pin_index(pin_id); - int x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; - int y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + int x = block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + int y = block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; - int layer_num = place_ctx.block_locs[bnum].loc.layer; + int layer_num = block_locs[bnum].loc.layer; num_sink_layer[layer_num]++; if (x < xmin[layer_num]) { xmin[layer_num] = x; @@ -869,7 +879,8 @@ static void update_bb(ClusterNetId net_id, const t_bb *curr_bb_edge, *curr_bb_coord; auto& device_ctx = g_vpr_ctx.device(); - auto& place_move_ctx = g_placer_ctx.move(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& place_move_ctx = placer_ctx.move(); const int num_layers = device_ctx.grid.get_num_layers(); @@ -1142,9 +1153,9 @@ static void update_layer_bb(ClusterNetId net_id, t_physical_tile_loc pin_old_loc, t_physical_tile_loc pin_new_loc, bool is_output_pin) { - auto& device_ctx = g_vpr_ctx.device(); - auto& place_move_ctx = g_placer_ctx.move(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& place_move_ctx = placer_ctx.move(); pin_new_loc.x = max(min(pin_new_loc.x, device_ctx.grid.width() - 2), 1); //-2 for no perim channels pin_new_loc.y = max(min(pin_new_loc.y, device_ctx.grid.height() - 2), 1); //-2 for no perim channels @@ -1488,12 +1499,13 @@ static void get_bb_from_scratch(ClusterNetId net_id, t_bb& num_on_edges, vtr::NdMatrixProxy num_sink_pin_layer) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; + const auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; + t_pl_loc block_loc = block_locs[bnum].loc; int pnum = net_pin_to_tile_pin_index(net_id, 0); VTR_ASSERT_SAFE(pnum >= 0); int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; @@ -1524,11 +1536,11 @@ static void get_bb_from_scratch(ClusterNetId net_id, for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - block_loc = place_ctx.block_locs[bnum].loc; + block_loc = block_locs[bnum].loc; pnum = tile_pin_index(pin_id); - x = place_ctx.block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; - y = place_ctx.block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; - pin_layer = place_ctx.block_locs[bnum].loc.layer; + x = block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; + y = block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; + pin_layer = block_locs[bnum].loc.layer; /* Code below counts IO blocks as being within the 1..grid.width()-2, 1..grid.height()-2 clb array. * * This is because channels do not go out of the 0..grid.width()-2, 0..grid.height()-2 range, and * @@ -1608,6 +1620,11 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, std::vector& coords, vtr::NdMatrixProxy layer_pin_sink_count) { auto& device_ctx = g_vpr_ctx.device(); + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& grid = device_ctx.grid; + auto& placer_ctx = placer_ctx_ref->get(); + auto& block_locs = placer_ctx.get_block_locs(); + const int num_layers = device_ctx.grid.get_num_layers(); std::vector xmin(num_layers, OPEN); std::vector xmax(num_layers, OPEN); @@ -1620,12 +1637,9 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, std::vector num_sink_pin_layer(num_layers, 0); - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); - auto& grid = device_ctx.grid; ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; + t_pl_loc block_loc = block_locs[bnum].loc; int pnum_src = net_pin_to_tile_pin_index(net_id, 0); VTR_ASSERT_SAFE(pnum_src >= 0); int x_src = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum_src]; @@ -1650,9 +1664,9 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - block_loc = place_ctx.block_locs[bnum].loc; + block_loc = block_locs[bnum].loc; int pnum = tile_pin_index(pin_id); - int layer = place_ctx.block_locs[bnum].loc.layer; + int layer = block_locs[bnum].loc.layer; VTR_ASSERT_SAFE(layer >= 0 && layer < num_layers); num_sink_pin_layer[layer]++; int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; @@ -1716,12 +1730,9 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, static double get_net_cost(ClusterNetId net_id, const t_bb& bb) { /* Finds the cost due to one net by looking at its coordinate bounding * * box. */ - - double ncost, crossing; auto& cluster_ctx = g_vpr_ctx.clustering(); - crossing = wirelength_crossing_count( - cluster_ctx.clb_nlist.net_pins(net_id).size()); + double crossing = wirelength_crossing_count( cluster_ctx.clb_nlist.net_pins(net_id).size()); /* Could insert a check for xmin == xmax. In that case, assume * * connection will be made with no bends and hence no x-cost. * @@ -1730,11 +1741,9 @@ static double get_net_cost(ClusterNetId net_id, const t_bb& bb) { /* Cost = wire length along channel * cross_count / average * * channel capacity. Do this for x, then y direction and add. */ - ncost = (bb.xmax - bb.xmin + 1) * crossing - * chanx_place_cost_fac[bb.ymax][bb.ymin - 1]; - - ncost += (bb.ymax - bb.ymin + 1) * crossing - * chany_place_cost_fac[bb.xmax][bb.xmin - 1]; + double ncost; + ncost = (bb.xmax - bb.xmin + 1) * crossing * chanx_place_cost_fac[bb.ymax][bb.ymin - 1]; + ncost += (bb.ymax - bb.ymin + 1) * crossing * chany_place_cost_fac[bb.xmax][bb.xmin - 1]; return (ncost); } @@ -1779,11 +1788,9 @@ static double get_net_layer_bb_wire_cost(ClusterNetId /* net_id */, } static double get_net_wirelength_estimate(ClusterNetId net_id, const t_bb& bb) { - double ncost, crossing; auto& cluster_ctx = g_vpr_ctx.clustering(); - crossing = wirelength_crossing_count( - cluster_ctx.clb_nlist.net_pins(net_id).size()); + double crossing = wirelength_crossing_count(cluster_ctx.clb_nlist.net_pins(net_id).size()); /* Could insert a check for xmin == xmax. In that case, assume * * connection will be made with no bends and hence no x-cost. * @@ -1792,11 +1799,12 @@ static double get_net_wirelength_estimate(ClusterNetId net_id, const t_bb& bb) { /* Cost = wire length along channel * cross_count / average * * channel capacity. Do this for x, then y direction and add. */ + double ncost; ncost = (bb.xmax - bb.xmin + 1) * crossing; ncost += (bb.ymax - bb.ymin + 1) * crossing; - return (ncost); + return ncost; } static double get_net_wirelength_from_layer_bb(ClusterNetId /* net_id */, @@ -1928,14 +1936,14 @@ double comp_bb_cost(e_cost_methods method) { double cost = 0; double expected_wirelength = 0.0; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& place_move_ctx = placer_ctx.mutable_move(); for (auto net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Small nets don't use incremental updating on their bounding boxes, * * so they can use a fast bounding box calculator. */ - if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET - && method == NORMAL) { + if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == NORMAL) { get_bb_from_scratch(net_id, place_move_ctx.bb_coords[net_id], place_move_ctx.bb_num_on_edges[net_id], @@ -1948,8 +1956,9 @@ double comp_bb_cost(e_cost_methods method) { net_cost[net_id] = get_net_cost(net_id, place_move_ctx.bb_coords[net_id]); cost += net_cost[net_id]; - if (method == CHECK) + if (method == CHECK) { expected_wirelength += get_net_wirelength_estimate(net_id, place_move_ctx.bb_coords[net_id]); + } } } @@ -1965,14 +1974,14 @@ double comp_layer_bb_cost(e_cost_methods method) { double cost = 0; double expected_wirelength = 0.0; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& place_move_ctx = placer_ctx.mutable_move(); for (auto net_id : cluster_ctx.clb_nlist.nets()) { /* for each net ... */ if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Small nets don't use incremental updating on their bounding boxes, * * so they can use a fast bounding box calculator. */ - if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET - && method == NORMAL) { + if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == NORMAL) { get_layer_bb_from_scratch(net_id, place_move_ctx.layer_bb_num_on_edges[net_id], place_move_ctx.layer_bb_coords[net_id], @@ -1987,10 +1996,11 @@ double comp_layer_bb_cost(e_cost_methods method) { place_move_ctx.layer_bb_coords[net_id], place_move_ctx.num_sink_pin_layer[size_t(net_id)]); cost += net_cost[net_id]; - if (method == CHECK) + if (method == CHECK) { expected_wirelength += get_net_wirelength_from_layer_bb(net_id, - place_move_ctx.layer_bb_coords[net_id], - place_move_ctx.num_sink_pin_layer[size_t(net_id)]); + place_move_ctx.layer_bb_coords[net_id], + place_move_ctx.num_sink_pin_layer[size_t(net_id)]); + } } } @@ -2006,7 +2016,8 @@ void update_move_nets(int num_nets_affected, const bool cube_bb) { /* update net cost functions and reset flags. */ auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); + auto& placer_ctx = placer_ctx_ref->get(); + auto& place_move_ctx = placer_ctx.mutable_move(); for (int inet_affected = 0; inet_affected < num_nets_affected; inet_affected++) { @@ -2053,6 +2064,7 @@ void recompute_costs_from_scratch(const t_placer_opts& placer_opts, const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, t_placer_costs* costs) { + auto& placer_ctx = placer_ctx_ref->get(); auto check_and_print_cost = [](double new_cost, double old_cost, const std::string& cost_name) { @@ -2070,7 +2082,7 @@ void recompute_costs_from_scratch(const t_placer_opts& placer_opts, if (placer_opts.place_algorithm.is_timing_driven()) { double new_timing_cost = 0.; - comp_td_costs(delay_model, *criticalities, g_vpr_ctx.placement().block_locs, &new_timing_cost); + comp_td_costs(delay_model, *criticalities, placer_ctx, &new_timing_cost); check_and_print_cost(new_timing_cost, costs->timing_cost, "timing_cost"); costs->timing_cost = new_timing_cost; } else { @@ -2244,7 +2256,7 @@ void init_try_swap_net_cost_structs(size_t num_nets, bool cube_bb) { layer_ts_bb_coord_new.resize(num_nets, std::vector(num_layers, t_2D_bb())); } - /*This initialize the whole matrix to OPEN which is an invalid value*/ + /*This initializes the whole matrix to OPEN which is an invalid value*/ ts_layer_sink_pin_count.resize({num_nets, size_t(num_layers)}, OPEN); ts_nets_to_update.resize(num_nets, ClusterNetId::INVALID()); diff --git a/vpr/src/place/net_cost_handler.h b/vpr/src/place/net_cost_handler.h index 23197030a8c..1c13e01d397 100644 --- a/vpr/src/place/net_cost_handler.h +++ b/vpr/src/place/net_cost_handler.h @@ -3,6 +3,9 @@ #include "timing_place.h" #include "move_transactions.h" #include "place_util.h" +#include "placer_context.h" + +#include /** @@ -155,3 +158,5 @@ void init_try_swap_net_cost_structs(size_t num_nets, bool cube_bb); * @brief Free (layer_)ts_bb_edge_new, (layer_)ts_bb_coord_new, ts_layer_sink_pin_count, and ts_nets_to_update data structures. */ void free_try_swap_net_cost_structs(); + +void set_net_handlers_placer_ctx(PlacerContext& placer_ctx); diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 971e885fd04..615fc71b073 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -70,6 +70,7 @@ #include "noc_place_utils.h" #include "net_cost_handler.h" +#include "placer_context.h" /* define the RL agent's reward function factor constant. This factor controls the weight of bb cost * * compared to the timing cost in the agent's reward function. The reward is calculated as * @@ -192,12 +193,15 @@ static void alloc_and_load_placement_structs(float place_cost_exp, const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, t_direct_inf* directs, - int num_directs); + int num_directs, + PlacerContext& placer_ctx); static void alloc_and_load_try_swap_structs(const bool cube_bb); static void free_try_swap_structs(); -static void free_placement_structs(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts); +static void free_placement_structs(const t_placer_opts& placer_opts, + const t_noc_opts& noc_opts, + PlacerContext& placer_ctx); static e_move_result try_swap(const t_annealing_state* state, t_placer_costs* costs, @@ -215,18 +219,21 @@ static e_move_result try_swap(const t_annealing_state* state, const t_place_algorithm& place_algorithm, float timing_bb_factor, bool manual_move_enabled, - t_swap_stats& swap_stats); + t_swap_stats& swap_stats, + PlacerContext& placer_ctx); static void check_place(const t_placer_costs& costs, const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, const t_place_algorithm& place_algorithm, - const t_noc_opts& noc_opts); + const t_noc_opts& noc_opts, + PlacerContext& placer_ctx); static int check_placement_costs(const t_placer_costs& costs, const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, - const t_place_algorithm& place_algorithm); + const t_place_algorithm& place_algorithm, + PlacerContext& placer_ctx); static int check_placement_consistency(); static int check_block_placement_consistency(); @@ -246,11 +253,13 @@ static float starting_t(const t_annealing_state* state, const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, MoveTypeStat& move_type_stat, - t_swap_stats& swap_stats); + t_swap_stats& swap_stats, + PlacerContext& placer_ctx); static int count_connections(); -static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected); +static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, + PlacerContext& placer_ctx); static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected); @@ -259,7 +268,8 @@ static void invalidate_affected_connections( NetPinTimingInvalidator* pin_tedges_invalidator, TimingInfo* timing_info); -static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks); +static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, + const PlacerContext& placer_ctx); static e_move_result assess_swap(double delta_c, double t); @@ -279,7 +289,8 @@ static void outer_loop_update_timing_info(const t_placer_opts& placer_opts, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, - SetupTimingInfo* timing_info); + SetupTimingInfo* timing_info, + PlacerContext& placer_ctx); static void placement_inner_loop(const t_annealing_state* state, const t_placer_opts& placer_opts, @@ -299,7 +310,8 @@ static void placement_inner_loop(const t_annealing_state* state, const t_place_algorithm& place_algorithm, MoveTypeStat& move_type_stat, float timing_bb_factor, - t_swap_stats& swap_stats); + t_swap_stats& swap_stats, + PlacerContext& placer_ctx); static void generate_post_place_timing_reports(const t_placer_opts& placer_opts, const t_analysis_opts& analysis_opts, @@ -360,10 +372,6 @@ void try_place(const Netlist<>& net_list, auto& device_ctx = g_vpr_ctx.device(); auto& atom_ctx = g_vpr_ctx.atom(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); - - const auto& p_timing_ctx = g_placer_ctx.timing(); - const auto& p_runtime_ctx = g_placer_ctx.runtime(); auto& timing_ctx = g_vpr_ctx.timing(); auto pre_place_timing_stats = timing_ctx.stats; @@ -385,7 +393,6 @@ void try_place(const Netlist<>& net_list, std::shared_ptr timing_info; std::shared_ptr placement_delay_calc; std::unique_ptr place_delay_model; - std::unique_ptr manual_move_generator = std::make_unique(); std::unique_ptr placer_setup_slacks; std::unique_ptr placer_criticalities; std::unique_ptr pin_timing_invalidator; @@ -415,7 +422,7 @@ void try_place(const Netlist<>& net_list, g_vpr_ctx.mutable_placement().cube_bb = is_cube_bb(placer_opts.place_bounding_box_mode, device_ctx.rr_graph); - const auto& cube_bb = g_vpr_ctx.placement().cube_bb; + const bool cube_bb = g_vpr_ctx.placement().cube_bb; VTR_LOG("\n"); VTR_LOG("Bounding box mode is %s\n", (cube_bb ? "Cube" : "Per-layer")); @@ -423,7 +430,16 @@ void try_place(const Netlist<>& net_list, int move_lim = (int)(annealing_sched.inner_num * pow(net_list.blocks().size(), 1.3333)); - alloc_and_load_placement_structs(placer_opts.place_cost_exp, placer_opts, noc_opts, directs, num_directs); + + PlacerContext placer_ctx; + auto& place_move_ctx = placer_ctx.mutable_move(); + const auto& p_timing_ctx = placer_ctx.timing(); + const auto& p_runtime_ctx = placer_ctx.runtime(); + + alloc_and_load_placement_structs(placer_opts.place_cost_exp, placer_opts, noc_opts, directs, num_directs, placer_ctx); + set_net_handlers_placer_ctx(placer_ctx); + + std::unique_ptr manual_move_generator = std::make_unique(placer_ctx); vtr::ScopedStartFinishTimer timer("Placement"); @@ -434,7 +450,7 @@ void try_place(const Netlist<>& net_list, initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts, g_vpr_ctx.mutable_placement().block_locs); //create the move generator based on the chosen strategy - auto [move_generator, move_generator2] = create_move_generators(placer_opts, move_lim, noc_opts.noc_centroid_weight); + auto [move_generator, move_generator2] = create_move_generators(placer_ctx, placer_opts, move_lim, noc_opts.noc_centroid_weight); if (!placer_opts.write_initial_place_file.empty()) { print_place(nullptr, nullptr, (placer_opts.write_initial_place_file + ".init.place").c_str(), @@ -486,7 +502,7 @@ void try_place(const Netlist<>& net_list, VTR_LOG("\n"); //Update the point-to-point delays from the initial placement - comp_td_connection_delays(place_delay_model.get(), g_vpr_ctx.placement().block_locs); + comp_td_connection_delays(place_delay_model.get(), placer_ctx); /* * Initialize timing analysis @@ -520,9 +536,9 @@ void try_place(const Netlist<>& net_list, crit_params.crit_exponent = first_crit_exponent; crit_params.crit_limit = placer_opts.place_crit_limit; - initialize_timing_info(crit_params, place_delay_model.get(), g_vpr_ctx.placement().block_locs, - placer_criticalities.get(), placer_setup_slacks.get(), - pin_timing_invalidator.get(), timing_info.get(), &costs); + initialize_timing_info(crit_params, place_delay_model.get(), placer_criticalities.get(), + placer_setup_slacks.get(), pin_timing_invalidator.get(), + timing_info.get(), &costs, placer_ctx); critical_path = timing_info->least_slack_critical_path(); @@ -587,7 +603,8 @@ void try_place(const Netlist<>& net_list, place_delay_model.get(), placer_criticalities.get(), placer_opts.place_algorithm, - noc_opts); + noc_opts, + placer_ctx); //Initial placement statistics VTR_LOG("Initial placement cost: %g bb_cost: %g td_cost: %g\n", costs.cost, @@ -683,7 +700,7 @@ void try_place(const Netlist<>& net_list, placer_setup_slacks.get(), timing_info.get(), *move_generator, *manual_move_generator, pin_timing_invalidator.get(), blocks_affected, placer_opts, noc_opts, move_type_stat, - swap_stats); + swap_stats, placer_ctx); if (!placer_opts.move_stats_file.empty()) { f_move_stats_file = std::unique_ptr( @@ -712,7 +729,7 @@ void try_place(const Netlist<>& net_list, //Define the timing bb weight factor for the agent's reward function float timing_bb_factor = REWARD_BB_TIMING_RELATIVE_WEIGHT; - if (skip_anneal == false) { + if (!skip_anneal) { //Table header VTR_LOG("\n"); print_place_status_header(noc_opts.noc); @@ -725,7 +742,7 @@ void try_place(const Netlist<>& net_list, state.crit_exponent, &outer_crit_iter_count, place_delay_model.get(), placer_criticalities.get(), placer_setup_slacks.get(), pin_timing_invalidator.get(), - timing_info.get()); + timing_info.get(), placer_ctx); if (placer_opts.place_algorithm.is_timing_driven()) { critical_path = timing_info->least_slack_critical_path(); @@ -756,7 +773,7 @@ void try_place(const Netlist<>& net_list, blocks_affected, timing_info.get(), placer_opts.place_algorithm, move_type_stat, timing_bb_factor, - swap_stats); + swap_stats, placer_ctx); //move the update used move_generator to its original variable update_move_generator(move_generator, move_generator2, agent_state, @@ -806,7 +823,7 @@ void try_place(const Netlist<>& net_list, state.crit_exponent, &outer_crit_iter_count, place_delay_model.get(), placer_criticalities.get(), placer_setup_slacks.get(), pin_timing_invalidator.get(), - timing_info.get()); + timing_info.get(), placer_ctx); //move the appropriate move_generator to be the current used move generator assign_current_move_generator(move_generator, move_generator2, @@ -823,7 +840,7 @@ void try_place(const Netlist<>& net_list, blocks_affected, timing_info.get(), placer_opts.place_quench_algorithm, move_type_stat, timing_bb_factor, - swap_stats); + swap_stats, placer_ctx); //move the update used move_generator to its original variable update_move_generator(move_generator, move_generator2, agent_state, @@ -850,17 +867,16 @@ void try_place(const Netlist<>& net_list, crit_params.crit_limit = placer_opts.place_crit_limit; if (placer_opts.place_algorithm.is_timing_driven()) { - perform_full_timing_update(crit_params, place_delay_model.get(), g_vpr_ctx.placement().block_locs, - placer_criticalities.get(), placer_setup_slacks.get(), - pin_timing_invalidator.get(), timing_info.get(), &costs); + perform_full_timing_update(crit_params, place_delay_model.get(), placer_criticalities.get(), + placer_setup_slacks.get(), pin_timing_invalidator.get(), + timing_info.get(), &costs, placer_ctx); VTR_LOG("post-quench CPD = %g (ns) \n", 1e9 * timing_info->least_slack_critical_path().delay()); } //See if our latest checkpoint is better than the current placement solution if (placer_opts.place_checkpointing) - restore_best_placement(g_vpr_ctx.mutable_placement().block_locs, - g_vpr_ctx.mutable_placement().grid_blocks, + restore_best_placement(placer_ctx, placement_checkpoint, timing_info, costs, placer_criticalities, placer_setup_slacks, place_delay_model, pin_timing_invalidator, crit_params, noc_opts); @@ -890,7 +906,8 @@ void try_place(const Netlist<>& net_list, place_delay_model.get(), placer_criticalities.get(), placer_opts.place_algorithm, - noc_opts); + noc_opts, + placer_ctx); //Some stats VTR_LOG("\n"); @@ -955,7 +972,7 @@ void try_place(const Netlist<>& net_list, write_noc_placement_file(noc_opts.noc_placement_file_name, g_vpr_ctx.placement().block_locs); } - free_placement_structs(placer_opts, noc_opts); + free_placement_structs(placer_opts, noc_opts, placer_ctx); free_try_swap_arrays(); print_timing_stats("Placement Quench", post_quench_timing_stats, @@ -981,7 +998,8 @@ static void outer_loop_update_timing_info(const t_placer_opts& placer_opts, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, - SetupTimingInfo* timing_info) { + SetupTimingInfo* timing_info, + PlacerContext& placer_ctx) { if (placer_opts.place_algorithm.is_timing_driven()) { /*at each temperature change we update these values to be used */ /*for normalizing the tradeoff between timing and wirelength (bb) */ @@ -998,8 +1016,8 @@ static void outer_loop_update_timing_info(const t_placer_opts& placer_opts, crit_params.crit_limit = placer_opts.place_crit_limit; //Update all timing related classes - perform_full_timing_update(crit_params, delay_model, g_vpr_ctx.placement().block_locs, criticalities, - setup_slacks, pin_timing_invalidator, timing_info, costs); + perform_full_timing_update(crit_params, delay_model, criticalities, setup_slacks, + pin_timing_invalidator, timing_info, costs, placer_ctx); *outer_crit_iter_count = 0; } @@ -1029,7 +1047,8 @@ static void placement_inner_loop(const t_annealing_state* state, const t_place_algorithm& place_algorithm, MoveTypeStat& move_type_stat, float timing_bb_factor, - t_swap_stats& swap_stats) { + t_swap_stats& swap_stats, + PlacerContext& placer_ctx) { //How many times have we dumped placement to a file this temperature? int inner_placement_save_count = 0; @@ -1043,7 +1062,7 @@ static void placement_inner_loop(const t_annealing_state* state, manual_move_generator, timing_info, pin_timing_invalidator, blocks_affected, delay_model, criticalities, setup_slacks, placer_opts, noc_opts, move_type_stat, place_algorithm, - timing_bb_factor, manual_move_enabled, swap_stats); + timing_bb_factor, manual_move_enabled, swap_stats, placer_ctx); if (swap_result == ACCEPTED) { /* Move was accepted. Update statistics that are useful for the annealing schedule. */ @@ -1072,9 +1091,9 @@ static void placement_inner_loop(const t_annealing_state* state, crit_params.crit_limit = placer_opts.place_crit_limit; //Update all timing related classes - perform_full_timing_update(crit_params, delay_model, g_vpr_ctx.placement().block_locs, - criticalities, setup_slacks, pin_timing_invalidator, - timing_info, costs); + perform_full_timing_update(crit_params, delay_model, criticalities, + setup_slacks, pin_timing_invalidator, + timing_info, costs, placer_ctx); } inner_crit_iter_count++; } @@ -1140,7 +1159,8 @@ static float starting_t(const t_annealing_state* state, const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, MoveTypeStat& move_type_stat, - t_swap_stats& swap_stats) { + t_swap_stats& swap_stats, + PlacerContext& placer_ctx) { if (annealing_sched.type == USER_SCHED) { return (annealing_sched.init_t); } @@ -1173,7 +1193,7 @@ static float starting_t(const t_annealing_state* state, manual_move_generator, timing_info, pin_timing_invalidator, blocks_affected, delay_model, criticalities, setup_slacks, placer_opts, noc_opts, move_type_stat, placer_opts.place_algorithm, - REWARD_BB_TIMING_RELATIVE_WEIGHT, manual_move_enabled, swap_stats); + REWARD_BB_TIMING_RELATIVE_WEIGHT, manual_move_enabled, swap_stats, placer_ctx); if (swap_result == ACCEPTED) { num_accepted++; @@ -1243,7 +1263,8 @@ static e_move_result try_swap(const t_annealing_state* state, const t_place_algorithm& place_algorithm, float timing_bb_factor, bool manual_move_enabled, - t_swap_stats& swap_stats) { + t_swap_stats& swap_stats, + PlacerContext& placer_ctx) { /* Picks some block and moves it to another spot. If this spot is * * occupied, switch the blocks. Assess the change in cost function. * * rlim is the range limiter. * @@ -1293,7 +1314,7 @@ static e_move_result try_swap(const t_annealing_state* state, #ifndef NO_GRAPHICS create_move_outcome = manual_move_display_and_propose(manual_move_generator, blocks_affected, proposed_action.move_type, rlim, placer_opts, - criticalities, g_vpr_ctx.placement().block_locs); + criticalities); #else //NO_GRAPHICS //Cast to void to explicitly avoid warning. (void)manual_move_generator; @@ -1304,7 +1325,7 @@ static e_move_result try_swap(const t_annealing_state* state, proposed_action.move_type = e_move_type::UNIFORM; } else { //Generate a new move (perturbation) used to explore the space of possible placements - create_move_outcome = move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, g_vpr_ctx.placement().block_locs); + create_move_outcome = move_generator.propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); } if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat @@ -1362,7 +1383,7 @@ static e_move_result try_swap(const t_annealing_state* state, /* Update the connection_timing_cost and connection_delay * * values from the temporary values. */ - commit_td_cost(blocks_affected); + commit_td_cost(blocks_affected, placer_ctx); /* Update timing information. Since we are analyzing setup slacks, * * we only update those values and keep the criticalities stale * @@ -1375,11 +1396,11 @@ static e_move_result try_swap(const t_annealing_state* state, criticalities->disable_update(); setup_slacks->enable_update(); update_timing_classes(crit_params, timing_info, criticalities, - setup_slacks, pin_timing_invalidator); + setup_slacks, pin_timing_invalidator, placer_ctx); /* Get the setup slack analysis cost */ //TODO: calculate a weighted average of the slack cost and wiring cost - delta_c = analyze_setup_slack_cost(setup_slacks) * costs->timing_cost_norm; + delta_c = analyze_setup_slack_cost(setup_slacks, placer_ctx) * costs->timing_cost_norm; } else if (place_algorithm == CRITICALITY_TIMING_PLACE) { /* Take delta_c as a combination of timing and wiring cost. In * addition to `timing_tradeoff`, we normalize the cost values */ @@ -1392,8 +1413,7 @@ static e_move_result try_swap(const t_annealing_state* state, timing_delta_c, costs->timing_cost_norm); delta_c = (1 - timing_tradeoff) * bb_delta_c * costs->bb_cost_norm - + timing_tradeoff * timing_delta_c - * costs->timing_cost_norm; + + timing_tradeoff * timing_delta_c * costs->timing_cost_norm; } else { VTR_ASSERT_SAFE(place_algorithm == BOUNDING_BOX_PLACE); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, @@ -1432,7 +1452,7 @@ static e_move_result try_swap(const t_annealing_state* state, //Commit the setup slack information //The timing delay and cost values should be committed already - commit_setup_slacks(setup_slacks); + commit_setup_slacks(setup_slacks, placer_ctx); } if (place_algorithm == CRITICALITY_TIMING_PLACE) { @@ -1446,7 +1466,7 @@ static e_move_result try_swap(const t_annealing_state* state, /* Update the connection_timing_cost and connection_delay * * values from the temporary values. */ - commit_td_cost(blocks_affected); + commit_td_cost(blocks_affected, placer_ctx); } /* Update net cost functions and reset flags. */ @@ -1478,14 +1498,14 @@ static e_move_result try_swap(const t_annealing_state* state, reset_move_nets(num_nets_affected); /* Restore the place_ctx.block_locs data structures to their state before the move. */ - revert_move_blocks(blocks_affected, g_vpr_ctx.mutable_placement().block_locs); + revert_move_blocks(blocks_affected, placer_ctx.get_mutable_block_locs()); if (place_algorithm == SLACK_TIMING_PLACE) { /* Revert the timing delays and costs to pre-update values. */ /* These routines must be called after reverting the block moves. */ //TODO: make this process incremental - comp_td_connection_delays(delay_model, g_vpr_ctx.placement().block_locs); - comp_td_costs(delay_model, *criticalities, g_vpr_ctx.placement().block_locs, &costs->timing_cost); + comp_td_connection_delays(delay_model, placer_ctx); + comp_td_costs(delay_model, *criticalities, placer_ctx, &costs->timing_cost); /* Re-invalidate the affected sink pins since the proposed * * move is rejected, and the same blocks are reverted to * @@ -1495,10 +1515,10 @@ static e_move_result try_swap(const t_annealing_state* state, /* Revert the timing update */ update_timing_classes(crit_params, timing_info, criticalities, - setup_slacks, pin_timing_invalidator); + setup_slacks, pin_timing_invalidator, placer_ctx); VTR_ASSERT_SAFE_MSG( - verify_connection_setup_slacks(setup_slacks), + verify_connection_setup_slacks(setup_slacks, placer_ctx), "The current setup slacks should be identical to the values before the try swap timing info update."); } @@ -1658,11 +1678,12 @@ static double get_total_cost(t_placer_costs* costs, const t_placer_opts& placer_ * value suddenly got very good due to the block move, while a good slack value * got very bad, perhaps even worse than the original worse slack value. */ -static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks) { +static float analyze_setup_slack_cost(const PlacerSetupSlacks* setup_slacks, + const PlacerContext& placer_ctx) { const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& clb_nlist = cluster_ctx.clb_nlist; - const auto& p_timing_ctx = g_placer_ctx.timing(); + const auto& p_timing_ctx = placer_ctx.timing(); const auto& connection_setup_slack = p_timing_ctx.connection_setup_slack; //Find the original/proposed setup slacks of pins with modified values @@ -1728,11 +1749,12 @@ static e_move_result assess_swap(double delta_c, double t) { * All the connections have already been gathered by blocks_affected.affected_pins * after running the routine find_affected_nets_and_update_costs() in try_swap(). */ -static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected) { +static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, + PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); + auto& p_timing_ctx = placer_ctx.mutable_timing(); auto& connection_delay = p_timing_ctx.connection_delay; auto& proposed_connection_delay = p_timing_ctx.proposed_connection_delay; auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; @@ -1803,14 +1825,12 @@ static void alloc_and_load_placement_structs(float place_cost_exp, const t_placer_opts& placer_opts, const t_noc_opts& noc_opts, t_direct_inf* directs, - int num_directs) { + int num_directs, + PlacerContext& placer_ctx) { const auto& device_ctx = g_vpr_ctx.device(); const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); - size_t num_nets = cluster_ctx.clb_nlist.nets().size(); const int num_layers = device_ctx.grid.get_num_layers(); @@ -1826,21 +1846,18 @@ static void alloc_and_load_placement_structs(float place_cost_exp, /* Allocate structures associated with timing driven placement */ /* [0..cluster_ctx.clb_nlist.nets().size()-1][1..num_pins-1] */ - p_timing_ctx.connection_delay = make_net_pins_matrix( - (const Netlist<>&)cluster_ctx.clb_nlist, 0.f); - p_timing_ctx.proposed_connection_delay = make_net_pins_matrix( - cluster_ctx.clb_nlist, 0.f); + auto& p_timing_ctx = placer_ctx.mutable_timing(); - p_timing_ctx.connection_setup_slack = make_net_pins_matrix( - cluster_ctx.clb_nlist, std::numeric_limits::infinity()); + p_timing_ctx.connection_delay = make_net_pins_matrix((const Netlist<>&)cluster_ctx.clb_nlist, 0.f); + p_timing_ctx.proposed_connection_delay = make_net_pins_matrix(cluster_ctx.clb_nlist, 0.f); - p_timing_ctx.connection_timing_cost = PlacerTimingCosts( - cluster_ctx.clb_nlist); - p_timing_ctx.proposed_connection_timing_cost = make_net_pins_matrix< - double>(cluster_ctx.clb_nlist, 0.); + p_timing_ctx.connection_setup_slack = make_net_pins_matrix(cluster_ctx.clb_nlist, std::numeric_limits::infinity()); + + p_timing_ctx.connection_timing_cost = PlacerTimingCosts(cluster_ctx.clb_nlist); + p_timing_ctx.proposed_connection_timing_cost = make_net_pins_matrix(cluster_ctx.clb_nlist, 0.); p_timing_ctx.net_timing_cost.resize(num_nets, 0.); - for (auto net_id : cluster_ctx.clb_nlist.nets()) { + for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ipin++) { p_timing_ctx.connection_delay[net_id][ipin] = 0; p_timing_ctx.proposed_connection_delay[net_id][ipin] = INVALID_DELAY; @@ -1857,6 +1874,7 @@ static void alloc_and_load_placement_structs(float place_cost_exp, init_place_move_structs(num_nets); + auto& place_move_ctx = placer_ctx.mutable_move(); if (place_ctx.cube_bb) { place_move_ctx.bb_coords.resize(num_nets, t_bb()); place_move_ctx.bb_num_on_edges.resize(num_nets, t_bb()); @@ -1885,11 +1903,13 @@ static void alloc_and_load_placement_structs(float place_cost_exp, /* Frees the major structures needed by the placer (and not needed * * elsewhere). */ -static void free_placement_structs(const t_placer_opts& placer_opts, const t_noc_opts& noc_opts) { - auto& place_move_ctx = g_placer_ctx.mutable_move(); +static void free_placement_structs(const t_placer_opts& placer_opts, + const t_noc_opts& noc_opts, + PlacerContext& placer_ctx) { + auto& place_move_ctx = placer_ctx.mutable_move(); if (placer_opts.place_algorithm.is_timing_driven()) { - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); + auto& p_timing_ctx = placer_ctx.mutable_timing(); vtr::release_memory(p_timing_ctx.connection_timing_cost); vtr::release_memory(p_timing_ctx.connection_delay); @@ -1945,7 +1965,8 @@ static void check_place(const t_placer_costs& costs, const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, const t_place_algorithm& place_algorithm, - const t_noc_opts& noc_opts) { + const t_noc_opts& noc_opts, + PlacerContext& placer_ctx) { /* Checks that the placement has not confused our data structures. * * i.e. the clb and block structures agree about the locations of * * every block, blocks are in legal spots, etc. Also recomputes * @@ -1955,7 +1976,7 @@ static void check_place(const t_placer_costs& costs, int error = 0; error += check_placement_consistency(); - error += check_placement_costs(costs, delay_model, criticalities, place_algorithm); + error += check_placement_costs(costs, delay_model, criticalities, place_algorithm, placer_ctx); error += check_placement_floorplanning(g_vpr_ctx.placement().block_locs); if (noc_opts.noc) { @@ -1980,7 +2001,8 @@ static void check_place(const t_placer_costs& costs, static int check_placement_costs(const t_placer_costs& costs, const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, - const t_place_algorithm& place_algorithm) { + const t_place_algorithm& place_algorithm, + PlacerContext& placer_ctx) { int error = 0; double bb_cost_check; double timing_cost_check; @@ -2002,12 +2024,9 @@ static int check_placement_costs(const t_placer_costs& costs, } if (place_algorithm.is_timing_driven()) { - comp_td_costs(delay_model, *criticalities, g_vpr_ctx.placement().block_locs, &timing_cost_check); + comp_td_costs(delay_model, *criticalities, placer_ctx, &timing_cost_check); //VTR_LOG("timing_cost recomputed from scratch: %g\n", timing_cost_check); - if (fabs( - timing_cost_check - - costs.timing_cost) - > costs.timing_cost * ERROR_TOL) { + if (fabs(timing_cost_check - costs.timing_cost) > costs.timing_cost * ERROR_TOL) { VTR_LOG_ERROR( "timing_cost_check: %g and timing_cost: %g differ in check_place.\n", timing_cost_check, costs.timing_cost); @@ -2018,8 +2037,7 @@ static int check_placement_costs(const t_placer_costs& costs, } static int check_placement_consistency() { - return check_block_placement_consistency() - + check_macro_placement_consistency(); + return check_block_placement_consistency() + check_macro_placement_consistency(); } static int check_block_placement_consistency() { diff --git a/vpr/src/place/place_checkpoint.cpp b/vpr/src/place/place_checkpoint.cpp index 292430d6c04..85240651d74 100644 --- a/vpr/src/place/place_checkpoint.cpp +++ b/vpr/src/place/place_checkpoint.cpp @@ -1,5 +1,6 @@ #include "place_checkpoint.h" #include "noc_place_utils.h" +#include "placer_context.h" float t_placement_checkpoint::get_cp_cpd() const { return cpd_; } @@ -34,8 +35,7 @@ void save_placement_checkpoint_if_needed(const vtr::vector_map& block_locs, - GridBlock& grid_blocks, +void restore_best_placement(PlacerContext& placer_ctx, t_placement_checkpoint& placement_checkpoint, std::shared_ptr& timing_info, t_placer_costs& costs, @@ -52,20 +52,21 @@ void restore_best_placement(vtr::vector_map& block_ */ if (placement_checkpoint.cp_is_valid() && timing_info->least_slack_critical_path().delay() > placement_checkpoint.get_cp_cpd() && costs.bb_cost * 1.05 > placement_checkpoint.get_cp_bb_cost()) { //restore the latest placement checkpoint - costs = placement_checkpoint.restore_placement(block_locs, grid_blocks); + + costs = placement_checkpoint.restore_placement(placer_ctx.get_mutable_block_locs(), placer_ctx.get_mutable_grid_blocks()); //recompute timing from scratch placer_criticalities.get()->set_recompute_required(); placer_setup_slacks.get()->set_recompute_required(); - comp_td_connection_delays(place_delay_model.get(), block_locs); + comp_td_connection_delays(place_delay_model.get(), placer_ctx); perform_full_timing_update(crit_params, place_delay_model.get(), - block_locs, placer_criticalities.get(), placer_setup_slacks.get(), pin_timing_invalidator.get(), timing_info.get(), - &costs); + &costs, + placer_ctx); /* If NoC is enabled, re-compute NoC costs and re-initialize NoC internal data structures. * If some routers have different locations than the last placement, NoC-related costs and @@ -73,7 +74,7 @@ void restore_best_placement(vtr::vector_map& block_ * and need to be re-computed from scratch. */ if (noc_opts.noc) { - reinitialize_noc_routing(costs, {}, block_locs); + reinitialize_noc_routing(costs, {}, placer_ctx.get_block_locs()); } VTR_LOG("\nCheckpoint restored\n"); diff --git a/vpr/src/place/place_checkpoint.h b/vpr/src/place/place_checkpoint.h index e52b9451fd3..81b57cee9e0 100644 --- a/vpr/src/place/place_checkpoint.h +++ b/vpr/src/place/place_checkpoint.h @@ -57,8 +57,7 @@ void save_placement_checkpoint_if_needed(const vtr::vector_map& block_locs, - GridBlock& grid_blocks, +void restore_best_placement(PlacerContext& placer_ctx, t_placement_checkpoint& placement_checkpoint, std::shared_ptr& timing_info, t_placer_costs& costs, diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index 78c60d2d081..feaf9bc5146 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -399,9 +399,10 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, ///@brief Recompute all point to point delays, updating `connection_delay` matrix. void comp_td_connection_delays(const PlaceDelayModel* delay_model, - const vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { const auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); + auto& p_timing_ctx = placer_ctx.mutable_timing(); + auto& block_locs = placer_ctx.get_block_locs(); auto& connection_delay = p_timing_ctx.connection_delay; for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { diff --git a/vpr/src/place/place_delay_model.h b/vpr/src/place/place_delay_model.h index 5b61d18eaf2..a4f83d3b9a6 100644 --- a/vpr/src/place/place_delay_model.h +++ b/vpr/src/place/place_delay_model.h @@ -26,6 +26,7 @@ ///@brief Forward declarations. class PlaceDelayModel; +class PlacerContext; ///@brief Initialize the placer delay model. std::unique_ptr alloc_lookups_and_delay_model(const Netlist<>& net_list, @@ -46,7 +47,7 @@ float comp_td_single_connection_delay(const PlaceDelayModel* delay_model, ///@brief Recompute all point to point delays, updating `connection_delay` matrix. void comp_td_connection_delays(const PlaceDelayModel* delay_model, - const vtr::vector_map& block_locs); + PlacerContext& placer_ctx); ///@brief Abstract interface to a placement delay model. class PlaceDelayModel { diff --git a/vpr/src/place/place_timing_update.cpp b/vpr/src/place/place_timing_update.cpp index e198592b33f..d74ddeb409f 100644 --- a/vpr/src/place/place_timing_update.cpp +++ b/vpr/src/place/place_timing_update.cpp @@ -11,11 +11,14 @@ /* Routines local to place_timing_update.cpp */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, ClusterNetId net, int ipin); -static double sum_td_net_cost(ClusterNetId net); -static double sum_td_costs(); + +static double sum_td_net_cost(ClusterNetId net, + PlacerContext& placer_ctx); + +static double sum_td_costs(const PlacerContext& placer_ctx); ///@brief Use an incremental approach to updating timing costs after re-computing criticalities static constexpr bool INCR_COMP_TD_COSTS = true; @@ -28,12 +31,12 @@ static constexpr bool INCR_COMP_TD_COSTS = true; */ void initialize_timing_info(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, - const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, SetupTimingInfo* timing_info, - t_placer_costs* costs) { + t_placer_costs* costs, + PlacerContext& placer_ctx) { const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& clb_nlist = cluster_ctx.clb_nlist; @@ -49,18 +52,18 @@ void initialize_timing_info(const PlaceCritParams& crit_params, //Perform first time update for all timing related classes perform_full_timing_update(crit_params, delay_model, - block_locs, criticalities, setup_slacks, pin_timing_invalidator, timing_info, - costs); + costs, + placer_ctx); //Don't warn again about unconstrained nodes again during placement timing_info->set_warn_unconstrained(false); //Clear all update_td_costs() runtime stat variables - auto& p_runtime_ctx = g_placer_ctx.mutable_runtime(); + auto& p_runtime_ctx = placer_ctx.mutable_runtime(); p_runtime_ctx.f_update_td_costs_connections_elapsed_sec = 0.f; p_runtime_ctx.f_update_td_costs_nets_elapsed_sec = 0.f; p_runtime_ctx.f_update_td_costs_sum_nets_elapsed_sec = 0.f; @@ -78,12 +81,12 @@ void initialize_timing_info(const PlaceCritParams& crit_params, */ void perform_full_timing_update(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, - const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, SetupTimingInfo* timing_info, - t_placer_costs* costs) { + t_placer_costs* costs, + PlacerContext& placer_ctx) { /* Update all timing related classes. */ criticalities->enable_update(); setup_slacks->enable_update(); @@ -91,16 +94,17 @@ void perform_full_timing_update(const PlaceCritParams& crit_params, timing_info, criticalities, setup_slacks, - pin_timing_invalidator); + pin_timing_invalidator, + placer_ctx); /* Update the timing cost with new connection criticalities. */ update_timing_cost(delay_model, criticalities, - block_locs, + placer_ctx, &costs->timing_cost); /* Commit the setup slacks since they are updated. */ - commit_setup_slacks(setup_slacks); + commit_setup_slacks(setup_slacks, placer_ctx); } /** @@ -132,12 +136,13 @@ void update_timing_classes(const PlaceCritParams& crit_params, SetupTimingInfo* timing_info, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, - NetPinTimingInvalidator* pin_timing_invalidator) { + NetPinTimingInvalidator* pin_timing_invalidator, + PlacerContext& placer_ctx) { /* Run STA to update slacks and adjusted/relaxed criticalities. */ timing_info->update(); /* Update the placer's criticalities (e.g. sharpen with crit_exponent). */ - criticalities->update_criticalities(timing_info, crit_params); + criticalities->update_criticalities(timing_info, crit_params, placer_ctx); /* Update the placer's raw setup slacks. */ setup_slacks->update_setup_slacks(timing_info); @@ -160,12 +165,12 @@ void update_timing_classes(const PlaceCritParams& crit_params, */ void update_timing_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, double* timing_cost) { #ifdef INCR_COMP_TD_COSTS update_td_costs(delay_model, *criticalities, block_locs, timing_cost); #else - comp_td_costs(delay_model, *criticalities, block_locs, timing_cost); + comp_td_costs(delay_model, *criticalities, placer_ctx, timing_cost); #endif } @@ -186,9 +191,10 @@ void update_timing_cost(const PlaceDelayModel* delay_model, * rejected, so for efficiency reasons, this routine is not called if the slacks are * rejected in the end. For more detailed info, see the try_swap() routine. */ -void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks) { +void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, + PlacerContext& placer_ctx) { const auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& connection_setup_slack = g_placer_ctx.mutable_timing().connection_setup_slack; + auto& connection_setup_slack = placer_ctx.mutable_timing().connection_setup_slack; /* Incremental: only go through sink pins with modified setup slack */ auto clb_pins_modified = setup_slacks->pins_with_modified_setup_slack(); @@ -211,9 +217,10 @@ void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks) { * the same as the values in `connection_setup_slack` without running commit_setup_slacks(). * For more detailed info, see the try_swap() routine. */ -bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks) { +bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks, + const PlacerContext& placer_ctx) { const auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - const auto& connection_setup_slack = g_placer_ctx.timing().connection_setup_slack; + const auto& connection_setup_slack = placer_ctx.timing().connection_setup_slack; /* Go through every single sink pin to check that the slack values are the same */ for (ClusterNetId net_id : clb_nlist.nets()) { @@ -248,14 +255,14 @@ bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks) { */ void update_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, double* timing_cost) { vtr::Timer t; auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); - auto& p_runtime_ctx = g_placer_ctx.mutable_runtime(); + auto& p_timing_ctx = placer_ctx.mutable_timing(); + auto& p_runtime_ctx = placer_ctx.mutable_runtime(); auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; //Update the modified pin timing costs @@ -273,7 +280,7 @@ void update_td_costs(const PlaceDelayModel* delay_model, int ipin = clb_nlist.pin_net_index(clb_pin); VTR_ASSERT_SAFE(ipin >= 1 && ipin < int(clb_nlist.net_pins(clb_net).size())); - double new_timing_cost = comp_td_connection_cost(delay_model, place_crit, block_locs, clb_net, ipin); + double new_timing_cost = comp_td_connection_cost(delay_model, place_crit, placer_ctx, clb_net, ipin); //Record new value connection_timing_cost[clb_net][ipin] = new_timing_cost; @@ -312,10 +319,10 @@ void update_td_costs(const PlaceDelayModel* delay_model, */ void comp_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, double* timing_cost) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); + auto& p_timing_ctx = placer_ctx.mutable_timing(); auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; auto& net_timing_cost = p_timing_ctx.net_timing_cost; @@ -324,16 +331,16 @@ void comp_td_costs(const PlaceDelayModel* delay_model, if (cluster_ctx.clb_nlist.net_is_ignored(net_id)) continue; for (size_t ipin = 1; ipin < cluster_ctx.clb_nlist.net_pins(net_id).size(); ipin++) { - float conn_timing_cost = comp_td_connection_cost(delay_model, place_crit, block_locs, net_id, ipin); + float conn_timing_cost = comp_td_connection_cost(delay_model, place_crit, placer_ctx, net_id, ipin); /* Record new value */ connection_timing_cost[net_id][ipin] = conn_timing_cost; } /* Store net timing cost for more efficient incremental updating */ - net_timing_cost[net_id] = sum_td_net_cost(net_id); + net_timing_cost[net_id] = sum_td_net_cost(net_id, placer_ctx); } /* Make sure timing cost does not go above MIN_TIMING_COST. */ - *timing_cost = sum_td_costs(); + *timing_cost = sum_td_costs(placer_ctx); } /** @@ -344,10 +351,11 @@ void comp_td_costs(const PlaceDelayModel* delay_model, */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, ClusterNetId net, int ipin) { - const auto& p_timing_ctx = g_placer_ctx.timing(); + const auto& p_timing_ctx = placer_ctx.timing(); + const auto& block_locs = placer_ctx.get_block_locs(); VTR_ASSERT_SAFE_MSG(ipin > 0, "Shouldn't be calculating connection timing cost for driver pins"); @@ -357,7 +365,7 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, double conn_timing_cost = place_crit.criticality(net, ipin) * p_timing_ctx.connection_delay[net][ipin]; VTR_ASSERT_SAFE_MSG(std::isnan(p_timing_ctx.proposed_connection_delay[net][ipin]), - "Propsoed connection delay should already be invalidated"); + "Proposed connection delay should already be invalidated"); VTR_ASSERT_SAFE_MSG(std::isnan(p_timing_ctx.proposed_connection_timing_cost[net][ipin]), "Proposed connection timing cost should already be invalidated"); @@ -366,9 +374,10 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, } ///@brief Returns the timing cost of the specified 'net' based on the values in connection_timing_cost. -static double sum_td_net_cost(ClusterNetId net) { +static double sum_td_net_cost(ClusterNetId net, + PlacerContext& placer_ctx) { const auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); + auto& p_timing_ctx = placer_ctx.timing(); auto& connection_timing_cost = p_timing_ctx.connection_timing_cost; double net_td_cost = 0; @@ -380,9 +389,9 @@ static double sum_td_net_cost(ClusterNetId net) { } ///@brief Returns the total timing cost across all nets based on the values in net_timing_cost. -static double sum_td_costs() { +static double sum_td_costs(const PlacerContext& placer_ctx) { const auto& cluster_ctx = g_vpr_ctx.clustering(); - const auto& p_timing_ctx = g_placer_ctx.timing(); + const auto& p_timing_ctx = placer_ctx.timing(); const auto& net_timing_cost = p_timing_ctx.net_timing_cost; double td_cost = 0; diff --git a/vpr/src/place/place_timing_update.h b/vpr/src/place/place_timing_update.h index 89f98a568f7..31fac920f52 100644 --- a/vpr/src/place/place_timing_update.h +++ b/vpr/src/place/place_timing_update.h @@ -12,34 +12,35 @@ ///@brief Initialize the timing information and structures in the placer. void initialize_timing_info(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, - const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, SetupTimingInfo* timing_info, - t_placer_costs* costs); + t_placer_costs* costs, + PlacerContext& placer_ctx); ///@brief Updates every timing related classes, variables and structures. void perform_full_timing_update(const PlaceCritParams& crit_params, const PlaceDelayModel* delay_model, - const vtr::vector_map& block_locs, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, NetPinTimingInvalidator* pin_timing_invalidator, SetupTimingInfo* timing_info, - t_placer_costs* costs); + t_placer_costs* costs, + PlacerContext& placer_ctx); ///@brief Update timing information based on the current block positions. void update_timing_classes(const PlaceCritParams& crit_params, SetupTimingInfo* timing_info, PlacerCriticalities* criticalities, PlacerSetupSlacks* setup_slacks, - NetPinTimingInvalidator* pin_timing_invalidator); + NetPinTimingInvalidator* pin_timing_invalidator, + PlacerContext& placer_ctx); ///@brief Updates the timing driven (td) costs. void update_timing_cost(const PlaceDelayModel* delay_model, const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, double* timing_cost); ///@brief Incrementally updates timing cost based on the current delays and criticality estimates. @@ -51,14 +52,16 @@ void update_td_costs(const PlaceDelayModel* delay_model, ///@brief Recomputes timing cost from scratch based on the current delays and criticality estimates. void comp_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, double* timing_cost); /** * @brief Commit all the setup slack values from the PlacerSetupSlacks * class to `connection_setup_slack`. */ -void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks); +void commit_setup_slacks(const PlacerSetupSlacks* setup_slacks, + PlacerContext& placer_ctx); ///@brief Verify that the values in `connection_setup_slack` matches PlacerSetupSlacks. -bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks); +bool verify_connection_setup_slacks(const PlacerSetupSlacks* setup_slacks, + const PlacerContext& placer_ctx); diff --git a/vpr/src/place/placer_context.h b/vpr/src/place/placer_context.h index fcc49ce99d9..91488eed81a 100644 --- a/vpr/src/place/placer_context.h +++ b/vpr/src/place/placer_context.h @@ -143,8 +143,26 @@ class PlacerContext : public Context { const PlacerMoveContext& move() const { return move_; } PlacerMoveContext& mutable_move() { return move_; } + const vtr::vector_map& get_block_locs() const { return block_locs; } + vtr::vector_map& get_mutable_block_locs() { return block_locs; } + + const GridBlock& get_grid_blocks() const { return grid_blocks; } + GridBlock& get_mutable_grid_blocks() { return grid_blocks; } + + const vtr::vector_map& get_physical_pins() const { return physical_pins; } + vtr::vector_map& get_mutable_physical_pins() { return physical_pins; } + private: PlacerTimingContext timing_; PlacerRuntimeContext runtime_; PlacerMoveContext move_; + + ///@brief Clustered block placement locations + vtr::vector_map block_locs; + + ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) + GridBlock grid_blocks; + + ///@brief Clustered pin placement mapping with physical pin + vtr::vector_map physical_pins; }; diff --git a/vpr/src/place/placer_globals.cpp b/vpr/src/place/placer_globals.cpp index 56d2efa523c..d029abf5c44 100644 --- a/vpr/src/place/placer_globals.cpp +++ b/vpr/src/place/placer_globals.cpp @@ -5,4 +5,4 @@ #include "placer_globals.h" -PlacerContext g_placer_ctx; +//PlacerContext g_placer_ctx; diff --git a/vpr/src/place/placer_globals.h b/vpr/src/place/placer_globals.h index 5e927d3b59c..db39e8a89f3 100644 --- a/vpr/src/place/placer_globals.h +++ b/vpr/src/place/placer_globals.h @@ -7,4 +7,4 @@ #pragma once #include "placer_context.h" -extern PlacerContext g_placer_ctx; +//extern PlacerContext g_placer_ctx; diff --git a/vpr/src/place/simpleRL_move_generator.cpp b/vpr/src/place/simpleRL_move_generator.cpp index 7e59be3dd60..45e43e05762 100644 --- a/vpr/src/place/simpleRL_move_generator.cpp +++ b/vpr/src/place/simpleRL_move_generator.cpp @@ -19,10 +19,9 @@ e_create_move SimpleRLMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* criticalities) { proposed_action = karmed_bandit_agent->propose_action(); - return all_moves[proposed_action.move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, block_locs); + return all_moves[proposed_action.move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); } void SimpleRLMoveGenerator::process_outcome(double reward, e_reward_function reward_fun) { diff --git a/vpr/src/place/simpleRL_move_generator.h b/vpr/src/place/simpleRL_move_generator.h index 6d2dffadc6e..5c8200c3493 100644 --- a/vpr/src/place/simpleRL_move_generator.h +++ b/vpr/src/place/simpleRL_move_generator.h @@ -216,37 +216,43 @@ class SimpleRLMoveGenerator : public MoveGenerator { */ template::value || std::is_same::value>::type> - explicit SimpleRLMoveGenerator(std::unique_ptr& agent, float noc_attraction_weight, size_t high_fanout_thresh); + explicit SimpleRLMoveGenerator(PlacerContext& placer_ctx, + std::unique_ptr& agent, + float noc_attraction_weight, + size_t high_fanout_thresh); // Updates affected_blocks with the proposed move, while respecting the current rlim e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* criticalities) override; // Receives feedback about the outcome of the previously proposed move void process_outcome(double reward, e_reward_function reward_fun) override; }; template -SimpleRLMoveGenerator::SimpleRLMoveGenerator(std::unique_ptr& agent, float noc_attraction_weight, size_t high_fanout_thresh) { +SimpleRLMoveGenerator::SimpleRLMoveGenerator(PlacerContext& placer_ctx, + std::unique_ptr& agent, + float noc_attraction_weight, + size_t high_fanout_thresh) + : MoveGenerator(placer_ctx) { if (noc_attraction_weight > 0.0f) { all_moves.resize((int)e_move_type::NUMBER_OF_AUTO_MOVES); } else { all_moves.resize((int)e_move_type::NUMBER_OF_AUTO_MOVES - 1); } - all_moves[e_move_type::UNIFORM] = std::make_unique(); - all_moves[e_move_type::MEDIAN] = std::make_unique(); - all_moves[e_move_type::CENTROID] = std::make_unique(); - all_moves[e_move_type::W_CENTROID] = std::make_unique(); - all_moves[e_move_type::W_MEDIAN] = std::make_unique(); - all_moves[e_move_type::CRIT_UNIFORM] = std::make_unique(); - all_moves[e_move_type::FEASIBLE_REGION] = std::make_unique(); + all_moves[e_move_type::UNIFORM] = std::make_unique(placer_ctx); + all_moves[e_move_type::MEDIAN] = std::make_unique(placer_ctx); + all_moves[e_move_type::CENTROID] = std::make_unique(placer_ctx); + all_moves[e_move_type::W_CENTROID] = std::make_unique(placer_ctx); + all_moves[e_move_type::W_MEDIAN] = std::make_unique(placer_ctx); + all_moves[e_move_type::CRIT_UNIFORM] = std::make_unique(placer_ctx); + all_moves[e_move_type::FEASIBLE_REGION] = std::make_unique(placer_ctx); if (noc_attraction_weight > 0.0f) { - all_moves[e_move_type::NOC_ATTRACTION_CENTROID] = std::make_unique(noc_attraction_weight, high_fanout_thresh); + all_moves[e_move_type::NOC_ATTRACTION_CENTROID] = std::make_unique(placer_ctx, noc_attraction_weight, high_fanout_thresh); } karmed_bandit_agent = std::move(agent); diff --git a/vpr/src/place/static_move_generator.cpp b/vpr/src/place/static_move_generator.cpp index d5f4f4c3342..85098337acb 100644 --- a/vpr/src/place/static_move_generator.cpp +++ b/vpr/src/place/static_move_generator.cpp @@ -12,16 +12,18 @@ #include "vtr_random.h" #include "vtr_assert.h" -StaticMoveGenerator::StaticMoveGenerator(const vtr::vector& move_probs) { +StaticMoveGenerator::StaticMoveGenerator(PlacerContext& placer_ctx, + const vtr::vector& move_probs) + : MoveGenerator(placer_ctx) { all_moves.resize((int)e_move_type::NUMBER_OF_AUTO_MOVES); - all_moves[e_move_type::UNIFORM] = std::make_unique(); - all_moves[e_move_type::MEDIAN] = std::make_unique(); - all_moves[e_move_type::CENTROID] = std::make_unique(); - all_moves[e_move_type::W_CENTROID] = std::make_unique(); - all_moves[e_move_type::W_MEDIAN] = std::make_unique(); - all_moves[e_move_type::CRIT_UNIFORM] = std::make_unique(); - all_moves[e_move_type::FEASIBLE_REGION] = std::make_unique(); + all_moves[e_move_type::UNIFORM] = std::make_unique(placer_ctx); + all_moves[e_move_type::MEDIAN] = std::make_unique(placer_ctx); + all_moves[e_move_type::CENTROID] = std::make_unique(placer_ctx); + all_moves[e_move_type::W_CENTROID] = std::make_unique(placer_ctx); + all_moves[e_move_type::W_MEDIAN] = std::make_unique(placer_ctx); + all_moves[e_move_type::CRIT_UNIFORM] = std::make_unique(placer_ctx); + all_moves[e_move_type::FEASIBLE_REGION] = std::make_unique(placer_ctx); initialize_move_prob(move_probs); } @@ -43,14 +45,13 @@ e_create_move StaticMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* criticalities) { float rand_num = vtr::frand() * total_prob; for (auto move_type : cumm_move_probs.keys()) { if (rand_num <= cumm_move_probs[move_type]) { proposed_action.move_type = move_type; - return all_moves[move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities, block_locs); + return all_moves[move_type]->propose_move(blocks_affected, proposed_action, rlim, placer_opts, criticalities); } } diff --git a/vpr/src/place/static_move_generator.h b/vpr/src/place/static_move_generator.h index feb9e61260e..0c0f1242617 100644 --- a/vpr/src/place/static_move_generator.h +++ b/vpr/src/place/static_move_generator.h @@ -17,13 +17,14 @@ class StaticMoveGenerator : public MoveGenerator { void initialize_move_prob(const vtr::vector& move_probs); public: - StaticMoveGenerator(const vtr::vector& move_probs); + StaticMoveGenerator() = delete; + StaticMoveGenerator(PlacerContext& placer_ctx, + const vtr::vector& move_probs); e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* criticalities) override; }; #endif diff --git a/vpr/src/place/timing_place.cpp b/vpr/src/place/timing_place.cpp index 33b991f7dcd..ad217af5934 100644 --- a/vpr/src/place/timing_place.cpp +++ b/vpr/src/place/timing_place.cpp @@ -37,7 +37,9 @@ PlacerCriticalities::PlacerCriticalities(const ClusteredNetlist& clb_nlist, cons * * If the criticality exponent has changed, we also need to update from scratch. */ -void PlacerCriticalities::update_criticalities(const SetupTimingInfo* timing_info, const PlaceCritParams& crit_params) { +void PlacerCriticalities::update_criticalities(const SetupTimingInfo* timing_info, + const PlaceCritParams& crit_params, + PlacerContext& placer_ctx) { /* If update is not enabled, exit the routine. */ if (!update_enabled) { /* re-computation is required on the next iteration */ @@ -55,7 +57,7 @@ void PlacerCriticalities::update_criticalities(const SetupTimingInfo* timing_inf last_crit_exponent_ = crit_params.crit_exponent; } - auto& place_move_ctx = g_placer_ctx.mutable_move(); + auto& place_move_ctx = placer_ctx.mutable_move(); /* Performs a 1-to-1 mapping from criticality to timing_place_crit_. * For every pin on every net (or, equivalently, for every tedge ending diff --git a/vpr/src/place/timing_place.h b/vpr/src/place/timing_place.h index bd74e52e2db..12687486dcd 100644 --- a/vpr/src/place/timing_place.h +++ b/vpr/src/place/timing_place.h @@ -125,7 +125,9 @@ class PlacerCriticalities { * If out of sync, then the criticalities cannot be incrementally updated on * during the next timing analysis iteration. */ - void update_criticalities(const SetupTimingInfo* timing_info, const PlaceCritParams& crit_params); + void update_criticalities(const SetupTimingInfo* timing_info, + const PlaceCritParams& crit_params, + PlacerContext& placer_ctx); ///@bried Enable the recompute_required flag to enforce from scratch update. void set_recompute_required(); @@ -362,7 +364,7 @@ class PlacerTimingCosts { //Walk through the netlist to determine how many connections there are. size_t iconn = 0; for (ClusterNetId net : nets) { - //The placer always skips 'ignored' nets so they don't effect timing + //The placer always skips 'ignored' nets, so they don't affect timing //costs, so we also skip them here if (nlist.net_is_ignored(net)) { net_start_indicies_[net] = OPEN; @@ -442,7 +444,7 @@ class PlacerTimingCosts { * * Useful for client code operating on the cost values (e.g. difference between costs). */ - operator double() { + operator double() const { return connection_cost_; } @@ -467,6 +469,10 @@ class PlacerTimingCosts { return ConnectionProxy(timing_costs_, net_sink_costs_[ipin]); } + const ConnectionProxy operator[](size_t ipin) const { + return ConnectionProxy(timing_costs_, net_sink_costs_[ipin]); + } + private: PlacerTimingCosts* timing_costs_; double* net_sink_costs_; @@ -480,6 +486,13 @@ class PlacerTimingCosts { return NetProxy(this, net_connection_costs); } + NetProxy operator[](ClusterNetId net_id) const { + VTR_ASSERT_SAFE(net_start_indicies_[net_id] >= 0); + + const double* net_connection_costs = &connection_costs_[net_start_indicies_[net_id]]; + return NetProxy(const_cast(this), const_cast(net_connection_costs)); + } + void clear() { connection_costs_.clear(); net_start_indicies_.clear(); diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index 7c8acfefd66..ce80d3babe5 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -3,14 +3,20 @@ #include "place_constraints.h" #include "move_utils.h" +UniformMoveGenerator::UniformMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} + e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* /*criticalities*/) { + auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& placer_ctx = placer_ctx_.get(); + auto& block_locs = placer_ctx.get_block_locs(); + //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); @@ -19,8 +25,6 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks return e_create_move::ABORT; } - auto& cluster_ctx = g_vpr_ctx.clustering(); - t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = g_vpr_ctx.device().grid.get_physical_type({from.x, from.y, from.layer}); diff --git a/vpr/src/place/uniform_move_generator.h b/vpr/src/place/uniform_move_generator.h index 8a8b3f11339..2dda03940ab 100644 --- a/vpr/src/place/uniform_move_generator.h +++ b/vpr/src/place/uniform_move_generator.h @@ -9,12 +9,16 @@ * a range limit centered on from_block in the compressed block grid space */ class UniformMoveGenerator : public MoveGenerator { + public: + UniformMoveGenerator() = delete; + explicit UniformMoveGenerator(PlacerContext& placer_ctx); + + private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& /*placer_opts*/, - const PlacerCriticalities* /*criticalities*/, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* /*criticalities*/) override; }; #endif diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index 22d958d3423..b81b4d50778 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -4,14 +4,22 @@ #include "place_constraints.h" #include "move_utils.h" +WeightedCentroidMoveGenerator::WeightedCentroidMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} + e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* criticalities) { + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& device_ctx = g_vpr_ctx.device(); + auto& placer_ctx = placer_ctx_.get(); + auto& block_locs = placer_ctx.get_block_locs(); + auto& place_move_ctx = placer_ctx.mutable_move(); + //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Centroid Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); @@ -20,11 +28,6 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move return e_create_move::ABORT; } - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& device_ctx = g_vpr_ctx.device(); - - auto& place_move_ctx = g_placer_ctx.mutable_move(); - t_pl_loc from = block_locs[b_from].loc; auto cluster_from_type = cluster_ctx.clb_nlist.block_type(b_from); auto grid_from_type = device_ctx.grid.get_physical_type({from.x, from.y, from.layer}); diff --git a/vpr/src/place/weighted_centroid_move_generator.h b/vpr/src/place/weighted_centroid_move_generator.h index 8b0514bb9f3..f82d104fd3e 100644 --- a/vpr/src/place/weighted_centroid_move_generator.h +++ b/vpr/src/place/weighted_centroid_move_generator.h @@ -13,12 +13,16 @@ * "Learn to Place: FPGA Placement using Reinforcement Learning and Directed Moves", ICFPT2020 */ class WeightedCentroidMoveGenerator : public MoveGenerator { + public: + WeightedCentroidMoveGenerator() = delete; + explicit WeightedCentroidMoveGenerator(PlacerContext& placer_ctx); + + private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* criticalities) override; }; #endif diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index 5fa519ca07e..2d851920ee5 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -7,6 +7,9 @@ #define CRIT_MULT_FOR_W_MEDIAN 10 +WeightedMedianMoveGenerator::WeightedMedianMoveGenerator(PlacerContext& placer_ctx) + : MoveGenerator(placer_ctx) {} + static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, ClusterPinId moving_pin_id, const PlacerCriticalities* criticalities, @@ -17,10 +20,14 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { + const PlacerCriticalities* criticalities) { + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& placer_ctx = placer_ctx_.get(); + auto& block_locs = placer_ctx.get_block_locs(); + auto& place_move_ctx = placer_ctx.mutable_move(); + //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, block_locs); + ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); @@ -29,8 +36,7 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = g_placer_ctx.mutable_move(); + int num_layers = g_vpr_ctx.device().grid.get_num_layers(); @@ -270,3 +276,4 @@ static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, return skip_net; } + diff --git a/vpr/src/place/weighted_median_move_generator.h b/vpr/src/place/weighted_median_move_generator.h index edb355352c4..2b942f083f4 100644 --- a/vpr/src/place/weighted_median_move_generator.h +++ b/vpr/src/place/weighted_median_move_generator.h @@ -13,12 +13,16 @@ * "Learn to Place: FPGA Placement using Reinforcement Learning and Directed Moves", ICFPT2020 */ class WeightedMedianMoveGenerator : public MoveGenerator { + public: + WeightedMedianMoveGenerator() = delete; + explicit WeightedMedianMoveGenerator(PlacerContext& placer_ctx); + + private: e_create_move propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, const t_placer_opts& placer_opts, - const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) override; + const PlacerCriticalities* criticalities) override; }; #endif From ea8c9726592df452ad11df1e1729e6abc0b3088a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Fri, 26 Jul 2024 17:24:17 -0400 Subject: [PATCH 033/146] remove placer_globals files --- vpr/src/place/critical_uniform_move_generator.cpp | 2 +- vpr/src/place/median_move_generator.cpp | 1 - vpr/src/place/move_generator.h | 2 +- vpr/src/place/move_utils.cpp | 1 - vpr/src/place/net_cost_handler.cpp | 1 - vpr/src/place/place.cpp | 1 - vpr/src/place/place_delay_model.cpp | 3 +-- vpr/src/place/place_timing_update.cpp | 2 +- vpr/src/place/place_timing_update.h | 2 +- vpr/src/place/placer_context.h | 3 --- vpr/src/place/placer_globals.cpp | 8 -------- vpr/src/place/placer_globals.h | 10 ---------- vpr/src/place/timing_place.cpp | 2 +- 13 files changed, 6 insertions(+), 32 deletions(-) delete mode 100644 vpr/src/place/placer_globals.cpp delete mode 100644 vpr/src/place/placer_globals.h diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index 0f252f913db..fe5dc9b7d2f 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -13,7 +13,7 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved const PlacerCriticalities* /*criticalities*/) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx_.get().get_block_locs(); + const auto& block_locs = placer_ctx.get_block_locs(); ClusterNetId net_from; int pin_from; diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 89ced73e93f..52cf1a1c1e5 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -2,7 +2,6 @@ #include "globals.h" #include #include "place_constraints.h" -#include "placer_globals.h" #include "move_utils.h" MedianMoveGenerator::MedianMoveGenerator(PlacerContext& placer_ctx) diff --git a/vpr/src/place/move_generator.h b/vpr/src/place/move_generator.h index 629e1db930d..9924744ead6 100644 --- a/vpr/src/place/move_generator.h +++ b/vpr/src/place/move_generator.h @@ -4,7 +4,7 @@ #include "move_utils.h" #include "timing_place.h" #include "directed_moves_util.h" -#include "placer_globals.h" +#include "placer_context.h" #include diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index d2ae4a311da..6de78d0d1b4 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -9,7 +9,6 @@ #include "draw.h" #include "place_constraints.h" -#include "placer_globals.h" //f_placer_breakpoint_reached is used to stop the placer when a breakpoint is reached. When this flag is true, it stops the placer after the current perturbation. Thus, when a breakpoint is reached, this flag is set to true. //Note: The flag is only effective if compiled with VTR_ENABLE_DEBUG_LOGGING diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index d312c1c0a25..e58217f743f 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -25,7 +25,6 @@ */ #include "net_cost_handler.h" #include "globals.h" -#include "placer_globals.h" #include "move_utils.h" #include "place_timing_update.h" #include "noc_place_utils.h" diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 615fc71b073..24b08caf385 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -24,7 +24,6 @@ #include "globals.h" #include "place.h" -#include "placer_globals.h" #include "read_place.h" #include "draw.h" #include "place_and_route.h" diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index feaf9bc5146..2d9c6157865 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -11,13 +11,12 @@ #include "rr_graph2.h" #include "timing_place_lookup.h" +#include "placer_context.h" #include "vtr_log.h" #include "vtr_math.h" #include "vpr_error.h" -#include "placer_globals.h" - #ifdef VTR_ENABLE_CAPNPROTO # include "capnp/serialize.h" # include "place_delay_model.capnp.h" diff --git a/vpr/src/place/place_timing_update.cpp b/vpr/src/place/place_timing_update.cpp index d74ddeb409f..8fc042811ef 100644 --- a/vpr/src/place/place_timing_update.cpp +++ b/vpr/src/place/place_timing_update.cpp @@ -5,8 +5,8 @@ #include "vtr_time.h" -#include "placer_globals.h" #include "place_timing_update.h" +#include "placer_context.h" /* Routines local to place_timing_update.cpp */ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, diff --git a/vpr/src/place/place_timing_update.h b/vpr/src/place/place_timing_update.h index 31fac920f52..1eb61b02094 100644 --- a/vpr/src/place/place_timing_update.h +++ b/vpr/src/place/place_timing_update.h @@ -46,7 +46,7 @@ void update_timing_cost(const PlaceDelayModel* delay_model, ///@brief Incrementally updates timing cost based on the current delays and criticality estimates. void update_td_costs(const PlaceDelayModel* delay_model, const PlacerCriticalities& place_crit, - const vtr::vector_map& block_locs, + PlacerContext& placer_ctx, double* timing_cost); ///@brief Recomputes timing cost from scratch based on the current delays and criticality estimates. diff --git a/vpr/src/place/placer_context.h b/vpr/src/place/placer_context.h index 91488eed81a..8142f723526 100644 --- a/vpr/src/place/placer_context.h +++ b/vpr/src/place/placer_context.h @@ -2,9 +2,6 @@ * @file placer_context.h * @brief Contains placer context/data structures referenced by various * source files in vpr/src/place. - * - * All the variables and data structures in this file can be accessed via - * a single global variable: g_placer_ctx. (see placer_globals.h/.cpp). */ #pragma once diff --git a/vpr/src/place/placer_globals.cpp b/vpr/src/place/placer_globals.cpp deleted file mode 100644 index d029abf5c44..00000000000 --- a/vpr/src/place/placer_globals.cpp +++ /dev/null @@ -1,8 +0,0 @@ -/** - * @file placer_globals.cpp - * @brief Defines the global variable `g_placer_ctx` in placer_globals.h - */ - -#include "placer_globals.h" - -//PlacerContext g_placer_ctx; diff --git a/vpr/src/place/placer_globals.h b/vpr/src/place/placer_globals.h deleted file mode 100644 index db39e8a89f3..00000000000 --- a/vpr/src/place/placer_globals.h +++ /dev/null @@ -1,10 +0,0 @@ -/** - * @file placer_globals.h - * @brief Declares the accessor variable for key global - * structs that are used everywhere in VPR placer. - */ - -#pragma once -#include "placer_context.h" - -//extern PlacerContext g_placer_ctx; diff --git a/vpr/src/place/timing_place.cpp b/vpr/src/place/timing_place.cpp index ad217af5934..076a0faec26 100644 --- a/vpr/src/place/timing_place.cpp +++ b/vpr/src/place/timing_place.cpp @@ -13,10 +13,10 @@ #include "vpr_types.h" #include "vpr_utils.h" #include "globals.h" -#include "placer_globals.h" #include "net_delay.h" #include "timing_place_lookup.h" #include "timing_place.h" +#include "placer_context.h" #include "timing_info.h" From d3f4ca73b124dc8ef6e5dac3ea4c31cc93c0bbe3 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 13:43:20 -0400 Subject: [PATCH 034/146] trying to remove remaining place_ctx.block_locs --- vpr/src/base/place_and_route.cpp | 5 +- vpr/src/base/read_place.cpp | 18 +-- vpr/src/base/read_place.h | 6 +- vpr/src/base/vpr_api.cpp | 4 +- vpr/src/base/vpr_context.h | 1 + vpr/src/base/vpr_types.h | 25 ++++ vpr/src/place/initial_noc_placement.cpp | 34 ++--- vpr/src/place/initial_noc_placment.h | 4 +- vpr/src/place/initial_placement.cpp | 158 ++++++++++++------------ vpr/src/place/initial_placement.h | 17 ++- vpr/src/place/move_transactions.cpp | 12 +- vpr/src/place/move_transactions.h | 4 +- vpr/src/place/noc_place_checkpoint.cpp | 22 ++-- vpr/src/place/noc_place_checkpoint.h | 4 +- vpr/src/place/place.cpp | 13 +- vpr/src/place/place_constraints.cpp | 7 +- vpr/src/place/place_util.cpp | 27 ++-- vpr/src/place/place_util.h | 9 +- vpr/src/place/placer_context.h | 18 +-- vpr/src/util/vpr_utils.cpp | 13 +- vpr/src/util/vpr_utils.h | 8 +- 21 files changed, 234 insertions(+), 175 deletions(-) diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 1117b3378df..7d7f391f526 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -575,9 +575,10 @@ static float comp_width(t_chan* chan, float x, float separation) { void post_place_sync() { /* Go through each block */ auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + const auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& physical_pins = g_vpr_ctx.mutable_placement().mutable_physical_pins(); // Cluster-based netlist is used for placement for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id, block_locs); + place_sync_external_block_connections(block_id, block_locs, physical_pins); } } diff --git a/vpr/src/base/read_place.cpp b/vpr/src/base/read_place.cpp index c90c8b9e2a6..db2f6918600 100644 --- a/vpr/src/base/read_place.cpp +++ b/vpr/src/base/read_place.cpp @@ -16,6 +16,7 @@ #include "read_place.h" #include "read_xml_arch_file.h" #include "place_util.h" +#include "placer_context.h" static void read_place_header(std::ifstream& placement_file, const char* net_file, @@ -24,13 +25,13 @@ static void read_place_header(std::ifstream& placement_file, const DeviceGrid& grid); static std::string read_place_body(std::ifstream& placement_file, - vtr::vector_map& block_locs, + PlacerContext& placer_ctx, const char* place_file, bool is_place_file); std::string read_place(const char* net_file, const char* place_file, - vtr::vector_map& block_locs, + PlacerContext& placer_ctx, bool verify_file_digests, const DeviceGrid& grid) { std::ifstream fstream(place_file); @@ -46,7 +47,7 @@ std::string read_place(const char* net_file, VTR_LOG("\n"); read_place_header(fstream, net_file, place_file, verify_file_digests, grid); - std::string placement_id = read_place_body(fstream, block_locs, place_file, is_place_file); + std::string placement_id = read_place_body(fstream, placer_ctx, place_file, is_place_file); VTR_LOG("Successfully read %s.\n", place_file); VTR_LOG("\n"); @@ -55,7 +56,7 @@ std::string read_place(const char* net_file, } void read_constraints(const char* constraints_file, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { std::ifstream fstream(constraints_file); if (!fstream) { VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, @@ -68,7 +69,7 @@ void read_constraints(const char* constraints_file, VTR_LOG("Reading %s.\n", constraints_file); VTR_LOG("\n"); - read_place_body(fstream, block_locs, constraints_file, is_place_file); + read_place_body(fstream, placer_ctx, constraints_file, is_place_file); VTR_LOG("Successfully read constraints file %s.\n", constraints_file); VTR_LOG("\n"); @@ -208,11 +209,12 @@ static void read_place_header(std::ifstream& placement_file, * or a constraints file (is_place_file = false). */ static std::string read_place_body(std::ifstream& placement_file, - vtr::vector_map& block_locs, + PlacerContext& placer_ctx, const char* place_file, bool is_place_file) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& atom_ctx = g_vpr_ctx.atom(); + auto& block_locs = placer_ctx.get_mutable_block_locs(); std::string line; int lineno = 0; @@ -221,7 +223,7 @@ static std::string read_place_body(std::ifstream& placement_file, vtr::vector_map seen_blocks; //initialize seen_blocks - for (auto block_id : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { int seen_count = 0; seen_blocks.insert(block_id, seen_count); } @@ -307,7 +309,7 @@ static std::string read_place_body(std::ifstream& placement_file, loc.layer = block_layer; if (seen_blocks[blk_id] == 0) { - set_block_location(blk_id, loc, block_locs); + set_block_location(blk_id, loc, placer_ctx); } //need to lock down blocks if it is a constraints file diff --git a/vpr/src/base/read_place.h b/vpr/src/base/read_place.h index 9eef4a95702..a6a9e56d84c 100644 --- a/vpr/src/base/read_place.h +++ b/vpr/src/base/read_place.h @@ -1,6 +1,8 @@ #ifndef READ_PLACE_H #define READ_PLACE_H +class PlacerContext; + /** * This function is for reading a place file when placement is skipped. * It takes in the current netlist file and grid dimensions to check that they match those that were used when placement was generated. @@ -8,7 +10,7 @@ */ std::string read_place(const char* net_file, const char* place_file, - vtr::vector_map& block_locs, + PlacerContext& placer_ctx, bool verify_file_hashes, const DeviceGrid& grid); @@ -16,7 +18,7 @@ std::string read_place(const char* net_file, * This function is used to read a constraints file that specifies the desired locations of blocks. */ void read_constraints(const char* constraints_file, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * This function prints out a place file. diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index 2854615ce55..bf0e9392f4d 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -832,7 +832,9 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { const auto& filename_opts = vpr_setup.FileNameOpts; //Initialize placement data structures, which will be filled when loading placement - init_placement_context(); + auto& block_locs = place_ctx.get_mutable_block_locs(); + GridBlock& grid_blocks = place_ctx.get_mutable_grid_blocks(); + init_placement_context(block_locs, grid_blocks); //Load an existing placement from a file place_ctx.placement_id = read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 029980bd73f..1c4fda0f158 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -398,6 +398,7 @@ struct PlacementContext : public Context { vtr::vector_map& get_mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } + vtr::vector_map& mutable_physical_pins() { VTR_ASSERT(loc_vars_are_accessible_); return physical_pins; } void lock_loc_vars() { loc_vars_are_accessible_ = false; } void unlock_loc_vars() { loc_vars_are_accessible_ = true; } diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index 7e99e5444b3..4ba5940a9b9 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -48,6 +48,7 @@ #include "rr_graph_fwd.h" #include "rr_graph_cost.h" #include "rr_graph_type.h" +#include "vtr_vector_map.h" /******************************************************************************* * Global data types and constants @@ -900,6 +901,30 @@ class GridBlock { vtr::NdMatrix grid_blocks_; }; +class PlaceLocVars { + private: + ///@brief Clustered block placement locations + vtr::vector_map block_locs_; + + ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) + GridBlock grid_blocks_; + + ///@brief Clustered pin placement mapping with physical pin + vtr::vector_map physical_pins_; + + public: + inline const vtr::vector_map& block_locs() const { return block_locs_; } + inline vtr::vector_map& mutable_block_locs() { return block_locs_; } + + inline const GridBlock& mutable_grid_blocks() const { return grid_blocks_; } + inline GridBlock& mutable_grid_blocks() { return grid_blocks_; } + + inline const vtr::vector_map& mutable_physical_pins() const { return physical_pins_; } + inline vtr::vector_map& physical_pins() { return physical_pins_; } + + +}; + ///@brief Names of various files struct t_file_name_opts { std::string ArchFile; diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index ab185fc8474..638930f9afc 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -33,7 +33,7 @@ static bool accept_noc_swap(double delta_cost, double prob); * @param router_blk_id NoC router cluster block ID */ static void place_constrained_noc_router(ClusterBlockId router_blk_id, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Randomly places unconstrained NoC routers. @@ -44,7 +44,7 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, */ static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Runs a simulated annealing optimizer for NoC routers. @@ -52,7 +52,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout * @param noc_opts Contains weighting factors for NoC cost terms. */ static void noc_routers_anneal(const t_noc_opts& noc_opts, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); static bool accept_noc_swap(double delta_cost, double prob) { if (delta_cost <= 0.0) { @@ -72,7 +72,7 @@ static bool accept_noc_swap(double delta_cost, double prob) { } static void place_constrained_noc_router(ClusterBlockId router_blk_id, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& floorplanning_ctx = g_vpr_ctx.floorplanning(); @@ -88,11 +88,11 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, bool macro_placed = false; for (int i_try = 0; i_try < MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY && !macro_placed; i_try++) { - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE, block_locs); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE, placer_ctx); } if (!macro_placed) { - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE, block_locs); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE, placer_ctx); } if (!macro_placed) { @@ -102,7 +102,7 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& place_ctx = g_vpr_ctx.placement(); auto& noc_ctx = g_vpr_ctx.noc(); auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -159,7 +159,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout t_pl_macro pl_macro; pl_macro.members.push_back(macro_member); - bool legal = try_place_macro(pl_macro, loc, block_locs); + bool legal = try_place_macro(pl_macro, loc, placer_ctx); if (!legal) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Could not place a router cluster into an empty physical router."); } @@ -173,8 +173,9 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout } static void noc_routers_anneal(const t_noc_opts& noc_opts, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& noc_ctx = g_vpr_ctx.noc(); + const auto& block_locs = placer_ctx.get_block_locs(); // Only NoC related costs are considered t_placer_costs costs; @@ -232,7 +233,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, block_locs); if (create_move_outcome != e_create_move::ABORT) { - apply_move_blocks(blocks_affected, block_locs); + apply_move_blocks(blocks_affected, placer_ctx); NocCostTerms noc_delta_c; find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, block_locs); @@ -251,22 +252,23 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, checkpoint.save_checkpoint(costs.cost, block_locs); } } else { // The proposed move is rejected - revert_move_blocks(blocks_affected, block_locs); + revert_move_blocks(blocks_affected, placer_ctx); revert_noc_traffic_flow_routes(blocks_affected, block_locs); } } } if (checkpoint.get_cost() < costs.cost) { - checkpoint.restore_checkpoint(costs, block_locs); + checkpoint.restore_checkpoint(costs, placer_ctx); } } void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { vtr::ScopedStartFinishTimer timer("Initial NoC Placement"); auto& noc_ctx = g_vpr_ctx.noc(); + const auto& block_locs = placer_ctx.get_block_locs(); // Get all the router clusters const std::vector& router_blk_ids = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); @@ -281,20 +283,20 @@ void initial_noc_placement(const t_noc_opts& noc_opts, } if (is_cluster_constrained(router_blk_id)) { - place_constrained_noc_router(router_blk_id, block_locs); + place_constrained_noc_router(router_blk_id, placer_ctx); } else { unfixed_routers.push_back(router_blk_id); } } // Place unconstrained NoC routers randomly - place_noc_routers_randomly(unfixed_routers, placer_opts.seed, block_locs); + place_noc_routers_randomly(unfixed_routers, placer_opts.seed, placer_ctx); // populate internal data structures to maintain route, bandwidth usage, and latencies initial_noc_routing({}, block_locs); // Run the simulated annealing optimizer for NoC routers - noc_routers_anneal(noc_opts, block_locs); + noc_routers_anneal(noc_opts, placer_ctx); // check if there is any cycles bool has_cycle = noc_routing_has_cycle(block_locs); diff --git a/vpr/src/place/initial_noc_placment.h b/vpr/src/place/initial_noc_placment.h index e5d365ef036..0cb6b4d4095 100644 --- a/vpr/src/place/initial_noc_placment.h +++ b/vpr/src/place/initial_noc_placment.h @@ -5,6 +5,8 @@ #include "vpr_types.h" #include "vtr_vector_map.h" +class PlacerContext; + /** * @brief Randomly places NoC routers, then runs a quick simulated annealing * to minimize NoC costs. @@ -13,6 +15,6 @@ */ void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); #endif //VTR_INITIAL_NOC_PLACMENT_H diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index bb977eb3d82..22e36564d67 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -1,6 +1,7 @@ #include "vtr_memory.h" #include "vtr_random.h" #include "vtr_time.h" +#include "vpr_types.h" #include "globals.h" #include "read_place.h" @@ -12,9 +13,10 @@ #include "move_utils.h" #include "region.h" #include "directed_moves_util.h" -#include "vpr_types.h" +#include "placer_context.h" #include "echo_files.h" + #include #include #include @@ -39,13 +41,13 @@ static constexpr int SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR = 100; * */ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Initializes the grid to empty. It also initialized the location for * all blocks to unplaced. */ -static void clear_all_grid_locs(vtr::vector_map& block_locs); +static void clear_all_grid_locs(PlacerContext& placer_ctx); /** * @brief Control routine for placing a macro. @@ -70,7 +72,7 @@ static bool place_macro(int macros_max_num_tries, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector& block_scores, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /* * Assign scores to each block based on macro size and floorplanning constraints. @@ -190,7 +192,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, vtr::vector& block_scores, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Looks for a valid placement location for macro in second iteration, tries to place as many macros as possible in one column @@ -210,7 +212,7 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - vtr::vector_map& ); + PlacerContext& placer_ctx); /** * @brief Tries for MAX_INIT_PLACE_ATTEMPTS times to place all blocks considering their floorplanning constraints and the device size @@ -222,7 +224,7 @@ static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, const char* constraints_file, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief If any blocks remain unplaced after all initial placement iterations, this routine @@ -471,7 +473,9 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, vtr::vector& block_scores, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { + auto& block_locs = placer_ctx.get_mutable_block_locs(); + t_pl_loc centroid_loc(OPEN, OPEN, OPEN, OPEN); std::vector unplaced_blocks_to_update_their_score; @@ -512,15 +516,13 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - bool legal; - - legal = try_place_macro(pl_macro, centroid_loc, block_locs); + bool legal = try_place_macro(pl_macro, centroid_loc, placer_ctx); if (legal) { fix_IO_block_types(pl_macro, centroid_loc, pad_loc_type, block_locs); //after placing the current block, its connections' score must be updated. - for (auto blk_id : unplaced_blocks_to_update_their_score) { + for (ClusterBlockId blk_id : unplaced_blocks_to_update_their_score) { block_scores[blk_id].number_of_placed_connections++; } } @@ -625,7 +627,7 @@ static inline void fix_IO_block_types(const t_pl_macro& pl_macro, //placed and then stay fixed to that location, which is why the macro members are marked as fixed. const auto& type = device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer}); if (is_io_type(type) && pad_loc_type == RANDOM) { - for (const auto& pl_macro_member : pl_macro.members) { + for (const t_pl_macro_member& pl_macro_member : pl_macro.members) { block_locs[pl_macro_member.blk_index].is_fixed = true; } } @@ -635,9 +637,8 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; - t_pl_loc loc; /* * Getting various values needed for the find_compatible_compressed_loc_in_range() routine called below. @@ -689,6 +690,7 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, return false; } + t_pl_loc loc; compressed_grid_to_loc(block_type, to_compressed_loc, loc); auto& device_ctx = g_vpr_ctx.device(); @@ -698,9 +700,10 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - legal = try_place_macro(pl_macro, loc, block_locs); + legal = try_place_macro(pl_macro, loc, placer_ctx); if (legal) { + auto& block_locs = placer_ctx.get_mutable_block_locs(); fix_IO_block_types(pl_macro, loc, pad_loc_type, block_locs); } @@ -711,9 +714,10 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; - auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& block_locs = placer_ctx.get_mutable_block_locs(); + const GridBlock& grid_blocks = placer_ctx.get_grid_blocks(); const std::vector& regions = pr.get_regions(); @@ -759,8 +763,8 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, int subtile = regions[reg].get_sub_tile(); to_loc.sub_tile = subtile; - if (place_ctx.grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { - placed = try_place_macro(pl_macro, to_loc, block_locs); + if (grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { + placed = try_place_macro(pl_macro, to_loc, placer_ctx); if (placed) { fix_IO_block_types(pl_macro, to_loc, pad_loc_type, block_locs); @@ -774,8 +778,8 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, for (int st = st_low; st <= st_high && !placed; st++) { to_loc.sub_tile = st; - if (place_ctx.grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { - placed = try_place_macro(pl_macro, to_loc, block_locs); + if (grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { + placed = try_place_macro(pl_macro, to_loc, placer_ctx); if (placed) { fix_IO_block_types(pl_macro, to_loc, pad_loc_type, block_locs); } @@ -801,7 +805,7 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { t_pl_loc loc; int column_index = get_blk_type_first_loc(loc, pl_macro, blk_types_empty_locs_in_grid); @@ -817,9 +821,10 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - bool legal = try_place_macro(pl_macro, loc, block_locs); + bool legal = try_place_macro(pl_macro, loc, placer_ctx); if (legal) { + auto& block_locs = placer_ctx.get_mutable_block_locs(); fix_IO_block_types(pl_macro, loc, pad_loc_type, block_locs); } @@ -831,10 +836,11 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos, - vtr::vector_map& block_locs) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); + PlacerContext& placer_ctx) { + bool f_placer_debug = g_vpr_ctx.placement().f_placer_debug; + const GridBlock& grid_blocks = placer_ctx.get_grid_blocks(); - VTR_LOGV_DEBUG(place_ctx.f_placer_debug, "\t\t\t\tTry to place the macro at %dx%dx%dx%d\n", + VTR_LOGV_DEBUG(f_placer_debug, "\t\t\t\tTry to place the macro at %dx%dx%dx%d\n", head_pos.x, head_pos.y, head_pos.sub_tile, @@ -843,8 +849,8 @@ bool try_place_macro(const t_pl_macro& pl_macro, bool macro_placed = false; // If that location is occupied, do nothing. - if (place_ctx.grid_blocks.block_at_location(head_pos) != EMPTY_BLOCK_ID) { - return (macro_placed); + if (grid_blocks.block_at_location(head_pos) != EMPTY_BLOCK_ID) { + return macro_placed; } bool mac_can_be_placed = macro_can_be_placed(pl_macro, head_pos, false); @@ -852,18 +858,15 @@ bool try_place_macro(const t_pl_macro& pl_macro, if (mac_can_be_placed) { // Place down the macro macro_placed = true; - VTR_LOGV_DEBUG(place_ctx.f_placer_debug, "\t\t\t\tMacro is placed at the given location\n"); - for (const auto& pl_macro_member : pl_macro.members) { + VTR_LOGV_DEBUG(f_placer_debug, "\t\t\t\tMacro is placed at the given location\n"); + for (const t_pl_macro_member& pl_macro_member : pl_macro.members) { t_pl_loc member_pos = head_pos + pl_macro_member.offset; - ClusterBlockId iblk = pl_macro_member.blk_index; - - set_block_location(iblk, member_pos, block_locs); - + set_block_location(iblk, member_pos, placer_ctx); } // Finish placing all the members in the macro } - return (macro_placed); + return macro_placed; } static bool place_macro(int macros_max_num_tries, @@ -871,7 +874,8 @@ static bool place_macro(int macros_max_num_tries, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector& block_scores, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { + const auto& block_locs = placer_ctx.get_block_locs(); ClusterBlockId blk_id = pl_macro.members[0].blk_index; VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tHead of the macro is Block %d\n", size_t(blk_id)); @@ -899,18 +903,18 @@ static bool place_macro(int macros_max_num_tries, //We need to place densely in second iteration to be able to find a legal initial placement solution if (blk_types_empty_locs_in_grid != nullptr && !blk_types_empty_locs_in_grid->empty()) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry dense placement\n"); - macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, block_locs); + macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, placer_ctx); } if (!macro_placed) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry centroid placement\n"); - macro_placed = try_centroid_placement(pl_macro, pr, block_type, pad_loc_type, block_scores, block_locs); + macro_placed = try_centroid_placement(pl_macro, pr, block_type, pad_loc_type, block_scores, placer_ctx); } VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tMacro is placed: %d\n", macro_placed); // If macro is not placed yet, try to place the macro randomly for the max number of random tries for (int itry = 0; itry < macros_max_num_tries && !macro_placed; itry++) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry random place iter: %d\n", itry); - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, pad_loc_type, block_locs); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, pad_loc_type, placer_ctx); } // Finished all tries if (!macro_placed) { @@ -922,7 +926,7 @@ static bool place_macro(int macros_max_num_tries, // Exhaustive placement of carry macros VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry exhaustive placement\n"); - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, pad_loc_type, block_locs); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, pad_loc_type, placer_ctx); } return macro_placed; } @@ -973,11 +977,11 @@ static vtr::vector assign_block_scores() { } -static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, +static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, const char* constraints_file, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); @@ -1000,12 +1004,12 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, for (auto iter_no = 0; iter_no < MAX_INIT_PLACE_ATTEMPTS; iter_no++) { //clear grid for a new placement iteration - clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, block_locs); + clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, placer_ctx); unplaced_blk_type_in_curr_itr.clear(); // read the constraint file if the user has provided one and this is not the first attempt if (strlen(constraints_file) != 0 && iter_no != 0) { - read_constraints(constraints_file, block_locs); + read_constraints(constraints_file, placer_ctx); } //resize the vector to store unplaced block types empty locations @@ -1030,12 +1034,14 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, #ifdef VTR_ENABLE_DEBUG_LOGGING enable_placer_debug(placer_opts, blk_id); +#else + (void)placer_opts; #endif VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Popped Block %d\n", size_t(blk_id)); blocks_placed_since_heap_update++; - bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, block_locs); + bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, placer_ctx); //update heap based on update_heap_freq calculated above if (blocks_placed_since_heap_update % (update_heap_freq) == 0) { @@ -1063,7 +1069,7 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, } //loop over block types with macro that have failed to be placed, and add their locations in grid for the next iteration - for (auto itype : unplaced_blk_type_in_curr_itr) { + for (int itype : unplaced_blk_type_in_curr_itr) { blk_types_empty_locs_in_grid[itype] = init_blk_types_empty_locations(itype); } @@ -1073,8 +1079,12 @@ static void place_all_blocks([[maybe_unused]] const t_placer_opts& placer_opts, } static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& device_ctx = g_vpr_ctx.device(); + auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& grid_blocks = placer_ctx.get_mutable_grid_blocks(); + auto& block_locs = placer_ctx.get_mutable_block_locs(); + bool clear_all_block_types = false; /* check if all types should be cleared @@ -1085,23 +1095,19 @@ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_b clear_all_block_types = true; } - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); - int itype; - /* We'll use the grid to record where everything goes. Initialize to the grid has no * blocks placed anywhere. */ for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) { for (int i = 0; i < (int)device_ctx.grid.width(); i++) { for (int j = 0; j < (int)device_ctx.grid.height(); j++) { - const auto& type = device_ctx.grid.get_physical_type({i, j, layer_num}); - itype = type->index; + const t_physical_tile_type_ptr type = device_ctx.grid.get_physical_type({i, j, layer_num}); + int itype = type->index; if (clear_all_block_types || unplaced_blk_types_index.count(itype)) { - place_ctx.grid_blocks.set_usage({i, j, layer_num}, 0); + grid_blocks.set_usage({i, j, layer_num}, 0); for (int k = 0; k < device_ctx.physical_tile_types[itype].capacity; k++) { - if (place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}) != INVALID_BLOCK_ID) { - place_ctx.grid_blocks.set_block_at_location({i, j, k, layer_num}, EMPTY_BLOCK_ID); + if (grid_blocks.block_at_location({i, j, k, layer_num}) != INVALID_BLOCK_ID) { + grid_blocks.set_block_at_location({i, j, k, layer_num}, EMPTY_BLOCK_ID); } } } @@ -1110,15 +1116,15 @@ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_b } /* Similarly, mark all blocks as not being placed yet. */ - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) { - auto blk_type = cluster_ctx.clb_nlist.block_type(blk_id)->index; + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { + int blk_type = cluster_ctx.clb_nlist.block_type(blk_id)->index; if (clear_all_block_types || unplaced_blk_types_index.count(blk_type)) { block_locs[blk_id].loc = t_pl_loc(); } } } -static void clear_all_grid_locs(vtr::vector_map& block_locs) { +static void clear_all_grid_locs(PlacerContext& placer_ctx) { auto& device_ctx = g_vpr_ctx.device(); std::unordered_set blk_types_to_be_cleared; @@ -1126,21 +1132,22 @@ static void clear_all_grid_locs(vtr::vector_map& bl // Insert all the logical block types into the set except the empty type // clear_block_type_grid_locs does not expect empty type to be among given types - for (const auto& logical_type : logical_block_types) { + for (const t_logical_block_type& logical_type : logical_block_types) { if (!is_empty_type(&logical_type)) { blk_types_to_be_cleared.insert(logical_type.index); } } - clear_block_type_grid_locs(blk_types_to_be_cleared, block_locs); + clear_block_type_grid_locs(blk_types_to_be_cleared, placer_ctx); } bool place_one_block(const ClusterBlockId blk_id, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores, - vtr::vector_map& block_locs) { - auto& place_ctx = g_vpr_ctx.placement(); + PlacerContext& placer_ctx) { + const std::vector& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& block_locs = placer_ctx.get_block_locs(); //Check if block has already been placed if (is_block_placed(blk_id, block_locs)) { @@ -1150,24 +1157,22 @@ bool place_one_block(const ClusterBlockId blk_id, bool placed_macro = false; //Lookup to see if the block is part of a macro - t_pl_macro pl_macro; int imacro; - get_imacro_from_iblk(&imacro, blk_id, place_ctx.pl_macros); + get_imacro_from_iblk(&imacro, blk_id, pl_macros); if (imacro != -1) { //If the block belongs to a macro, pass that macro to the placement routines VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tBelongs to a macro %d\n", imacro); - pl_macro = place_ctx.pl_macros[imacro]; - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, block_locs); + const t_pl_macro& pl_macro = pl_macros[imacro]; + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, placer_ctx); } else { //If it does not belong to a macro, create a macro with the one block and then pass to the placement routines //This is done so that the initial placement flow can be the same whether the block belongs to a macro or not t_pl_macro_member macro_member; - t_pl_offset block_offset(0, 0, 0, 0); - macro_member.blk_index = blk_id; - macro_member.offset = block_offset; + macro_member.offset = t_pl_offset(0, 0, 0, 0); + t_pl_macro pl_macro; pl_macro.members.push_back(macro_member); - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, block_locs); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, placer_ctx); } return placed_macro; @@ -1200,13 +1205,14 @@ static void alloc_and_load_movable_blocks(const vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { vtr::ScopedStartFinishTimer timer("Initial Placement"); + auto& block_locs = placer_ctx.get_mutable_block_locs(); /* Initialize the grid blocks to empty. * Initialize all the blocks to unplaced. */ - clear_all_grid_locs(block_locs); + clear_all_grid_locs(placer_ctx); /* Go through cluster blocks to calculate the tightest placement * floorplan constraint for each constrained block @@ -1223,7 +1229,7 @@ void initial_placement(const t_placer_opts& placer_opts, // read the constraint file and place fixed blocks if (strlen(constraints_file) != 0) { - read_constraints(constraints_file, block_locs); + read_constraints(constraints_file, placer_ctx); } if (noc_opts.noc) { @@ -1236,7 +1242,7 @@ void initial_placement(const t_placer_opts& placer_opts, vtr::vector block_scores = assign_block_scores(); //Place all blocks - place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, block_locs); + place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, placer_ctx); alloc_and_load_movable_blocks(block_locs); diff --git a/vpr/src/place/initial_placement.h b/vpr/src/place/initial_placement.h index 71c1bc1cdf7..1f39bb667e8 100644 --- a/vpr/src/place/initial_placement.h +++ b/vpr/src/place/initial_placement.h @@ -1,11 +1,15 @@ #ifndef VPR_INITIAL_PLACEMENT_H #define VPR_INITIAL_PLACEMENT_H -#include "vpr_types.h" + #include "place_macro.h" #include "partition_region.h" + +#include "vpr_types.h" #include "vtr_vector_map.h" +class PlacerContext; + /* The maximum number of tries when trying to place a macro at a * * random location before trying exhaustive placement - find the first * * legal position and place it during initial placement. */ @@ -61,7 +65,8 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); + /** * @brief Looks for a valid placement location for macro exhaustively once the maximum number of random locations have been tried. @@ -78,7 +83,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Places the macro if the head position passed in is legal, and all the resulting @@ -91,7 +96,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, */ bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Checks whether the block is already placed @@ -120,7 +125,7 @@ bool is_block_placed(ClusterBlockId blk_id, void initial_placement(const t_placer_opts& placer_opts, const char* constraints_file, const t_noc_opts& noc_opts, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Looks for a valid placement location for block. @@ -135,5 +140,5 @@ void initial_placement(const t_placer_opts& placer_opts, bool place_one_block(const ClusterBlockId blk_id, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); #endif diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index 030584085c6..07619eb1595 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -36,7 +36,7 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, //Moves the blocks in blocks_affected to their new locations void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& device_ctx = g_vpr_ctx.device(); //Swap the blocks, but don't swap the nets or update place_ctx.grid_blocks @@ -48,7 +48,7 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, const t_pl_loc& new_loc = blocks_affected.moved_blocks[iblk].new_loc; // move the block to its new location - block_locs[blk].loc = new_loc; + placer_ctx.get_mutable_block_locs()[blk].loc = new_loc; // get physical tile type of the old location t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); @@ -57,7 +57,7 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { - place_sync_external_block_connections(blk, block_locs); + place_sync_external_block_connections(blk, placer_ctx); } } } @@ -94,7 +94,7 @@ void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { //Moves the blocks in blocks_affected to their old locations void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { auto& device_ctx = g_vpr_ctx.device(); // Swap the blocks back, nets not yet swapped they don't need to be changed @@ -105,7 +105,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, const t_pl_loc& new_loc = blocks_affected.moved_blocks[iblk].new_loc; // return the block to where it was before the swap - block_locs[blk].loc = old_loc; + placer_ctx.get_mutable_block_locs()[blk].loc = old_loc; // get physical tile type of the old location t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); @@ -114,7 +114,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { - place_sync_external_block_connections(blk, block_locs); + place_sync_external_block_connections(blk, placer_ctx); } VTR_ASSERT_SAFE_MSG(g_vpr_ctx.placement().grid_blocks.block_at_location(old_loc) == blk, diff --git a/vpr/src/place/move_transactions.h b/vpr/src/place/move_transactions.h index c2216c59a9f..bdaf5992123 100644 --- a/vpr/src/place/move_transactions.h +++ b/vpr/src/place/move_transactions.h @@ -58,12 +58,12 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, const vtr::vector_map& block_locs); void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); void clear_move_blocks(t_pl_blocks_to_be_moved& blocks_affected); diff --git a/vpr/src/place/noc_place_checkpoint.cpp b/vpr/src/place/noc_place_checkpoint.cpp index 5f7d5ad4f49..b0330d79060 100644 --- a/vpr/src/place/noc_place_checkpoint.cpp +++ b/vpr/src/place/noc_place_checkpoint.cpp @@ -32,19 +32,20 @@ void NoCPlacementCheckpoint::save_checkpoint(double cost, const vtr::vector_map< } void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, - vtr::vector_map& block_locs) { + PlacerContext& placer_ctx) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& device_ctx = g_vpr_ctx.device(); - auto& place_ctx = g_vpr_ctx.mutable_placement(); + GridBlock& grid_blocks = placer_ctx.get_mutable_grid_blocks(); + const auto& block_locs = placer_ctx.get_block_locs(); // Get all physical routers const auto& noc_phy_routers = noc_ctx.noc_model.get_noc_routers(); // Clear all physical routers in placement - for (const auto& phy_router : noc_phy_routers) { - auto phy_loc = phy_router.get_router_physical_location(); + for (const NocRouter& phy_router : noc_phy_routers) { + t_physical_tile_loc phy_loc = phy_router.get_router_physical_location(); - place_ctx.grid_blocks.set_usage(phy_loc, 0); + grid_blocks.set_usage(phy_loc, 0); auto tile = device_ctx.grid.get_physical_type(phy_loc); for (const auto& sub_tile : tile->sub_tiles) { @@ -52,19 +53,16 @@ void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, for (int k = 0; k < capacity.total(); k++) { const t_pl_loc loc(phy_loc, k + capacity.low); - if (place_ctx.grid_blocks.block_at_location(loc) != INVALID_BLOCK_ID) { - place_ctx.grid_blocks.set_block_at_location(loc, EMPTY_BLOCK_ID); + if (grid_blocks.block_at_location(loc) != INVALID_BLOCK_ID) { + grid_blocks.set_block_at_location(loc, EMPTY_BLOCK_ID); } } } } // Place routers based on router_locations_ - for (const auto& router_loc : router_locations_) { - ClusterBlockId router_blk_id = router_loc.first; - t_pl_loc location = router_loc.second; - - set_block_location(router_blk_id, location, block_locs); + for (const auto& [router_blk_id, location] : router_locations_) { + set_block_location(router_blk_id, location, placer_ctx); } // Re-initialize routes and static variables that keep track of NoC-related costs diff --git a/vpr/src/place/noc_place_checkpoint.h b/vpr/src/place/noc_place_checkpoint.h index 698caafb240..35269804678 100644 --- a/vpr/src/place/noc_place_checkpoint.h +++ b/vpr/src/place/noc_place_checkpoint.h @@ -18,6 +18,8 @@ #include "vpr_types.h" #include "place_util.h" +class PlacerContext; + /** * @brief A NoC router placement checkpoint * @@ -46,7 +48,7 @@ class NoCPlacementCheckpoint { * @param costs: Used to load NoC related costs for the checkpoint */ void restore_checkpoint(t_placer_costs& costs, - vtr::vector_map& block_locs); + PlacerContext& placer_ctx); /** * @brief Indicates whether the object is empty or it has already stored a diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 24b08caf385..af5a775c954 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1805,10 +1805,9 @@ static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected) { * Invalidate all the timing graph edges associated with these connections via * the NetPinTimingInvalidator class. */ -static void invalidate_affected_connections( - const t_pl_blocks_to_be_moved& blocks_affected, - NetPinTimingInvalidator* pin_tedges_invalidator, - TimingInfo* timing_info) { +static void invalidate_affected_connections(const t_pl_blocks_to_be_moved& blocks_affected, + NetPinTimingInvalidator* pin_tedges_invalidator, + TimingInfo* timing_info) { VTR_ASSERT_SAFE(timing_info); VTR_ASSERT_SAFE(pin_tedges_invalidator); @@ -1830,14 +1829,16 @@ static void alloc_and_load_placement_structs(float place_cost_exp, const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.mutable_placement(); + place_ctx.lock_loc_vars(); + size_t num_nets = cluster_ctx.clb_nlist.nets().size(); const int num_layers = device_ctx.grid.get_num_layers(); - init_placement_context(); + init_placement_context(placer_ctx.get_mutable_block_locs(), place_ctx.get_mutable_grid_blocks()); int max_pins_per_clb = 0; - for (const auto& type : device_ctx.physical_tile_types) { + for (const t_physical_tile_type& type : device_ctx.physical_tile_types) { max_pins_per_clb = max(max_pins_per_clb, type.num_pins); } diff --git a/vpr/src/place/place_constraints.cpp b/vpr/src/place/place_constraints.cpp index f85640ea494..b491ee74838 100644 --- a/vpr/src/place/place_constraints.cpp +++ b/vpr/src/place/place_constraints.cpp @@ -161,10 +161,9 @@ void propagate_place_constraints() { auto& place_ctx = g_vpr_ctx.placement(); auto& floorplanning_ctx = g_vpr_ctx.mutable_floorplanning(); - for (auto pl_macro : place_ctx.pl_macros) { + for (const t_pl_macro& pl_macro : place_ctx.pl_macros) { if (is_macro_constrained(pl_macro)) { - /* - * Get the PartitionRegion for the head of the macro + /* Get the PartitionRegion for the head of the macro * based on the constraints of all blocks contained in the macro */ PartitionRegion macro_head_pr = update_macro_head_pr(pl_macro); @@ -472,7 +471,7 @@ int get_part_reg_size(const PartitionRegion& pr, const std::vector& regions = pr.get_regions(); int num_tiles = 0; - for (const auto& region : regions) { + for (const Region& region : regions) { num_tiles += grid_tiles.region_tile_count(region, block_type); } diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index c5c2ea0b943..145e6442bd0 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -17,16 +17,16 @@ */ static GridBlock init_grid_blocks(); -void init_placement_context() { - auto& place_ctx = g_vpr_ctx.mutable_placement(); +void init_placement_context(vtr::vector_map& block_locs, + GridBlock& grid_blocks) { auto& cluster_ctx = g_vpr_ctx.clustering(); /* Initialize the lookup of CLB block positions */ - place_ctx.block_locs.clear(); - place_ctx.block_locs.resize(cluster_ctx.clb_nlist.blocks().size()); + block_locs.clear(); + block_locs.resize(cluster_ctx.clb_nlist.blocks().size()); /* Initialize the reverse lookup of CLB block positions */ - place_ctx.grid_blocks = init_grid_blocks(); + grid_blocks = init_grid_blocks(); } static GridBlock init_grid_blocks() { @@ -44,6 +44,7 @@ static GridBlock init_grid_blocks() { } } } + return grid_blocks; } @@ -363,17 +364,19 @@ void alloc_and_load_legal_placement_locations(std::vector& block_locs) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); + PlacerContext& placer_ctx) { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& block_locs = placer_ctx.get_mutable_block_locs(); + auto& grid_blocks = placer_ctx.get_mutable_grid_blocks(); const std::string& block_name = cluster_ctx.clb_nlist.block_name(blk_id); //Check if block location is out of range of grid dimensions if (location.x < 0 || location.x > int(device_ctx.grid.width() - 1) || location.y < 0 || location.y > int(device_ctx.grid.height() - 1)) { - VPR_THROW(VPR_ERROR_PLACE, "Block %s with ID %d is out of range at location (%d, %d). \n", block_name.c_str(), blk_id, location.x, location.y); + VPR_THROW(VPR_ERROR_PLACE, "Block %s with ID %d is out of range at location (%d, %d). \n", + block_name.c_str(), blk_id, location.x, location.y); } //Set the location of the block @@ -397,11 +400,11 @@ void set_block_location(ClusterBlockId blk_id, } //Mark the grid location and usage of the block - place_ctx.grid_blocks.set_block_at_location(location, blk_id); - place_ctx.grid_blocks.set_usage({location.x, location.y, location.layer}, - place_ctx.grid_blocks.get_usage({location.x, location.y, location.layer}) + 1); + grid_blocks.set_block_at_location(location, blk_id); + grid_blocks.set_usage({location.x, location.y, location.layer}, + grid_blocks.get_usage({location.x, location.y, location.layer}) + 1); - place_sync_external_block_connections(blk_id, block_locs); + place_sync_external_block_connections(blk_id, placer_ctx); } bool macro_can_be_placed(t_pl_macro pl_macro, t_pl_loc head_pos, bool check_all_legality) { diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index a05a17d352c..dc8f9cdadd9 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -6,12 +6,16 @@ #ifndef PLACE_UTIL_H #define PLACE_UTIL_H + #include + #include "vpr_types.h" #include "vtr_util.h" #include "vtr_vector_map.h" #include "globals.h" +#include "placer_context.h" + // forward declaration of t_placer_costs so that it can be used an argument // in NocCostTerms constructor class t_placer_costs; @@ -303,7 +307,8 @@ class t_placer_statistics { * * Initialize both of them to empty states. */ -void init_placement_context(); +void init_placement_context(vtr::vector_map& block_locs, + GridBlock& grid_blocks); /** * @brief Get the initial limit for inner loop block move attempt limit. @@ -352,7 +357,7 @@ void alloc_and_load_legal_placement_locations(std::vector& block_locs); + PlacerContext& placer_ctx); /// @brief check if a specified location is within the device grid inline bool is_loc_on_chip(t_physical_tile_loc loc) { diff --git a/vpr/src/place/placer_context.h b/vpr/src/place/placer_context.h index 8142f723526..e2a309e726e 100644 --- a/vpr/src/place/placer_context.h +++ b/vpr/src/place/placer_context.h @@ -140,14 +140,14 @@ class PlacerContext : public Context { const PlacerMoveContext& move() const { return move_; } PlacerMoveContext& mutable_move() { return move_; } - const vtr::vector_map& get_block_locs() const { return block_locs; } - vtr::vector_map& get_mutable_block_locs() { return block_locs; } + const vtr::vector_map& get_block_locs() const { return block_locs_; } + vtr::vector_map& get_mutable_block_locs() { return block_locs_; } - const GridBlock& get_grid_blocks() const { return grid_blocks; } - GridBlock& get_mutable_grid_blocks() { return grid_blocks; } + const GridBlock& get_grid_blocks() const { return grid_blocks_; } + GridBlock& get_mutable_grid_blocks() { return grid_blocks_; } - const vtr::vector_map& get_physical_pins() const { return physical_pins; } - vtr::vector_map& get_mutable_physical_pins() { return physical_pins; } + const vtr::vector_map& physical_pins() const { return physical_pins_; } + vtr::vector_map& mutable_physical_pins() { return physical_pins_; } private: PlacerTimingContext timing_; @@ -155,11 +155,11 @@ class PlacerContext : public Context { PlacerMoveContext move_; ///@brief Clustered block placement locations - vtr::vector_map block_locs; + vtr::vector_map block_locs_; ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) - GridBlock grid_blocks; + GridBlock grid_blocks_; ///@brief Clustered pin placement mapping with physical pin - vtr::vector_map physical_pins; + vtr::vector_map physical_pins_; }; diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 95998578dba..9f25f377c69 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -18,6 +18,7 @@ #include "device_grid.h" #include "user_route_constraints.h" #include "re_cluster_util.h" +#include "placer_context.h" /* This module contains subroutines that are used in several unrelated parts * * of VPR. They are VPR-specific utility routines. */ @@ -2105,10 +2106,10 @@ void print_switch_usage() { */ void place_sync_external_block_connections(ClusterBlockId iblk, - const vtr::vector_map& block_locs) { + const vtr::vector_map& block_locs, + vtr::vector_map& physical_pins) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; - auto& place_ctx = g_vpr_ctx.mutable_placement(); t_pl_loc block_loc = block_locs[iblk].loc; @@ -2131,11 +2132,11 @@ void place_sync_external_block_connections(ClusterBlockId iblk, int new_physical_pin_index = sub_tile.sub_tile_to_tile_pin_indices[sub_tile_pin_index + rel_capacity * max_num_block_pins]; - auto result = place_ctx.physical_pins.find(pin); - if (result != place_ctx.physical_pins.end()) { - place_ctx.physical_pins[pin] = new_physical_pin_index; + auto result = physical_pins.find(pin); + if (result != physical_pins.end()) { + physical_pins[pin] = new_physical_pin_index; } else { - place_ctx.physical_pins.insert(pin, new_physical_pin_index); + physical_pins.insert(pin, new_physical_pin_index); } } } diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index 7b31049ff6e..5da1da74deb 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -5,17 +5,18 @@ #include #include "vpr_types.h" +#include "vtr_vector.h" + #include "atom_netlist.h" #include "clustered_netlist.h" #include "netlist.h" -#include "vtr_vector.h" - #include "arch_util.h" #include "physical_types_util.h" #include "rr_graph_utils.h" #include "vpr_constraints.h" class DeviceGrid; +class PlacerContext; const t_model* find_model(const t_model* models, const std::string& name, bool required = true); const t_model_ports* find_model_port(const t_model* model, const std::string& name, bool required = true); @@ -242,7 +243,8 @@ AtomBlockId find_memory_sibling(const t_pb* pb); * It does not check for overuse of locations, therefore it can be used with placements that have resource overuse. */ void place_sync_external_block_connections(ClusterBlockId iblk, - const vtr::vector_map& block_locs); + const vtr::vector_map& block_locs, + vtr::vector_map& physical_pins); //Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index); From 1a4f52a9755cf3165a0049830b562059d77380b4 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 16:28:30 -0400 Subject: [PATCH 035/146] add PlaceLocVars --- vpr/src/base/place_and_route.cpp | 12 +-- vpr/src/base/read_place.cpp | 16 ++-- vpr/src/base/read_place.h | 4 +- vpr/src/base/vpr_api.cpp | 4 +- vpr/src/base/vpr_context.h | 15 ++-- vpr/src/base/vpr_types.h | 6 +- vpr/src/pack/re_cluster_util.cpp | 2 +- vpr/src/place/initial_noc_placement.cpp | 36 ++++---- vpr/src/place/initial_noc_placment.h | 4 +- vpr/src/place/initial_placement.cpp | 106 ++++++++++++------------ vpr/src/place/initial_placement.h | 12 ++- vpr/src/place/move_transactions.cpp | 12 +-- vpr/src/place/move_transactions.h | 4 +- vpr/src/place/noc_place_checkpoint.cpp | 8 +- vpr/src/place/noc_place_checkpoint.h | 4 +- vpr/src/place/place.cpp | 16 ++-- vpr/src/place/place_constraints.cpp | 6 +- vpr/src/place/place_constraints.h | 2 +- vpr/src/place/place_util.cpp | 8 +- vpr/src/place/place_util.h | 2 +- vpr/src/place/placer_context.h | 38 ++++----- vpr/src/util/vpr_utils.cpp | 9 +- vpr/src/util/vpr_utils.h | 3 +- 23 files changed, 162 insertions(+), 167 deletions(-) diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 7d7f391f526..2e74c454302 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -557,7 +557,7 @@ static float comp_width(t_chan* chan, float x, float separation) { break; } - return (val); + return val; } /** @@ -574,11 +574,11 @@ static float comp_width(t_chan* chan, float x, float separation) { */ void post_place_sync() { /* Go through each block */ - auto& cluster_ctx = g_vpr_ctx.clustering(); - const auto& block_locs = g_vpr_ctx.placement().get_block_locs(); - auto& physical_pins = g_vpr_ctx.mutable_placement().mutable_physical_pins(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + auto& place_loc_vars = g_vpr_ctx.mutable_placement().mutable_place_loc_vars(); + // Cluster-based netlist is used for placement - for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id, block_locs, physical_pins); + for (const ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { + place_sync_external_block_connections(block_id, place_loc_vars); } } diff --git a/vpr/src/base/read_place.cpp b/vpr/src/base/read_place.cpp index db2f6918600..3b6915b7150 100644 --- a/vpr/src/base/read_place.cpp +++ b/vpr/src/base/read_place.cpp @@ -25,13 +25,13 @@ static void read_place_header(std::ifstream& placement_file, const DeviceGrid& grid); static std::string read_place_body(std::ifstream& placement_file, - PlacerContext& placer_ctx, + PlaceLocVars& place_loc_vars, const char* place_file, bool is_place_file); std::string read_place(const char* net_file, const char* place_file, - PlacerContext& placer_ctx, + PlaceLocVars& place_loc_vars, bool verify_file_digests, const DeviceGrid& grid) { std::ifstream fstream(place_file); @@ -47,7 +47,7 @@ std::string read_place(const char* net_file, VTR_LOG("\n"); read_place_header(fstream, net_file, place_file, verify_file_digests, grid); - std::string placement_id = read_place_body(fstream, placer_ctx, place_file, is_place_file); + std::string placement_id = read_place_body(fstream, place_loc_vars, place_file, is_place_file); VTR_LOG("Successfully read %s.\n", place_file); VTR_LOG("\n"); @@ -56,7 +56,7 @@ std::string read_place(const char* net_file, } void read_constraints(const char* constraints_file, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { std::ifstream fstream(constraints_file); if (!fstream) { VPR_FATAL_ERROR(VPR_ERROR_PLACE_F, @@ -69,7 +69,7 @@ void read_constraints(const char* constraints_file, VTR_LOG("Reading %s.\n", constraints_file); VTR_LOG("\n"); - read_place_body(fstream, placer_ctx, constraints_file, is_place_file); + read_place_body(fstream, place_loc_vars, constraints_file, is_place_file); VTR_LOG("Successfully read constraints file %s.\n", constraints_file); VTR_LOG("\n"); @@ -209,12 +209,12 @@ static void read_place_header(std::ifstream& placement_file, * or a constraints file (is_place_file = false). */ static std::string read_place_body(std::ifstream& placement_file, - PlacerContext& placer_ctx, + PlaceLocVars& place_loc_vars, const char* place_file, bool is_place_file) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& atom_ctx = g_vpr_ctx.atom(); - auto& block_locs = placer_ctx.get_mutable_block_locs(); + auto& block_locs = place_loc_vars.mutable_block_locs(); std::string line; int lineno = 0; @@ -309,7 +309,7 @@ static std::string read_place_body(std::ifstream& placement_file, loc.layer = block_layer; if (seen_blocks[blk_id] == 0) { - set_block_location(blk_id, loc, placer_ctx); + set_block_location(blk_id, loc, place_loc_vars); } //need to lock down blocks if it is a constraints file diff --git a/vpr/src/base/read_place.h b/vpr/src/base/read_place.h index a6a9e56d84c..0312bb058cc 100644 --- a/vpr/src/base/read_place.h +++ b/vpr/src/base/read_place.h @@ -10,7 +10,7 @@ class PlacerContext; */ std::string read_place(const char* net_file, const char* place_file, - PlacerContext& placer_ctx, + PlaceLocVars& place_loc_vars, bool verify_file_hashes, const DeviceGrid& grid); @@ -18,7 +18,7 @@ std::string read_place(const char* net_file, * This function is used to read a constraints file that specifies the desired locations of blocks. */ void read_constraints(const char* constraints_file, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * This function prints out a place file. diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index bf0e9392f4d..064df21ee27 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -838,7 +838,7 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { //Load an existing placement from a file place_ctx.placement_id = read_place(filename_opts.NetFile.c_str(), filename_opts.PlaceFile.c_str(), - place_ctx.get_mutable_block_locs(), + place_ctx.mutable_place_loc_vars(), filename_opts.verify_file_digests, device_ctx.grid); //Ensure placement macros are loaded so that they can be drawn after placement (e.g. during routing) @@ -863,7 +863,7 @@ RouteStatus vpr_route_flow(const Netlist<>& net_list, route_status = RouteStatus(true, -1); } else { //Do or load - // set the net_is_ignored flag for nets that that have route_model set to ideal in route constraints + // set the net_is_ignored flag for nets that have route_model set to ideal in route constraints apply_route_constraints(g_vpr_ctx.routing().constraints); int chan_width = router_opts.fixed_channel_width; diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 1c4fda0f158..8fea4fbe08d 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -385,6 +385,7 @@ struct PackingMultithreadingContext : public Context { struct PlacementContext : public Context { private: bool loc_vars_are_accessible_ = true; + PlaceLocVars place_loc_vars_; public: @@ -394,11 +395,15 @@ struct PlacementContext : public Context { ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) GridBlock grid_blocks; - const vtr::vector_map& get_block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } - vtr::vector_map& get_mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return block_locs; } - const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } - GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return grid_blocks; } - vtr::vector_map& mutable_physical_pins() { VTR_ASSERT(loc_vars_are_accessible_); return physical_pins; } + const vtr::vector_map& get_block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.block_locs(); } + vtr::vector_map& get_mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_block_locs(); } + const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.grid_blocks(); } + GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_grid_blocks(); } + vtr::vector_map& mutable_physical_pins() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_physical_pins(); } +// const vtr::vector_map& physical_pins() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.physical_pins(); } + PlaceLocVars& mutable_place_loc_vars() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } + const PlaceLocVars& place_loc_vars() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } + void lock_loc_vars() { loc_vars_are_accessible_ = false; } void unlock_loc_vars() { loc_vars_are_accessible_ = true; } diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index 4ba5940a9b9..cddbdbfd343 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -916,11 +916,11 @@ class PlaceLocVars { inline const vtr::vector_map& block_locs() const { return block_locs_; } inline vtr::vector_map& mutable_block_locs() { return block_locs_; } - inline const GridBlock& mutable_grid_blocks() const { return grid_blocks_; } + inline const GridBlock& grid_blocks() const { return grid_blocks_; } inline GridBlock& mutable_grid_blocks() { return grid_blocks_; } - inline const vtr::vector_map& mutable_physical_pins() const { return physical_pins_; } - inline vtr::vector_map& physical_pins() { return physical_pins_; } + inline const vtr::vector_map& physical_pins() const { return physical_pins_; } + inline vtr::vector_map& mutable_physical_pins() { return physical_pins_; } }; diff --git a/vpr/src/pack/re_cluster_util.cpp b/vpr/src/pack/re_cluster_util.cpp index 793bf216824..1aed4e4ae4a 100644 --- a/vpr/src/pack/re_cluster_util.cpp +++ b/vpr/src/pack/re_cluster_util.cpp @@ -85,7 +85,7 @@ void commit_mol_move(ClusterBlockId old_clb, g_vpr_ctx.mutable_placement().get_mutable_block_locs().resize(g_vpr_ctx.placement().get_block_locs().size() + 1); get_imacro_from_iblk(&imacro, old_clb, g_vpr_ctx.placement().pl_macros); set_imacro_for_iblk(&imacro, new_clb); - place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr, g_vpr_ctx.mutable_placement().get_mutable_block_locs()); + place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr, g_vpr_ctx.mutable_placement().mutable_place_loc_vars()); } } diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 638930f9afc..011975bb5fd 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -33,7 +33,7 @@ static bool accept_noc_swap(double delta_cost, double prob); * @param router_blk_id NoC router cluster block ID */ static void place_constrained_noc_router(ClusterBlockId router_blk_id, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Randomly places unconstrained NoC routers. @@ -44,7 +44,7 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, */ static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Runs a simulated annealing optimizer for NoC routers. @@ -52,7 +52,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout * @param noc_opts Contains weighting factors for NoC cost terms. */ static void noc_routers_anneal(const t_noc_opts& noc_opts, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); static bool accept_noc_swap(double delta_cost, double prob) { if (delta_cost <= 0.0) { @@ -72,7 +72,7 @@ static bool accept_noc_swap(double delta_cost, double prob) { } static void place_constrained_noc_router(ClusterBlockId router_blk_id, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& floorplanning_ctx = g_vpr_ctx.floorplanning(); @@ -88,11 +88,11 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, bool macro_placed = false; for (int i_try = 0; i_try < MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY && !macro_placed; i_try++) { - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE, placer_ctx); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE, place_loc_vars); } if (!macro_placed) { - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE, placer_ctx); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE, place_loc_vars); } if (!macro_placed) { @@ -102,7 +102,7 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { auto& place_ctx = g_vpr_ctx.placement(); auto& noc_ctx = g_vpr_ctx.noc(); auto& cluster_ctx = g_vpr_ctx.clustering(); @@ -159,7 +159,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout t_pl_macro pl_macro; pl_macro.members.push_back(macro_member); - bool legal = try_place_macro(pl_macro, loc, placer_ctx); + bool legal = try_place_macro(pl_macro, loc, place_loc_vars); if (!legal) { VPR_FATAL_ERROR(VPR_ERROR_PLACE, "Could not place a router cluster into an empty physical router."); } @@ -173,9 +173,9 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout } static void noc_routers_anneal(const t_noc_opts& noc_opts, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { auto& noc_ctx = g_vpr_ctx.noc(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = place_loc_vars.block_locs(); // Only NoC related costs are considered t_placer_costs costs; @@ -233,7 +233,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, block_locs); if (create_move_outcome != e_create_move::ABORT) { - apply_move_blocks(blocks_affected, placer_ctx); + apply_move_blocks(blocks_affected, place_loc_vars); NocCostTerms noc_delta_c; find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, block_locs); @@ -252,23 +252,23 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, checkpoint.save_checkpoint(costs.cost, block_locs); } } else { // The proposed move is rejected - revert_move_blocks(blocks_affected, placer_ctx); + revert_move_blocks(blocks_affected, place_loc_vars); revert_noc_traffic_flow_routes(blocks_affected, block_locs); } } } if (checkpoint.get_cost() < costs.cost) { - checkpoint.restore_checkpoint(costs, placer_ctx); + checkpoint.restore_checkpoint(costs, place_loc_vars); } } void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { vtr::ScopedStartFinishTimer timer("Initial NoC Placement"); auto& noc_ctx = g_vpr_ctx.noc(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = place_loc_vars.block_locs(); // Get all the router clusters const std::vector& router_blk_ids = noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist(); @@ -283,20 +283,20 @@ void initial_noc_placement(const t_noc_opts& noc_opts, } if (is_cluster_constrained(router_blk_id)) { - place_constrained_noc_router(router_blk_id, placer_ctx); + place_constrained_noc_router(router_blk_id, place_loc_vars); } else { unfixed_routers.push_back(router_blk_id); } } // Place unconstrained NoC routers randomly - place_noc_routers_randomly(unfixed_routers, placer_opts.seed, placer_ctx); + place_noc_routers_randomly(unfixed_routers, placer_opts.seed, place_loc_vars); // populate internal data structures to maintain route, bandwidth usage, and latencies initial_noc_routing({}, block_locs); // Run the simulated annealing optimizer for NoC routers - noc_routers_anneal(noc_opts, placer_ctx); + noc_routers_anneal(noc_opts, place_loc_vars); // check if there is any cycles bool has_cycle = noc_routing_has_cycle(block_locs); diff --git a/vpr/src/place/initial_noc_placment.h b/vpr/src/place/initial_noc_placment.h index 0cb6b4d4095..ddd277d101e 100644 --- a/vpr/src/place/initial_noc_placment.h +++ b/vpr/src/place/initial_noc_placment.h @@ -5,8 +5,6 @@ #include "vpr_types.h" #include "vtr_vector_map.h" -class PlacerContext; - /** * @brief Randomly places NoC routers, then runs a quick simulated annealing * to minimize NoC costs. @@ -15,6 +13,6 @@ class PlacerContext; */ void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); #endif //VTR_INITIAL_NOC_PLACMENT_H diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 22e36564d67..dacffe6f700 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -13,7 +13,6 @@ #include "move_utils.h" #include "region.h" #include "directed_moves_util.h" -#include "placer_context.h" #include "echo_files.h" @@ -41,13 +40,13 @@ static constexpr int SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR = 100; * */ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Initializes the grid to empty. It also initialized the location for * all blocks to unplaced. */ -static void clear_all_grid_locs(PlacerContext& placer_ctx); +static void clear_all_grid_locs(PlaceLocVars& place_loc_avrs); /** * @brief Control routine for placing a macro. @@ -72,7 +71,7 @@ static bool place_macro(int macros_max_num_tries, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector& block_scores, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_avrs); /* * Assign scores to each block based on macro size and floorplanning constraints. @@ -90,7 +89,8 @@ static vtr::vector assign_block_scores(); * * @return y coordinate of the location that macro head should be placed */ -static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, const t_pl_macro& pl_macro); +static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, + const t_pl_macro& pl_macro); /** * @brief Tries to get the first available location of a specific block type that can accommodate macro blocks @@ -192,7 +192,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, vtr::vector& block_scores, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_avrs); /** * @brief Looks for a valid placement location for macro in second iteration, tries to place as many macros as possible in one column @@ -212,7 +212,7 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_avrs); /** * @brief Tries for MAX_INIT_PLACE_ATTEMPTS times to place all blocks considering their floorplanning constraints and the device size @@ -224,7 +224,7 @@ static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, const char* constraints_file, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_avrs); /** * @brief If any blocks remain unplaced after all initial placement iterations, this routine @@ -473,8 +473,8 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, vtr::vector& block_scores, - PlacerContext& placer_ctx) { - auto& block_locs = placer_ctx.get_mutable_block_locs(); + PlaceLocVars& place_loc_vars) { + auto& block_locs = place_loc_vars.mutable_block_locs(); t_pl_loc centroid_loc(OPEN, OPEN, OPEN, OPEN); std::vector unplaced_blocks_to_update_their_score; @@ -516,7 +516,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - bool legal = try_place_macro(pl_macro, centroid_loc, placer_ctx); + bool legal = try_place_macro(pl_macro, centroid_loc, place_loc_vars); if (legal) { fix_IO_block_types(pl_macro, centroid_loc, pad_loc_type, block_locs); @@ -532,10 +532,8 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, static int get_y_loc_based_on_macro_direction(t_grid_empty_locs_block_type first_macro_loc, const t_pl_macro& pl_macro) { int y = first_macro_loc.first_avail_loc.y; - /* - * if the macro member offset is positive, it means that macro head should be placed at the first location of first_macro_loc. + /* if the macro member offset is positive, it means that macro head should be placed at the first location of first_macro_loc. * otherwise, macro head should be placed at the last available location to ensure macro_can_be_placed can check macro location correctly. - * */ if (pl_macro.members.size() > 1) { if (pl_macro.members.at(1).offset.y < 0) { @@ -637,7 +635,7 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; /* @@ -700,10 +698,10 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - legal = try_place_macro(pl_macro, loc, placer_ctx); + legal = try_place_macro(pl_macro, loc, place_loc_vars); if (legal) { - auto& block_locs = placer_ctx.get_mutable_block_locs(); + auto& block_locs = place_loc_vars.mutable_block_locs(); fix_IO_block_types(pl_macro, loc, pad_loc_type, block_locs); } @@ -714,10 +712,10 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; - auto& block_locs = placer_ctx.get_mutable_block_locs(); - const GridBlock& grid_blocks = placer_ctx.get_grid_blocks(); + auto& block_locs = place_loc_vars.mutable_block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); const std::vector& regions = pr.get_regions(); @@ -764,7 +762,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, to_loc.sub_tile = subtile; if (grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { - placed = try_place_macro(pl_macro, to_loc, placer_ctx); + placed = try_place_macro(pl_macro, to_loc, place_loc_vars); if (placed) { fix_IO_block_types(pl_macro, to_loc, pad_loc_type, block_locs); @@ -779,7 +777,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, for (int st = st_low; st <= st_high && !placed; st++) { to_loc.sub_tile = st; if (grid_blocks.block_at_location(to_loc) == EMPTY_BLOCK_ID) { - placed = try_place_macro(pl_macro, to_loc, placer_ctx); + placed = try_place_macro(pl_macro, to_loc, place_loc_vars); if (placed) { fix_IO_block_types(pl_macro, to_loc, pad_loc_type, block_locs); } @@ -805,7 +803,7 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { t_pl_loc loc; int column_index = get_blk_type_first_loc(loc, pl_macro, blk_types_empty_locs_in_grid); @@ -821,10 +819,10 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, VTR_ASSERT(width_offset == 0); VTR_ASSERT(height_offset == 0); - bool legal = try_place_macro(pl_macro, loc, placer_ctx); + bool legal = try_place_macro(pl_macro, loc, place_loc_vars); if (legal) { - auto& block_locs = placer_ctx.get_mutable_block_locs(); + auto& block_locs = place_loc_vars.mutable_block_locs(); fix_IO_block_types(pl_macro, loc, pad_loc_type, block_locs); } @@ -836,9 +834,9 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { bool f_placer_debug = g_vpr_ctx.placement().f_placer_debug; - const GridBlock& grid_blocks = placer_ctx.get_grid_blocks(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); VTR_LOGV_DEBUG(f_placer_debug, "\t\t\t\tTry to place the macro at %dx%dx%dx%d\n", head_pos.x, @@ -862,7 +860,7 @@ bool try_place_macro(const t_pl_macro& pl_macro, for (const t_pl_macro_member& pl_macro_member : pl_macro.members) { t_pl_loc member_pos = head_pos + pl_macro_member.offset; ClusterBlockId iblk = pl_macro_member.blk_index; - set_block_location(iblk, member_pos, placer_ctx); + set_block_location(iblk, member_pos, place_loc_vars); } // Finish placing all the members in the macro } @@ -874,8 +872,8 @@ static bool place_macro(int macros_max_num_tries, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector& block_scores, - PlacerContext& placer_ctx) { - const auto& block_locs = placer_ctx.get_block_locs(); + PlaceLocVars& place_loc_vars) { + const auto& block_locs = place_loc_vars.block_locs(); ClusterBlockId blk_id = pl_macro.members[0].blk_index; VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tHead of the macro is Block %d\n", size_t(blk_id)); @@ -903,18 +901,18 @@ static bool place_macro(int macros_max_num_tries, //We need to place densely in second iteration to be able to find a legal initial placement solution if (blk_types_empty_locs_in_grid != nullptr && !blk_types_empty_locs_in_grid->empty()) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry dense placement\n"); - macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, placer_ctx); + macro_placed = try_dense_placement(pl_macro, pr, block_type, pad_loc_type, blk_types_empty_locs_in_grid, place_loc_vars); } if (!macro_placed) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry centroid placement\n"); - macro_placed = try_centroid_placement(pl_macro, pr, block_type, pad_loc_type, block_scores, placer_ctx); + macro_placed = try_centroid_placement(pl_macro, pr, block_type, pad_loc_type, block_scores, place_loc_vars); } VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tMacro is placed: %d\n", macro_placed); // If macro is not placed yet, try to place the macro randomly for the max number of random tries for (int itry = 0; itry < macros_max_num_tries && !macro_placed; itry++) { VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry random place iter: %d\n", itry); - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, pad_loc_type, placer_ctx); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, pad_loc_type, place_loc_vars); } // Finished all tries if (!macro_placed) { @@ -926,7 +924,7 @@ static bool place_macro(int macros_max_num_tries, // Exhaustive placement of carry macros VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\t\tTry exhaustive placement\n"); - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, pad_loc_type, placer_ctx); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, pad_loc_type, place_loc_vars); } return macro_placed; } @@ -981,7 +979,7 @@ static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, const char* constraints_file, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_avrs) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); @@ -1004,12 +1002,12 @@ static void place_all_blocks(const t_placer_opts& placer_opts, for (auto iter_no = 0; iter_no < MAX_INIT_PLACE_ATTEMPTS; iter_no++) { //clear grid for a new placement iteration - clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, placer_ctx); + clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, place_loc_avrs); unplaced_blk_type_in_curr_itr.clear(); // read the constraint file if the user has provided one and this is not the first attempt if (strlen(constraints_file) != 0 && iter_no != 0) { - read_constraints(constraints_file, placer_ctx); + read_constraints(constraints_file, place_loc_avrs); } //resize the vector to store unplaced block types empty locations @@ -1041,7 +1039,7 @@ static void place_all_blocks(const t_placer_opts& placer_opts, blocks_placed_since_heap_update++; - bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, placer_ctx); + bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, place_loc_avrs); //update heap based on update_heap_freq calculated above if (blocks_placed_since_heap_update % (update_heap_freq) == 0) { @@ -1079,11 +1077,11 @@ static void place_all_blocks(const t_placer_opts& placer_opts, } static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& grid_blocks = placer_ctx.get_mutable_grid_blocks(); - auto& block_locs = placer_ctx.get_mutable_block_locs(); + auto& grid_blocks = place_loc_vars.mutable_grid_blocks(); + auto& block_locs = place_loc_vars.mutable_block_locs(); bool clear_all_block_types = false; @@ -1124,7 +1122,7 @@ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_b } } -static void clear_all_grid_locs(PlacerContext& placer_ctx) { +static void clear_all_grid_locs(PlaceLocVars& place_loc_vars) { auto& device_ctx = g_vpr_ctx.device(); std::unordered_set blk_types_to_be_cleared; @@ -1138,16 +1136,16 @@ static void clear_all_grid_locs(PlacerContext& placer_ctx) { } } - clear_block_type_grid_locs(blk_types_to_be_cleared, placer_ctx); + clear_block_type_grid_locs(blk_types_to_be_cleared, place_loc_vars); } bool place_one_block(const ClusterBlockId blk_id, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { const std::vector& pl_macros = g_vpr_ctx.placement().pl_macros; - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = place_loc_vars.block_locs(); //Check if block has already been placed if (is_block_placed(blk_id, block_locs)) { @@ -1163,7 +1161,7 @@ bool place_one_block(const ClusterBlockId blk_id, if (imacro != -1) { //If the block belongs to a macro, pass that macro to the placement routines VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\tBelongs to a macro %d\n", imacro); const t_pl_macro& pl_macro = pl_macros[imacro]; - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, placer_ctx); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, place_loc_vars); } else { //If it does not belong to a macro, create a macro with the one block and then pass to the placement routines //This is done so that the initial placement flow can be the same whether the block belongs to a macro or not @@ -1172,7 +1170,7 @@ bool place_one_block(const ClusterBlockId blk_id, macro_member.offset = t_pl_offset(0, 0, 0, 0); t_pl_macro pl_macro; pl_macro.members.push_back(macro_member); - placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, placer_ctx); + placed_macro = place_macro(MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY, pl_macro, pad_loc_type, blk_types_empty_locs_in_grid, *block_scores, place_loc_vars); } return placed_macro; @@ -1205,14 +1203,14 @@ static void alloc_and_load_movable_blocks(const vtr::vector_map block_scores = assign_block_scores(); //Place all blocks - place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, placer_ctx); + place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, place_loc_avrs); alloc_and_load_movable_blocks(block_locs); diff --git a/vpr/src/place/initial_placement.h b/vpr/src/place/initial_placement.h index 1f39bb667e8..f2dd0b74c98 100644 --- a/vpr/src/place/initial_placement.h +++ b/vpr/src/place/initial_placement.h @@ -8,8 +8,6 @@ #include "vpr_types.h" #include "vtr_vector_map.h" -class PlacerContext; - /* The maximum number of tries when trying to place a macro at a * * random location before trying exhaustive placement - find the first * * legal position and place it during initial placement. */ @@ -65,7 +63,7 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** @@ -83,7 +81,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, enum e_pad_loc_type pad_loc_type, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Places the macro if the head position passed in is legal, and all the resulting @@ -96,7 +94,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, */ bool try_place_macro(const t_pl_macro& pl_macro, t_pl_loc head_pos, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Checks whether the block is already placed @@ -125,7 +123,7 @@ bool is_block_placed(ClusterBlockId blk_id, void initial_placement(const t_placer_opts& placer_opts, const char* constraints_file, const t_noc_opts& noc_opts, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Looks for a valid placement location for block. @@ -140,5 +138,5 @@ void initial_placement(const t_placer_opts& placer_opts, bool place_one_block(const ClusterBlockId blk_id, enum e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); #endif diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index 07619eb1595..690290aea4e 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -36,7 +36,7 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, //Moves the blocks in blocks_affected to their new locations void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { auto& device_ctx = g_vpr_ctx.device(); //Swap the blocks, but don't swap the nets or update place_ctx.grid_blocks @@ -48,7 +48,7 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, const t_pl_loc& new_loc = blocks_affected.moved_blocks[iblk].new_loc; // move the block to its new location - placer_ctx.get_mutable_block_locs()[blk].loc = new_loc; + place_loc_vars.mutable_block_locs()[blk].loc = new_loc; // get physical tile type of the old location t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); @@ -57,7 +57,7 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { - place_sync_external_block_connections(blk, placer_ctx); + place_sync_external_block_connections(blk, place_loc_vars); } } } @@ -94,7 +94,7 @@ void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { //Moves the blocks in blocks_affected to their old locations void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { auto& device_ctx = g_vpr_ctx.device(); // Swap the blocks back, nets not yet swapped they don't need to be changed @@ -105,7 +105,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, const t_pl_loc& new_loc = blocks_affected.moved_blocks[iblk].new_loc; // return the block to where it was before the swap - placer_ctx.get_mutable_block_locs()[blk].loc = old_loc; + place_loc_vars.mutable_block_locs()[blk].loc = old_loc; // get physical tile type of the old location t_physical_tile_type_ptr old_type = device_ctx.grid.get_physical_type({old_loc.x,old_loc.y,old_loc.layer}); @@ -114,7 +114,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //if physical tile type of old location does not equal physical tile type of new location, sync the new physical pins if (old_type != new_type) { - place_sync_external_block_connections(blk, placer_ctx); + place_sync_external_block_connections(blk, place_loc_vars); } VTR_ASSERT_SAFE_MSG(g_vpr_ctx.placement().grid_blocks.block_at_location(old_loc) == blk, diff --git a/vpr/src/place/move_transactions.h b/vpr/src/place/move_transactions.h index bdaf5992123..88c40d0bc45 100644 --- a/vpr/src/place/move_transactions.h +++ b/vpr/src/place/move_transactions.h @@ -58,12 +58,12 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, const vtr::vector_map& block_locs); void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); void clear_move_blocks(t_pl_blocks_to_be_moved& blocks_affected); diff --git a/vpr/src/place/noc_place_checkpoint.cpp b/vpr/src/place/noc_place_checkpoint.cpp index b0330d79060..6bd6c7af38c 100644 --- a/vpr/src/place/noc_place_checkpoint.cpp +++ b/vpr/src/place/noc_place_checkpoint.cpp @@ -32,11 +32,11 @@ void NoCPlacementCheckpoint::save_checkpoint(double cost, const vtr::vector_map< } void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, - PlacerContext& placer_ctx) { + PlaceLocVars& place_loc_vars) { const auto& noc_ctx = g_vpr_ctx.noc(); const auto& device_ctx = g_vpr_ctx.device(); - GridBlock& grid_blocks = placer_ctx.get_mutable_grid_blocks(); - const auto& block_locs = placer_ctx.get_block_locs(); + GridBlock& grid_blocks = place_loc_vars.mutable_grid_blocks(); + const auto& block_locs = place_loc_vars.block_locs(); // Get all physical routers const auto& noc_phy_routers = noc_ctx.noc_model.get_noc_routers(); @@ -62,7 +62,7 @@ void NoCPlacementCheckpoint::restore_checkpoint(t_placer_costs& costs, // Place routers based on router_locations_ for (const auto& [router_blk_id, location] : router_locations_) { - set_block_location(router_blk_id, location, placer_ctx); + set_block_location(router_blk_id, location, place_loc_vars); } // Re-initialize routes and static variables that keep track of NoC-related costs diff --git a/vpr/src/place/noc_place_checkpoint.h b/vpr/src/place/noc_place_checkpoint.h index 35269804678..bfc15242cd6 100644 --- a/vpr/src/place/noc_place_checkpoint.h +++ b/vpr/src/place/noc_place_checkpoint.h @@ -18,8 +18,6 @@ #include "vpr_types.h" #include "place_util.h" -class PlacerContext; - /** * @brief A NoC router placement checkpoint * @@ -48,7 +46,7 @@ class NoCPlacementCheckpoint { * @param costs: Used to load NoC related costs for the checkpoint */ void restore_checkpoint(t_placer_costs& costs, - PlacerContext& placer_ctx); + PlaceLocVars& place_loc_vars); /** * @brief Indicates whether the object is empty or it has already stored a diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index af5a775c954..76ddaee4141 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -432,9 +432,11 @@ void try_place(const Netlist<>& net_list, PlacerContext placer_ctx; auto& place_move_ctx = placer_ctx.mutable_move(); + auto& place_loc_vars = placer_ctx.mutable_place_loc_vars(); const auto& p_timing_ctx = placer_ctx.timing(); const auto& p_runtime_ctx = placer_ctx.runtime(); + alloc_and_load_placement_structs(placer_opts.place_cost_exp, placer_opts, noc_opts, directs, num_directs, placer_ctx); set_net_handlers_placer_ctx(placer_ctx); @@ -446,7 +448,7 @@ void try_place(const Netlist<>& net_list, normalize_noc_cost_weighting_factor(const_cast(noc_opts)); } - initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts, g_vpr_ctx.mutable_placement().block_locs); + initial_placement(placer_opts, placer_opts.constraints_file.c_str(), noc_opts, place_loc_vars); //create the move generator based on the chosen strategy auto [move_generator, move_generator2] = create_move_generators(placer_ctx, placer_opts, move_lim, noc_opts.noc_centroid_weight); @@ -470,8 +472,8 @@ void try_place(const Netlist<>& net_list, #endif /* ENABLE_ANALYTIC_PLACE */ // Update physical pin values - for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id, g_vpr_ctx.placement().block_locs); + for (const ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { + place_sync_external_block_connections(block_id, place_loc_vars); } const int width_fac = placer_opts.place_chan_width; @@ -897,8 +899,8 @@ void try_place(const Netlist<>& net_list, //#endif // Update physical pin values - for (ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { - place_sync_external_block_connections(block_id, g_vpr_ctx.placement().block_locs); + for (const ClusterBlockId block_id : cluster_ctx.clb_nlist.blocks()) { + place_sync_external_block_connections(block_id, place_loc_vars); } check_place(costs, @@ -1360,7 +1362,7 @@ static e_move_result try_swap(const t_annealing_state* state, */ /* Update the block positions */ - apply_move_blocks(blocks_affected, g_vpr_ctx.mutable_placement().block_locs); + apply_move_blocks(blocks_affected, placer_ctx.mutable_place_loc_vars()); //Find all the nets affected by this swap and update the wiring costs. //This cost value doesn't depend on the timing info. @@ -1497,7 +1499,7 @@ static e_move_result try_swap(const t_annealing_state* state, reset_move_nets(num_nets_affected); /* Restore the place_ctx.block_locs data structures to their state before the move. */ - revert_move_blocks(blocks_affected, placer_ctx.get_mutable_block_locs()); + revert_move_blocks(blocks_affected, placer_ctx.mutable_place_loc_vars()); if (place_algorithm == SLACK_TIMING_PLACE) { /* Revert the timing delays and costs to pre-update values. */ diff --git a/vpr/src/place/place_constraints.cpp b/vpr/src/place/place_constraints.cpp index b491ee74838..b3de981f03a 100644 --- a/vpr/src/place/place_constraints.cpp +++ b/vpr/src/place/place_constraints.cpp @@ -252,7 +252,7 @@ void load_cluster_constraints() { } } -void mark_fixed_blocks(vtr::vector_map& block_locs) { +void mark_fixed_blocks(PlaceLocVars& place_loc_vars) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& floorplanning_ctx = g_vpr_ctx.floorplanning(); @@ -270,8 +270,8 @@ void mark_fixed_blocks(vtr::vector_map& block_locs) * and mark it as fixed. */ if (is_pr_size_one(pr, block_type, loc)) { - set_block_location(blk_id, loc, block_locs); - block_locs[blk_id].is_fixed = true; + set_block_location(blk_id, loc, place_loc_vars); + place_loc_vars.mutable_block_locs()[blk_id].is_fixed = true; } } } diff --git a/vpr/src/place/place_constraints.h b/vpr/src/place/place_constraints.h index 64285728e96..6404d66199c 100644 --- a/vpr/src/place/place_constraints.h +++ b/vpr/src/place/place_constraints.h @@ -137,7 +137,7 @@ void load_cluster_constraints(); * Marking them as fixed indicates that they cannot be moved * during initial placement and simulated annealing. */ -void mark_fixed_blocks(vtr::vector_map& block_locs); +void mark_fixed_blocks(PlaceLocVars& place_loc_vars); /** * @brief Converts the floorplanning constraints from grid location to diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 145e6442bd0..aa1c474cc8c 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -364,11 +364,11 @@ void alloc_and_load_legal_placement_locations(std::vector& get_block_locs() const { return block_locs_; } - vtr::vector_map& get_mutable_block_locs() { return block_locs_; } + inline const vtr::vector_map& get_block_locs() const { return loc_vars_.block_locs(); } + inline vtr::vector_map& get_mutable_block_locs() { return loc_vars_.mutable_block_locs(); } - const GridBlock& get_grid_blocks() const { return grid_blocks_; } - GridBlock& get_mutable_grid_blocks() { return grid_blocks_; } + inline const GridBlock& get_grid_blocks() const { return loc_vars_.grid_blocks(); } + inline GridBlock& get_mutable_grid_blocks() { return loc_vars_.mutable_grid_blocks(); } - const vtr::vector_map& physical_pins() const { return physical_pins_; } - vtr::vector_map& mutable_physical_pins() { return physical_pins_; } + inline const vtr::vector_map& physical_pins() const { return loc_vars_.physical_pins(); } + inline vtr::vector_map& mutable_physical_pins() { return loc_vars_.mutable_physical_pins(); } + + inline const PlaceLocVars& place_loc_vars() const { return loc_vars_; } + inline PlaceLocVars& mutable_place_loc_vars() { return loc_vars_; } private: PlacerTimingContext timing_; PlacerRuntimeContext runtime_; PlacerMoveContext move_; - - ///@brief Clustered block placement locations - vtr::vector_map block_locs_; - - ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) - GridBlock grid_blocks_; - - ///@brief Clustered pin placement mapping with physical pin - vtr::vector_map physical_pins_; + PlaceLocVars loc_vars_; }; diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 9f25f377c69..36ab455a688 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -2106,10 +2106,11 @@ void print_switch_usage() { */ void place_sync_external_block_connections(ClusterBlockId iblk, - const vtr::vector_map& block_locs, - vtr::vector_map& physical_pins) { - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& clb_nlist = cluster_ctx.clb_nlist; + PlaceLocVars& place_loc_vars) { + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& clb_nlist = cluster_ctx.clb_nlist; + const auto& block_locs = place_loc_vars.block_locs(); + auto& physical_pins = place_loc_vars.mutable_physical_pins(); t_pl_loc block_loc = block_locs[iblk].loc; diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index 5da1da74deb..c0c8fa0c8b4 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -243,8 +243,7 @@ AtomBlockId find_memory_sibling(const t_pb* pb); * It does not check for overuse of locations, therefore it can be used with placements that have resource overuse. */ void place_sync_external_block_connections(ClusterBlockId iblk, - const vtr::vector_map& block_locs, - vtr::vector_map& physical_pins); + PlaceLocVars& place_loc_vars); //Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index); From 816d44e5165e85c716fb7c10ef9e5618b0667dc4 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 16:54:22 -0400 Subject: [PATCH 036/146] remove all remaining place_ctx.block_locs accesses --- vpr/src/base/vpr_context.h | 4 +- vpr/src/place/place.cpp | 112 +++++++++++++------------- vpr/src/place/timing_place_lookup.cpp | 15 ++-- 3 files changed, 67 insertions(+), 64 deletions(-) diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 8fea4fbe08d..51f5eb7704e 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -389,8 +389,8 @@ struct PlacementContext : public Context { public: - ///@brief Clustered block placement locations - vtr::vector_map block_locs; +// ///@brief Clustered block placement locations +// vtr::vector_map block_locs; ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) GridBlock grid_blocks; diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 76ddaee4141..44928dcda98 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -234,9 +234,9 @@ static int check_placement_costs(const t_placer_costs& costs, const t_place_algorithm& place_algorithm, PlacerContext& placer_ctx); -static int check_placement_consistency(); -static int check_block_placement_consistency(); -static int check_macro_placement_consistency(); +static int check_placement_consistency(const PlaceLocVars& place_loc_vars); +static int check_block_placement_consistency(const PlaceLocVars& place_loc_vars); +static int check_macro_placement_consistency(const PlaceLocVars& place_loc_vars); static float starting_t(const t_annealing_state* state, t_placer_costs* costs, @@ -338,7 +338,7 @@ static void print_place_status(const t_annealing_state& state, bool noc_enabled, const NocCostTerms& noc_cost_terms); -static void print_resources_utilization(); +static void print_resources_utilization(const PlaceLocVars& place_loc_vars); static void print_placement_swaps_stats(const t_annealing_state& state, const t_swap_stats& swap_stats); @@ -455,7 +455,7 @@ void try_place(const Netlist<>& net_list, if (!placer_opts.write_initial_place_file.empty()) { print_place(nullptr, nullptr, (placer_opts.write_initial_place_file + ".init.place").c_str(), - g_vpr_ctx.placement().block_locs); + placer_ctx.get_block_locs()); } #ifdef ENABLE_ANALYTIC_PLACE @@ -650,7 +650,7 @@ void try_place(const Netlist<>& net_list, std::string filename = vtr::string_fmt("placement_%03d_%03d.place", 0, 0); VTR_LOG("Saving initial placement to file: %s\n", filename.c_str()); - print_place(nullptr, nullptr, filename.c_str(), g_vpr_ctx.placement().block_locs); + print_place(nullptr, nullptr, filename.c_str(), place_loc_vars.block_locs()); } int first_move_lim = get_initial_move_lim(placer_opts, annealing_sched); @@ -754,7 +754,7 @@ void try_place(const Netlist<>& net_list, if (placer_opts.place_checkpointing && agent_state == e_agent_state::LATE_IN_THE_ANNEAL) { - save_placement_checkpoint_if_needed(g_vpr_ctx.placement().block_locs, + save_placement_checkpoint_if_needed(place_loc_vars.block_locs(), placement_checkpoint, timing_info, costs, critical_path.delay()); } @@ -886,7 +886,7 @@ void try_place(const Netlist<>& net_list, std::string filename = vtr::string_fmt("placement_%03d_%03d.place", state.num_temps + 1, 0); VTR_LOG("Saving final placement to file: %s\n", filename.c_str()); - print_place(nullptr, nullptr, filename.c_str(), g_vpr_ctx.placement().block_locs); + print_place(nullptr, nullptr, filename.c_str(), place_loc_vars.block_locs()); } // TODO: @@ -963,14 +963,14 @@ void try_place(const Netlist<>& net_list, update_screen(ScreenUpdatePriority::MAJOR, msg, PLACEMENT, timing_info); // Print out swap statistics - print_resources_utilization(); + print_resources_utilization(place_loc_vars); print_placement_swaps_stats(state, swap_stats); print_placement_move_types_stats(move_type_stat); if (noc_opts.noc) { - write_noc_placement_file(noc_opts.noc_placement_file_name, g_vpr_ctx.placement().block_locs); + write_noc_placement_file(noc_opts.noc_placement_file_name, place_loc_vars.block_locs()); } free_placement_structs(placer_opts, noc_opts, placer_ctx); @@ -1119,7 +1119,7 @@ static void placement_inner_loop(const t_annealing_state* state, state->num_temps + 1, inner_placement_save_count); VTR_LOG("Saving placement to file at temperature move %d / %d: %s\n", inner_iter, state->move_lim, filename.c_str()); - print_place(nullptr, nullptr, filename.c_str(), g_vpr_ctx.placement().block_locs); + print_place(nullptr, nullptr, filename.c_str(), placer_ctx.get_block_locs()); ++inner_placement_save_count; } } @@ -1272,6 +1272,8 @@ static e_move_result try_swap(const t_annealing_state* state, * Returns whether the swap is accepted, rejected or aborted. * * Passes back the new value of the cost functions. */ + const auto& block_locs = placer_ctx.get_block_locs(); + float rlim_escape_fraction = placer_opts.rlim_escape_fraction; float timing_tradeoff = placer_opts.timing_tradeoff; @@ -1322,7 +1324,7 @@ static e_move_result try_swap(const t_annealing_state* state, #endif //NO_GRAPHICS } else if (router_block_move) { // generate a move where two random router blocks are swapped - create_move_outcome = propose_router_swap(blocks_affected, rlim, g_vpr_ctx.placement().block_locs); + create_move_outcome = propose_router_swap(blocks_affected, rlim, block_locs); proposed_action.move_type = e_move_type::UNIFORM; } else { //Generate a new move (perturbation) used to explore the space of possible placements @@ -1427,7 +1429,7 @@ static e_move_result try_swap(const t_annealing_state* state, NocCostTerms noc_delta_c; // change in NoC cost /* Update the NoC datastructure and costs*/ if (noc_opts.noc) { - find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, g_vpr_ctx.placement().block_locs); + find_affected_noc_routers_and_update_noc_costs(blocks_affected, noc_delta_c, block_locs); // Include the NoC delta costs in the total cost change for this swap delta_c += calculate_noc_cost(noc_delta_c, costs->noc_cost_norm_factors, noc_opts); @@ -1533,7 +1535,7 @@ static e_move_result try_swap(const t_annealing_state* state, } /* Revert the traffic flow routes within the NoC*/ if (noc_opts.noc) { - revert_noc_traffic_flow_routes(blocks_affected, g_vpr_ctx.placement().block_locs); + revert_noc_traffic_flow_routes(blocks_affected, block_locs); } } @@ -1549,7 +1551,7 @@ static e_move_result try_swap(const t_annealing_state* state, move_outcome_stats.outcome = move_outcome; // If we force a router block move then it was not proposed by the - // move generator so we should not calculate the reward and update + // move generator, so we should not calculate the reward and update // the move generators status since this outcome is not a direct // consequence of the move generator if (!router_block_move) { @@ -1566,13 +1568,14 @@ static e_move_result try_swap(const t_annealing_state* state, /* Clear the data structure containing block move info */ clear_move_blocks(blocks_affected); - //VTR_ASSERT(check_macro_placement_consistency() == 0); #if 0 // Check that each accepted swap yields a valid placement. This will // greatly slow the placer, but can debug some issues. check_place(*costs, delay_model, criticalities, place_algorithm, noc_opts); #endif - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tAfter move Place cost %e, bb_cost %e, timing cost %e\n", costs->cost, costs->bb_cost, costs->timing_cost); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\t\tAfter move Place cost %e, bb_cost %e, timing cost %e\n", + costs->cost, costs->bb_cost, costs->timing_cost); return move_outcome; } @@ -1977,15 +1980,15 @@ static void check_place(const t_placer_costs& costs, int error = 0; - error += check_placement_consistency(); + error += check_placement_consistency(placer_ctx.place_loc_vars()); error += check_placement_costs(costs, delay_model, criticalities, place_algorithm, placer_ctx); - error += check_placement_floorplanning(g_vpr_ctx.placement().block_locs); + error += check_placement_floorplanning(placer_ctx.get_block_locs()); if (noc_opts.noc) { // check the NoC costs during placement if the user is using the NoC supported flow - error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts, g_vpr_ctx.placement().block_locs); + error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts, placer_ctx.get_block_locs()); // make sure NoC routing configuration does not create any cycles in CDG - error += (int)noc_routing_has_cycle(g_vpr_ctx.placement().block_locs); + error += (int)noc_routing_has_cycle(placer_ctx.get_block_locs()); } if (error == 0) { @@ -2038,16 +2041,17 @@ static int check_placement_costs(const t_placer_costs& costs, return error; } -static int check_placement_consistency() { - return check_block_placement_consistency() + check_macro_placement_consistency(); +static int check_placement_consistency(const PlaceLocVars& place_loc_vars) { + return check_block_placement_consistency(place_loc_vars) + check_macro_placement_consistency(place_loc_vars); } -static int check_block_placement_consistency() { - int error = 0; - +static int check_block_placement_consistency(const PlaceLocVars& place_loc_vars) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); + const auto& block_locs = place_loc_vars.block_locs(); + const auto& grid_blocks = place_loc_vars.grid_blocks(); + + int error = 0; vtr::vector bdone(cluster_ctx.clb_nlist.blocks().size(), 0); @@ -2057,22 +2061,22 @@ static int check_block_placement_consistency() { for (int j = 0; j < (int)device_ctx.grid.height(); j++) { const t_physical_tile_loc tile_loc(i, j, layer_num); const auto& type = device_ctx.grid.get_physical_type(tile_loc); - if (place_ctx.grid_blocks.get_usage(tile_loc) > type->capacity) { + if (grid_blocks.get_usage(tile_loc) > type->capacity) { VTR_LOG_ERROR( "%d blocks were placed at grid location (%d,%d,%d), but location capacity is %d.\n", - place_ctx.grid_blocks.get_usage(tile_loc), i, j, layer_num, type->capacity); + grid_blocks.get_usage(tile_loc), i, j, layer_num, type->capacity); error++; } int usage_check = 0; for (int k = 0; k < type->capacity; k++) { - ClusterBlockId bnum = place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}); + ClusterBlockId bnum = grid_blocks.block_at_location({i, j, k, layer_num}); if (EMPTY_BLOCK_ID == bnum || INVALID_BLOCK_ID == bnum) { continue; } auto logical_block = cluster_ctx.clb_nlist.block_type(bnum); auto physical_tile = type; - t_pl_loc block_loc = place_ctx.block_locs[bnum].loc; + t_pl_loc block_loc = block_locs[bnum].loc; if (physical_tile_type(block_loc) != physical_tile) { VTR_LOG_ERROR( @@ -2081,7 +2085,7 @@ static int check_block_placement_consistency() { error++; } - auto& loc = place_ctx.block_locs[bnum].loc; + auto& loc = block_locs[bnum].loc; if (loc.x != i || loc.y != j || loc.layer != layer_num || !is_sub_tile_compatible(physical_tile, logical_block, loc.sub_tile)) { @@ -2100,10 +2104,10 @@ static int check_block_placement_consistency() { ++usage_check; bdone[bnum]++; } - if (usage_check != place_ctx.grid_blocks.get_usage(tile_loc)) { + if (usage_check != grid_blocks.get_usage(tile_loc)) { VTR_LOG_ERROR( "%d block(s) were placed at location (%d,%d,%d), but location contains %d block(s).\n", - place_ctx.grid_blocks.get_usage(tile_loc), + grid_blocks.get_usage(tile_loc), tile_loc.x, tile_loc.y, tile_loc.layer_num, @@ -2115,7 +2119,7 @@ static int check_block_placement_consistency() { } /* Check that every block exists in the device_ctx.grid and cluster_ctx.blocks arrays somewhere. */ - for (auto blk_id : cluster_ctx.clb_nlist.blocks()) + for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) if (bdone[blk_id] != 1) { VTR_LOG_ERROR("Block %zu listed %d times in device context grid.\n", size_t(blk_id), bdone[blk_id]); @@ -2125,25 +2129,25 @@ static int check_block_placement_consistency() { return error; } -int check_macro_placement_consistency() { - int error = 0; - auto& place_ctx = g_vpr_ctx.placement(); +int check_macro_placement_consistency(const PlaceLocVars& place_loc_vars) { + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock grid_blocks = place_loc_vars.grid_blocks(); - auto& pl_macros = place_ctx.pl_macros; + int error = 0; /* Check the pl_macro placement are legal - blocks are in the proper relative position. */ - for (size_t imacro = 0; imacro < place_ctx.pl_macros.size(); imacro++) { + for (size_t imacro = 0; imacro < pl_macros.size(); imacro++) { auto head_iblk = pl_macros[imacro].members[0].blk_index; for (size_t imember = 0; imember < pl_macros[imacro].members.size(); imember++) { auto member_iblk = pl_macros[imacro].members[imember].blk_index; // Compute the supposed member's x,y,z location - t_pl_loc member_pos = place_ctx.block_locs[head_iblk].loc - + pl_macros[imacro].members[imember].offset; + t_pl_loc member_pos = block_locs[head_iblk].loc + pl_macros[imacro].members[imember].offset; // Check the place_ctx.block_locs data structure first - if (place_ctx.block_locs[member_iblk].loc != member_pos) { + if (block_locs[member_iblk].loc != member_pos) { VTR_LOG_ERROR( "Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", size_t(member_iblk), imacro); @@ -2151,7 +2155,7 @@ int check_macro_placement_consistency() { } // Then check the place_ctx.grid data structure - if (place_ctx.grid_blocks.block_at_location(member_pos) != member_iblk) { + if (grid_blocks.block_at_location(member_pos) != member_iblk) { VTR_LOG_ERROR( "Block %zu in pl_macro #%zu is not placed in the proper orientation.\n", size_t(member_iblk), imacro); @@ -2159,6 +2163,7 @@ int check_macro_placement_consistency() { } } // Finish going through all the members } // Finish going through all the macros + return error; } @@ -2273,10 +2278,10 @@ static void print_place_status(const t_annealing_state& state, fflush(stdout); } -static void print_resources_utilization() { - auto& place_ctx = g_vpr_ctx.placement(); - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& device_ctx = g_vpr_ctx.device(); +static void print_resources_utilization(const PlaceLocVars& place_loc_vars) { + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& device_ctx = g_vpr_ctx.device(); + const auto& block_locs = place_loc_vars.block_locs(); int max_block_name = 0; int max_tile_name = 0; @@ -2286,8 +2291,7 @@ static void print_resources_utilization() { std::map> num_placed_instances; for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { - auto block_loc = place_ctx.block_locs[blk_id]; - auto loc = block_loc.loc; + const t_pl_loc& loc = block_locs[blk_id].loc; auto physical_tile = device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer}); auto logical_block = cluster_ctx.clb_nlist.block_type(blk_id); @@ -2301,11 +2305,11 @@ static void print_resources_utilization() { VTR_LOG("\n"); VTR_LOG("Placement resource usage:\n"); - for (auto logical_block : num_type_instances) { - for (auto physical_tile : num_placed_instances[logical_block.first]) { + for (const auto [logical_block_type_ptr, _] : num_type_instances) { + for (const auto [physical_tile_type_ptr, num_instances] : num_placed_instances[logical_block_type_ptr]) { VTR_LOG(" %-*s implemented as %-*s: %d\n", max_block_name, - logical_block.first->name, max_tile_name, - physical_tile.first->name, physical_tile.second); + logical_block_type_ptr->name, max_tile_name, + physical_tile_type_ptr->name, num_instances); } } VTR_LOG("\n"); diff --git a/vpr/src/place/timing_place_lookup.cpp b/vpr/src/place/timing_place_lookup.cpp index 43d3b735f5e..b5854487fbd 100644 --- a/vpr/src/place/timing_place_lookup.cpp +++ b/vpr/src/place/timing_place_lookup.cpp @@ -182,8 +182,6 @@ std::unique_ptr compute_place_delay_model(const t_placer_opts& bool is_flat) { vtr::ScopedStartFinishTimer timer("Computing placement delta delay look-up"); - init_placement_context(); - t_chan_width chan_width = setup_chan_width(router_opts, chan_width_dist); alloc_routing_structs(chan_width, router_opts, det_routing_arch, segment_inf, @@ -327,14 +325,15 @@ std::vector get_best_classes(enum e_pin_type pintype, t_physical_tile_type_ } static int get_longest_segment_length(std::vector& segment_inf) { - int length; + int length = 0; - length = 0; - for (size_t i = 0; i < segment_inf.size(); i++) { - if (segment_inf[i].length > length) - length = segment_inf[i].length; + for (const t_segment_inf &seg_info : segment_inf) { + if (seg_info.length > length) { + length = seg_info.length; + } } - return (length); + + return length; } static t_chan_width setup_chan_width(const t_router_opts& router_opts, From 519546b4443fff487d6c0ae11255dc84236cfbbe Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 17:04:16 -0400 Subject: [PATCH 037/146] rename block_locs() getters in the placement context --- utils/fasm/src/fasm.cpp | 2 +- utils/fasm/test/test_fasm.cpp | 2 +- vpr/src/base/load_flat_place.cpp | 4 ++-- vpr/src/base/place_and_route.cpp | 2 +- vpr/src/base/stats.cpp | 4 ++-- vpr/src/base/vpr_api.cpp | 6 +++--- vpr/src/base/vpr_constraints_writer.cpp | 4 ++-- vpr/src/base/vpr_context.h | 7 ++----- vpr/src/base/vpr_signal_handler.cpp | 2 +- vpr/src/draw/draw.cpp | 2 +- vpr/src/draw/draw_basic.cpp | 8 ++++---- vpr/src/draw/draw_searchbar.cpp | 2 +- vpr/src/draw/draw_types.cpp | 6 +++--- vpr/src/draw/intra_logic_block.cpp | 4 ++-- vpr/src/draw/manual_moves.cpp | 4 ++-- vpr/src/draw/search_bar.cpp | 2 +- vpr/src/pack/post_routing_pb_pin_fixup.cpp | 2 +- vpr/src/pack/re_cluster_util.cpp | 2 +- vpr/src/place/analytic_placer.cpp | 4 ++-- vpr/src/place/cut_spreader.cpp | 8 ++++---- vpr/src/route/check_route.cpp | 4 ++-- vpr/src/route/overuse_report.cpp | 2 +- vpr/src/route/route_common.cpp | 4 ++-- vpr/src/route/rr_graph.cpp | 4 ++-- .../timing/PreClusterTimingGraphResolver.cpp | 2 +- vpr/src/timing/VprTimingGraphResolver.cpp | 2 +- vpr/src/util/vpr_utils.cpp | 18 +++++++++--------- vpr/test/test_noc_place_utils.cpp | 10 +++++----- 28 files changed, 60 insertions(+), 63 deletions(-) diff --git a/utils/fasm/src/fasm.cpp b/utils/fasm/src/fasm.cpp index 53fce2f1392..9968473eb64 100644 --- a/utils/fasm/src/fasm.cpp +++ b/utils/fasm/src/fasm.cpp @@ -39,7 +39,7 @@ void FasmWriterVisitor::visit_top_impl(const char* top_level_name) { void FasmWriterVisitor::visit_clb_impl(ClusterBlockId blk_id, const t_pb* clb) { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); current_blk_id_ = blk_id; diff --git a/utils/fasm/test/test_fasm.cpp b/utils/fasm/test/test_fasm.cpp index 8eb4e4876fb..31c358d9d17 100644 --- a/utils/fasm/test/test_fasm.cpp +++ b/utils/fasm/test/test_fasm.cpp @@ -569,7 +569,7 @@ TEST_CASE("fasm_integration_test", "[fasm]") { // Verify occupied grid LOCs const auto & place_ctx = g_vpr_ctx.placement(); - for (const auto& loc: place_ctx.get_block_locs()) { + for (const auto& loc: place_ctx.block_locs()) { // Do not consider "IOB" tiles. They do not have fasm features // defined in the arch. diff --git a/vpr/src/base/load_flat_place.cpp b/vpr/src/base/load_flat_place.cpp index 6cc7fa485b7..9e0654c0566 100644 --- a/vpr/src/base/load_flat_place.cpp +++ b/vpr/src/base/load_flat_place.cpp @@ -11,7 +11,7 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, std::vector& atoms) { auto& atom_ctx = g_vpr_ctx.atom(); - t_pl_loc loc = g_vpr_ctx.placement().get_block_locs()[iblk].loc; + t_pl_loc loc = g_vpr_ctx.placement().block_locs()[iblk].loc; size_t bnum = size_t(iblk); for (auto atom : atoms) { @@ -32,7 +32,7 @@ void print_flat_placement(const char* flat_place_file) { ClusterAtomsLookup atoms_lookup; auto& cluster_ctx = g_vpr_ctx.clustering(); - if (!g_vpr_ctx.placement().get_block_locs().empty()) { + if (!g_vpr_ctx.placement().block_locs().empty()) { fp = fopen(flat_place_file, "w"); for (auto iblk : cluster_ctx.clb_nlist.blocks()) { auto atoms = atoms_lookup.atoms_in_cluster(iblk); diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 2e74c454302..6aeb07275cf 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -358,7 +358,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, auto& cluster_ctx = g_vpr_ctx.clustering(); // Cluster-based net_list is used for placement std::string placement_id = print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), - filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().get_block_locs()); + filename_opts.PlaceFile.c_str(), g_vpr_ctx.placement().block_locs()); g_vpr_ctx.mutable_placement().placement_id = placement_id; } } diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp index 008c7a89116..4358704384a 100644 --- a/vpr/src/base/stats.cpp +++ b/vpr/src/base/stats.cpp @@ -60,7 +60,7 @@ void routing_stats(const Netlist<>& net_list, auto& device_ctx = g_vpr_ctx.device(); auto& rr_graph = device_ctx.rr_graph; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); int num_rr_switch = rr_graph.num_rr_switches(); @@ -430,7 +430,7 @@ void print_lambda() { float lambda; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { t_pl_loc block_loc = block_locs[blk_id].loc; diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index 064df21ee27..23a2a60c75f 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -821,7 +821,7 @@ void vpr_place(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& print_place(filename_opts.NetFile.c_str(), cluster_ctx.clb_nlist.netlist_id().c_str(), filename_opts.PlaceFile.c_str(), - g_vpr_ctx.placement().get_block_locs()); + g_vpr_ctx.placement().block_locs()); } void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { @@ -832,7 +832,7 @@ void vpr_load_placement(t_vpr_setup& vpr_setup, const t_arch& arch) { const auto& filename_opts = vpr_setup.FileNameOpts; //Initialize placement data structures, which will be filled when loading placement - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); GridBlock& grid_blocks = place_ctx.get_mutable_grid_blocks(); init_placement_context(block_locs, grid_blocks); @@ -1282,7 +1282,7 @@ static void free_atoms() { static void free_placement() { auto& place_ctx = g_vpr_ctx.mutable_placement(); - place_ctx.get_mutable_block_locs().clear(); + place_ctx.mutable_block_locs().clear(); place_ctx.get_mutable_grid_blocks().clear(); } diff --git a/vpr/src/base/vpr_constraints_writer.cpp b/vpr/src/base/vpr_constraints_writer.cpp index 190f6051a10..0de68549aec 100644 --- a/vpr/src/base/vpr_constraints_writer.cpp +++ b/vpr/src/base/vpr_constraints_writer.cpp @@ -54,7 +54,7 @@ void write_vpr_floorplan_constraints(const char* file_name, int expand, bool sub void setup_vpr_floorplan_constraints_one_loc(VprConstraints& constraints, int expand, bool subtile) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); int part_id = 0; /* @@ -94,7 +94,7 @@ void setup_vpr_floorplan_constraints_one_loc(VprConstraints& constraints, int ex void setup_vpr_floorplan_constraints_cutpoints(VprConstraints& constraints, int horizontal_cutpoints, int vertical_cutpoints) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& device_ctx = g_vpr_ctx.device(); const int n_layers = device_ctx.grid.get_num_layers(); diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 51f5eb7704e..efa2f2c0ebe 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -389,14 +389,11 @@ struct PlacementContext : public Context { public: -// ///@brief Clustered block placement locations -// vtr::vector_map block_locs; - ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) GridBlock grid_blocks; - const vtr::vector_map& get_block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.block_locs(); } - vtr::vector_map& get_mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_block_locs(); } + const vtr::vector_map& block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.block_locs(); } + vtr::vector_map& mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_block_locs(); } const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.grid_blocks(); } GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_grid_blocks(); } vtr::vector_map& mutable_physical_pins() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_physical_pins(); } diff --git a/vpr/src/base/vpr_signal_handler.cpp b/vpr/src/base/vpr_signal_handler.cpp index e98e0a49a06..66cb879ff79 100644 --- a/vpr/src/base/vpr_signal_handler.cpp +++ b/vpr/src/base/vpr_signal_handler.cpp @@ -90,7 +90,7 @@ void checkpoint() { std::string placer_checkpoint_file = "placer_checkpoint.place"; VTR_LOG("Attempting to checkpoint current placement to file: %s\n", placer_checkpoint_file.c_str()); - print_place(nullptr, nullptr, placer_checkpoint_file.c_str(), g_vpr_ctx.placement().get_block_locs()); + print_place(nullptr, nullptr, placer_checkpoint_file.c_str(), g_vpr_ctx.placement().block_locs()); std::string router_checkpoint_file = "router_checkpoint.route"; VTR_LOG("Attempting to checkpoint current routing to file: %s\n", router_checkpoint_file.c_str()); diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 565ddf4c81c..62d6e137eed 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -1011,7 +1011,7 @@ static void highlight_blocks(double x, double y) { } auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); VTR_ASSERT(clb_index != EMPTY_BLOCK_ID); diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index a2ec9acf7b0..f7bfbd7c219 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -230,7 +230,7 @@ void drawnets(ezgl::renderer* g) { ClusterBlockId b1, b2; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); float transparency_factor; float NET_ALPHA = draw_state->net_alpha; @@ -804,7 +804,7 @@ void draw_placement_macros(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& place_ctx = g_vpr_ctx.placement(); - auto& block_locs = place_ctx.get_block_locs(); + auto& block_locs = place_ctx.block_locs(); for (const t_pl_macro& pl_macro : place_ctx.pl_macros) { @@ -1187,7 +1187,7 @@ void draw_crit_path_elements(const std::vector& paths, const } int get_timing_path_node_layer_num(tatum::NodeId node) { - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& atom_ctx = g_vpr_ctx.atom(); AtomPinId atom_pin = atom_ctx.lookup.tnode_atom_pin(node); @@ -1420,7 +1420,7 @@ void draw_block_pin_util() { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); std::map total_input_pins; std::map total_output_pins; diff --git a/vpr/src/draw/draw_searchbar.cpp b/vpr/src/draw/draw_searchbar.cpp index c71b3abe56c..52edef692ee 100644 --- a/vpr/src/draw/draw_searchbar.cpp +++ b/vpr/src/draw/draw_searchbar.cpp @@ -110,7 +110,7 @@ void draw_highlight_blocks_color(t_logical_block_type_ptr type, t_draw_state* draw_state = get_draw_state_vars(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); for (k = 0; k < type->pb_type->num_pins; k++) { /* Each pin on a CLB */ ClusterNetId net_id = cluster_ctx.clb_nlist.block_net(blk_id, k); diff --git a/vpr/src/draw/draw_types.cpp b/vpr/src/draw/draw_types.cpp index 0657fe24770..84a399b7dde 100644 --- a/vpr/src/draw/draw_types.cpp +++ b/vpr/src/draw/draw_types.cpp @@ -15,7 +15,7 @@ ezgl::color t_draw_state::block_color(ClusterBlockId blk) const { if (use_default_block_color_[blk]) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); t_physical_tile_type_ptr tile_type = nullptr; if (block_locs.empty()) { //No placement, pick best match @@ -88,7 +88,7 @@ float t_draw_coords::get_tile_height() { } ezgl::rectangle t_draw_coords::get_pb_bbox(ClusterBlockId clb_index, const t_pb_graph_node& pb_gnode) { - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& cluster_ctx = g_vpr_ctx.clustering(); return get_pb_bbox(block_locs[clb_index].loc.layer, @@ -153,7 +153,7 @@ ezgl::rectangle t_draw_coords::get_absolute_pb_bbox(const ClusterBlockId clb_ind } ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(const ClusterBlockId clb_index, const t_logical_block_type_ptr block_type) { - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); t_pl_loc loc = block_locs[clb_index].loc; return get_pb_bbox(loc.layer, loc.x, loc.y, loc.sub_tile, block_type); diff --git a/vpr/src/draw/intra_logic_block.cpp b/vpr/src/draw/intra_logic_block.cpp index b047f112d56..af0988b225a 100644 --- a/vpr/src/draw/intra_logic_block.cpp +++ b/vpr/src/draw/intra_logic_block.cpp @@ -339,7 +339,7 @@ static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezg t_draw_coords* draw_coords = get_draw_coords_vars(); t_draw_state* draw_state = get_draw_state_vars(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); t_selected_sub_block_info& sel_sub_info = get_selected_sub_block_info(); @@ -557,7 +557,7 @@ void draw_logical_connections(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); auto& atom_ctx = g_vpr_ctx.atom(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); g->set_line_dash(ezgl::line_dash::none); diff --git a/vpr/src/draw/manual_moves.cpp b/vpr/src/draw/manual_moves.cpp index c1b0f496770..1c51df8996f 100644 --- a/vpr/src/draw/manual_moves.cpp +++ b/vpr/src/draw/manual_moves.cpp @@ -175,14 +175,14 @@ bool is_manual_move_legal(ClusterBlockId block_id, t_pl_loc to) { //If the destination block is user constrained, abort this swap auto b_to = place_ctx.get_grid_blocks().block_at_location(to); if (b_to != INVALID_BLOCK_ID && b_to != EMPTY_BLOCK_ID) { - if (place_ctx.get_block_locs()[b_to].is_fixed) { + if (place_ctx.block_locs()[b_to].is_fixed) { invalid_breakpoint_entry_window("Block is fixed"); return false; } } //If the block requested is already in that location. - t_pl_loc current_block_loc = place_ctx.get_block_locs()[block_id].loc; + t_pl_loc current_block_loc = place_ctx.block_locs()[block_id].loc; if (to.x == current_block_loc.x && to.y == current_block_loc.y && to.sub_tile == current_block_loc.sub_tile) { invalid_breakpoint_entry_window("The block is currently in this location"); return false; diff --git a/vpr/src/draw/search_bar.cpp b/vpr/src/draw/search_bar.cpp index 27de47bb0ac..a6c194d2330 100644 --- a/vpr/src/draw/search_bar.cpp +++ b/vpr/src/draw/search_bar.cpp @@ -302,7 +302,7 @@ void highlight_cluster_block(ClusterBlockId clb_index) { draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(clb_index), clb_index); sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", size_t(clb_index), cluster_ctx.clb_nlist.block_name(clb_index).c_str(), - place_ctx.get_block_locs()[clb_index].loc.x, place_ctx.get_block_locs()[clb_index].loc.y); + place_ctx.block_locs()[clb_index].loc.x, place_ctx.block_locs()[clb_index].loc.y); } application.update_message(msg); diff --git a/vpr/src/pack/post_routing_pb_pin_fixup.cpp b/vpr/src/pack/post_routing_pb_pin_fixup.cpp index 04f4ea3f8ef..2126c0b7b1a 100644 --- a/vpr/src/pack/post_routing_pb_pin_fixup.cpp +++ b/vpr/src/pack/post_routing_pb_pin_fixup.cpp @@ -1090,7 +1090,7 @@ void sync_netlists_to_routing(const Netlist<>& net_list, device_ctx, clustering_ctx, rr_node_nets, - placement_ctx.get_block_locs()[clb_blk_id].loc, + placement_ctx.block_locs()[clb_blk_id].loc, clb_blk_id, num_mismatches, verbose, diff --git a/vpr/src/pack/re_cluster_util.cpp b/vpr/src/pack/re_cluster_util.cpp index 1aed4e4ae4a..7b5ba8715d1 100644 --- a/vpr/src/pack/re_cluster_util.cpp +++ b/vpr/src/pack/re_cluster_util.cpp @@ -82,7 +82,7 @@ void commit_mol_move(ClusterBlockId old_clb, //place the new cluster if this function called during placement (after the initial placement is done) if (!during_packing && new_clb_created) { int imacro; - g_vpr_ctx.mutable_placement().get_mutable_block_locs().resize(g_vpr_ctx.placement().get_block_locs().size() + 1); + g_vpr_ctx.mutable_placement().mutable_block_locs().resize(g_vpr_ctx.placement().block_locs().size() + 1); get_imacro_from_iblk(&imacro, old_clb, g_vpr_ctx.placement().pl_macros); set_imacro_for_iblk(&imacro, new_clb); place_one_block(new_clb, device_ctx.pad_loc_type, nullptr, nullptr, g_vpr_ctx.mutable_placement().mutable_place_loc_vars()); diff --git a/vpr/src/place/analytic_placer.cpp b/vpr/src/place/analytic_placer.cpp index 5b9891d673f..e07f94adca4 100644 --- a/vpr/src/place/analytic_placer.cpp +++ b/vpr/src/place/analytic_placer.cpp @@ -301,7 +301,7 @@ void AnalyticPlacer::build_legal_locations() { // initialize other data members void AnalyticPlacer::init() { const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); for (auto blk_id : clb_nlist.blocks()) { blk_locs.insert(blk_id, BlockLocation{}); @@ -741,7 +741,7 @@ std::string AnalyticPlacer::print_overlap(vtr::Matrix& overlap, FILE* fp) { void AnalyticPlacer::print_place(const char* place_file) { const DeviceContext& device_ctx = g_vpr_ctx.device(); const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); FILE* fp; diff --git a/vpr/src/place/cut_spreader.cpp b/vpr/src/place/cut_spreader.cpp index 711a6b953f0..fcf1c498761 100644 --- a/vpr/src/place/cut_spreader.cpp +++ b/vpr/src/place/cut_spreader.cpp @@ -806,7 +806,7 @@ void CutSpreader::linear_spread_subarea(std::vector& cut_blks, void CutSpreader::strict_legalize() { auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; auto& place_ctx = g_vpr_ctx.placement(); - auto& block_locs = place_ctx.get_block_locs(); + auto& block_locs = place_ctx.block_locs(); int max_x = g_vpr_ctx.device().grid.width(); int max_y = g_vpr_ctx.device().grid.height(); @@ -964,7 +964,7 @@ void CutSpreader::strict_legalize() { void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); VTR_ASSERT(grid_blocks.block_at_location(sub_tile) == EMPTY_BLOCK_ID); VTR_ASSERT(block_locs[blk].is_fixed == false); @@ -982,7 +982,7 @@ void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { void CutSpreader::unbind_tile(t_pl_loc sub_tile) { auto& place_ctx = g_vpr_ctx.mutable_placement(); auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); VTR_ASSERT(grid_blocks.block_at_location(sub_tile) != EMPTY_BLOCK_ID); ClusterBlockId blk = grid_blocks.block_at_location(sub_tile); @@ -1001,7 +1001,7 @@ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { bool CutSpreader::is_placed(ClusterBlockId blk) { auto& place_ctx = g_vpr_ctx.placement(); auto& grid_blocks = place_ctx.get_grid_blocks(); - auto& block_locs = place_ctx.get_block_locs(); + auto& block_locs = place_ctx.block_locs(); if (block_locs[blk].loc != t_pl_loc{}) { auto loc = block_locs[blk].loc; diff --git a/vpr/src/route/check_route.cpp b/vpr/src/route/check_route.cpp index 31d847e16d4..9fadfb42415 100644 --- a/vpr/src/route/check_route.cpp +++ b/vpr/src/route/check_route.cpp @@ -477,7 +477,7 @@ void recompute_occupancy_from_scratch(const Netlist<>& net_list, bool is_flat) { */ auto& route_ctx = g_vpr_ctx.mutable_routing(); auto& device_ctx = g_vpr_ctx.device(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); /* First set the occupancy of everything to zero. */ for (RRNodeId inode : device_ctx.rr_graph.nodes()) @@ -529,7 +529,7 @@ static void check_locally_used_clb_opins(const t_clb_opins_used& clb_opins_used_ auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { t_pl_loc block_loc = block_locs[blk_id].loc; diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 4577e942a18..053121b0184 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -336,7 +336,7 @@ static void report_congested_nets(const Netlist<>& net_list, } else { cluster_block_id = convert_to_cluster_block_id(net_list.pin_block(sink_id)); } - auto cluster_loc = g_vpr_ctx.placement().get_block_locs()[cluster_block_id]; + auto cluster_loc = g_vpr_ctx.placement().block_locs()[cluster_block_id]; auto physical_type = g_vpr_ctx.device().grid.get_physical_type({x, y, layer_num}); int cluster_layer_num = cluster_loc.loc.layer; int cluster_x = cluster_loc.loc.x - g_vpr_ctx.device().grid.get_physical_type({cluster_loc.loc.x, cluster_loc.loc.y, cluster_layer_num})->width; diff --git a/vpr/src/route/route_common.cpp b/vpr/src/route/route_common.cpp index 214bdc7de89..cf0cfdad19c 100644 --- a/vpr/src/route/route_common.cpp +++ b/vpr/src/route/route_common.cpp @@ -334,7 +334,7 @@ static t_clb_opins_used alloc_and_load_clb_opins_used_locally() { int clb_pin, iclass; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); clb_opins_used_locally.resize(cluster_ctx.clb_nlist.blocks().size()); @@ -761,7 +761,7 @@ void reserve_locally_used_opins(HeapInterface* heap, float pres_fac, float acc_f auto& route_ctx = g_vpr_ctx.mutable_routing(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); if (rip_up_local_opins) { for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { diff --git a/vpr/src/route/rr_graph.cpp b/vpr/src/route/rr_graph.cpp index 076a73dce19..c340f293ba9 100644 --- a/vpr/src/route/rr_graph.cpp +++ b/vpr/src/route/rr_graph.cpp @@ -803,7 +803,7 @@ static void add_intra_cluster_edges_rr_graph(RRGraphBuilder& rr_graph_builder, VTR_ASSERT(is_flat); /* This function should be called if placement is done! */ - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& cluster_net_list = g_vpr_ctx.clustering().clb_nlist; int num_collapsed_nodes = 0; for (ClusterBlockId cluster_blk_id : cluster_net_list.blocks()) { @@ -2180,7 +2180,7 @@ static void set_clusters_pin_chains(const ClusteredNetlist& clb_nlist, bool is_flat) { VTR_ASSERT(is_flat); - const auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + const auto& block_locs = g_vpr_ctx.placement().block_locs(); for (ClusterBlockId cluster_blk_id : clb_nlist.blocks()) { t_pl_loc block_loc = block_locs[cluster_blk_id].loc; diff --git a/vpr/src/timing/PreClusterTimingGraphResolver.cpp b/vpr/src/timing/PreClusterTimingGraphResolver.cpp index 3433ba054f3..c94d961c84f 100644 --- a/vpr/src/timing/PreClusterTimingGraphResolver.cpp +++ b/vpr/src/timing/PreClusterTimingGraphResolver.cpp @@ -27,7 +27,7 @@ std::string PreClusterTimingGraphResolver::node_type_name(tatum::NodeId node) co if (detail_level() == e_timing_report_detail::AGGREGATED) { //Annotate primitive grid location, if known auto& atom_ctx = g_vpr_ctx.atom(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); ClusterBlockId cb = atom_ctx.lookup.atom_clb(blk); if (cb && block_locs.count(cb)) { int x = block_locs[cb].loc.x; diff --git a/vpr/src/timing/VprTimingGraphResolver.cpp b/vpr/src/timing/VprTimingGraphResolver.cpp index 793a5f0424f..8bc23f0c09c 100644 --- a/vpr/src/timing/VprTimingGraphResolver.cpp +++ b/vpr/src/timing/VprTimingGraphResolver.cpp @@ -31,7 +31,7 @@ std::string VprTimingGraphResolver::node_type_name(tatum::NodeId node) const { //Detailed report consist of the aggregated reported with a breakdown of inter-block routing //Annotate primitive grid location, if known auto& atom_ctx = g_vpr_ctx.atom(); - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); ClusterBlockId cb = atom_ctx.lookup.atom_clb(blk); if (cb && block_locs.count(cb)) { int x = block_locs[cb].loc.x; diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 36ab455a688..6241de05018 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -128,7 +128,7 @@ void sync_grid_to_blocks() { const int num_layers = device_ctx.grid.get_num_layers(); auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); - auto& block_locs = place_ctx.get_block_locs(); + auto& block_locs = place_ctx.block_locs(); /* Reset usage and allocate blocks list if needed */ grid_blocks = GridBlock(device_grid.width(), device_grid.height(), device_ctx.grid.get_num_layers()); @@ -534,7 +534,7 @@ t_physical_tile_type_ptr physical_tile_type(t_pl_loc loc) { t_physical_tile_type_ptr physical_tile_type(AtomBlockId atom_blk) { auto& atom_look_up = g_vpr_ctx.atom().lookup; - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); ClusterBlockId cluster_blk = atom_look_up.atom_clb(atom_blk); VTR_ASSERT(cluster_blk != ClusterBlockId::INVALID()); @@ -543,7 +543,7 @@ t_physical_tile_type_ptr physical_tile_type(AtomBlockId atom_blk) { } t_physical_tile_type_ptr physical_tile_type(ParentBlockId blk_id, bool is_flat) { - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); if (is_flat) { return physical_tile_type(convert_to_atom_block_id(blk_id)); @@ -581,7 +581,7 @@ int get_sub_tile_index(ClusterBlockId blk, } int get_sub_tile_index(ClusterBlockId blk) { - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); return get_sub_tile_index(blk, block_locs); } @@ -616,7 +616,7 @@ int get_unique_pb_graph_node_id(const t_pb_graph_node* pb_graph_node) { t_class_range get_class_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); t_pl_loc block_loc = block_locs[blk_id].loc; auto type = physical_tile_type(block_loc); @@ -660,7 +660,7 @@ t_class_range get_class_range_for_block(const ParentBlockId blk_id, bool is_flat std::pair get_pin_range_for_block(const ClusterBlockId blk_id) { /* Assumes that the placement has been done so each block has a set of pins allocated to it */ - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); t_pl_loc block_loc = block_locs[blk_id].loc; auto type = physical_tile_type(block_loc); @@ -700,7 +700,7 @@ t_block_loc get_block_loc(const ParentBlockId& block_id, bool is_flat) { } VTR_ASSERT(cluster_block_id != ClusterBlockId::INVALID()); - auto blk_loc = place_ctx.get_block_locs()[cluster_block_id]; + auto blk_loc = place_ctx.block_locs()[cluster_block_id]; return blk_loc; } @@ -711,7 +711,7 @@ int get_block_num_class(const ParentBlockId& block_id, bool is_flat) { } int get_block_pin_class_num(const ParentBlockId& block_id, const ParentPinId& pin_id, bool is_flat) { - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); int class_num; if (is_flat) { @@ -1353,7 +1353,7 @@ void free_pin_id_to_pb_mapping(vtr::vector& pin_id_to_pb std::tuple get_cluster_blk_physical_spec(ClusterBlockId cluster_blk_id) { auto& grid = g_vpr_ctx.device().grid; - auto& block_locs = g_vpr_ctx.placement().get_block_locs(); + auto& block_locs = g_vpr_ctx.placement().block_locs(); auto& loc = block_locs[cluster_blk_id].loc; int cap = loc.sub_tile; const auto& physical_type = grid.get_physical_type({loc.x, loc.y, loc.layer}); diff --git a/vpr/test/test_noc_place_utils.cpp b/vpr/test/test_noc_place_utils.cpp index 7c568971679..a2b151835a1 100644 --- a/vpr/test/test_noc_place_utils.cpp +++ b/vpr/test/test_noc_place_utils.cpp @@ -29,7 +29,7 @@ TEST_CASE("test_initial_noc_placement", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); @@ -227,7 +227,7 @@ TEST_CASE("test_initial_comp_cost_functions", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); @@ -502,7 +502,7 @@ TEST_CASE("test_find_affected_noc_routers_and_update_noc_costs, test_commit_noc_ // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); @@ -1380,7 +1380,7 @@ TEST_CASE("test_revert_noc_traffic_flow_routes", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); @@ -1732,7 +1732,7 @@ TEST_CASE("test_check_noc_placement_costs", "[noc_place_utils]") { // get global datastructures auto& noc_ctx = g_vpr_ctx.mutable_noc(); auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& block_locs = place_ctx.get_mutable_block_locs(); + auto& block_locs = place_ctx.mutable_block_locs(); // start by deleting any global datastructures (this is so that we don't have corruption from previous tests) noc_ctx.noc_model.clear_noc(); From a208dc797abd738e54759c91fbeb4970bfc27df0 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 17:07:03 -0400 Subject: [PATCH 038/146] remove place_ctx.grid_blocks access in initial_noc_placement --- vpr/src/place/initial_noc_placement.cpp | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 011975bb5fd..38719e7b933 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -103,10 +103,11 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed, PlaceLocVars& place_loc_vars) { - auto& place_ctx = g_vpr_ctx.placement(); - auto& noc_ctx = g_vpr_ctx.noc(); - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& device_ctx = g_vpr_ctx.device(); + const auto& compressed_grids = g_vpr_ctx.placement().compressed_block_grids; + const auto& noc_ctx = g_vpr_ctx.noc(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& device_ctx = g_vpr_ctx.device(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); /* * Unconstrained NoC routers are placed randomly, then NoC cost is optimized using simulated annealing. @@ -133,7 +134,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout const auto router_block_type = cluster_ctx.clb_nlist.block_type(noc_ctx.noc_traffic_flows_storage.get_router_clusters_in_netlist()[0]); // Get the compressed grid for NoC - const auto& compressed_noc_grid = place_ctx.compressed_block_grids[router_block_type->index]; + const auto& compressed_noc_grid = compressed_grids[router_block_type->index]; // Iterate over shuffled physical routers to place logical routers // Since physical routers are shuffled, router placement would be random @@ -147,7 +148,7 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout t_pl_loc loc(router_phy_loc, sub_tile); - if (place_ctx.grid_blocks.is_sub_tile_empty(router_phy_loc, sub_tile)) { + if (grid_blocks.is_sub_tile_empty(router_phy_loc, sub_tile)) { // Pick one of the unplaced routers auto logical_router_bid = unfixed_routers.back(); unfixed_routers.pop_back(); From 017b08d0b79b66fb3c787c4641ba72ad47a66821 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 17:39:11 -0400 Subject: [PATCH 039/146] remove place_ctx.grid_blocks accesses from move_utils and move_transactions --- vpr/src/place/centroid_move_generator.cpp | 2 +- .../place/critical_uniform_move_generator.cpp | 2 +- .../place/feasible_region_move_generator.cpp | 8 +- vpr/src/place/initial_noc_placement.cpp | 4 +- vpr/src/place/manual_move_generator.cpp | 2 +- vpr/src/place/median_move_generator.cpp | 2 +- vpr/src/place/move_transactions.cpp | 28 ++-- vpr/src/place/move_transactions.h | 5 +- vpr/src/place/move_utils.cpp | 154 +++++++++--------- vpr/src/place/move_utils.h | 16 +- vpr/src/place/noc_place_utils.cpp | 6 +- vpr/src/place/noc_place_utils.h | 2 +- vpr/src/place/place.cpp | 8 +- vpr/src/place/uniform_move_generator.cpp | 2 +- .../weighted_centroid_move_generator.cpp | 2 +- .../place/weighted_median_move_generator.cpp | 2 +- 16 files changed, 129 insertions(+), 116 deletions(-) diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index d5b50b8f4d7..2f94f0f06da 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -86,7 +86,7 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index fe5dc9b7d2f..dc889ea851a 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -37,7 +37,7 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 77cab4f27b6..4939a97aa2f 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -1,10 +1,12 @@ #include "feasible_region_move_generator.h" + #include "globals.h" -#include -#include "math.h" #include "place_constraints.h" #include "move_utils.h" +#include +#include + FeasibleRegionMoveGenerator::FeasibleRegionMoveGenerator(PlacerContext& placer_ctx) : MoveGenerator(placer_ctx) {} @@ -128,7 +130,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index 38719e7b933..dc1e8d4787a 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -231,7 +231,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, clear_move_blocks(blocks_affected); // Shrink the range limit over time float r_lim_decayed = 1.0f + (N_MOVES - i_move) * (max_r_lim / N_MOVES); - e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, block_locs); + e_create_move create_move_outcome = propose_router_swap(blocks_affected, r_lim_decayed, place_loc_vars); if (create_move_outcome != e_create_move::ABORT) { apply_move_blocks(blocks_affected, place_loc_vars); @@ -245,7 +245,7 @@ static void noc_routers_anneal(const t_noc_opts& noc_opts, if (move_accepted) { costs.cost += delta_cost; - commit_move_blocks(blocks_affected); + commit_move_blocks(blocks_affected, place_loc_vars.mutable_grid_blocks()); commit_noc_costs(); costs += noc_delta_c; // check if the current placement is better than the stored checkpoint diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index 01f726ecb92..d13d77b0859 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -64,7 +64,7 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_ctx.place_loc_vars()); return create_move; } diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 52cf1a1c1e5..79fb3bc91b7 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -173,7 +173,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/move_transactions.cpp b/vpr/src/place/move_transactions.cpp index 690290aea4e..4658d333f9f 100644 --- a/vpr/src/place/move_transactions.cpp +++ b/vpr/src/place/move_transactions.cpp @@ -7,14 +7,14 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId blk, t_pl_loc to, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { auto res = blocks_affected.moved_to.emplace(to); if (!res.second) { log_move_abort("duplicate block move to location"); return e_block_move_result::ABORT; } - t_pl_loc from = block_locs[blk].loc; + t_pl_loc from = place_loc_vars.block_locs()[blk].loc; auto res2 = blocks_affected.moved_from.emplace(from); if (!res2.second) { @@ -22,7 +22,7 @@ e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, return e_block_move_result::ABORT; } - VTR_ASSERT_SAFE(to.sub_tile < int(g_vpr_ctx.placement().grid_blocks.num_blocks_at_location({to.x, to.y, to.layer}))); + VTR_ASSERT_SAFE(to.sub_tile < int(place_loc_vars.grid_blocks().num_blocks_at_location({to.x, to.y, to.layer}))); // Sets up the blocks moved int imoved_blk = blocks_affected.num_moved_blocks; @@ -64,8 +64,8 @@ void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, //Commits the blocks in blocks_affected to their new locations (updates inverse //lookups via place_ctx.grid_blocks) -void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); +void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, + GridBlock& grid_blocks) { /* Swap physical location */ for (int iblk = 0; iblk < blocks_affected.num_moved_blocks; ++iblk) { @@ -75,19 +75,19 @@ void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected) { const t_pl_loc& from = blocks_affected.moved_blocks[iblk].old_loc; //Remove from old location only if it hasn't already been updated by a previous block update - if (place_ctx.grid_blocks.block_at_location(from) == blk) { - place_ctx.grid_blocks.set_block_at_location(from, EMPTY_BLOCK_ID); - place_ctx.grid_blocks.set_usage({from.x, from.y, from.layer}, - place_ctx.grid_blocks.get_usage({from.x, from.y, from.layer}) - 1); + if (grid_blocks.block_at_location(from) == blk) { + grid_blocks.set_block_at_location(from, EMPTY_BLOCK_ID); + grid_blocks.set_usage({from.x, from.y, from.layer}, + grid_blocks.get_usage({from.x, from.y, from.layer}) - 1); } //Add to new location - if (place_ctx.grid_blocks.block_at_location(to) == EMPTY_BLOCK_ID) { + if (grid_blocks.block_at_location(to) == EMPTY_BLOCK_ID) { //Only need to increase usage if previously unused - place_ctx.grid_blocks.set_usage({to.x, to.y, to.layer}, - place_ctx.grid_blocks.get_usage({to.x, to.y, to.layer}) + 1); + grid_blocks.set_usage({to.x, to.y, to.layer}, + grid_blocks.get_usage({to.x, to.y, to.layer}) + 1); } - place_ctx.grid_blocks.set_block_at_location(to, blk); + grid_blocks.set_block_at_location(to, blk); } // Finish updating clb for all blocks } @@ -117,7 +117,7 @@ void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, place_sync_external_block_connections(blk, place_loc_vars); } - VTR_ASSERT_SAFE_MSG(g_vpr_ctx.placement().grid_blocks.block_at_location(old_loc) == blk, + VTR_ASSERT_SAFE_MSG(place_loc_vars.grid_blocks().block_at_location(old_loc) == blk, "Grid blocks should only have been updated if swap committed (not reverted)"); } } diff --git a/vpr/src/place/move_transactions.h b/vpr/src/place/move_transactions.h index 88c40d0bc45..108f2ce53a3 100644 --- a/vpr/src/place/move_transactions.h +++ b/vpr/src/place/move_transactions.h @@ -55,12 +55,13 @@ enum class e_block_move_result { e_block_move_result record_block_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId blk, t_pl_loc to, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); void apply_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, PlaceLocVars& place_loc_vars); -void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected); +void commit_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, + GridBlock& grid_blocks); void revert_move_blocks(const t_pl_blocks_to_be_moved& blocks_affected, PlaceLocVars& place_loc_vars); diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 6de78d0d1b4..e32718c8c03 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -40,14 +40,15 @@ void report_aborted_moves() { e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to, - const vtr::vector_map& block_locs) { - e_block_move_result outcome = find_affected_blocks(blocks_affected, b_from, to, block_locs); + const PlaceLocVars& place_loc_vars) { + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); + e_block_move_result outcome = find_affected_blocks(blocks_affected, b_from, to, place_loc_vars); if (outcome == e_block_move_result::INVERT) { //Try inverting the swap direction - auto& place_ctx = g_vpr_ctx.placement(); - ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId b_to = grid_blocks.block_at_location(to); if (!b_to) { log_move_abort("inverted move no to block"); @@ -55,7 +56,7 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, } else { t_pl_loc from = block_locs[b_from].loc; - outcome = find_affected_blocks(blocks_affected, b_to, from, block_locs); + outcome = find_affected_blocks(blocks_affected, b_to, from, place_loc_vars); if (outcome == e_block_move_result::INVERT) { log_move_abort("inverted move recursion"); @@ -64,8 +65,7 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, } } - if (outcome == e_block_move_result::VALID - || outcome == e_block_move_result::INVERT_VALID) { + if (outcome == e_block_move_result::VALID || outcome == e_block_move_result::INVERT_VALID) { return e_create_move::VALID; } else { VTR_ASSERT_SAFE(outcome == e_block_move_result::ABORT); @@ -76,20 +76,20 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { /* Finds and set ups the affected_blocks array. * Returns abort_swap. */ VTR_ASSERT_SAFE(b_from); + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + int imacro_from; e_block_move_result outcome = e_block_move_result::VALID; - auto& place_ctx = g_vpr_ctx.placement(); - t_pl_loc from = block_locs[b_from].loc; - auto& pl_macros = place_ctx.pl_macros; - get_imacro_from_iblk(&imacro_from, b_from, pl_macros); if (imacro_from != -1) { // b_from is part of a macro, I need to swap the whole macro @@ -98,12 +98,12 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte t_pl_offset swap_offset = to - from; int imember_from = 0; - outcome = record_macro_swaps(blocks_affected, imacro_from, imember_from, swap_offset, block_locs); + outcome = record_macro_swaps(blocks_affected, imacro_from, imember_from, swap_offset, place_loc_vars); VTR_ASSERT_SAFE(outcome != e_block_move_result::VALID || imember_from == int(pl_macros[imacro_from].members.size())); } else { - ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId b_to = grid_blocks.block_at_location(to); int imacro_to = -1; get_imacro_from_iblk(&imacro_to, b_to, pl_macros); @@ -115,7 +115,7 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte outcome = e_block_move_result::INVERT; } else { // This is not a macro - I could use the from and to info from before - outcome = record_single_block_swap(blocks_affected, b_from, to, block_locs); + outcome = record_single_block_swap(blocks_affected, b_from, to, place_loc_vars); } } // Finish handling cases for blocks in macro and otherwise @@ -126,21 +126,21 @@ e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affecte e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { /* Find all the blocks affected when b_from is swapped with b_to. * Returns abort_swap. */ - VTR_ASSERT_SAFE(b_from); - auto& place_ctx = g_vpr_ctx.mutable_placement(); + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); if (block_locs[b_from].is_fixed) { return e_block_move_result::ABORT; } - VTR_ASSERT_SAFE(to.sub_tile < int(place_ctx.grid_blocks.num_blocks_at_location({to.x, to.y, to.layer}))); + VTR_ASSERT_SAFE(to.sub_tile < int(grid_blocks.num_blocks_at_location({to.x, to.y, to.layer}))); - ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId b_to = grid_blocks.block_at_location(to); t_pl_loc curr_from = block_locs[b_from].loc; @@ -149,25 +149,25 @@ e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_aff // Check whether the to_location is empty if (b_to == EMPTY_BLOCK_ID) { // Sets up the blocks moved - outcome = record_block_move(blocks_affected, b_from, to, block_locs); + outcome = record_block_move(blocks_affected, b_from, to, place_loc_vars); } else if (b_to != INVALID_BLOCK_ID) { // Check whether block to is compatible with from location if (b_to != EMPTY_BLOCK_ID && b_to != INVALID_BLOCK_ID) { - if (!(is_legal_swap_to_location(b_to, curr_from, block_locs)) || block_locs[b_to].is_fixed) { + if (!(is_legal_swap_to_location(b_to, curr_from, place_loc_vars)) || block_locs[b_to].is_fixed) { return e_block_move_result::ABORT; } } // Sets up the blocks moved - outcome = record_block_move(blocks_affected, b_from, to, block_locs); + outcome = record_block_move(blocks_affected, b_from, to, place_loc_vars); if (outcome != e_block_move_result::VALID) { return outcome; } t_pl_loc from = block_locs[b_from].loc; - outcome = record_block_move(blocks_affected, b_to, from, block_locs); + outcome = record_block_move(blocks_affected, b_to, from, place_loc_vars); } // Finish swapping the blocks and setting up blocks_affected @@ -181,9 +181,10 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, int& imember_from, t_pl_offset swap_offset, - const vtr::vector_map& block_locs) { - auto& place_ctx = g_vpr_ctx.placement(); - auto& pl_macros = place_ctx.pl_macros; + const PlaceLocVars& place_loc_vars) { + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); e_block_move_result outcome = e_block_move_result::VALID; @@ -203,11 +204,11 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, // //Note that we need to explicitly check that the types match, since the device floorplan is not //(necessarily) translationally invariant for an arbitrary macro - if (!is_legal_swap_to_location(curr_b_from, curr_to, block_locs)) { + if (!is_legal_swap_to_location(curr_b_from, curr_to, place_loc_vars)) { log_move_abort("macro_from swap to location illegal"); outcome = e_block_move_result::ABORT; } else { - ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(curr_to); + ClusterBlockId b_to = grid_blocks.block_at_location(curr_to); int imacro_to = -1; get_imacro_from_iblk(&imacro_to, b_to, pl_macros); @@ -215,7 +216,7 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, //To block is a macro if (imacro_from == imacro_to) { - outcome = record_macro_self_swaps(blocks_affected, imacro_from, swap_offset, block_locs); + outcome = record_macro_self_swaps(blocks_affected, imacro_from, swap_offset, place_loc_vars); imember_from = pl_macros[imacro_from].members.size(); break; //record_macro_self_swaps() handles this case completely, so we don't need to continue the loop } else { @@ -227,7 +228,7 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, } } else { //To block is not a macro - outcome = record_single_block_swap(blocks_affected, curr_b_from, curr_to, block_locs); + outcome = record_single_block_swap(blocks_affected, curr_b_from, curr_to, place_loc_vars); } } } // Finish going through all the blocks in the macro @@ -243,7 +244,7 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff const int imacro_to, ClusterBlockId blk_to, t_pl_offset swap_offset, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { //Adds the macro imacro_to to the set of affected block caused by swapping 'blk_to' to its //new position. // @@ -251,16 +252,17 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff //The position in the from macro ('imacro_from') is specified by 'imember_from', and the relevant //macro fro the to block is 'imacro_to'. - auto& place_ctx = g_vpr_ctx.placement(); + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& block_locs = place_loc_vars.block_locs(); //At the moment, we only support blk_to being the first element of the 'to' macro. // //For instance, this means that we can swap two carry chains so long as one starts //below the other (not a big limitation since swapping in the opposite direction //allows these blocks to swap) - if (place_ctx.pl_macros[imacro_to].members[0].blk_index != blk_to) { + if (pl_macros[imacro_to].members[0].blk_index != blk_to) { int imember_to = 0; - auto outcome = record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset, block_locs); + auto outcome = record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset, place_loc_vars); if (outcome == e_block_move_result::INVERT) { log_move_abort("invert recursion2"); outcome = e_block_move_result::ABORT; @@ -271,7 +273,7 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff } //From/To blocks should be exactly the swap offset appart - ClusterBlockId blk_from = place_ctx.pl_macros[imacro_from].members[imember_from].blk_index; + ClusterBlockId blk_from = pl_macros[imacro_from].members[imember_from].blk_index; VTR_ASSERT_SAFE(block_locs[blk_from].loc + swap_offset == block_locs[blk_to].loc); //Continue walking along the overlapping parts of the from and to macros, recording @@ -289,47 +291,47 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff // //NOTE: We mutate imember_from so the outer from macro walking loop moves in lock-step int imember_to = 0; - t_pl_offset from_to_macro_offset = place_ctx.pl_macros[imacro_from].members[imember_from].offset; - for (; imember_from < int(place_ctx.pl_macros[imacro_from].members.size()) && imember_to < int(place_ctx.pl_macros[imacro_to].members.size()); + t_pl_offset from_to_macro_offset = pl_macros[imacro_from].members[imember_from].offset; + for (; imember_from < int(pl_macros[imacro_from].members.size()) && imember_to < int(pl_macros[imacro_to].members.size()); ++imember_from, ++imember_to) { //Check that both macros have the same shape while they overlap - if (place_ctx.pl_macros[imacro_from].members[imember_from].offset != place_ctx.pl_macros[imacro_to].members[imember_to].offset + from_to_macro_offset) { + if (pl_macros[imacro_from].members[imember_from].offset != pl_macros[imacro_to].members[imember_to].offset + from_to_macro_offset) { log_move_abort("macro shapes disagree"); return e_block_move_result::ABORT; } - ClusterBlockId b_from = place_ctx.pl_macros[imacro_from].members[imember_from].blk_index; + ClusterBlockId b_from = pl_macros[imacro_from].members[imember_from].blk_index; t_pl_loc curr_to = block_locs[b_from].loc + swap_offset; t_pl_loc curr_from = block_locs[b_from].loc; - ClusterBlockId b_to = place_ctx.pl_macros[imacro_to].members[imember_to].blk_index; + ClusterBlockId b_to = pl_macros[imacro_to].members[imember_to].blk_index; VTR_ASSERT_SAFE(curr_to == block_locs[b_to].loc); // Check whether block to is compatible with from location if (b_to != EMPTY_BLOCK_ID && b_to != INVALID_BLOCK_ID) { - if (!(is_legal_swap_to_location(b_to, curr_from, block_locs))) { + if (!(is_legal_swap_to_location(b_to, curr_from, place_loc_vars))) { return e_block_move_result::ABORT; } } - if (!is_legal_swap_to_location(b_from, curr_to, block_locs)) { + if (!is_legal_swap_to_location(b_from, curr_to, place_loc_vars)) { log_move_abort("macro_from swap to location illegal"); return e_block_move_result::ABORT; } - auto outcome = record_single_block_swap(blocks_affected, b_from, curr_to, block_locs); + auto outcome = record_single_block_swap(blocks_affected, b_from, curr_to, place_loc_vars); if (outcome != e_block_move_result::VALID) { return outcome; } } - if (imember_to < int(place_ctx.pl_macros[imacro_to].members.size())) { + if (imember_to < int(pl_macros[imacro_to].members.size())) { //The to macro extends beyond the from macro. // //Swap the remainder of the 'to' macro to locations after the 'from' macro. //Note that we are swapping in the opposite direction so the swap offsets are inverted. - return record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset, block_locs); + return record_macro_swaps(blocks_affected, imacro_to, imember_to, -swap_offset, place_loc_vars); } return e_block_move_result::VALID; @@ -345,25 +347,27 @@ e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, std::vector& displaced_blocks, const int imacro, t_pl_offset swap_offset, - const vtr::vector_map& block_locs) { - auto& place_ctx = g_vpr_ctx.placement(); + const PlaceLocVars& place_loc_vars) { + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); - for (const t_pl_macro_member& member : place_ctx.pl_macros[imacro].members) { + for (const t_pl_macro_member& member : pl_macros[imacro].members) { t_pl_loc from = block_locs[member.blk_index].loc; t_pl_loc to = from + swap_offset; - if (!is_legal_swap_to_location(member.blk_index, to, block_locs)) { + if (!is_legal_swap_to_location(member.blk_index, to, place_loc_vars)) { log_move_abort("macro move to location illegal"); return e_block_move_result::ABORT; } - ClusterBlockId blk_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId blk_to = grid_blocks.block_at_location(to); - record_block_move(blocks_affected, member.blk_index, to, block_locs); + record_block_move(blocks_affected, member.blk_index, to, place_loc_vars); int imacro_to = -1; - get_imacro_from_iblk(&imacro_to, blk_to, place_ctx.pl_macros); + get_imacro_from_iblk(&imacro_to, blk_to, pl_macros); if (blk_to && imacro_to != imacro) { //Block displaced only if exists and not part of current macro displaced_blocks.push_back(blk_to); } @@ -377,31 +381,34 @@ e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, e_block_move_result identify_macro_self_swap_affected_macros(std::vector& macros, const int imacro, t_pl_offset swap_offset, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); + e_block_move_result outcome = e_block_move_result::VALID; - auto& place_ctx = g_vpr_ctx.placement(); - for (size_t imember = 0; imember < place_ctx.pl_macros[imacro].members.size() && outcome == e_block_move_result::VALID; ++imember) { - ClusterBlockId blk = place_ctx.pl_macros[imacro].members[imember].blk_index; + for (size_t imember = 0; imember < pl_macros[imacro].members.size() && outcome == e_block_move_result::VALID; ++imember) { + ClusterBlockId blk = pl_macros[imacro].members[imember].blk_index; t_pl_loc from = block_locs[blk].loc; t_pl_loc to = from + swap_offset; - if (!is_legal_swap_to_location(blk, to, block_locs)) { + if (!is_legal_swap_to_location(blk, to, place_loc_vars)) { log_move_abort("macro move to location illegal"); return e_block_move_result::ABORT; } - ClusterBlockId blk_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId blk_to = grid_blocks.block_at_location(to); int imacro_to = -1; - get_imacro_from_iblk(&imacro_to, blk_to, place_ctx.pl_macros); + get_imacro_from_iblk(&imacro_to, blk_to, pl_macros); if (imacro_to != -1) { auto itr = std::find(macros.begin(), macros.end(), imacro_to); if (itr == macros.end()) { macros.push_back(imacro_to); - outcome = identify_macro_self_swap_affected_macros(macros, imacro_to, swap_offset, block_locs); + outcome = identify_macro_self_swap_affected_macros(macros, imacro_to, swap_offset, place_loc_vars); } } } @@ -411,15 +418,15 @@ e_block_move_result identify_macro_self_swap_affected_macros(std::vector& m e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro, t_pl_offset swap_offset, - const vtr::vector_map& block_locs) { - auto& place_ctx = g_vpr_ctx.placement(); + const PlaceLocVars& place_loc_vars) { + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; //Reset any partial move clear_move_blocks(blocks_affected); //Collect the macros affected std::vector affected_macros; - auto outcome = identify_macro_self_swap_affected_macros(affected_macros, imacro, swap_offset, block_locs); + auto outcome = identify_macro_self_swap_affected_macros(affected_macros, imacro, swap_offset, place_loc_vars); if (outcome != e_block_move_result::VALID) { return outcome; @@ -432,7 +439,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe //Move all the affected macros by the offset for (int imacro_affected : affected_macros) { - outcome = record_macro_move(blocks_affected, displaced_blocks, imacro_affected, swap_offset, block_locs); + outcome = record_macro_move(blocks_affected, displaced_blocks, imacro_affected, swap_offset, place_loc_vars); if (outcome != e_block_move_result::VALID) { return outcome; @@ -441,7 +448,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe auto is_non_macro_block = [&](ClusterBlockId blk) { int imacro_blk = -1; - get_imacro_from_iblk(&imacro_blk, blk, place_ctx.pl_macros); + get_imacro_from_iblk(&imacro_blk, blk, pl_macros); if (std::find(affected_macros.begin(), affected_macros.end(), imacro_blk) != affected_macros.end()) { return false; @@ -460,7 +467,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe //Fit the displaced blocks into the empty locations auto loc_itr = empty_locs.begin(); for (auto blk : non_macro_displaced_blocks) { - outcome = record_block_move(blocks_affected, blk, *loc_itr, block_locs); + outcome = record_block_move(blocks_affected, blk, *loc_itr, place_loc_vars); ++loc_itr; } @@ -469,18 +476,19 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe bool is_legal_swap_to_location(ClusterBlockId blk, t_pl_loc to, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { //Make sure that the swap_to location is valid //It must be: // * on chip, and // * match the correct block type // //Note that we need to explicitly check that the types match, since the device floorplan is not - //(neccessarily) translationally invariant for an arbitrary macro + //(necessarily) translationally invariant for an arbitrary macro + const auto& device_ctx = g_vpr_ctx.device(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& block_locs = place_loc_vars.block_locs(); + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); - auto& device_ctx = g_vpr_ctx.device(); - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); if (to.x < 0 || to.x >= int(device_ctx.grid.width()) || to.y < 0 || to.y >= int(device_ctx.grid.height()) @@ -497,7 +505,7 @@ bool is_legal_swap_to_location(ClusterBlockId blk, return false; } // If the destination block is user constrained, abort this swap - ClusterBlockId b_to = place_ctx.grid_blocks.block_at_location(to); + ClusterBlockId b_to = grid_blocks.block_at_location(to); if (b_to != INVALID_BLOCK_ID && b_to != EMPTY_BLOCK_ID) { if (block_locs[b_to].is_fixed) { return false; diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index fc82c755ecf..371eddffdbe 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -110,7 +110,7 @@ void report_aborted_moves(); e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); /** * @brief Find the blocks that will be affected by a move of b_from to to_loc @@ -123,18 +123,18 @@ e_create_move create_move(t_pl_blocks_to_be_moved& blocks_affected, e_block_move_result find_affected_blocks(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); e_block_move_result record_single_block_swap(t_pl_blocks_to_be_moved& blocks_affected, ClusterBlockId b_from, t_pl_loc to, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, int& imember_from, t_pl_offset swap_offset, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro_from, @@ -148,17 +148,17 @@ e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, std::vector& displaced_blocks, const int imacro, t_pl_offset swap_offset, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); e_block_move_result identify_macro_self_swap_affected_macros(std::vector& macros, const int imacro, t_pl_offset swap_offset, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affected, const int imacro, t_pl_offset swap_offset, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); /** * @brief Check whether the "to" location is legal for the given "blk" @@ -168,7 +168,7 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe */ bool is_legal_swap_to_location(ClusterBlockId blk, t_pl_loc to, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); std::set determine_locations_emptied_by_move(t_pl_blocks_to_be_moved& blocks_affected); diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index f8f28b1855f..bd2b86e1a2d 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -829,7 +829,7 @@ static bool select_random_router_cluster(ClusterBlockId& b_from, e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, float rlim, - const vtr::vector_map& block_locs) { + const PlaceLocVars& place_loc_vars) { // block ID for the randomly selected router cluster ClusterBlockId b_from; // current location of the randomly selected router cluster @@ -838,7 +838,7 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, t_logical_block_type_ptr cluster_from_type; // Randomly select a router cluster - bool random_select_success = select_random_router_cluster(b_from, from, cluster_from_type, block_locs); + bool random_select_success = select_random_router_cluster(b_from, from, cluster_from_type, place_loc_vars.block_locs()); // If a random router cluster could not be selected, no move can be proposed if (!random_select_success) { @@ -852,7 +852,7 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_loc_vars); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/noc_place_utils.h b/vpr/src/place/noc_place_utils.h index dbd54724182..5a3ece3d862 100644 --- a/vpr/src/place/noc_place_utils.h +++ b/vpr/src/place/noc_place_utils.h @@ -538,7 +538,7 @@ bool check_for_router_swap(int user_supplied_noc_router_swap_percentage); */ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, float rlim, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); /** * @brief Writes out the locations of the router cluster blocks in the diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 44928dcda98..6767e948d6d 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1324,7 +1324,7 @@ static e_move_result try_swap(const t_annealing_state* state, #endif //NO_GRAPHICS } else if (router_block_move) { // generate a move where two random router blocks are swapped - create_move_outcome = propose_router_swap(blocks_affected, rlim, block_locs); + create_move_outcome = propose_router_swap(blocks_affected, rlim, placer_ctx.place_loc_vars()); proposed_action.move_type = e_move_type::UNIFORM; } else { //Generate a new move (perturbation) used to explore the space of possible placements @@ -1336,7 +1336,9 @@ static e_move_result try_swap(const t_annealing_state* state, } LOG_MOVE_STATS_PROPOSED(t, blocks_affected); - VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "\t\tBefore move Place cost %e, bb_cost %e, timing cost %e\n", costs->cost, costs->bb_cost, costs->timing_cost); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, + "\t\tBefore move Place cost %e, bb_cost %e, timing cost %e\n", + costs->cost, costs->bb_cost, costs->timing_cost); e_move_result move_outcome = e_move_result::ABORTED; @@ -1477,7 +1479,7 @@ static e_move_result try_swap(const t_annealing_state* state, g_vpr_ctx.placement().cube_bb); /* Update clb data structures since we kept the move. */ - commit_move_blocks(blocks_affected); + commit_move_blocks(blocks_affected, placer_ctx.get_mutable_grid_blocks()); if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat ++move_type_stat.accepted_moves[proposed_action.logical_blk_type_index][(int)proposed_action.move_type]; diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index ce80d3babe5..fe48795b6e5 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -49,7 +49,7 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks VTR_LOG("\n"); #endif - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index b81b4d50778..7ffe1b071c2 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -49,7 +49,7 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index 2d851920ee5..4ff17eabeb8 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -138,7 +138,7 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, block_locs); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { From 1f84809048f0df6d32413a5bd0f3b3a8d113a687 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 18:10:35 -0400 Subject: [PATCH 040/146] remove place_ctx.grid_block from find_empty_compatible_subtile --- vpr/src/place/centroid_move_generator.cpp | 6 ++- .../place/critical_uniform_move_generator.cpp | 2 +- .../place/feasible_region_move_generator.cpp | 11 ++--- vpr/src/place/initial_placement.cpp | 24 +++++++---- vpr/src/place/median_move_generator.cpp | 12 +++--- vpr/src/place/move_utils.cpp | 42 +++++++++++-------- vpr/src/place/move_utils.h | 23 ++++++---- vpr/src/place/noc_place_utils.cpp | 2 +- vpr/src/place/place_util.cpp | 2 +- vpr/src/place/uniform_move_generator.cpp | 9 ++-- .../weighted_centroid_move_generator.cpp | 11 ++--- .../place/weighted_median_move_generator.cpp | 9 ++-- 12 files changed, 93 insertions(+), 60 deletions(-) diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index 2f94f0f06da..e1252b0afb0 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -48,6 +48,8 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block const auto& device_ctx = g_vpr_ctx.device(); const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = placer_ctx.mutable_move(); + const auto& place_loc_vars = placer_ctx.place_loc_vars(); + // Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); @@ -82,11 +84,11 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block // layer for the centroid location. So if the layer is not valid, we set it to the same layer as from loc. centroid.layer = (centroid.layer < 0) ? from.layer : centroid.layer; /* Find a location near the weighted centroid_loc */ - if (!find_to_loc_centroid(cluster_from_type, from, centroid, range_limiters, to, b_from)) { + if (!find_to_loc_centroid(cluster_from_type, from, centroid, range_limiters, to, b_from, place_loc_vars)) { return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_loc_vars); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index dc889ea851a..db6ee63a919 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -33,7 +33,7 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved t_pl_loc to; to.layer = from.layer; - if (!find_to_loc_uniform(cluster_from_type, rlim, from, to, b_from)) { + if (!find_to_loc_uniform(cluster_from_type, rlim, from, to, b_from, placer_ctx.place_loc_vars())) { return e_create_move::ABORT; } diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 4939a97aa2f..793170e2522 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -15,10 +15,11 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) { - auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_.get(); auto& place_move_ctx = placer_ctx.mutable_move(); - auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.get_block_locs(); + const auto& place_loc_vars = placer_ctx.place_loc_vars(); ClusterNetId net_from; int pin_from; @@ -117,7 +118,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& placer_opts.place_dm_rlim}; // Try to find a legal location inside the feasible region - if (!find_to_loc_median(cluster_from_type, from, &FR_coords, to, b_from)) { + if (!find_to_loc_median(cluster_from_type, from, &FR_coords, to, b_from, place_loc_vars)) { /** If there is no legal location in the feasible region, calculate the center of the FR and try to find a legal location * in a range around this center. */ @@ -126,11 +127,11 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& center.y = (FR_coords.ymin + FR_coords.ymax) / 2; // TODO: Currently, we don't move blocks between different types of layers center.layer = from.layer; - if (!find_to_loc_centroid(cluster_from_type, from, center, range_limiters, to, b_from)) + if (!find_to_loc_centroid(cluster_from_type, from, center, range_limiters, to, b_from, place_loc_vars)) return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_loc_vars); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index dacffe6f700..2ed1cc7e4db 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -173,7 +173,10 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, * * @return true if the function can find any location near the centroid one, false otherwise. */ -static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ptr block_type, bool search_for_empty); +static bool find_centroid_neighbor(t_pl_loc& centroid_loc, + t_logical_block_type_ptr block_type, + bool search_for_empty, + const PlaceLocVars& place_loc_vars); /** * @brief tries to place a macro at a centroid location of its placed connections. @@ -324,7 +327,10 @@ static bool is_loc_legal(const t_pl_loc& loc, return legal; } -static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ptr block_type, bool search_for_empty) { +static bool find_centroid_neighbor(t_pl_loc& centroid_loc, + t_logical_block_type_ptr block_type, + bool search_for_empty, + const PlaceLocVars& place_loc_vars) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; const int num_layers = g_vpr_ctx.device().grid.get_num_layers(); const int centroid_loc_layer_num = centroid_loc.layer; @@ -356,9 +362,10 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, t_logical_block_type_ {cx_from, cy_from, layer_from}, search_range, to_compressed_loc, - false, + /*is_median=*/false, centroid_loc_layer_num, - search_for_empty); + search_for_empty, + place_loc_vars); if (!legal) { return false; @@ -490,7 +497,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, //try to find a near location that meet these requirements bool neighbor_legal_loc = false; if (!is_loc_legal(centroid_loc, pr, block_type)) { - neighbor_legal_loc = find_centroid_neighbor(centroid_loc, block_type, false); + neighbor_legal_loc = find_centroid_neighbor(centroid_loc, block_type, false, place_loc_vars); if (!neighbor_legal_loc) { //no neighbor candidate found return false; } @@ -680,9 +687,12 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, min_compressed_loc.y, max_compressed_loc.y, selected_layer, selected_layer}, to_compressed_loc, - false, + /*is_median=*/false, selected_layer, - false); + /*search_for_empty=*/false, + place_loc_vars); + + if (!legal) { //No valid position found return false; diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 79fb3bc91b7..d57243087a0 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -12,12 +12,12 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) { - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& device_ctx = g_vpr_ctx.device(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& device_ctx = g_vpr_ctx.device(); auto& placer_ctx = placer_ctx_.get(); auto& place_move_ctx = placer_ctx.mutable_move(); - auto& block_locs = placer_ctx.get_block_locs(); - + const auto& block_locs = placer_ctx.get_block_locs(); + const auto& place_loc_vars = placer_ctx.place_loc_vars(); //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, @@ -169,11 +169,11 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ median_point.y = (limit_coords.ymin + limit_coords.ymax) / 2; median_point.layer = (limit_coords.layer_min + limit_coords.layer_max) / 2; - if (!find_to_loc_centroid(cluster_from_type, from, median_point, range_limiters, to, b_from)) { + if (!find_to_loc_centroid(cluster_from_type, from, median_point, range_limiters, to, b_from, place_loc_vars)) { return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_loc_vars); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index e32718c8c03..2f8b80df224 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -742,9 +742,10 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, bool find_to_loc_uniform(t_logical_block_type_ptr type, float rlim, - const t_pl_loc from, + const t_pl_loc& from, t_pl_loc& to, - ClusterBlockId b_from) { + ClusterBlockId b_from, + const PlaceLocVars& place_loc_vars) { //Finds a legal swap to location for the given type, starting from 'from.x' and 'from.y' // //Note that the range limit (rlim) is applied in a logical sense (i.e. 'compressed' grid space consisting @@ -791,9 +792,10 @@ bool find_to_loc_uniform(t_logical_block_type_ptr type, compressed_locs[to_layer_num], search_range, to_compressed_loc, - false, + /*is_median=*/false, to_layer_num, - false); + /*search_for_empty=*/false, + place_loc_vars); if (!legal) { //No valid position found @@ -832,7 +834,8 @@ bool find_to_loc_median(t_logical_block_type_ptr blk_type, const t_pl_loc& from_loc, const t_bb* limit_coords, t_pl_loc& to_loc, - ClusterBlockId b_from) { + ClusterBlockId b_from, + const PlaceLocVars& place_loc_vars) { int num_layers = g_vpr_ctx.device().grid.get_num_layers(); const int to_layer_num = to_loc.layer; VTR_ASSERT(to_layer_num != OPEN); @@ -888,9 +891,10 @@ bool find_to_loc_median(t_logical_block_type_ptr blk_type, from_compressed_locs[to_layer_num], search_range, to_compressed_loc, - true, + /*is_median=*/true, to_layer_num, - false); + /*search_for_empty=*/false, + place_loc_vars); if (!legal) { //No valid position found @@ -921,7 +925,8 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, const t_pl_loc& centroid, const t_range_limiters& range_limiters, t_pl_loc& to_loc, - ClusterBlockId b_from) { + ClusterBlockId b_from, + const PlaceLocVars& place_loc_vars) { //Retrieve the compressed block grid for this block type const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[blk_type->index]; const int to_layer_num = centroid.layer; @@ -974,9 +979,10 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, from_compressed_loc[to_layer_num], search_range, to_compressed_loc, - false, + /*is_median=*/false, to_layer_num, - false); + /*search_for_empty=*/false, + place_loc_vars); if (!legal) { //No valid position found @@ -1037,9 +1043,9 @@ void compressed_grid_to_loc(t_logical_block_type_ptr blk_type, } int find_empty_compatible_subtile(t_logical_block_type_ptr type, - const t_physical_tile_loc& to_loc) { + const t_physical_tile_loc& to_loc, + const GridBlock& grid_blocks) { auto& device_ctx = g_vpr_ctx.device(); - auto& place_ctx = g_vpr_ctx.placement(); const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[type->index]; int return_sub_tile = -1; @@ -1047,10 +1053,11 @@ int find_empty_compatible_subtile(t_logical_block_type_ptr type, t_pl_loc to_uncompressed_loc; compressed_grid_to_loc(type, to_loc, to_uncompressed_loc); const t_physical_tile_loc to_phy_uncompressed_loc{to_uncompressed_loc.x, to_uncompressed_loc.y, to_uncompressed_loc.layer}; - const auto& phy_type = device_ctx.grid.get_physical_type(to_phy_uncompressed_loc); + const t_physical_tile_type_ptr phy_type = device_ctx.grid.get_physical_type(to_phy_uncompressed_loc); const auto& compatible_sub_tiles = compressed_block_grid.compatible_sub_tiles_for_tile.at(phy_type->index); - for (const auto& sub_tile : compatible_sub_tiles) { - if (place_ctx.grid_blocks.is_sub_tile_empty(to_phy_uncompressed_loc, sub_tile)) { + + for (const int sub_tile : compatible_sub_tiles) { + if (grid_blocks.is_sub_tile_empty(to_phy_uncompressed_loc, sub_tile)) { return_sub_tile = sub_tile; break; } @@ -1066,7 +1073,8 @@ bool find_compatible_compressed_loc_in_range(t_logical_block_type_ptr type, t_physical_tile_loc& to_loc, bool is_median, int to_layer_num, - bool search_for_empty) { + bool search_for_empty, + const PlaceLocVars& place_loc_vars) { //TODO For the time being, the blocks only moved in the same layer. This assertion should be removed after VPR is updated to move blocks between layers VTR_ASSERT(to_layer_num == from_loc.layer_num); const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[type->index]; @@ -1149,7 +1157,7 @@ bool find_compatible_compressed_loc_in_range(t_logical_block_type_ptr type, if (from_loc.x == to_loc.x && from_loc.y == to_loc.y && from_loc.layer_num == to_layer_num) { continue; //Same from/to location -- try again for new y-position } else if (search_for_empty) { // Check if the location has at least one empty sub-tile - legal = find_empty_compatible_subtile(type, to_loc) >= 0; + legal = find_empty_compatible_subtile(type, to_loc, place_loc_vars.grid_blocks()) >= 0; } else { legal = true; } diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index 371eddffdbe..d1f0519ae56 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -142,7 +142,7 @@ e_block_move_result record_macro_macro_swaps(t_pl_blocks_to_be_moved& blocks_aff const int imacro_to, ClusterBlockId blk_to, t_pl_offset swap_offset, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); e_block_move_result record_macro_move(t_pl_blocks_to_be_moved& blocks_affected, std::vector& displaced_blocks, @@ -235,9 +235,10 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, bool find_to_loc_uniform(t_logical_block_type_ptr type, float rlim, - const t_pl_loc from, + const t_pl_loc& from, t_pl_loc& to, - ClusterBlockId b_from); + ClusterBlockId b_from, + const PlaceLocVars& place_loc_vars); // Accessor f_placer_breakpoint_reached // return true when a placer breakpoint is reached @@ -260,7 +261,12 @@ void set_placer_breakpoint_reached(bool); * @param limit_coords: the region where I can move the block to * @param to_loc: the new location that the function picked for the block */ -bool find_to_loc_median(t_logical_block_type_ptr blk_type, const t_pl_loc& from_loc, const t_bb* limit_coords, t_pl_loc& to_loc, ClusterBlockId b_from); +bool find_to_loc_median(t_logical_block_type_ptr blk_type, + const t_pl_loc& from_loc, + const t_bb* limit_coords, + t_pl_loc& to_loc, + ClusterBlockId b_from, + const PlaceLocVars& place_loc_vars); /** * @brief Find a legal swap to location for the given type in a range around a specific location. @@ -281,7 +287,8 @@ bool find_to_loc_centroid(t_logical_block_type_ptr blk_type, const t_pl_loc& centeroid, const t_range_limiters& range_limiters, t_pl_loc& to_loc, - ClusterBlockId b_from); + ClusterBlockId b_from, + const PlaceLocVars& place_loc_vars); const std::string& move_type_to_string(e_move_type); @@ -311,7 +318,8 @@ void compressed_grid_to_loc(t_logical_block_type_ptr blk_type, * is returned to indicate that there are no empty subtiles compatible with the given type.. */ int find_empty_compatible_subtile(t_logical_block_type_ptr type, - const t_physical_tile_loc& to_loc); + const t_physical_tile_loc& to_loc, + const GridBlock& grid_blocks); /** * @brief find compressed location in a compressed range for a specific type in the given layer (to_layer_num) @@ -331,7 +339,8 @@ bool find_compatible_compressed_loc_in_range(t_logical_block_type_ptr type, t_physical_tile_loc& to_loc, bool is_median, int to_layer_num, - bool search_for_empty); + bool search_for_empty, + const PlaceLocVars& place_loc_vars); /** * @brief Get the the compressed loc from the uncompressed loc (grid_loc) diff --git a/vpr/src/place/noc_place_utils.cpp b/vpr/src/place/noc_place_utils.cpp index bd2b86e1a2d..0f7845d934d 100644 --- a/vpr/src/place/noc_place_utils.cpp +++ b/vpr/src/place/noc_place_utils.cpp @@ -848,7 +848,7 @@ e_create_move propose_router_swap(t_pl_blocks_to_be_moved& blocks_affected, // now choose a compatible block to swap with t_pl_loc to; to.layer = from.layer; - if (!find_to_loc_uniform(cluster_from_type, rlim, from, to, b_from)) { + if (!find_to_loc_uniform(cluster_from_type, rlim, from, to, b_from, place_loc_vars)) { return e_create_move::ABORT; } diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index aa1c474cc8c..50e7ab74821 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -338,7 +338,7 @@ void alloc_and_load_legal_placement_locations(std::vector Date: Sun, 28 Jul 2024 18:13:33 -0400 Subject: [PATCH 041/146] remove place_ctx.grid_block from find_free_layer --- vpr/src/place/move_utils.cpp | 13 ++++++++----- vpr/src/place/move_utils.h | 4 +++- 2 files changed, 11 insertions(+), 6 deletions(-) diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 2f8b80df224..a2f3ff870ff 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -1314,20 +1314,23 @@ std::string e_move_result_to_string(e_move_result move_outcome) { return move_result_to_string[move_outcome]; } -int find_free_layer(t_logical_block_type_ptr logical_block, const t_pl_loc& loc) { +int find_free_layer(t_logical_block_type_ptr logical_block, + const t_pl_loc& loc, + const PlaceLocVars& place_loc_vars) { const auto& device_ctx = g_vpr_ctx.device(); - const auto& place_ctx = g_vpr_ctx.placement(); + const auto& compressed_grids = g_vpr_ctx.placement().compressed_block_grids; + const GridBlock& grid_blocks = place_loc_vars.grid_blocks(); // TODO: Compatible layer vector should be shuffled first, and then iterated through int free_layer = loc.layer; VTR_ASSERT(loc.layer != OPEN); if (device_ctx.grid.get_num_layers() > 1) { - const auto& compatible_layers = place_ctx.compressed_block_grids[logical_block->index].get_layer_nums(); + const auto& compatible_layers = compressed_grids[logical_block->index].get_layer_nums(); if (compatible_layers.size() > 1) { - if (place_ctx.grid_blocks.block_at_location(loc) != EMPTY_BLOCK_ID) { + if (grid_blocks.block_at_location(loc) != EMPTY_BLOCK_ID) { for (const auto& layer : compatible_layers) { if (layer != free_layer) { - if (place_ctx.grid_blocks.block_at_location(loc) == EMPTY_BLOCK_ID) { + if (grid_blocks.block_at_location(loc) == EMPTY_BLOCK_ID) { free_layer = layer; break; } diff --git a/vpr/src/place/move_utils.h b/vpr/src/place/move_utils.h index d1f0519ae56..1922b547ae1 100644 --- a/vpr/src/place/move_utils.h +++ b/vpr/src/place/move_utils.h @@ -433,7 +433,9 @@ std::string e_move_result_to_string(e_move_result move_outcome); * @param loc * @return */ -int find_free_layer(t_logical_block_type_ptr logical_block, const t_pl_loc& loc); +int find_free_layer(t_logical_block_type_ptr logical_block, + const t_pl_loc& loc, + const PlaceLocVars& place_loc_vars); int get_random_layer(t_logical_block_type_ptr logical_block); From 613b7b603201bfd85e38005e16beef9d4ac0eead Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 18:46:49 -0400 Subject: [PATCH 042/146] remove place_ctx.grid_blocks from place_util and a few other files --- vpr/src/place/initial_placement.cpp | 2 +- vpr/src/place/place_util.cpp | 13 ++++++++----- vpr/src/place/place_util.h | 5 ++++- vpr/src/power/power.cpp | 3 +-- vpr/src/route/overuse_report.cpp | 2 +- vpr/src/util/vpr_utils.cpp | 6 +++--- 6 files changed, 18 insertions(+), 13 deletions(-) diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 2ed1cc7e4db..f705b6e3755 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -861,7 +861,7 @@ bool try_place_macro(const t_pl_macro& pl_macro, return macro_placed; } - bool mac_can_be_placed = macro_can_be_placed(pl_macro, head_pos, false); + bool mac_can_be_placed = macro_can_be_placed(pl_macro, head_pos, /*check_all_legality=*/false, place_loc_vars); if (mac_can_be_placed) { // Place down the macro diff --git a/vpr/src/place/place_util.cpp b/vpr/src/place/place_util.cpp index 50e7ab74821..46fd53775bc 100644 --- a/vpr/src/place/place_util.cpp +++ b/vpr/src/place/place_util.cpp @@ -407,10 +407,13 @@ void set_block_location(ClusterBlockId blk_id, place_sync_external_block_connections(blk_id, placer_loc_vars); } -bool macro_can_be_placed(t_pl_macro pl_macro, t_pl_loc head_pos, bool check_all_legality) { - auto& device_ctx = g_vpr_ctx.device(); - auto& place_ctx = g_vpr_ctx.placement(); - auto& cluster_ctx = g_vpr_ctx.clustering(); +bool macro_can_be_placed(const t_pl_macro& pl_macro, + const t_pl_loc& head_pos, + bool check_all_legality, + const PlaceLocVars& place_loc_vars) { + const auto& device_ctx = g_vpr_ctx.device(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& grid_blocks = place_loc_vars.grid_blocks(); //Get block type of head member ClusterBlockId blk_id = pl_macro.members[0].blk_index; @@ -462,7 +465,7 @@ bool macro_can_be_placed(t_pl_macro pl_macro, t_pl_loc head_pos, bool check_all_ // Also check whether the member position is valid, and the member_z is allowed at that location on the grid if (member_pos.x < int(device_ctx.grid.width()) && member_pos.y < int(device_ctx.grid.height()) && is_tile_compatible(device_ctx.grid.get_physical_type({member_pos.x, member_pos.y, member_pos.layer}), block_type) - && place_ctx.grid_blocks.block_at_location(member_pos) == EMPTY_BLOCK_ID) { + && grid_blocks.block_at_location(member_pos) == EMPTY_BLOCK_ID) { // Can still accommodate blocks here, check the next position continue; } else { diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index ee05553360c..b69361a0df6 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -391,5 +391,8 @@ inline bool is_loc_on_chip(t_physical_tile_loc loc) { * floorplanning constraints. However, initial placement or SA-based approach * require to check for all legality constraints. */ -bool macro_can_be_placed(t_pl_macro pl_macro, t_pl_loc head_pos, bool check_all_legality); +bool macro_can_be_placed(const t_pl_macro& pl_macro, + const t_pl_loc& head_pos, + bool check_all_legality, + const PlaceLocVars& place_loc_vars); #endif diff --git a/vpr/src/power/power.cpp b/vpr/src/power/power.cpp index 94d55479580..ba9e3ea7d78 100644 --- a/vpr/src/power/power.cpp +++ b/vpr/src/power/power.cpp @@ -626,7 +626,7 @@ static void power_usage_blocks(t_power_usage* power_usage) { t_pb* pb = nullptr; t_power_usage pb_power; - ClusterBlockId iblk = place_ctx.grid_blocks.block_at_location({x, y, z, layer_num}); + ClusterBlockId iblk = place_ctx.get_grid_blocks().block_at_location({x, y, z, layer_num}); if (iblk != EMPTY_BLOCK_ID && iblk != INVALID_BLOCK_ID) { pb = cluster_ctx.clb_nlist.block_pb(iblk); @@ -642,7 +642,6 @@ static void power_usage_blocks(t_power_usage* power_usage) { } } } - return; } /** diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 053121b0184..d5a13e7f7dd 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -242,7 +242,7 @@ static void report_overused_ipin_opin(std::ostream& os, //Add block type for IPINs/OPINs in overused rr-node report const auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - const auto& grid_info = place_ctx.grid_blocks; + const auto& grid_info = place_ctx.get_grid_blocks(); os << "Grid location: X = " << grid_x << ", Y = " << grid_y << '\n'; os << "Number of blocks currently occupying this grid location = " << grid_info.get_usage({grid_x, grid_y, grid_layer}) << '\n'; diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 6241de05018..287a53da787 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -2376,7 +2376,7 @@ std::vector get_cluster_netlist_intra_tile_classes_at_loc(int layer, const auto& place_ctx = g_vpr_ctx.placement(); const auto& atom_lookup = g_vpr_ctx.atom().lookup; - const auto& grid_block = place_ctx.grid_blocks; + const auto& grid_block = place_ctx.get_grid_blocks(); class_num_vec.reserve(physical_type->primitive_class_inf.size()); @@ -2406,8 +2406,8 @@ std::vector get_cluster_netlist_intra_tile_pins_at_loc(const int layer, const vtr::vector& pin_chains, const vtr::vector>& pin_chains_num, t_physical_tile_type_ptr physical_type) { - auto& place_ctx = g_vpr_ctx.placement(); - auto grid_block = place_ctx.grid_blocks; + const auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_block = place_ctx.get_grid_blocks(); std::vector pin_num_vec; pin_num_vec.reserve(get_tile_num_internal_pin(physical_type)); From 68f65475473e8e5da83464df6fe8b3d47d425e9c Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 18:53:55 -0400 Subject: [PATCH 043/146] remove place_ctx.grid_blocks --- vpr/src/base/vpr_context.h | 7 ++----- vpr/src/draw/draw.cpp | 2 +- vpr/src/draw/draw_basic.cpp | 2 +- vpr/src/draw/intra_logic_block.cpp | 6 +++--- vpr/src/place/cut_spreader.cpp | 12 ++++++------ vpr/src/route/overuse_report.cpp | 2 +- 6 files changed, 14 insertions(+), 17 deletions(-) diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index efa2f2c0ebe..5b21f61d26b 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -389,15 +389,12 @@ struct PlacementContext : public Context { public: - ///@brief Clustered block associated with each grid location (i.e. inverse of block_locs) - GridBlock grid_blocks; - const vtr::vector_map& block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.block_locs(); } vtr::vector_map& mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_block_locs(); } const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.grid_blocks(); } GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_grid_blocks(); } vtr::vector_map& mutable_physical_pins() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_physical_pins(); } -// const vtr::vector_map& physical_pins() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.physical_pins(); } + const vtr::vector_map& physical_pins() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.physical_pins(); } PlaceLocVars& mutable_place_loc_vars() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } const PlaceLocVars& place_loc_vars() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } @@ -407,7 +404,7 @@ struct PlacementContext : public Context { ///@brief Clustered pin placement mapping with physical pin - vtr::vector_map physical_pins; + vtr::vector_map physical_pins_; ///@brief The pl_macros array stores all the placement macros (usually carry chains). std::vector pl_macros; diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 62d6e137eed..2512fa31080 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -1078,7 +1078,7 @@ ClusterBlockId get_cluster_block_id_from_xy_loc(double x, double y) { // iterate over sub_blocks const auto& type = device_ctx.grid.get_physical_type({i, j, layer_num}); for (int k = 0; k < type->capacity; ++k) { - clb_index = place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}); + clb_index = place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}); if (clb_index != EMPTY_BLOCK_ID) { clb_bbox = draw_coords->get_absolute_clb_bbox(clb_index, cluster_ctx.clb_nlist.block_type(clb_index)); diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index f7bfbd7c219..df2a1a3a35a 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -136,7 +136,7 @@ void drawplace(ezgl::renderer* g) { for (int k = 0; k < num_sub_tiles; ++k) { /* Look at the tile at start of large block */ - bnum = place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}); + bnum = place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}); /* Fill background for the clb. Do not fill if "show_blk_internal" * is toggled. */ diff --git a/vpr/src/draw/intra_logic_block.cpp b/vpr/src/draw/intra_logic_block.cpp index af0988b225a..21999ca7f58 100644 --- a/vpr/src/draw/intra_logic_block.cpp +++ b/vpr/src/draw/intra_logic_block.cpp @@ -175,11 +175,11 @@ void draw_internal_draw_subblk(ezgl::renderer* g) { int num_sub_tiles = type->capacity; for (int k = 0; k < num_sub_tiles; ++k) { /* Don't draw if block is empty. */ - if (place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}) == EMPTY_BLOCK_ID || place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}) == INVALID_BLOCK_ID) + if (place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}) == EMPTY_BLOCK_ID || place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}) == INVALID_BLOCK_ID) continue; /* Get block ID */ - ClusterBlockId bnum = place_ctx.grid_blocks.block_at_location({i, j, k, layer_num}); + ClusterBlockId bnum = place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}); /* Safety check, that physical blocks exists in the CLB */ if (cluster_ctx.clb_nlist.block_pb(bnum) == nullptr) continue; @@ -289,7 +289,7 @@ draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node int capacity = device_ctx.physical_tile_types[type_descrip_index].capacity; // TODO: this is a hack - should be fixed for the layer_num const auto& type = device_ctx.grid.get_physical_type({1, 0, 0}); - if (capacity > 1 && device_ctx.grid.width() > 0 && device_ctx.grid.height() > 0 && place_ctx.grid_blocks.get_usage({1, 0, 0}) != 0 + if (capacity > 1 && device_ctx.grid.width() > 0 && device_ctx.grid.height() > 0 && place_ctx.get_grid_blocks().get_usage({1, 0, 0}) != 0 && type_descrip_index == type->index) { // that should test for io blocks, and setting capacity_divisor > 1 // will squish every thing down diff --git a/vpr/src/place/cut_spreader.cpp b/vpr/src/place/cut_spreader.cpp index fcf1c498761..328b8310615 100644 --- a/vpr/src/place/cut_spreader.cpp +++ b/vpr/src/place/cut_spreader.cpp @@ -971,7 +971,7 @@ void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { grid_blocks.set_block_at_location(sub_tile, blk); block_locs[blk].loc = sub_tile; grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, - place_ctx.grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) + 1); + place_ctx.get_grid_blocks().get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) + 1); ap->blk_locs[blk].loc = sub_tile; } @@ -990,7 +990,7 @@ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { block_locs[blk].loc = t_pl_loc{}; grid_blocks.set_block_at_location(sub_tile, EMPTY_BLOCK_ID); grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, - place_ctx.grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) - 1); + place_ctx.get_grid_blocks().get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) - 1); } /* @@ -1042,7 +1042,7 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, // then blk is placed in best_subtile if (exceeds_explore_limit && best_subtile != t_pl_loc{}) { // find the logic block bound to (placed on) best_subtile - ClusterBlockId bound_blk = place_ctx.grid_blocks.block_at_location(best_subtile); + ClusterBlockId bound_blk = place_ctx.get_grid_blocks().block_at_location(best_subtile); if (bound_blk != EMPTY_BLOCK_ID) { // if best_subtile has a logic block unbind_tile(best_subtile); // clear bound_block and best_subtile's placement info remaining.emplace(1, bound_blk); // put bound_blk back into remaining blocks to place @@ -1053,7 +1053,7 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, // if exploration limit is not met or a candidate sub_tile is not found yet for (auto sub_t : subtiles_at_location[nx][ny]) { // for each available sub_tile at random location - ClusterBlockId bound_blk = place_ctx.grid_blocks.block_at_location(sub_t); // logic blk at [nx, ny] + ClusterBlockId bound_blk = place_ctx.get_grid_blocks().block_at_location(sub_t); // logic blk at [nx, ny] if (bound_blk == EMPTY_BLOCK_ID || ripup_radius_met || rand() % (20000) < 10) { @@ -1137,7 +1137,7 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, // if the target location has a logic block, ensure it's not part of a macro // because a macro placed before the current one has higher priority (longer chain) - ClusterBlockId bound = place_ctx.grid_blocks.block_at_location(target); + ClusterBlockId bound = place_ctx.get_grid_blocks().block_at_location(target); if (bound != EMPTY_BLOCK_ID && imacro(bound) != NO_MACRO) { placement_impossible = true; break; @@ -1156,7 +1156,7 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, if (!placement_impossible) { // if placement is possible, apply this placement for (auto& target : targets) { - ClusterBlockId bound = place_ctx.grid_blocks.block_at_location(target.second); + ClusterBlockId bound = place_ctx.get_grid_blocks().block_at_location(target.second); if (bound != EMPTY_BLOCK_ID) { // if target location has a logic block, displace it and put it in remaining queue to be placed later unbind_tile(target.second); diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index d5a13e7f7dd..3498d55eca3 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -353,7 +353,7 @@ static void report_congested_nets(const Netlist<>& net_list, os << " " << "Hierarchical Type Name : " << pb_pin->parent_node->hierarchical_type_name() << "\n"; } else { - os << " " << g_vpr_ctx.placement().physical_pins[convert_to_cluster_pin_id(sink_id)] << "\n"; + os << " " << g_vpr_ctx.placement().physical_pins_[convert_to_cluster_pin_id(sink_id)] << "\n"; } } } From b94e00cdaec50661af2116f0fda6c4ece625e1b2 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Sun, 28 Jul 2024 19:36:44 -0400 Subject: [PATCH 044/146] remove place_ctx.physical_pins --- vpr/src/base/vpr_context.h | 3 --- vpr/src/base/vpr_types.cpp | 15 ++++++++--- vpr/src/base/vpr_types.h | 4 +++ vpr/src/place/centroid_move_generator.cpp | 2 +- vpr/src/place/directed_moves_util.cpp | 22 +++++++++------- vpr/src/place/directed_moves_util.h | 8 +++--- vpr/src/place/initial_placement.cpp | 13 +++++----- vpr/src/place/median_move_generator.cpp | 11 ++++---- vpr/src/place/move_utils.cpp | 2 +- vpr/src/place/net_cost_handler.cpp | 26 +++++++++---------- .../weighted_centroid_move_generator.cpp | 2 +- .../place/weighted_median_move_generator.cpp | 25 ++++++++---------- .../place/weighted_median_move_generator.h | 5 ++++ vpr/src/route/overuse_report.cpp | 2 +- vpr/src/util/vpr_utils.cpp | 23 ++++------------ vpr/src/util/vpr_utils.h | 8 +----- 16 files changed, 84 insertions(+), 87 deletions(-) diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index 5b21f61d26b..f92d964beae 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -403,9 +403,6 @@ struct PlacementContext : public Context { - ///@brief Clustered pin placement mapping with physical pin - vtr::vector_map physical_pins_; - ///@brief The pl_macros array stores all the placement macros (usually carry chains). std::vector pl_macros; diff --git a/vpr/src/base/vpr_types.cpp b/vpr/src/base/vpr_types.cpp index 475a9a30d19..05fac5e563a 100644 --- a/vpr/src/base/vpr_types.cpp +++ b/vpr/src/base/vpr_types.cpp @@ -535,11 +535,11 @@ void t_cluster_placement_stats::flush_invalid_queue() { } bool t_cluster_placement_stats::in_flight_empty() { - return (in_flight.empty()); + return in_flight.empty(); } t_pb_type* t_cluster_placement_stats::in_flight_type() { - return (in_flight.begin()->second->pb_graph_node->pb_type); + return in_flight.begin()->second->pb_graph_node->pb_type; } void t_cluster_placement_stats::free_primitives() { @@ -557,4 +557,13 @@ void t_cluster_placement_stats::free_primitives() { delete primitive.second; } } -} \ No newline at end of file +} + +int PlaceLocVars::net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const { + auto& cluster_ctx = g_vpr_ctx.clustering(); + + // Get the logical pin index of pin within it's logical block type + ClusterPinId pin_id = cluster_ctx.clb_nlist.net_pin(net_id, net_pin_index); + + return this->tile_pin_index(pin_id); +} diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index cddbdbfd343..a1c1c2b3291 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -922,7 +922,11 @@ class PlaceLocVars { inline const vtr::vector_map& physical_pins() const { return physical_pins_; } inline vtr::vector_map& mutable_physical_pins() { return physical_pins_; } + //Returns the physical pin of the tile, related to the given ClusterPinId + inline int tile_pin_index(const ClusterPinId pin) const { return physical_pins_[pin]; } + //Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index. + int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const; }; ///@brief Names of various files diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index e1252b0afb0..e427f6bd2af 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -78,7 +78,7 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block t_pl_loc to, centroid; /* Calculate the centroid location*/ - calculate_centroid_loc(b_from, false, centroid, nullptr, noc_attraction_enabled_, noc_attraction_w_, block_locs); + calculate_centroid_loc(b_from, false, centroid, nullptr, noc_attraction_enabled_, noc_attraction_w_, place_loc_vars); // Centroid location is not necessarily a valid location, and the downstream location expects a valid // layer for the centroid location. So if the layer is not valid, we set it to the same layer as from loc. diff --git a/vpr/src/place/directed_moves_util.cpp b/vpr/src/place/directed_moves_util.cpp index dbfdbbc56af..695500eb383 100644 --- a/vpr/src/place/directed_moves_util.cpp +++ b/vpr/src/place/directed_moves_util.cpp @@ -2,16 +2,17 @@ #include "directed_moves_util.h" #include "centroid_move_generator.h" -t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, const vtr::vector_map& block_locs) { - auto& device_ctx = g_vpr_ctx.device(); - auto& grid = device_ctx.grid; - auto& cluster_ctx = g_vpr_ctx.clustering(); +t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, + const PlaceLocVars& place_loc_vars) { + const auto& device_ctx = g_vpr_ctx.device(); + const auto& grid = device_ctx.grid; + const auto& cluster_ctx = g_vpr_ctx.clustering(); - int pnum = tile_pin_index(pin); + int pnum = place_loc_vars.tile_pin_index(pin); ClusterBlockId block = cluster_ctx.clb_nlist.pin_block(pin); t_physical_tile_loc tile_loc; - t_pl_loc block_loc = block_locs[block].loc; + t_pl_loc block_loc = place_loc_vars.block_locs()[block].loc; tile_loc.x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; tile_loc.y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; tile_loc.layer_num = block_loc.layer; @@ -28,8 +29,9 @@ void calculate_centroid_loc(ClusterBlockId b_from, const PlacerCriticalities* criticalities, bool noc_attraction_enabled, float noc_attraction_weight, - const vtr::vector_map& block_locs) { - auto& cluster_ctx = g_vpr_ctx.clustering(); + const PlaceLocVars& place_loc_vars) { + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& block_locs = place_loc_vars.block_locs(); float acc_weight = 0; float acc_x = 0; @@ -76,7 +78,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, weight = 1; } - t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, place_loc_vars); acc_x += tile_loc.x * weight; acc_y += tile_loc.y * weight; @@ -96,7 +98,7 @@ void calculate_centroid_loc(ClusterBlockId b_from, ClusterPinId source_pin = cluster_ctx.clb_nlist.net_driver(net_id); - t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, place_loc_vars); acc_x += tile_loc.x * weight; acc_y += tile_loc.y * weight; diff --git a/vpr/src/place/directed_moves_util.h b/vpr/src/place/directed_moves_util.h index 9d05249df58..ee7f45cd732 100644 --- a/vpr/src/place/directed_moves_util.h +++ b/vpr/src/place/directed_moves_util.h @@ -18,7 +18,7 @@ e_reward_function string_to_reward(const std::string& st); ///@brief Helper function that returns the x, y coordinates of a pin t_physical_tile_loc get_coordinate_of_pin(ClusterPinId pin, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); /** * @brief Calculates the exact centroid location @@ -48,14 +48,14 @@ void calculate_centroid_loc(ClusterBlockId b_from, const PlacerCriticalities* criticalities, bool noc_attraction_enabled, float noc_attraction_weight, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); inline void calculate_centroid_loc(ClusterBlockId b_from, bool timing_weights, t_pl_loc& centroid, const PlacerCriticalities* criticalities, - const vtr::vector_map& block_locs) { - calculate_centroid_loc(b_from, timing_weights, centroid, criticalities, false, 0.0f, block_locs); + const PlaceLocVars& place_loc_vars) { + calculate_centroid_loc(b_from, timing_weights, centroid, criticalities, false, 0.0f, place_loc_vars); } #endif diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index f705b6e3755..584b248f8e7 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -162,7 +162,7 @@ static bool is_loc_legal(const t_pl_loc& loc, */ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, t_pl_loc& centroid, - const vtr::vector_map& block_locs); + const PlaceLocVars& place_loc_vars); /** * @brief Tries to find a nearest location to the centroid location if calculated centroid location is not legal or is occupied. @@ -378,8 +378,9 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, static std::vector find_centroid_loc(const t_pl_macro& pl_macro, t_pl_loc& centroid, - const vtr::vector_map& block_locs) { - auto& cluster_ctx = g_vpr_ctx.clustering(); + const PlaceLocVars& place_loc_vars) { + const auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& block_locs = place_loc_vars.block_locs(); float acc_weight = 0; float acc_x = 0; @@ -428,7 +429,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, continue; } - t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(sink_pin_id, place_loc_vars); if (find_layer) { VTR_ASSERT(tile_loc.layer_num != OPEN); layer_count[tile_loc.layer_num]++; @@ -448,7 +449,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, continue; } - t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, block_locs); + t_physical_tile_loc tile_loc = get_coordinate_of_pin(source_pin, place_loc_vars); if (find_layer) { VTR_ASSERT(tile_loc.layer_num != OPEN); layer_count[tile_loc.layer_num]++; @@ -486,7 +487,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, t_pl_loc centroid_loc(OPEN, OPEN, OPEN, OPEN); std::vector unplaced_blocks_to_update_their_score; - unplaced_blocks_to_update_their_score = find_centroid_loc(pl_macro, centroid_loc, block_locs); + unplaced_blocks_to_update_their_score = find_centroid_loc(pl_macro, centroid_loc, place_loc_vars); //no suggestion was available for this block type if (!is_loc_on_chip({centroid_loc.x, centroid_loc.y, centroid_loc.layer})) { diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index d57243087a0..6fbd0a43cc5 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -86,7 +86,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ const auto& net_bb_coords = cube_bb ? place_move_ctx.bb_coords[net_id] : union_bb; //use the incremental update of the bb ClusterBlockId bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - int pnum = tile_pin_index(pin_id); + int pnum = place_loc_vars.tile_pin_index(pin_id); VTR_ASSERT(pnum >= 0); t_pl_loc block_loc = block_locs[bnum].loc; t_physical_tile_type_ptr block_physical_type = physical_tile_type(block_loc); @@ -198,7 +198,8 @@ void MedianMoveGenerator::get_bb_from_scratch_excluding_block(ClusterNetId net_i ClusterBlockId block_id, bool& skip_net) { //TODO: account for multiple physical pin instances per logical pin - auto& block_locs = placer_ctx_.get().get_block_locs(); + const auto& placer_ctx = placer_ctx_.get(); + const auto& block_locs = placer_ctx.get_block_locs(); skip_net = true; @@ -220,7 +221,7 @@ void MedianMoveGenerator::get_bb_from_scratch_excluding_block(ClusterNetId net_i if (bnum != block_id) { skip_net = false; - pnum = net_pin_to_tile_pin_index(net_id, 0); + pnum = placer_ctx.place_loc_vars().net_pin_to_tile_pin_index(net_id, 0); const t_pl_loc& block_loc = block_locs[bnum].loc; int src_x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; int src_y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; @@ -235,9 +236,9 @@ void MedianMoveGenerator::get_bb_from_scratch_excluding_block(ClusterNetId net_i first_block = true; } - for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); - pnum = tile_pin_index(pin_id); + pnum = placer_ctx.place_loc_vars().tile_pin_index(pin_id); if (bnum == block_id) continue; skip_net = false; diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index a2f3ff870ff..d79f6720b62 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -220,7 +220,7 @@ e_block_move_result record_macro_swaps(t_pl_blocks_to_be_moved& blocks_affected, imember_from = pl_macros[imacro_from].members.size(); break; //record_macro_self_swaps() handles this case completely, so we don't need to continue the loop } else { - outcome = record_macro_macro_swaps(blocks_affected, imacro_from, imember_from, imacro_to, b_to, swap_offset, block_locs); + outcome = record_macro_macro_swaps(blocks_affected, imacro_from, imember_from, imacro_to, b_to, swap_offset, place_loc_vars); if (outcome == e_block_move_result::INVERT_VALID) { break; //The move was inverted and successfully proposed, don't need to continue the loop } diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index e58217f743f..d4b14c689b6 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -501,9 +501,9 @@ static void update_net_bb(const ClusterNetId net, const ClusterBlockId blk, const ClusterPinId blk_pin, const t_pl_moved_block& pl_moved_block) { - auto& cluster_ctx = g_vpr_ctx.clustering(); + const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.get_block_locs(); if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -515,7 +515,7 @@ static void update_net_bb(const ClusterNetId net, } } else { //For large nets, update bounding box incrementally - int iblk_pin = tile_pin_index(blk_pin); + int iblk_pin = placer_ctx.place_loc_vars().tile_pin_index(blk_pin); bool src_pin = cluster_ctx.clb_nlist.pin_type(blk_pin) == PinType::DRIVER; t_pl_loc block_loc = block_locs[blk].loc; @@ -556,7 +556,7 @@ static void update_net_layer_bb(const ClusterNetId net, } } else { //For large nets, update bounding box incrementally - int iblk_pin = tile_pin_index(blk_pin); + int iblk_pin = placer_ctx.place_loc_vars().tile_pin_index(blk_pin); t_pl_loc block_loc = block_locs[blk].loc; t_physical_tile_type_ptr blk_type = physical_tile_type(block_loc); @@ -740,7 +740,7 @@ static void get_non_updatable_bb(ClusterNetId net_id, auto& block_locs = placer_ctx.get_block_locs(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); - int pnum = net_pin_to_tile_pin_index(net_id, 0); + int pnum = placer_ctx.place_loc_vars().net_pin_to_tile_pin_index(net_id, 0); t_pl_loc block_loc = block_locs[bnum].loc; int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; @@ -761,7 +761,7 @@ static void get_non_updatable_bb(ClusterNetId net_id, for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); block_loc = block_locs[bnum].loc; - pnum = tile_pin_index(pin_id); + pnum = placer_ctx.place_loc_vars().tile_pin_index(pin_id); x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; layer = block_loc.layer; @@ -819,7 +819,7 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); t_pl_loc block_loc = block_locs[bnum].loc; - int pnum = net_pin_to_tile_pin_index(net_id, 0); + int pnum = placer_ctx.place_loc_vars().net_pin_to_tile_pin_index(net_id, 0); int src_x = block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; int src_y = block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; @@ -829,10 +829,10 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, std::vector xmax(num_layers, src_x); std::vector ymax(num_layers, src_y); - for (auto pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { + for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); block_loc = block_locs[bnum].loc; - pnum = tile_pin_index(pin_id); + pnum = placer_ctx.place_loc_vars().tile_pin_index(pin_id); int x = block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; int y = block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; @@ -1505,7 +1505,7 @@ static void get_bb_from_scratch(ClusterNetId net_id, ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); t_pl_loc block_loc = block_locs[bnum].loc; - int pnum = net_pin_to_tile_pin_index(net_id, 0); + int pnum = placer_ctx.place_loc_vars().net_pin_to_tile_pin_index(net_id, 0); VTR_ASSERT_SAFE(pnum >= 0); int x = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; int y = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; @@ -1536,7 +1536,7 @@ static void get_bb_from_scratch(ClusterNetId net_id, for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); block_loc = block_locs[bnum].loc; - pnum = tile_pin_index(pin_id); + pnum = placer_ctx.place_loc_vars().tile_pin_index(pin_id); x = block_locs[bnum].loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum]; y = block_locs[bnum].loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum]; pin_layer = block_locs[bnum].loc.layer; @@ -1639,7 +1639,7 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); t_pl_loc block_loc = block_locs[bnum].loc; - int pnum_src = net_pin_to_tile_pin_index(net_id, 0); + int pnum_src = placer_ctx.place_loc_vars().net_pin_to_tile_pin_index(net_id, 0); VTR_ASSERT_SAFE(pnum_src >= 0); int x_src = block_loc.x + physical_tile_type(block_loc)->pin_width_offset[pnum_src]; int y_src = block_loc.y + physical_tile_type(block_loc)->pin_height_offset[pnum_src]; @@ -1664,7 +1664,7 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, for (ClusterPinId pin_id : cluster_ctx.clb_nlist.net_sinks(net_id)) { bnum = cluster_ctx.clb_nlist.pin_block(pin_id); block_loc = block_locs[bnum].loc; - int pnum = tile_pin_index(pin_id); + int pnum = placer_ctx.place_loc_vars().tile_pin_index(pin_id); int layer = block_locs[bnum].loc.layer; VTR_ASSERT_SAFE(layer >= 0 && layer < num_layers); num_sink_pin_layer[layer]++; diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index cb93e4b27e7..eddfea1fc11 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -41,7 +41,7 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move t_pl_loc to, centroid; /* Calculate the weighted centroid */ - calculate_centroid_loc(b_from, true, centroid, criticalities, block_locs); + calculate_centroid_loc(b_from, true, centroid, criticalities, place_loc_vars); // Centroid location is not necessarily a valid location, and the downstream location expect a valid // layer for "to" location. So if the layer is not valid, we set it to the same layer as from loc. diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index a389f3ae786..6f38645b7eb 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -10,12 +10,6 @@ WeightedMedianMoveGenerator::WeightedMedianMoveGenerator(PlacerContext& placer_ctx) : MoveGenerator(placer_ctx) {} -static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, - ClusterPinId moving_pin_id, - const PlacerCriticalities* criticalities, - t_bb_cost* coords, - const vtr::vector_map& block_locs); - e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_affected, t_propose_action& proposed_action, float rlim, @@ -77,9 +71,10 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& * * Note: skip_net true if the net is a feedback from the block to itself (all the net terminals are connected to the same block) */ - bool skip_net = get_bb_cost_for_net_excluding_block(net_id, pin_id, criticalities, &coords, block_locs); - if (skip_net) + bool skip_net = get_bb_cost_for_net_excluding_block(net_id, pin_id, criticalities, &coords); + if (skip_net) { continue; + } // We need to insert the calculated edges in the X,Y vectors multiple times based on the criticality of the pin that caused each of them. // As all the criticalities are [0,1], we map it to [0,CRIT_MULT_FOR_W_MEDIAN] inserts in the vectors for each edge @@ -164,11 +159,13 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& * - moving_pin_id: pin (which should be on this net) on a block that is being moved. * - criticalities: the timing criticalities of all connections */ -static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, - ClusterPinId moving_pin_id, - const PlacerCriticalities* criticalities, - t_bb_cost* coords, - const vtr::vector_map& block_locs) { +bool WeightedMedianMoveGenerator::get_bb_cost_for_net_excluding_block(ClusterNetId net_id, + ClusterPinId moving_pin_id, + const PlacerCriticalities* criticalities, + t_bb_cost* coords) { + const auto& place_loc_vars = placer_ctx_.get().place_loc_vars(); + const auto& block_locs = place_loc_vars.block_locs(); + bool skip_net = true; int xmin = 0; @@ -195,7 +192,7 @@ static bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, if (pin_id != moving_pin_id) { skip_net = false; - int pnum = tile_pin_index(pin_id); + int pnum = place_loc_vars.tile_pin_index(pin_id); /** * Calculates the pin index of the correct pin to calculate the required connection * diff --git a/vpr/src/place/weighted_median_move_generator.h b/vpr/src/place/weighted_median_move_generator.h index 2b942f083f4..fca26d2517a 100644 --- a/vpr/src/place/weighted_median_move_generator.h +++ b/vpr/src/place/weighted_median_move_generator.h @@ -23,6 +23,11 @@ class WeightedMedianMoveGenerator : public MoveGenerator { float rlim, const t_placer_opts& placer_opts, const PlacerCriticalities* criticalities) override; + + bool get_bb_cost_for_net_excluding_block(ClusterNetId net_id, + ClusterPinId moving_pin_id, + const PlacerCriticalities* criticalities, + t_bb_cost* coords); }; #endif diff --git a/vpr/src/route/overuse_report.cpp b/vpr/src/route/overuse_report.cpp index 3498d55eca3..2d808d37005 100644 --- a/vpr/src/route/overuse_report.cpp +++ b/vpr/src/route/overuse_report.cpp @@ -353,7 +353,7 @@ static void report_congested_nets(const Netlist<>& net_list, os << " " << "Hierarchical Type Name : " << pb_pin->parent_node->hierarchical_type_name() << "\n"; } else { - os << " " << g_vpr_ctx.placement().physical_pins_[convert_to_cluster_pin_id(sink_id)] << "\n"; + os << " " << g_vpr_ctx.placement().physical_pins()[convert_to_cluster_pin_id(sink_id)] << "\n"; } } } diff --git a/vpr/src/util/vpr_utils.cpp b/vpr/src/util/vpr_utils.cpp index 287a53da787..e91e2e3233f 100644 --- a/vpr/src/util/vpr_utils.cpp +++ b/vpr/src/util/vpr_utils.cpp @@ -710,8 +710,10 @@ int get_block_num_class(const ParentBlockId& block_id, bool is_flat) { return get_tile_class_max_ptc(type, is_flat); } -int get_block_pin_class_num(const ParentBlockId& block_id, const ParentPinId& pin_id, bool is_flat) { - auto& block_locs = g_vpr_ctx.placement().block_locs(); +int get_block_pin_class_num(const ParentBlockId block_id, const ParentPinId pin_id, bool is_flat) { + const auto& place_loc_vars = g_vpr_ctx.placement().place_loc_vars(); + auto& block_locs = place_loc_vars.block_locs(); + int class_num; if (is_flat) { @@ -722,7 +724,7 @@ int get_block_pin_class_num(const ParentBlockId& block_id, const ParentPinId& pi t_pl_loc block_loc = block_locs[cluster_block_id].loc; ClusterPinId cluster_pin_id = convert_to_cluster_pin_id(pin_id); auto type = physical_tile_type(block_loc); - int phys_pin = tile_pin_index(cluster_pin_id); + int phys_pin = place_loc_vars.tile_pin_index(cluster_pin_id); class_num = get_class_num_from_pin_physical_num(type, phys_pin); } @@ -2153,21 +2155,6 @@ int max_pins_per_grid_tile() { return max_pins; } -int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) { - auto& cluster_ctx = g_vpr_ctx.clustering(); - - // Get the logical pin index of pin within it's logical block type - auto pin_id = cluster_ctx.clb_nlist.net_pin(net_id, net_pin_index); - - return tile_pin_index(pin_id); -} - -int tile_pin_index(const ClusterPinId pin) { - auto& place_ctx = g_vpr_ctx.placement(); - - return place_ctx.physical_pins[pin]; -} - int get_atom_pin_class_num(const AtomPinId atom_pin_id) { auto& atom_look_up = g_vpr_ctx.atom().lookup; auto& atom_net_list = g_vpr_ctx.atom().nlist; diff --git a/vpr/src/util/vpr_utils.h b/vpr/src/util/vpr_utils.h index c0c8fa0c8b4..77d061a5484 100644 --- a/vpr/src/util/vpr_utils.h +++ b/vpr/src/util/vpr_utils.h @@ -67,7 +67,7 @@ t_block_loc get_block_loc(const ParentBlockId& block_id, bool is_flat); int get_block_num_class(const ParentBlockId& block_id, bool is_flat); -int get_block_pin_class_num(const ParentBlockId& block_id, const ParentPinId& pin_id, bool is_flat); +int get_block_pin_class_num(const ParentBlockId block_id, const ParentPinId pin_id, bool is_flat); template inline ClusterNetId convert_to_cluster_net_id(T id) { @@ -245,12 +245,6 @@ AtomBlockId find_memory_sibling(const t_pb* pb); void place_sync_external_block_connections(ClusterBlockId iblk, PlaceLocVars& place_loc_vars); -//Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index -int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index); - -//Returns the physical pin of the tile, related to the given ClusterPinId -int tile_pin_index(const ClusterPinId pin); - int get_atom_pin_class_num(const AtomPinId atom_pin_id); int max_pins_per_grid_tile(); From 869db57570c783bfcf6ce99c4546a3d438280741 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 11:18:21 -0400 Subject: [PATCH 045/146] initialize block_locs and grid_blocks in placer_ctx --- vpr/src/base/vpr_context.h | 2 -- vpr/src/place/net_cost_handler.cpp | 6 ++---- vpr/src/place/place.cpp | 6 ++++-- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index f92d964beae..bbd8d3746c3 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -401,8 +401,6 @@ struct PlacementContext : public Context { void lock_loc_vars() { loc_vars_are_accessible_ = false; } void unlock_loc_vars() { loc_vars_are_accessible_ = true; } - - ///@brief The pl_macros array stores all the placement macros (usually carry chains). std::vector pl_macros; diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index d4b14c689b6..b47646def0e 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -2155,8 +2155,7 @@ void alloc_and_load_chan_w_factors_for_place_cost(float place_cost_exp) { for (size_t high = 1; high < device_ctx.grid.height(); high++) { chanx_place_cost_fac[high][high] = device_ctx.chan_width.x_list[high]; for (size_t low = 0; low < high; low++) { - chanx_place_cost_fac[high][low] = chanx_place_cost_fac[high - 1][low] - + device_ctx.chan_width.x_list[high]; + chanx_place_cost_fac[high][low] = chanx_place_cost_fac[high - 1][low] + device_ctx.chan_width.x_list[high]; } } @@ -2195,8 +2194,7 @@ void alloc_and_load_chan_w_factors_for_place_cost(float place_cost_exp) { for (size_t high = 1; high < device_ctx.grid.width(); high++) { chany_place_cost_fac[high][high] = device_ctx.chan_width.y_list[high]; for (size_t low = 0; low < high; low++) { - chany_place_cost_fac[high][low] = chany_place_cost_fac[high - 1][low] - + device_ctx.chan_width.y_list[high]; + chany_place_cost_fac[high][low] = chany_place_cost_fac[high - 1][low] + device_ctx.chan_width.y_list[high]; } } diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 6767e948d6d..adece9911f3 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -1842,7 +1842,9 @@ static void alloc_and_load_placement_structs(float place_cost_exp, const int num_layers = device_ctx.grid.get_num_layers(); - init_placement_context(placer_ctx.get_mutable_block_locs(), place_ctx.get_mutable_grid_blocks()); + auto& block_locs = placer_ctx.get_mutable_block_locs(); + auto& grid_blocks = placer_ctx.get_mutable_grid_blocks(); + init_placement_context(block_locs, grid_blocks); int max_pins_per_clb = 0; for (const t_physical_tile_type& type : device_ctx.physical_tile_types) { @@ -1897,7 +1899,7 @@ static void alloc_and_load_placement_structs(float place_cost_exp, elem = OPEN; } - alloc_and_load_chan_w_factors_for_place_cost (place_cost_exp); + alloc_and_load_chan_w_factors_for_place_cost(place_cost_exp); alloc_and_load_try_swap_structs(place_ctx.cube_bb); From 578b335cbc9a0cd3127ca7cce77e249b2c1a900f Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 11:45:54 -0400 Subject: [PATCH 046/146] copy local placement loc vars to global state at the end of placement stage --- vpr/src/base/vpr_api.cpp | 2 +- vpr/src/place/median_move_generator.cpp | 4 ++-- vpr/src/place/net_cost_handler.cpp | 2 +- vpr/src/place/place.cpp | 21 ++++++++++++++++----- vpr/src/place/place.h | 2 -- 5 files changed, 20 insertions(+), 11 deletions(-) diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index 23a2a60c75f..396f7b6c63c 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -789,7 +789,7 @@ bool vpr_place_flow(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_a void vpr_place(const Netlist<>& net_list, t_vpr_setup& vpr_setup, const t_arch& arch) { bool is_flat = false; - if (placer_needs_lookahead(vpr_setup)) { + if (vpr_setup.PlacerOpts.place_algorithm.is_timing_driven()) { // Prime lookahead cache to avoid adding lookahead computation cost to // the placer timer. // Flat_routing is disabled in placement diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 6fbd0a43cc5..91b26222809 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -78,7 +78,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ } } else { t_bb union_bb; - const bool& cube_bb = g_vpr_ctx.placement().cube_bb; + const bool cube_bb = g_vpr_ctx.placement().cube_bb; if (!cube_bb) { union_bb = union_2d_bb(place_move_ctx.layer_bb_coords[net_id]); } @@ -327,7 +327,7 @@ bool MedianMoveGenerator::get_bb_incrementally(ClusterNetId net_id, t_bb union_bb_edge; t_bb union_bb; - const bool& cube_bb = g_vpr_ctx.placement().cube_bb; + const bool cube_bb = g_vpr_ctx.placement().cube_bb; /* Calculating per-layer bounding box is more time consuming compared to cube bounding box. To speed up * this move, the bounding box used for this move is of the type cube bounding box even if the per-layer * bounding box is used by placement SA engine. diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index b47646def0e..5692d17916f 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -1868,7 +1868,7 @@ static void set_bb_delta_cost(const int num_affected_nets, double& bb_delta_c) { for (int inet_affected = 0; inet_affected < num_affected_nets; inet_affected++) { ClusterNetId net_id = ts_nets_to_update[inet_affected]; - const auto& cube_bb = g_vpr_ctx.placement().cube_bb; + const auto cube_bb = g_vpr_ctx.placement().cube_bb; if (cube_bb) { proposed_net_cost[net_id] = get_net_cost(net_id, diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index adece9911f3..09c0ee2fe0a 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -344,6 +344,12 @@ static void print_placement_swaps_stats(const t_annealing_state& state, const t_ static void print_placement_move_types_stats(const MoveTypeStat& move_type_stat); +/** + * @brief Copies the placement location variables into the global placement context. + * @param place_loc_vars The placement location variables to be copied. + */ +static void copy_locs_to_global_state(const PlaceLocVars& place_loc_vars); + /*****************************************************************************/ void try_place(const Netlist<>& net_list, const t_placer_opts& placer_opts, @@ -419,8 +425,7 @@ void try_place(const Netlist<>& net_list, } } - g_vpr_ctx.mutable_placement().cube_bb = is_cube_bb(placer_opts.place_bounding_box_mode, - device_ctx.rr_graph); + g_vpr_ctx.mutable_placement().cube_bb = is_cube_bb(placer_opts.place_bounding_box_mode, device_ctx.rr_graph); const bool cube_bb = g_vpr_ctx.placement().cube_bb; VTR_LOG("\n"); @@ -986,6 +991,8 @@ void try_place(const Netlist<>& net_list, p_runtime_ctx.f_update_td_costs_nets_elapsed_sec, p_runtime_ctx.f_update_td_costs_sum_nets_elapsed_sec, p_runtime_ctx.f_update_td_costs_total_elapsed_sec); + + copy_locs_to_global_state(place_loc_vars); } /* Function to update the setup slacks and criticalities before the inner loop of the annealing/quench */ @@ -1586,7 +1593,7 @@ static bool is_cube_bb(const e_place_bounding_box_mode place_bb_mode, bool cube_bb; const int number_layers = g_vpr_ctx.device().grid.get_num_layers(); - // If the FPGA has only layer, then we can only use cube bounding box + // If the FPGA has only one layer, then we can only use cube bounding box if (number_layers == 1) { cube_bb = true; } else { @@ -2427,6 +2434,10 @@ static void calculate_reward_and_process_outcome( } } -bool placer_needs_lookahead(const t_vpr_setup& vpr_setup) { - return (vpr_setup.PlacerOpts.place_algorithm.is_timing_driven()); +static void copy_locs_to_global_state(const PlaceLocVars& place_loc_vars) { + auto& place_ctx = g_vpr_ctx.mutable_placement(); + + place_ctx.unlock_loc_vars(); + + place_ctx.mutable_place_loc_vars() = place_loc_vars; } diff --git a/vpr/src/place/place.h b/vpr/src/place/place.h index 55ff24b7ad6..dba2f79ab23 100644 --- a/vpr/src/place/place.h +++ b/vpr/src/place/place.h @@ -16,6 +16,4 @@ void try_place(const Netlist<>& net_list, int num_directs, bool is_flat); -bool placer_needs_lookahead(const t_vpr_setup& vpr_setup); - #endif From 7018bc37bafc27ff68064886855b49fe9dcf07cf Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 12:33:14 -0400 Subject: [PATCH 047/146] add place_loc_vars_ref to graphics --- vpr/src/base/place_and_route.cpp | 2 +- vpr/src/base/vpr_api.cpp | 4 ++-- vpr/src/draw/draw.cpp | 15 ++++----------- vpr/src/draw/draw.h | 4 ++-- vpr/src/draw/draw_global.cpp | 13 +++++++++++++ vpr/src/draw/draw_global.h | 4 ++++ vpr/src/draw/draw_types.h | 2 +- vpr/src/place/place.cpp | 2 +- vpr/src/route/route.cpp | 2 +- 9 files changed, 29 insertions(+), 19 deletions(-) diff --git a/vpr/src/base/place_and_route.cpp b/vpr/src/base/place_and_route.cpp index 6aeb07275cf..d4ed4d119ef 100644 --- a/vpr/src/base/place_and_route.cpp +++ b/vpr/src/base/place_and_route.cpp @@ -390,7 +390,7 @@ int binary_search_place_and_route(const Netlist<>& placement_net_list, &warnings, is_flat); - init_draw_coords(final); + init_draw_coords(final, g_vpr_ctx.placement().place_loc_vars()); /* Allocate and load additional rr_graph information needed only by the router. */ alloc_and_load_rr_node_route_structs(); diff --git a/vpr/src/base/vpr_api.cpp b/vpr/src/base/vpr_api.cpp index 396f7b6c63c..c2206fb0144 100644 --- a/vpr/src/base/vpr_api.cpp +++ b/vpr/src/base/vpr_api.cpp @@ -1077,7 +1077,7 @@ RouteStatus vpr_load_routing(t_vpr_setup& vpr_setup, net_delay); timing_info->update(); } - init_draw_coords(fixed_channel_width); + init_draw_coords(fixed_channel_width, g_vpr_ctx.placement().place_loc_vars()); return RouteStatus(is_legal, fixed_channel_width); } @@ -1116,7 +1116,7 @@ void vpr_create_rr_graph(t_vpr_setup& vpr_setup, const t_arch& arch, int chan_wi &warnings, is_flat); //Initialize drawing, now that we have an RR graph - init_draw_coords(chan_width_fac); + init_draw_coords(chan_width_fac, g_vpr_ctx.placement().place_loc_vars()); } void vpr_init_graphics(const t_vpr_setup& vpr_setup, const t_arch& arch, bool is_flat) { diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 2512fa31080..5ef4d730d2d 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -570,16 +570,18 @@ void free_draw_structs() { #endif /* NO_GRAPHICS */ } -void init_draw_coords(float width_val) { +void init_draw_coords(float width_val, const PlaceLocVars& place_loc_vars) { #ifndef NO_GRAPHICS /* Load the arrays containing the left and bottom coordinates of the clbs * * forming the FPGA. tile_width_val sets the width and height of a drawn * * clb. */ t_draw_state* draw_state = get_draw_state_vars(); t_draw_coords* draw_coords = get_draw_coords_vars(); - auto& device_ctx = g_vpr_ctx.device(); + const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; + set_graphics_place_loc_vars_ref(place_loc_vars); + if (!draw_state->show_graphics && !draw_state->save_graphics && draw_state->graphics_commands.empty()) return; //do not initialize only if --disp off and --save_graphics off @@ -717,10 +719,7 @@ void act_on_key_press(ezgl::application* app, GdkEventKey* /*event*/, char* key_ } void act_on_mouse_press(ezgl::application* app, GdkEventButton* event, double x, double y) { - // std::cout << "User clicked the "; - if (event->button == 1) { - // std::cout << "left "; if (window_mode) { //click on any two points to form new window rectangle bound @@ -780,12 +779,6 @@ void act_on_mouse_press(ezgl::application* app, GdkEventButton* event, double x, highlight_blocks(x, y); } } - // else if (event->button == 2) - // std::cout << "middle "; - // else if (event->button == 3) - // std::cout << "right "; - - // std::cout << "mouse button at coordinates (" << x << "," << y << ") " << std::endl; } void act_on_mouse_move(ezgl::application* app, GdkEventButton* /* event */, double x, double y) { diff --git a/vpr/src/draw/draw.h b/vpr/src/draw/draw.h index 1c39f12f49b..ed8f1e02477 100644 --- a/vpr/src/draw/draw.h +++ b/vpr/src/draw/draw.h @@ -46,7 +46,7 @@ void update_screen(ScreenUpdatePriority priority, const char* msg, enum pic_type //Initializes the drawing locations. //FIXME: Currently broken if no rr-graph is loaded -void init_draw_coords(float clb_width); +void init_draw_coords(float clb_width, const PlaceLocVars& place_loc_vars); /* Sets the static show_graphics and gr_automode variables to the * * desired values. They control if graphics are enabled and, if so, * @@ -132,7 +132,7 @@ bool highlight_loc_with_specific_color(t_pl_loc curr_loc, ezgl::color& loc_color * block types than colour choices. This ensures we support any number of types, although the colours may repeat.*/ ezgl::color get_block_type_color(t_physical_tile_type_ptr type); -/* Lightens a color's luminance [0, 1] by an aboslute 'amount' */ +/* Lightens a color's luminance [0, 1] by an absolute 'amount' */ ezgl::color lighten_color(ezgl::color color, float amount); void toggle_window_mode(GtkWidget* /*widget*/, ezgl::application* /*app*/); diff --git a/vpr/src/draw/draw_global.cpp b/vpr/src/draw/draw_global.cpp index 391b659bbcf..89a63c7a615 100644 --- a/vpr/src/draw/draw_global.cpp +++ b/vpr/src/draw/draw_global.cpp @@ -26,6 +26,11 @@ static t_draw_state draw_state; */ static t_draw_coords draw_coords; +/** + * @brief Stores a reference to a PlaceLocVars to be used in the graphics code. + */ +static std::optional> place_loc_vars_ref; + /*********************** Accessor Subroutines Definition ********************/ /* This accessor function returns pointer to the global variable @@ -40,4 +45,12 @@ t_draw_state* get_draw_state_vars() { return &draw_state; } +void set_graphics_place_loc_vars_ref(const PlaceLocVars& place_loc_vars) { + place_loc_vars_ref = std::ref(place_loc_vars); +} + +const PlaceLocVars& get_graphics_place_loc_vars_ref() { + return place_loc_vars_ref->get(); +} + #endif // NO_GRAPHICS diff --git a/vpr/src/draw/draw_global.h b/vpr/src/draw/draw_global.h index f1eec3967f5..186b439d64d 100644 --- a/vpr/src/draw/draw_global.h +++ b/vpr/src/draw/draw_global.h @@ -27,6 +27,10 @@ t_draw_coords* get_draw_coords_vars(); t_draw_state* get_draw_state_vars(); +void set_graphics_place_loc_vars_ref(const PlaceLocVars& place_loc_vars); + +const PlaceLocVars& get_graphics_place_loc_vars_ref(); + #endif // NO_GRAPHICS #endif diff --git a/vpr/src/draw/draw_types.h b/vpr/src/draw/draw_types.h index 4750dc37dfe..b494d697e85 100644 --- a/vpr/src/draw/draw_types.h +++ b/vpr/src/draw/draw_types.h @@ -397,7 +397,7 @@ struct t_draw_coords { private: float tile_width; - friend void init_draw_coords(float); + friend void init_draw_coords(float width_val, const PlaceLocVars& place_loc_vars); }; #endif // NO_GRAPHICS diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 09c0ee2fe0a..889b35d245b 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -482,7 +482,7 @@ void try_place(const Netlist<>& net_list, } const int width_fac = placer_opts.place_chan_width; - init_draw_coords((float)width_fac); + init_draw_coords((float)width_fac, place_loc_vars); /* Allocated here because it goes into timing critical code where each memory allocation is expensive */ IntraLbPbPinLookup pb_gpin_lookup(device_ctx.logical_block_types); diff --git a/vpr/src/route/route.cpp b/vpr/src/route/route.cpp index d7488910834..4887a721359 100644 --- a/vpr/src/route/route.cpp +++ b/vpr/src/route/route.cpp @@ -64,7 +64,7 @@ bool route(const Netlist<>& net_list, is_flat); //Initialize drawing, now that we have an RR graph - init_draw_coords(width_fac); + init_draw_coords(width_fac, g_vpr_ctx.placement().place_loc_vars()); /* Allocate and load additional rr_graph information needed only by the router. */ alloc_and_load_rr_node_route_structs(); From 72f830ab9259f5ac3f0535d682e5840ac1c3d0cf Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 12:48:04 -0400 Subject: [PATCH 048/146] replace accesses to placement context in graphics with accesses to its reference holder --- vpr/src/draw/draw.cpp | 6 +++--- vpr/src/draw/draw_basic.cpp | 14 +++++++------- vpr/src/draw/draw_searchbar.cpp | 2 +- vpr/src/draw/draw_types.cpp | 6 +++--- vpr/src/draw/intra_logic_block.cpp | 18 ++++++++++-------- vpr/src/draw/manual_moves.cpp | 8 ++++---- vpr/src/draw/search_bar.cpp | 4 ++-- 7 files changed, 30 insertions(+), 28 deletions(-) diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 5ef4d730d2d..9911e8ba147 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -1004,7 +1004,7 @@ static void highlight_blocks(double x, double y) { } auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); VTR_ASSERT(clb_index != EMPTY_BLOCK_ID); @@ -1048,7 +1048,7 @@ ClusterBlockId get_cluster_block_id_from_xy_loc(double x, double y) { ClusterBlockId clb_index = EMPTY_BLOCK_ID; auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_blocks = get_graphics_place_loc_vars_ref().grid_blocks(); /// determine block /// ezgl::rectangle clb_bbox; @@ -1071,7 +1071,7 @@ ClusterBlockId get_cluster_block_id_from_xy_loc(double x, double y) { // iterate over sub_blocks const auto& type = device_ctx.grid.get_physical_type({i, j, layer_num}); for (int k = 0; k < type->capacity; ++k) { - clb_index = place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}); + clb_index = grid_blocks.block_at_location({i, j, k, layer_num}); if (clb_index != EMPTY_BLOCK_ID) { clb_bbox = draw_coords->get_absolute_clb_bbox(clb_index, cluster_ctx.clb_nlist.block_type(clb_index)); diff --git a/vpr/src/draw/draw_basic.cpp b/vpr/src/draw/draw_basic.cpp index df2a1a3a35a..a095c4d1c5a 100644 --- a/vpr/src/draw/draw_basic.cpp +++ b/vpr/src/draw/draw_basic.cpp @@ -103,7 +103,7 @@ void drawplace(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_blocks = get_graphics_place_loc_vars_ref().grid_blocks(); ClusterBlockId bnum; int num_sub_tiles; @@ -136,7 +136,7 @@ void drawplace(ezgl::renderer* g) { for (int k = 0; k < num_sub_tiles; ++k) { /* Look at the tile at start of large block */ - bnum = place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}); + bnum = grid_blocks.block_at_location({i, j, k, layer_num}); /* Fill background for the clb. Do not fill if "show_blk_internal" * is toggled. */ @@ -159,7 +159,7 @@ void drawplace(ezgl::renderer* g) { block_color); } // No color specified at this location; use the block color. - if (current_loc_is_highlighted == false) { + if (!current_loc_is_highlighted) { if (bnum != EMPTY_BLOCK_ID) { block_color = draw_state->block_color(bnum); } else { @@ -230,7 +230,7 @@ void drawnets(ezgl::renderer* g) { ClusterBlockId b1, b2; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); float transparency_factor; float NET_ALPHA = draw_state->net_alpha; @@ -804,7 +804,7 @@ void draw_placement_macros(ezgl::renderer* g) { t_draw_coords* draw_coords = get_draw_coords_vars(); auto& place_ctx = g_vpr_ctx.placement(); - auto& block_locs = place_ctx.block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); for (const t_pl_macro& pl_macro : place_ctx.pl_macros) { @@ -1187,7 +1187,7 @@ void draw_crit_path_elements(const std::vector& paths, const } int get_timing_path_node_layer_num(tatum::NodeId node) { - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); auto& atom_ctx = g_vpr_ctx.atom(); AtomPinId atom_pin = atom_ctx.lookup.tnode_atom_pin(node); @@ -1420,7 +1420,7 @@ void draw_block_pin_util() { auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); std::map total_input_pins; std::map total_output_pins; diff --git a/vpr/src/draw/draw_searchbar.cpp b/vpr/src/draw/draw_searchbar.cpp index 52edef692ee..48175343b98 100644 --- a/vpr/src/draw/draw_searchbar.cpp +++ b/vpr/src/draw/draw_searchbar.cpp @@ -110,7 +110,7 @@ void draw_highlight_blocks_color(t_logical_block_type_ptr type, t_draw_state* draw_state = get_draw_state_vars(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); for (k = 0; k < type->pb_type->num_pins; k++) { /* Each pin on a CLB */ ClusterNetId net_id = cluster_ctx.clb_nlist.block_net(blk_id, k); diff --git a/vpr/src/draw/draw_types.cpp b/vpr/src/draw/draw_types.cpp index 84a399b7dde..bdb8c174ad5 100644 --- a/vpr/src/draw/draw_types.cpp +++ b/vpr/src/draw/draw_types.cpp @@ -15,7 +15,7 @@ ezgl::color t_draw_state::block_color(ClusterBlockId blk) const { if (use_default_block_color_[blk]) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); t_physical_tile_type_ptr tile_type = nullptr; if (block_locs.empty()) { //No placement, pick best match @@ -88,7 +88,7 @@ float t_draw_coords::get_tile_height() { } ezgl::rectangle t_draw_coords::get_pb_bbox(ClusterBlockId clb_index, const t_pb_graph_node& pb_gnode) { - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); auto& cluster_ctx = g_vpr_ctx.clustering(); return get_pb_bbox(block_locs[clb_index].loc.layer, @@ -153,7 +153,7 @@ ezgl::rectangle t_draw_coords::get_absolute_pb_bbox(const ClusterBlockId clb_ind } ezgl::rectangle t_draw_coords::get_absolute_clb_bbox(const ClusterBlockId clb_index, const t_logical_block_type_ptr block_type) { - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); t_pl_loc loc = block_locs[clb_index].loc; return get_pb_bbox(loc.layer, loc.x, loc.y, loc.sub_tile, block_type); diff --git a/vpr/src/draw/intra_logic_block.cpp b/vpr/src/draw/intra_logic_block.cpp index 21999ca7f58..1b9d97862b2 100644 --- a/vpr/src/draw/intra_logic_block.cpp +++ b/vpr/src/draw/intra_logic_block.cpp @@ -152,7 +152,7 @@ void draw_internal_draw_subblk(ezgl::renderer* g) { } auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_blocks = get_graphics_place_loc_vars_ref().grid_blocks(); int total_layer_num = device_ctx.grid.get_num_layers(); @@ -175,14 +175,16 @@ void draw_internal_draw_subblk(ezgl::renderer* g) { int num_sub_tiles = type->capacity; for (int k = 0; k < num_sub_tiles; ++k) { /* Don't draw if block is empty. */ - if (place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}) == EMPTY_BLOCK_ID || place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}) == INVALID_BLOCK_ID) + if (grid_blocks.block_at_location({i, j, k, layer_num}) == EMPTY_BLOCK_ID || grid_blocks.block_at_location({i, j, k, layer_num}) == INVALID_BLOCK_ID) { continue; + } /* Get block ID */ - ClusterBlockId bnum = place_ctx.get_grid_blocks().block_at_location({i, j, k, layer_num}); + ClusterBlockId bnum = grid_blocks.block_at_location({i, j, k, layer_num}); /* Safety check, that physical blocks exists in the CLB */ - if (cluster_ctx.clb_nlist.block_pb(bnum) == nullptr) + if (cluster_ctx.clb_nlist.block_pb(bnum) == nullptr) { continue; + } draw_internal_pb(bnum, cluster_ctx.clb_nlist.block_pb(bnum), ezgl::rectangle({0, 0}, 0, 0), cluster_ctx.clb_nlist.block_type(bnum), g); } } @@ -271,7 +273,7 @@ draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node float sub_tile_x, sub_tile_y; float child_width, child_height; auto& device_ctx = g_vpr_ctx.device(); - auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_blocks = get_graphics_place_loc_vars_ref().grid_blocks(); // get the bbox for this pb type ezgl::rectangle& pb_bbox = get_draw_coords_vars()->blk_info.at(type_descrip_index).get_pb_bbox_ref(*pb_graph_node); @@ -289,7 +291,7 @@ draw_internal_calc_coords(int type_descrip_index, t_pb_graph_node* pb_graph_node int capacity = device_ctx.physical_tile_types[type_descrip_index].capacity; // TODO: this is a hack - should be fixed for the layer_num const auto& type = device_ctx.grid.get_physical_type({1, 0, 0}); - if (capacity > 1 && device_ctx.grid.width() > 0 && device_ctx.grid.height() > 0 && place_ctx.get_grid_blocks().get_usage({1, 0, 0}) != 0 + if (capacity > 1 && device_ctx.grid.width() > 0 && device_ctx.grid.height() > 0 && grid_blocks.get_usage({1, 0, 0}) != 0 && type_descrip_index == type->index) { // that should test for io blocks, and setting capacity_divisor > 1 // will squish every thing down @@ -339,7 +341,7 @@ static void draw_internal_pb(const ClusterBlockId clb_index, t_pb* pb, const ezg t_draw_coords* draw_coords = get_draw_coords_vars(); t_draw_state* draw_state = get_draw_state_vars(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); t_selected_sub_block_info& sel_sub_info = get_selected_sub_block_info(); @@ -557,7 +559,7 @@ void draw_logical_connections(ezgl::renderer* g) { t_draw_state* draw_state = get_draw_state_vars(); auto& atom_ctx = g_vpr_ctx.atom(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); g->set_line_dash(ezgl::line_dash::none); diff --git a/vpr/src/draw/manual_moves.cpp b/vpr/src/draw/manual_moves.cpp index 1c51df8996f..365ef7a13f6 100644 --- a/vpr/src/draw/manual_moves.cpp +++ b/vpr/src/draw/manual_moves.cpp @@ -148,8 +148,8 @@ void calculate_cost_callback(GtkWidget* /*widget*/, GtkWidget* grid) { bool is_manual_move_legal(ClusterBlockId block_id, t_pl_loc to) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); + const auto& grid_blocks = get_graphics_place_loc_vars_ref().grid_blocks(); //if the block is not found if ((!cluster_ctx.clb_nlist.valid_block_id(ClusterBlockId(block_id)))) { @@ -173,16 +173,16 @@ bool is_manual_move_legal(ClusterBlockId block_id, t_pl_loc to) { } //If the destination block is user constrained, abort this swap - auto b_to = place_ctx.get_grid_blocks().block_at_location(to); + ClusterBlockId b_to = grid_blocks.block_at_location(to); if (b_to != INVALID_BLOCK_ID && b_to != EMPTY_BLOCK_ID) { - if (place_ctx.block_locs()[b_to].is_fixed) { + if (get_graphics_place_loc_vars_ref().block_locs()[b_to].is_fixed) { invalid_breakpoint_entry_window("Block is fixed"); return false; } } //If the block requested is already in that location. - t_pl_loc current_block_loc = place_ctx.block_locs()[block_id].loc; + t_pl_loc current_block_loc = get_graphics_place_loc_vars_ref().block_locs()[block_id].loc; if (to.x == current_block_loc.x && to.y == current_block_loc.y && to.sub_tile == current_block_loc.sub_tile) { invalid_breakpoint_entry_window("The block is currently in this location"); return false; diff --git a/vpr/src/draw/search_bar.cpp b/vpr/src/draw/search_bar.cpp index a6c194d2330..4e26c874402 100644 --- a/vpr/src/draw/search_bar.cpp +++ b/vpr/src/draw/search_bar.cpp @@ -283,7 +283,7 @@ void auto_zoom_rr_node(RRNodeId rr_node_id) { void highlight_cluster_block(ClusterBlockId clb_index) { char msg[vtr::bufsize]; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_ctx = g_vpr_ctx.placement(); + const auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); /// determine block /// ezgl::rectangle clb_bbox; @@ -302,7 +302,7 @@ void highlight_cluster_block(ClusterBlockId clb_index) { draw_highlight_blocks_color(cluster_ctx.clb_nlist.block_type(clb_index), clb_index); sprintf(msg, "Block #%zu (%s) at (%d, %d) selected.", size_t(clb_index), cluster_ctx.clb_nlist.block_name(clb_index).c_str(), - place_ctx.block_locs()[clb_index].loc.x, place_ctx.block_locs()[clb_index].loc.y); + block_locs[clb_index].loc.x, block_locs[clb_index].loc.y); } application.update_message(msg); From 67fe9c3b7373bc8c9fc73b80544285aea7290e17 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 12:49:46 -0400 Subject: [PATCH 049/146] update the graphic place loc vars reference after the placement stage --- vpr/src/place/place.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 889b35d245b..9cd5780d388 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -2436,8 +2436,11 @@ static void calculate_reward_and_process_outcome( static void copy_locs_to_global_state(const PlaceLocVars& place_loc_vars) { auto& place_ctx = g_vpr_ctx.mutable_placement(); + auto& global_place_loc_vars = place_ctx.mutable_place_loc_vars(); place_ctx.unlock_loc_vars(); - place_ctx.mutable_place_loc_vars() = place_loc_vars; + global_place_loc_vars = place_loc_vars; + + set_graphics_place_loc_vars_ref(global_place_loc_vars); } From b39cfe8f924c5ae6c3482497c5c88696124a1fb0 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 13:04:27 -0400 Subject: [PATCH 050/146] unlock place_loc_vars before accessing it --- vpr/src/place/place.cpp | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 9cd5780d388..708b6a564fb 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -2436,11 +2436,16 @@ static void calculate_reward_and_process_outcome( static void copy_locs_to_global_state(const PlaceLocVars& place_loc_vars) { auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& global_place_loc_vars = place_ctx.mutable_place_loc_vars(); + // the placement location variables should be unlocked before being accessed place_ctx.unlock_loc_vars(); + // copy the local location variables into the global state + auto& global_place_loc_vars = place_ctx.mutable_place_loc_vars(); global_place_loc_vars = place_loc_vars; +#ifndef NO_GRAPHICS + // update the graphics' reference to placement location variables set_graphics_place_loc_vars_ref(global_place_loc_vars); +#endif } From 0fa2cfdeeb64d5494425f437482763f79adb4c25 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 13:17:19 -0400 Subject: [PATCH 051/146] enum class e_reward_function --- vpr/src/place/directed_moves_util.cpp | 8 +++--- vpr/src/place/directed_moves_util.h | 2 +- vpr/src/place/place.cpp | 34 ++++++++++------------- vpr/src/place/simpleRL_move_generator.cpp | 2 +- 4 files changed, 21 insertions(+), 25 deletions(-) diff --git a/vpr/src/place/directed_moves_util.cpp b/vpr/src/place/directed_moves_util.cpp index 695500eb383..fb90f88a802 100644 --- a/vpr/src/place/directed_moves_util.cpp +++ b/vpr/src/place/directed_moves_util.cpp @@ -136,10 +136,10 @@ void calculate_centroid_loc(ClusterBlockId b_from, } static std::map available_reward_function = { - {"basic", BASIC}, - {"nonPenalizing_basic", NON_PENALIZING_BASIC}, - {"runtime_aware", RUNTIME_AWARE}, - {"WLbiased_runtime_aware", WL_BIASED_RUNTIME_AWARE}}; + {"basic", e_reward_function::BASIC}, + {"nonPenalizing_basic", e_reward_function::NON_PENALIZING_BASIC}, + {"runtime_aware", e_reward_function::RUNTIME_AWARE}, + {"WLbiased_runtime_aware", e_reward_function::WL_BIASED_RUNTIME_AWARE}}; e_reward_function string_to_reward(const std::string& st) { return available_reward_function[st]; diff --git a/vpr/src/place/directed_moves_util.h b/vpr/src/place/directed_moves_util.h index ee7f45cd732..9a6514e3743 100644 --- a/vpr/src/place/directed_moves_util.h +++ b/vpr/src/place/directed_moves_util.h @@ -7,7 +7,7 @@ /** * @brief enum represents the different reward functions */ -enum e_reward_function { +enum class e_reward_function { BASIC, ///@ directly uses the change of the annealing cost function NON_PENALIZING_BASIC, ///@ same as basic reward function but with 0 reward if it's a hill-climbing one RUNTIME_AWARE, ///@ same as NON_PENALIZING_BASIC but with normalizing with the runtime factor of each move type diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 708b6a564fb..c6832fd5ca8 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -319,12 +319,11 @@ static void generate_post_place_timing_reports(const t_placer_opts& placer_opts, bool is_flat); //calculate the agent's reward and the total process outcome -static void calculate_reward_and_process_outcome( - const t_placer_opts& placer_opts, - const MoveOutcomeStats& move_outcome_stats, - const double& delta_c, - float timing_bb_factor, - MoveGenerator& move_generator); +static void calculate_reward_and_process_outcome(const t_placer_opts& placer_opts, + const MoveOutcomeStats& move_outcome_stats, + double delta_c, + float timing_bb_factor, + MoveGenerator& move_generator); static void print_place_status_header(bool noc_enabled); @@ -2023,7 +2022,7 @@ static int check_placement_costs(const t_placer_costs& costs, double bb_cost_check; double timing_cost_check; - const auto& cube_bb = g_vpr_ctx.placement().cube_bb; + const bool cube_bb = g_vpr_ctx.placement().cube_bb; if (cube_bb) { bb_cost_check = comp_bb_cost(CHECK); @@ -2398,28 +2397,25 @@ static void print_placement_move_types_stats(const MoveTypeStat& move_type_stat) VTR_LOG("\n"); } -static void calculate_reward_and_process_outcome( - const t_placer_opts& placer_opts, - const MoveOutcomeStats& move_outcome_stats, - const double& delta_c, - float timing_bb_factor, - MoveGenerator& move_generator) { - std::string reward_fun_string = placer_opts.place_reward_fun; +static void calculate_reward_and_process_outcome(const t_placer_opts& placer_opts, + const MoveOutcomeStats& move_outcome_stats, + double delta_c, + float timing_bb_factor, + MoveGenerator& move_generator) { static std::optional reward_fun; if (!reward_fun.has_value()) { - reward_fun = string_to_reward(reward_fun_string); + reward_fun = string_to_reward(placer_opts.place_reward_fun); } - if (reward_fun == BASIC) { + if (reward_fun == e_reward_function::BASIC) { move_generator.process_outcome(-1 * delta_c, reward_fun.value()); - } else if (reward_fun == NON_PENALIZING_BASIC - || reward_fun == RUNTIME_AWARE) { + } else if (reward_fun == e_reward_function::NON_PENALIZING_BASIC || reward_fun == e_reward_function::RUNTIME_AWARE) { if (delta_c < 0) { move_generator.process_outcome(-1 * delta_c, reward_fun.value()); } else { move_generator.process_outcome(0, reward_fun.value()); } - } else if (reward_fun == WL_BIASED_RUNTIME_AWARE) { + } else if (reward_fun == e_reward_function::WL_BIASED_RUNTIME_AWARE) { if (delta_c < 0) { float reward = -1 * (move_outcome_stats.delta_cost_norm diff --git a/vpr/src/place/simpleRL_move_generator.cpp b/vpr/src/place/simpleRL_move_generator.cpp index 45e43e05762..3c1539d244c 100644 --- a/vpr/src/place/simpleRL_move_generator.cpp +++ b/vpr/src/place/simpleRL_move_generator.cpp @@ -112,7 +112,7 @@ std::vector KArmedBanditAgent::get_available_logical_blk_types_() { void KArmedBanditAgent::process_outcome(double reward, e_reward_function reward_fun) { ++num_action_chosen_[last_action_]; - if (reward_fun == RUNTIME_AWARE || reward_fun == WL_BIASED_RUNTIME_AWARE) { + if (reward_fun == e_reward_function::RUNTIME_AWARE || reward_fun == e_reward_function::WL_BIASED_RUNTIME_AWARE) { e_move_type move_type = action_to_move_type_(last_action_); reward /= time_elapsed_[move_type]; } From 34a680a3cac7aaf24fb927a91cdf153b911604db Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 13:48:31 -0400 Subject: [PATCH 052/146] replace accesses to global block_locs and grid_blocks with a reference to place location vars --- vpr/src/place/analytic_placer.cpp | 8 +++-- vpr/src/place/analytic_placer.h | 6 +++- vpr/src/place/cut_spreader.cpp | 58 +++++++++++++++---------------- vpr/src/place/place.cpp | 5 +-- 4 files changed, 41 insertions(+), 36 deletions(-) diff --git a/vpr/src/place/analytic_placer.cpp b/vpr/src/place/analytic_placer.cpp index e07f94adca4..348ad43359f 100644 --- a/vpr/src/place/analytic_placer.cpp +++ b/vpr/src/place/analytic_placer.cpp @@ -128,7 +128,9 @@ constexpr int HEAP_STALLED_ITERATIONS_STOP = 15; * Currently only initializing AP configuration parameters * Placement & device info is accessed via g_vpr_ctx */ -AnalyticPlacer::AnalyticPlacer() { + +AnalyticPlacer::AnalyticPlacer(const PlaceLocVars& place_loc_vars) + : placer_loc_vars_ref_(place_loc_vars) { //Eigen::initParallel(); // TODO: PlacerHeapCfg should be externally configured & supplied @@ -301,7 +303,7 @@ void AnalyticPlacer::build_legal_locations() { // initialize other data members void AnalyticPlacer::init() { const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = placer_loc_vars_ref_.block_locs(); for (auto blk_id : clb_nlist.blocks()) { blk_locs.insert(blk_id, BlockLocation{}); @@ -741,7 +743,7 @@ std::string AnalyticPlacer::print_overlap(vtr::Matrix& overlap, FILE* fp) { void AnalyticPlacer::print_place(const char* place_file) { const DeviceContext& device_ctx = g_vpr_ctx.device(); const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& block_locs = g_vpr_ctx.placement().block_locs(); + auto& block_locs = placer_loc_vars_ref_.block_locs(); FILE* fp; diff --git a/vpr/src/place/analytic_placer.h b/vpr/src/place/analytic_placer.h index e31775adf7e..ec2e1ce5ebc 100644 --- a/vpr/src/place/analytic_placer.h +++ b/vpr/src/place/analytic_placer.h @@ -122,7 +122,8 @@ class AnalyticPlacer { * @brief Constructor of AnalyticPlacer, currently initializes AnalyticPlacerCfg for the analytic placer * To tune these parameters, change directly in constructor */ - AnalyticPlacer(); + AnalyticPlacer() = delete; + explicit AnalyticPlacer(const PlaceLocVars& place_loc_vars); /* * @brief main function of analytic placement @@ -180,6 +181,9 @@ class AnalyticPlacer { // Lookup from blockID to block location vtr::vector_map blk_locs; + // reference to the placement location variables + PlaceLocVars& placer_loc_vars_ref_; + /* * The set of blks of different types to be placed by AnalyticPlacement process, * i.e. the free variable blocks. diff --git a/vpr/src/place/cut_spreader.cpp b/vpr/src/place/cut_spreader.cpp index 328b8310615..5af19a1a966 100644 --- a/vpr/src/place/cut_spreader.cpp +++ b/vpr/src/place/cut_spreader.cpp @@ -405,7 +405,7 @@ void CutSpreader::expand_regions() { std::pair CutSpreader::cut_region(SpreaderRegion& r, bool dir) { const DeviceContext& device_ctx = g_vpr_ctx.device(); const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - PlacementContext& place_ctx = g_vpr_ctx.mutable_placement(); + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; // TODO: CutSpreader is not compatible with 3D FPGA VTR_ASSERT(device_ctx.grid.get_num_layers() == 1); @@ -503,7 +503,7 @@ std::pair CutSpreader::cut_region(SpreaderRegion& r, bool dir) { // while left subarea is over-utilized, move logic blocks to the right subarea one at a time while (pivot > 0 && rl.overused(ap->ap_cfg.beta)) { auto& move_blk = cut_blks.at(pivot); - int size = (imacro(move_blk) != NO_MACRO) ? place_ctx.pl_macros[imacro(move_blk)].members.size() : 1; + int size = (imacro(move_blk) != NO_MACRO) ? pl_macros[imacro(move_blk)].members.size() : 1; rl.n_blks -= size; rr.n_blks += size; pivot--; @@ -511,7 +511,7 @@ std::pair CutSpreader::cut_region(SpreaderRegion& r, bool dir) { // while right subarea is over-utilized, move logic blocks to the left subarea one at a time while (pivot < int(cut_blks.size()) - 1 && rr.overused(ap->ap_cfg.beta)) { auto& move_blk = cut_blks.at(pivot + 1); - int size = (imacro(move_blk) != NO_MACRO) ? place_ctx.pl_macros[imacro(move_blk)].members.size() : 1; + int size = (imacro(move_blk) != NO_MACRO) ? pl_macros[imacro(move_blk)].members.size() : 1; rl.n_blks += size; rr.n_blks -= size; pivot++; @@ -617,7 +617,7 @@ int CutSpreader::initial_source_cut(SpreaderRegion& r, bool dir, int& clearance_l, int& clearance_r) { - PlacementContext& place_ctx = g_vpr_ctx.mutable_placement(); + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; // pivot is the midpoint of cut_blks in terms of total block size (counting macro members) // this ensures the initial partitions have similar number of blocks @@ -625,7 +625,7 @@ int CutSpreader::initial_source_cut(SpreaderRegion& r, int pivot = 0; // midpoint in terms of index of cut_blks for (auto& blk : cut_blks) { // if blk is part of macro (only macro heads in cut_blks, no macro members), add that macro's size - pivot_blks += (imacro(blk) != NO_MACRO) ? place_ctx.pl_macros[imacro(blk)].members.size() : 1; + pivot_blks += (imacro(blk) != NO_MACRO) ? pl_macros[imacro(blk)].members.size() : 1; if (pivot_blks >= r.n_blks / 2) break; pivot++; @@ -670,16 +670,16 @@ int CutSpreader::initial_target_cut(SpreaderRegion& r, int& right_blks_n, int& left_tiles_n, int& right_tiles_n) { - PlacementContext& place_ctx = g_vpr_ctx.mutable_placement(); + const auto& pl_macros = g_vpr_ctx.mutable_placement().pl_macros; // To achieve smallest difference in utilization, first move all tiles to right partition left_blks_n = 0, right_blks_n = 0; left_tiles_n = 0, right_tiles_n = r.n_tiles; // count number of blks in each partition, from initial source cut for (int i = 0; i <= init_source_cut; i++) - left_blks_n += (imacro(cut_blks.at(i)) != NO_MACRO) ? place_ctx.pl_macros[imacro(cut_blks.at(i))].members.size() : 1; + left_blks_n += (imacro(cut_blks.at(i)) != NO_MACRO) ? pl_macros[imacro(cut_blks.at(i))].members.size() : 1; for (int i = init_source_cut + 1; i < int(cut_blks.size()); i++) - right_blks_n += (imacro(cut_blks.at(i)) != NO_MACRO) ? place_ctx.pl_macros[imacro(cut_blks.at(i))].members.size() : 1; + right_blks_n += (imacro(cut_blks.at(i)) != NO_MACRO) ? pl_macros[imacro(cut_blks.at(i))].members.size() : 1; int best_tgt_cut = -1; double best_deltaU = std::numeric_limits::max(); @@ -805,8 +805,8 @@ void CutSpreader::linear_spread_subarea(std::vector& cut_blks, */ void CutSpreader::strict_legalize() { auto& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - auto& place_ctx = g_vpr_ctx.placement(); - auto& block_locs = place_ctx.block_locs(); + const auto& block_locs = ap->placer_loc_vars_ref_.block_locs(); + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; int max_x = g_vpr_ctx.device().grid.width(); int max_y = g_vpr_ctx.device().grid.height(); @@ -824,7 +824,7 @@ void CutSpreader::strict_legalize() { std::priority_queue> remaining; for (ClusterBlockId blk : ap->solve_blks) { if (imacro(blk) != NO_MACRO) // blk is head block of a macro (only head blks are solved) - remaining.emplace(place_ctx.pl_macros[imacro(blk)].members.size(), blk); + remaining.emplace(pl_macros[imacro(blk)].members.size(), blk); else remaining.emplace(1, blk); } @@ -962,16 +962,15 @@ void CutSpreader::strict_legalize() { * Place blk on sub_tile location by modifying place_ctx.grid_blocks, place_ctx.block_locs, and ap->blk_locs[blk].loc */ void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); - auto& block_locs = place_ctx.mutable_block_locs(); + auto& grid_blocks = ap->placer_loc_vars_ref_.mutable_grid_blocks(); + auto& block_locs = ap->placer_loc_vars_ref_.mutable_block_locs(); VTR_ASSERT(grid_blocks.block_at_location(sub_tile) == EMPTY_BLOCK_ID); VTR_ASSERT(block_locs[blk].is_fixed == false); grid_blocks.set_block_at_location(sub_tile, blk); block_locs[blk].loc = sub_tile; grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, - place_ctx.get_grid_blocks().get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) + 1); + grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) + 1); ap->blk_locs[blk].loc = sub_tile; } @@ -980,9 +979,8 @@ void CutSpreader::bind_tile(t_pl_loc sub_tile, ClusterBlockId blk) { * Remove placement at sub_tile location by clearing place_ctx.block_locs and place_Ctx.grid_blocks */ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); - auto& grid_blocks = place_ctx.get_mutable_grid_blocks(); - auto& block_locs = place_ctx.mutable_block_locs(); + auto& grid_blocks = ap->placer_loc_vars_ref_.mutable_grid_blocks(); + auto& block_locs = ap->placer_loc_vars_ref_.mutable_block_locs(); VTR_ASSERT(grid_blocks.block_at_location(sub_tile) != EMPTY_BLOCK_ID); ClusterBlockId blk = grid_blocks.block_at_location(sub_tile); @@ -990,7 +988,7 @@ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { block_locs[blk].loc = t_pl_loc{}; grid_blocks.set_block_at_location(sub_tile, EMPTY_BLOCK_ID); grid_blocks.set_usage({sub_tile.x, sub_tile.y, sub_tile.layer}, - place_ctx.get_grid_blocks().get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) - 1); + grid_blocks.get_usage({sub_tile.x, sub_tile.y, sub_tile.layer}) - 1); } /* @@ -999,9 +997,8 @@ void CutSpreader::unbind_tile(t_pl_loc sub_tile) { * the block in place_ctx.grid_blocks) */ bool CutSpreader::is_placed(ClusterBlockId blk) { - auto& place_ctx = g_vpr_ctx.placement(); - auto& grid_blocks = place_ctx.get_grid_blocks(); - auto& block_locs = place_ctx.block_locs(); + const auto& grid_blocks = ap->placer_loc_vars_ref_.grid_blocks(); + const auto& block_locs = ap->placer_loc_vars_ref_.block_locs(); if (block_locs[blk].loc != t_pl_loc{}) { auto loc = block_locs[blk].loc; @@ -1035,14 +1032,14 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, int& best_inp_len, t_pl_loc& best_subtile, std::priority_queue>& remaining) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); + const auto& grid_blocks = ap->placer_loc_vars_ref_.grid_blocks(); const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; - // iteration at current radius has exceed exploration limit, and a candidate sub_tile (best_subtile) is found + // iteration at current radius has exceeded exploration limit, and a candidate sub_tile (best_subtile) is found // then blk is placed in best_subtile if (exceeds_explore_limit && best_subtile != t_pl_loc{}) { // find the logic block bound to (placed on) best_subtile - ClusterBlockId bound_blk = place_ctx.get_grid_blocks().block_at_location(best_subtile); + ClusterBlockId bound_blk = grid_blocks.block_at_location(best_subtile); if (bound_blk != EMPTY_BLOCK_ID) { // if best_subtile has a logic block unbind_tile(best_subtile); // clear bound_block and best_subtile's placement info remaining.emplace(1, bound_blk); // put bound_blk back into remaining blocks to place @@ -1053,7 +1050,7 @@ bool CutSpreader::try_place_blk(ClusterBlockId blk, // if exploration limit is not met or a candidate sub_tile is not found yet for (auto sub_t : subtiles_at_location[nx][ny]) { // for each available sub_tile at random location - ClusterBlockId bound_blk = place_ctx.get_grid_blocks().block_at_location(sub_t); // logic blk at [nx, ny] + ClusterBlockId bound_blk = grid_blocks.block_at_location(sub_t); // logic blk at [nx, ny] if (bound_blk == EMPTY_BLOCK_ID || ripup_radius_met || rand() % (20000) < 10) { @@ -1113,7 +1110,8 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, int nx, int ny, std::priority_queue>& remaining) { - auto& place_ctx = g_vpr_ctx.mutable_placement(); + const auto& pl_macros = g_vpr_ctx.placement().pl_macros; + const auto& grid_blocks = ap->placer_loc_vars_ref_.grid_blocks(); const ClusteredNetlist& clb_nlist = g_vpr_ctx.clustering().clb_nlist; for (auto sub_t : subtiles_at_location[nx][ny]) { @@ -1137,7 +1135,7 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, // if the target location has a logic block, ensure it's not part of a macro // because a macro placed before the current one has higher priority (longer chain) - ClusterBlockId bound = place_ctx.get_grid_blocks().block_at_location(target); + ClusterBlockId bound = grid_blocks.block_at_location(target); if (bound != EMPTY_BLOCK_ID && imacro(bound) != NO_MACRO) { placement_impossible = true; break; @@ -1146,7 +1144,7 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, targets.emplace_back(visit_blk, target); if (macro_head(visit_blk) == visit_blk) { // if visit_blk is the head block of the macro // push all macro members to visit queue along with their calculated positions - const std::vector& members = place_ctx.pl_macros[imacro(blk)].members; + const std::vector& members = pl_macros[imacro(blk)].members; for (auto member = members.begin() + 1; member != members.end(); ++member) { t_pl_loc mloc = target + member->offset; // calculate member_loc using (head blk location + offset) visit.emplace(member->blk_index, mloc); @@ -1156,7 +1154,7 @@ bool CutSpreader::try_place_macro(ClusterBlockId blk, if (!placement_impossible) { // if placement is possible, apply this placement for (auto& target : targets) { - ClusterBlockId bound = place_ctx.get_grid_blocks().block_at_location(target.second); + ClusterBlockId bound = grid_blocks.block_at_location(target.second); if (bound != EMPTY_BLOCK_ID) { // if target location has a logic block, displace it and put it in remaining queue to be placed later unbind_tile(target.second); diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index c6832fd5ca8..e7c3b3c1657 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -722,8 +722,9 @@ void try_place(const Netlist<>& net_list, #ifdef ENABLE_ANALYTIC_PLACE // Analytic placer: When enabled, skip most of the annealing and go straight to quench // TODO: refactor goto label. - if (placer_opts.enable_analytic_placer) + if (placer_opts.enable_analytic_placer) { skip_anneal = true; + } #endif /* ENABLE_ANALYTIC_PLACE */ //RL agent state definition @@ -2142,7 +2143,7 @@ static int check_block_placement_consistency(const PlaceLocVars& place_loc_vars) int check_macro_placement_consistency(const PlaceLocVars& place_loc_vars) { const auto& pl_macros = g_vpr_ctx.placement().pl_macros; const auto& block_locs = place_loc_vars.block_locs(); - const GridBlock grid_blocks = place_loc_vars.grid_blocks(); + const auto& grid_blocks = place_loc_vars.grid_blocks(); int error = 0; From 15fab2442b572cba57c01a980f2d46e9bbe55107 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 14:36:10 -0400 Subject: [PATCH 053/146] rename getter methods of PlacerContext --- vpr/src/place/centroid_move_generator.cpp | 2 +- .../place/critical_uniform_move_generator.cpp | 2 +- .../place/feasible_region_move_generator.cpp | 2 +- vpr/src/place/manual_move_generator.cpp | 2 +- vpr/src/place/median_move_generator.cpp | 4 ++-- vpr/src/place/move_utils.cpp | 4 ++-- vpr/src/place/net_cost_handler.cpp | 14 +++++++------- vpr/src/place/place.cpp | 18 +++++++++--------- vpr/src/place/place_checkpoint.cpp | 4 ++-- vpr/src/place/place_delay_model.cpp | 2 +- vpr/src/place/place_timing_update.cpp | 2 +- vpr/src/place/placer_context.h | 8 ++++---- vpr/src/place/uniform_move_generator.cpp | 2 +- .../place/weighted_centroid_move_generator.cpp | 2 +- .../place/weighted_median_move_generator.cpp | 2 +- 15 files changed, 35 insertions(+), 35 deletions(-) diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index e427f6bd2af..a1b3d6d484a 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -44,7 +44,7 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) { auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); const auto& device_ctx = g_vpr_ctx.device(); const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = placer_ctx.mutable_move(); diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index db6ee63a919..ad9580b51a3 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -13,7 +13,7 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved const PlacerCriticalities* /*criticalities*/) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); ClusterNetId net_from; int pin_from; diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 793170e2522..81a4f0c4352 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -18,7 +18,7 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_.get(); auto& place_move_ctx = placer_ctx.mutable_move(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); const auto& place_loc_vars = placer_ctx.place_loc_vars(); ClusterNetId net_from; diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index d13d77b0859..c59365c3b2f 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -29,7 +29,7 @@ e_create_move ManualMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ auto& place_ctx = g_vpr_ctx.placement(); auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); - auto& block_locs = placer_ctx_.get().get_block_locs(); + auto& block_locs = placer_ctx_.get().block_locs(); int block_id = -1; t_pl_loc to; diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 91b26222809..096929011e7 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -16,7 +16,7 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ const auto& device_ctx = g_vpr_ctx.device(); auto& placer_ctx = placer_ctx_.get(); auto& place_move_ctx = placer_ctx.mutable_move(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); const auto& place_loc_vars = placer_ctx.place_loc_vars(); //Find a movable block based on blk_type @@ -199,7 +199,7 @@ void MedianMoveGenerator::get_bb_from_scratch_excluding_block(ClusterNetId net_i bool& skip_net) { //TODO: account for multiple physical pin instances per logical pin const auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); skip_net = true; diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index d79f6720b62..021eaaf5e09 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -672,7 +672,7 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, const PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = placer_ctx.move(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); //Initialize critical net and pin to be invalid net_from = ClusterNetId::INVALID(); @@ -707,7 +707,7 @@ ClusterBlockId pick_from_highly_critical_block(ClusterNetId& net_from, const PlacerContext& placer_ctx) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_move_ctx = placer_ctx.move(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); //Initialize critical net and pin to be invalid net_from = ClusterNetId::INVALID(); diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 5692d17916f..fd48f50f0a2 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -503,7 +503,7 @@ static void update_net_bb(const ClusterNetId net, const t_pl_moved_block& pl_moved_block) { const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& placer_ctx = placer_ctx_ref->get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -544,7 +544,7 @@ static void update_net_layer_bb(const ClusterNetId net, const t_pl_moved_block& pl_moved_block) { auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); if (cluster_ctx.clb_nlist.net_sinks(net).size() < SMALL_NET) { //For small nets brute-force bounding box update is faster @@ -615,7 +615,7 @@ static void update_td_delta_costs(const PlaceDelayModel* delay_model, */ auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); const auto& connection_delay = placer_ctx.timing().connection_delay; auto& connection_timing_cost = placer_ctx.mutable_timing().connection_timing_cost; @@ -737,7 +737,7 @@ static void get_non_updatable_bb(ClusterNetId net_id, auto& cluster_ctx = g_vpr_ctx.clustering(); auto& device_ctx = g_vpr_ctx.device(); auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); int pnum = placer_ctx.place_loc_vars().net_pin_to_tile_pin_index(net_id, 0); @@ -810,7 +810,7 @@ static void get_non_updatable_layer_bb(ClusterNetId net_id, auto& device_ctx = g_vpr_ctx.device(); auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); int num_layers = device_ctx.grid.get_num_layers(); for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) { @@ -1501,7 +1501,7 @@ static void get_bb_from_scratch(ClusterNetId net_id, auto& device_ctx = g_vpr_ctx.device(); auto& grid = device_ctx.grid; const auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); ClusterBlockId bnum = cluster_ctx.clb_nlist.net_driver_block(net_id); t_pl_loc block_loc = block_locs[bnum].loc; @@ -1622,7 +1622,7 @@ static void get_layer_bb_from_scratch(ClusterNetId net_id, auto& cluster_ctx = g_vpr_ctx.clustering(); auto& grid = device_ctx.grid; auto& placer_ctx = placer_ctx_ref->get(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); const int num_layers = device_ctx.grid.get_num_layers(); std::vector xmin(num_layers, OPEN); diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index e7c3b3c1657..c271141c4e3 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -459,7 +459,7 @@ void try_place(const Netlist<>& net_list, if (!placer_opts.write_initial_place_file.empty()) { print_place(nullptr, nullptr, (placer_opts.write_initial_place_file + ".init.place").c_str(), - placer_ctx.get_block_locs()); + placer_ctx.block_locs()); } #ifdef ENABLE_ANALYTIC_PLACE @@ -1126,7 +1126,7 @@ static void placement_inner_loop(const t_annealing_state* state, state->num_temps + 1, inner_placement_save_count); VTR_LOG("Saving placement to file at temperature move %d / %d: %s\n", inner_iter, state->move_lim, filename.c_str()); - print_place(nullptr, nullptr, filename.c_str(), placer_ctx.get_block_locs()); + print_place(nullptr, nullptr, filename.c_str(), placer_ctx.block_locs()); ++inner_placement_save_count; } } @@ -1279,7 +1279,7 @@ static e_move_result try_swap(const t_annealing_state* state, * Returns whether the swap is accepted, rejected or aborted. * * Passes back the new value of the cost functions. */ - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); float rlim_escape_fraction = placer_opts.rlim_escape_fraction; float timing_tradeoff = placer_opts.timing_tradeoff; @@ -1486,7 +1486,7 @@ static e_move_result try_swap(const t_annealing_state* state, g_vpr_ctx.placement().cube_bb); /* Update clb data structures since we kept the move. */ - commit_move_blocks(blocks_affected, placer_ctx.get_mutable_grid_blocks()); + commit_move_blocks(blocks_affected, placer_ctx.mutable_grid_blocks()); if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat ++move_type_stat.accepted_moves[proposed_action.logical_blk_type_index][(int)proposed_action.move_type]; @@ -1849,8 +1849,8 @@ static void alloc_and_load_placement_structs(float place_cost_exp, const int num_layers = device_ctx.grid.get_num_layers(); - auto& block_locs = placer_ctx.get_mutable_block_locs(); - auto& grid_blocks = placer_ctx.get_mutable_grid_blocks(); + auto& block_locs = placer_ctx.mutable_block_locs(); + auto& grid_blocks = placer_ctx.mutable_grid_blocks(); init_placement_context(block_locs, grid_blocks); int max_pins_per_clb = 0; @@ -1993,13 +1993,13 @@ static void check_place(const t_placer_costs& costs, error += check_placement_consistency(placer_ctx.place_loc_vars()); error += check_placement_costs(costs, delay_model, criticalities, place_algorithm, placer_ctx); - error += check_placement_floorplanning(placer_ctx.get_block_locs()); + error += check_placement_floorplanning(placer_ctx.block_locs()); if (noc_opts.noc) { // check the NoC costs during placement if the user is using the NoC supported flow - error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts, placer_ctx.get_block_locs()); + error += check_noc_placement_costs(costs, ERROR_TOL, noc_opts, placer_ctx.block_locs()); // make sure NoC routing configuration does not create any cycles in CDG - error += (int)noc_routing_has_cycle(placer_ctx.get_block_locs()); + error += (int)noc_routing_has_cycle(placer_ctx.block_locs()); } if (error == 0) { diff --git a/vpr/src/place/place_checkpoint.cpp b/vpr/src/place/place_checkpoint.cpp index 85240651d74..845bab9ead1 100644 --- a/vpr/src/place/place_checkpoint.cpp +++ b/vpr/src/place/place_checkpoint.cpp @@ -53,7 +53,7 @@ void restore_best_placement(PlacerContext& placer_ctx, if (placement_checkpoint.cp_is_valid() && timing_info->least_slack_critical_path().delay() > placement_checkpoint.get_cp_cpd() && costs.bb_cost * 1.05 > placement_checkpoint.get_cp_bb_cost()) { //restore the latest placement checkpoint - costs = placement_checkpoint.restore_placement(placer_ctx.get_mutable_block_locs(), placer_ctx.get_mutable_grid_blocks()); + costs = placement_checkpoint.restore_placement(placer_ctx.mutable_block_locs(), placer_ctx.mutable_grid_blocks()); //recompute timing from scratch placer_criticalities.get()->set_recompute_required(); @@ -74,7 +74,7 @@ void restore_best_placement(PlacerContext& placer_ctx, * and need to be re-computed from scratch. */ if (noc_opts.noc) { - reinitialize_noc_routing(costs, {}, placer_ctx.get_block_locs()); + reinitialize_noc_routing(costs, {}, placer_ctx.block_locs()); } VTR_LOG("\nCheckpoint restored\n"); diff --git a/vpr/src/place/place_delay_model.cpp b/vpr/src/place/place_delay_model.cpp index 2d9c6157865..15f26b5998b 100644 --- a/vpr/src/place/place_delay_model.cpp +++ b/vpr/src/place/place_delay_model.cpp @@ -401,7 +401,7 @@ void comp_td_connection_delays(const PlaceDelayModel* delay_model, PlacerContext& placer_ctx) { const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& p_timing_ctx = placer_ctx.mutable_timing(); - auto& block_locs = placer_ctx.get_block_locs(); + auto& block_locs = placer_ctx.block_locs(); auto& connection_delay = p_timing_ctx.connection_delay; for (ClusterNetId net_id : cluster_ctx.clb_nlist.nets()) { diff --git a/vpr/src/place/place_timing_update.cpp b/vpr/src/place/place_timing_update.cpp index 8fc042811ef..322261067d8 100644 --- a/vpr/src/place/place_timing_update.cpp +++ b/vpr/src/place/place_timing_update.cpp @@ -355,7 +355,7 @@ static double comp_td_connection_cost(const PlaceDelayModel* delay_model, ClusterNetId net, int ipin) { const auto& p_timing_ctx = placer_ctx.timing(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); VTR_ASSERT_SAFE_MSG(ipin > 0, "Shouldn't be calculating connection timing cost for driver pins"); diff --git a/vpr/src/place/placer_context.h b/vpr/src/place/placer_context.h index e594d8277f0..f8207d2ea0f 100644 --- a/vpr/src/place/placer_context.h +++ b/vpr/src/place/placer_context.h @@ -141,11 +141,11 @@ class PlacerContext : public Context { inline const PlacerMoveContext& move() const { return move_; } inline PlacerMoveContext& mutable_move() { return move_; } - inline const vtr::vector_map& get_block_locs() const { return loc_vars_.block_locs(); } - inline vtr::vector_map& get_mutable_block_locs() { return loc_vars_.mutable_block_locs(); } + inline const vtr::vector_map& block_locs() const { return loc_vars_.block_locs(); } + inline vtr::vector_map& mutable_block_locs() { return loc_vars_.mutable_block_locs(); } - inline const GridBlock& get_grid_blocks() const { return loc_vars_.grid_blocks(); } - inline GridBlock& get_mutable_grid_blocks() { return loc_vars_.mutable_grid_blocks(); } + inline const GridBlock& grid_blocks() const { return loc_vars_.grid_blocks(); } + inline GridBlock& mutable_grid_blocks() { return loc_vars_.mutable_grid_blocks(); } inline const vtr::vector_map& physical_pins() const { return loc_vars_.physical_pins(); } inline vtr::vector_map& mutable_physical_pins() { return loc_vars_.mutable_physical_pins(); } diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index 40379e9ead1..b63ff8e3c1d 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -13,7 +13,7 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks const PlacerCriticalities* /*criticalities*/) { const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); const auto& place_loc_vars = placer_ctx.place_loc_vars(); //Find a movable block based on blk_type diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index eddfea1fc11..90c882cca94 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -15,7 +15,7 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move const auto& cluster_ctx = g_vpr_ctx.clustering(); const auto& device_ctx = g_vpr_ctx.device(); auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); auto& place_move_ctx = placer_ctx.mutable_move(); const auto& place_loc_vars = placer_ctx.place_loc_vars(); diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index 6f38645b7eb..b4cb7604d37 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -17,7 +17,7 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& const PlacerCriticalities* criticalities) { const auto& cluster_ctx = g_vpr_ctx.clustering(); auto& placer_ctx = placer_ctx_.get(); - const auto& block_locs = placer_ctx.get_block_locs(); + const auto& block_locs = placer_ctx.block_locs(); auto& place_move_ctx = placer_ctx.mutable_move(); const auto& place_loc_vars = placer_ctx.place_loc_vars(); From abbd4953beacce1621fc6fa35df5b40c2acedc81 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 15:13:25 -0400 Subject: [PATCH 054/146] add comments and code cleaning --- vpr/src/base/load_flat_place.cpp | 6 ++-- vpr/src/base/read_route.cpp | 18 +++++------ vpr/src/base/stats.cpp | 51 ++++++++++++-------------------- vpr/src/base/vpr_context.h | 25 ++++++++++++++++ vpr/src/base/vpr_types.cpp | 2 +- vpr/src/base/vpr_types.h | 6 ++-- vpr/src/draw/draw.cpp | 3 ++ 7 files changed, 61 insertions(+), 50 deletions(-) diff --git a/vpr/src/base/load_flat_place.cpp b/vpr/src/base/load_flat_place.cpp index 9e0654c0566..9da18c38236 100644 --- a/vpr/src/base/load_flat_place.cpp +++ b/vpr/src/base/load_flat_place.cpp @@ -9,9 +9,10 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, std::vector& atoms) { + const auto& atom_ctx = g_vpr_ctx.atom(); + const auto& block_locs = g_vpr_ctx.placement().block_locs(); - auto& atom_ctx = g_vpr_ctx.atom(); - t_pl_loc loc = g_vpr_ctx.placement().block_locs()[iblk].loc; + t_pl_loc loc = block_locs[iblk].loc; size_t bnum = size_t(iblk); for (auto atom : atoms) { @@ -26,7 +27,6 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, /* prints a flat placement file */ void print_flat_placement(const char* flat_place_file) { - FILE* fp; ClusterAtomsLookup atoms_lookup; diff --git a/vpr/src/base/read_route.cpp b/vpr/src/base/read_route.cpp index 04462698eff..19ebf8b5541 100644 --- a/vpr/src/base/read_route.cpp +++ b/vpr/src/base/read_route.cpp @@ -222,7 +222,7 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN auto& device_ctx = g_vpr_ctx.mutable_device(); const auto& rr_graph = device_ctx.rr_graph; auto& route_ctx = g_vpr_ctx.mutable_routing(); - auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_blocks = g_vpr_ctx.placement().get_grid_blocks(); t_trace* head_ptr = nullptr; t_trace* tptr = nullptr; @@ -337,12 +337,10 @@ static void process_nodes(const Netlist<>& net_list, std::ifstream& fp, ClusterN int width_offset = device_ctx.grid.get_width_offset({x, y, layer_num}); int height_offset = device_ctx.grid.get_height_offset({x, y, layer_num}); auto physical_tile = device_ctx.grid.get_physical_type({x, y, layer_num}); - const t_sub_tile* sub_tile; - int sub_tile_rel_cap; - std::tie(sub_tile, sub_tile_rel_cap) = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); + auto [sub_tile, sub_tile_rel_cap] = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); int sub_tile_offset = sub_tile->capacity.low + sub_tile_rel_cap; - ClusterBlockId iblock = place_ctx.get_grid_blocks().block_at_location({x - width_offset, y - height_offset, sub_tile_offset, layer_num}); + ClusterBlockId iblock = grid_blocks.block_at_location({x - width_offset, y - height_offset, sub_tile_offset, layer_num}); VTR_ASSERT(iblock); const t_pb_graph_pin* pb_pin; @@ -571,7 +569,7 @@ static bool check_rr_graph_connectivity(RRNodeId prev_node, RRNodeId node) { void print_route(const Netlist<>& net_list, FILE* fp, bool is_flat) { - auto& place_ctx = g_vpr_ctx.placement(); + const auto& grid_blocks = g_vpr_ctx.placement().get_grid_blocks(); auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; auto& route_ctx = g_vpr_ctx.mutable_routing(); @@ -644,13 +642,11 @@ void print_route(const Netlist<>& net_list, int pin_num = rr_graph.node_pin_num(inode); int xoffset = device_ctx.grid.get_width_offset({ilow, jlow, layer_num}); int yoffset = device_ctx.grid.get_height_offset({ilow, jlow, layer_num}); - const t_sub_tile* sub_tile; - int sub_tile_rel_cap; - std::tie(sub_tile, sub_tile_rel_cap) = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); + auto [sub_tile, sub_tile_rel_cap] = get_sub_tile_from_pin_physical_num(physical_tile, pin_num); int sub_tile_offset = sub_tile->capacity.low + sub_tile_rel_cap; - ClusterBlockId iblock = place_ctx.get_grid_blocks().block_at_location({ilow - xoffset, jlow - yoffset, - sub_tile_offset, layer_num}); + ClusterBlockId iblock = grid_blocks.block_at_location({ilow - xoffset, jlow - yoffset, + sub_tile_offset, layer_num}); VTR_ASSERT(iblock); const t_pb_graph_pin* pb_pin; if (is_pin_on_tile(physical_tile, pin_num)) { diff --git a/vpr/src/base/stats.cpp b/vpr/src/base/stats.cpp index 4358704384a..bda53d16a56 100644 --- a/vpr/src/base/stats.cpp +++ b/vpr/src/base/stats.cpp @@ -1,12 +1,9 @@ -#include -#include #include #include #include "route_tree.h" #include "vtr_assert.h" #include "vtr_log.h" -#include "vtr_math.h" #include "vtr_ndmatrix.h" #include "vpr_types.h" @@ -55,12 +52,10 @@ void routing_stats(const Netlist<>& net_list, enum e_directionality directionality, int wire_to_ipin_switch, bool is_flat) { - float area, used_area; - auto& device_ctx = g_vpr_ctx.device(); auto& rr_graph = device_ctx.rr_graph; auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = g_vpr_ctx.placement().block_locs(); + const auto& block_locs = g_vpr_ctx.placement().block_locs(); int num_rr_switch = rr_graph.num_rr_switches(); @@ -70,7 +65,7 @@ void routing_stats(const Netlist<>& net_list, VTR_LOG("Logic area (in minimum width transistor areas, excludes I/Os and empty grid tiles)...\n"); - area = 0; + float area = 0; for (int layer_num = 0; layer_num < device_ctx.grid.get_num_layers(); layer_num++) { for (int i = 0; i < (int)device_ctx.grid.width(); i++) { for (int j = 0; j < (int)device_ctx.grid.height(); j++) { @@ -93,7 +88,7 @@ void routing_stats(const Netlist<>& net_list, /* Todo: need to add pitch of routing to blocks with height > 3 */ VTR_LOG("\tTotal logic block area (Warning, need to add pitch of routing to blocks with height > 3): %g\n", area); - used_area = 0; + float used_area = 0; for (ClusterBlockId blk_id : cluster_ctx.clb_nlist.blocks()) { t_pl_loc block_loc = block_locs[blk_id].loc; auto type = physical_tile_type(block_loc); @@ -123,26 +118,20 @@ void routing_stats(const Netlist<>& net_list, * and net length in the routing. */ void length_and_bends_stats(const Netlist<>& net_list, bool is_flat) { - int bends, total_bends, max_bends; - int length, total_length, max_length; - int segments, total_segments, max_segments; - float av_bends, av_length, av_segments; - int num_global_nets, num_clb_opins_reserved, num_absorbed_nets; - - bool is_absorbed; - - max_bends = 0; - total_bends = 0; - max_length = 0; - total_length = 0; - max_segments = 0; - total_segments = 0; - num_global_nets = 0; - num_clb_opins_reserved = 0; - num_absorbed_nets = 0; + int max_bends = 0; + int total_bends = 0; + int max_length = 0; + int total_length = 0; + int max_segments = 0; + int total_segments = 0; + int num_global_nets = 0; + int num_clb_opins_reserved = 0; + int num_absorbed_nets = 0; for (auto net_id : net_list.nets()) { if (!net_list.net_is_ignored(net_id) && net_list.net_sinks(net_id).size() != 0) { /* Globals don't count. */ + int bends, length, segments; + bool is_absorbed; get_num_bends_and_length(net_id, &bends, &length, &segments, &is_absorbed); total_bends += bends; @@ -165,12 +154,12 @@ void length_and_bends_stats(const Netlist<>& net_list, bool is_flat) { } } - av_bends = (float)total_bends / (float)((int)net_list.nets().size() - num_global_nets); + float av_bends = (float)total_bends / (float)((int)net_list.nets().size() - num_global_nets); VTR_LOG("\n"); VTR_LOG("Average number of bends per net: %#g Maximum # of bends: %d\n", av_bends, max_bends); VTR_LOG("\n"); - av_length = (float)total_length / (float)((int)net_list.nets().size() - num_global_nets); + float av_length = (float)total_length / (float)((int)net_list.nets().size() - num_global_nets); VTR_LOG("Number of global nets: %d\n", num_global_nets); VTR_LOG("Number of routed nets (nonglobal): %d\n", (int)net_list.nets().size() - num_global_nets); VTR_LOG("Wire length results (in units of 1 clb segments)...\n"); @@ -178,7 +167,7 @@ void length_and_bends_stats(const Netlist<>& net_list, bool is_flat) { VTR_LOG("\tMaximum net length: %d\n", max_length); VTR_LOG("\n"); - av_segments = (float)total_segments / (float)((int)net_list.nets().size() - num_global_nets); + float av_segments = (float)total_segments / (float)((int)net_list.nets().size() - num_global_nets); VTR_LOG("Wire length results in terms of physical segments...\n"); VTR_LOG("\tTotal wiring segments used: %d, average wire segments per net: %#g\n", total_segments, av_segments); VTR_LOG("\tMaximum segments used by a net: %d\n", max_segments); @@ -425,9 +414,7 @@ void print_wirelen_prob_dist(bool is_flat) { * (i.e. the clock when it is marked global). */ void print_lambda() { - int ipin; int num_inputs_used = 0; - float lambda; auto& cluster_ctx = g_vpr_ctx.clustering(); auto& block_locs = g_vpr_ctx.placement().block_locs(); @@ -437,7 +424,7 @@ void print_lambda() { auto type = physical_tile_type(block_loc); VTR_ASSERT(type != nullptr); if (!is_io_type(type)) { - for (ipin = 0; ipin < type->num_pins; ipin++) { + for (int ipin = 0; ipin < type->num_pins; ipin++) { if (get_pin_type_from_pin_physical_num(type, ipin) == RECEIVER) { ClusterNetId net_id = cluster_ctx.clb_nlist.block_net(blk_id, ipin); if (net_id != ClusterNetId::INVALID()) /* Pin is connected? */ @@ -448,7 +435,7 @@ void print_lambda() { } } - lambda = (float)num_inputs_used / (float)cluster_ctx.clb_nlist.blocks().size(); + float lambda = (float)num_inputs_used / (float)cluster_ctx.clb_nlist.blocks().size(); VTR_LOG("Average lambda (input pins used per clb) is: %g\n", lambda); } diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index bbd8d3746c3..fed9c9a61ab 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -384,7 +384,18 @@ struct PackingMultithreadingContext : public Context { */ struct PlacementContext : public Context { private: + /** + * Determines if place_loc_vars_ can be accessed by calling getter methods. + * This flag should be set to false at the beginning of the placement stage, + * and set to true at the end of placement. This ensures that variables that + * are subject to change during placement are kept local to the placement stage. + */ bool loc_vars_are_accessible_ = true; + + /** + * @brief Stores block location information, which is subject to change during the + * placement stage. + */ PlaceLocVars place_loc_vars_; public: @@ -398,7 +409,21 @@ struct PlacementContext : public Context { PlaceLocVars& mutable_place_loc_vars() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } const PlaceLocVars& place_loc_vars() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } + /** + * @brief Makes place_loc_vars_ inaccessible through the getter methods. + * + * This method should be called at the beginning of the placement stage to + * guarantee that the placement stage code does not access block location variables + * stored in the global state. + */ void lock_loc_vars() { loc_vars_are_accessible_ = false; } + + /** + * @brief Makes place_loc_vars_ accessible through the getter methods. + * + * This method should be called at the end of the placement stage to + * make the block location information accessible for subsequent stages. + */ void unlock_loc_vars() { loc_vars_are_accessible_ = true; } ///@brief The pl_macros array stores all the placement macros (usually carry chains). diff --git a/vpr/src/base/vpr_types.cpp b/vpr/src/base/vpr_types.cpp index 05fac5e563a..505c0be8eef 100644 --- a/vpr/src/base/vpr_types.cpp +++ b/vpr/src/base/vpr_types.cpp @@ -562,7 +562,7 @@ void t_cluster_placement_stats::free_primitives() { int PlaceLocVars::net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const { auto& cluster_ctx = g_vpr_ctx.clustering(); - // Get the logical pin index of pin within it's logical block type + // Get the logical pin index of pin within its logical block type ClusterPinId pin_id = cluster_ctx.clb_nlist.net_pin(net_id, net_pin_index); return this->tile_pin_index(pin_id); diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index a1c1c2b3291..bd953c0fa27 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -922,11 +922,11 @@ class PlaceLocVars { inline const vtr::vector_map& physical_pins() const { return physical_pins_; } inline vtr::vector_map& mutable_physical_pins() { return physical_pins_; } - //Returns the physical pin of the tile, related to the given ClusterPinId + ///@brief Returns the physical pin of the tile, related to the given ClusterPinId inline int tile_pin_index(const ClusterPinId pin) const { return physical_pins_[pin]; } - //Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index. - int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const; + ///@brief Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index. + inline int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const; }; ///@brief Names of various files diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 9911e8ba147..88e5582ed4c 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -580,6 +580,9 @@ void init_draw_coords(float width_val, const PlaceLocVars& place_loc_vars) { const auto& device_ctx = g_vpr_ctx.device(); const auto& rr_graph = device_ctx.rr_graph; + /* Store a reference to block location variables so that other drawing + * functions can access block location information without accessing + * the global placement state, which is inaccessible during placement.*/ set_graphics_place_loc_vars_ref(place_loc_vars); if (!draw_state->show_graphics && !draw_state->save_graphics From 43c3fd8cf9695925d95176e87b7a31de26a1b36f Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 15:14:00 -0400 Subject: [PATCH 055/146] fix the compilation error when VTR_ASSERT_SAFE_ENABLED is defined --- vpr/src/place/place.cpp | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index c271141c4e3..07c1c4014b3 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -260,7 +260,8 @@ static int count_connections(); static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, PlacerContext& placer_ctx); -static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected); +static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, + PlacerTimingContext& p_timing_ctx); static void invalidate_affected_connections( const t_pl_blocks_to_be_moved& blocks_affected, @@ -1536,7 +1537,7 @@ static e_move_result try_swap(const t_annealing_state* state, if (place_algorithm == CRITICALITY_TIMING_PLACE) { /* Unstage the values stored in proposed_* data structures */ - revert_td_cost(blocks_affected); + revert_td_cost(blocks_affected, placer_ctx.mutable_timing()); } if (proposed_action.logical_blk_type_index != -1) { //if the agent proposed the block type, then collect the block type stat @@ -1788,7 +1789,8 @@ static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, //Reverts modifications to proposed_connection_delay and proposed_connection_timing_cost based on //the move proposed in blocks_affected -static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected) { +static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, + PlacerTimingContext& p_timing_ctx) { #ifndef VTR_ASSERT_SAFE_ENABLED static_cast(blocks_affected); #else @@ -1797,7 +1799,6 @@ static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& clb_nlist = cluster_ctx.clb_nlist; - auto& p_timing_ctx = g_placer_ctx.mutable_timing(); auto& proposed_connection_delay = p_timing_ctx.proposed_connection_delay; auto& proposed_connection_timing_cost = p_timing_ctx.proposed_connection_timing_cost; From da61fdb5c9fd5dcb26bded41112a37c08c22c087 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 15:15:53 -0400 Subject: [PATCH 056/146] fix unused arg warning --- vpr/src/place/place.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 07c1c4014b3..b94e199996e 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -471,7 +471,7 @@ void try_place(const Netlist<>& net_list, * Most of anneal is disabled later by setting initial temperature to 0 and only further optimizes in quench */ if (placer_opts.enable_analytic_placer) { - AnalyticPlacer{}.ap_place(); + AnalyticPlacer{place_loc_vars}.ap_place(); } #endif /* ENABLE_ANALYTIC_PLACE */ @@ -1792,7 +1792,8 @@ static void commit_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, static void revert_td_cost(const t_pl_blocks_to_be_moved& blocks_affected, PlacerTimingContext& p_timing_ctx) { #ifndef VTR_ASSERT_SAFE_ENABLED - static_cast(blocks_affected); + (void)blocks_affected; + (void)p_timing_ctx; #else //Invalidate temp delay & timing cost values to match sanity checks in //comp_td_connection_cost() From 25e803c1f0e2cd69cadb4ef546f741c314f18529 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 15:43:53 -0400 Subject: [PATCH 057/146] add comments --- vpr/src/base/vpr_types.h | 2 +- vpr/src/draw/draw_global.h | 14 ++++++++++++++ vpr/src/draw/draw_types.cpp | 3 +-- vpr/src/place/RL_agent_util.h | 13 +++++++++++-- 4 files changed, 27 insertions(+), 5 deletions(-) diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index bd953c0fa27..24d223686e2 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -926,7 +926,7 @@ class PlaceLocVars { inline int tile_pin_index(const ClusterPinId pin) const { return physical_pins_[pin]; } ///@brief Returns the physical pin of the tile, related to the given ClusterNedId, and the net pin index. - inline int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const; + int net_pin_to_tile_pin_index(const ClusterNetId net_id, int net_pin_index) const; }; ///@brief Names of various files diff --git a/vpr/src/draw/draw_global.h b/vpr/src/draw/draw_global.h index 186b439d64d..a9391cd2941 100644 --- a/vpr/src/draw/draw_global.h +++ b/vpr/src/draw/draw_global.h @@ -27,8 +27,22 @@ t_draw_coords* get_draw_coords_vars(); t_draw_state* get_draw_state_vars(); +/** + * @brief Set the reference to placement location variable. + * + * During the placement stage, this reference should point to a local object + * in the placement stage because the placement stage does not change the + * global stage in place_ctx until the end of placement. After the placement is + * done, the reference should point to the global state stored in place_ctx. + * + * @param place_loc_vars The PlaceLocVars that the reference will point to. + */ void set_graphics_place_loc_vars_ref(const PlaceLocVars& place_loc_vars); +/** + * @brief Returns the reference to placement block location variables. + * @return A const reference to placement block location variables. + */ const PlaceLocVars& get_graphics_place_loc_vars_ref(); #endif // NO_GRAPHICS diff --git a/vpr/src/draw/draw_types.cpp b/vpr/src/draw/draw_types.cpp index bdb8c174ad5..ddbc3d0b566 100644 --- a/vpr/src/draw/draw_types.cpp +++ b/vpr/src/draw/draw_types.cpp @@ -13,9 +13,8 @@ *******************************************/ ezgl::color t_draw_state::block_color(ClusterBlockId blk) const { if (use_default_block_color_[blk]) { - auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); + const auto& block_locs = get_graphics_place_loc_vars_ref().block_locs(); t_physical_tile_type_ptr tile_type = nullptr; if (block_locs.empty()) { //No placement, pick best match diff --git a/vpr/src/place/RL_agent_util.h b/vpr/src/place/RL_agent_util.h index 26ab290e54f..da687d9d852 100644 --- a/vpr/src/place/RL_agent_util.h +++ b/vpr/src/place/RL_agent_util.h @@ -15,7 +15,16 @@ enum class e_agent_state { * This function creates 2 move generators to be used by the annealer. The type of the move generators created here depends on the * type selected in placer_opts. * It returns a unique pointer for each move generator in move_generator and move_generator2 - * move_lim: represents the num of moves per temp. + * + * @param placer_ctx Move generators store a reference to the placer context to avoid global state access. + * @param placer_opts Contains information about the placement algorithm and its parameters. + * @param move_lim represents the num of moves per temp. + * @param noc_attraction_weight The attraction weight by which the NoC-biased centroid move adjust the computed location + * towards reachable NoC routers from the moving block. + * + * @return Two unique pointers referring to move generators. These move generators are supposed to be used + * in the first and second states of the agent. + * */ std::pair, std::unique_ptr> create_move_generators(PlacerContext& placer_ctx, const t_placer_opts& placer_opts, @@ -33,7 +42,7 @@ void assign_current_move_generator(std::unique_ptr& move_generato std::unique_ptr& current_move_generator); /** - * @ brief move the updated current_move_generator to its original move_Generator structure based on he placer_options and the agent state + * @brief move the updated current_move_generator to its original move_Generator structure based on he placer_options and the agent state */ void update_move_generator(std::unique_ptr& move_generator, std::unique_ptr& move_generator2, From a85ecc410fba311573b811906234a1d9196f9f01 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 16:22:30 -0400 Subject: [PATCH 058/146] enum class e_pad_loc_type and more comments --- vpr/src/base/ShowSetup.cpp | 4 +-- vpr/src/base/read_options.cpp | 8 ++--- vpr/src/base/vpr_types.h | 2 +- vpr/src/place/centroid_move_generator.cpp | 9 +++-- .../place/critical_uniform_move_generator.cpp | 15 ++++++--- .../place/feasible_region_move_generator.cpp | 8 ++++- vpr/src/place/initial_noc_placement.cpp | 4 +-- vpr/src/place/initial_placement.cpp | 22 ++++++------- vpr/src/place/initial_placement.h | 33 +++++++++++++------ vpr/src/place/uniform_move_generator.cpp | 7 +++- .../weighted_centroid_move_generator.cpp | 7 +++- .../place/weighted_median_move_generator.cpp | 7 +++- 12 files changed, 86 insertions(+), 40 deletions(-) diff --git a/vpr/src/base/ShowSetup.cpp b/vpr/src/base/ShowSetup.cpp index 0217b93cc63..6aa1b84efdf 100644 --- a/vpr/src/base/ShowSetup.cpp +++ b/vpr/src/base/ShowSetup.cpp @@ -526,10 +526,10 @@ static void ShowPlacerOpts(const t_placer_opts& PlacerOpts, VTR_LOG("PlacerOpts.pad_loc_type: "); switch (PlacerOpts.pad_loc_type) { - case FREE: + case e_pad_loc_type::FREE: VTR_LOG("FREE\n"); break; - case RANDOM: + case e_pad_loc_type::RANDOM: VTR_LOG("RANDOM\n"); break; default: diff --git a/vpr/src/base/read_options.cpp b/vpr/src/base/read_options.cpp index f14bb940b28..434c73eae6b 100644 --- a/vpr/src/base/read_options.cpp +++ b/vpr/src/base/read_options.cpp @@ -532,9 +532,9 @@ struct ParseFixPins { ConvertedValue from_str(const std::string& str) { ConvertedValue conv_value; if (str == "free") - conv_value.set_value(FREE); + conv_value.set_value(e_pad_loc_type::FREE); else if (str == "random") - conv_value.set_value(RANDOM); + conv_value.set_value(e_pad_loc_type::RANDOM); else { std::stringstream msg; msg << "Invalid conversion from '" << str << "' to e_router_algorithm (expected one of: " << argparse::join(default_choices(), ", ") << ")"; @@ -545,10 +545,10 @@ struct ParseFixPins { ConvertedValue to_str(e_pad_loc_type val) { ConvertedValue conv_value; - if (val == FREE) + if (val == e_pad_loc_type::FREE) conv_value.set_value("free"); else { - VTR_ASSERT(val == RANDOM); + VTR_ASSERT(val == e_pad_loc_type::RANDOM); conv_value.set_value("random"); } return conv_value; diff --git a/vpr/src/base/vpr_types.h b/vpr/src/base/vpr_types.h index 24d223686e2..720e2e6445d 100644 --- a/vpr/src/base/vpr_types.h +++ b/vpr/src/base/vpr_types.h @@ -1127,7 +1127,7 @@ class t_place_algorithm { e_place_algorithm algo = e_place_algorithm::CRITICALITY_TIMING_PLACE; }; -enum e_pad_loc_type { +enum class e_pad_loc_type { FREE, RANDOM }; diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index a1b3d6d484a..80f480099fd 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -47,11 +47,16 @@ e_create_move CentroidMoveGenerator::propose_move(t_pl_blocks_to_be_moved& block const auto& block_locs = placer_ctx.block_locs(); const auto& device_ctx = g_vpr_ctx.device(); const auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& place_move_ctx = placer_ctx.mutable_move(); + const auto& place_move_ctx = placer_ctx.move(); const auto& place_loc_vars = placer_ctx.place_loc_vars(); // Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); + ClusterBlockId b_from = propose_block_to_move(placer_opts, + proposed_action.logical_blk_type_index, + /*highly_crit_block=*/false, + /*net_from=*/nullptr, + /*pin_from=*/nullptr, + placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Centroid Move Choose Block %d - rlim %f\n", diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index ad9580b51a3..5048cda3804 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -12,13 +12,20 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved const t_placer_opts& placer_opts, const PlacerCriticalities* /*criticalities*/) { auto& cluster_ctx = g_vpr_ctx.clustering(); - auto& placer_ctx = placer_ctx_.get(); + const auto& placer_ctx = placer_ctx_.get(); const auto& block_locs = placer_ctx.block_locs(); + const auto& place_loc_vars = placer_ctx.place_loc_vars(); ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, placer_ctx); + ClusterBlockId b_from = propose_block_to_move(placer_opts, + proposed_action.logical_blk_type_index, + /*highly_crit_block=*/true, + &net_from, + &pin_from, + placer_ctx); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Critical Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found @@ -33,11 +40,11 @@ e_create_move CriticalUniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved t_pl_loc to; to.layer = from.layer; - if (!find_to_loc_uniform(cluster_from_type, rlim, from, to, b_from, placer_ctx.place_loc_vars())) { + if (!find_to_loc_uniform(cluster_from_type, rlim, from, to, b_from, place_loc_vars)) { return e_create_move::ABORT; } - e_create_move create_move = ::create_move(blocks_affected, b_from, to, placer_ctx.place_loc_vars()); + e_create_move create_move = ::create_move(blocks_affected, b_from, to, place_loc_vars); //Check that all the blocks affected by the move would still be in a legal floorplan region after the swap if (!floorplan_legal(blocks_affected)) { diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 81a4f0c4352..418e14926dc 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -24,7 +24,13 @@ e_create_move FeasibleRegionMoveGenerator::propose_move(t_pl_blocks_to_be_moved& ClusterNetId net_from; int pin_from; //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, true, &net_from, &pin_from, placer_ctx); + ClusterBlockId b_from = propose_block_to_move(placer_opts, + proposed_action.logical_blk_type_index, + /*highly_crit_block=*/true, + &net_from, + &pin_from, + placer_ctx); + VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Feasible Region Move Choose Block %di - rlim %f\n", size_t(b_from), rlim); if (!b_from) { //No movable block found diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index dc1e8d4787a..a5ddf5c55b9 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -88,11 +88,11 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, bool macro_placed = false; for (int i_try = 0; i_try < MAX_NUM_TRIES_TO_PLACE_MACROS_RANDOMLY && !macro_placed; i_try++) { - macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, FREE, place_loc_vars); + macro_placed = try_place_macro_randomly(pl_macro, pr, block_type, e_pad_loc_type::FREE, place_loc_vars); } if (!macro_placed) { - macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, FREE, place_loc_vars); + macro_placed = try_place_macro_exhaustively(pl_macro, pr, block_type, e_pad_loc_type::FREE, place_loc_vars); } if (!macro_placed) { diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index 584b248f8e7..dab02ecf875 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -68,7 +68,7 @@ static void clear_all_grid_locs(PlaceLocVars& place_loc_avrs); */ static bool place_macro(int macros_max_num_tries, const t_pl_macro& pl_macro, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector& block_scores, PlaceLocVars& place_loc_avrs); @@ -135,7 +135,7 @@ static std::vector init_blk_types_empty_locations( */ static inline void fix_IO_block_types(const t_pl_macro& pl_macro, t_pl_loc loc, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, vtr::vector_map& block_locs); /** @@ -193,7 +193,7 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, static bool try_centroid_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, vtr::vector& block_scores, PlaceLocVars& place_loc_avrs); @@ -213,7 +213,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, static bool try_dense_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, PlaceLocVars& place_loc_avrs); @@ -225,7 +225,7 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, */ static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, const char* constraints_file, PlaceLocVars& place_loc_avrs); @@ -479,7 +479,7 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, static bool try_centroid_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, vtr::vector& block_scores, PlaceLocVars& place_loc_vars) { auto& block_locs = place_loc_vars.mutable_block_locs(); @@ -625,14 +625,14 @@ static std::vector init_blk_types_empty_locations( static inline void fix_IO_block_types(const t_pl_macro& pl_macro, t_pl_loc loc, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, vtr::vector_map& block_locs) { const auto& device_ctx = g_vpr_ctx.device(); //If the user marked the IO block pad_loc_type as RANDOM, that means it should be randomly //placed and then stay fixed to that location, which is why the macro members are marked as fixed. const auto& type = device_ctx.grid.get_physical_type({loc.x, loc.y, loc.layer}); - if (is_io_type(type) && pad_loc_type == RANDOM) { + if (is_io_type(type) && pad_loc_type == e_pad_loc_type::RANDOM) { for (const t_pl_macro_member& pl_macro_member : pl_macro.members) { block_locs[pl_macro_member.blk_index].is_fixed = true; } @@ -642,7 +642,7 @@ static inline void fix_IO_block_types(const t_pl_macro& pl_macro, bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, PlaceLocVars& place_loc_vars) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; @@ -722,7 +722,7 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, PlaceLocVars& place_loc_vars) { const auto& compressed_block_grid = g_vpr_ctx.placement().compressed_block_grids[block_type->index]; auto& block_locs = place_loc_vars.mutable_block_locs(); @@ -812,7 +812,7 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, static bool try_dense_placement(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, PlaceLocVars& place_loc_vars) { t_pl_loc loc; diff --git a/vpr/src/place/initial_placement.h b/vpr/src/place/initial_placement.h index f2dd0b74c98..6dbba299834 100644 --- a/vpr/src/place/initial_placement.h +++ b/vpr/src/place/initial_placement.h @@ -33,7 +33,7 @@ struct t_block_score { /** * @brief keeps track of available empty locations of a specific block type during initial placement. - * Used to densly place macros that failed to be placed in the first initial placement iteration (random placement) + * Used to densely place macros that failed to be placed in the first initial placement iteration (random placement) */ struct t_grid_empty_locs_block_type { /* @@ -52,17 +52,19 @@ struct t_grid_empty_locs_block_type { * @brief tries to place a macro at a random location * * @param pl_macro The macro to be placed. - * @param pr The PartitionRegion of the macro - represents its floorplanning constraints, is the size of the whole chip if the macro is not - * constrained. + * @param pr The PartitionRegion of the macro - represents its floorplanning constraints, + * is the size of the whole chip if the macro is not constrained. * @param block_type Logical block type of the macro blocks. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the macro gets placed, false if not. */ bool try_place_macro_randomly(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, PlaceLocVars& place_loc_vars); @@ -74,13 +76,15 @@ bool try_place_macro_randomly(const t_pl_macro& pl_macro, * constrained. * @param block_type Logical block type of the macro blocks. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the macro gets placed, false if not. */ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, const PartitionRegion& pr, t_logical_block_type_ptr block_type, - enum e_pad_loc_type pad_loc_type, + e_pad_loc_type pad_loc_type, PlaceLocVars& place_loc_vars); /** @@ -89,6 +93,8 @@ bool try_place_macro_exhaustively(const t_pl_macro& pl_macro, * * @param pl_macro The macro to be placed. * @param head_pos The location of the macro head member. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if macro was placed, false if not. */ @@ -100,6 +106,8 @@ bool try_place_macro(const t_pl_macro& pl_macro, * @brief Checks whether the block is already placed * * @param blk_id block id of the block to be checked + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the block was placed, false if not. */ @@ -117,8 +125,10 @@ bool is_block_placed(ClusterBlockId blk_id, * @param placer_opts Required by the function that set the status of f_placer_debug. * Also used to access pad_loc_type to see if a block needs to be marked fixed. * @param constraints_file Used to read block locations if any constraints is available. - * @param noc_enabled Used to check whether the user turned on the noc - * optimization during placement. + * @param noc_opts Contains information about if the NoC optimization is enabled + * and NoC-related weighting factors. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. */ void initial_placement(const t_placer_opts& placer_opts, const char* constraints_file, @@ -131,12 +141,15 @@ void initial_placement(const t_placer_opts& placer_opts, * @param blk_id The block that should be placed. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. * @param blk_types_empty_locs_in_grid First location (lowest y) and number of remaining blocks in each column for the blk_id type - * + * @param block_scores Scores assign to different blocks to determine which one should be placed first. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the block gets placed, false if not. */ bool place_one_block(const ClusterBlockId blk_id, - enum e_pad_loc_type pad_loc_type, - std::vector* blk_types_empty_locs_in_grid, vtr::vector* block_scores, + e_pad_loc_type pad_loc_type, + std::vector* blk_types_empty_locs_in_grid, + vtr::vector* block_scores, PlaceLocVars& place_loc_vars); #endif diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index b63ff8e3c1d..b473cb6dbcb 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -17,7 +17,12 @@ e_create_move UniformMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks const auto& place_loc_vars = placer_ctx.place_loc_vars(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); + ClusterBlockId b_from = propose_block_to_move(placer_opts, + proposed_action.logical_blk_type_index, + /*highly_crit_block=*/false, + /*net_from=*/nullptr, + /*pin_from=*/nullptr, + placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Uniform Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index 90c882cca94..a5ee7b05f19 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -20,7 +20,12 @@ e_create_move WeightedCentroidMoveGenerator::propose_move(t_pl_blocks_to_be_move const auto& place_loc_vars = placer_ctx.place_loc_vars(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); + ClusterBlockId b_from = propose_block_to_move(placer_opts, + proposed_action.logical_blk_type_index, + /*highly_crit_block=*/false, + /*net_from=*/nullptr, + /*pin_from=*/nullptr, + placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Centroid Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index b4cb7604d37..0825a184336 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -22,7 +22,12 @@ e_create_move WeightedMedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& const auto& place_loc_vars = placer_ctx.place_loc_vars(); //Find a movable block based on blk_type - ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, false, nullptr, nullptr, placer_ctx); + ClusterBlockId b_from = propose_block_to_move(placer_opts, + proposed_action.logical_blk_type_index, + /*highly_crit_block=*/false, + /*net_from=*/nullptr, + /*pin_from=*/nullptr, + placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Weighted Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); From f57405954acc369855ed62058f3df314858ac03a Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Mon, 29 Jul 2024 16:23:58 -0400 Subject: [PATCH 059/146] fix compilation error in place_loc_vars() --- vpr/src/draw/draw.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index 88e5582ed4c..ac851a60aac 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -570,7 +570,7 @@ void free_draw_structs() { #endif /* NO_GRAPHICS */ } -void init_draw_coords(float width_val, const PlaceLocVars& place_loc_vars) { +void place_loc_vars(float width_val, const PlaceLocVars& place_loc_vars) { #ifndef NO_GRAPHICS /* Load the arrays containing the left and bottom coordinates of the clbs * * forming the FPGA. tile_width_val sets the width and height of a drawn * @@ -642,6 +642,7 @@ void init_draw_coords(float width_val, const PlaceLocVars& place_loc_vars) { * draw_height}); #else (void)width_val; + (void)place_loc_vars; #endif /* NO_GRAPHICS */ } From 6b80de08c0d2fcace17d9b23da9911edfd342268 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 30 Jul 2024 15:03:42 -0400 Subject: [PATCH 060/146] add forward decls and include needed header files in read_place.h --- vpr/src/base/read_place.cpp | 3 --- vpr/src/base/read_place.h | 7 +++++++ vpr/src/draw/draw.cpp | 2 +- vpr/src/place/initial_noc_placement.cpp | 6 ++++++ vpr/src/place/initial_noc_placment.h | 3 +++ vpr/src/place/place_util.h | 3 ++- 6 files changed, 19 insertions(+), 5 deletions(-) diff --git a/vpr/src/base/read_place.cpp b/vpr/src/base/read_place.cpp index 3b6915b7150..46f35b13213 100644 --- a/vpr/src/base/read_place.cpp +++ b/vpr/src/base/read_place.cpp @@ -1,9 +1,7 @@ #include #include #include -#include -#include "vtr_assert.h" #include "vtr_util.h" #include "vtr_log.h" #include "vtr_digest.h" @@ -16,7 +14,6 @@ #include "read_place.h" #include "read_xml_arch_file.h" #include "place_util.h" -#include "placer_context.h" static void read_place_header(std::ifstream& placement_file, const char* net_file, diff --git a/vpr/src/base/read_place.h b/vpr/src/base/read_place.h index 0312bb058cc..17deabb92dc 100644 --- a/vpr/src/base/read_place.h +++ b/vpr/src/base/read_place.h @@ -1,7 +1,14 @@ #ifndef READ_PLACE_H #define READ_PLACE_H +#include "vtr_vector_map.h" + +#include + + class PlacerContext; +class ClusterBlockId; +struct t_block_loc; /** * This function is for reading a place file when placement is skipped. diff --git a/vpr/src/draw/draw.cpp b/vpr/src/draw/draw.cpp index ac851a60aac..715d5f8ca20 100644 --- a/vpr/src/draw/draw.cpp +++ b/vpr/src/draw/draw.cpp @@ -570,7 +570,7 @@ void free_draw_structs() { #endif /* NO_GRAPHICS */ } -void place_loc_vars(float width_val, const PlaceLocVars& place_loc_vars) { +void init_draw_coords(float width_val, const PlaceLocVars& place_loc_vars) { #ifndef NO_GRAPHICS /* Load the arrays containing the left and bottom coordinates of the clbs * * forming the FPGA. tile_width_val sets the width and height of a drawn * diff --git a/vpr/src/place/initial_noc_placement.cpp b/vpr/src/place/initial_noc_placement.cpp index a5ddf5c55b9..6621e4da31c 100644 --- a/vpr/src/place/initial_noc_placement.cpp +++ b/vpr/src/place/initial_noc_placement.cpp @@ -31,6 +31,8 @@ static bool accept_noc_swap(double delta_cost, double prob); * @brief Places a constrained NoC router within its partition region. * * @param router_blk_id NoC router cluster block ID + * @param place_loc_vars Placement block location information. To be + * filled with the location where pl_macro is placed. */ static void place_constrained_noc_router(ClusterBlockId router_blk_id, PlaceLocVars& place_loc_vars); @@ -41,6 +43,8 @@ static void place_constrained_noc_router(ClusterBlockId router_blk_id, * @param unfixed_routers Contains the cluster block ID for all unconstrained * NoC routers. * @param seed Used for shuffling NoC routers. + * @param place_loc_vars Placement block location information. To be filled + * with the location where pl_macro is placed. */ static void place_noc_routers_randomly(std::vector& unfixed_routers, int seed, @@ -50,6 +54,8 @@ static void place_noc_routers_randomly(std::vector& unfixed_rout * @brief Runs a simulated annealing optimizer for NoC routers. * * @param noc_opts Contains weighting factors for NoC cost terms. + * @param place_loc_vars Placement block location information. + * To be filled with the location where pl_macro is placed. */ static void noc_routers_anneal(const t_noc_opts& noc_opts, PlaceLocVars& place_loc_vars); diff --git a/vpr/src/place/initial_noc_placment.h b/vpr/src/place/initial_noc_placment.h index ddd277d101e..db957140ebc 100644 --- a/vpr/src/place/initial_noc_placment.h +++ b/vpr/src/place/initial_noc_placment.h @@ -10,6 +10,9 @@ * to minimize NoC costs. * * @param noc_opts NoC-related options. Used to calculate NoC-related costs. + * @param placer_opts Contain the placement algorithm options including the seed. + * @param place_loc_vars Placement block location information. To be filled + * with the location where pl_macro is placed. */ void initial_noc_placement(const t_noc_opts& noc_opts, const t_placer_opts& placer_opts, diff --git a/vpr/src/place/place_util.h b/vpr/src/place/place_util.h index b69361a0df6..980e4fb497c 100644 --- a/vpr/src/place/place_util.h +++ b/vpr/src/place/place_util.h @@ -14,11 +14,12 @@ #include "vtr_vector_map.h" #include "globals.h" -#include "placer_context.h" + // forward declaration of t_placer_costs so that it can be used an argument // in NocCostTerms constructor class t_placer_costs; +class PlaceLocVars; /** * @brief Data structure that stores different cost terms for NoC placement. From 56f6d8b863a778495017c1197f448d4bb623b4bd Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Tue, 30 Jul 2024 16:34:38 -0400 Subject: [PATCH 061/146] enum class e_cost_methods --- vpr/src/place/move_utils.cpp | 4 ++-- vpr/src/place/net_cost_handler.cpp | 12 ++++++------ vpr/src/place/net_cost_handler.h | 2 +- vpr/src/place/place.cpp | 12 ++++++------ 4 files changed, 15 insertions(+), 15 deletions(-) diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 9cc3c5774e3..31781511c9f 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -467,8 +467,8 @@ e_block_move_result record_macro_self_swaps(t_pl_blocks_to_be_moved& blocks_affe //Fit the displaced blocks into the empty locations auto loc_itr = empty_locs.begin(); - for (auto blk : non_macro_displaced_blocks) { - outcome = blocks_affected.record_block_move(blk, *loc_itr, place_locs_vars); + for (ClusterBlockId blk : non_macro_displaced_blocks) { + outcome = blocks_affected.record_block_move(blk, *loc_itr, place_loc_vars); ++loc_itr; } diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 0af766244e5..8d9cdbe1994 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -1950,7 +1950,7 @@ double comp_bb_cost(e_cost_methods method) { if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Small nets don't use incremental updating on their bounding boxes, * * so they can use a fast bounding box calculator. */ - if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == NORMAL) { + if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == e_cost_methods::NORMAL) { get_bb_from_scratch(net_id, place_move_ctx.bb_coords[net_id], place_move_ctx.bb_num_on_edges[net_id], @@ -1963,12 +1963,12 @@ double comp_bb_cost(e_cost_methods method) { pl_net_cost.net_cost[net_id] = get_net_cost(net_id, place_move_ctx.bb_coords[net_id]); cost += pl_net_cost.net_cost[net_id]; - if (method == CHECK) + if (method == e_cost_methods::CHECK) expected_wirelength += get_net_wirelength_estimate(net_id, place_move_ctx.bb_coords[net_id]); } } - if (method == CHECK) { + if (method == e_cost_methods::CHECK) { VTR_LOG("\n"); VTR_LOG("BB estimate of min-dist (placement) wire length: %.0f\n", expected_wirelength); @@ -1987,7 +1987,7 @@ double comp_layer_bb_cost(e_cost_methods method) { if (!cluster_ctx.clb_nlist.net_is_ignored(net_id)) { /* Do only if not ignored. */ /* Small nets don't use incremental updating on their bounding boxes, * * so they can use a fast bounding box calculator. */ - if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == NORMAL) { + if (cluster_ctx.clb_nlist.net_sinks(net_id).size() >= SMALL_NET && method == e_cost_methods::NORMAL) { get_layer_bb_from_scratch(net_id, place_move_ctx.layer_bb_num_on_edges[net_id], place_move_ctx.layer_bb_coords[net_id], @@ -2002,14 +2002,14 @@ double comp_layer_bb_cost(e_cost_methods method) { place_move_ctx.layer_bb_coords[net_id], place_move_ctx.num_sink_pin_layer[size_t(net_id)]); cost += pl_net_cost.net_cost[net_id]; - if (method == CHECK) + if (method == e_cost_methods::CHECK) expected_wirelength += get_net_wirelength_from_layer_bb(net_id, place_move_ctx.layer_bb_coords[net_id], place_move_ctx.num_sink_pin_layer[size_t(net_id)]); } } - if (method == CHECK) { + if (method == e_cost_methods::CHECK) { VTR_LOG("\n"); VTR_LOG("BB estimate of min-dist (placement) wire length: %.0f\n", expected_wirelength); diff --git a/vpr/src/place/net_cost_handler.h b/vpr/src/place/net_cost_handler.h index 3a1992e741b..1d17b5756ff 100644 --- a/vpr/src/place/net_cost_handler.h +++ b/vpr/src/place/net_cost_handler.h @@ -22,7 +22,7 @@ constexpr double ERROR_TOL = .01; * NORMAL: Compute cost efficiently using incremental techniques. * CHECK: Brute-force cost computation; useful to validate the more complex incremental cost update code. */ -enum e_cost_methods { +enum class e_cost_methods { NORMAL, CHECK }; diff --git a/vpr/src/place/place.cpp b/vpr/src/place/place.cpp index 2a59ce32162..efde447cbf7 100644 --- a/vpr/src/place/place.cpp +++ b/vpr/src/place/place.cpp @@ -493,10 +493,10 @@ void try_place(const Netlist<>& net_list, if (placer_opts.place_algorithm.is_timing_driven()) { if (cube_bb) { - costs.bb_cost = comp_bb_cost(NORMAL); + costs.bb_cost = comp_bb_cost(e_cost_methods::NORMAL); } else { VTR_ASSERT_SAFE(!cube_bb); - costs.bb_cost = comp_layer_bb_cost(NORMAL); + costs.bb_cost = comp_layer_bb_cost(e_cost_methods::NORMAL); } first_crit_exponent = placer_opts.td_place_exp_first; /*this will be modified when rlim starts to change */ @@ -574,10 +574,10 @@ void try_place(const Netlist<>& net_list, /* Total cost is the same as wirelength cost normalized*/ if (cube_bb) { - costs.bb_cost = comp_bb_cost(NORMAL); + costs.bb_cost = comp_bb_cost(e_cost_methods::NORMAL); } else { VTR_ASSERT_SAFE(!cube_bb); - costs.bb_cost = comp_layer_bb_cost(NORMAL); + costs.bb_cost = comp_layer_bb_cost(e_cost_methods::NORMAL); } costs.bb_cost_norm = 1 / costs.bb_cost; @@ -2026,10 +2026,10 @@ static int check_placement_costs(const t_placer_costs& costs, const bool cube_bb = g_vpr_ctx.placement().cube_bb; if (cube_bb) { - bb_cost_check = comp_bb_cost(CHECK); + bb_cost_check = comp_bb_cost(e_cost_methods::CHECK); } else { VTR_ASSERT_SAFE(!cube_bb); - bb_cost_check = comp_layer_bb_cost(CHECK); + bb_cost_check = comp_layer_bb_cost(e_cost_methods::CHECK); } if (fabs(bb_cost_check - costs.bb_cost) > costs.bb_cost * ERROR_TOL) { From 946a23565311d63a2ed20a5f58d5a3d9813a9408 Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Wed, 31 Jul 2024 11:48:52 -0400 Subject: [PATCH 062/146] fix compilation errors --- vpr/src/place/analytic_placer.cpp | 6 +- vpr/src/place/analytic_placer.h | 2 +- vpr/src/place/centroid_move_generator.cpp | 1 + .../place/critical_uniform_move_generator.cpp | 1 + .../place/feasible_region_move_generator.cpp | 1 + vpr/src/place/initial_placement.cpp | 57 ++++++++++++------- vpr/src/place/manual_move_generator.cpp | 1 + vpr/src/place/median_move_generator.cpp | 11 ++-- vpr/src/place/move_generator.h | 4 +- vpr/src/place/move_utils.cpp | 1 + vpr/src/place/net_cost_handler.cpp | 7 ++- vpr/src/place/net_cost_handler.h | 4 +- vpr/src/place/uniform_move_generator.cpp | 2 + .../weighted_centroid_move_generator.cpp | 2 + .../place/weighted_median_move_generator.cpp | 7 ++- 15 files changed, 72 insertions(+), 35 deletions(-) diff --git a/vpr/src/place/analytic_placer.cpp b/vpr/src/place/analytic_placer.cpp index 348ad43359f..24159d27af7 100644 --- a/vpr/src/place/analytic_placer.cpp +++ b/vpr/src/place/analytic_placer.cpp @@ -129,7 +129,7 @@ constexpr int HEAP_STALLED_ITERATIONS_STOP = 15; * Placement & device info is accessed via g_vpr_ctx */ -AnalyticPlacer::AnalyticPlacer(const PlaceLocVars& place_loc_vars) +AnalyticPlacer::AnalyticPlacer(PlaceLocVars& place_loc_vars) : placer_loc_vars_ref_(place_loc_vars) { //Eigen::initParallel(); @@ -414,7 +414,7 @@ void AnalyticPlacer::setup_solve_blks(t_logical_block_type_ptr blkTypes) { void AnalyticPlacer::update_macros() { for (auto& macro : g_vpr_ctx.mutable_placement().pl_macros) { ClusterBlockId head_id = macro.members[0].blk_index; - bool mac_can_be_placed = macro_can_be_placed(macro, blk_locs[head_id].loc, true); + bool mac_can_be_placed = macro_can_be_placed(macro, blk_locs[head_id].loc, true, placer_loc_vars_ref_); //if macro can not be placed in this head pos, change the head pos if (!mac_can_be_placed) { @@ -423,7 +423,7 @@ void AnalyticPlacer::update_macros() { } //macro should be placed successfully after changing the head position - VTR_ASSERT(macro_can_be_placed(macro, blk_locs[head_id].loc, true)); + VTR_ASSERT(macro_can_be_placed(macro, blk_locs[head_id].loc, true, placer_loc_vars_ref_)); //update other member's location based on head pos for (auto member = ++macro.members.begin(); member != macro.members.end(); ++member) { diff --git a/vpr/src/place/analytic_placer.h b/vpr/src/place/analytic_placer.h index ec2e1ce5ebc..2885e8fd984 100644 --- a/vpr/src/place/analytic_placer.h +++ b/vpr/src/place/analytic_placer.h @@ -123,7 +123,7 @@ class AnalyticPlacer { * To tune these parameters, change directly in constructor */ AnalyticPlacer() = delete; - explicit AnalyticPlacer(const PlaceLocVars& place_loc_vars); + explicit AnalyticPlacer(PlaceLocVars& place_loc_vars); /* * @brief main function of analytic placement diff --git a/vpr/src/place/centroid_move_generator.cpp b/vpr/src/place/centroid_move_generator.cpp index 80f480099fd..327a1d2002a 100644 --- a/vpr/src/place/centroid_move_generator.cpp +++ b/vpr/src/place/centroid_move_generator.cpp @@ -3,6 +3,7 @@ #include "globals.h" #include "directed_moves_util.h" #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" #include diff --git a/vpr/src/place/critical_uniform_move_generator.cpp b/vpr/src/place/critical_uniform_move_generator.cpp index 5048cda3804..d7ec9486900 100644 --- a/vpr/src/place/critical_uniform_move_generator.cpp +++ b/vpr/src/place/critical_uniform_move_generator.cpp @@ -1,6 +1,7 @@ #include "critical_uniform_move_generator.h" #include "globals.h" #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" CriticalUniformMoveGenerator::CriticalUniformMoveGenerator(PlacerContext& placer_ctx) diff --git a/vpr/src/place/feasible_region_move_generator.cpp b/vpr/src/place/feasible_region_move_generator.cpp index 418e14926dc..3fdc874ef11 100644 --- a/vpr/src/place/feasible_region_move_generator.cpp +++ b/vpr/src/place/feasible_region_move_generator.cpp @@ -2,6 +2,7 @@ #include "globals.h" #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" #include diff --git a/vpr/src/place/initial_placement.cpp b/vpr/src/place/initial_placement.cpp index dab02ecf875..74144b403ce 100644 --- a/vpr/src/place/initial_placement.cpp +++ b/vpr/src/place/initial_placement.cpp @@ -37,7 +37,8 @@ static constexpr int SORT_WEIGHT_PER_TILES_OUTSIDE_OF_PR = 100; * @brief Set chosen grid locations to EMPTY block id before each placement iteration * * @param unplaced_blk_types_index Block types that their grid locations must be cleared. - * + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. */ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_blk_types_index, PlaceLocVars& place_loc_vars); @@ -45,8 +46,11 @@ static void clear_block_type_grid_locs(const std::unordered_set& unplaced_b /** * @brief Initializes the grid to empty. It also initialized the location for * all blocks to unplaced. + * + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. */ -static void clear_all_grid_locs(PlaceLocVars& place_loc_avrs); +static void clear_all_grid_locs(PlaceLocVars& place_loc_vars); /** * @brief Control routine for placing a macro. @@ -63,6 +67,8 @@ static void clear_all_grid_locs(PlaceLocVars& place_loc_avrs); * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. * @param blk_types_empty_locs_in_grid First location (lowest y) and number of remaining blocks in each column for the blk_id type. * @param block_scores The block_scores (ranking of what to place next) for unplaced blocks connected to this macro should be updated. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if macro was placed, false if not. */ @@ -71,7 +77,7 @@ static bool place_macro(int macros_max_num_tries, e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, vtr::vector& block_scores, - PlaceLocVars& place_loc_avrs); + PlaceLocVars& place_loc_vars); /* * Assign scores to each block based on macro size and floorplanning constraints. @@ -82,10 +88,11 @@ static vtr::vector assign_block_scores(); /** * @brief Tries to find y coordinate for macro head location based on macro direction - * * * @param first_macro_loc The first available location that can place the macro blocks. * @param pl_macro The macro to be placed. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return y coordinate of the location that macro head should be placed */ @@ -132,6 +139,8 @@ static std::vector init_blk_types_empty_locations( * @param pl_macro The macro to be fixed. * @param loc The location at which the head of the macro is placed. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. + * @param block_locs Clustered block locations used to mark the IO blocks that are to be placed + * randomly as fixed. */ static inline void fix_IO_block_types(const t_pl_macro& pl_macro, t_pl_loc loc, @@ -157,6 +166,8 @@ static bool is_loc_legal(const t_pl_loc& loc, * * @param pl_macro The macro to be placed. * @param centroid specified location (x,y,subtile) for the pl_macro head member. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return a vector of blocks that are connected to this block but not yet placed so their scores can later be updated. */ @@ -170,6 +181,8 @@ static std::vector find_centroid_loc(const t_pl_macro& pl_macro, * @param centroid_loc Calculated location in try_centroid_placement function for the block. * @param block_type Logical block type of the macro blocks. * @param search_for_empty If set, the function tries to find an empty location. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the function can find any location near the centroid one, false otherwise. */ @@ -186,7 +199,9 @@ static bool find_centroid_neighbor(t_pl_loc& centroid_loc, * constrained. * @param block_type Logical block type of the macro blocks. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. - * @param block_scores The block_scores (ranking of what to place next) for unplaced blocks connected to this macro are updated in this routine. + * @param block_scores The block_scores (ranking of what to place next) for unplaced blocks connected to this macro are updated in this routine. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the macro gets placed, false if not. */ @@ -195,7 +210,7 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, e_pad_loc_type pad_loc_type, vtr::vector& block_scores, - PlaceLocVars& place_loc_avrs); + PlaceLocVars& place_loc_vars); /** * @brief Looks for a valid placement location for macro in second iteration, tries to place as many macros as possible in one column @@ -207,6 +222,8 @@ static bool try_centroid_placement(const t_pl_macro& pl_macro, * @param block_type Logical block type of the macro blocks. * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. * @param blk_types_empty_locs_in_grid first location (lowest y) and number of remaining blocks in each column for the blk_id type + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. * * @return true if the macro gets placed, false if not. */ @@ -215,19 +232,21 @@ static bool try_dense_placement(const t_pl_macro& pl_macro, t_logical_block_type_ptr block_type, e_pad_loc_type pad_loc_type, std::vector* blk_types_empty_locs_in_grid, - PlaceLocVars& place_loc_avrs); + PlaceLocVars& place_loc_vars); /** * @brief Tries for MAX_INIT_PLACE_ATTEMPTS times to place all blocks considering their floorplanning constraints and the device size * * @param pad_loc_type Used to check whether an io block needs to be marked as fixed. * @param constraints_file Used to read block locations if any constraints is available. + * @param place_loc_vars Placement block location information. To be filled with the location + * where pl_macro is placed. */ static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, e_pad_loc_type pad_loc_type, const char* constraints_file, - PlaceLocVars& place_loc_avrs); + PlaceLocVars& place_loc_vars); /** * @brief If any blocks remain unplaced after all initial placement iterations, this routine @@ -990,7 +1009,7 @@ static void place_all_blocks(const t_placer_opts& placer_opts, vtr::vector& block_scores, enum e_pad_loc_type pad_loc_type, const char* constraints_file, - PlaceLocVars& place_loc_avrs) { + PlaceLocVars& place_loc_vars) { auto& cluster_ctx = g_vpr_ctx.clustering(); auto& place_ctx = g_vpr_ctx.placement(); auto& device_ctx = g_vpr_ctx.device(); @@ -1013,12 +1032,12 @@ static void place_all_blocks(const t_placer_opts& placer_opts, for (auto iter_no = 0; iter_no < MAX_INIT_PLACE_ATTEMPTS; iter_no++) { //clear grid for a new placement iteration - clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, place_loc_avrs); + clear_block_type_grid_locs(unplaced_blk_type_in_curr_itr, place_loc_vars); unplaced_blk_type_in_curr_itr.clear(); // read the constraint file if the user has provided one and this is not the first attempt if (strlen(constraints_file) != 0 && iter_no != 0) { - read_constraints(constraints_file, place_loc_avrs); + read_constraints(constraints_file, place_loc_vars); } //resize the vector to store unplaced block types empty locations @@ -1050,7 +1069,7 @@ static void place_all_blocks(const t_placer_opts& placer_opts, blocks_placed_since_heap_update++; - bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, place_loc_avrs); + bool block_placed = place_one_block(blk_id, pad_loc_type, &blk_types_empty_locs_in_grid[blk_id_type->index], &block_scores, place_loc_vars); //update heap based on update_heap_freq calculated above if (blocks_placed_since_heap_update % (update_heap_freq) == 0) { @@ -1214,14 +1233,14 @@ static void alloc_and_load_movable_blocks(const vtr::vector_map block_scores = assign_block_scores(); //Place all blocks - place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, place_loc_avrs); + place_all_blocks(placer_opts, block_scores, placer_opts.pad_loc_type, constraints_file, place_loc_vars); alloc_and_load_movable_blocks(block_locs); diff --git a/vpr/src/place/manual_move_generator.cpp b/vpr/src/place/manual_move_generator.cpp index c59365c3b2f..826db499914 100644 --- a/vpr/src/place/manual_move_generator.cpp +++ b/vpr/src/place/manual_move_generator.cpp @@ -12,6 +12,7 @@ #include "manual_move_generator.h" #include "manual_moves.h" +#include "placer_context.h" #ifndef NO_GRAPHICS # include "draw.h" diff --git a/vpr/src/place/median_move_generator.cpp b/vpr/src/place/median_move_generator.cpp index 096929011e7..2bd96d135b0 100644 --- a/vpr/src/place/median_move_generator.cpp +++ b/vpr/src/place/median_move_generator.cpp @@ -1,9 +1,12 @@ #include "median_move_generator.h" + #include "globals.h" -#include #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" +#include + MedianMoveGenerator::MedianMoveGenerator(PlacerContext& placer_ctx) : MoveGenerator(placer_ctx) {} @@ -22,9 +25,9 @@ e_create_move MedianMoveGenerator::propose_move(t_pl_blocks_to_be_moved& blocks_ //Find a movable block based on blk_type ClusterBlockId b_from = propose_block_to_move(placer_opts, proposed_action.logical_blk_type_index, - false, - nullptr, - nullptr, + /*highly_crit_block=*/false, + /*net_from=*/nullptr, + /*pin_from=*/nullptr, placer_ctx); VTR_LOGV_DEBUG(g_vpr_ctx.placement().f_placer_debug, "Median Move Choose Block %d - rlim %f\n", size_t(b_from), rlim); diff --git a/vpr/src/place/move_generator.h b/vpr/src/place/move_generator.h index 9924744ead6..0e259d22be5 100644 --- a/vpr/src/place/move_generator.h +++ b/vpr/src/place/move_generator.h @@ -1,13 +1,15 @@ #ifndef VPR_MOVE_GENERATOR_H #define VPR_MOVE_GENERATOR_H + #include "vpr_types.h" #include "move_utils.h" #include "timing_place.h" #include "directed_moves_util.h" -#include "placer_context.h" #include +class PlacerContext; + struct MoveOutcomeStats { float delta_cost_norm = std::numeric_limits::quiet_NaN(); float delta_bb_cost_norm = std::numeric_limits::quiet_NaN(); diff --git a/vpr/src/place/move_utils.cpp b/vpr/src/place/move_utils.cpp index 31781511c9f..176c2d383a1 100644 --- a/vpr/src/place/move_utils.cpp +++ b/vpr/src/place/move_utils.cpp @@ -10,6 +10,7 @@ #include "draw.h" #include "place_constraints.h" +#include "placer_context.h" //f_placer_breakpoint_reached is used to stop the placer when a breakpoint is reached. When this flag is true, it stops the placer after the current perturbation. Thus, when a breakpoint is reached, this flag is set to true. //Note: The flag is only effective if compiled with VTR_ENABLE_DEBUG_LOGGING diff --git a/vpr/src/place/net_cost_handler.cpp b/vpr/src/place/net_cost_handler.cpp index 8d9cdbe1994..7c420b00af9 100644 --- a/vpr/src/place/net_cost_handler.cpp +++ b/vpr/src/place/net_cost_handler.cpp @@ -24,15 +24,18 @@ * @date July 12, 2024 */ #include "net_cost_handler.h" + #include "clustered_netlist_fwd.h" #include "globals.h" #include "physical_types.h" +#include "placer_context.h" #include "move_utils.h" #include "place_timing_update.h" #include "noc_place_utils.h" #include "vtr_math.h" #include +#include using std::max; using std::min; @@ -209,9 +212,9 @@ static void record_affected_net(const ClusterNetId net); * @param place_algorithm Placement algorithm * @param delay_model Timing delay model used by placer * @param criticalities Connections timing criticalities - * @param blk_id Block ID of that the moving pin blongs to. + * @param blk_id Block ID of that the moving pin belongs to. * @param pin_id Pin ID of the moving pin - * @param moving_blk_inf Data structure that holds information, e.g., old location and new locatoin, about all moving blocks + * @param moving_blk_inf Data structure that holds information, e.g., old location and new location, about all moving blocks * @param affected_pins Netlist pins which are affected, in terms placement cost, by the proposed move. * @param timing_delta_c Timing cost change based on the proposed move * @param is_src_moving Is the moving pin the source of a net. diff --git a/vpr/src/place/net_cost_handler.h b/vpr/src/place/net_cost_handler.h index 1d17b5756ff..c055a0f20c6 100644 --- a/vpr/src/place/net_cost_handler.h +++ b/vpr/src/place/net_cost_handler.h @@ -3,10 +3,8 @@ #include "timing_place.h" #include "move_transactions.h" #include "place_util.h" -#include "placer_context.h" - -#include +class PlacerContext; /** * @brief The error tolerance due to round off for the total cost computation. diff --git a/vpr/src/place/uniform_move_generator.cpp b/vpr/src/place/uniform_move_generator.cpp index b473cb6dbcb..deb8b7268ba 100644 --- a/vpr/src/place/uniform_move_generator.cpp +++ b/vpr/src/place/uniform_move_generator.cpp @@ -1,6 +1,8 @@ #include "uniform_move_generator.h" + #include "globals.h" #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" UniformMoveGenerator::UniformMoveGenerator(PlacerContext& placer_ctx) diff --git a/vpr/src/place/weighted_centroid_move_generator.cpp b/vpr/src/place/weighted_centroid_move_generator.cpp index a5ee7b05f19..501eaaf01b9 100644 --- a/vpr/src/place/weighted_centroid_move_generator.cpp +++ b/vpr/src/place/weighted_centroid_move_generator.cpp @@ -1,7 +1,9 @@ #include "weighted_centroid_move_generator.h" + #include "globals.h" #include "directed_moves_util.h" #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" WeightedCentroidMoveGenerator::WeightedCentroidMoveGenerator(PlacerContext& placer_ctx) diff --git a/vpr/src/place/weighted_median_move_generator.cpp b/vpr/src/place/weighted_median_move_generator.cpp index 0825a184336..edb080ea2be 100644 --- a/vpr/src/place/weighted_median_move_generator.cpp +++ b/vpr/src/place/weighted_median_move_generator.cpp @@ -1,10 +1,13 @@ #include "weighted_median_move_generator.h" + #include "globals.h" -#include -#include #include "place_constraints.h" +#include "placer_context.h" #include "move_utils.h" +#include +#include + #define CRIT_MULT_FOR_W_MEDIAN 10 WeightedMedianMoveGenerator::WeightedMedianMoveGenerator(PlacerContext& placer_ctx) From 7bb781b75b482e06f01af7e56fe433ff4f42847e Mon Sep 17 00:00:00 2001 From: soheilshahrouz Date: Wed, 31 Jul 2024 14:53:57 -0400 Subject: [PATCH 063/146] use VTR_ASSERT_SAFE instead of VTR_ASSERT in placement context getters --- vpr/src/base/load_flat_place.cpp | 8 +++++--- vpr/src/base/vpr_context.h | 20 ++++++++++---------- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/vpr/src/base/load_flat_place.cpp b/vpr/src/base/load_flat_place.cpp index 9da18c38236..f13b9f35167 100644 --- a/vpr/src/base/load_flat_place.cpp +++ b/vpr/src/base/load_flat_place.cpp @@ -15,7 +15,7 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, t_pl_loc loc = block_locs[iblk].loc; size_t bnum = size_t(iblk); - for (auto atom : atoms) { + for (AtomBlockId atom : atoms) { t_pb_graph_node* atom_pbgn = atom_ctx.lookup.atom_pb(atom)->pb_graph_node; fprintf(fp, "%s %d %d %d %d #%zu %s\n", atom_ctx.nlist.block_name(atom).c_str(), loc.x, loc.y, loc.sub_tile, @@ -27,14 +27,16 @@ static void print_flat_cluster(FILE* fp, ClusterBlockId iblk, /* prints a flat placement file */ void print_flat_placement(const char* flat_place_file) { + const auto& block_locs = g_vpr_ctx.placement().block_locs(); + FILE* fp; ClusterAtomsLookup atoms_lookup; auto& cluster_ctx = g_vpr_ctx.clustering(); - if (!g_vpr_ctx.placement().block_locs().empty()) { + if (!block_locs.empty()) { fp = fopen(flat_place_file, "w"); - for (auto iblk : cluster_ctx.clb_nlist.blocks()) { + for (ClusterBlockId iblk : cluster_ctx.clb_nlist.blocks()) { auto atoms = atoms_lookup.atoms_in_cluster(iblk); print_flat_cluster(fp, iblk, atoms); } diff --git a/vpr/src/base/vpr_context.h b/vpr/src/base/vpr_context.h index fed9c9a61ab..704768c488d 100644 --- a/vpr/src/base/vpr_context.h +++ b/vpr/src/base/vpr_context.h @@ -400,14 +400,14 @@ struct PlacementContext : public Context { public: - const vtr::vector_map& block_locs() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.block_locs(); } - vtr::vector_map& mutable_block_locs() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_block_locs(); } - const GridBlock& get_grid_blocks() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.grid_blocks(); } - GridBlock& get_mutable_grid_blocks() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_grid_blocks(); } - vtr::vector_map& mutable_physical_pins() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.mutable_physical_pins(); } - const vtr::vector_map& physical_pins() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_.physical_pins(); } - PlaceLocVars& mutable_place_loc_vars() { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } - const PlaceLocVars& place_loc_vars() const { VTR_ASSERT(loc_vars_are_accessible_); return place_loc_vars_; } + const vtr::vector_map& block_locs() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_.block_locs(); } + vtr::vector_map& mutable_block_locs() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_.mutable_block_locs(); } + const GridBlock& get_grid_blocks() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_.grid_blocks(); } + GridBlock& get_mutable_grid_blocks() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_.mutable_grid_blocks(); } + vtr::vector_map& mutable_physical_pins() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_.mutable_physical_pins(); } + const vtr::vector_map& physical_pins() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_.physical_pins(); } + PlaceLocVars& mutable_place_loc_vars() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_; } + const PlaceLocVars& place_loc_vars() const { VTR_ASSERT_SAFE(loc_vars_are_accessible_); return place_loc_vars_; } /** * @brief Makes place_loc_vars_ inaccessible through the getter methods. @@ -416,7 +416,7 @@ struct PlacementContext : public Context { * guarantee that the placement stage code does not access block location variables * stored in the global state. */ - void lock_loc_vars() { loc_vars_are_accessible_ = false; } + void lock_loc_vars() { VTR_ASSERT_SAFE(loc_vars_are_accessible_); loc_vars_are_accessible_ = false; } /** * @brief Makes place_loc_vars_ accessible through the getter methods. @@ -424,7 +424,7 @@ struct PlacementContext : public Context { * This method should be called at the end of the placement stage to * make the block location information accessible for subsequent stages. */ - void unlock_loc_vars() { loc_vars_are_accessible_ = true; } + void unlock_loc_vars() { VTR_ASSERT_SAFE(!loc_vars_are_accessible_); loc_vars_are_accessible_ = true; } ///@brief The pl_macros array stores all the placement macros (usually carry chains). std::vector pl_macros; From 3de7a404a4e9d1fa453373b3dcb5e6a6937e0b37 Mon Sep 17 00:00:00 2001 From: Amir Arjomand Date: Tue, 16 Jul 2024 22:10:20 -0300 Subject: [PATCH 064/146] vtr golden result updated --- .github/workflows/nightly_test.yml | 4 +- .../suite/koios_weekly_suite/task_list.conf | 4 +- .../task/freecores/synthesis_result.json | 41 +- .../benchmark/task/full/synthesis_result.json | 186 +- .../task/keywords/and/synthesis_result.json | 6 +- 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create mode 100644 yosys/tests/verilog/assign_to_reg.ys create mode 100644 yosys/tests/verilog/roundtrip_proc.ys diff --git a/.github/workflows/nightly_test.yml b/.github/workflows/nightly_test.yml index 6a3a315785a..7192f985f63 100644 --- a/.github/workflows/nightly_test.yml +++ b/.github/workflows/nightly_test.yml @@ -62,9 +62,9 @@ jobs: - {test: "vtr_reg_strong", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3", extra_pkgs: "libeigen3-dev"} - {test: "vtr_reg_strong_odin", cores: "16", options: "", cmake: "-DVTR_ASSERT_LEVEL=3 -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"} - {test: "vtr_reg_strong_odin", cores: "16", options: "-skip_qor", cmake: "-DVTR_ASSERT_LEVEL=3 -DVTR_ENABLE_SANITIZE=ON -DWITH_ODIN=ON", extra_pkgs: "libeigen3-dev"} - - {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""} + #- {test: "vtr_reg_system_verilog", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""} - {test: "odin_reg_strong", cores: "16", options: "", cmake: "-DWITH_ODIN=ON", extra_pkgs: ""} - - {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=ON", extra_pkgs: ""} + - {test: "parmys_reg_strong", cores: "16", options: "", cmake: "-DYOSYS_F4PGA_PLUGINS=OFF", extra_pkgs: ""} env: DEBIAN_FRONTEND: "noninteractive" diff --git a/parmys/regression_test/benchmark/suite/koios_weekly_suite/task_list.conf b/parmys/regression_test/benchmark/suite/koios_weekly_suite/task_list.conf index a1df12a559b..6cda998cb84 100644 --- a/parmys/regression_test/benchmark/suite/koios_weekly_suite/task_list.conf +++ b/parmys/regression_test/benchmark/suite/koios_weekly_suite/task_list.conf @@ -2,5 +2,5 @@ regression_test/benchmark/task/koios/koios_large regression_test/benchmark/task/koios/koios_large_no_hb regression_test/benchmark/task/koios/koios_proxy regression_test/benchmark/task/koios/koios_proxy_no_hb -regression_test/benchmark/task/koios/koios_sv -regression_test/benchmark/task/koios/koios_sv_no_hb +#regression_test/benchmark/task/koios/koios_sv +#regression_test/benchmark/task/koios/koios_sv_no_hb diff --git a/parmys/regression_test/benchmark/task/freecores/synthesis_result.json b/parmys/regression_test/benchmark/task/freecores/synthesis_result.json index 84434694980..f987e7cb0e6 100644 --- a/parmys/regression_test/benchmark/task/freecores/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/freecores/synthesis_result.json @@ -479,20 +479,20 @@ "Multiplier": 1, "Memory": 8, "generic logic size": 4, - "Longest Path": 269, + "Longest Path": 274, "Average Path": 3, - "Estimated LUTs": 4797, + "Estimated LUTs": 4777, "Total Node": 1957, - "Wires": 5595, - "Wire Bits": 10315, + "Wires": 5591, + "Wire Bits": 10025, "Public Wires": 240, "Public Wire Bits": 240, - "Total Cells": 8221, - "MUX": 2180, + "Total Cells": 8185, + "MUX": 2164, "XOR": 40, - "OR": 2850, - "AND": 1455, - "NOT": 639, + "OR": 2836, + "AND": 1451, + "NOT": 637, "DFFs": [ "$_DFF_P_ 645" ], @@ -533,8 +533,8 @@ "Average Path": 3, "Estimated LUTs": 41888, "Total Node": 5344, - "Wires": 9772, - "Wire Bits": 102222, + "Wires": 9777, + "Wire Bits": 102242, "Public Wires": 391, "Public Wire Bits": 391, "Total Cells": 31999, @@ -585,8 +585,8 @@ "Average Path": 3, "Estimated LUTs": 42386, "Total Node": 5593, - "Wires": 10802, - "Wire Bits": 103242, + "Wires": 10796, + "Wire Bits": 103210, "Public Wires": 648, "Public Wire Bits": 648, "Total Cells": 32995, @@ -840,16 +840,16 @@ "Average Path": 4, "Estimated LUTs": 4564, "Total Node": 2961, - "Wires": 6943, - "Wire Bits": 11526, + "Wires": 6934, + "Wire Bits": 11506, "Public Wires": 501, "Public Wire Bits": 501, - "Total Cells": 8995, + "Total Cells": 8955, "MUX": 2605, "XOR": 311, - "OR": 1858, - "AND": 1687, - "NOT": 711, + "OR": 1861, + "AND": 1683, + "NOT": 672, "DFFs": [ "$_DFF_P_ 1312" ], @@ -861,9 +861,6 @@ "test_name": "freecores/mips_16/k6_frac_N10_frac_chain_mem32K_40nm", "architecture": "k6_frac_N10_frac_chain_mem32K_40nm.xml", "warnings": [ - "mips_16.v:0 System task `$display' outside initial block is unsupported.", - "mips_16.v:0 System task `$display' outside initial block is unsupported.", - "mips_16.v:0 System task `$display' outside initial block is unsupported.", "Replacing memory \\reg_array with list of registers. See ../vtr_flow/benchmarks//freecores/mips_16.v:791", "Ignoring module EX_stage because it contains processes (run 'proc' command first).", "Ignoring module data_mem because it contains processes (run 'proc' command first).", diff --git a/parmys/regression_test/benchmark/task/full/synthesis_result.json b/parmys/regression_test/benchmark/task/full/synthesis_result.json index d768a298d74..8026e17e5e4 100644 --- a/parmys/regression_test/benchmark/task/full/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/full/synthesis_result.json @@ -24,16 +24,16 @@ "Average Path": 3, "Estimated LUTs": 36, "Total Node": 27, - "Wires": 162, - "Wire Bits": 173, + "Wires": 163, + "Wire Bits": 177, "Public Wires": 72, "Public Wire Bits": 72, - "Total Cells": 65, + "Total Cells": 69, "XNOR": 4, "XOR": 8, "OR": 13, "AND": 14, - "NOT": 15, + "NOT": 19, "adder": 10, "multiply": 1 }, @@ -56,16 +56,16 @@ "Average Path": 3, "Estimated LUTs": 36, "Total Node": 27, - "Wires": 162, - "Wire Bits": 173, + "Wires": 163, + "Wire Bits": 177, "Public Wires": 72, "Public Wire Bits": 72, - "Total Cells": 65, + "Total Cells": 69, "XNOR": 4, "XOR": 8, "OR": 13, "AND": 14, - "NOT": 15, + "NOT": 19, "adder": 10, "multiply": 1 }, @@ -88,16 +88,16 @@ "Average Path": 3, "Estimated LUTs": 36, "Total Node": 27, - "Wires": 162, - "Wire Bits": 173, + "Wires": 163, + "Wire Bits": 177, "Public Wires": 72, "Public Wire Bits": 72, - "Total Cells": 65, + "Total Cells": 69, "XNOR": 4, "XOR": 8, "OR": 13, "AND": 14, - "NOT": 15, + "NOT": 19, "adder": 10, "multiply": 1 }, @@ -129,16 +129,16 @@ "Average Path": 4, "Estimated LUTs": 6903, "Total Node": 7285, - "Wires": 14205, - "Wire Bits": 29752, + "Wires": 14208, + "Wire Bits": 29761, "Public Wires": 3004, "Public Wire Bits": 3004, - "Total Cells": 21032, + "Total Cells": 21047, "MUX": 853, "XOR": 1242, - "OR": 3683, - "AND": 7613, - "NOT": 3757, + "OR": 3689, + "AND": 7645, + "NOT": 3734, "DFFs": [ "$_DFF_P_ 533" ], @@ -268,16 +268,16 @@ "Average Path": 14, "Estimated LUTs": 2800, "Total Node": 1974, - "Wires": 9909, - "Wire Bits": 12964, + "Wires": 9441, + "Wire Bits": 12223, "Public Wires": 777, "Public Wire Bits": 777, - "Total Cells": 10268, + "Total Cells": 9782, "MUX": 4590, "XOR": 412, - "OR": 289, - "AND": 1089, - "NOT": 771, + "OR": 55, + "AND": 819, + "NOT": 789, "DFFs": [ "$_DFF_P_ 2052" ], @@ -308,16 +308,16 @@ "Average Path": 8, "Estimated LUTs": 608, "Total Node": 482, - "Wires": 2115, - "Wire Bits": 2616, + "Wires": 2060, + "Wire Bits": 2525, "Public Wires": 186, "Public Wire Bits": 186, - "Total Cells": 2084, + "Total Cells": 2028, "MUX": 970, "XOR": 72, - "OR": 49, - "AND": 161, - "NOT": 166, + "OR": 25, + "AND": 121, + "NOT": 174, "DFFs": [ "$_DFF_P_ 432" ], @@ -612,16 +612,16 @@ "Average Path": 2, "Estimated LUTs": 244, "Total Node": 217, - "Wires": 1491, - "Wire Bits": 1647, + "Wires": 1472, + "Wire Bits": 1654, "Public Wires": 322, "Public Wire Bits": 322, - "Total Cells": 971, + "Total Cells": 978, "MUX": 386, "XOR": 32, - "OR": 33, - "AND": 91, - "NOT": 99, + "OR": 34, + "AND": 96, + "NOT": 100, "DFFs": [ "$_DFF_P_ 193" ], @@ -652,16 +652,16 @@ "Average Path": 1, "Estimated LUTs": 124, "Total Node": 205, - "Wires": 1129, - "Wire Bits": 1253, + "Wires": 1110, + "Wire Bits": 1260, "Public Wires": 226, "Public Wire Bits": 226, - "Total Cells": 674, + "Total Cells": 681, "MUX": 192, "XOR": 32, - "OR": 32, - "AND": 89, - "NOT": 96, + "OR": 33, + "AND": 94, + "NOT": 97, "DFFs": [ "$_DFF_P_ 96" ], @@ -920,16 +920,16 @@ "Average Path": 5, "Estimated LUTs": 33300, "Total Node": 11361, - "Wires": 42801, - "Wire Bits": 123179, + "Wires": 42612, + "Wire Bits": 123374, "Public Wires": 5370, "Public Wire Bits": 5370, - "Total Cells": 78546, + "Total Cells": 78719, "MUX": 16121, "XOR": 1131, - "OR": 23332, - "AND": 22822, - "NOT": 2897, + "OR": 23305, + "AND": 22846, + "NOT": 3073, "DFFs": [ "$_DFF_P_ 6241" ], @@ -954,27 +954,27 @@ "synthesis_time(ms)": 1.8, "Pi": 2, "Po": 7, - "logic element": 8, - "Adder": 13, + "logic element": 14, + "Adder": 23, "Memory": 2, "generic logic size": 4, - "Longest Path": 10, + "Longest Path": 14, "Average Path": 3, - "Estimated LUTs": 15, - "Total Node": 23, - "Wires": 59, - "Wire Bits": 62, - "Public Wires": 15, - "Public Wire Bits": 15, - "Total Cells": 41, + "Estimated LUTs": 21, + "Total Node": 39, + "Wires": 91, + "Wire Bits": 98, + "Public Wires": 21, + "Public Wire Bits": 21, + "Total Cells": 62, "MUX": 13, - "OR": 1, - "AND": 3, - "NOT": 4, + "OR": 4, + "AND": 4, + "NOT": 11, "DFFs": [ "$_DFF_P_ 5" ], - "adder": 13, + "adder": 23, "dual_port_ram": 2 }, "full/mcml/k6_frac_N10_frac_chain_mem32K_40nm": { @@ -1089,16 +1089,16 @@ "Average Path": 3, "Estimated LUTs": 66209, "Total Node": 44291, - "Wires": 230329, - "Wire Bits": 325245, + "Wires": 230211, + "Wire Bits": 325004, "Public Wires": 16394, "Public Wire Bits": 16394, - "Total Cells": 266389, + "Total Cells": 266221, "MUX": 110574, "XOR": 10218, - "OR": 12284, - "AND": 34984, - "NOT": 21221, + "OR": 12219, + "AND": 34973, + "NOT": 21129, "DFFs": [ "$_DFF_P_ 51597" ], @@ -1255,16 +1255,16 @@ "Average Path": 4, "Estimated LUTs": 2142, "Total Node": 773, - "Wires": 2860, - "Wire Bits": 7412, + "Wires": 2865, + "Wire Bits": 7406, "Public Wires": 285, "Public Wire Bits": 285, - "Total Cells": 6103, + "Total Cells": 6097, "MUX": 1637, "XOR": 135, - "OR": 1576, - "AND": 1655, - "NOT": 222, + "OR": 1575, + "AND": 1651, + "NOT": 221, "DFFs": [ "$_DFF_P_ 419" ], @@ -1301,15 +1301,15 @@ "Average Path": 5, "Estimated LUTs": 724, "Total Node": 291, - "Wires": 1828, - "Wire Bits": 2806, + "Wires": 1834, + "Wire Bits": 2809, "Public Wires": 104, "Public Wire Bits": 104, - "Total Cells": 2493, + "Total Cells": 2501, "MUX": 909, "OR": 347, - "AND": 453, - "NOT": 65, + "AND": 457, + "NOT": 69, "DFFs": [ "$_DFF_P_ 601" ], @@ -1338,16 +1338,16 @@ "Average Path": 4, "Estimated LUTs": 2057, "Total Node": 531, - "Wires": 4564, - "Wire Bits": 6187, + "Wires": 4584, + "Wire Bits": 6216, "Public Wires": 76, "Public Wire Bits": 76, - "Total Cells": 5651, + "Total Cells": 5673, "MUX": 2781, "XOR": 256, - "OR": 616, - "AND": 656, - "NOT": 140, + "OR": 625, + "AND": 666, + "NOT": 143, "DFFs": [ "$_DFF_P_ 893" ], @@ -1449,16 +1449,16 @@ "Average Path": 7, "Estimated LUTs": 9185, "Total Node": 7491, - "Wires": 29636, - "Wire Bits": 32704, + "Wires": 29611, + "Wire Bits": 32542, "Public Wires": 5278, "Public Wire Bits": 5278, - "Total Cells": 28353, + "Total Cells": 28215, "MUX": 7168, "XOR": 254, - "OR": 1705, - "AND": 3239, - "NOT": 439, + "OR": 1686, + "AND": 3138, + "NOT": 421, "DFFs": [ "$_DFF_P_ 11801" ], @@ -1525,8 +1525,8 @@ "Average Path": 7, "Estimated LUTs": 9245, "Total Node": 5562, - "Wires": 36769, - "Wire Bits": 38731, + "Wires": 36772, + "Wire Bits": 38739, "Public Wires": 302, "Public Wire Bits": 302, "Total Cells": 25276, diff --git a/parmys/regression_test/benchmark/task/keywords/and/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/and/synthesis_result.json index 85d96e13b7f..cf59de4c2ac 100644 --- a/parmys/regression_test/benchmark/task/keywords/and/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/and/synthesis_result.json @@ -95,21 +95,21 @@ "test_name": "and/replicate_and_int_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "and/replicate_and_ultra_wide/no_arch": { "test_name": "and/replicate_and_ultra_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "and/replicate_and_wide/no_arch": { "test_name": "and/replicate_and_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "DEFAULT": { diff --git a/parmys/regression_test/benchmark/task/keywords/defparam/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/defparam/synthesis_result.json index 8150a123bd6..f8918834b1f 100644 --- a/parmys/regression_test/benchmark/task/keywords/defparam/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/defparam/synthesis_result.json @@ -31,9 +31,6 @@ "errors": [ "defparam_string.v:0 Can't find object for defparam `simple_op.msg`!" ], - "warnings": [ - "defparam_string.v:0 System task `$display' outside initial block is unsupported." - ], "max_rss(MiB)": 11.4, "exec_time(ms)": 3.1, "elaboration_time(ms)": 0.4, diff --git a/parmys/regression_test/benchmark/task/keywords/else/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/else/synthesis_result.json index baa9a7f8f95..3e4591cff63 100644 --- a/parmys/regression_test/benchmark/task/keywords/else/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/else/synthesis_result.json @@ -19,16 +19,16 @@ "Average Path": 4, "Estimated LUTs": 4, "Total Node": 4, - "Wires": 11, - "Wire Bits": 11, + "Wires": 9, + "Wire Bits": 9, "Public Wires": 4, "Public Wire Bits": 4, - "Total Cells": 9, + "Total Cells": 7, "MUX": 1, "XOR": 2, - "OR": 2, + "OR": 1, "AND": 1, - "NOT": 3 + "NOT": 2 }, "else/if_else/no_arch": { "test_name": "else/if_else/no_arch", diff --git a/parmys/regression_test/benchmark/task/keywords/nand/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/nand/synthesis_result.json index b12fed44f9f..bf5a84407fe 100644 --- a/parmys/regression_test/benchmark/task/keywords/nand/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/nand/synthesis_result.json @@ -94,21 +94,21 @@ "test_name": "nand/replicate_nand_int_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "nand/replicate_nand_ultra_wide/no_arch": { "test_name": "nand/replicate_nand_ultra_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "nand/replicate_nand_wide/no_arch": { "test_name": "nand/replicate_nand_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "DEFAULT": { diff --git a/parmys/regression_test/benchmark/task/keywords/nor/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/nor/synthesis_result.json index 9af752dd39d..7cf8c497b1a 100644 --- a/parmys/regression_test/benchmark/task/keywords/nor/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/nor/synthesis_result.json @@ -100,21 +100,21 @@ "test_name": "nor/replicate_nor_int_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "nor/replicate_nor_ultra_wide/no_arch": { "test_name": "nor/replicate_nor_ultra_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "nor/replicate_nor_wide/no_arch": { "test_name": "nor/replicate_nor_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "DEFAULT": { diff --git a/parmys/regression_test/benchmark/task/keywords/or/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/or/synthesis_result.json index ca3e0ea8f1d..1910b31c09b 100644 --- a/parmys/regression_test/benchmark/task/keywords/or/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/or/synthesis_result.json @@ -95,21 +95,21 @@ "test_name": "or/replicate_or_int_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "or/replicate_or_ultra_wide/no_arch": { "test_name": "or/replicate_or_ultra_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "or/replicate_or_wide/no_arch": { "test_name": "or/replicate_or_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "DEFAULT": { diff --git a/parmys/regression_test/benchmark/task/keywords/xnor/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/xnor/synthesis_result.json index 9078a7acd3c..e225f1235cd 100644 --- a/parmys/regression_test/benchmark/task/keywords/xnor/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/xnor/synthesis_result.json @@ -54,21 +54,21 @@ "test_name": "xnor/replicate_xnor_int_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "xnor/replicate_xnor_ultra_wide/no_arch": { "test_name": "xnor/replicate_xnor_ultra_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "xnor/replicate_xnor_wide/no_arch": { "test_name": "xnor/replicate_xnor_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "xnor/xnor_indexed_port/no_arch": { diff --git a/parmys/regression_test/benchmark/task/keywords/xor/synthesis_result.json b/parmys/regression_test/benchmark/task/keywords/xor/synthesis_result.json index 6dc736f1790..759ed77af6f 100644 --- a/parmys/regression_test/benchmark/task/keywords/xor/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/keywords/xor/synthesis_result.json @@ -51,21 +51,21 @@ "test_name": "xor/replicate_xor_int_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "xor/replicate_xor_ultra_wide/no_arch": { "test_name": "xor/replicate_xor_ultra_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "xor/replicate_xor_wide/no_arch": { "test_name": "xor/replicate_xor_wide/no_arch", "exit": 1, "errors": [ - "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2710." + "Assert `new_cell->children.at(0)->type == AST_CELLTYPE' failed in frontends/ast/simplify.cc:2686." ] }, "xor/xor_indexed_port/no_arch": { diff --git a/parmys/regression_test/benchmark/task/koios/koios_large/synthesis_result.json b/parmys/regression_test/benchmark/task/koios/koios_large/synthesis_result.json index cc359ed16de..30109d6b5ed 100644 --- a/parmys/regression_test/benchmark/task/koios/koios_large/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/koios/koios_large/synthesis_result.json @@ -268,14 +268,14 @@ "Average Path": 9, "Estimated LUTs": 326321, "Total Node": 139379, - "Wires": 1308719, - "Wire Bits": 1340906, + "Wires": 1308724, + "Wire Bits": 1340959, "Public Wires": 21834, "Public Wire Bits": 21834, - "Total Cells": 1214752, + "Total Cells": 1214757, "MUX": 725160, "XOR": 5865, - "OR": 17952, + "OR": 17957, "AND": 9599, "NOT": 19486, "DFFs": [ @@ -546,14 +546,14 @@ "Average Path": 9, "Estimated LUTs": 218200, "Total Node": 93537, - "Wires": 876728, - "Wire Bits": 898464, + "Wires": 876747, + "Wire Bits": 898561, "Public Wires": 15068, "Public Wire Bits": 15068, - "Total Cells": 813266, + "Total Cells": 813289, "MUX": 484768, "XOR": 3910, - "OR": 12025, + "OR": 12048, "AND": 6499, "NOT": 13099, "DFFs": [ @@ -809,14 +809,14 @@ "Average Path": 8, "Estimated LUTs": 110080, "Total Node": 47700, - "Wires": 444790, - "Wire Bits": 456177, + "Wires": 444781, + "Wire Bits": 456159, "Public Wires": 8302, "Public Wire Bits": 8302, - "Total Cells": 411800, + "Total Cells": 411798, "MUX": 244373, "XOR": 1955, - "OR": 6114, + "OR": 6112, "AND": 3393, "NOT": 6705, "DFFs": [ @@ -1646,16 +1646,16 @@ "Average Path": 4, "Estimated LUTs": 122343, "Total Node": 73492, - "Wires": 446668, - "Wire Bits": 487013, + "Wires": 447124, + "Wire Bits": 486389, "Public Wires": 27891, "Public Wire Bits": 27891, - "Total Cells": 393743, + "Total Cells": 393167, "MUX": 116924, "XOR": 9576, - "OR": 2475, - "AND": 17088, - "NOT": 7004, + "OR": 2379, + "AND": 16704, + "NOT": 6908, "DFFs": [ "$_DFF_P_ 185499" ], @@ -2576,17 +2576,17 @@ "Average Path": 3, "Estimated LUTs": 115821, "Total Node": 18211, - "Wires": 37253, - "Wire Bits": 338917, + "Wires": 37272, + "Wire Bits": 338972, "Public Wires": 261, "Public Wire Bits": 261, - "Total Cells": 69318, - "MUX": 9186, - "OR": 37033, - "AND": 2134, - "NOT": 9610, + "Total Cells": 69334, + "MUX": 9185, + "OR": 37041, + "AND": 2130, + "NOT": 9624, "DFFs": [ - "$_DFF_P_ 4685" + "$_DFF_P_ 4684" ], "adder": 6668, "multiply": 2 @@ -2647,16 +2647,16 @@ "Average Path": 2, "Estimated LUTs": 55978, "Total Node": 58534, - "Wires": 247022, - "Wire Bits": 259382, + "Wires": 246998, + "Wire Bits": 259272, "Public Wires": 14773, "Public Wire Bits": 14773, - "Total Cells": 178047, + "Total Cells": 178011, "MUX": 46164, "XOR": 659, - "OR": 3292, - "AND": 1708, - "NOT": 23682, + "OR": 3275, + "AND": 1684, + "NOT": 23687, "DFFs": [ "$_DFF_P_ 53526" ], @@ -5958,19 +5958,20 @@ "Average Path": 8, "Estimated LUTs": 166353, "Total Node": 71655, - "Wires": 346791, - "Wire Bits": 399765, + "Wires": 347478, + "Wire Bits": 403809, "Public Wires": 33916, "Public Wire Bits": 33916, - "Total Cells": 332959, - "MUX": 152624, - "OR": 18997, - "AND": 15580, - "NOT": 14025, + "Total Cells": 336233, + "MUX": 155586, + "XOR": 9, + "OR": 18941, + "AND": 15592, + "NOT": 14221, "DFFs": [ - "$_DFF_P_ 109863" + "$_DFF_P_ 109951" ], - "adder": 9445, + "adder": 9508, "addition_fp_16": 320, "dual_port_ram": 11968, "mult_fp_16": 135, @@ -8274,19 +8275,20 @@ "Average Path": 9, "Estimated LUTs": 53915, "Total Node": 31324, - "Wires": 127104, - "Wire Bits": 150303, + "Wires": 127172, + "Wire Bits": 150719, "Public Wires": 17209, "Public Wire Bits": 17209, - "Total Cells": 122969, - "MUX": 49028, - "OR": 10849, - "AND": 8413, - "NOT": 6457, + "Total Cells": 123344, + "MUX": 49357, + "XOR": 2, + "OR": 10838, + "AND": 8417, + "NOT": 6500, "DFFs": [ - "$_DFF_P_ 35993" + "$_DFF_P_ 35994" ], - "adder": 6839, + "adder": 6846, "addition_fp_16": 76, "dual_port_ram": 5280, "mult_fp_16": 32, @@ -19350,16 +19352,16 @@ "Average Path": 3, "Estimated LUTs": 87494, "Total Node": 10996, - "Wires": 219375, - "Wire Bits": 258974, + "Wires": 219313, + "Wire Bits": 258724, "Public Wires": 154089, "Public Wire Bits": 154089, - "Total Cells": 92412, + "Total Cells": 92228, "MUX": 37270, "XOR": 711, - "OR": 13248, - "AND": 11840, - "NOT": 1936, + "OR": 13215, + "AND": 11812, + "NOT": 1813, "DFFs": [ "$_DFF_P_ 22414" ], diff --git a/parmys/regression_test/benchmark/task/koios/koios_large_no_hb/synthesis_result.json b/parmys/regression_test/benchmark/task/koios/koios_large_no_hb/synthesis_result.json index 703581dfe12..45d8b16f19c 100644 --- a/parmys/regression_test/benchmark/task/koios/koios_large_no_hb/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/koios/koios_large_no_hb/synthesis_result.json @@ -268,14 +268,14 @@ "Average Path": 9, "Estimated LUTs": 326321, "Total Node": 139379, - "Wires": 1308712, - "Wire Bits": 1340874, + "Wires": 1308733, + "Wire Bits": 1341001, "Public Wires": 21834, "Public Wire Bits": 21834, - "Total Cells": 1214745, + "Total Cells": 1214761, "MUX": 725160, "XOR": 5865, - "OR": 17945, + "OR": 17961, "AND": 9599, "NOT": 19486, "DFFs": [ @@ -546,8 +546,8 @@ "Average Path": 9, "Estimated LUTs": 218200, "Total Node": 93537, - "Wires": 876733, - "Wire Bits": 898473, + "Wires": 876738, + "Wire Bits": 898530, "Public Wires": 15068, "Public Wire Bits": 15068, "Total Cells": 813277, @@ -809,14 +809,14 @@ "Average Path": 8, "Estimated LUTs": 110080, "Total Node": 47700, - "Wires": 444791, - "Wire Bits": 456186, + "Wires": 444779, + "Wire Bits": 456146, "Public Wires": 8302, "Public Wire Bits": 8302, - "Total Cells": 411795, + "Total Cells": 411797, "MUX": 244373, "XOR": 1955, - "OR": 6109, + "OR": 6111, "AND": 3393, "NOT": 6705, "DFFs": [ @@ -1638,16 +1638,16 @@ "Average Path": 4, "Estimated LUTs": 119751, "Total Node": 86020, - "Wires": 509160, - "Wire Bits": 549473, + "Wires": 509618, + "Wire Bits": 548881, "Public Wires": 6579, "Public Wire Bits": 6579, - "Total Cells": 435931, + "Total Cells": 435355, "MUX": 127292, "XOR": 9576, - "OR": 2475, - "AND": 17084, - "NOT": 7004, + "OR": 2379, + "AND": 16700, + "NOT": 6908, "DFFs": [ "$_DFF_P_ 206235" ], @@ -2382,15 +2382,15 @@ "Average Path": 3, "Estimated LUTs": 419446, "Total Node": 178966, - "Wires": 711753, - "Wire Bits": 1193861, + "Wires": 699745, + "Wire Bits": 1191812, "Public Wires": 25351, "Public Wire Bits": 25351, - "Total Cells": 1013781, + "Total Cells": 1008595, "MUX": 356305, "XOR": 17603, - "OR": 185697, - "AND": 192462, + "OR": 181710, + "AND": 191263, "NOT": 59360, "DFFs": [ "$_DFF_P_ 137440" @@ -2618,17 +2618,17 @@ "Average Path": 3, "Estimated LUTs": 115821, "Total Node": 18211, - "Wires": 37253, - "Wire Bits": 338917, + "Wires": 37272, + "Wire Bits": 338972, "Public Wires": 261, "Public Wire Bits": 261, - "Total Cells": 69318, - "MUX": 9186, - "OR": 37033, - "AND": 2134, - "NOT": 9610, + "Total Cells": 69334, + "MUX": 9185, + "OR": 37041, + "AND": 2130, + "NOT": 9624, "DFFs": [ - "$_DFF_P_ 4685" + "$_DFF_P_ 4684" ], "adder": 6668, "multiply": 2 @@ -2689,16 +2689,16 @@ "Average Path": 2, "Estimated LUTs": 55978, "Total Node": 58534, - "Wires": 247010, - "Wire Bits": 259331, + "Wires": 246987, + "Wire Bits": 259225, "Public Wires": 14773, "Public Wire Bits": 14773, - "Total Cells": 178042, + "Total Cells": 178006, "MUX": 46161, "XOR": 659, - "OR": 3294, - "AND": 1708, - "NOT": 23682, + "OR": 3277, + "AND": 1684, + "NOT": 23687, "DFFs": [ "$_DFF_P_ 53524" ], @@ -6030,20 +6030,20 @@ "Average Path": 8, "Estimated LUTs": 258693, "Total Node": 130874, - "Wires": 489065, - "Wire Bits": 636586, + "Wires": 489095, + "Wire Bits": 643119, "Public Wires": 32103, "Public Wire Bits": 32103, - "Total Cells": 514205, - "MUX": 203502, - "XOR": 8563, - "OR": 54872, - "AND": 58140, - "NOT": 36873, + "Total Cells": 520044, + "MUX": 206464, + "XOR": 8572, + "OR": 55141, + "AND": 60072, + "NOT": 37389, "DFFs": [ - "$_DFF_P_ 109479" + "$_DFF_P_ 109567" ], - "adder": 30683, + "adder": 30746, "dual_port_ram": 11968, "multiply": 125 }, @@ -8375,20 +8375,20 @@ "Average Path": 9, "Estimated LUTs": 75983, "Total Node": 45448, - "Wires": 161358, - "Wire Bits": 206940, + "Wires": 161282, + "Wire Bits": 207989, "Public Wires": 16781, "Public Wire Bits": 16781, - "Total Cells": 166306, - "MUX": 61268, - "XOR": 2032, - "OR": 19374, - "AND": 18517, - "NOT": 11881, + "Total Cells": 167291, + "MUX": 61597, + "XOR": 2034, + "OR": 19441, + "AND": 18977, + "NOT": 12000, "DFFs": [ - "$_DFF_P_ 35993" + "$_DFF_P_ 35994" ], - "adder": 11927, + "adder": 11934, "dual_port_ram": 5280, "multiply": 34 }, @@ -19112,16 +19112,16 @@ "Average Path": 3, "Estimated LUTs": 86726, "Total Node": 35394, - "Wires": 293263, - "Wire Bits": 337569, + "Wires": 293198, + "Wire Bits": 337308, "Public Wires": 3561, "Public Wire Bits": 3561, - "Total Cells": 256756, + "Total Cells": 256574, "MUX": 132308, "XOR": 711, - "OR": 22483, - "AND": 13885, - "NOT": 1949, + "OR": 22452, + "AND": 13857, + "NOT": 1826, "DFFs": [ "$_DFF_P_ 71499" ], diff --git a/parmys/regression_test/benchmark/task/koios/koios_medium/synthesis_result.json b/parmys/regression_test/benchmark/task/koios/koios_medium/synthesis_result.json index 1edb52d82ef..4ff3586159b 100644 --- a/parmys/regression_test/benchmark/task/koios/koios_medium/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/koios/koios_medium/synthesis_result.json @@ -94,16 +94,16 @@ "Average Path": 3, "Estimated LUTs": 28425, "Total Node": 16656, - "Wires": 58035, - "Wire Bits": 82397, + "Wires": 58023, + "Wire Bits": 81442, "Public Wires": 8453, "Public Wire Bits": 8453, - "Total Cells": 42029, + "Total Cells": 42044, "MUX": 10563, "XOR": 326, - "OR": 3612, - "AND": 415, - "NOT": 6477, + "OR": 3618, + "AND": 418, + "NOT": 6483, "DFFs": [ "$_DFF_P_ 8096" ], @@ -357,15 +357,16 @@ "Average Path": 4, "Estimated LUTs": 20367, "Total Node": 3582, - "Wires": 20528, - "Wire Bits": 30830, + "Wires": 25202, + "Wire Bits": 56222, "Public Wires": 5264, "Public Wire Bits": 5264, - "Total Cells": 18753, - "MUX": 7815, - "OR": 2064, - "AND": 3753, - "NOT": 783, + "Total Cells": 29499, + "MUX": 15873, + "XOR": 6, + "OR": 3216, + "AND": 5100, + "NOT": 966, "DFFs": [ "$_DFF_P_ 3345" ], @@ -565,16 +566,16 @@ "Average Path": 5, "Estimated LUTs": 15571, "Total Node": 4796, - "Wires": 45933, - "Wire Bits": 49670, + "Wires": 45912, + "Wire Bits": 49616, "Public Wires": 5161, "Public Wire Bits": 5161, - "Total Cells": 42907, + "Total Cells": 42880, "MUX": 22203, "XOR": 15, - "OR": 2991, - "AND": 2641, - "NOT": 255, + "OR": 2976, + "AND": 2632, + "NOT": 252, "DFFs": [ "$_DFF_P_ 11798" ], @@ -1019,16 +1020,16 @@ "Average Path": 4, "Estimated LUTs": 48603, "Total Node": 34434, - "Wires": 187072, - "Wire Bits": 207294, + "Wires": 187300, + "Wire Bits": 206982, "Public Wires": 7467, "Public Wire Bits": 7467, - "Total Cells": 166749, + "Total Cells": 166461, "MUX": 46810, "XOR": 4788, - "OR": 1257, - "AND": 8531, - "NOT": 3474, + "OR": 1209, + "AND": 8339, + "NOT": 3426, "DFFs": [ "$_DFF_P_ 75245" ], @@ -1126,16 +1127,16 @@ "Average Path": 3, "Estimated LUTs": 11429, "Total Node": 5611, - "Wires": 23477, - "Wire Bits": 36834, + "Wires": 23476, + "Wire Bits": 36833, "Public Wires": 2102, "Public Wire Bits": 2102, - "Total Cells": 31480, + "Total Cells": 31479, "MUX": 11207, "XOR": 2213, "OR": 2367, "AND": 6380, - "NOT": 2354, + "NOT": 2353, "DFFs": [ "$_DFF_P_ 2383" ], @@ -1221,16 +1222,16 @@ "Average Path": 4, "Estimated LUTs": 13223, "Total Node": 5602, - "Wires": 28995, - "Wire Bits": 50685, + "Wires": 28845, + "Wire Bits": 50523, "Public Wires": 3999, "Public Wire Bits": 3999, - "Total Cells": 42441, + "Total Cells": 42292, "MUX": 11266, "XOR": 3492, - "OR": 5745, - "AND": 8421, - "NOT": 3193, + "OR": 5673, + "AND": 8416, + "NOT": 3121, "DFFs": [ "$_DFF_P_ 6976" ], @@ -1322,16 +1323,16 @@ "Average Path": 6, "Estimated LUTs": 19996, "Total Node": 2823, - "Wires": 16402, - "Wire Bits": 66252, + "Wires": 16436, + "Wire Bits": 66380, "Public Wires": 1608, "Public Wire Bits": 1608, - "Total Cells": 25190, + "Total Cells": 25311, "MUX": 8606, "XOR": 322, - "OR": 10476, - "AND": 774, - "NOT": 1918, + "OR": 10495, + "AND": 843, + "NOT": 1951, "DFFs": [ "$_DFF_P_ 2525" ], @@ -1419,8 +1420,8 @@ "Average Path": 4, "Estimated LUTs": 6918, "Total Node": 7979, - "Wires": 25580, - "Wire Bits": 33143, + "Wires": 25579, + "Wire Bits": 33142, "Public Wires": 4755, "Public Wire Bits": 4755, "Total Cells": 21954, @@ -5184,16 +5185,16 @@ "Average Path": 3, "Estimated LUTs": 26601, "Total Node": 5142, - "Wires": 65256, - "Wire Bits": 80227, + "Wires": 65236, + "Wire Bits": 80097, "Public Wires": 39529, "Public Wire Bits": 39529, - "Total Cells": 33500, + "Total Cells": 33387, "MUX": 13126, "XOR": 408, - "OR": 4911, - "AND": 4150, - "NOT": 1080, + "OR": 4888, + "AND": 4147, + "NOT": 993, "DFFs": [ "$_DFF_P_ 7390" ], diff --git a/parmys/regression_test/benchmark/task/koios/koios_medium_no_hb/synthesis_result.json b/parmys/regression_test/benchmark/task/koios/koios_medium_no_hb/synthesis_result.json index 693e61aa495..9a69f2195d6 100644 --- a/parmys/regression_test/benchmark/task/koios/koios_medium_no_hb/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/koios/koios_medium_no_hb/synthesis_result.json @@ -169,16 +169,16 @@ "Average Path": 3, "Estimated LUTs": 28720, "Total Node": 16803, - "Wires": 57995, - "Wire Bits": 80304, + "Wires": 58024, + "Wire Bits": 81592, "Public Wires": 8454, "Public Wire Bits": 8454, - "Total Cells": 42029, + "Total Cells": 42044, "MUX": 10563, "XOR": 326, - "OR": 3612, - "AND": 415, - "NOT": 6477, + "OR": 3618, + "AND": 418, + "NOT": 6483, "DFFs": [ "$_DFF_P_ 8096" ], @@ -463,16 +463,16 @@ "Average Path": 4, "Estimated LUTs": 22752, "Total Node": 5094, - "Wires": 23999, - "Wire Bits": 37480, + "Wires": 28654, + "Wire Bits": 62943, "Public Wires": 5228, "Public Wire Bits": 5228, - "Total Cells": 23924, - "MUX": 9276, - "XOR": 246, - "OR": 3080, - "AND": 4959, - "NOT": 1431, + "Total Cells": 34741, + "MUX": 17334, + "XOR": 252, + "OR": 4240, + "AND": 6360, + "NOT": 1623, "DFFs": [ "$_DFF_P_ 3345" ], @@ -670,16 +670,16 @@ "Average Path": 5, "Estimated LUTs": 16387, "Total Node": 6500, - "Wires": 57057, - "Wire Bits": 60794, + "Wires": 57036, + "Wire Bits": 60740, "Public Wires": 2053, "Public Wire Bits": 2053, - "Total Cells": 51018, + "Total Cells": 50991, "MUX": 26043, "XOR": 15, - "OR": 2990, - "AND": 2641, - "NOT": 255, + "OR": 2975, + "AND": 2632, + "NOT": 252, "DFFs": [ "$_DFF_P_ 14486" ], @@ -1120,16 +1120,16 @@ "Average Path": 4, "Estimated LUTs": 47955, "Total Node": 36666, - "Wires": 203488, - "Wire Bits": 223710, + "Wires": 203716, + "Wire Bits": 223398, "Public Wires": 2139, "Public Wire Bits": 2139, - "Total Cells": 178989, + "Total Cells": 178701, "MUX": 51994, "XOR": 4788, - "OR": 1257, - "AND": 8531, - "NOT": 3474, + "OR": 1209, + "AND": 8339, + "NOT": 3426, "DFFs": [ "$_DFF_P_ 80429" ], @@ -1227,16 +1227,16 @@ "Average Path": 5, "Estimated LUTs": 13699, "Total Node": 7769, - "Wires": 29682, - "Wire Bits": 41641, + "Wires": 29635, + "Wire Bits": 41808, "Public Wires": 3147, "Public Wire Bits": 3147, - "Total Cells": 33328, + "Total Cells": 33495, "MUX": 8974, "XOR": 624, - "OR": 4192, - "AND": 5500, - "NOT": 1685, + "OR": 4205, + "AND": 5632, + "NOT": 1707, "DFFs": [ "$_DFF_P_ 8160" ], @@ -1272,16 +1272,16 @@ "Average Path": 3, "Estimated LUTs": 11429, "Total Node": 5611, - "Wires": 23477, - "Wire Bits": 36834, + "Wires": 23476, + "Wire Bits": 36833, "Public Wires": 2102, "Public Wire Bits": 2102, - "Total Cells": 31480, + "Total Cells": 31479, "MUX": 11207, "XOR": 2213, "OR": 2367, "AND": 6380, - "NOT": 2354, + "NOT": 2353, "DFFs": [ "$_DFF_P_ 2383" ], @@ -1335,16 +1335,16 @@ "Average Path": 4, "Estimated LUTs": 13223, "Total Node": 5602, - "Wires": 28997, - "Wire Bits": 50646, + "Wires": 28852, + "Wire Bits": 50506, "Public Wires": 3999, "Public Wire Bits": 3999, - "Total Cells": 42389, + "Total Cells": 42243, "MUX": 11266, "XOR": 3492, - "OR": 5692, - "AND": 8422, - "NOT": 3193, + "OR": 5621, + "AND": 8419, + "NOT": 3121, "DFFs": [ "$_DFF_P_ 6976" ], @@ -1467,16 +1467,16 @@ "Average Path": 8, "Estimated LUTs": 37160, "Total Node": 11295, - "Wires": 46283, - "Wire Bits": 117301, + "Wires": 46219, + "Wire Bits": 118261, "Public Wires": 1513, "Public Wire Bits": 1513, - "Total Cells": 70144, + "Total Cells": 70962, "MUX": 22023, "XOR": 1594, - "OR": 17522, - "AND": 10524, - "NOT": 5134, + "OR": 17567, + "AND": 10886, + "NOT": 5545, "DFFs": [ "$_DFF_P_ 9256" ], @@ -1563,15 +1563,15 @@ "Average Path": 4, "Estimated LUTs": 6918, "Total Node": 7979, - "Wires": 25451, - "Wire Bits": 33014, + "Wires": 25450, + "Wire Bits": 33013, "Public Wires": 4691, "Public Wire Bits": 4691, - "Total Cells": 21826, + "Total Cells": 21825, "MUX": 8305, "XOR": 1413, "OR": 1380, - "AND": 1132, + "AND": 1131, "NOT": 848, "DFFs": [ "$_DFF_P_ 3977" @@ -2171,14 +2171,14 @@ "Average Path": 3, "Estimated LUTs": 22982, "Total Node": 9499, - "Wires": 75188, - "Wire Bits": 81419, + "Wires": 75193, + "Wire Bits": 81429, "Public Wires": 1314, "Public Wire Bits": 1314, - "Total Cells": 57385, + "Total Cells": 57394, "MUX": 23987, "XOR": 3, - "OR": 3466, + "OR": 3475, "AND": 1527, "NOT": 730, "DFFs": [ @@ -4987,16 +4987,16 @@ "Average Path": 3, "Estimated LUTs": 26483, "Total Node": 11204, - "Wires": 83537, - "Wire Bits": 99795, + "Wires": 83520, + "Wire Bits": 99654, "Public Wires": 1897, "Public Wire Bits": 1897, - "Total Cells": 74497, + "Total Cells": 74399, "MUX": 36836, "XOR": 408, - "OR": 7226, - "AND": 4696, - "NOT": 1093, + "OR": 7218, + "AND": 4693, + "NOT": 1006, "DFFs": [ "$_DFF_P_ 19643" ], diff --git a/parmys/regression_test/benchmark/task/koios/koios_proxy/synthesis_result.json b/parmys/regression_test/benchmark/task/koios/koios_proxy/synthesis_result.json index fde6163bf12..c3fe6b2563f 100644 --- a/parmys/regression_test/benchmark/task/koios/koios_proxy/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/koios/koios_proxy/synthesis_result.json @@ -360,16 +360,16 @@ "Average Path": 7, "Estimated LUTs": 243737, "Total Node": 97700, - "Wires": 457731, - "Wire Bits": 599949, + "Wires": 457777, + "Wire Bits": 600025, "Public Wires": 85601, "Public Wire Bits": 85601, - "Total Cells": 379942, + "Total Cells": 380273, "MUX": 130475, "XOR": 10865, - "OR": 53905, - "AND": 23402, - "NOT": 20994, + "OR": 54278, + "AND": 23338, + "NOT": 21016, "DFFs": [ "$_DFF_P_ 103965" ], @@ -524,16 +524,16 @@ "Average Path": 5, "Estimated LUTs": 1217802, "Total Node": 664917, - "Wires": 1306225, - "Wire Bits": 1765042, + "Wires": 1305796, + "Wire Bits": 1764125, "Public Wires": 21374, "Public Wire Bits": 21374, - "Total Cells": 1582560, + "Total Cells": 1582043, "MUX": 674460, "XOR": 11355, - "OR": 372660, - "AND": 133287, - "NOT": 170213, + "OR": 372243, + "AND": 133165, + "NOT": 170235, "DFFs": [ "$_DFF_P_ 182478" ], @@ -771,16 +771,16 @@ "Average Path": 7, "Estimated LUTs": 220799, "Total Node": 118082, - "Wires": 409089, - "Wire Bits": 518066, + "Wires": 406966, + "Wire Bits": 520594, "Public Wires": 15922, "Public Wire Bits": 15922, - "Total Cells": 447939, + "Total Cells": 449970, "MUX": 166506, "XOR": 15487, - "OR": 47217, - "AND": 69505, - "NOT": 27338, + "OR": 47344, + "AND": 71232, + "NOT": 27515, "DFFs": [ "$_DFF_P_ 85355" ], @@ -1052,18 +1052,18 @@ "Average Path": 7, "Estimated LUTs": 978864, "Total Node": 470749, - "Wires": 1041547, - "Wire Bits": 1477905, + "Wires": 1043019, + "Wire Bits": 1480869, "Public Wires": 48488, "Public Wire Bits": 48488, - "Total Cells": 1221220, - "MUX": 520433, + "Total Cells": 1223366, + "MUX": 521321, "XOR": 866, - "OR": 290609, - "AND": 105879, - "NOT": 133164, + "OR": 291278, + "AND": 105886, + "NOT": 133475, "DFFs": [ - "$_DFF_P_ 146385" + "$_DFF_P_ 146656" ], "adder": 14100, "dual_port_ram": 8440, @@ -1192,16 +1192,16 @@ "Average Path": 6, "Estimated LUTs": 73057, "Total Node": 30337, - "Wires": 193579, - "Wire Bits": 230094, + "Wires": 193438, + "Wire Bits": 229852, "Public Wires": 3526, "Public Wire Bits": 3526, - "Total Cells": 170045, + "Total Cells": 169643, "MUX": 78058, "XOR": 1622, - "OR": 15513, - "AND": 6996, - "NOT": 5017, + "OR": 15233, + "AND": 6981, + "NOT": 4910, "DFFs": [ "$_DFF_P_ 48086" ], @@ -1559,14 +1559,14 @@ "Average Path": 3, "Estimated LUTs": 317664, "Total Node": 182209, - "Wires": 423561, - "Wire Bits": 524360, + "Wires": 423573, + "Wire Bits": 524372, "Public Wires": 26885, "Public Wire Bits": 26885, - "Total Cells": 457419, + "Total Cells": 457440, "MUX": 184125, "XOR": 6124, - "OR": 99475, + "OR": 99496, "AND": 30644, "NOT": 43331, "DFFs": [ @@ -1705,16 +1705,16 @@ "Average Path": 9, "Estimated LUTs": 166920, "Total Node": 71396, - "Wires": 345493, - "Wire Bits": 454483, + "Wires": 345479, + "Wire Bits": 454521, "Public Wires": 13335, "Public Wire Bits": 13335, - "Total Cells": 325382, + "Total Cells": 325197, "MUX": 128624, "XOR": 5061, - "OR": 42993, - "AND": 21797, - "NOT": 16573, + "OR": 42978, + "AND": 21783, + "NOT": 16417, "DFFs": [ "$_DFF_P_ 84542" ], @@ -1940,16 +1940,16 @@ "Average Path": 8, "Estimated LUTs": 204194, "Total Node": 101714, - "Wires": 290978, - "Wire Bits": 368984, + "Wires": 290853, + "Wire Bits": 368525, "Public Wires": 15580, "Public Wire Bits": 15580, - "Total Cells": 306137, + "Total Cells": 305965, "MUX": 134400, "XOR": 487, - "OR": 58465, - "AND": 22224, - "NOT": 27334, + "OR": 58455, + "AND": 22211, + "NOT": 27185, "DFFs": [ "$_DFF_P_ 50694" ], diff --git a/parmys/regression_test/benchmark/task/koios/koios_proxy_no_hb/synthesis_result.json b/parmys/regression_test/benchmark/task/koios/koios_proxy_no_hb/synthesis_result.json index faa618902ce..0616a024c6c 100644 --- a/parmys/regression_test/benchmark/task/koios/koios_proxy_no_hb/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/koios/koios_proxy_no_hb/synthesis_result.json @@ -363,16 +363,16 @@ "Average Path": 10, "Estimated LUTs": 269751, "Total Node": 155595, - "Wires": 785203, - "Wire Bits": 923436, + "Wires": 785194, + "Wire Bits": 923217, "Public Wires": 25513, "Public Wire Bits": 25513, - "Total Cells": 627393, + "Total Cells": 627342, "MUX": 229921, "XOR": 10865, - "OR": 50235, - "AND": 23398, - "NOT": 20964, + "OR": 50226, + "AND": 23334, + "NOT": 20986, "DFFs": [ "$_DFF_P_ 203463" ], @@ -526,16 +526,16 @@ "Average Path": 5, "Estimated LUTs": 1217802, "Total Node": 664917, - "Wires": 1306480, - "Wire Bits": 1765361, + "Wires": 1306054, + "Wire Bits": 1764428, "Public Wires": 21374, "Public Wire Bits": 21374, - "Total Cells": 1582848, + "Total Cells": 1582348, "MUX": 674460, "XOR": 11355, - "OR": 372949, - "AND": 133286, - "NOT": 170213, + "OR": 372549, + "AND": 133164, + "NOT": 170235, "DFFs": [ "$_DFF_P_ 182478" ], @@ -813,18 +813,18 @@ "Average Path": 6, "Estimated LUTs": 378985, "Total Node": 194726, - "Wires": 681769, - "Wire Bits": 913307, + "Wires": 674754, + "Wire Bits": 914754, "Public Wires": 22802, "Public Wire Bits": 22802, - "Total Cells": 774411, - "MUX": 290760, + "Total Cells": 774284, + "MUX": 290761, "XOR": 22527, - "OR": 96796, - "AND": 127745, - "NOT": 48460, + "OR": 95236, + "AND": 128999, + "NOT": 48637, "DFFs": [ - "$_DFF_P_ 126472" + "$_DFF_P_ 126473" ], "adder": 56986, "multiply": 265, @@ -833,6 +833,7 @@ "koios_proxy_no_hb/proxy.4/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios_proxy_no_hb/proxy.4/k6FracN10LB_mem20K_complexDSP_customSB_22nm", "architecture": "k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml", + "exit": 137, "warnings": [ "Ignoring module FpAddSub_b_dspchain because it contains processes (run 'proc' command first).", "Ignoring module FPAddSub_a_dspchain because it contains processes (run 'proc' command first).", @@ -1107,37 +1108,37 @@ "Ignoring module sigmoid because it contains processes (run 'proc' command first).", "Ignoring module tanh because it contains processes (run 'proc' command first)." ], - "elaboration_time(ms)": 2003.9, - "optimization_time(ms)": 12127.4, + "elaboration_time(ms)": 1167.7, + "optimization_time(ms)": 7367.2, "techmap_time(ms)": 6923.6, "synthesis_time(ms)": 21055.1, "Pi": 546, - "Po": 1846, - "logic element": 676917, - "Adder": 139378, - "Multiplier": 1792, - "Memory": 8440, - "generic logic size": 4, - "Longest Path": 1593, - "Average Path": 7, - "Estimated LUTs": 1739873, - "Total Node": 826527, - "Wires": 2262908, - "Wire Bits": 3140448, - "Public Wires": 56427, - "Public Wire Bits": 56427, - "Total Cells": 2632946, - "MUX": 1053815, - "XOR": 45940, - "OR": 486320, - "AND": 400142, - "NOT": 224448, - "DFFs": [ - "$_DFF_P_ 276197" - ], - "adder": 135852, - "dual_port_ram": 8440, - "multiply": 1792 + "Po": 1846, + "logic element": 676917, + "Adder": 139378, + "Multiplier": 1792, + "Memory": 8440, + "generic logic size": 4, + "Longest Path": 1593, + "Average Path": 7, + "Estimated LUTs": 1739873, + "Total Node": 826527, + "Wires": 2251428, + "Wire Bits": 3148026, + "Public Wires": 56427, + "Public Wire Bits": 56427, + "Total Cells": 2639757, + "MUX": 1053787, + "XOR": 45940, + "OR": 487146, + "AND": 405322, + "NOT": 225295, + "DFFs": [ + "$_DFF_P_ 276183" + ], + "adder": 135852, + "dual_port_ram": 8440, + "multiply": 1792 }, "koios_proxy_no_hb/proxy.5/k6FracN10LB_mem20K_complexDSP_customSB_22nm": { "test_name": "koios_proxy_no_hb/proxy.5/k6FracN10LB_mem20K_complexDSP_customSB_22nm", @@ -1261,16 +1262,16 @@ "Average Path": 6, "Estimated LUTs": 73057, "Total Node": 30337, - "Wires": 193617, - "Wire Bits": 230171, + "Wires": 193426, + "Wire Bits": 229898, "Public Wires": 3526, "Public Wire Bits": 3526, - "Total Cells": 170104, + "Total Cells": 169677, "MUX": 78058, "XOR": 1622, - "OR": 15572, - "AND": 6996, - "NOT": 5017, + "OR": 15266, + "AND": 6982, + "NOT": 4910, "DFFs": [ "$_DFF_P_ 48086" ], @@ -1633,14 +1634,14 @@ "Average Path": 3, "Estimated LUTs": 321954, "Total Node": 191267, - "Wires": 477724, - "Wire Bits": 574751, + "Wires": 477651, + "Wire Bits": 574678, "Public Wires": 17265, "Public Wire Bits": 17265, - "Total Cells": 496751, + "Total Cells": 496669, "MUX": 203749, "XOR": 6124, - "OR": 91414, + "OR": 91332, "AND": 30644, "NOT": 43331, "DFFs": [ @@ -1890,16 +1891,16 @@ "Average Path": 9, "Estimated LUTs": 309336, "Total Node": 140372, - "Wires": 588420, - "Wire Bits": 804719, + "Wires": 584554, + "Wire Bits": 805743, "Public Wires": 19527, "Public Wire Bits": 19527, - "Total Cells": 616310, + "Total Cells": 614269, "MUX": 240512, "XOR": 11397, - "OR": 84658, - "AND": 74212, - "NOT": 35581, + "OR": 83221, + "AND": 73764, + "NOT": 35425, "DFFs": [ "$_DFF_P_ 121550" ], @@ -2130,16 +2131,16 @@ "Average Path": 8, "Estimated LUTs": 208086, "Total Node": 110213, - "Wires": 340422, - "Wire Bits": 418474, + "Wires": 340428, + "Wire Bits": 418320, "Public Wires": 6552, "Public Wire Bits": 6552, - "Total Cells": 344137, + "Total Cells": 344012, "MUX": 149527, "XOR": 487, - "OR": 58564, - "AND": 22226, - "NOT": 27334, + "OR": 58602, + "AND": 22212, + "NOT": 27185, "DFFs": [ "$_DFF_P_ 65821" ], diff --git a/parmys/regression_test/benchmark/task/large/synthesis_result.json b/parmys/regression_test/benchmark/task/large/synthesis_result.json index c9f4adc0164..e3c7eee50f8 100644 --- a/parmys/regression_test/benchmark/task/large/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/large/synthesis_result.json @@ -130,16 +130,16 @@ "Average Path": 8, "Estimated LUTs": 16199, "Total Node": 4054, - "Wires": 23585, - "Wire Bits": 27679, + "Wires": 23584, + "Wire Bits": 27678, "Public Wires": 1528, "Public Wire Bits": 1528, - "Total Cells": 25889, + "Total Cells": 25885, "MUX": 16499, "XOR": 407, - "OR": 2363, - "AND": 1366, - "NOT": 677, + "OR": 2356, + "AND": 1368, + "NOT": 678, "DFFs": [ "$_DFF_P_ 3001" ], @@ -236,16 +236,16 @@ "Average Path": 8, "Estimated LUTs": 51808, "Total Node": 9115, - "Wires": 36804, - "Wire Bits": 177752, + "Wires": 36947, + "Wire Bits": 177934, "Public Wires": 969, "Public Wire Bits": 969, - "Total Cells": 104329, + "Total Cells": 104312, "MUX": 12179, "XOR": 1091, - "OR": 44631, - "AND": 34525, - "NOT": 4501, + "OR": 44639, + "AND": 34509, + "NOT": 4492, "DFFs": [ "$_DFF_P_ 5132" ], @@ -312,16 +312,16 @@ "Average Path": 4, "Estimated LUTs": 2406, "Total Node": 973, - "Wires": 4530, - "Wire Bits": 6664, + "Wires": 4399, + "Wire Bits": 6533, "Public Wires": 529, "Public Wire Bits": 529, - "Total Cells": 5514, + "Total Cells": 5373, "MUX": 1998, "XOR": 228, - "OR": 856, - "AND": 928, - "NOT": 459, + "OR": 866, + "AND": 963, + "NOT": 273, "DFFs": [ "$_DFF_P_ 862" ], @@ -399,8 +399,8 @@ "Average Path": 3, "Estimated LUTs": 3361, "Total Node": 1319, - "Wires": 1972, - "Wire Bits": 5439, + "Wires": 1973, + "Wire Bits": 5446, "Public Wires": 190, "Public Wire Bits": 190, "Total Cells": 4292, @@ -464,8 +464,8 @@ "Average Path": 9, "Estimated LUTs": 38136, "Total Node": 10576, - "Wires": 27447, - "Wire Bits": 49545, + "Wires": 27448, + "Wire Bits": 49554, "Public Wires": 186, "Public Wire Bits": 186, "Total Cells": 34416, @@ -571,8 +571,8 @@ "Average Path": 4, "Estimated LUTs": 2883573, "Total Node": 3407861, - "Wires": 4815960, - "Wire Bits": 4930094, + "Wires": 4815963, + "Wire Bits": 4930109, "Public Wires": 4456472, "Public Wire Bits": 4456472, "Total Cells": 2725962, @@ -710,16 +710,16 @@ "Average Path": 5, "Estimated LUTs": 117248, "Total Node": 34253, - "Wires": 138485, - "Wire Bits": 439779, + "Wires": 137884, + "Wire Bits": 440449, "Public Wires": 17074, "Public Wire Bits": 17074, - "Total Cells": 276817, + "Total Cells": 277568, "MUX": 54769, "XOR": 2711, - "OR": 89057, - "AND": 83808, - "NOT": 8071, + "OR": 89009, + "AND": 83955, + "NOT": 8723, "DFFs": [ "$_DFF_P_ 19695" ], @@ -856,16 +856,16 @@ "Average Path": 5, "Estimated LUTs": 229187, "Total Node": 64719, - "Wires": 265482, - "Wire Bits": 861875, + "Wires": 264332, + "Wire Bits": 863207, "Public Wires": 32666, "Public Wire Bits": 32666, - "Total Cells": 540618, + "Total Cells": 542139, "MUX": 106133, "XOR": 4801, - "OR": 176646, - "AND": 165180, - "NOT": 14958, + "OR": 176568, + "AND": 165489, + "NOT": 16248, "DFFs": [ "$_DFF_P_ 37302" ], @@ -1786,8 +1786,8 @@ "Average Path": 1, "Estimated LUTs": 5594, "Total Node": 4179, - "Wires": 6441, - "Wire Bits": 10429, + "Wires": 6445, + "Wire Bits": 10441, "Public Wires": 211, "Public Wire Bits": 211, "Total Cells": 9958, @@ -5711,16 +5711,16 @@ "Average Path": 6, "Estimated LUTs": 6581, "Total Node": 3022, - "Wires": 12850, - "Wire Bits": 27185, + "Wires": 12843, + "Wire Bits": 27160, "Public Wires": 3798, "Public Wire Bits": 3798, - "Total Cells": 21025, + "Total Cells": 21001, "MUX": 7919, "XOR": 195, - "OR": 3180, - "AND": 5182, - "NOT": 294, + "OR": 3153, + "AND": 5157, + "NOT": 322, "DFFs": [ "$_DFF_P_ 2151" ], @@ -5773,16 +5773,16 @@ "Average Path": 5, "Estimated LUTs": 2565, "Total Node": 1142, - "Wires": 4487, - "Wire Bits": 9878, + "Wires": 4486, + "Wire Bits": 9886, "Public Wires": 754, "Public Wire Bits": 754, - "Total Cells": 7790, + "Total Cells": 7803, "MUX": 2953, "XOR": 41, "OR": 1427, - "AND": 1829, - "NOT": 157, + "AND": 1828, + "NOT": 171, "DFFs": [ "$_DFF_P_ 886" ], @@ -5895,15 +5895,15 @@ "Estimated LUTs": 4344, "Total Node": 1461, "Wires": 6405, - "Wire Bits": 12435, + "Wire Bits": 12439, "Public Wires": 1044, "Public Wire Bits": 1044, - "Total Cells": 9094, + "Total Cells": 9100, "MUX": 3445, "XOR": 59, - "OR": 2148, - "AND": 1680, - "NOT": 526, + "OR": 2151, + "AND": 1682, + "NOT": 527, "DFFs": [ "$_DFF_P_ 675" ], @@ -5981,8 +5981,8 @@ "Average Path": 3, "Estimated LUTs": 1716, "Total Node": 946, - "Wires": 4520, - "Wire Bits": 6774, + "Wires": 4521, + "Wire Bits": 6777, "Public Wires": 619, "Public Wire Bits": 619, "Total Cells": 4421, @@ -6125,13 +6125,13 @@ "Estimated LUTs": 1787, "Total Node": 805, "Wires": 2325, - "Wire Bits": 3625, + "Wire Bits": 3628, "Public Wires": 324, "Public Wire Bits": 324, - "Total Cells": 2980, + "Total Cells": 2962, "MUX": 938, "XOR": 138, - "OR": 872, + "OR": 854, "AND": 408, "NOT": 232, "DFFs": [ @@ -6231,16 +6231,16 @@ "Average Path": 7, "Estimated LUTs": 6838, "Total Node": 4366, - "Wires": 23424, - "Wire Bits": 26475, + "Wires": 23401, + "Wire Bits": 26319, "Public Wires": 467, "Public Wire Bits": 467, - "Total Cells": 23087, + "Total Cells": 22949, "MUX": 6514, "XOR": 254, - "OR": 745, - "AND": 1273, - "NOT": 435, + "OR": 726, + "AND": 1172, + "NOT": 417, "DFFs": [ "$_DFF_P_ 11143" ], @@ -6306,8 +6306,8 @@ "Average Path": 8, "Estimated LUTs": 9070, "Total Node": 5286, - "Wires": 35627, - "Wire Bits": 38178, + "Wires": 35628, + "Wire Bits": 38181, "Public Wires": 237, "Public Wire Bits": 237, "Total Cells": 24423, diff --git a/parmys/regression_test/benchmark/task/micro/synthesis_result.json b/parmys/regression_test/benchmark/task/micro/synthesis_result.json index 1968e99a682..a53cf006365 100644 --- a/parmys/regression_test/benchmark/task/micro/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/micro/synthesis_result.json @@ -530,14 +530,14 @@ "Average Path": 5, "Estimated LUTs": 714, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -608,14 +608,14 @@ "Average Path": 5, "Estimated LUTs": 693, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -3929,8 +3929,8 @@ "Average Path": 3, "Estimated LUTs": 53, "Total Node": 10, - "Wires": 46, - "Wire Bits": 130, + "Wires": 45, + "Wire Bits": 128, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 61, @@ -3960,8 +3960,8 @@ "Average Path": 3, "Estimated LUTs": 37, "Total Node": 10, - "Wires": 46, - "Wire Bits": 130, + "Wires": 45, + "Wire Bits": 128, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 61, @@ -3991,8 +3991,8 @@ "Average Path": 3, "Estimated LUTs": 37, "Total Node": 10, - "Wires": 46, - "Wire Bits": 130, + "Wires": 45, + "Wire Bits": 128, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 61, @@ -4020,8 +4020,8 @@ "Average Path": 3, "Estimated LUTs": 10, "Total Node": 10, - "Wires": 46, - "Wire Bits": 130, + "Wires": 45, + "Wire Bits": 128, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 61, @@ -4052,15 +4052,15 @@ "Average Path": 5, "Estimated LUTs": 7, "Total Node": 19, - "Wires": 53, - "Wire Bits": 59, + "Wires": 55, + "Wire Bits": 62, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 26, + "Total Cells": 33, "MUX": 4, - "OR": 1, - "AND": 3, - "NOT": 1, + "OR": 3, + "AND": 4, + "NOT": 5, "adder": 17 }, "micro/bm_DL_BCD_adder/k6_N10_40nm": { @@ -4085,16 +4085,16 @@ "Average Path": 4, "Estimated LUTs": 31, "Total Node": 27, - "Wires": 49, - "Wire Bits": 61, + "Wires": 50, + "Wire Bits": 60, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 42, + "Total Cells": 48, "MUX": 18, "XOR": 15, - "OR": 1, - "AND": 5, - "NOT": 3 + "OR": 3, + "AND": 6, + "NOT": 6 }, "micro/bm_DL_BCD_adder/k6_N10_mem32K_40nm": { "test_name": "micro/bm_DL_BCD_adder/k6_N10_mem32K_40nm", @@ -4118,16 +4118,16 @@ "Average Path": 4, "Estimated LUTs": 31, "Total Node": 27, - "Wires": 49, - "Wire Bits": 61, + "Wires": 50, + "Wire Bits": 60, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 42, + "Total Cells": 48, "MUX": 18, "XOR": 15, - "OR": 1, - "AND": 5, - "NOT": 3 + "OR": 3, + "AND": 6, + "NOT": 6 }, "micro/bm_DL_BCD_adder/no_arch": { "test_name": "micro/bm_DL_BCD_adder/no_arch", @@ -4149,16 +4149,16 @@ "Average Path": 4, "Estimated LUTs": 27, "Total Node": 27, - "Wires": 49, - "Wire Bits": 61, + "Wires": 50, + "Wire Bits": 60, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 42, + "Total Cells": 48, "MUX": 18, "XOR": 15, - "OR": 1, - "AND": 5, - "NOT": 3 + "OR": 3, + "AND": 6, + "NOT": 6 }, "micro/bm_DL_behavioural_full_adder/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/bm_DL_behavioural_full_adder/k6_frac_N10_frac_chain_mem32K_40nm", @@ -5133,14 +5133,14 @@ "Average Path": 3, "Estimated LUTs": 644, "Total Node": 218, - "Wires": 1458, - "Wire Bits": 1955, + "Wires": 1459, + "Wire Bits": 1956, "Public Wires": 814, "Public Wire Bits": 814, - "Total Cells": 1386, + "Total Cells": 1387, "XNOR": 63, "XOR": 191, - "OR": 256, + "OR": 257, "AND": 310, "NOT": 133, "DFFs": [ @@ -5170,15 +5170,15 @@ "Average Path": 3, "Estimated LUTs": 623, "Total Node": 307, - "Wires": 1600, - "Wire Bits": 2254, + "Wires": 1633, + "Wire Bits": 2225, "Public Wires": 751, "Public Wire Bits": 751, - "Total Cells": 1746, + "Total Cells": 1748, "MUX": 267, "XNOR": 63, - "XOR": 377, - "OR": 258, + "XOR": 378, + "OR": 259, "AND": 311, "NOT": 135, "DFFs": [ @@ -5207,15 +5207,15 @@ "Average Path": 3, "Estimated LUTs": 623, "Total Node": 307, - "Wires": 1600, - "Wire Bits": 2254, + "Wires": 1633, + "Wire Bits": 2225, "Public Wires": 751, "Public Wire Bits": 751, - "Total Cells": 1746, + "Total Cells": 1748, "MUX": 267, "XNOR": 63, - "XOR": 377, - "OR": 258, + "XOR": 378, + "OR": 259, "AND": 311, "NOT": 135, "DFFs": [ @@ -5242,15 +5242,15 @@ "Average Path": 3, "Estimated LUTs": 307, "Total Node": 307, - "Wires": 1600, - "Wire Bits": 2254, + "Wires": 1633, + "Wire Bits": 2225, "Public Wires": 751, "Public Wire Bits": 751, - "Total Cells": 1746, + "Total Cells": 1748, "MUX": 267, "XNOR": 63, - "XOR": 377, - "OR": 258, + "XOR": 378, + "OR": 259, "AND": 311, "NOT": 135, "DFFs": [ @@ -5895,7 +5895,7 @@ "Estimated LUTs": 407, "Total Node": 264, "Wires": 739, - "Wire Bits": 1045, + "Wire Bits": 1076, "Public Wires": 322, "Public Wire Bits": 322, "Total Cells": 943, @@ -5923,7 +5923,7 @@ "Estimated LUTs": 407, "Total Node": 264, "Wires": 739, - "Wire Bits": 1045, + "Wire Bits": 1076, "Public Wires": 322, "Public Wire Bits": 322, "Total Cells": 943, @@ -5949,7 +5949,7 @@ "Estimated LUTs": 264, "Total Node": 264, "Wires": 739, - "Wire Bits": 1045, + "Wire Bits": 1076, "Public Wires": 322, "Public Wire Bits": 322, "Total Cells": 943, @@ -6633,14 +6633,14 @@ "Average Path": 6, "Estimated LUTs": 1605, "Total Node": 1595, - "Wires": 2628, - "Wire Bits": 3353, + "Wires": 2631, + "Wire Bits": 3356, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -6701,14 +6701,14 @@ "Average Path": 6, "Estimated LUTs": 1595, "Total Node": 1595, - "Wires": 2628, - "Wire Bits": 3353, + "Wires": 2631, + "Wire Bits": 3356, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -7474,8 +7474,8 @@ "Average Path": 4, "Estimated LUTs": 76, "Total Node": 17, - "Wires": 53, - "Wire Bits": 178, + "Wires": 52, + "Wire Bits": 176, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 74, @@ -7508,8 +7508,8 @@ "Average Path": 4, "Estimated LUTs": 58, "Total Node": 17, - "Wires": 53, - "Wire Bits": 178, + "Wires": 52, + "Wire Bits": 176, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 74, @@ -7542,8 +7542,8 @@ "Average Path": 4, "Estimated LUTs": 58, "Total Node": 17, - "Wires": 53, - "Wire Bits": 178, + "Wires": 52, + "Wire Bits": 176, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 74, @@ -7574,8 +7574,8 @@ "Average Path": 4, "Estimated LUTs": 17, "Total Node": 17, - "Wires": 53, - "Wire Bits": 178, + "Wires": 52, + "Wire Bits": 176, "Public Wires": 11, "Public Wire Bits": 11, "Total Cells": 74, @@ -8032,14 +8032,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "micro/multiply_hard_block/k6_N10_mem32K_40nm": { "test_name": "micro/multiply_hard_block/k6_N10_mem32K_40nm", @@ -8058,14 +8058,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "micro/multiply_hard_block/no_arch": { "test_name": "micro/multiply_hard_block/no_arch", @@ -8076,14 +8076,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "micro/parameter_2/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "micro/parameter_2/k6_frac_N10_frac_chain_mem32K_40nm", diff --git a/parmys/regression_test/benchmark/task/mixing_optimization/config_file_half/synthesis_result.json b/parmys/regression_test/benchmark/task/mixing_optimization/config_file_half/synthesis_result.json index bd815de43c1..296cbd53d9f 100644 --- a/parmys/regression_test/benchmark/task/mixing_optimization/config_file_half/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/mixing_optimization/config_file_half/synthesis_result.json @@ -28,14 +28,14 @@ "Average Path": 4, "Estimated LUTs": 384, "Total Node": 354, - "Wires": 674, - "Wire Bits": 819, + "Wires": 675, + "Wire Bits": 820, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 678, + "Total Cells": 680, "MUX": 269, "XOR": 194, - "AND": 158, + "AND": 160, "DFFs": [ "$_DFF_P_ 55" ], @@ -72,14 +72,14 @@ "Average Path": 5, "Estimated LUTs": 714, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -398,14 +398,14 @@ "Average Path": 6, "Estimated LUTs": 719, "Total Node": 811, - "Wires": 1466, - "Wire Bits": 1784, + "Wires": 1468, + "Wire Bits": 1786, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 1401, + "Total Cells": 1403, "MUX": 570, "XOR": 405, - "AND": 271, + "AND": 273, "DFFs": [ "$_DFF_P_ 46" ], @@ -436,14 +436,14 @@ "Average Path": 6, "Estimated LUTs": 1605, "Total Node": 1595, - "Wires": 2628, - "Wire Bits": 3353, + "Wires": 2631, + "Wire Bits": 3356, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -489,14 +489,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "config_file_half/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "config_file_half/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -596,14 +596,14 @@ "Average Path": 4, "Estimated LUTs": 378, "Total Node": 354, - "Wires": 674, - "Wire Bits": 819, + "Wires": 675, + "Wire Bits": 820, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 678, + "Total Cells": 680, "MUX": 269, "XOR": 194, - "AND": 158, + "AND": 160, "DFFs": [ "$_DFF_P_ 55" ], @@ -638,14 +638,14 @@ "Average Path": 4, "Estimated LUTs": 373, "Total Node": 354, - "Wires": 674, - "Wire Bits": 819, + "Wires": 675, + "Wire Bits": 820, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 678, + "Total Cells": 680, "MUX": 269, "XOR": 194, - "AND": 158, + "AND": 160, "DFFs": [ "$_DFF_P_ 55" ], @@ -946,14 +946,14 @@ "Average Path": 6, "Estimated LUTs": 907, "Total Node": 899, - "Wires": 1628, - "Wire Bits": 2034, + "Wires": 1630, + "Wire Bits": 2036, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 1757, + "Total Cells": 1759, "MUX": 834, "XOR": 597, - "AND": 277, + "AND": 279, "DFFs": [ "$_DFF_P_ 46" ], @@ -981,14 +981,14 @@ "Average Path": 6, "Estimated LUTs": 906, "Total Node": 899, - "Wires": 1628, - "Wire Bits": 2034, + "Wires": 1630, + "Wire Bits": 2036, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 1757, + "Total Cells": 1759, "MUX": 834, "XOR": 597, - "AND": 277, + "AND": 279, "DFFs": [ "$_DFF_P_ 46" ], diff --git a/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_full/synthesis_result.json b/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_full/synthesis_result.json index 4f9974a0a0c..92debe8a3bd 100644 --- a/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_full/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_full/synthesis_result.json @@ -67,14 +67,14 @@ "Average Path": 5, "Estimated LUTs": 714, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -410,14 +410,14 @@ "Average Path": 6, "Estimated LUTs": 1605, "Total Node": 1595, - "Wires": 2628, - "Wire Bits": 3353, + "Wires": 2631, + "Wire Bits": 3356, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -459,14 +459,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_full/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "mults_auto_full/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -953,14 +953,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_full/multiply_hard_block/k6_N10_mem32K_40nm": { "test_name": "mults_auto_full/multiply_hard_block/k6_N10_mem32K_40nm", @@ -976,14 +976,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_full/twobits_arithmetic_multiply/k6_frac_N10_mem32K_40nm": { "test_name": "mults_auto_full/twobits_arithmetic_multiply/k6_frac_N10_mem32K_40nm", diff --git a/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_half/synthesis_result.json b/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_half/synthesis_result.json index ddb09fdd857..e203b322e51 100644 --- a/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_half/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_half/synthesis_result.json @@ -28,14 +28,14 @@ "Average Path": 4, "Estimated LUTs": 717, "Total Node": 687, - "Wires": 787, - "Wire Bits": 947, + "Wires": 788, + "Wire Bits": 948, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 678, + "Total Cells": 680, "MUX": 269, "XOR": 194, - "AND": 158, + "AND": 160, "DFFs": [ "$_DFF_P_ 55" ], @@ -69,14 +69,14 @@ "Average Path": 5, "Estimated LUTs": 714, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -389,14 +389,14 @@ "Average Path": 6, "Estimated LUTs": 1400, "Total Node": 1492, - "Wires": 1628, - "Wire Bits": 1946, + "Wires": 1630, + "Wire Bits": 1948, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 1401, + "Total Cells": 1403, "MUX": 570, "XOR": 405, - "AND": 271, + "AND": 273, "DFFs": [ "$_DFF_P_ 46" ], @@ -425,14 +425,14 @@ "Average Path": 6, "Estimated LUTs": 1605, "Total Node": 1595, - "Wires": 2628, - "Wire Bits": 3353, + "Wires": 2631, + "Wire Bits": 3356, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -474,14 +474,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_half/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "mults_auto_half/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -582,14 +582,14 @@ "Average Path": 4, "Estimated LUTs": 711, "Total Node": 687, - "Wires": 787, - "Wire Bits": 947, + "Wires": 788, + "Wire Bits": 948, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 678, + "Total Cells": 680, "MUX": 269, "XOR": 194, - "AND": 158, + "AND": 160, "DFFs": [ "$_DFF_P_ 55" ], @@ -621,14 +621,14 @@ "Average Path": 4, "Estimated LUTs": 706, "Total Node": 687, - "Wires": 787, - "Wire Bits": 947, + "Wires": 788, + "Wire Bits": 948, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 678, + "Total Cells": 680, "MUX": 269, "XOR": 194, - "AND": 158, + "AND": 160, "DFFs": [ "$_DFF_P_ 55" ], @@ -914,14 +914,14 @@ "Average Path": 6, "Estimated LUTs": 1588, "Total Node": 1580, - "Wires": 1790, - "Wire Bits": 2196, + "Wires": 1792, + "Wire Bits": 2198, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 1757, + "Total Cells": 1759, "MUX": 834, "XOR": 597, - "AND": 277, + "AND": 279, "DFFs": [ "$_DFF_P_ 46" ], @@ -947,14 +947,14 @@ "Average Path": 6, "Estimated LUTs": 1587, "Total Node": 1580, - "Wires": 1790, - "Wire Bits": 2196, + "Wires": 1792, + "Wire Bits": 2198, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 1757, + "Total Cells": 1759, "MUX": 834, "XOR": 597, - "AND": 277, + "AND": 279, "DFFs": [ "$_DFF_P_ 46" ], @@ -974,14 +974,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_half/multiply_hard_block/k6_N10_mem32K_40nm": { "test_name": "mults_auto_half/multiply_hard_block/k6_N10_mem32K_40nm", @@ -997,14 +997,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_half/twobits_arithmetic_multiply/k6_frac_N10_mem32K_40nm": { "test_name": "mults_auto_half/twobits_arithmetic_multiply/k6_frac_N10_mem32K_40nm", diff --git a/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_none/synthesis_result.json b/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_none/synthesis_result.json index 3ef02403e49..a55448e2339 100644 --- a/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_none/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/mixing_optimization/mults_auto_none/synthesis_result.json @@ -27,14 +27,14 @@ "Average Path": 5, "Estimated LUTs": 1394, "Total Node": 1362, - "Wires": 1082, - "Wire Bits": 1397, + "Wires": 1083, + "Wire Bits": 1398, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -67,14 +67,14 @@ "Average Path": 5, "Estimated LUTs": 714, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -380,14 +380,14 @@ "Average Path": 6, "Estimated LUTs": 2780, "Total Node": 2869, - "Wires": 2466, - "Wire Bits": 3012, + "Wires": 2468, + "Wire Bits": 3014, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2642, + "Total Cells": 2644, "MUX": 1140, "XOR": 810, - "AND": 540, + "AND": 542, "DFFs": [ "$_DFF_P_ 46" ], @@ -415,14 +415,14 @@ "Average Path": 6, "Estimated LUTs": 1605, "Total Node": 1595, - "Wires": 2628, - "Wire Bits": 3353, + "Wires": 2631, + "Wire Bits": 3356, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -464,14 +464,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_none/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "mults_auto_none/twobits_arithmetic_multiply/k6_frac_N10_frac_chain_mem32K_40nm", @@ -571,14 +571,14 @@ "Average Path": 5, "Estimated LUTs": 1388, "Total Node": 1362, - "Wires": 1082, - "Wire Bits": 1397, + "Wires": 1083, + "Wire Bits": 1398, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -608,14 +608,14 @@ "Average Path": 5, "Estimated LUTs": 1383, "Total Node": 1362, - "Wires": 1082, - "Wire Bits": 1397, + "Wires": 1083, + "Wire Bits": 1398, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -887,14 +887,14 @@ "Average Path": 6, "Estimated LUTs": 2968, "Total Node": 2957, - "Wires": 2628, - "Wire Bits": 3275, + "Wires": 2631, + "Wire Bits": 3278, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -918,14 +918,14 @@ "Average Path": 6, "Estimated LUTs": 2967, "Total Node": 2957, - "Wires": 2628, - "Wire Bits": 3275, + "Wires": 2631, + "Wire Bits": 3278, "Public Wires": 146, "Public Wire Bits": 146, - "Total Cells": 2999, + "Total Cells": 3001, "MUX": 1404, "XOR": 1002, - "AND": 547, + "AND": 549, "DFFs": [ "$_DFF_P_ 46" ] @@ -944,14 +944,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_none/multiply_hard_block/k6_N10_mem32K_40nm": { "test_name": "mults_auto_none/multiply_hard_block/k6_N10_mem32K_40nm", @@ -967,14 +967,14 @@ "Average Path": 4, "Estimated LUTs": 18, "Total Node": 18, - "Wires": 24, - "Wire Bits": 26, + "Wires": 26, + "Wire Bits": 28, "Public Wires": 16, "Public Wire Bits": 16, - "Total Cells": 18, + "Total Cells": 20, "MUX": 2, "XOR": 4, - "AND": 12 + "AND": 14 }, "mults_auto_none/twobits_arithmetic_multiply/k6_frac_N10_mem32K_40nm": { "test_name": "mults_auto_none/twobits_arithmetic_multiply/k6_frac_N10_mem32K_40nm", diff --git a/parmys/regression_test/benchmark/task/operators/synthesis_result.json b/parmys/regression_test/benchmark/task/operators/synthesis_result.json index b99a53d5197..631b4a6c938 100644 --- a/parmys/regression_test/benchmark/task/operators/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/operators/synthesis_result.json @@ -559,16 +559,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 15, + "Wires": 13, + "Wire Bits": 13, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 10, + "Total Cells": 8, "MUX": 1, "XOR": 1, - "OR": 3, + "OR": 2, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -597,16 +597,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 15, + "Wires": 13, + "Wire Bits": 13, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 10, + "Total Cells": 8, "MUX": 1, "XOR": 1, - "OR": 3, + "OR": 2, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -635,16 +635,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 15, + "Wires": 13, + "Wire Bits": 13, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 10, + "Total Cells": 8, "MUX": 1, "XOR": 1, - "OR": 3, + "OR": 2, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -671,16 +671,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 15, + "Wires": 13, + "Wire Bits": 13, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 10, + "Total Cells": 8, "MUX": 1, "XOR": 1, - "OR": 3, + "OR": 2, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -709,16 +709,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 14, - "Wire Bits": 14, + "Wires": 12, + "Wire Bits": 12, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 9, + "Total Cells": 7, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 1, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -747,16 +747,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 14, - "Wire Bits": 14, + "Wires": 12, + "Wire Bits": 12, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 9, + "Total Cells": 7, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 1, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -785,16 +785,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 14, - "Wire Bits": 14, + "Wires": 12, + "Wire Bits": 12, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 9, + "Total Cells": 7, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 1, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -821,16 +821,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 14, - "Wire Bits": 14, + "Wires": 12, + "Wire Bits": 12, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 9, + "Total Cells": 7, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 1, "AND": 1, - "NOT": 3, + "NOT": 2, "DFFs": [ "$_DFF_P_ 1" ] @@ -859,16 +859,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 13, - "Wire Bits": 13, + "Wires": 15, + "Wire Bits": 15, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 8, + "Total Cells": 10, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 3, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -897,16 +897,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 13, - "Wire Bits": 13, + "Wires": 15, + "Wire Bits": 15, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 8, + "Total Cells": 10, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 3, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -935,16 +935,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 13, - "Wire Bits": 13, + "Wires": 15, + "Wire Bits": 15, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 8, + "Total Cells": 10, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 3, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -971,16 +971,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 13, - "Wire Bits": 13, + "Wires": 15, + "Wire Bits": 15, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 8, + "Total Cells": 10, "MUX": 1, "XOR": 1, - "OR": 2, + "OR": 3, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -1009,16 +1009,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 12, - "Wire Bits": 12, + "Wires": 14, + "Wire Bits": 14, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 7, + "Total Cells": 9, "MUX": 1, "XOR": 1, - "OR": 1, + "OR": 2, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -1047,16 +1047,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 12, - "Wire Bits": 12, + "Wires": 14, + "Wire Bits": 14, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 7, + "Total Cells": 9, "MUX": 1, "XOR": 1, - "OR": 1, + "OR": 2, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -1085,16 +1085,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 12, - "Wire Bits": 12, + "Wires": 14, + "Wire Bits": 14, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 7, + "Total Cells": 9, "MUX": 1, "XOR": 1, - "OR": 1, + "OR": 2, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -1121,16 +1121,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 12, - "Wire Bits": 12, + "Wires": 14, + "Wire Bits": 14, "Public Wires": 6, "Public Wire Bits": 6, - "Total Cells": 7, + "Total Cells": 9, "MUX": 1, "XOR": 1, - "OR": 1, + "OR": 2, "AND": 1, - "NOT": 2, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -3419,16 +3419,16 @@ "Average Path": 4, "Estimated LUTs": 7, "Total Node": 2, - "Wires": 183, - "Wire Bits": 628, + "Wires": 175, + "Wire Bits": 627, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 345, + "Total Cells": 339, "MUX": 40, "XOR": 53, - "OR": 75, - "AND": 129, - "NOT": 40, + "OR": 70, + "AND": 126, + "NOT": 42, "DFFs": [ "$_DFF_P_ 8" ] @@ -3451,16 +3451,16 @@ "Average Path": 4, "Estimated LUTs": 6, "Total Node": 2, - "Wires": 183, - "Wire Bits": 628, + "Wires": 175, + "Wire Bits": 627, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 345, + "Total Cells": 339, "MUX": 40, "XOR": 53, - "OR": 75, - "AND": 129, - "NOT": 40, + "OR": 70, + "AND": 126, + "NOT": 42, "DFFs": [ "$_DFF_P_ 8" ] @@ -3483,16 +3483,16 @@ "Average Path": 4, "Estimated LUTs": 6, "Total Node": 2, - "Wires": 183, - "Wire Bits": 628, + "Wires": 175, + "Wire Bits": 627, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 345, + "Total Cells": 339, "MUX": 40, "XOR": 53, - "OR": 75, - "AND": 129, - "NOT": 40, + "OR": 70, + "AND": 126, + "NOT": 42, "DFFs": [ "$_DFF_P_ 8" ] @@ -3513,16 +3513,16 @@ "Average Path": 4, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 183, - "Wire Bits": 628, + "Wires": 175, + "Wire Bits": 627, "Public Wires": 19, "Public Wire Bits": 19, - "Total Cells": 345, + "Total Cells": 339, "MUX": 40, "XOR": 53, - "OR": 75, - "AND": 129, - "NOT": 40, + "OR": 70, + "AND": 126, + "NOT": 42, "DFFs": [ "$_DFF_P_ 8" ] @@ -3691,15 +3691,15 @@ "Average Path": 3, "Estimated LUTs": 4, "Total Node": 2, - "Wires": 44, - "Wire Bits": 87, + "Wires": 46, + "Wire Bits": 97, "Public Wires": 10, "Public Wire Bits": 10, - "Total Cells": 57, + "Total Cells": 62, "MUX": 9, - "XOR": 7, + "XOR": 9, "OR": 11, - "AND": 14, + "AND": 17, "NOT": 13, "DFFs": [ "$_DFF_P_ 3" @@ -3723,15 +3723,15 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 44, - "Wire Bits": 87, + "Wires": 46, + "Wire Bits": 97, "Public Wires": 10, "Public Wire Bits": 10, - "Total Cells": 57, + "Total Cells": 62, "MUX": 9, - "XOR": 7, + "XOR": 9, "OR": 11, - "AND": 14, + "AND": 17, "NOT": 13, "DFFs": [ "$_DFF_P_ 3" @@ -3755,15 +3755,15 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 44, - "Wire Bits": 87, + "Wires": 46, + "Wire Bits": 97, "Public Wires": 10, "Public Wire Bits": 10, - "Total Cells": 57, + "Total Cells": 62, "MUX": 9, - "XOR": 7, + "XOR": 9, "OR": 11, - "AND": 14, + "AND": 17, "NOT": 13, "DFFs": [ "$_DFF_P_ 3" @@ -3785,15 +3785,15 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 44, - "Wire Bits": 87, + "Wires": 46, + "Wire Bits": 97, "Public Wires": 10, "Public Wire Bits": 10, - "Total Cells": 57, + "Total Cells": 62, "MUX": 9, - "XOR": 7, + "XOR": 9, "OR": 11, - "AND": 14, + "AND": 17, "NOT": 13, "DFFs": [ "$_DFF_P_ 3" @@ -4108,16 +4108,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 19, - "Wire Bits": 23, + "Wires": 17, + "Wire Bits": 21, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 16, + "Total Cells": 14, "MUX": 1, "XOR": 2, - "OR": 4, + "OR": 3, "AND": 4, - "NOT": 4, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4146,16 +4146,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 19, - "Wire Bits": 23, + "Wires": 17, + "Wire Bits": 21, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 16, + "Total Cells": 14, "MUX": 1, "XOR": 2, - "OR": 4, + "OR": 3, "AND": 4, - "NOT": 4, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4184,16 +4184,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 19, - "Wire Bits": 23, + "Wires": 17, + "Wire Bits": 21, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 16, + "Total Cells": 14, "MUX": 1, "XOR": 2, - "OR": 4, + "OR": 3, "AND": 4, - "NOT": 4, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4220,16 +4220,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 19, - "Wire Bits": 23, + "Wires": 17, + "Wire Bits": 21, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 16, + "Total Cells": 14, "MUX": 1, "XOR": 2, - "OR": 4, + "OR": 3, "AND": 4, - "NOT": 4, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4258,16 +4258,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 18, - "Wire Bits": 22, + "Wires": 15, + "Wire Bits": 19, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 15, + "Total Cells": 12, "MUX": 1, "XOR": 2, - "OR": 3, - "AND": 4, - "NOT": 4, + "OR": 2, + "AND": 3, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4296,16 +4296,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 18, - "Wire Bits": 22, + "Wires": 15, + "Wire Bits": 19, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 15, + "Total Cells": 12, "MUX": 1, "XOR": 2, - "OR": 3, - "AND": 4, - "NOT": 4, + "OR": 2, + "AND": 3, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4334,16 +4334,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 18, - "Wire Bits": 22, + "Wires": 15, + "Wire Bits": 19, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 15, + "Total Cells": 12, "MUX": 1, "XOR": 2, - "OR": 3, - "AND": 4, - "NOT": 4, + "OR": 2, + "AND": 3, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4370,16 +4370,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 18, - "Wire Bits": 22, + "Wires": 15, + "Wire Bits": 19, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 15, + "Total Cells": 12, "MUX": 1, "XOR": 2, - "OR": 3, - "AND": 4, - "NOT": 4, + "OR": 2, + "AND": 3, + "NOT": 3, "DFFs": [ "$_DFF_P_ 1" ] @@ -4408,16 +4408,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 17, - "Wire Bits": 21, + "Wires": 19, + "Wire Bits": 23, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 14, + "Total Cells": 16, "MUX": 1, "XOR": 2, - "OR": 3, + "OR": 4, "AND": 4, - "NOT": 3, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4446,16 +4446,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 17, - "Wire Bits": 21, + "Wires": 19, + "Wire Bits": 23, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 14, + "Total Cells": 16, "MUX": 1, "XOR": 2, - "OR": 3, + "OR": 4, "AND": 4, - "NOT": 3, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4484,16 +4484,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 17, - "Wire Bits": 21, + "Wires": 19, + "Wire Bits": 23, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 14, + "Total Cells": 16, "MUX": 1, "XOR": 2, - "OR": 3, + "OR": 4, "AND": 4, - "NOT": 3, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4520,16 +4520,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 17, - "Wire Bits": 21, + "Wires": 19, + "Wire Bits": 23, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 14, + "Total Cells": 16, "MUX": 1, "XOR": 2, - "OR": 3, + "OR": 4, "AND": 4, - "NOT": 3, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4558,16 +4558,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 19, + "Wires": 18, + "Wire Bits": 22, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 12, + "Total Cells": 15, "MUX": 1, "XOR": 2, - "OR": 2, - "AND": 3, - "NOT": 3, + "OR": 3, + "AND": 4, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4596,16 +4596,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 19, + "Wires": 18, + "Wire Bits": 22, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 12, + "Total Cells": 15, "MUX": 1, "XOR": 2, - "OR": 2, - "AND": 3, - "NOT": 3, + "OR": 3, + "AND": 4, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4634,16 +4634,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 19, + "Wires": 18, + "Wire Bits": 22, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 12, + "Total Cells": 15, "MUX": 1, "XOR": 2, - "OR": 2, - "AND": 3, - "NOT": 3, + "OR": 3, + "AND": 4, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] @@ -4670,16 +4670,16 @@ "Average Path": 3, "Estimated LUTs": 2, "Total Node": 2, - "Wires": 15, - "Wire Bits": 19, + "Wires": 18, + "Wire Bits": 22, "Public Wires": 8, "Public Wire Bits": 8, - "Total Cells": 12, + "Total Cells": 15, "MUX": 1, "XOR": 2, - "OR": 2, - "AND": 3, - "NOT": 3, + "OR": 3, + "AND": 4, + "NOT": 4, "DFFs": [ "$_DFF_P_ 1" ] diff --git a/parmys/regression_test/benchmark/task/syntax/synthesis_result.json b/parmys/regression_test/benchmark/task/syntax/synthesis_result.json index 5c77ad2f651..8a198e0c1ce 100644 --- a/parmys/regression_test/benchmark/task/syntax/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/syntax/synthesis_result.json @@ -1393,16 +1393,16 @@ "Average Path": 2, "Estimated LUTs": 244, "Total Node": 217, - "Wires": 1491, - "Wire Bits": 1647, + "Wires": 1472, + "Wire Bits": 1654, "Public Wires": 322, "Public Wire Bits": 322, - "Total Cells": 971, + "Total Cells": 978, "MUX": 386, "XOR": 32, - "OR": 33, - "AND": 91, - "NOT": 99, + "OR": 34, + "AND": 96, + "NOT": 100, "DFFs": [ "$_DFF_P_ 193" ], @@ -2081,14 +2081,14 @@ "Average Path": 5, "Estimated LUTs": 693, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -2160,15 +2160,15 @@ "Average Path": 5, "Estimated LUTs": 693, "Total Node": 693, - "Wires": 1090, - "Wire Bits": 1403, + "Wires": 1091, + "Wire Bits": 1404, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1213, + "Total Cells": 1215, "MUX": 538, "XOR": 386, "OR": 8, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 55" ] @@ -2239,14 +2239,14 @@ "Average Path": 5, "Estimated LUTs": 693, "Total Node": 693, - "Wires": 1082, - "Wire Bits": 1394, + "Wires": 1083, + "Wire Bits": 1395, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1204, + "Total Cells": 1206, "MUX": 538, "XOR": 386, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 54" ] @@ -3294,15 +3294,15 @@ "Average Path": 5, "Estimated LUTs": 693, "Total Node": 693, - "Wires": 1090, - "Wire Bits": 1403, + "Wires": 1091, + "Wire Bits": 1404, "Public Wires": 127, "Public Wire Bits": 127, - "Total Cells": 1213, + "Total Cells": 1215, "MUX": 538, "XOR": 386, "OR": 8, - "AND": 226, + "AND": 228, "DFFs": [ "$_DFF_P_ 55" ] @@ -3672,15 +3672,15 @@ "Average Path": 4, "Estimated LUTs": 1475, "Total Node": 647, - "Wires": 3780, - "Wire Bits": 4165, + "Wires": 3776, + "Wire Bits": 4164, "Public Wires": 32, "Public Wire Bits": 32, - "Total Cells": 2948, + "Total Cells": 2949, "MUX": 1513, "XOR": 470, - "OR": 269, - "AND": 70, + "OR": 268, + "AND": 72, "NOT": 65, "DFFs": [ "$_DFF_P_ 517" @@ -3797,15 +3797,15 @@ "Average Path": 5, "Estimated LUTs": 1050, "Total Node": 1050, - "Wires": 3330, - "Wire Bits": 3847, + "Wires": 3337, + "Wire Bits": 3876, "Public Wires": 20, "Public Wire Bits": 20, - "Total Cells": 3513, + "Total Cells": 3518, "MUX": 1639, "XOR": 692, - "OR": 266, - "AND": 331, + "OR": 265, + "AND": 337, "NOT": 68, "DFFs": [ "$_DFF_P_ 517" @@ -3903,8 +3903,8 @@ "Average Path": 4, "Estimated LUTs": 6802, "Total Node": 939, - "Wires": 4686, - "Wire Bits": 14480, + "Wires": 4689, + "Wire Bits": 14487, "Public Wires": 51, "Public Wire Bits": 51, "Total Cells": 6551, @@ -4008,7 +4008,7 @@ "Estimated LUTs": 1934, "Total Node": 1934, "Wires": 5450, - "Wire Bits": 15654, + "Wire Bits": 15657, "Public Wires": 32, "Public Wire Bits": 32, "Total Cells": 8193, @@ -4345,15 +4345,15 @@ "Average Path": 4, "Estimated LUTs": 8744, "Total Node": 12840, - "Wires": 25838, - "Wire Bits": 30231, + "Wires": 25832, + "Wire Bits": 30207, "Public Wires": 25146, "Public Wire Bits": 25146, - "Total Cells": 25949, + "Total Cells": 25944, "MUX": 14, "XOR": 7, "OR": 8176, - "AND": 13384, + "AND": 13379, "NOT": 264, "DFFs": [ "$_DFF_P_ 4104" diff --git a/parmys/regression_test/benchmark/task/ultraembedded/synthesis_result.json b/parmys/regression_test/benchmark/task/ultraembedded/synthesis_result.json index 705f7c1d634..35fc0362bcc 100644 --- a/parmys/regression_test/benchmark/task/ultraembedded/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/ultraembedded/synthesis_result.json @@ -56,17 +56,17 @@ "generic logic size": 4, "Longest Path": 72, "Average Path": 4, - "Estimated LUTs": 1529, + "Estimated LUTs": 1517, "Total Node": 1023, - "Wires": 2656, - "Wire Bits": 3799, + "Wires": 2658, + "Wire Bits": 3780, "Public Wires": 415, "Public Wire Bits": 415, - "Total Cells": 3030, - "MUX": 985, + "Total Cells": 3034, + "MUX": 983, "XOR": 425, - "OR": 409, - "AND": 323, + "OR": 414, + "AND": 324, "NOT": 208, "DFFs": [ "$_DFF_P_ 445" @@ -112,26 +112,26 @@ "synthesis_time(ms)": 4.3, "Pi": 63, "Po": 187, - "logic element": 866, - "Adder": 434, + "logic element": 801, + "Adder": 359, "Memory": 32, "generic logic size": 4, "Longest Path": 109, "Average Path": 2, - "Estimated LUTs": 2183, - "Total Node": 1332, - "Wires": 4346, - "Wire Bits": 5972, - "Public Wires": 662, - "Public Wire Bits": 662, - "Total Cells": 4548, - "MUX": 1801, - "XOR": 20, - "OR": 891, - "AND": 465, - "NOT": 204, + "Estimated LUTs": 2118, + "Total Node": 1192, + "Wires": 4506, + "Wire Bits": 8715, + "Public Wires": 597, + "Public Wire Bits": 597, + "Total Cells": 5099, + "MUX": 2110, + "XOR": 34, + "OR": 906, + "AND": 538, + "NOT": 273, "DFFs": [ - "$_DFF_P_ 776" + "$_DFF_P_ 847" ], "adder": 359, "dual_port_ram": 32 @@ -180,14 +180,14 @@ "Average Path": 2, "Estimated LUTs": 2659, "Total Node": 1092, - "Wires": 4955, - "Wire Bits": 7419, + "Wires": 4952, + "Wire Bits": 7400, "Public Wires": 792, "Public Wire Bits": 792, - "Total Cells": 5993, + "Total Cells": 5992, "MUX": 1794, "XOR": 129, - "OR": 1348, + "OR": 1347, "AND": 1157, "NOT": 353, "DFFs": [ @@ -233,16 +233,16 @@ "Average Path": 4, "Estimated LUTs": 3309, "Total Node": 1108, - "Wires": 5388, - "Wire Bits": 8023, + "Wires": 5361, + "Wire Bits": 7965, "Public Wires": 459, "Public Wire Bits": 459, - "Total Cells": 6356, + "Total Cells": 6329, "MUX": 2960, - "XOR": 221, + "XOR": 189, "OR": 864, - "AND": 1010, - "NOT": 339, + "AND": 983, + "NOT": 371, "DFFs": [ "$_DFF_P_ 514" ], @@ -256,16 +256,6 @@ "warnings": [ "Replacing memory \\tx_valid_q with list of registers. See ../vtr_flow/benchmarks//ultraembedded/usb_uart_core.v:284", "Replacing memory \\tx_buffer_q with list of registers. See ../vtr_flow/benchmarks//ultraembedded/usb_uart_core.v:282", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", - "usb_uart_core.v:0 System task `$display' outside initial block is unsupported.", "Replacing memory \\setup_packet_q with list of registers. See ../vtr_flow/benchmarks//ultraembedded/usb_uart_core.v:1124", "Ignoring module usb_cdc_core because it contains processes (run 'proc' command first).", "Ignoring module ulpi_wrapper because it contains processes (run 'proc' command first).", @@ -324,19 +314,19 @@ "Adder": 189, "Memory": 16, "generic logic size": 4, - "Longest Path": 200, + "Longest Path": 171, "Average Path": 2, "Estimated LUTs": 2852, "Total Node": 1381, - "Wires": 3617, - "Wire Bits": 5284, + "Wires": 3621, + "Wire Bits": 5292, "Public Wires": 119, "Public Wire Bits": 119, - "Total Cells": 4099, + "Total Cells": 4101, "MUX": 1258, "XOR": 139, "OR": 1192, - "AND": 360, + "AND": 362, "NOT": 421, "DFFs": [ "$_DFF_P_ 524" diff --git a/parmys/regression_test/benchmark/task/vexriscv/synthesis_result.json b/parmys/regression_test/benchmark/task/vexriscv/synthesis_result.json index 055bc6d459c..f381e55300e 100644 --- a/parmys/regression_test/benchmark/task/vexriscv/synthesis_result.json +++ b/parmys/regression_test/benchmark/task/vexriscv/synthesis_result.json @@ -408,20 +408,20 @@ "Multiplier": 4, "Memory": 242, "generic logic size": 4, - "Longest Path": 836, + "Longest Path": 843, "Average Path": 4, - "Estimated LUTs": 8063, + "Estimated LUTs": 8043, "Total Node": 4065, - "Wires": 14711, - "Wire Bits": 20573, + "Wires": 14732, + "Wire Bits": 20401, "Public Wires": 877, "Public Wire Bits": 877, - "Total Cells": 17365, - "MUX": 6898, + "Total Cells": 17372, + "MUX": 6882, "XOR": 454, - "OR": 2549, - "AND": 1966, - "NOT": 926, + "OR": 2559, + "AND": 1970, + "NOT": 935, "DFFs": [ "$_DFF_N_ 1", "$_DFF_P_ 3386" @@ -920,7 +920,7 @@ "test_name": "vexriscv/BrieyWithMemoryInit/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "BrieyWithMemoryInit.v:0 Can not open file `BrieyWithMemoryInit.v_toplevel_axi_ram_ram_symbol0.bin` for \\$readmemb." + "BrieyWithMemoryInit.v:11987 Can not open file `BrieyWithMemoryInit.v_toplevel_axi_ram_ram_symbol0.bin` for \\$readmemb." ] }, "vexriscv/MuraxCfu/k6_frac_N10_frac_chain_mem32K_40nm": { @@ -1066,16 +1066,16 @@ "generic logic size": 4, "Longest Path": 314, "Average Path": 4, - "Estimated LUTs": 3260, + "Estimated LUTs": 3240, "Total Node": 1609, "Wires": 5542, - "Wire Bits": 8491, + "Wire Bits": 8275, "Public Wires": 421, "Public Wire Bits": 421, - "Total Cells": 6839, - "MUX": 2597, + "Total Cells": 6824, + "MUX": 2581, "XOR": 144, - "OR": 1089, + "OR": 1090, "AND": 870, "NOT": 382, "DFFs": [ @@ -1229,17 +1229,17 @@ "generic logic size": 4, "Longest Path": 325, "Average Path": 3, - "Estimated LUTs": 3602, + "Estimated LUTs": 3582, "Total Node": 1645, - "Wires": 5930, - "Wire Bits": 8949, + "Wires": 5925, + "Wire Bits": 8729, "Public Wires": 464, "Public Wire Bits": 464, - "Total Cells": 7342, - "MUX": 3103, + "Total Cells": 7324, + "MUX": 3087, "XOR": 144, - "OR": 1044, - "AND": 916, + "OR": 1043, + "AND": 915, "NOT": 348, "DFFs": [ "$_DFF_N_ 1", @@ -1545,7 +1545,7 @@ "test_name": "vexriscv/MuraxWithRamInit/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "MuraxWithRamInit.v:0 Can not open file `MuraxWithRamInit.v_toplevel_system_ram_ram_symbol0.bin` for \\$readmemb." + "MuraxWithRamInit.v:1616 Can not open file `MuraxWithRamInit.v_toplevel_system_ram_ram_symbol0.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvFull/k6_frac_N10_frac_chain_mem32K_40nm": { @@ -1591,8 +1591,8 @@ "Average Path": 4, "Estimated LUTs": 4666, "Total Node": 1960, - "Wires": 8363, - "Wire Bits": 11546, + "Wires": 8366, + "Wire Bits": 11552, "Public Wires": 584, "Public Wire Bits": 584, "Total Cells": 9681, @@ -1818,16 +1818,16 @@ "Average Path": 3, "Estimated LUTs": 6611, "Total Node": 2574, - "Wires": 10968, - "Wire Bits": 15106, + "Wires": 10967, + "Wire Bits": 15099, "Public Wires": 583, "Public Wire Bits": 583, - "Total Cells": 13096, + "Total Cells": 13098, "MUX": 5888, "XOR": 331, - "OR": 1994, - "AND": 1246, - "NOT": 674, + "OR": 1996, + "AND": 1247, + "NOT": 673, "DFFs": [ "$_DFF_P_ 2303" ], @@ -1866,15 +1866,15 @@ "Estimated LUTs": 7117, "Total Node": 3035, "Wires": 11995, - "Wire Bits": 16363, + "Wire Bits": 16356, "Public Wires": 699, "Public Wire Bits": 699, - "Total Cells": 14058, + "Total Cells": 14060, "MUX": 6209, "XOR": 392, - "OR": 2170, - "AND": 1324, - "NOT": 727, + "OR": 2172, + "AND": 1325, + "NOT": 726, "DFFs": [ "$_DFF_P_ 2455" ], @@ -2220,16 +2220,16 @@ "Average Path": 4, "Estimated LUTs": 8969, "Total Node": 2639, - "Wires": 13227, - "Wire Bits": 18782, + "Wires": 13233, + "Wire Bits": 18788, "Public Wires": 674, "Public Wire Bits": 674, - "Total Cells": 16338, + "Total Cells": 16344, "MUX": 6669, "XOR": 1029, - "OR": 2804, - "AND": 1917, - "NOT": 779, + "OR": 2808, + "AND": 1918, + "NOT": 780, "DFFs": [ "$_DFF_P_ 2391" ], @@ -2360,8 +2360,8 @@ "Average Path": 5, "Estimated LUTs": 1535, "Total Node": 673, - "Wires": 2398, - "Wire Bits": 3931, + "Wires": 2397, + "Wire Bits": 3929, "Public Wires": 253, "Public Wire Bits": 253, "Total Cells": 3009, @@ -2426,56 +2426,56 @@ "test_name": "vexriscv/VexRiscvThreeStagesBar/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvThreeStagesBar.v:0 Can not open file `VexRiscvThreeStagesBar.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvThreeStagesBar.v:851 Can not open file `VexRiscvThreeStagesBar.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvThreeStages/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvThreeStages/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvThreeStages.v:0 Can not open file `VexRiscvThreeStages.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvThreeStages.v:858 Can not open file `VexRiscvThreeStages.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvThreeStagesMDfast/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvThreeStagesMDfast/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvThreeStagesMDfast.v:0 Can not open file `VexRiscvThreeStagesMDfast.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvThreeStagesMDfast.v:998 Can not open file `VexRiscvThreeStagesMDfast.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvThreeStagesMD/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvThreeStagesMD/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvThreeStagesMD.v:0 Can not open file `VexRiscvThreeStagesMD.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvThreeStagesMD.v:1009 Can not open file `VexRiscvThreeStagesMD.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvTwoStagesBar/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvTwoStagesBar/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvTwoStagesBar.v:0 Can not open file `VexRiscvTwoStagesBar.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvTwoStagesBar.v:790 Can not open file `VexRiscvTwoStagesBar.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvTwoStages/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvTwoStages/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvTwoStages.v:0 Can not open file `VexRiscvTwoStages.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvTwoStages.v:801 Can not open file `VexRiscvTwoStages.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvTwoStagesMDfast/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvTwoStagesMDfast/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvTwoStagesMDfast.v:0 Can not open file `VexRiscvTwoStagesMDfast.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvTwoStagesMDfast.v:935 Can not open file `VexRiscvTwoStagesMDfast.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "vexriscv/VexRiscvTwoStagesMD/k6_frac_N10_frac_chain_mem32K_40nm": { "test_name": "vexriscv/VexRiscvTwoStagesMD/k6_frac_N10_frac_chain_mem32K_40nm", "exit": 1, "errors": [ - "VexRiscvTwoStagesMD.v:0 Can not open file `VexRiscvTwoStagesMD.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." + "VexRiscvTwoStagesMD.v:946 Can not open file `VexRiscvTwoStagesMD.v_toplevel_RegFilePlugin_regFile.bin` for \\$readmemb." ] }, "DEFAULT": { diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt index 30f52ddc7e1..4d7e72a8cea 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_basic/basic_timing/config/golden_results.txt @@ -1,9 +1,9 @@ -arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time -k6_N10_mem32K_40nm.xml ch_intrinsics.v common 4.12 vpr 64.05 MiB -1 -1 0.40 22828 3 0.10 -1 -1 35680 -1 -1 69 99 1 0 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 65592 99 130 343 473 1 230 299 12 12 144 clb auto 25.2 MiB 0.08 549 64.1 MiB 0.29 0.00 1.50234 -115.736 -1.50234 1.50234 0.36 0.000528173 0.000468779 0.0446154 0.0396412 38 1131 13 5.66058e+06 4.26669e+06 306247. 2126.71 1.60 0.287927 0.261936 10492 58364 -1 987 12 590 807 47353 14609 0 0 47353 14609 807 676 0 0 2367 2185 0 0 2871 2373 0 0 3489 1937 0 0 17526 3976 0 0 20293 3462 0 0 807 0 0 217 364 301 2591 0 0 2.0266 2.0266 -132.636 -2.0266 -0.822662 -0.224738 388532. 2698.14 0.16 0.04 0.06 -1 -1 0.16 0.0236207 0.0221146 -k6_N10_mem32K_40nm.xml ch_intrinsics.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 4.01 vpr 64.07 MiB -1 -1 0.39 22244 3 0.10 -1 -1 35692 -1 -1 69 99 1 0 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 65612 99 130 343 473 1 230 299 12 12 144 clb auto 25.2 MiB 0.07 549 64.1 MiB 0.29 0.00 1.50234 -115.736 -1.50234 1.50234 0.36 0.000540195 0.000479551 0.0448647 0.0397297 38 1131 13 5.66058e+06 4.26669e+06 306247. 2126.71 1.59 0.287235 0.260905 10492 58364 -1 987 12 590 807 47353 14609 0 0 47353 14609 807 676 0 0 2367 2185 0 0 2871 2373 0 0 3489 1937 0 0 17526 3976 0 0 20293 3462 0 0 807 0 0 217 364 301 2591 0 0 2.0266 2.0266 -132.636 -2.0266 -0.822662 -0.224738 388532. 2698.14 0.16 0.04 0.06 -1 -1 0.16 0.0235992 0.0221462 -k6_N10_mem32K_40nm.xml diffeq1.v common 13.81 vpr 67.15 MiB -1 -1 0.51 27032 15 0.43 -1 -1 36828 -1 -1 49 162 0 5 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 68760 162 96 993 934 1 713 312 16 16 256 mult_36 auto 28.9 MiB 0.25 5746 67.1 MiB 0.79 0.01 20.3951 -1668.77 -20.3951 20.3951 0.75 0.00150327 0.00133516 0.153223 0.136061 56 11561 48 1.21132e+07 4.62081e+06 696785. 2721.82 8.19 0.911932 0.824514 20912 135057 -1 9601 22 4023 8415 2463394 631001 0 0 2463394 631001 8415 5123 0 0 97767 95649 0 0 102378 98023 0 0 36495 18990 0 0 1074861 208603 0 0 1143478 204613 0 0 8415 0 0 4694 13491 11952 82900 0 0 22.3597 22.3597 -1812.79 -22.3597 0 0 894618. 3494.60 0.34 0.57 0.14 -1 -1 0.34 0.0929882 0.0866082 -k6_N10_mem32K_40nm.xml diffeq1.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 13.64 vpr 67.22 MiB -1 -1 0.52 26884 15 0.44 -1 -1 36692 -1 -1 49 162 0 5 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 68832 162 96 993 934 1 713 312 16 16 256 mult_36 auto 28.9 MiB 0.28 5746 67.2 MiB 0.81 0.01 20.3951 -1668.77 -20.3951 20.3951 0.72 0.00154782 0.00135789 0.155453 0.138243 56 11561 48 1.21132e+07 4.62081e+06 696785. 2721.82 8.00 0.901464 0.815455 20912 135057 -1 9601 22 4023 8415 2463394 631001 0 0 2463394 631001 8415 5123 0 0 97767 95649 0 0 102378 98023 0 0 36495 18990 0 0 1074861 208603 0 0 1143478 204613 0 0 8415 0 0 4694 13491 11952 82900 0 0 22.3597 22.3597 -1812.79 -22.3597 0 0 894618. 3494.60 0.34 0.57 0.14 -1 -1 0.34 0.0935784 0.0870901 -k6_N10_mem32K_40nm.xml single_wire.v common 0.53 vpr 60.99 MiB -1 -1 0.10 19712 1 0.01 -1 -1 32156 -1 -1 0 1 0 0 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 62452 1 1 1 2 0 1 2 3 3 9 -1 auto 22.2 MiB 0.00 2 61.0 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.01 6.508e-06 4.21e-06 4.7302e-05 3.2578e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.000133792 9.5007e-05 254 297 -1 1 1 1 1 17 8 0 0 17 8 1 1 0 0 4 1 0 0 8 4 0 0 1 1 0 0 2 1 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 6.1111e-05 4.4458e-05 -k6_N10_mem32K_40nm.xml single_wire.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.58 vpr 61.23 MiB -1 -1 0.13 19728 1 0.00 -1 -1 32200 -1 -1 0 1 0 0 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 62696 1 1 1 2 0 1 2 3 3 9 -1 auto 22.4 MiB 0.00 2 61.2 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.01 6.184e-06 3.993e-06 4.3641e-05 2.9251e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.000125688 8.6197e-05 254 297 -1 1 1 1 1 17 8 0 0 17 8 1 1 0 0 4 1 0 0 8 4 0 0 1 1 0 0 2 1 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 6.1706e-05 4.4581e-05 -k6_N10_mem32K_40nm.xml single_ff.v common 0.58 vpr 61.16 MiB -1 -1 0.15 20380 1 0.00 -1 -1 32344 -1 -1 1 2 0 0 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 62628 2 1 3 4 1 3 4 3 3 9 -1 auto 22.3 MiB 0.00 4 61.2 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.01 8.111e-06 5.609e-06 6.9436e-05 5.2818e-05 2 4 2 53894 53894 1165.58 129.509 0.00 0.000214692 0.000163548 254 297 -1 3 2 3 3 75 50 0 0 75 50 3 3 0 0 18 17 0 0 18 18 0 0 21 3 0 0 7 6 0 0 8 3 0 0 3 0 0 0 0 0 3 0 0 0.577715 0.577715 -1.12352 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.000126735 9.9717e-05 -k6_N10_mem32K_40nm.xml single_ff.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.53 vpr 61.28 MiB -1 -1 0.10 20236 1 0.00 -1 -1 32312 -1 -1 1 2 0 0 success v8.0.0-7648-g96837b3-dirty Release IPO VTR_ASSERT_LEVEL=3 GNU 9.4.0 on Linux-4.13.1-041301-generic x86_64 2023-04-20T17:14:09 agent-1 /home/mahmo494/RL_experiment/vtr-verilog-to-routing/vtr_flow/tasks 62752 2 1 3 4 1 3 4 3 3 9 -1 auto 22.4 MiB 0.00 4 61.3 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.01 8.326e-06 5.482e-06 6.6158e-05 4.802e-05 2 4 2 53894 53894 1165.58 129.509 0.00 0.000213451 0.000160083 254 297 -1 3 2 3 3 75 50 0 0 75 50 3 3 0 0 18 17 0 0 18 18 0 0 21 3 0 0 7 6 0 0 8 3 0 0 3 0 0 0 0 0 3 0 0 0.577715 0.577715 -1.12352 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.000106785 8.5521e-05 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6_N10_mem32K_40nm.xml ch_intrinsics.v common 2.47 vpr 64.33 MiB -1 -1 0.25 21736 3 0.09 -1 -1 36632 -1 -1 69 99 1 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 65872 99 130 344 474 1 226 299 12 12 144 clb auto 26.1 MiB 0.06 567 75224 25230 36780 13214 64.3 MiB 0.13 0.00 1.79892 -108.535 -1.79892 1.79892 0.29 0.000379961 0.00034145 0.0326248 0.0291433 38 1158 11 5.66058e+06 4.26669e+06 306247. 2126.71 0.57 0.126525 0.115663 10492 58364 -1 1040 10 606 881 55851 17341 2.00091 2.00091 -130.408 -2.00091 -0.308573 -0.076018 388532. 2698.14 0.11 0.02 0.06 -1 -1 0.11 0.0155533 0.0147294 +k6_N10_mem32K_40nm.xml ch_intrinsics.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 2.46 vpr 64.91 MiB -1 -1 0.24 21888 3 0.09 -1 -1 36768 -1 -1 69 99 1 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 66464 99 130 344 474 1 226 299 12 12 144 clb auto 26.1 MiB 0.05 567 75224 25230 36780 13214 64.9 MiB 0.14 0.00 1.79892 -108.535 -1.79892 1.79892 0.28 0.000526166 0.000478796 0.0340364 0.0304277 38 1158 11 5.66058e+06 4.26669e+06 306247. 2126.71 0.57 0.132241 0.121203 10492 58364 -1 1040 10 606 881 55851 17341 2.00091 2.00091 -130.408 -2.00091 -0.308573 -0.076018 388532. 2698.14 0.11 0.03 0.04 -1 -1 0.11 0.0181131 0.0171154 +k6_N10_mem32K_40nm.xml diffeq1.v common 7.28 vpr 68.23 MiB -1 -1 0.36 26528 15 0.36 -1 -1 38200 -1 -1 50 162 0 5 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 69864 162 96 1009 950 1 722 313 16 16 256 mult_36 auto 30.1 MiB 0.20 5538 99079 31388 60401 7290 68.2 MiB 0.44 0.01 20.0225 -1464.26 -20.0225 20.0225 0.55 0.00109421 0.000986749 0.131289 0.117975 46 10713 45 1.21132e+07 4.6747e+06 696785. 2721.82 3.13 0.521705 0.477477 20912 135057 -1 9476 39 3966 8181 1905116 454608 22.4323 22.4323 -1672.16 -22.4323 0 0 894618. 3494.60 0.28 0.41 0.09 -1 -1 0.28 0.13415 0.125611 +k6_N10_mem32K_40nm.xml diffeq1.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 7.37 vpr 68.37 MiB -1 -1 0.36 26524 15 0.37 -1 -1 37896 -1 -1 50 162 0 5 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 70008 162 96 1009 950 1 722 313 16 16 256 mult_36 auto 30.3 MiB 0.21 5538 99079 31388 60401 7290 68.4 MiB 0.42 0.01 20.0225 -1464.26 -20.0225 20.0225 0.57 0.00120527 0.0010959 0.124548 0.112799 46 10713 45 1.21132e+07 4.6747e+06 696785. 2721.82 3.19 0.515303 0.474546 20912 135057 -1 9476 39 3966 8181 1905116 454608 22.4323 22.4323 -1672.16 -22.4323 0 0 894618. 3494.60 0.26 0.43 0.12 -1 -1 0.26 0.125021 0.117095 +k6_N10_mem32K_40nm.xml single_wire.v common 0.56 vpr 61.77 MiB -1 -1 0.07 20064 1 0.02 -1 -1 32848 -1 -1 0 1 0 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 63256 1 1 1 2 0 1 2 3 3 9 -1 auto 23.4 MiB 0.00 2 3 1 2 0 61.8 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.00 1.5993e-05 5.092e-06 6.9441e-05 2.6784e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.00015545 6.4039e-05 254 297 -1 1 1 1 1 17 8 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 6.4018e-05 3.074e-05 +k6_N10_mem32K_40nm.xml single_wire.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.56 vpr 61.92 MiB -1 -1 0.07 20368 1 0.02 -1 -1 32848 -1 -1 0 1 0 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 63408 1 1 1 2 0 1 2 3 3 9 -1 auto 23.4 MiB 0.00 2 3 1 2 0 61.9 MiB 0.00 0.00 0.205011 -0.205011 -0.205011 nan 0.00 1.4641e-05 4.774e-06 8.4923e-05 3.0381e-05 2 1 1 53894 0 1165.58 129.509 0.00 0.000171005 6.9037e-05 254 297 -1 1 1 1 1 17 8 0.211201 nan -0.211201 -0.211201 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 6.259e-05 2.907e-05 +k6_N10_mem32K_40nm.xml single_ff.v common 0.55 vpr 61.64 MiB -1 -1 0.07 20368 1 0.02 -1 -1 33208 -1 -1 1 2 0 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 63124 2 1 3 4 1 3 4 3 3 9 -1 auto 23.3 MiB 0.00 4 9 6 0 3 61.6 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.00 1.9055e-05 1.0869e-05 8.77e-05 4.7964e-05 2 4 2 53894 53894 1165.58 129.509 0.00 0.000214022 0.000117563 254 297 -1 4 2 3 3 75 50 0.577715 0.577715 -1.12352 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.000111083 6.647e-05 +k6_N10_mem32K_40nm.xml single_ff.v common_--reorder_rr_graph_nodes_algorithm_random_shuffle 0.69 vpr 61.65 MiB -1 -1 0.07 20672 1 0.04 -1 -1 33092 -1 -1 1 2 0 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing 63132 2 1 3 4 1 3 4 3 3 9 -1 auto 23.4 MiB 0.00 4 9 6 0 3 61.7 MiB 0.00 0.00 0.570641 -0.944653 -0.570641 0.570641 0.00 1.8761e-05 8.417e-06 9.6466e-05 5.2411e-05 2 4 2 53894 53894 1165.58 129.509 0.00 0.000233534 0.000132023 254 297 -1 4 2 3 3 75 50 0.577715 0.577715 -1.12352 -0.577715 0 0 1165.58 129.509 0.00 0.00 0.00 -1 -1 0.00 0.000221939 0.000107927 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/figure_8/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/figure_8/config/golden_results.txt index 5fffec0e332..b9c72f4714d 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/figure_8/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/figure_8/config/golden_results.txt @@ -1,221 +1,221 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_003bits.v common 3.83 vpr 62.66 MiB -1 -1 0.09 19512 1 0.06 -1 -1 35968 -1 -1 2 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64160 7 4 21 25 1 15 13 17 17 289 -1 unnamed_device 24.3 MiB 0.01 66 238 53 181 4 62.7 MiB 0.00 0.00 0.701249 -7.34893 -0.701249 0.701249 0.88 5.1661e-05 4.5494e-05 0.00105831 0.000935191 20 137 6 6.55708e+06 24110 394039. 1363.46 1.17 0.00441567 0.00384437 19870 87366 -1 144 7 56 56 4309 1239 0.83871 0.83871 -8.27133 -0.83871 0 0 477104. 1650.88 0.21 0.01 0.09 -1 -1 0.21 0.00205708 0.00186975 10 4 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_004bits.v common 3.25 vpr 62.73 MiB -1 -1 0.10 19656 2 0.05 -1 -1 36088 -1 -1 2 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64232 9 5 28 33 1 21 16 17 17 289 -1 unnamed_device 24.3 MiB 0.01 138 156 48 106 2 62.7 MiB 0.00 0.00 0.900447 -11.3379 -0.900447 0.900447 0.89 6.3066e-05 5.6245e-05 0.000794082 0.000717402 20 235 7 6.55708e+06 24110 394039. 1363.46 0.56 0.00343991 0.00308261 19870 87366 -1 223 9 85 86 5405 1499 0.819447 0.819447 -11.9992 -0.819447 0 0 477104. 1650.88 0.21 0.01 0.09 -1 -1 0.21 0.0025386 0.00227437 13 6 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_005bits.v common 3.38 vpr 62.75 MiB -1 -1 0.10 19644 2 0.06 -1 -1 35500 -1 -1 2 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64252 11 6 34 40 1 24 19 17 17 289 -1 unnamed_device 24.3 MiB 0.02 61 544 113 372 59 62.7 MiB 0.01 0.00 0.900447 -11.5662 -0.900447 0.900447 0.87 6.7545e-05 6.0116e-05 0.00181129 0.00162097 26 178 14 6.55708e+06 24110 477104. 1650.88 0.68 0.0226789 0.0208174 21022 109990 -1 177 9 115 121 6516 2239 0.819447 0.819447 -12.5524 -0.819447 0 0 585099. 2024.56 0.25 0.01 0.10 -1 -1 0.25 0.0026605 0.00237909 16 7 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_006bits.v common 4.32 vpr 62.86 MiB -1 -1 0.08 19544 3 0.06 -1 -1 35908 -1 -1 3 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64372 13 7 41 48 1 32 23 17 17 289 -1 unnamed_device 24.4 MiB 0.01 79 663 125 500 38 62.9 MiB 0.01 0.00 1.58811 -15.8163 -1.58811 1.58811 0.91 9.2892e-05 8.373e-05 0.00226208 0.00202885 20 271 7 6.55708e+06 36165 394039. 1363.46 1.56 0.0106969 0.00917209 19870 87366 -1 250 11 106 127 6915 2276 1.58811 1.58811 -17.5334 -1.58811 0 0 477104. 1650.88 0.21 0.01 0.09 -1 -1 0.21 0.0035596 0.00315613 19 9 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_007bits.v common 5.09 vpr 62.63 MiB -1 -1 0.10 19676 3 0.06 -1 -1 35480 -1 -1 3 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64132 15 8 47 55 1 38 26 17 17 289 -1 unnamed_device 24.2 MiB 0.01 92 976 219 613 144 62.6 MiB 0.01 0.00 1.23151 -17.401 -1.23151 1.23151 0.90 0.000113655 0.000103613 0.00308595 0.00279915 26 362 35 6.55708e+06 36165 477104. 1650.88 2.28 0.0288322 0.0240594 21022 109990 -1 299 13 188 211 9360 3345 1.13885 1.13885 -19.0838 -1.13885 0 0 585099. 2024.56 0.26 0.01 0.11 -1 -1 0.26 0.00410639 0.00363337 23 10 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_008bits.v common 4.27 vpr 62.85 MiB -1 -1 0.10 19536 3 0.06 -1 -1 35604 -1 -1 4 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64360 17 9 56 65 1 42 30 17 17 289 -1 unnamed_device 24.4 MiB 0.07 118 2468 742 1169 557 62.9 MiB 0.02 0.00 1.70831 -21.0444 -1.70831 1.70831 0.89 0.000123982 0.000111278 0.00714222 0.00645072 24 449 19 6.55708e+06 48220 448715. 1552.65 1.44 0.0283585 0.0241516 20734 103517 -1 343 17 212 236 12543 3862 1.82851 1.82851 -23.2742 -1.82851 0 0 554710. 1919.41 0.24 0.01 0.10 -1 -1 0.24 0.00552843 0.00483321 25 14 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_009bits.v common 4.46 vpr 62.95 MiB -1 -1 0.10 19532 4 0.06 -1 -1 35740 -1 -1 4 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64460 19 10 60 70 1 48 33 17 17 289 -1 unnamed_device 24.4 MiB 0.01 141 2165 594 1180 391 62.9 MiB 0.02 0.00 1.58811 -24.792 -1.58811 1.58811 0.91 0.000132516 0.000120126 0.00588031 0.00530889 26 513 16 6.55708e+06 48220 477104. 1650.88 1.62 0.0386759 0.0325269 21022 109990 -1 400 16 258 307 15525 5097 1.58811 1.58811 -26.6416 -1.58811 0 0 585099. 2024.56 0.26 0.02 0.11 -1 -1 0.26 0.00564459 0.00493838 29 13 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_010bits.v common 4.79 vpr 63.08 MiB -1 -1 0.11 19644 4 0.06 -1 -1 36084 -1 -1 5 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64592 21 11 69 80 1 53 37 17 17 289 -1 unnamed_device 24.5 MiB 0.03 284 1928 664 976 288 63.1 MiB 0.01 0.00 1.68077 -30.4899 -1.68077 1.68077 0.92 0.000138017 0.000123631 0.00525783 0.00476634 26 598 10 6.55708e+06 60275 477104. 1650.88 1.95 0.0408808 0.0345205 21022 109990 -1 563 11 181 227 14793 3787 1.46791 1.46791 -31.3524 -1.46791 0 0 585099. 2024.56 0.26 0.01 0.11 -1 -1 0.26 0.00511555 0.00457088 33 17 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_011bits.v common 3.53 vpr 62.99 MiB -1 -1 0.10 19624 5 0.07 -1 -1 35812 -1 -1 6 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64500 23 12 76 88 1 61 41 17 17 289 -1 unnamed_device 24.4 MiB 0.02 228 3471 1214 1851 406 63.0 MiB 0.02 0.00 2.07857 -32.6138 -2.07857 2.07857 0.88 0.000139097 0.000124872 0.00806635 0.00727748 26 584 15 6.55708e+06 72330 477104. 1650.88 0.73 0.0276092 0.0238968 21022 109990 -1 505 11 250 317 17417 4955 1.83817 1.83817 -33.3714 -1.83817 0 0 585099. 2024.56 0.25 0.01 0.11 -1 -1 0.25 0.0054129 0.00481629 37 19 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_012bits.v common 5.21 vpr 62.87 MiB -1 -1 0.10 19908 5 0.07 -1 -1 35236 -1 -1 6 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64380 25 13 83 96 1 66 44 17 17 289 -1 unnamed_device 24.5 MiB 0.02 230 1661 271 1364 26 62.9 MiB 0.01 0.00 1.80097 -35.7252 -1.80097 1.80097 0.89 0.000175281 0.000158565 0.00433674 0.00394176 28 728 17 6.55708e+06 72330 500653. 1732.36 2.40 0.0396404 0.0336321 21310 115450 -1 592 13 286 408 24297 6568 1.65484 1.65484 -37.2094 -1.65484 0 0 612192. 2118.31 0.26 0.02 0.10 -1 -1 0.26 0.00633896 0.00561255 40 21 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_013bits.v common 3.57 vpr 63.08 MiB -1 -1 0.11 19408 5 0.07 -1 -1 35700 -1 -1 7 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64596 27 14 91 105 1 70 48 17 17 289 -1 unnamed_device 24.8 MiB 0.02 298 2223 446 1605 172 63.1 MiB 0.02 0.00 1.82851 -37.5 -1.82851 1.82851 0.89 0.000196027 0.000177972 0.00583217 0.00532012 26 745 17 6.55708e+06 84385 477104. 1650.88 0.74 0.0298427 0.0257556 21022 109990 -1 668 12 263 378 22460 5886 1.73584 1.73584 -40.7811 -1.73584 0 0 585099. 2024.56 0.26 0.02 0.11 -1 -1 0.26 0.00668685 0.00596104 42 24 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_014bits.v common 5.30 vpr 63.12 MiB -1 -1 0.10 19932 6 0.07 -1 -1 35720 -1 -1 7 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64632 29 15 95 110 1 74 51 17 17 289 -1 unnamed_device 24.8 MiB 0.04 329 2401 440 1903 58 63.1 MiB 0.02 0.00 2.39596 -45.5411 -2.39596 2.39596 0.89 0.000202428 0.00018437 0.00598065 0.00546351 28 759 10 6.55708e+06 84385 500653. 1732.36 2.41 0.0436861 0.0373178 21310 115450 -1 706 10 258 360 20144 5444 2.15556 2.15556 -44.9364 -2.15556 0 0 612192. 2118.31 0.27 0.02 0.11 -1 -1 0.27 0.00622558 0.00557035 45 23 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_015bits.v common 3.74 vpr 63.03 MiB -1 -1 0.10 19808 6 0.07 -1 -1 35864 -1 -1 10 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64544 31 16 104 120 1 81 57 17 17 289 -1 unnamed_device 24.6 MiB 0.04 463 3000 671 1855 474 63.0 MiB 0.02 0.00 1.9467 -49.1372 -1.9467 1.9467 0.90 0.000229393 0.000208026 0.00724422 0.00661318 28 1004 14 6.55708e+06 120550 500653. 1732.36 0.83 0.0333714 0.0289497 21310 115450 -1 909 10 299 460 29503 7303 1.85404 1.85404 -50.2387 -1.85404 0 0 612192. 2118.31 0.27 0.02 0.11 -1 -1 0.27 0.00689678 0.00619823 50 27 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_016bits.v common 5.58 vpr 63.18 MiB -1 -1 0.10 19816 7 0.07 -1 -1 35728 -1 -1 7 33 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64696 33 17 112 129 1 86 57 17 17 289 -1 unnamed_device 24.8 MiB 0.05 322 6597 2323 2891 1383 63.2 MiB 0.04 0.00 2.57253 -53.1074 -2.57253 2.57253 0.91 0.000232898 0.000212058 0.0145397 0.0131746 28 1084 13 6.55708e+06 84385 500653. 1732.36 2.62 0.0585912 0.0505798 21310 115450 -1 789 11 372 478 28544 8239 2.3425 2.3425 -54.886 -2.3425 0 0 612192. 2118.31 0.27 0.02 0.11 -1 -1 0.27 0.00742359 0.00666602 52 30 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_018bits.v common 5.54 vpr 63.38 MiB -1 -1 0.11 19752 7 0.07 -1 -1 35748 -1 -1 10 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64896 37 19 127 146 1 99 66 17 17 289 -1 unnamed_device 24.9 MiB 0.02 517 7514 3058 4421 35 63.4 MiB 0.04 0.00 3.08562 -69.1539 -3.08562 3.08562 0.91 0.000264032 0.000240357 0.0151067 0.0137122 32 1157 14 6.55708e+06 120550 554710. 1919.41 2.58 0.0785689 0.0677204 22174 131602 -1 999 9 347 484 30205 7755 2.87276 2.87276 -68.2585 -2.87276 0 0 701300. 2426.64 0.28 0.02 0.13 -1 -1 0.28 0.00753898 0.00679889 59 35 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_020bits.v common 5.34 vpr 63.46 MiB -1 -1 0.11 19776 8 0.07 -1 -1 36064 -1 -1 11 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64984 41 21 139 160 1 110 73 17 17 289 -1 unnamed_device 24.9 MiB 0.05 423 10105 3105 5166 1834 63.5 MiB 0.05 0.00 2.75456 -69.4691 -2.75456 2.75456 0.91 0.000279944 0.000253919 0.0201714 0.0183239 28 1229 19 6.55708e+06 132605 500653. 1732.36 2.35 0.0885276 0.0768618 21310 115450 -1 1013 16 459 599 40727 11036 2.5417 2.5417 -71.5857 -2.5417 0 0 612192. 2118.31 0.27 0.03 0.11 -1 -1 0.27 0.0110399 0.00982338 67 37 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_022bits.v common 5.93 vpr 63.50 MiB -1 -1 0.12 19780 9 0.08 -1 -1 36012 -1 -1 13 45 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65020 45 23 153 176 1 123 81 17 17 289 -1 unnamed_device 24.9 MiB 0.24 454 9181 2871 4452 1858 63.5 MiB 0.05 0.00 3.20898 -80.9842 -3.20898 3.20898 0.91 0.000278633 0.000251369 0.0173729 0.015786 30 1196 23 6.55708e+06 156715 526063. 1820.29 2.73 0.0958237 0.0830769 21886 126133 -1 873 11 414 517 24759 7523 3.02956 3.02956 -80.0769 -3.02956 0 0 666494. 2306.21 0.27 0.02 0.13 -1 -1 0.27 0.00945683 0.00850046 74 41 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_024bits.v common 5.79 vpr 63.50 MiB -1 -1 0.12 19748 10 0.08 -1 -1 36060 -1 -1 12 49 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65024 49 25 166 191 1 129 86 17 17 289 -1 unnamed_device 25.1 MiB 0.08 677 9725 2981 5215 1529 63.5 MiB 0.05 0.00 3.75902 -99.1822 -3.75902 3.75902 0.91 0.000331517 0.000301484 0.0186532 0.0170145 32 1400 10 6.55708e+06 144660 554710. 1919.41 2.69 0.0992016 0.0862657 22174 131602 -1 1255 11 469 643 39075 10434 3.63882 3.63882 -98.8492 -3.63882 0 0 701300. 2426.64 0.30 0.03 0.13 -1 -1 0.30 0.0103055 0.00930304 79 44 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_028bits.v common 4.71 vpr 63.73 MiB -1 -1 0.13 19852 11 0.09 -1 -1 35860 -1 -1 14 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65260 57 29 198 227 1 159 100 17 17 289 -1 unnamed_device 25.3 MiB 0.22 710 9844 2338 6831 675 63.7 MiB 0.05 0.00 4.36968 -119.507 -4.36968 4.36968 0.90 0.000388698 0.000353505 0.018292 0.0166913 34 1591 23 6.55708e+06 168770 585099. 2024.56 1.41 0.0784156 0.0687564 22462 138074 -1 1413 13 546 739 43127 11305 3.88888 3.88888 -116.039 -3.88888 0 0 742403. 2568.87 0.31 0.03 0.14 -1 -1 0.31 0.0128879 0.0115272 93 56 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_032bits.v common 6.25 vpr 63.77 MiB -1 -1 0.13 20100 13 0.09 -1 -1 36092 -1 -1 16 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65296 65 33 224 257 1 180 114 17 17 289 -1 unnamed_device 25.2 MiB 0.28 986 13638 3602 8892 1144 63.8 MiB 0.06 0.00 4.63562 -152.464 -4.63562 4.63562 0.90 0.000421812 0.000380966 0.0220664 0.0201056 30 1963 18 6.55708e+06 192880 526063. 1820.29 2.90 0.135242 0.117937 21886 126133 -1 1731 12 577 785 47918 11606 4.18236 4.18236 -146.964 -4.18236 0 0 666494. 2306.21 0.27 0.03 0.12 -1 -1 0.27 0.0135241 0.0121871 107 62 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_048bits.v common 4.39 vpr 64.81 MiB -1 -1 0.14 20632 19 0.12 -1 -1 35840 -1 -1 24 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66364 97 49 340 389 1 266 170 17 17 289 -1 unnamed_device 26.1 MiB 0.22 1351 35890 10935 20783 4172 64.8 MiB 0.15 0.00 7.54965 -280.539 -7.54965 7.54965 0.89 0.000648573 0.000588032 0.0495448 0.0450556 30 2921 38 6.55708e+06 289320 526063. 1820.29 1.02 0.148692 0.132215 21886 126133 -1 2413 13 874 1213 66598 17862 6.85599 6.85599 -268.058 -6.85599 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0210996 0.0191312 161 98 -1 -1 -1 -1 - fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_064bits.v common 7.41 vpr 65.17 MiB -1 -1 0.17 20612 26 0.12 -1 -1 36184 -1 -1 35 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66732 129 65 453 518 1 353 229 17 17 289 -1 unnamed_device 26.5 MiB 0.20 1861 50629 13453 32595 4581 65.2 MiB 0.20 0.00 10.1317 -478.148 -10.1317 10.1317 0.90 0.000821946 0.000746997 0.0630117 0.0573693 30 4125 27 6.55708e+06 421925 526063. 1820.29 3.84 0.312578 0.278956 21886 126133 -1 3417 13 1217 1654 102697 25460 9.39576 9.39576 -452.566 -9.39576 0 0 666494. 2306.21 0.29 0.06 0.12 -1 -1 0.29 0.0282473 0.0257755 213 131 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 0.28 abc 32.87 MiB -1 -1 0.09 19500 1 0.02 -1 -1 33660 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25004 7 4 24 25 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 0.27 abc 32.86 MiB -1 -1 0.10 19108 1 0.02 -1 -1 33648 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24540 9 5 30 31 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 0.26 abc 32.47 MiB -1 -1 0.10 19348 1 0.02 -1 -1 33248 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24440 11 6 36 37 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 0.26 abc 32.46 MiB -1 -1 0.09 19548 1 0.02 -1 -1 33244 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25180 13 7 42 43 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 0.27 abc 32.88 MiB -1 -1 0.10 19444 1 0.02 -1 -1 33664 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25112 15 8 49 50 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 0.27 abc 32.60 MiB -1 -1 0.09 19572 1 0.02 -1 -1 33384 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24240 17 9 55 56 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 0.27 abc 32.87 MiB -1 -1 0.09 19496 1 0.02 -1 -1 33656 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24184 19 10 61 62 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 0.26 abc 32.88 MiB -1 -1 0.10 19780 1 0.02 -1 -1 33668 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25408 21 11 67 68 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 0.27 abc 32.62 MiB -1 -1 0.09 19692 1 0.02 -1 -1 33404 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25232 23 12 74 75 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 0.27 abc 32.96 MiB -1 -1 0.09 19680 1 0.02 -1 -1 33748 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24808 25 13 80 81 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 0.27 abc 32.70 MiB -1 -1 0.10 19892 1 0.02 -1 -1 33488 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25244 27 14 86 87 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 0.27 abc 32.93 MiB -1 -1 0.10 19544 1 0.02 -1 -1 33724 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25024 29 15 92 93 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_015bits.v common 0.27 abc 32.62 MiB -1 -1 0.10 19384 1 0.02 -1 -1 33404 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25272 31 16 99 100 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_016bits.v common 0.27 abc 32.85 MiB -1 -1 0.11 19536 1 0.02 -1 -1 33640 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25520 33 17 105 106 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 0.27 abc 32.86 MiB -1 -1 0.10 19496 1 0.02 -1 -1 33652 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25176 37 19 117 118 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 0.27 abc 32.91 MiB -1 -1 0.10 19604 1 0.02 -1 -1 33696 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25412 41 21 130 131 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 0.27 abc 32.87 MiB -1 -1 0.09 20076 1 0.02 -1 -1 33660 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25392 45 23 142 143 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 0.27 abc 32.86 MiB -1 -1 0.10 19900 1 0.02 -1 -1 33648 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25144 49 25 155 156 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 0.29 abc 32.96 MiB -1 -1 0.11 19836 1 0.03 -1 -1 33748 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25548 57 29 180 181 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 0.29 abc 32.88 MiB -1 -1 0.11 19868 1 0.03 -1 -1 33672 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25516 65 33 205 206 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 0.32 abc 32.93 MiB -1 -1 0.12 20072 1 0.03 -1 -1 33720 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25480 97 49 305 306 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 0.34 abc 33.14 MiB -1 -1 0.13 20412 1 0.03 -1 -1 33940 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25768 129 65 405 406 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 0.25 abc 32.90 MiB -1 -1 0.09 19496 1 0.02 -1 -1 33688 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24484 7 4 24 25 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 0.25 abc 32.64 MiB -1 -1 0.09 19528 1 0.02 -1 -1 33428 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24840 9 5 30 31 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 0.24 abc 32.79 MiB -1 -1 0.08 19656 1 0.02 -1 -1 33580 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24756 11 6 36 37 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 0.26 abc 32.57 MiB -1 -1 0.10 19784 1 0.02 -1 -1 33352 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24608 13 7 42 43 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 0.27 abc 32.75 MiB -1 -1 0.09 19756 1 0.02 -1 -1 33532 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25016 15 8 49 50 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 0.26 abc 32.58 MiB -1 -1 0.09 19832 1 0.02 -1 -1 33364 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24892 17 9 55 56 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 0.26 abc 32.58 MiB -1 -1 0.09 19800 1 0.02 -1 -1 33360 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24624 19 10 61 62 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 0.26 abc 32.50 MiB -1 -1 0.09 19656 1 0.02 -1 -1 33280 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24828 21 11 67 68 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 0.27 abc 32.55 MiB -1 -1 0.09 19632 1 0.02 -1 -1 33336 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25028 23 12 74 75 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 0.27 abc 32.62 MiB -1 -1 0.10 19908 1 0.02 -1 -1 33408 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24916 25 13 80 81 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 0.27 abc 32.95 MiB -1 -1 0.10 19756 1 0.02 -1 -1 33736 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 24760 27 14 86 87 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 0.28 abc 32.88 MiB -1 -1 0.09 19764 1 0.02 -1 -1 33672 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25172 29 15 92 93 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_015bits.v common 0.27 abc 32.86 MiB -1 -1 0.09 19580 1 0.02 -1 -1 33652 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25068 31 16 99 100 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_016bits.v common 0.27 abc 32.83 MiB -1 -1 0.10 19888 1 0.02 -1 -1 33616 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25116 33 17 105 106 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 0.27 abc 33.12 MiB -1 -1 0.09 19772 1 0.02 -1 -1 33920 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25168 37 19 117 118 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 0.28 abc 33.11 MiB -1 -1 0.11 19428 1 0.02 -1 -1 33908 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25076 41 21 130 131 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 0.28 abc 33.26 MiB -1 -1 0.10 20204 1 0.02 -1 -1 34056 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25076 45 23 142 143 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 0.27 abc 32.87 MiB -1 -1 0.10 19812 1 0.02 -1 -1 33656 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25104 49 25 155 156 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 0.29 abc 32.68 MiB -1 -1 0.11 19812 1 0.02 -1 -1 33468 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25316 57 29 180 181 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 0.32 abc 32.90 MiB -1 -1 0.11 19652 1 0.03 -1 -1 33692 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25356 65 33 205 206 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 0.31 abc 32.87 MiB -1 -1 0.12 20100 1 0.03 -1 -1 33660 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25628 97 49 305 306 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 0.32 abc 33.41 MiB -1 -1 0.13 20136 1 0.03 -1 -1 34216 -1 -1 -1 -1 -1 -1 exited with return code 134 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 25824 129 65 405 406 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 3.53 vpr 63.19 MiB -1 -1 0.10 19500 1 0.02 -1 -1 33380 -1 -1 2 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64708 7 4 27 28 1 14 13 17 17 289 -1 unnamed_device 24.8 MiB 0.01 45 88 36 48 4 63.2 MiB 0.00 0.00 0.824016 -7.40657 -0.824016 0.824016 0.90 6.2315e-05 4.7278e-05 0.000591993 0.000521342 12 109 9 6.64007e+06 25116 231691. 801.699 0.96 0.00477776 0.00411029 19090 58805 -1 115 5 36 36 2174 676 0.770048 0.770048 -8.25533 -0.770048 0 0 318358. 1101.58 0.15 0.01 0.06 -1 -1 0.15 0.0020191 0.00185002 10 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 3.88 vpr 62.91 MiB -1 -1 0.08 19496 1 0.02 -1 -1 33596 -1 -1 2 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64424 9 5 34 35 1 20 16 17 17 289 -1 unnamed_device 24.5 MiB 0.01 43 476 113 309 54 62.9 MiB 0.01 0.00 0.792048 -9.40096 -0.792048 0.792048 0.89 6.3559e-05 5.6917e-05 0.00187377 0.0016749 18 145 18 6.64007e+06 25116 355633. 1230.56 1.21 0.0134081 0.0111389 20242 81429 -1 131 12 120 120 4689 1704 0.901248 0.901248 -10.0628 -0.901248 0 0 448715. 1552.65 0.20 0.01 0.08 -1 -1 0.20 0.00296367 0.00261961 13 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 3.37 vpr 63.26 MiB -1 -1 0.09 19644 1 0.02 -1 -1 33676 -1 -1 2 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64780 11 6 41 42 1 26 19 17 17 289 -1 unnamed_device 24.8 MiB 0.01 57 869 279 533 57 63.3 MiB 0.01 0.00 0.803048 -11.5224 -0.803048 0.803048 0.87 6.8742e-05 6.406e-05 0.00278417 0.00253807 26 201 39 6.64007e+06 25116 477104. 1650.88 0.69 0.015235 0.0127454 21682 110474 -1 184 35 220 220 11427 3507 0.923248 0.923248 -13.188 -0.923248 0 0 585099. 2024.56 0.24 0.02 0.11 -1 -1 0.24 0.00592456 0.0050179 16 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 3.42 vpr 63.27 MiB -1 -1 0.10 19416 1 0.02 -1 -1 33604 -1 -1 4 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64784 13 7 48 49 1 32 24 17 17 289 -1 unnamed_device 24.7 MiB 0.01 139 840 239 448 153 63.3 MiB 0.01 0.00 0.825048 -15.1967 -0.825048 0.825048 0.89 7.6434e-05 6.8672e-05 0.0023741 0.0021418 26 313 13 6.64007e+06 50232 477104. 1650.88 0.72 0.0137642 0.0116446 21682 110474 -1 281 12 159 159 9704 2622 0.934248 0.934248 -16.5101 -0.934248 0 0 585099. 2024.56 0.24 0.01 0.11 -1 -1 0.24 0.00357903 0.00315472 20 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 3.61 vpr 63.18 MiB -1 -1 0.08 19492 1 0.02 -1 -1 33628 -1 -1 3 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64700 15 8 55 56 1 38 26 17 17 289 -1 unnamed_device 24.6 MiB 0.02 109 1242 363 655 224 63.2 MiB 0.01 0.00 1.18536 -16.9279 -1.18536 1.18536 0.89 0.000109962 0.000100062 0.00375684 0.00339493 32 250 10 6.64007e+06 37674 554710. 1919.41 0.80 0.0154181 0.0131606 22834 132086 -1 237 13 135 135 7706 2270 1.06345 1.06345 -18.3624 -1.06345 0 0 701300. 2426.64 0.28 0.01 0.13 -1 -1 0.28 0.00398267 0.00351298 22 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 5.42 vpr 63.19 MiB -1 -1 0.10 19532 1 0.02 -1 -1 33604 -1 -1 4 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64708 17 9 62 63 1 41 30 17 17 289 -1 unnamed_device 24.7 MiB 0.02 121 1870 575 914 381 63.2 MiB 0.01 0.00 1.19636 -19.6512 -1.19636 1.19636 0.90 0.000111329 9.9904e-05 0.00496555 0.00448245 32 311 14 6.64007e+06 50232 554710. 1919.41 2.58 0.0357012 0.0299207 22834 132086 -1 248 11 158 158 7583 2240 0.943248 0.943248 -19.308 -0.943248 0 0 701300. 2426.64 0.28 0.01 0.13 -1 -1 0.28 0.00373608 0.00331513 25 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 3.52 vpr 63.21 MiB -1 -1 0.09 19636 1 0.02 -1 -1 33592 -1 -1 4 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64724 19 10 69 70 1 44 33 17 17 289 -1 unnamed_device 24.7 MiB 0.03 130 1749 486 940 323 63.2 MiB 0.01 0.00 1.20736 -22.2432 -1.20736 1.20736 0.91 0.000132323 0.000120033 0.00477246 0.00432334 26 362 15 6.64007e+06 50232 477104. 1650.88 0.72 0.0205086 0.0175664 21682 110474 -1 318 12 182 182 11942 3286 1.10745 1.10745 -24.0466 -1.10745 0 0 585099. 2024.56 0.27 0.01 0.10 -1 -1 0.27 0.00463985 0.00411409 28 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 4.35 vpr 63.09 MiB -1 -1 0.10 19516 1 0.02 -1 -1 33672 -1 -1 5 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64600 21 11 76 77 1 49 37 17 17 289 -1 unnamed_device 24.5 MiB 0.03 173 2599 639 1402 558 63.1 MiB 0.02 0.00 1.21836 -24.9885 -1.21836 1.21836 0.86 0.000141304 0.000128183 0.00645072 0.00583582 26 465 15 6.64007e+06 62790 477104. 1650.88 1.63 0.0371718 0.0314603 21682 110474 -1 383 13 196 196 12393 3314 1.00925 1.00925 -26.0016 -1.00925 0 0 585099. 2024.56 0.24 0.01 0.11 -1 -1 0.24 0.00397787 0.00353292 31 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 3.54 vpr 63.23 MiB -1 -1 0.10 19648 1 0.02 -1 -1 33404 -1 -1 5 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64744 23 12 83 84 1 55 40 17 17 289 -1 unnamed_device 24.7 MiB 0.03 164 2964 931 1425 608 63.2 MiB 0.02 0.00 1.22936 -27.3898 -1.22936 1.22936 0.89 0.000148864 0.000134529 0.0070538 0.00639559 28 493 20 6.64007e+06 62790 500653. 1732.36 0.79 0.0259442 0.0223293 21970 115934 -1 449 18 287 287 22883 6108 1.12945 1.12945 -29.8071 -1.12945 0 0 612192. 2118.31 0.26 0.02 0.11 -1 -1 0.26 0.0065079 0.00568002 34 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 3.59 vpr 63.44 MiB -1 -1 0.11 19624 1 0.02 -1 -1 33324 -1 -1 5 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64964 25 13 90 91 1 61 43 17 17 289 -1 unnamed_device 24.9 MiB 0.03 184 3793 1189 1796 808 63.4 MiB 0.02 0.00 1.24036 -30.1907 -1.24036 1.24036 0.89 0.000158319 0.000142767 0.00865056 0.00786973 28 543 17 6.64007e+06 62790 500653. 1732.36 0.80 0.0284146 0.0246538 21970 115934 -1 470 16 377 377 26116 7071 1.15265 1.15265 -31.7389 -1.15265 0 0 612192. 2118.31 0.27 0.02 0.11 -1 -1 0.27 0.00633197 0.00555372 37 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 5.44 vpr 63.53 MiB -1 -1 0.09 19748 1 0.02 -1 -1 33504 -1 -1 6 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65052 27 14 97 98 1 67 47 17 17 289 -1 unnamed_device 25.0 MiB 0.02 211 3827 1497 2158 172 63.5 MiB 0.02 0.00 1.25136 -33.107 -1.25136 1.25136 0.89 0.000163786 0.000147752 0.00852233 0.00770632 30 621 21 6.64007e+06 75348 526063. 1820.29 2.60 0.0487232 0.0415028 22546 126617 -1 496 20 396 396 23543 6618 1.25085 1.25085 -32.5747 -1.25085 0 0 666494. 2306.21 0.27 0.02 0.12 -1 -1 0.27 0.00757846 0.0066021 40 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 4.62 vpr 63.27 MiB -1 -1 0.09 19436 1 0.02 -1 -1 33616 -1 -1 7 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64784 29 15 104 105 1 73 51 17 17 289 -1 unnamed_device 24.9 MiB 0.02 224 4187 1190 2032 965 63.3 MiB 0.02 0.00 1.26236 -35.4106 -1.26236 1.26236 0.88 0.000179653 0.000163 0.00870008 0.00790179 28 726 25 6.64007e+06 87906 500653. 1732.36 1.83 0.0537909 0.0459272 21970 115934 -1 567 23 477 477 36507 9790 1.13065 1.13065 -35.8668 -1.13065 0 0 612192. 2118.31 0.25 0.03 0.11 -1 -1 0.25 0.00904258 0.00787412 44 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_015bits.v common 5.42 vpr 63.59 MiB -1 -1 0.10 19748 1 0.02 -1 -1 33656 -1 -1 7 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65116 31 16 111 112 1 79 54 17 17 289 -1 unnamed_device 25.2 MiB 0.02 288 4950 1971 2770 209 63.6 MiB 0.03 0.00 1.62267 -39.7496 -1.62267 1.62267 0.88 0.000198217 0.000180214 0.0101854 0.00926268 30 651 37 6.64007e+06 87906 526063. 1820.29 2.61 0.0569188 0.0486992 22546 126617 -1 526 15 302 302 16740 4566 1.05125 1.05125 -38.0908 -1.05125 0 0 666494. 2306.21 0.27 0.02 0.12 -1 -1 0.27 0.0069465 0.00613461 46 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_016bits.v common 5.58 vpr 63.31 MiB -1 -1 0.11 19500 1 0.02 -1 -1 33732 -1 -1 7 33 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64832 33 17 118 119 1 82 57 17 17 289 -1 unnamed_device 24.9 MiB 0.03 307 5834 1940 2742 1152 63.3 MiB 0.03 0.00 1.63367 -42.0204 -1.63367 1.63367 0.87 0.000205312 0.000187471 0.0120497 0.0110014 32 726 14 6.64007e+06 87906 554710. 1919.41 2.74 0.0554558 0.0476611 22834 132086 -1 636 17 427 427 32889 8693 1.02925 1.02925 -40.8658 -1.02925 0 0 701300. 2426.64 0.28 0.02 0.13 -1 -1 0.28 0.00760259 0.00667627 49 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 4.81 vpr 63.44 MiB -1 -1 0.11 19900 1 0.02 -1 -1 33868 -1 -1 8 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64964 37 19 132 133 1 90 64 17 17 289 -1 unnamed_device 25.0 MiB 0.03 341 7938 3219 4414 305 63.4 MiB 0.04 0.00 1.65567 -48.7751 -1.65567 1.65567 0.88 0.000226935 0.000206274 0.0152537 0.013918 30 830 16 6.64007e+06 100464 526063. 1820.29 1.93 0.0677488 0.0585302 22546 126617 -1 667 12 383 383 21275 5866 1.06225 1.06225 -46.1571 -1.06225 0 0 666494. 2306.21 0.29 0.02 0.12 -1 -1 0.29 0.00736085 0.00656267 55 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 5.83 vpr 63.62 MiB -1 -1 0.10 19828 1 0.02 -1 -1 33940 -1 -1 8 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65144 41 21 146 147 1 102 70 17 17 289 -1 unnamed_device 25.1 MiB 0.03 384 7846 3210 4515 121 63.6 MiB 0.04 0.00 1.67767 -55.4572 -1.67767 1.67767 0.90 0.000266647 0.000243207 0.015028 0.0136905 32 1081 24 6.64007e+06 100464 554710. 1919.41 2.88 0.0881583 0.0760537 22834 132086 -1 891 14 540 540 46730 11738 1.24965 1.24965 -55.9942 -1.24965 0 0 701300. 2426.64 0.30 0.03 0.13 -1 -1 0.30 0.00899646 0.00799673 61 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 3.88 vpr 63.68 MiB -1 -1 0.11 20040 1 0.02 -1 -1 33680 -1 -1 10 45 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65208 45 23 160 161 1 114 78 17 17 289 -1 unnamed_device 25.2 MiB 0.03 432 8876 3599 5116 161 63.7 MiB 0.05 0.00 1.69967 -61.7455 -1.69967 1.69967 0.89 0.000270046 0.000244593 0.0151457 0.0137973 32 1345 24 6.64007e+06 125580 554710. 1919.41 0.93 0.0507272 0.0444278 22834 132086 -1 996 15 645 645 57878 15572 1.30585 1.30585 -61.5086 -1.30585 0 0 701300. 2426.64 0.29 0.03 0.14 -1 -1 0.29 0.00984418 0.00873495 68 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 5.03 vpr 63.70 MiB -1 -1 0.10 19760 1 0.02 -1 -1 33996 -1 -1 10 49 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65224 49 25 174 175 1 123 84 17 17 289 -1 unnamed_device 25.1 MiB 0.04 558 5025 968 3800 257 63.7 MiB 0.04 0.00 2.07098 -71.2143 -2.07098 2.07098 0.90 0.000314568 0.000288081 0.00945632 0.00867192 28 1391 24 6.64007e+06 125580 500653. 1732.36 2.12 0.0862147 0.074528 21970 115934 -1 1226 12 568 568 57127 16713 1.41065 1.41065 -74.0365 -1.41065 0 0 612192. 2118.31 0.27 0.03 0.11 -1 -1 0.27 0.00926094 0.00825872 73 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 3.88 vpr 64.12 MiB -1 -1 0.11 19956 1 0.03 -1 -1 33708 -1 -1 11 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65656 57 29 202 203 1 143 97 17 17 289 -1 unnamed_device 25.8 MiB 0.04 667 10531 2201 7783 547 64.1 MiB 0.05 0.00 2.11498 -86.1894 -2.11498 2.11498 0.92 0.000331515 0.000301554 0.0169977 0.015488 30 1561 21 6.64007e+06 138138 526063. 1820.29 0.93 0.0591251 0.0520208 22546 126617 -1 1268 16 646 646 43813 11534 1.39065 1.39065 -81.4616 -1.39065 0 0 666494. 2306.21 0.28 0.03 0.12 -1 -1 0.28 0.012359 0.0110009 85 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 5.78 vpr 64.26 MiB -1 -1 0.11 20016 1 0.03 -1 -1 33956 -1 -1 13 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65800 65 33 230 231 1 164 111 17 17 289 -1 unnamed_device 25.8 MiB 0.04 868 13145 3010 9693 442 64.3 MiB 0.07 0.00 2.50829 -103.421 -2.50829 2.50829 0.89 0.000383295 0.000351932 0.0204197 0.0186878 30 1817 19 6.64007e+06 163254 526063. 1820.29 2.78 0.101452 0.0886338 22546 126617 -1 1542 13 610 610 44456 10941 1.39845 1.39845 -95.2543 -1.39845 0 0 666494. 2306.21 0.30 0.03 0.12 -1 -1 0.30 0.0121374 0.0108638 97 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 4.14 vpr 64.72 MiB -1 -1 0.12 20212 1 0.03 -1 -1 33616 -1 -1 19 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66272 97 49 342 343 1 246 165 17 17 289 -1 unnamed_device 25.9 MiB 0.06 1568 34065 14169 19781 115 64.7 MiB 0.17 0.00 3.38291 -182.49 -3.38291 3.38291 0.89 0.000577648 0.000522666 0.0438326 0.0400644 32 2884 17 6.64007e+06 238602 554710. 1919.41 0.94 0.111339 0.0994272 22834 132086 -1 2651 12 1032 1032 96525 21316 1.51625 1.51625 -150.019 -1.51625 0 0 701300. 2426.64 0.32 0.05 0.13 -1 -1 0.32 0.0164089 0.0147957 145 -1 -1 -1 -1 -1 - fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 6.91 vpr 65.15 MiB -1 -1 0.12 20552 1 0.03 -1 -1 33820 -1 -1 25 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66716 129 65 454 455 1 328 219 17 17 289 -1 unnamed_device 26.6 MiB 0.07 2005 50303 16107 29492 4704 65.2 MiB 0.24 0.01 4.25753 -269.889 -4.25753 4.25753 0.88 0.000758726 0.000697073 0.0588477 0.0539563 30 3994 32 6.64007e+06 313950 526063. 1820.29 3.57 0.263996 0.236392 22546 126617 -1 3418 18 1360 1360 120282 27724 1.95065 1.95065 -218.265 -1.95065 0 0 666494. 2306.21 0.30 0.07 0.12 -1 -1 0.30 0.028547 0.0257147 193 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 3.21 vpr 63.00 MiB -1 -1 0.09 19540 1 0.02 -1 -1 33420 -1 -1 2 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64508 7 4 27 28 1 14 13 17 17 289 -1 unnamed_device 24.6 MiB 0.01 45 88 36 48 4 63.0 MiB 0.00 0.00 0.824016 -7.37037 -0.824016 0.824016 0.88 5.0297e-05 4.3954e-05 0.000591441 0.000532679 12 108 7 6.65987e+06 25356 231691. 801.699 0.70 0.00381542 0.00337308 19090 58805 -1 104 6 32 32 2079 656 0.770048 0.770048 -7.85853 -0.770048 0 0 318358. 1101.58 0.15 0.01 0.06 -1 -1 0.15 0.00211988 0.00194855 10 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 4.37 vpr 63.00 MiB -1 -1 0.09 19440 1 0.02 -1 -1 33512 -1 -1 2 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64508 9 5 34 35 1 20 16 17 17 289 -1 unnamed_device 24.6 MiB 0.01 41 456 116 304 36 63.0 MiB 0.01 0.00 0.781048 -9.22036 -0.781048 0.781048 0.91 7.1198e-05 6.4397e-05 0.00180214 0.00161897 26 147 11 6.65987e+06 25356 477104. 1650.88 1.67 0.0185966 0.0152737 21682 110474 -1 111 8 83 83 4352 1424 0.890248 0.890248 -9.2053 -0.890248 0 0 585099. 2024.56 0.25 0.01 0.11 -1 -1 0.25 0.00259376 0.00234552 13 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 4.24 vpr 62.95 MiB -1 -1 0.10 19496 1 0.02 -1 -1 33532 -1 -1 2 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64460 11 6 41 42 1 26 19 17 17 289 -1 unnamed_device 24.4 MiB 0.01 72 1094 334 508 252 62.9 MiB 0.01 0.00 0.803048 -11.753 -0.803048 0.803048 0.89 7.8693e-05 7.0373e-05 0.00381032 0.00342528 26 208 13 6.65987e+06 25356 477104. 1650.88 1.50 0.0217254 0.0180867 21682 110474 -1 158 11 127 127 6178 1900 1.02145 1.02145 -12.4088 -1.02145 0 0 585099. 2024.56 0.24 0.01 0.11 -1 -1 0.24 0.00317635 0.00283099 16 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 3.57 vpr 63.05 MiB -1 -1 0.10 19572 1 0.02 -1 -1 33320 -1 -1 4 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64568 13 7 48 49 1 32 24 17 17 289 -1 unnamed_device 24.6 MiB 0.01 116 976 287 524 165 63.1 MiB 0.01 0.00 0.825048 -14.7932 -0.825048 0.825048 0.90 9.0181e-05 8.0828e-05 0.00295766 0.00267054 32 254 13 6.65987e+06 50712 554710. 1919.41 0.81 0.0139799 0.0118969 22834 132086 -1 224 16 152 152 8724 2737 0.923248 0.923248 -15.6599 -0.923248 0 0 701300. 2426.64 0.29 0.01 0.13 -1 -1 0.29 0.00419463 0.003677 20 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 4.64 vpr 63.10 MiB -1 -1 0.09 19880 1 0.02 -1 -1 33444 -1 -1 3 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64616 15 8 55 56 1 38 26 17 17 289 -1 unnamed_device 24.6 MiB 0.01 108 1090 278 634 178 63.1 MiB 0.01 0.00 1.18536 -17.031 -1.18536 1.18536 0.91 9.8709e-05 8.878e-05 0.00336964 0.00304646 26 310 14 6.65987e+06 38034 477104. 1650.88 1.90 0.0294708 0.0246302 21682 110474 -1 279 17 205 205 16408 4648 1.12359 1.12359 -19.3184 -1.12359 0 0 585099. 2024.56 0.26 0.01 0.11 -1 -1 0.26 0.0047261 0.00412162 22 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 3.47 vpr 62.80 MiB -1 -1 0.10 19672 1 0.02 -1 -1 33564 -1 -1 4 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64304 17 9 62 63 1 41 30 17 17 289 -1 unnamed_device 24.3 MiB 0.01 121 1870 577 901 392 62.8 MiB 0.01 0.00 1.19636 -19.7591 -1.19636 1.19636 0.90 0.000106371 9.5701e-05 0.00502841 0.00453978 26 318 12 6.65987e+06 50712 477104. 1650.88 0.72 0.0188598 0.0161288 21682 110474 -1 302 11 170 170 9595 2763 0.992389 0.992389 -20.881 -0.992389 0 0 585099. 2024.56 0.26 0.01 0.11 -1 -1 0.26 0.00427367 0.00379294 25 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 4.81 vpr 63.14 MiB -1 -1 0.10 19640 1 0.02 -1 -1 33340 -1 -1 4 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64656 19 10 69 70 1 44 33 17 17 289 -1 unnamed_device 24.6 MiB 0.01 130 1489 379 854 256 63.1 MiB 0.01 0.00 1.20736 -22.2972 -1.20736 1.20736 0.90 0.00012224 0.000110503 0.0041194 0.00374211 28 377 20 6.65987e+06 50712 500653. 1732.36 2.01 0.0380053 0.031801 21970 115934 -1 314 11 178 178 11897 3324 0.998248 0.998248 -22.9356 -0.998248 0 0 612192. 2118.31 0.27 0.01 0.11 -1 -1 0.27 0.00456224 0.00404354 28 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 4.71 vpr 63.24 MiB -1 -1 0.10 19748 1 0.02 -1 -1 33368 -1 -1 5 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64760 21 11 76 77 1 49 37 17 17 289 -1 unnamed_device 24.6 MiB 0.01 174 2721 690 1411 620 63.2 MiB 0.02 0.00 1.21836 -25.1455 -1.21836 1.21836 0.90 0.000138794 0.000125637 0.00667927 0.00608027 26 497 17 6.65987e+06 63390 477104. 1650.88 1.93 0.0433477 0.0366724 21682 110474 -1 428 17 239 239 26261 6885 1.23865 1.23865 -28.9047 -1.23865 0 0 585099. 2024.56 0.25 0.02 0.11 -1 -1 0.25 0.00612801 0.00534415 31 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 3.66 vpr 63.25 MiB -1 -1 0.11 19496 1 0.02 -1 -1 33328 -1 -1 5 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64764 23 12 83 84 1 55 40 17 17 289 -1 unnamed_device 24.7 MiB 0.01 167 2964 885 1525 554 63.2 MiB 0.02 0.00 1.22936 -27.524 -1.22936 1.22936 0.89 0.00014353 0.000129621 0.00701392 0.00634555 32 481 21 6.65987e+06 63390 554710. 1919.41 0.84 0.025841 0.0222749 22834 132086 -1 397 15 290 290 19600 5497 1.11845 1.11845 -28.5061 -1.11845 0 0 701300. 2426.64 0.28 0.02 0.13 -1 -1 0.28 0.00601913 0.00530333 34 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 3.62 vpr 62.90 MiB -1 -1 0.11 19560 1 0.02 -1 -1 33672 -1 -1 5 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64412 25 13 90 91 1 61 43 17 17 289 -1 unnamed_device 24.3 MiB 0.01 182 3793 1277 1774 742 62.9 MiB 0.02 0.00 1.24036 -30.1073 -1.24036 1.24036 0.88 0.000153489 0.000138445 0.00791755 0.00716073 30 543 18 6.65987e+06 63390 526063. 1820.29 0.80 0.027847 0.0240818 22546 126617 -1 420 14 289 289 16324 4910 1.14045 1.14045 -31.8023 -1.14045 0 0 666494. 2306.21 0.28 0.02 0.13 -1 -1 0.28 0.00601444 0.00531617 37 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 5.52 vpr 63.34 MiB -1 -1 0.10 19468 1 0.02 -1 -1 33644 -1 -1 6 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64856 27 14 97 98 1 67 47 17 17 289 -1 unnamed_device 25.0 MiB 0.02 242 3827 1191 1808 828 63.3 MiB 0.02 0.00 1.25136 -33.3667 -1.25136 1.25136 0.87 0.000161223 0.000145748 0.00817176 0.00740704 32 594 16 6.65987e+06 76068 554710. 1919.41 2.71 0.0462745 0.0394637 22834 132086 -1 545 17 340 340 25670 6823 1.24965 1.24965 -36.9541 -1.24965 0 0 701300. 2426.64 0.30 0.02 0.13 -1 -1 0.30 0.00703365 0.00617827 40 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 5.62 vpr 63.27 MiB -1 -1 0.09 19676 1 0.02 -1 -1 33548 -1 -1 7 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64792 29 15 104 105 1 73 51 17 17 289 -1 unnamed_device 24.9 MiB 0.02 232 4187 1348 1837 1002 63.3 MiB 0.02 0.00 1.26236 -35.7901 -1.26236 1.26236 0.89 0.000177153 0.000160897 0.00881913 0.00802788 32 800 28 6.65987e+06 88746 554710. 1919.41 2.77 0.0571037 0.0487195 22834 132086 -1 603 13 397 397 27493 8061 1.28265 1.28265 -39.3116 -1.28265 0 0 701300. 2426.64 0.28 0.02 0.13 -1 -1 0.28 0.00637319 0.00564804 44 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_015bits.v common 3.72 vpr 63.36 MiB -1 -1 0.10 19892 1 0.02 -1 -1 33844 -1 -1 7 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64884 31 16 111 112 1 79 54 17 17 289 -1 unnamed_device 25.0 MiB 0.02 288 4950 1999 2838 113 63.4 MiB 0.03 0.00 1.62267 -39.6644 -1.62267 1.62267 0.89 0.000190807 0.000173483 0.0101788 0.00926361 32 671 13 6.65987e+06 88746 554710. 1919.41 0.85 0.0326394 0.0284446 22834 132086 -1 585 18 353 353 29126 7622 1.29165 1.29165 -41.8381 -1.29165 0 0 701300. 2426.64 0.30 0.02 0.13 -1 -1 0.30 0.00825622 0.00722449 46 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_016bits.v common 5.47 vpr 63.28 MiB -1 -1 0.10 19904 1 0.02 -1 -1 33940 -1 -1 7 33 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64800 33 17 118 119 1 82 57 17 17 289 -1 unnamed_device 24.9 MiB 0.02 303 5834 2357 3389 88 63.3 MiB 0.03 0.00 1.63367 -43.2049 -1.63367 1.63367 0.86 0.000204176 0.00018516 0.0119445 0.0108869 30 727 28 6.65987e+06 88746 526063. 1820.29 2.64 0.0648982 0.0555712 22546 126617 -1 595 14 318 318 19065 5260 1.09525 1.09525 -41.784 -1.09525 0 0 666494. 2306.21 0.29 0.02 0.12 -1 -1 0.29 0.00743924 0.00658908 49 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 5.65 vpr 63.38 MiB -1 -1 0.09 19836 1 0.02 -1 -1 33984 -1 -1 8 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64896 37 19 132 133 1 90 64 17 17 289 -1 unnamed_device 24.9 MiB 0.02 345 7938 3016 3746 1176 63.4 MiB 0.04 0.00 1.65567 -49.0688 -1.65567 1.65567 0.91 0.000228321 0.000207954 0.0152922 0.0139531 32 909 18 6.65987e+06 101424 554710. 1919.41 2.71 0.0821771 0.0705667 22834 132086 -1 729 25 492 492 78096 30555 1.23745 1.23745 -49.6837 -1.23745 0 0 701300. 2426.64 0.30 0.04 0.13 -1 -1 0.30 0.0121753 0.0106348 55 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 6.01 vpr 63.61 MiB -1 -1 0.10 19976 1 0.02 -1 -1 33936 -1 -1 8 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65136 41 21 146 147 1 102 70 17 17 289 -1 unnamed_device 25.1 MiB 0.02 384 7846 3176 4532 138 63.6 MiB 0.04 0.00 1.67767 -55.9313 -1.67767 1.67767 0.91 0.000244643 0.000221751 0.014328 0.0130537 36 909 11 6.65987e+06 101424 612192. 2118.31 3.09 0.0821346 0.0706422 23410 145293 -1 762 13 408 408 27360 7471 1.25945 1.25945 -53.1799 -1.25945 0 0 782063. 2706.10 0.31 0.02 0.14 -1 -1 0.31 0.0079282 0.00705491 61 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 3.93 vpr 63.63 MiB -1 -1 0.11 19860 1 0.02 -1 -1 33912 -1 -1 10 45 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65160 45 23 160 161 1 114 78 17 17 289 -1 unnamed_device 25.1 MiB 0.02 501 8876 3644 5119 113 63.6 MiB 0.05 0.00 1.69967 -63.1909 -1.69967 1.69967 0.89 0.000262626 0.000239742 0.0159733 0.0145734 32 1200 36 6.65987e+06 126780 554710. 1919.41 1.01 0.0576292 0.050334 22834 132086 -1 979 16 534 534 49382 12273 1.37965 1.37965 -63.2348 -1.37965 0 0 701300. 2426.64 0.30 0.03 0.13 -1 -1 0.30 0.0104583 0.00929169 68 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 5.03 vpr 63.64 MiB -1 -1 0.11 19940 1 0.03 -1 -1 33992 -1 -1 10 49 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65164 49 25 174 175 1 123 84 17 17 289 -1 unnamed_device 25.3 MiB 0.02 511 5574 1066 4247 261 63.6 MiB 0.03 0.00 2.07098 -69.2626 -2.07098 2.07098 0.89 0.000295375 0.000268901 0.0102255 0.00934759 30 1199 20 6.65987e+06 126780 526063. 1820.29 2.11 0.0860745 0.0745113 22546 126617 -1 1034 28 579 579 69244 28894 1.31245 1.31245 -68.9833 -1.31245 0 0 666494. 2306.21 0.29 0.05 0.12 -1 -1 0.29 0.016278 0.0142635 73 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 5.92 vpr 63.86 MiB -1 -1 0.11 19808 1 0.03 -1 -1 33356 -1 -1 11 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65392 57 29 202 203 1 143 97 17 17 289 -1 unnamed_device 25.5 MiB 0.03 651 8311 1647 6236 428 63.9 MiB 0.05 0.00 2.11498 -86.6461 -2.11498 2.11498 0.89 0.00028761 0.000262811 0.0137671 0.0125971 34 1479 33 6.65987e+06 139458 585099. 2024.56 2.94 0.112758 0.0976851 23122 138558 -1 1255 14 614 614 43886 11861 1.35645 1.35645 -80.4066 -1.35645 0 0 742403. 2568.87 0.31 0.03 0.14 -1 -1 0.31 0.0112147 0.0100204 85 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 3.91 vpr 63.99 MiB -1 -1 0.10 19832 1 0.03 -1 -1 33832 -1 -1 13 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65524 65 33 230 231 1 164 111 17 17 289 -1 unnamed_device 25.5 MiB 0.03 868 11549 2508 8660 381 64.0 MiB 0.07 0.00 2.50829 -103.583 -2.50829 2.50829 0.87 0.00038094 0.000348589 0.0182409 0.0166921 32 1870 19 6.65987e+06 164814 554710. 1919.41 0.93 0.064973 0.0573011 22834 132086 -1 1593 16 706 706 64338 15403 1.33839 1.33839 -94.829 -1.33839 0 0 701300. 2426.64 0.29 0.04 0.13 -1 -1 0.29 0.0137768 0.0122182 97 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 4.25 vpr 64.88 MiB -1 -1 0.12 20340 1 0.03 -1 -1 33628 -1 -1 19 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66432 97 49 342 343 1 246 165 17 17 289 -1 unnamed_device 26.3 MiB 0.04 1535 34065 11310 19970 2785 64.9 MiB 0.17 0.00 3.38291 -182.175 -3.38291 3.38291 0.89 0.000546137 0.000498819 0.0437866 0.0400504 32 2999 48 6.65987e+06 240882 554710. 1919.41 1.08 0.138226 0.12298 22834 132086 -1 2717 15 1058 1058 103831 23767 1.66359 1.66359 -155.152 -1.66359 0 0 701300. 2426.64 0.28 0.05 0.13 -1 -1 0.28 0.0193885 0.0174469 145 -1 -1 -1 -1 -1 - fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 5.16 vpr 65.37 MiB -1 -1 0.13 20396 1 0.03 -1 -1 34072 -1 -1 25 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66936 129 65 454 455 1 328 219 17 17 289 -1 unnamed_device 26.7 MiB 0.06 1995 50303 15701 29972 4630 65.4 MiB 0.24 0.01 4.25753 -271.034 -4.25753 4.25753 0.88 0.000756923 0.000694141 0.0578788 0.0529594 34 3950 36 6.65987e+06 316950 585099. 2024.56 1.82 0.236249 0.211278 23122 138558 -1 3379 19 1306 1306 128726 32047 1.98365 1.98365 -219.716 -1.98365 0 0 742403. 2568.87 0.30 0.08 0.14 -1 -1 0.30 0.0305014 0.027501 193 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_003bits.v common 4.27 vpr 63.81 MiB -1 -1 0.10 19748 1 0.02 -1 -1 33272 -1 -1 1 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65344 7 4 27 28 1 12 12 17 17 289 -1 unnamed_device 25.4 MiB 0.02 35 142 65 72 5 63.8 MiB 0.00 0.00 0.712895 -7.85699 -0.712895 0.712895 0.89 4.722e-05 4.1811e-05 0.000791413 0.000709217 18 88 15 6.95648e+06 14475.7 376052. 1301.22 1.62 0.0153221 0.0125019 22882 88689 -1 83 6 30 30 1836 608 0.74674 0.74674 -8.48094 -0.74674 0 0 470940. 1629.55 0.19 0.01 0.09 -1 -1 0.19 0.00212196 0.00195282 5 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_004bits.v common 3.30 vpr 63.80 MiB -1 -1 0.10 19808 1 0.02 -1 -1 33708 -1 -1 1 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65328 9 5 34 35 1 15 15 17 17 289 -1 unnamed_device 25.3 MiB 0.02 31 339 89 221 29 63.8 MiB 0.01 0.00 0.583992 -8.96727 -0.583992 0.583992 0.92 6.417e-05 5.7453e-05 0.0015398 0.00138572 18 113 10 6.95648e+06 14475.7 376052. 1301.22 0.56 0.00989791 0.00836346 22882 88689 -1 104 15 86 86 5291 1783 0.74674 0.74674 -9.62957 -0.74674 0 0 470940. 1629.55 0.20 0.01 0.09 -1 -1 0.20 0.00298455 0.0026416 7 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_005bits.v common 4.42 vpr 63.93 MiB -1 -1 0.10 19708 1 0.02 -1 -1 33580 -1 -1 1 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65464 11 6 41 42 1 19 18 17 17 289 -1 unnamed_device 25.4 MiB 0.03 45 386 75 296 15 63.9 MiB 0.01 0.00 0.701895 -11.7042 -0.701895 0.701895 0.92 7.672e-05 6.8847e-05 0.00167611 0.0015169 20 173 9 6.95648e+06 14475.7 414966. 1435.87 1.66 0.00935896 0.00799138 23170 95770 -1 136 9 68 68 4041 1235 0.709292 0.709292 -12.5375 -0.709292 0 0 503264. 1741.40 0.22 0.01 0.10 -1 -1 0.22 0.00303201 0.00270605 8 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_006bits.v common 4.30 vpr 63.91 MiB -1 -1 0.08 19544 1 0.02 -1 -1 33368 -1 -1 2 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65444 13 7 48 49 1 25 22 17 17 289 -1 unnamed_device 25.4 MiB 0.03 102 442 97 336 9 63.9 MiB 0.01 0.00 0.834592 -15.6382 -0.834592 0.834592 0.92 8.9911e-05 8.0754e-05 0.00172468 0.00156196 14 254 10 6.95648e+06 28951.4 292583. 1012.40 1.60 0.019492 0.0162775 22018 70521 -1 241 10 99 99 5070 1754 0.927732 0.927732 -18.1833 -0.927732 0 0 376052. 1301.22 0.16 0.01 0.07 -1 -1 0.16 0.00313668 0.00282445 10 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_007bits.v common 4.70 vpr 64.03 MiB -1 -1 0.10 19824 1 0.02 -1 -1 33752 -1 -1 2 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65568 15 8 55 56 1 32 25 17 17 289 -1 unnamed_device 25.5 MiB 0.04 130 961 301 532 128 64.0 MiB 0.01 0.00 0.881906 -18.7043 -0.881906 0.881906 0.92 9.612e-05 8.5783e-05 0.00315095 0.00283813 26 276 13 6.95648e+06 28951.4 503264. 1741.40 1.84 0.0302063 0.0252273 24322 120374 -1 251 14 116 116 7345 2181 0.852632 0.852632 -19.0638 -0.852632 0 0 618332. 2139.56 0.26 0.01 0.12 -1 -1 0.26 0.00430406 0.00379059 11 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_008bits.v common 4.86 vpr 63.71 MiB -1 -1 0.10 19608 1 0.02 -1 -1 33664 -1 -1 2 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65236 17 9 62 63 1 37 28 17 17 289 -1 unnamed_device 25.2 MiB 0.04 257 910 229 586 95 63.7 MiB 0.01 0.00 0.852632 -22.7137 -0.852632 0.852632 0.94 0.000106953 9.6922e-05 0.00297725 0.00271904 26 481 15 6.95648e+06 28951.4 503264. 1741.40 2.02 0.0257943 0.0215932 24322 120374 -1 456 15 194 194 15045 3456 0.949732 0.949732 -25.2621 -0.949732 0 0 618332. 2139.56 0.25 0.01 0.08 -1 -1 0.25 0.0049193 0.00432391 13 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_009bits.v common 5.66 vpr 63.85 MiB -1 -1 0.10 19540 1 0.02 -1 -1 33504 -1 -1 2 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65380 19 10 69 70 1 44 31 17 17 289 -1 unnamed_device 25.3 MiB 0.04 130 1471 299 1132 40 63.8 MiB 0.01 0.00 1.04807 -22.9622 -1.04807 1.04807 0.92 0.000123709 0.000111415 0.00443891 0.00401812 32 391 12 6.95648e+06 28951.4 586450. 2029.24 2.75 0.0296558 0.0251148 25474 144626 -1 350 12 174 174 11501 3459 1.01093 1.01093 -25.4311 -1.01093 0 0 744469. 2576.02 0.29 0.01 0.14 -1 -1 0.29 0.00474861 0.00422204 14 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_010bits.v common 5.38 vpr 64.14 MiB -1 -1 0.09 19704 1 0.02 -1 -1 33624 -1 -1 2 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65680 21 11 76 77 1 49 34 17 17 289 -1 unnamed_device 25.6 MiB 0.04 132 1464 547 909 8 64.1 MiB 0.01 0.00 0.896632 -24.9691 -0.896632 0.896632 0.93 0.00013025 0.00011742 0.00422334 0.00381474 32 447 35 6.95648e+06 28951.4 586450. 2029.24 2.41 0.0532754 0.0444342 25474 144626 -1 365 13 268 268 18686 5473 1.16733 1.16733 -26.3322 -1.16733 0 0 744469. 2576.02 0.30 0.02 0.14 -1 -1 0.30 0.00527937 0.00467253 16 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_011bits.v common 5.44 vpr 63.98 MiB -1 -1 0.10 19536 1 0.02 -1 -1 33352 -1 -1 3 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65520 23 12 83 84 1 55 38 17 17 289 -1 unnamed_device 25.4 MiB 0.04 156 1235 276 946 13 64.0 MiB 0.01 0.00 0.879432 -27.3624 -0.879432 0.879432 0.92 0.000141762 0.000128098 0.00351223 0.00319437 30 551 16 6.95648e+06 43427 556674. 1926.21 2.53 0.0432829 0.0363771 25186 138497 -1 446 15 316 316 20563 6066 1.11423 1.11423 -32.014 -1.11423 0 0 706193. 2443.58 0.30 0.02 0.13 -1 -1 0.30 0.00603774 0.0053429 17 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_012bits.v common 5.10 vpr 63.91 MiB -1 -1 0.10 19588 1 0.02 -1 -1 33356 -1 -1 3 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65440 25 13 90 91 1 60 41 17 17 289 -1 unnamed_device 25.6 MiB 0.04 171 1581 310 1236 35 63.9 MiB 0.01 0.00 0.918632 -29.9024 -0.918632 0.918632 0.90 0.000154624 0.0001401 0.00423029 0.00385757 26 673 21 6.95648e+06 43427 503264. 1741.40 2.22 0.0484546 0.0408737 24322 120374 -1 539 13 337 337 23477 7010 1.26153 1.26153 -37.4109 -1.26153 0 0 618332. 2139.56 0.26 0.02 0.11 -1 -1 0.26 0.00583195 0.00518571 19 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_013bits.v common 4.29 vpr 64.12 MiB -1 -1 0.11 19656 1 0.02 -1 -1 33308 -1 -1 3 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65664 27 14 97 98 1 66 44 17 17 289 -1 unnamed_device 25.8 MiB 0.04 436 1584 370 1078 136 64.1 MiB 0.01 0.00 0.951632 -37.9619 -0.951632 0.951632 0.92 0.000171271 0.000155854 0.00419019 0.00384335 34 885 23 6.95648e+06 43427 618332. 2139.56 1.33 0.0403286 0.0342239 25762 151098 -1 806 17 347 347 36876 7808 1.30553 1.30553 -44.5658 -1.30553 0 0 787024. 2723.27 0.30 0.02 0.14 -1 -1 0.30 0.00730527 0.0064351 20 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_014bits.v common 4.39 vpr 64.26 MiB -1 -1 0.10 19416 1 0.02 -1 -1 33476 -1 -1 4 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65804 29 15 104 105 1 72 48 17 17 289 -1 unnamed_device 25.9 MiB 0.03 474 4050 1146 2192 712 64.3 MiB 0.02 0.00 0.951632 -40.2713 -0.951632 0.951632 0.92 0.00017651 0.000160588 0.00896853 0.00816494 34 959 25 6.95648e+06 57902.7 618332. 2139.56 1.42 0.0479897 0.0411236 25762 151098 -1 873 14 421 421 42469 9106 1.20223 1.20223 -46.6538 -1.20223 0 0 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65772 33 17 118 119 1 81 54 17 17 289 -1 unnamed_device 25.8 MiB 0.07 279 4848 1968 2843 37 64.2 MiB 0.03 0.00 1.34496 -43.5864 -1.34496 1.34496 0.92 0.000205954 0.000186819 0.0106433 0.00968193 34 923 38 6.95648e+06 57902.7 618332. 2139.56 1.45 0.0592112 0.050606 25762 151098 -1 716 17 477 477 43571 11025 1.25333 1.25333 -47.3958 -1.25333 0 0 787024. 2723.27 0.32 0.03 0.14 -1 -1 0.32 0.0087412 0.00770493 25 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_018bits.v common 4.51 vpr 64.24 MiB -1 -1 0.10 19732 1 0.02 -1 -1 33764 -1 -1 4 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65784 37 19 132 133 1 87 60 17 17 289 -1 unnamed_device 25.7 MiB 0.09 365 6144 2547 3561 36 64.2 MiB 0.04 0.00 1.36696 -50.3211 -1.36696 1.36696 0.91 0.000230973 0.000210196 0.013117 0.0119685 34 914 16 6.95648e+06 57902.7 618332. 2139.56 1.47 0.0482411 0.0419279 25762 151098 -1 827 19 499 499 56308 12309 1.22703 1.22703 -54.4758 -1.22703 0 0 787024. 2723.27 0.30 0.03 0.15 -1 -1 0.30 0.0103702 0.00910386 28 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_020bits.v common 6.84 vpr 64.16 MiB -1 -1 0.10 19732 1 0.02 -1 -1 33908 -1 -1 4 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65700 41 21 146 147 1 96 66 17 17 289 -1 unnamed_device 25.7 MiB 0.10 353 6716 2777 3889 50 64.2 MiB 0.04 0.00 1.38896 -56.1965 -1.38896 1.38896 0.92 0.000239166 0.000216521 0.0134078 0.0122153 36 1026 41 6.95648e+06 57902.7 648988. 2245.63 3.74 0.0913198 0.0784395 26050 158493 -1 850 18 534 534 49942 12071 1.39633 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success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66124 49 25 174 175 1 119 79 17 17 289 -1 unnamed_device 26.0 MiB 0.10 449 10895 4547 6264 84 64.6 MiB 0.06 0.00 1.43296 -68.3754 -1.43296 1.43296 0.93 0.000283575 0.000257811 0.0207575 0.0189723 38 1154 34 6.95648e+06 72378.4 678818. 2348.85 2.00 0.0927262 0.0812127 26626 170182 -1 983 17 666 666 64300 15447 1.41833 1.41833 -73.0392 -1.41833 0 0 902133. 3121.57 0.35 0.04 0.16 -1 -1 0.35 0.01197 0.0106297 37 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_028bits.v common 7.66 vpr 64.66 MiB -1 -1 0.11 19800 1 0.02 -1 -1 33592 -1 -1 6 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66216 57 29 202 203 1 142 92 17 17 289 -1 unnamed_device 26.1 MiB 0.08 552 14789 6414 8303 72 64.7 MiB 0.07 0.00 1.47696 -82.0834 -1.47696 1.47696 0.92 0.000312229 0.000286651 0.025195 0.0229503 46 1430 36 6.95648e+06 86854.1 828058. 2865.25 4.38 0.15742 0.137121 28066 200906 -1 1169 18 809 809 80510 19780 1.48433 1.48433 -86.6209 -1.48433 0 0 1.01997e+06 3529.29 0.39 0.04 0.20 -1 -1 0.39 0.0134001 0.0119226 43 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_032bits.v common 5.15 vpr 64.85 MiB -1 -1 0.10 19864 1 0.03 -1 -1 33772 -1 -1 7 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66404 65 33 230 231 1 162 105 17 17 289 -1 unnamed_device 26.4 MiB 0.09 753 15419 6653 8659 107 64.8 MiB 0.08 0.00 1.88129 -97.4586 -1.88129 1.88129 0.92 0.000384935 0.000351104 0.0256366 0.0234192 40 1765 33 6.95648e+06 101330 706193. 2443.58 1.94 0.113125 0.0989798 26914 176310 -1 1469 17 868 868 116248 27026 1.43363 1.43363 -98.4886 -1.43363 0 0 926341. 3205.33 0.36 0.05 0.18 -1 -1 0.36 0.0153222 0.0136381 49 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_048bits.v common 6.36 vpr 65.34 MiB -1 -1 0.12 20000 1 0.03 -1 -1 34016 -1 -1 10 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66904 97 49 342 343 1 243 156 17 17 289 -1 unnamed_device 26.6 MiB 0.10 1496 27810 8354 17704 1752 65.3 MiB 0.13 0.00 2.41762 -167.817 -2.41762 2.41762 0.92 0.000572479 0.000522909 0.0385511 0.0351968 48 3131 48 6.95648e+06 144757 865456. 2994.66 2.87 0.186983 0.165593 28354 207349 -1 2706 21 1149 1149 233785 50932 1.72383 1.72383 -165.664 -1.72383 0 0 1.05005e+06 3633.38 0.41 0.09 0.21 -1 -1 0.41 0.0255779 0.0228793 73 -1 -1 -1 -1 -1 - fixed_k6_frac_2ripple_N8_22nm.xml adder_064bits.v common 10.17 vpr 66.20 MiB -1 -1 0.12 20332 1 0.03 -1 -1 34084 -1 -1 13 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67792 129 65 454 455 1 324 207 17 17 289 -1 unnamed_device 27.4 MiB 0.12 2187 38763 11991 23991 2781 66.2 MiB 0.19 0.01 2.95395 -243.557 -2.95395 2.95395 0.89 0.000752432 0.000689777 0.0499989 0.0458212 62 3723 20 6.95648e+06 188184 1.05005e+06 3633.38 6.46 0.316247 0.281724 30946 263737 -1 3363 18 1461 1461 187618 35225 1.73803 1.73803 -214.363 -1.73803 0 0 1.30136e+06 4502.97 0.48 0.08 0.27 -1 -1 0.48 0.0302756 0.0273943 97 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_003bits.v common 3.05 vpr 63.66 MiB -1 -1 0.09 19536 1 0.02 -1 -1 33500 -1 -1 1 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65188 7 4 27 28 1 13 12 17 17 289 -1 unnamed_device 25.2 MiB 0.01 38 142 63 74 5 63.7 MiB 0.00 0.00 0.815432 -8.51669 -0.815432 0.815432 0.89 5.4419e-05 4.8471e-05 0.000855085 0.000765866 14 105 9 6.99608e+06 14715.7 292583. 1012.40 0.44 0.00346012 0.00308775 22018 70521 -1 87 5 26 26 1498 534 0.87204 0.87204 -8.99744 -0.87204 0 0 376052. 1301.22 0.16 0.01 0.07 -1 -1 0.16 0.00196072 0.00181392 5 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_004bits.v common 4.64 vpr 63.43 MiB -1 -1 0.10 19440 1 0.02 -1 -1 33544 -1 -1 1 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64952 9 5 34 35 1 17 15 17 17 289 -1 unnamed_device 25.0 MiB 0.01 35 375 107 237 31 63.4 MiB 0.01 0.00 0.712895 -9.56286 -0.712895 0.712895 0.89 6.2666e-05 5.6059e-05 0.00165658 0.00148516 22 124 12 6.99608e+06 14715.7 443629. 1535.05 1.93 0.0181867 0.014992 23458 102101 -1 87 6 38 38 1755 619 0.74674 0.74674 -9.34806 -0.74674 0 0 531479. 1839.03 0.23 0.01 0.10 -1 -1 0.23 0.00239912 0.00219471 7 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_005bits.v common 4.35 vpr 63.69 MiB -1 -1 0.10 19600 1 0.02 -1 -1 33424 -1 -1 1 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65220 11 6 41 42 1 20 18 17 17 289 -1 unnamed_device 25.1 MiB 0.01 44 409 94 303 12 63.7 MiB 0.00 0.00 0.837432 -12.9697 -0.837432 0.837432 0.92 7.8263e-05 7.0751e-05 0.00171149 0.00154987 26 147 10 6.99608e+06 14715.7 503264. 1741.40 1.54 0.0196637 0.0163264 24322 120374 -1 145 5 50 50 3581 1091 0.837432 0.837432 -14.3301 -0.837432 0 0 618332. 2139.56 0.25 0.01 0.12 -1 -1 0.25 0.00245403 0.00224204 8 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_006bits.v common 4.62 vpr 63.70 MiB -1 -1 0.10 19644 1 0.02 -1 -1 33580 -1 -1 2 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65232 13 7 48 49 1 25 22 17 17 289 -1 unnamed_device 25.2 MiB 0.01 105 502 118 371 13 63.7 MiB 0.01 0.00 0.87204 -15.6049 -0.87204 0.87204 0.92 8.8521e-05 7.8422e-05 0.00190989 0.00172291 26 223 11 6.99608e+06 29431.4 503264. 1741.40 1.79 0.0230082 0.0191272 24322 120374 -1 213 6 57 57 3676 1011 0.99734 0.99734 -16.2101 -0.99734 0 0 618332. 2139.56 0.25 0.01 0.12 -1 -1 0.25 0.0026128 0.00237992 10 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_007bits.v common 3.59 vpr 63.75 MiB -1 -1 0.09 19568 1 0.02 -1 -1 33724 -1 -1 2 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65280 15 8 55 56 1 32 25 17 17 289 -1 unnamed_device 25.3 MiB 0.01 221 889 226 585 78 63.8 MiB 0.01 0.00 0.859432 -20.3506 -0.859432 0.859432 0.93 9.6431e-05 8.7207e-05 0.0029756 0.0026949 26 397 12 6.99608e+06 29431.4 503264. 1741.40 0.74 0.0153267 0.0130701 24322 120374 -1 368 9 105 105 10800 2361 0.87204 0.87204 -22.2128 -0.87204 0 0 618332. 2139.56 0.25 0.01 0.12 -1 -1 0.25 0.00341109 0.00305689 11 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_008bits.v common 4.90 vpr 63.80 MiB -1 -1 0.09 19636 1 0.02 -1 -1 33644 -1 -1 2 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65336 17 9 62 63 1 36 28 17 17 289 -1 unnamed_device 25.3 MiB 0.01 254 910 227 603 80 63.8 MiB 0.01 0.00 0.835432 -22.1941 -0.835432 0.835432 0.92 0.000106295 9.5925e-05 0.00292783 0.00266375 26 488 14 6.99608e+06 29431.4 503264. 1741.40 2.08 0.0252854 0.0211642 24322 120374 -1 456 13 159 159 15996 3757 1.05303 1.05303 -25.2756 -1.05303 0 0 618332. 2139.56 0.26 0.01 0.11 -1 -1 0.26 0.00470058 0.00412398 13 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_009bits.v common 3.69 vpr 63.88 MiB -1 -1 0.10 19436 1 0.02 -1 -1 33656 -1 -1 2 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65408 19 10 69 70 1 44 31 17 17 289 -1 unnamed_device 25.3 MiB 0.01 127 1327 280 1001 46 63.9 MiB 0.01 0.00 0.99734 -22.7448 -0.99734 0.99734 0.92 0.000102382 9.0931e-05 0.00364914 0.00328256 30 407 16 6.99608e+06 29431.4 556674. 1926.21 0.84 0.0192024 0.016373 25186 138497 -1 334 18 219 219 12513 3719 0.968879 0.968879 -24.6339 -0.968879 0 0 706193. 2443.58 0.29 0.02 0.13 -1 -1 0.29 0.0054396 0.00474949 14 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_010bits.v common 4.85 vpr 63.62 MiB -1 -1 0.09 19548 1 0.02 -1 -1 33720 -1 -1 2 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65144 21 11 76 77 1 49 34 17 17 289 -1 unnamed_device 25.0 MiB 0.01 126 1574 441 793 340 63.6 MiB 0.01 0.00 0.857432 -24.0154 -0.857432 0.857432 0.94 0.000134399 0.000121811 0.00452806 0.00411509 30 434 27 6.99608e+06 29431.4 556674. 1926.21 1.94 0.0420514 0.0352497 25186 138497 -1 351 23 370 370 16172 5279 0.982732 0.982732 -25.8412 -0.982732 0 0 706193. 2443.58 0.29 0.02 0.13 -1 -1 0.29 0.00720402 0.00622013 16 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_011bits.v common 4.73 vpr 63.80 MiB -1 -1 0.09 19468 1 0.02 -1 -1 33444 -1 -1 3 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65336 23 12 83 84 1 54 38 17 17 289 -1 unnamed_device 25.2 MiB 0.02 183 1550 351 1152 47 63.8 MiB 0.01 0.00 0.99734 -28.2495 -0.99734 0.99734 0.93 0.000151455 0.000127293 0.00418226 0.00377875 30 528 14 6.99608e+06 44147 556674. 1926.21 1.80 0.0379492 0.0320619 25186 138497 -1 439 11 227 227 13305 3948 1.08603 1.08603 -31.0258 -1.08603 0 0 706193. 2443.58 0.30 0.01 0.13 -1 -1 0.30 0.00509381 0.00454639 17 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_012bits.v common 5.49 vpr 63.81 MiB -1 -1 0.10 19604 1 0.02 -1 -1 33560 -1 -1 3 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65340 25 13 90 91 1 60 41 17 17 289 -1 unnamed_device 25.2 MiB 0.02 204 1721 329 1376 16 63.8 MiB 0.01 0.00 0.890432 -30.9922 -0.890432 0.890432 0.89 0.000147547 0.000132853 0.00454376 0.00411778 30 568 17 6.99608e+06 44147 556674. 1926.21 2.62 0.0472861 0.039886 25186 138497 -1 444 15 282 282 18370 4786 0.984679 0.984679 -32.4857 -0.984679 0 0 706193. 2443.58 0.29 0.02 0.13 -1 -1 0.29 0.00619035 0.00543248 19 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_013bits.v common 4.30 vpr 63.71 MiB -1 -1 0.10 19812 1 0.02 -1 -1 33680 -1 -1 3 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65236 27 14 97 98 1 66 44 17 17 289 -1 unnamed_device 25.1 MiB 0.02 436 1892 450 1259 183 63.7 MiB 0.01 0.00 0.912432 -36.8018 -0.912432 0.912432 0.92 0.000176032 0.000160634 0.00482704 0.00441405 34 871 31 6.99608e+06 44147 618332. 2139.56 1.37 0.0435822 0.0368844 25762 151098 -1 817 14 336 336 38351 7943 1.13198 1.13198 -42.3609 -1.13198 0 0 787024. 2723.27 0.30 0.02 0.14 -1 -1 0.30 0.00606592 0.00536456 20 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_014bits.v common 4.44 vpr 63.91 MiB -1 -1 0.09 19608 1 0.02 -1 -1 33556 -1 -1 4 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65448 29 15 104 105 1 72 48 17 17 289 -1 unnamed_device 25.6 MiB 0.02 450 1875 444 1300 131 63.9 MiB 0.01 0.00 0.923432 -40.3253 -0.923432 0.923432 0.92 0.000180277 0.000163495 0.00461299 0.00422003 34 954 25 6.99608e+06 58862.7 618332. 2139.56 1.46 0.044531 0.0378702 25762 151098 -1 848 13 411 411 49168 9894 1.10803 1.10803 -44.6937 -1.10803 0 0 787024. 2723.27 0.32 0.02 0.15 -1 -1 0.32 0.00651785 0.00578674 23 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_015bits.v common 6.04 vpr 64.00 MiB -1 -1 0.09 19676 1 0.02 -1 -1 33604 -1 -1 3 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65540 31 16 111 112 1 78 50 17 17 289 -1 unnamed_device 25.6 MiB 0.02 264 3730 1488 2207 35 64.0 MiB 0.02 0.00 1.29476 -39.8553 -1.29476 1.29476 0.92 0.00019029 0.0001728 0.00858738 0.00781918 34 830 27 6.99608e+06 44147 618332. 2139.56 3.06 0.0577929 0.0493066 25762 151098 -1 649 16 443 443 44830 11455 1.24233 1.24233 -43.4292 -1.24233 0 0 787024. 2723.27 0.32 0.02 0.15 -1 -1 0.32 0.00776076 0.00684006 24 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_016bits.v common 4.39 vpr 63.82 MiB -1 -1 0.10 19776 1 0.02 -1 -1 34040 -1 -1 4 33 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65352 33 17 118 119 1 81 54 17 17 289 -1 unnamed_device 25.4 MiB 0.02 281 4848 2013 2797 38 63.8 MiB 0.03 0.00 1.30576 -42.5699 -1.30576 1.30576 0.91 0.00021795 0.000198641 0.0106027 0.00966231 34 847 23 6.99608e+06 58862.7 618332. 2139.56 1.39 0.05343 0.0457506 25762 151098 -1 680 17 456 456 48100 11874 1.30833 1.30833 -48.5698 -1.30833 0 0 787024. 2723.27 0.32 0.03 0.15 -1 -1 0.32 0.00857701 0.00753958 25 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_018bits.v common 4.52 vpr 64.17 MiB -1 -1 0.11 19880 1 0.02 -1 -1 34056 -1 -1 4 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65708 37 19 132 133 1 87 60 17 17 289 -1 unnamed_device 25.8 MiB 0.02 364 6027 2460 3523 44 64.2 MiB 0.03 0.00 1.33876 -49.9999 -1.33876 1.33876 0.91 0.000230907 0.000209332 0.0127747 0.0116228 34 980 21 6.99608e+06 58862.7 618332. 2139.56 1.52 0.060715 0.0522377 25762 151098 -1 784 15 444 444 47792 10699 1.25718 1.25718 -53.9315 -1.25718 0 0 787024. 2723.27 0.31 0.03 0.15 -1 -1 0.31 0.00869937 0.00772583 28 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_020bits.v common 4.52 vpr 64.25 MiB -1 -1 0.09 19836 1 0.02 -1 -1 33892 -1 -1 4 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65788 41 21 146 147 1 94 66 17 17 289 -1 unnamed_device 25.8 MiB 0.03 346 6716 2738 3934 44 64.2 MiB 0.04 0.00 1.34976 -55.1748 -1.34976 1.34976 0.90 0.000246274 0.00022435 0.0135315 0.0123474 34 1160 49 6.99608e+06 58862.7 618332. 2139.56 1.58 0.0757723 0.0652418 25762 151098 -1 857 16 510 510 51385 11794 1.25718 1.25718 -58.5102 -1.25718 0 0 787024. 2723.27 0.31 0.03 0.14 -1 -1 0.31 0.00987005 0.00875855 31 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_022bits.v common 6.45 vpr 64.28 MiB -1 -1 0.11 19864 1 0.02 -1 -1 33952 -1 -1 5 45 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65824 45 23 160 161 1 107 73 17 17 289 -1 unnamed_device 25.8 MiB 0.03 396 8889 3651 5188 50 64.3 MiB 0.05 0.00 1.37176 -60.7615 -1.37176 1.37176 0.93 0.000274854 0.000250777 0.0173546 0.0158532 36 1206 32 6.99608e+06 73578.4 648988. 2245.63 3.37 0.107921 0.0932114 26050 158493 -1 910 20 565 565 82385 22392 1.85353 1.85353 -73.992 -1.85353 0 0 828058. 2865.25 0.32 0.04 0.16 -1 -1 0.32 0.0124746 0.0110191 34 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_024bits.v common 7.12 vpr 64.45 MiB -1 -1 0.11 19660 1 0.02 -1 -1 33900 -1 -1 5 49 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65992 49 25 174 175 1 118 79 17 17 289 -1 unnamed_device 25.9 MiB 0.03 445 10895 4568 6256 71 64.4 MiB 0.06 0.00 1.39376 -67.8862 -1.39376 1.39376 0.92 0.00029629 0.000269674 0.0202316 0.018472 38 1308 26 6.99608e+06 73578.4 678818. 2348.85 4.04 0.114493 0.0991909 26626 170182 -1 975 16 636 636 50572 12478 1.27103 1.27103 -69.3712 -1.27103 0 0 902133. 3121.57 0.34 0.03 0.16 -1 -1 0.34 0.0113973 0.0101612 37 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_028bits.v common 9.20 vpr 64.27 MiB -1 -1 0.11 19920 1 0.03 -1 -1 33740 -1 -1 6 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65808 57 29 202 203 1 141 92 17 17 289 -1 unnamed_device 25.7 MiB 0.04 635 14168 6072 8041 55 64.3 MiB 0.06 0.00 1.43776 -80.6872 -1.43776 1.43776 0.90 0.000324779 0.000294129 0.0224158 0.0204149 38 1507 22 6.99608e+06 88294.1 678818. 2348.85 6.07 0.158912 0.13775 26626 170182 -1 1188 20 693 693 57031 13881 1.29303 1.29303 -80.6956 -1.29303 0 0 902133. 3121.57 0.35 0.04 0.17 -1 -1 0.35 0.0146591 0.0129765 43 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_032bits.v common 7.40 vpr 64.48 MiB -1 -1 0.11 19812 1 0.03 -1 -1 33676 -1 -1 7 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66028 65 33 230 231 1 162 105 17 17 289 -1 unnamed_device 26.1 MiB 0.04 752 15419 6606 8671 142 64.5 MiB 0.08 0.00 1.85309 -96.2187 -1.85309 1.85309 0.93 0.000389307 0.000348527 0.0258503 0.0235965 40 1653 26 6.99608e+06 103010 706193. 2443.58 4.23 0.143454 0.125019 26914 176310 -1 1419 15 778 778 81665 18423 1.52633 1.52633 -101 -1.52633 0 0 926341. 3205.33 0.34 0.04 0.17 -1 -1 0.34 0.0137942 0.0123104 49 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_048bits.v common 9.45 vpr 65.37 MiB -1 -1 0.12 20328 1 0.03 -1 -1 33832 -1 -1 10 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66940 97 49 342 343 1 243 156 17 17 289 -1 unnamed_device 26.6 MiB 0.05 1468 27810 8060 18307 1443 65.4 MiB 0.13 0.00 2.38942 -165.278 -2.38942 2.38942 0.91 0.00054444 0.000497823 0.0396118 0.0363077 48 2904 38 6.99608e+06 147157 865456. 2994.66 5.97 0.270486 0.238812 28354 207349 -1 2578 27 1313 1313 404571 187954 1.52003 1.52003 -157.689 -1.52003 0 0 1.05005e+06 3633.38 0.40 0.15 0.20 -1 -1 0.40 0.0314687 0.028059 73 -1 -1 -1 -1 -1 - fixed_k6_frac_2uripple_N8_22nm.xml adder_064bits.v common 6.58 vpr 66.07 MiB -1 -1 0.13 20484 1 0.03 -1 -1 34092 -1 -1 13 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67652 129 65 454 455 1 324 207 17 17 289 -1 unnamed_device 27.3 MiB 0.07 2210 38763 12390 23782 2591 66.1 MiB 0.17 0.00 2.92575 -242.6 -2.92575 2.92575 0.90 0.000772482 0.000708307 0.0474759 0.04345 50 3883 38 6.99608e+06 191304 902133. 3121.57 3.11 0.230821 0.206324 28642 213929 -1 3684 16 1457 1457 205560 42967 1.81463 1.81463 -221.66 -1.81463 0 0 1.08113e+06 3740.92 0.42 0.09 0.19 -1 -1 0.42 0.0270829 0.0245616 97 -1 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_003bits.v common 3.24 vpr 62.86 MiB -1 -1 0.09 19548 1 0.06 -1 -1 35476 -1 -1 1 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64364 7 4 21 25 1 11 12 17 17 289 -1 unnamed_device 24.5 MiB 0.01 84 103 37 64 2 62.9 MiB 0.00 0.00 0.77095 -8.74779 -0.77095 0.77095 0.90 4.3829e-05 3.8311e-05 0.000632852 0.000562417 18 137 6 6.79088e+06 13472 376052. 1301.22 0.52 0.00281844 0.00254676 22222 88205 -1 138 8 40 40 3761 958 0.834592 0.834592 -9.43991 -0.834592 0 0 470940. 1629.55 0.20 0.01 0.09 -1 -1 0.20 0.00222987 0.00203063 6 4 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_004bits.v common 4.05 vpr 62.87 MiB -1 -1 0.09 19772 2 0.06 -1 -1 35624 -1 -1 1 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64380 9 5 28 33 1 16 15 17 17 289 -1 unnamed_device 24.4 MiB 0.01 35 357 92 226 39 62.9 MiB 0.01 0.00 0.883748 -9.933 -0.883748 0.883748 0.93 5.9008e-05 5.2556e-05 0.00154131 0.00138325 18 137 12 6.79088e+06 13472 376052. 1301.22 1.29 0.00715763 0.00614737 22222 88205 -1 113 7 46 46 2303 814 0.883748 0.883748 -10.8459 -0.883748 0 0 470940. 1629.55 0.20 0.01 0.09 -1 -1 0.20 0.00241532 0.00218541 8 6 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_005bits.v common 3.97 vpr 62.94 MiB -1 -1 0.10 19596 2 0.06 -1 -1 35804 -1 -1 2 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64448 11 6 34 40 1 23 19 17 17 289 -1 unnamed_device 24.5 MiB 0.01 64 419 103 298 18 62.9 MiB 0.01 0.00 1.02368 -13.4613 -1.02368 1.02368 0.92 7.7214e-05 6.9144e-05 0.00168073 0.0015107 18 183 9 6.79088e+06 26944 376052. 1301.22 1.22 0.00725036 0.00628649 22222 88205 -1 175 6 65 73 3073 1098 1.02368 1.02368 -14.8017 -1.02368 0 0 470940. 1629.55 0.20 0.01 0.09 -1 -1 0.20 0.00261082 0.00237408 10 7 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_006bits.v common 5.44 vpr 63.04 MiB -1 -1 0.10 19952 3 0.06 -1 -1 35520 -1 -1 2 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64556 13 7 41 48 1 30 22 17 17 289 -1 unnamed_device 24.6 MiB 0.01 76 532 100 418 14 63.0 MiB 0.01 0.00 1.14898 -15.9034 -1.14898 1.14898 0.93 8.8793e-05 7.9489e-05 0.00205104 0.00185051 30 236 11 6.79088e+06 26944 556674. 1926.21 2.52 0.0237554 0.0197041 24526 138013 -1 187 7 66 72 3029 945 1.05944 1.05944 -16.3296 -1.05944 0 0 706193. 2443.58 0.30 0.01 0.13 -1 -1 0.30 0.00301096 0.00272878 11 9 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_007bits.v common 3.56 vpr 62.98 MiB -1 -1 0.10 19616 3 0.06 -1 -1 35348 -1 -1 2 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64496 15 8 47 55 1 36 25 17 17 289 -1 unnamed_device 24.5 MiB 0.01 104 1285 405 745 135 63.0 MiB 0.01 0.00 1.18818 -18.8265 -1.18818 1.18818 0.91 9.192e-05 8.2581e-05 0.00383608 0.00346472 26 333 14 6.79088e+06 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 64744 21 11 69 80 1 55 35 17 17 289 -1 unnamed_device 24.7 MiB 0.20 300 2030 503 1451 76 63.2 MiB 0.02 0.00 1.85398 -35.071 -1.85398 1.85398 0.94 0.000146119 0.000131415 0.00601448 0.00547059 28 657 18 6.79088e+06 40416 531479. 1839.03 0.83 0.0251114 0.0215748 23950 126010 -1 617 13 210 249 23281 5467 1.60338 1.60338 -35.1153 -1.60338 0 0 648988. 2245.63 0.26 0.02 0.12 -1 -1 0.26 0.00548026 0.00485703 21 17 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_011bits.v common 5.04 vpr 63.16 MiB -1 -1 0.10 19544 5 0.06 -1 -1 35652 -1 -1 3 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64680 23 12 76 88 1 61 38 17 17 289 -1 unnamed_device 24.6 MiB 0.11 166 1865 679 1174 12 63.2 MiB 0.01 0.00 1.90432 -33.8065 -1.90432 1.90432 0.92 0.000162759 0.000150229 0.00494476 0.00448798 30 577 30 6.79088e+06 40416 556674. 1926.21 2.08 0.0480968 0.0406835 24526 138013 -1 446 11 322 376 14998 5053 1.72519 1.72519 -33.4029 -1.72519 0 0 706193. 2443.58 0.28 0.01 0.13 -1 -1 0.28 0.0055083 0.00494041 22 19 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_012bits.v common 4.93 vpr 63.43 MiB -1 -1 0.10 19616 5 0.06 -1 -1 35288 -1 -1 3 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64952 25 13 83 96 1 66 41 17 17 289 -1 unnamed_device 24.8 MiB 0.19 220 1581 312 1246 23 63.4 MiB 0.01 0.00 1.86512 -39.3139 -1.86512 1.86512 0.90 0.000152172 0.000137641 0.00448051 0.00406681 30 646 19 6.79088e+06 40416 556674. 1926.21 1.83 0.043588 0.036785 24526 138013 -1 552 11 279 329 17708 5108 1.72868 1.72868 -39.1753 -1.72868 0 0 706193. 2443.58 0.29 0.01 0.12 -1 -1 0.29 0.00546811 0.00488018 23 21 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_013bits.v common 4.60 vpr 63.14 MiB -1 -1 0.11 19884 5 0.07 -1 -1 35840 -1 -1 4 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64656 27 14 91 105 1 72 45 17 17 289 -1 unnamed_device 24.6 MiB 0.32 364 3005 1063 1662 280 63.1 MiB 0.02 0.00 2.15497 -46.6453 -2.15497 2.15497 0.90 0.000188237 0.000172023 0.0081593 0.0074387 34 795 13 6.79088e+06 53888 618332. 2139.56 1.30 0.0463757 0.0397243 25102 150614 -1 712 11 254 334 23124 5676 1.90093 1.90093 -45.172 -1.90093 0 0 787024. 2723.27 0.32 0.02 0.15 -1 -1 0.32 0.00647396 0.00580877 27 24 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_014bits.v common 4.59 vpr 63.57 MiB -1 -1 0.11 20148 6 0.07 -1 -1 35500 -1 -1 4 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65100 29 15 95 110 1 77 48 17 17 289 -1 unnamed_device 25.2 MiB 0.24 255 3963 1479 2060 424 63.6 MiB 0.03 0.00 2.36642 -47.9969 -2.36642 2.36642 0.91 0.000202165 0.000183444 0.0100788 0.00916818 34 793 20 6.79088e+06 53888 618332. 2139.56 1.39 0.042369 0.0365279 25102 150614 -1 609 13 313 372 29455 7884 2.31609 2.31609 -47.9355 -2.31609 0 0 787024. 2723.27 0.31 0.02 0.15 -1 -1 0.31 0.00732064 0.00650832 28 23 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_015bits.v common 4.73 vpr 63.23 MiB -1 -1 0.10 19940 6 0.07 -1 -1 35784 -1 -1 5 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64748 31 16 104 120 1 82 52 17 17 289 -1 unnamed_device 24.9 MiB 0.43 458 5484 1992 2787 705 63.2 MiB 0.03 0.00 2.44482 -57.1239 -2.44482 2.44482 0.90 0.000196946 0.000177536 0.0117818 0.0106271 34 917 21 6.79088e+06 67360 618332. 2139.56 1.33 0.0568954 0.0489238 25102 150614 -1 828 10 282 394 26257 6166 2.14389 2.14389 -55.1703 -2.14389 0 0 787024. 2723.27 0.32 0.02 0.15 -1 -1 0.32 0.00701928 0.00631098 31 27 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_016bits.v common 6.83 vpr 63.34 MiB -1 -1 0.11 19824 7 0.07 -1 -1 35784 -1 -1 5 33 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64856 33 17 112 129 1 88 55 17 17 289 -1 unnamed_device 24.9 MiB 0.79 550 4423 1218 2590 615 63.3 MiB 0.03 0.00 2.73468 -63.1333 -2.73468 2.73468 0.93 0.000225862 0.000204756 0.0110684 0.0101067 28 1292 46 6.79088e+06 67360 531479. 1839.03 3.08 0.0955212 0.082038 23950 126010 -1 1064 16 361 445 36125 8215 2.60594 2.60594 -66.3394 -2.60594 0 0 648988. 2245.63 0.27 0.02 0.12 -1 -1 0.27 0.00935675 0.0083118 32 30 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_018bits.v common 6.99 vpr 63.78 MiB -1 -1 0.10 19860 7 0.07 -1 -1 36188 -1 -1 6 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65312 37 19 127 146 1 99 62 17 17 289 -1 unnamed_device 25.3 MiB 1.37 427 3600 772 2818 10 63.8 MiB 0.02 0.00 3.37591 -73.3749 -3.37591 3.37591 0.92 0.000229316 0.000209443 0.00864308 0.00789849 30 1082 14 6.79088e+06 80832 556674. 1926.21 2.64 0.0751671 0.0643938 24526 138013 -1 904 10 360 451 30722 7668 3.00001 3.00001 -71.7183 -3.00001 0 0 706193. 2443.58 0.28 0.02 0.13 -1 -1 0.28 0.00807295 0.00728106 37 35 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_020bits.v common 6.58 vpr 63.74 MiB -1 -1 0.11 19756 8 0.08 -1 -1 35840 -1 -1 6 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65268 41 21 139 160 1 106 68 17 17 289 -1 unnamed_device 25.3 MiB 0.53 538 6140 1482 4552 106 63.7 MiB 0.04 0.00 2.83873 -76.6247 -2.83873 2.83873 0.91 0.000289562 0.000264232 0.0139229 0.0126782 34 1267 16 6.79088e+06 80832 618332. 2139.56 2.96 0.0865489 0.0748619 25102 150614 -1 1122 11 408 512 44203 9986 2.78163 2.78163 -79.1023 -2.78163 0 0 787024. 2723.27 0.31 0.02 0.15 -1 -1 0.31 0.00926326 0.00834255 41 37 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_022bits.v common 4.87 vpr 63.85 MiB -1 -1 0.12 20096 9 0.08 -1 -1 36212 -1 -1 6 45 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65384 45 23 153 176 1 119 74 17 17 289 -1 unnamed_device 25.4 MiB 0.46 495 8909 2437 5871 601 63.9 MiB 0.05 0.00 3.32208 -88.8928 -3.32208 3.32208 0.90 0.000313013 0.000286195 0.0184774 0.0168437 34 1126 14 6.79088e+06 80832 618332. 2139.56 1.37 0.0786422 0.0685167 25102 150614 -1 964 16 434 534 34665 8952 2.98195 2.98195 -84.329 -2.98195 0 0 787024. 2723.27 0.32 0.03 0.15 -1 -1 0.32 0.0121085 0.0108418 43 41 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_024bits.v common 7.09 vpr 63.89 MiB -1 -1 0.12 20088 10 0.08 -1 -1 36144 -1 -1 8 49 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65424 49 25 166 191 1 133 82 17 17 289 -1 unnamed_device 25.6 MiB 0.97 443 10406 3257 5328 1821 63.9 MiB 0.05 0.00 3.69804 -97.8019 -3.69804 3.69804 0.88 0.000336488 0.000305946 0.0203225 0.0184972 30 1275 29 6.79088e+06 107776 556674. 1926.21 3.14 0.13715 0.118422 24526 138013 -1 942 16 569 644 30950 9603 3.4363 3.4363 -94.393 -3.4363 0 0 706193. 2443.58 0.30 0.03 0.13 -1 -1 0.30 0.0128741 0.0115054 48 44 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_028bits.v common 6.11 vpr 64.13 MiB -1 -1 0.11 19764 11 0.08 -1 -1 35848 -1 -1 8 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65668 57 29 198 227 1 158 94 17 17 289 -1 unnamed_device 25.7 MiB 1.39 693 10744 2889 6912 943 64.1 MiB 0.06 0.00 4.24198 -129.885 -4.24198 4.24198 0.93 0.000392126 0.000357565 0.0214893 0.0195503 36 1621 34 6.79088e+06 107776 648988. 2245.63 1.55 0.110406 0.0964284 25390 158009 -1 1449 12 609 866 56809 14248 3.77654 3.77654 -122.326 -3.77654 0 0 828058. 2865.25 0.34 0.03 0.15 -1 -1 0.34 0.0129885 0.0117561 59 56 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_032bits.v common 8.05 vpr 64.32 MiB -1 -1 0.13 20324 13 0.09 -1 -1 36164 -1 -1 9 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65864 65 33 224 257 1 176 107 17 17 289 -1 unnamed_device 25.8 MiB 1.78 926 16805 6949 9813 43 64.3 MiB 0.08 0.00 5.07578 -160.683 -5.07578 5.07578 0.94 0.000426048 0.000386087 0.0306355 0.0278094 36 1844 17 6.79088e+06 121248 648988. 2245.63 3.06 0.153314 0.133624 25390 158009 -1 1659 16 690 896 53298 13256 4.62142 4.62142 -153.744 -4.62142 0 0 828058. 2865.25 0.33 0.04 0.15 -1 -1 0.33 0.0166101 0.0148293 66 62 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_048bits.v common 11.33 vpr 65.16 MiB -1 -1 0.14 20544 19 0.11 -1 -1 36096 -1 -1 13 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66728 97 49 340 389 1 267 159 17 17 289 -1 unnamed_device 26.5 MiB 3.49 1392 28109 7029 18915 2165 65.2 MiB 0.13 0.00 7.59683 -301.558 -7.59683 7.59683 0.92 0.000637392 0.000579491 0.045073 0.0410951 38 2894 18 6.79088e+06 175136 678818. 2348.85 4.48 0.253006 0.223731 25966 169698 -1 2642 17 1076 1468 97259 23253 6.84503 6.84503 -284.419 -6.84503 0 0 902133. 3121.57 0.34 0.06 0.16 -1 -1 0.34 0.0253758 0.02291 100 98 -1 -1 -1 -1 - fixed_k6_frac_N8_22nm.xml adder_064bits.v common 13.31 vpr 65.70 MiB -1 -1 0.17 20764 26 0.13 -1 -1 36024 -1 -1 18 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67272 129 65 453 518 1 350 212 17 17 289 -1 unnamed_device 27.0 MiB 4.42 1833 46906 17001 25907 3998 65.7 MiB 0.21 0.00 10.4862 -509.792 -10.4862 10.4862 0.93 0.000840576 0.000764707 0.0680155 0.0620337 40 3816 42 6.79088e+06 242496 706193. 2443.58 5.32 0.467594 0.418801 26254 175826 -1 3371 15 1379 1841 140908 34319 9.82387 9.82387 -485.167 -9.82387 0 0 926341. 3205.33 0.36 0.08 0.17 -1 -1 0.36 0.0336583 0.0308449 129 131 -1 -1 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gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64920 9 5 34 35 1 20 16 17 17 289 -1 unnamed_device 25.0 MiB 0.04 44 336 94 221 21 63.4 MiB 0.00 0.00 0.789073 -9.95572 -0.789073 0.789073 0.89 6.5608e-05 5.8805e-05 0.00140062 0.00125504 18 133 9 6.87369e+06 27947.7 376052. 1301.22 1.32 0.012633 0.0104884 22882 88689 -1 122 8 63 63 3717 1187 0.914373 0.914373 -10.4211 -0.914373 0 0 470940. 1629.55 0.21 0.01 0.09 -1 -1 0.21 0.00260526 0.00235631 10 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_005bits.v common 4.42 vpr 63.32 MiB -1 -1 0.09 19580 1 0.02 -1 -1 33468 -1 -1 3 11 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64844 11 6 41 42 1 27 20 17 17 289 -1 unnamed_device 24.9 MiB 0.05 61 695 189 478 28 63.3 MiB 0.01 0.00 0.811073 -12.6848 -0.811073 0.811073 0.90 6.4001e-05 5.6902e-05 0.00208019 0.00184519 26 199 9 6.87369e+06 41921.5 503264. 1741.40 1.63 0.02114 0.0172615 24322 120374 -1 188 13 122 122 6474 2164 0.936373 0.936373 -14.2242 -0.936373 0 0 618332. 2139.56 0.26 0.01 0.11 -1 -1 0.26 0.00319401 0.00281058 13 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_006bits.v common 4.92 vpr 63.55 MiB -1 -1 0.10 19548 1 0.02 -1 -1 33408 -1 -1 3 13 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65072 13 7 48 49 1 33 23 17 17 289 -1 unnamed_device 25.1 MiB 0.06 79 823 189 488 146 63.5 MiB 0.01 0.00 0.833073 -15.431 -0.833073 0.833073 0.90 9.517e-05 8.6419e-05 0.00265911 0.00240227 28 259 20 6.87369e+06 41921.5 531479. 1839.03 2.04 0.029085 0.0241241 24610 126494 -1 264 31 369 369 22698 7051 1.07267 1.07267 -17.5389 -1.07267 0 0 648988. 2245.63 0.26 0.02 0.12 -1 -1 0.26 0.00575001 0.00488277 15 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_007bits.v common 3.62 vpr 63.62 MiB -1 -1 0.09 19640 1 0.02 -1 -1 33632 -1 -1 3 15 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65148 15 8 55 56 1 39 26 17 17 289 -1 unnamed_device 25.1 MiB 0.08 110 1774 718 1009 47 63.6 MiB 0.01 0.00 1.38906 -18.7903 -1.38906 1.38906 0.92 0.000102539 9.2684e-05 0.00513679 0.00464506 26 280 15 6.87369e+06 41921.5 503264. 1741.40 0.73 0.0178693 0.0153039 24322 120374 -1 234 12 143 143 5672 1951 1.07067 1.07067 -18.8174 -1.07067 0 0 618332. 2139.56 0.25 0.01 0.12 -1 -1 0.25 0.00383335 0.00338876 17 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_008bits.v common 3.62 vpr 63.31 MiB -1 -1 0.09 19428 1 0.02 -1 -1 33636 -1 -1 3 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64828 17 9 62 63 1 42 29 17 17 289 -1 unnamed_device 24.8 MiB 0.06 121 1965 774 1136 55 63.3 MiB 0.02 0.00 1.2154 -21.6367 -1.2154 1.2154 0.91 0.000110558 0.000100292 0.00551964 0.00499856 26 331 14 6.87369e+06 41921.5 503264. 1741.40 0.76 0.0199015 0.017005 24322 120374 -1 277 13 161 161 10288 3152 1.00037 1.00037 -22.4597 -1.00037 0 0 618332. 2139.56 0.25 0.01 0.12 -1 -1 0.25 0.00430562 0.00380315 18 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_009bits.v common 5.75 vpr 63.75 MiB -1 -1 0.10 19880 1 0.02 -1 -1 33696 -1 -1 3 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65280 19 10 69 70 1 45 32 17 17 289 -1 unnamed_device 25.2 MiB 0.06 132 2382 822 1143 417 63.8 MiB 0.02 0.00 1.2264 -24.2078 -1.2264 1.2264 0.93 0.000120681 0.000108998 0.00639069 0.00578568 34 351 22 6.87369e+06 41921.5 618332. 2139.56 2.74 0.0429692 0.0360996 25762 151098 -1 296 11 165 165 10562 3100 1.01137 1.01137 -24.9922 -1.01137 0 0 787024. 2723.27 0.32 0.01 0.15 -1 -1 0.32 0.00447082 0.00395729 20 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_010bits.v common 5.66 vpr 63.62 MiB -1 -1 0.09 19920 1 0.02 -1 -1 33680 -1 -1 3 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65148 21 11 76 77 1 48 35 17 17 289 -1 unnamed_device 25.1 MiB 0.07 144 2942 1070 1287 585 63.6 MiB 0.02 0.00 1.2374 -27.3029 -1.2374 1.2374 0.93 0.00013531 0.000121917 0.00726851 0.00657877 32 390 13 6.87369e+06 41921.5 586450. 2029.24 2.67 0.0436789 0.0368763 25474 144626 -1 342 13 206 206 15975 4187 1.10367 1.10367 -27.6336 -1.10367 0 0 744469. 2576.02 0.30 0.01 0.14 -1 -1 0.30 0.00513827 0.00453887 22 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_011bits.v common 3.86 vpr 63.84 MiB -1 -1 0.10 19504 1 0.02 -1 -1 33724 -1 -1 4 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65368 23 12 83 84 1 53 39 17 17 289 -1 unnamed_device 25.3 MiB 0.07 162 3207 1137 1446 624 63.8 MiB 0.02 0.00 1.2484 -29.9497 -1.2484 1.2484 0.92 0.000143909 0.000129942 0.00756449 0.00685378 32 462 19 6.87369e+06 55895.4 586450. 2029.24 0.87 0.0252849 0.021822 25474 144626 -1 414 14 252 252 18126 4939 1.21797 1.21797 -32.1502 -1.21797 0 0 744469. 2576.02 0.31 0.02 0.14 -1 -1 0.31 0.00575911 0.00507288 24 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_012bits.v common 3.86 vpr 63.84 MiB -1 -1 0.10 19660 1 0.02 -1 -1 33464 -1 -1 4 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65368 25 13 90 91 1 60 42 17 17 289 -1 unnamed_device 25.3 MiB 0.07 186 2994 1117 1328 549 63.8 MiB 0.02 0.00 1.2594 -33.2136 -1.2594 1.2594 0.91 0.000153592 0.000138912 0.00720508 0.00651506 32 639 22 6.87369e+06 55895.4 586450. 2029.24 0.89 0.0277132 0.0238266 25474 144626 -1 486 17 367 367 28907 7440 1.13667 1.13667 -33.3442 -1.13667 0 0 744469. 2576.02 0.30 0.02 0.14 -1 -1 0.30 0.00669831 0.00582981 26 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_013bits.v common 4.93 vpr 63.82 MiB -1 -1 0.09 19524 1 0.02 -1 -1 33752 -1 -1 4 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65348 27 14 97 98 1 67 45 17 17 289 -1 unnamed_device 25.3 MiB 0.07 207 4445 1357 2117 971 63.8 MiB 0.03 0.00 1.2704 -35.3786 -1.2704 1.2704 0.93 0.000163946 0.000148973 0.0100501 0.00912932 30 672 21 6.87369e+06 55895.4 556674. 1926.21 1.94 0.0514902 0.043973 25186 138497 -1 484 26 515 515 30262 8667 1.15397 1.15397 -34.7532 -1.15397 0 0 706193. 2443.58 0.28 0.03 0.13 -1 -1 0.28 0.00921927 0.00797992 28 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_014bits.v common 4.45 vpr 63.96 MiB -1 -1 0.10 19648 1 0.02 -1 -1 33388 -1 -1 5 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65492 29 15 104 105 1 74 49 17 17 289 -1 unnamed_device 25.4 MiB 0.11 236 3520 1361 2099 60 64.0 MiB 0.02 0.00 1.2814 -38.667 -1.2814 1.2814 0.89 0.000149202 0.000134542 0.00725264 0.00656705 34 730 25 6.87369e+06 69869.2 618332. 2139.56 1.39 0.0460937 0.0393538 25762 151098 -1 615 21 502 502 44505 11732 1.21997 1.21997 -40.5695 -1.21997 0 0 787024. 2723.27 0.32 0.03 0.15 -1 -1 0.32 0.00836721 0.00727042 31 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_015bits.v common 3.97 vpr 63.81 MiB -1 -1 0.09 19612 1 0.02 -1 -1 33904 -1 -1 5 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65340 31 16 111 112 1 80 52 17 17 289 -1 unnamed_device 25.5 MiB 0.13 290 5290 2175 3012 103 63.8 MiB 0.03 0.00 1.65273 -43.1654 -1.65273 1.65273 0.93 0.000198503 0.000180089 0.0113469 0.0102984 32 776 19 6.87369e+06 69869.2 586450. 2029.24 0.88 0.0352439 0.0306308 25474 144626 -1 583 14 385 385 27680 7509 1.16767 1.16767 -42.6023 -1.16767 0 0 744469. 2576.02 0.30 0.02 0.14 -1 -1 0.30 0.00699794 0.00619573 33 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_016bits.v common 3.92 vpr 64.01 MiB -1 -1 0.10 19532 1 0.02 -1 -1 33768 -1 -1 5 33 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65544 33 17 118 119 1 83 55 17 17 289 -1 unnamed_device 25.6 MiB 0.10 305 5567 2291 3184 92 64.0 MiB 0.03 0.00 1.66373 -46.4834 -1.66373 1.66373 0.91 0.000209934 0.000191255 0.0118194 0.0107714 32 774 15 6.87369e+06 69869.2 586450. 2029.24 0.87 0.0360923 0.0314616 25474 144626 -1 630 14 407 407 29937 8167 1.21167 1.21167 -46.2762 -1.21167 0 0 744469. 2576.02 0.31 0.02 0.14 -1 -1 0.31 0.00753949 0.00667571 34 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_018bits.v common 4.91 vpr 64.06 MiB -1 -1 0.10 19940 1 0.02 -1 -1 33956 -1 -1 5 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65600 37 19 132 133 1 89 61 17 17 289 -1 unnamed_device 25.7 MiB 0.09 337 7021 2897 4010 114 64.1 MiB 0.04 0.00 1.68573 -53.53 -1.68573 1.68573 0.91 0.000193062 0.000173541 0.0124667 0.0112683 30 981 24 6.87369e+06 69869.2 556674. 1926.21 1.95 0.0670545 0.0573018 25186 138497 -1 754 16 530 530 45610 11200 1.26197 1.26197 -52.3618 -1.26197 0 0 706193. 2443.58 0.29 0.02 0.12 -1 -1 0.29 0.00805086 0.007064 38 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_020bits.v common 6.77 vpr 64.10 MiB -1 -1 0.10 19844 1 0.02 -1 -1 33696 -1 -1 6 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65640 41 21 146 147 1 101 68 17 17 289 -1 unnamed_device 25.6 MiB 0.10 385 8348 3442 4769 137 64.1 MiB 0.04 0.00 1.70773 -60.4248 -1.70773 1.70773 0.91 0.000223932 0.000203085 0.014876 0.0134896 36 1033 17 6.87369e+06 83843 648988. 2245.63 3.66 0.0822498 0.0708545 26050 158493 -1 846 15 579 579 50011 12770 1.26667 1.26667 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6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65752 49 25 174 175 1 124 81 17 17 289 -1 unnamed_device 25.7 MiB 0.11 546 8481 1841 6167 473 64.2 MiB 0.05 0.00 2.11206 -76.8106 -2.11206 2.11206 0.92 0.000296195 0.000270375 0.0153586 0.0140334 34 1531 40 6.87369e+06 97816.9 618332. 2139.56 1.41 0.08196 0.0710359 25762 151098 -1 1247 14 657 657 55953 14632 1.58127 1.58127 -81.892 -1.58127 0 0 787024. 2723.27 0.32 0.03 0.15 -1 -1 0.32 0.0100515 0.00893572 50 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_028bits.v common 4.58 vpr 64.33 MiB -1 -1 0.11 19828 1 0.03 -1 -1 33708 -1 -1 8 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65872 57 29 202 203 1 142 94 17 17 289 -1 unnamed_device 25.8 MiB 0.11 715 11383 2391 8777 215 64.3 MiB 0.06 0.00 2.15606 -94.3707 -2.15606 2.15606 0.90 0.000350147 0.000320594 0.0192279 0.0175966 34 1698 24 6.87369e+06 111791 618332. 2139.56 1.43 0.0879992 0.0767721 25762 151098 -1 1370 14 646 646 57732 13725 1.62057 1.62057 -91.7087 -1.62057 0 0 787024. 2723.27 0.32 0.03 0.15 -1 -1 0.32 0.0111689 0.00994371 58 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_032bits.v common 4.70 vpr 64.47 MiB -1 -1 0.10 19924 1 0.03 -1 -1 33720 -1 -1 9 65 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66020 65 33 230 231 1 165 107 17 17 289 -1 unnamed_device 26.1 MiB 0.11 934 14022 3954 9126 942 64.5 MiB 0.08 0.00 2.56039 -113.242 -2.56039 2.56039 0.92 0.000391008 0.000358162 0.0233364 0.0213644 34 2070 17 6.87369e+06 125765 618332. 2139.56 1.48 0.101638 0.0891837 25762 151098 -1 1856 13 819 819 85633 18584 1.40567 1.40567 -105.24 -1.40567 0 0 787024. 2723.27 0.33 0.04 0.15 -1 -1 0.33 0.0124219 0.0110862 66 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_048bits.v common 5.37 vpr 65.35 MiB -1 -1 0.13 20340 1 0.04 -1 -1 33992 -1 -1 13 97 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66920 97 49 342 343 1 247 159 17 17 289 -1 unnamed_device 26.7 MiB 0.12 1452 25529 6578 17249 1702 65.4 MiB 0.12 0.00 3.45705 -194.211 -3.45705 3.45705 0.92 0.000513155 0.000474579 0.0328017 0.030051 34 3474 26 6.87369e+06 181660 618332. 2139.56 2.01 0.158747 0.140694 25762 151098 -1 2775 15 1192 1192 134811 28940 1.78627 1.78627 -171.767 -1.78627 0 0 787024. 2723.27 0.32 0.06 0.15 -1 -1 0.32 0.0189172 0.0169545 98 -1 -1 -1 -1 -1 - fixed_k6_frac_ripple_N8_22nm.xml adder_064bits.v common 6.22 vpr 65.66 MiB -1 -1 0.12 20244 1 0.03 -1 -1 34084 -1 -1 17 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67236 129 65 454 455 1 329 211 17 17 289 -1 unnamed_device 26.9 MiB 0.15 1980 44728 13702 26774 4252 65.7 MiB 0.21 0.01 4.35372 -288.703 -4.35372 4.35372 0.92 0.000750644 0.000692142 0.0549054 0.0503572 34 4900 26 6.87369e+06 237555 618332. 2139.56 2.72 0.228392 0.204737 25762 151098 -1 3906 18 1579 1579 197183 43754 1.89427 1.89427 -232.752 -1.89427 0 0 787024. 2723.27 0.29 0.09 0.15 -1 -1 0.29 0.0281938 0.0253869 130 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_003bits.v common 4.16 vpr 63.13 MiB -1 -1 0.10 19744 1 0.02 -1 -1 33216 -1 -1 1 7 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64648 7 4 27 28 1 13 12 17 17 289 -1 unnamed_device 24.7 MiB 0.02 25 155 63 90 2 63.1 MiB 0.00 0.00 0.605992 -7.06722 -0.605992 0.605992 0.92 5.3145e-05 4.6197e-05 0.000888622 0.000787897 22 62 10 6.89349e+06 14093.8 443629. 1535.05 1.42 0.0171152 0.0138878 23458 102101 -1 59 3 19 19 1002 355 0.74674 0.74674 -6.60182 -0.74674 0 0 531479. 1839.03 0.23 0.00 0.10 -1 -1 0.23 0.00176303 0.00164262 8 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_004bits.v common 5.20 vpr 63.38 MiB -1 -1 0.09 19724 1 0.02 -1 -1 33548 -1 -1 2 9 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64904 9 5 34 35 1 20 16 17 17 289 -1 unnamed_device 25.0 MiB 0.04 48 336 89 227 20 63.4 MiB 0.01 0.00 0.789073 -10.0695 -0.789073 0.789073 0.92 6.7325e-05 6.0477e-05 0.00140968 0.00126596 30 123 12 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gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64932 15 8 55 56 1 39 26 17 17 289 -1 unnamed_device 24.9 MiB 0.08 111 1774 737 1001 36 63.4 MiB 0.01 0.00 1.38906 -18.6829 -1.38906 1.38906 0.90 0.000104185 9.4131e-05 0.00514718 0.00464855 24 366 20 6.89349e+06 42281.5 470940. 1629.55 1.43 0.0209749 0.0178328 24034 113901 -1 237 12 150 150 7579 2301 0.923426 0.923426 -18.2337 -0.923426 0 0 586450. 2029.24 0.24 0.01 0.11 -1 -1 0.24 0.00387951 0.00343979 17 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_008bits.v common 5.32 vpr 63.64 MiB -1 -1 0.09 19484 1 0.02 -1 -1 33748 -1 -1 3 17 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65168 17 9 62 63 1 42 29 17 17 289 -1 unnamed_device 25.2 MiB 0.05 120 2009 782 1060 167 63.6 MiB 0.01 0.00 1.2154 -21.1249 -1.2154 1.2154 0.89 9.2165e-05 8.2122e-05 0.00475816 0.00427089 32 281 14 6.89349e+06 42281.5 586450. 2029.24 2.49 0.0334315 0.0277621 25474 144626 -1 269 13 167 167 10511 3132 0.99132 0.99132 -22.0414 -0.99132 0 0 744469. 2576.02 0.30 0.01 0.13 -1 -1 0.30 0.00419014 0.00368843 18 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_009bits.v common 4.60 vpr 63.57 MiB -1 -1 0.08 19840 1 0.02 -1 -1 33672 -1 -1 3 19 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65100 19 10 69 70 1 46 32 17 17 289 -1 unnamed_device 25.1 MiB 0.06 134 2432 901 1105 426 63.6 MiB 0.02 0.00 1.2264 -24.0836 -1.2264 1.2264 0.93 0.000117469 0.000107117 0.00653766 0.00591977 26 431 21 6.89349e+06 42281.5 503264. 1741.40 1.72 0.0388004 0.0326268 24322 120374 -1 338 13 204 204 16938 4634 1.10367 1.10367 -26.2508 -1.10367 0 0 618332. 2139.56 0.25 0.01 0.12 -1 -1 0.25 0.00445217 0.00389855 20 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_010bits.v common 5.57 vpr 63.54 MiB -1 -1 0.09 19600 1 0.02 -1 -1 33420 -1 -1 3 21 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65060 21 11 76 77 1 48 35 17 17 289 -1 unnamed_device 25.0 MiB 0.06 144 2942 987 1222 733 63.5 MiB 0.02 0.00 1.2374 -27.2687 -1.2374 1.2374 0.91 0.000136251 0.0001235 0.00745995 0.00678206 32 420 12 6.89349e+06 42281.5 586450. 2029.24 2.64 0.0430958 0.0363634 25474 144626 -1 344 13 206 206 15588 4094 1.25097 1.25097 -29.5198 -1.25097 0 0 744469. 2576.02 0.29 0.01 0.15 -1 -1 0.29 0.00493239 0.00434142 22 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_011bits.v common 5.75 vpr 63.38 MiB -1 -1 0.10 19492 1 0.02 -1 -1 33544 -1 -1 4 23 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64904 23 12 83 84 1 53 39 17 17 289 -1 unnamed_device 24.9 MiB 0.05 161 3207 1115 1384 708 63.4 MiB 0.02 0.00 1.2484 -30.0612 -1.2484 1.2484 0.93 0.000144331 0.000130469 0.00701254 0.00633424 32 508 12 6.89349e+06 56375.4 586450. 2029.24 2.78 0.036998 0.0314579 25474 144626 -1 434 11 243 243 18298 4845 1.13667 1.13667 -32.4321 -1.13667 0 0 744469. 2576.02 0.30 0.01 0.14 -1 -1 0.30 0.00494775 0.00439489 24 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_012bits.v common 3.82 vpr 63.57 MiB -1 -1 0.10 19788 1 0.02 -1 -1 33388 -1 -1 4 25 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65100 25 13 90 91 1 60 42 17 17 289 -1 unnamed_device 25.1 MiB 0.06 202 2994 1191 1765 38 63.6 MiB 0.02 0.00 1.2594 -33.7803 -1.2594 1.2594 0.91 0.000152824 0.000138521 0.00720379 0.00654131 32 630 19 6.89349e+06 56375.4 586450. 2029.24 0.88 0.0270469 0.0233112 25474 144626 -1 515 9 278 278 21227 5838 1.15867 1.15867 -34.9584 -1.15867 0 0 744469. 2576.02 0.30 0.01 0.14 -1 -1 0.30 0.00470209 0.00421388 26 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_013bits.v common 3.84 vpr 63.39 MiB -1 -1 0.10 19412 1 0.02 -1 -1 33744 -1 -1 4 27 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64912 27 14 97 98 1 67 45 17 17 289 -1 unnamed_device 24.9 MiB 0.06 209 4445 1740 2185 520 63.4 MiB 0.03 0.00 1.2704 -36.1806 -1.2704 1.2704 0.91 0.000168025 0.000152193 0.0100623 0.00912672 32 679 19 6.89349e+06 56375.4 586450. 2029.24 0.90 0.0314333 0.0272632 25474 144626 -1 560 16 381 381 31679 8445 1.28397 1.28397 -39.6564 -1.28397 0 0 744469. 2576.02 0.30 0.02 0.14 -1 -1 0.30 0.00633018 0.0055559 28 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_014bits.v common 6.87 vpr 63.78 MiB -1 -1 0.09 19544 1 0.02 -1 -1 33416 -1 -1 5 29 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65308 29 15 104 105 1 74 49 17 17 289 -1 unnamed_device 25.2 MiB 0.08 236 3431 1335 2039 57 63.8 MiB 0.02 0.00 1.2814 -39.5467 -1.2814 1.2814 0.93 0.000177345 0.000160553 0.00767113 0.00697287 38 684 20 6.89349e+06 70469.2 678818. 2348.85 3.78 0.0624804 0.0530206 26626 170182 -1 519 32 480 480 33921 8812 1.09467 1.09467 -37.7139 -1.09467 0 0 902133. 3121.57 0.33 0.03 0.17 -1 -1 0.33 0.0111958 0.0096547 31 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_015bits.v common 5.86 vpr 63.76 MiB -1 -1 0.10 19880 1 0.02 -1 -1 33872 -1 -1 5 31 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on 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1.66373 -46.9867 -1.66373 1.66373 0.92 0.00020972 0.000191028 0.0114211 0.0103987 32 748 30 6.89349e+06 70469.2 586450. 2029.24 2.83 0.0608268 0.0519723 25474 144626 -1 657 18 431 431 37995 9892 1.21167 1.21167 -46.5307 -1.21167 0 0 744469. 2576.02 0.31 0.03 0.14 -1 -1 0.31 0.00870949 0.00763038 34 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_018bits.v common 5.95 vpr 63.95 MiB -1 -1 0.10 20024 1 0.02 -1 -1 34000 -1 -1 5 37 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65488 37 19 132 133 1 90 61 17 17 289 -1 unnamed_device 25.5 MiB 0.09 342 7021 2879 4035 107 64.0 MiB 0.04 0.00 1.68573 -54.0175 -1.68573 1.68573 0.92 0.000235835 0.000214611 0.0130289 0.0118656 32 990 25 6.89349e+06 70469.2 586450. 2029.24 2.91 0.0648107 0.0557 25474 144626 -1 789 12 433 433 39042 9870 1.34797 1.34797 -55.979 -1.34797 0 0 744469. 2576.02 0.30 0.02 0.14 -1 -1 0.30 0.00730887 0.0065009 38 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_020bits.v common 6.82 vpr 63.90 MiB -1 -1 0.11 19792 1 0.02 -1 -1 33984 -1 -1 6 41 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65432 41 21 146 147 1 102 68 17 17 289 -1 unnamed_device 25.4 MiB 0.09 445 8348 3515 4709 124 63.9 MiB 0.04 0.00 1.70773 -61.5625 -1.70773 1.70773 0.93 0.000243315 0.000220798 0.0148361 0.0134773 36 916 29 6.89349e+06 84563 648988. 2245.63 3.76 0.0853494 0.0733436 26050 158493 -1 772 13 458 458 34453 8657 1.06157 1.06157 -53.1205 -1.06157 0 0 828058. 2865.25 0.33 0.02 0.15 -1 -1 0.33 0.00814568 0.00719922 42 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_022bits.v common 4.98 vpr 63.97 MiB -1 -1 0.10 19716 1 0.02 -1 -1 34024 -1 -1 7 45 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65504 45 23 160 161 1 115 75 17 17 289 -1 unnamed_device 25.5 MiB 0.10 455 8923 3808 5002 113 64.0 MiB 0.04 0.00 1.72973 -68.2155 -1.72973 1.72973 0.88 0.000241568 0.000217641 0.0146372 0.0132391 36 1441 24 6.89349e+06 98656.9 648988. 2245.63 1.96 0.0716287 0.0618242 26050 158493 -1 1076 24 762 762 121599 43810 1.33622 1.33622 -66.4892 -1.33622 0 0 828058. 2865.25 0.33 0.05 0.14 -1 -1 0.33 0.0128474 0.0111777 47 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_024bits.v common 4.57 vpr 63.84 MiB -1 -1 0.11 19756 1 0.02 -1 -1 33852 -1 -1 7 49 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65368 49 25 174 175 1 124 81 17 17 289 -1 unnamed_device 25.4 MiB 0.11 551 7431 1680 5324 427 63.8 MiB 0.04 0.00 2.11206 -77.2602 -2.11206 2.11206 0.90 0.000296734 0.000271252 0.0135828 0.0124281 34 1555 27 6.89349e+06 98656.9 618332. 2139.56 1.48 0.0748475 0.0649331 25762 151098 -1 1235 23 716 716 70993 17901 1.33262 1.33262 -76.3022 -1.33262 0 0 787024. 2723.27 0.30 0.04 0.15 -1 -1 0.30 0.0129998 0.0113955 50 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_028bits.v common 4.78 vpr 64.25 MiB -1 -1 0.10 20036 1 0.02 -1 -1 33684 -1 -1 8 57 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65788 57 29 202 203 1 143 94 17 17 289 -1 unnamed_device 25.7 MiB 0.09 650 12022 2723 8727 572 64.2 MiB 0.06 0.00 2.15606 -92.9813 -2.15606 2.15606 0.89 0.000332198 0.00030306 0.0198835 0.018144 34 1756 23 6.89349e+06 112751 618332. 2139.56 1.72 0.0904969 0.0788711 25762 151098 -1 1397 15 687 687 59439 15006 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0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66660 97 49 342 343 1 247 159 17 17 289 -1 unnamed_device 26.4 MiB 0.13 1473 25959 7791 16267 1901 65.1 MiB 0.14 0.00 3.45705 -194.328 -3.45705 3.45705 0.90 0.0005713 0.000524576 0.0359987 0.0330366 34 3283 31 6.89349e+06 183220 618332. 2139.56 1.78 0.162954 0.144195 25762 151098 -1 2757 14 1079 1079 125848 27590 1.78147 1.78147 -171.309 -1.78147 0 0 787024. 2723.27 0.31 0.06 0.15 -1 -1 0.31 0.0182303 0.0163496 98 -1 -1 -1 -1 -1 - fixed_k6_frac_uripple_N8_22nm.xml adder_064bits.v common 5.75 vpr 65.76 MiB -1 -1 0.13 20324 1 0.03 -1 -1 33984 -1 -1 17 129 0 0 success 6bddfe3-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-06-19T14:10:26 gh-actions-runner-vtr-auto-spawned157 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67340 129 65 454 455 1 329 211 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pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_003bits.v common 2.60 vpr 61.79 MiB -1 -1 0.08 20520 1 0.05 -1 -1 35840 -1 -1 2 7 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63268 7 4 21 25 1 15 13 17 17 289 -1 unnamed_device 23.4 MiB 0.00 41 298 84 201 13 61.8 MiB 0.00 0.00 0.581048 -5.18533 -0.581048 0.581048 0.71 1.9134e-05 1.0747e-05 0.000536949 0.000331699 20 91 9 6.55708e+06 24110 394039. 1363.46 0.41 0.00127513 0.000891416 19870 87366 -1 92 8 58 58 3950 1472 0.71851 0.71851 -7.42993 -0.71851 0 0 477104. 1650.88 0.18 0.00 0.05 -1 -1 0.18 0.000376494 0.00030797 10 4 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_004bits.v common 2.60 vpr 61.68 MiB -1 -1 0.08 20672 2 0.05 -1 -1 35828 -1 -1 2 9 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63156 9 5 28 33 1 21 16 17 17 289 -1 unnamed_device 23.1 MiB 0.00 143 76 33 43 0 61.7 MiB 0.00 0.00 0.819447 -10.2746 -0.819447 0.819447 0.70 2.7097e-05 1.6297e-05 0.000253921 0.000192769 20 229 6 6.55708e+06 24110 394039. 1363.46 0.41 0.00103013 0.0008106 19870 87366 -1 212 10 90 93 4751 1328 0.819447 0.819447 -11.5968 -0.819447 0 0 477104. 1650.88 0.18 0.00 0.05 -1 -1 0.18 0.000869137 0.000704541 13 6 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_005bits.v common 2.63 vpr 61.86 MiB -1 -1 0.08 20520 2 0.05 -1 -1 35564 -1 -1 2 11 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63348 11 6 34 40 1 24 19 17 17 289 -1 unnamed_device 23.4 MiB 0.01 54 744 220 447 77 61.9 MiB 0.00 0.00 0.819447 -9.26524 -0.819447 0.819447 0.69 2.6998e-05 1.7184e-05 0.00109787 0.000728673 20 206 17 6.55708e+06 24110 394039. 1363.46 0.42 0.0029491 0.00213556 19870 87366 -1 184 11 115 123 5310 1989 1.02065 1.02065 -12.9914 -1.02065 0 0 477104. 1650.88 0.18 0.00 0.05 -1 -1 0.18 0.0012277 0.000981276 16 7 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_006bits.v common 4.02 vpr 61.90 MiB -1 -1 0.09 20520 3 0.05 -1 -1 35420 -1 -1 3 13 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63388 13 7 41 48 1 32 23 17 17 289 -1 unnamed_device 23.4 MiB 0.01 98 727 148 555 24 61.9 MiB 0.00 0.00 1.50711 -13.687 -1.50711 1.50711 0.71 3.6268e-05 2.166e-05 0.00105295 0.000720764 26 248 8 6.55708e+06 36165 477104. 1650.88 1.68 0.00702194 0.00523846 21022 109990 -1 228 9 104 120 6424 1975 1.50711 1.50711 -17.1728 -1.50711 0 0 585099. 2024.56 0.22 0.00 0.07 -1 -1 0.22 0.00117969 0.0008963 19 9 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_007bits.v common 3.66 vpr 61.79 MiB -1 -1 0.08 20520 3 0.05 -1 -1 35512 -1 -1 3 15 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63276 15 8 47 55 1 38 26 17 17 289 -1 unnamed_device 23.2 MiB 0.00 153 786 173 604 9 61.8 MiB 0.01 0.00 1.05785 -15.9142 -1.05785 1.05785 0.72 8.4416e-05 5.609e-05 0.00234715 0.00168169 22 398 10 6.55708e+06 36165 420624. 1455.45 1.32 0.00996341 0.00731081 20158 92377 -1 338 8 124 142 7960 2176 1.05785 1.05785 -19.2798 -1.05785 0 0 500653. 1732.36 0.19 0.00 0.05 -1 -1 0.19 0.00164932 0.00147352 23 10 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_008bits.v common 2.91 vpr 61.84 MiB -1 -1 0.08 20672 3 0.05 -1 -1 35768 -1 -1 4 17 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63324 17 9 56 65 1 42 30 17 17 289 -1 unnamed_device 23.2 MiB 0.05 108 904 172 707 25 61.8 MiB 0.00 0.00 1.46791 -17.2642 -1.46791 1.46791 0.72 9.9085e-05 8.5393e-05 0.00114177 0.000862273 26 349 17 6.55708e+06 48220 477104. 1650.88 0.53 0.00714199 0.00550186 21022 109990 -1 330 18 190 212 10769 3441 1.70831 1.70831 -23.2742 -1.70831 0 0 585099. 2024.56 0.25 0.01 0.07 -1 -1 0.25 0.00381852 0.00322469 25 14 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_009bits.v common 2.95 vpr 61.88 MiB -1 -1 0.08 20824 4 0.05 -1 -1 35500 -1 -1 4 19 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63368 19 10 60 70 1 48 33 17 17 289 -1 unnamed_device 23.4 MiB 0.01 141 2633 738 1315 580 61.9 MiB 0.01 0.00 1.50711 -20.906 -1.50711 1.50711 0.70 3.6598e-05 2.4416e-05 0.00258073 0.00186478 26 426 20 6.55708e+06 48220 477104. 1650.88 0.59 0.0099973 0.00770581 21022 109990 -1 397 18 274 336 18323 5802 1.71031 1.71031 -26.9235 -1.71031 0 0 585099. 2024.56 0.21 0.01 0.06 -1 -1 0.21 0.00224187 0.00187704 29 13 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_010bits.v common 2.83 vpr 61.82 MiB -1 -1 0.08 20672 4 0.06 -1 -1 35628 -1 -1 5 21 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63300 21 11 69 80 1 53 37 17 17 289 -1 unnamed_device 23.4 MiB 0.03 175 1623 384 997 242 61.8 MiB 0.01 0.00 1.46791 -23.0586 -1.46791 1.46791 0.70 4.1387e-05 2.8036e-05 0.00183049 0.00129778 26 483 12 6.55708e+06 60275 477104. 1650.88 0.52 0.00894035 0.00699793 21022 109990 -1 427 12 215 280 15355 4750 1.46791 1.46791 -28.708 -1.46791 0 0 585099. 2024.56 0.24 0.01 0.07 -1 -1 0.24 0.00305058 0.00267889 33 17 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_011bits.v common 4.28 vpr 61.87 MiB -1 -1 0.07 20672 5 0.06 -1 -1 35452 -1 -1 6 23 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63352 23 12 76 88 1 61 41 17 17 289 -1 unnamed_device 23.4 MiB 0.01 224 4171 1538 2319 314 61.9 MiB 0.01 0.00 1.7455 -26.6402 -1.7455 1.7455 0.69 5.2493e-05 3.7825e-05 0.00339986 0.00245429 28 521 9 6.55708e+06 72330 500653. 1732.36 1.96 0.0162741 0.012537 21310 115450 -1 442 10 212 266 13363 3941 1.7455 1.7455 -32.0492 -1.7455 0 0 612192. 2118.31 0.24 0.01 0.08 -1 -1 0.24 0.0022256 0.00189683 37 19 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_012bits.v common 4.36 vpr 61.90 MiB -1 -1 0.09 20672 5 0.06 -1 -1 35532 -1 -1 6 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63388 25 13 83 96 1 66 44 17 17 289 -1 unnamed_device 23.5 MiB 0.01 321 3894 1566 2306 22 61.9 MiB 0.01 0.00 1.53464 -31.9206 -1.53464 1.53464 0.70 5.5398e-05 3.9862e-05 0.00320881 0.00238234 32 749 14 6.55708e+06 72330 554710. 1919.41 1.90 0.02046 0.0161203 22174 131602 -1 671 16 258 387 26275 6552 1.70831 1.70831 -38.2372 -1.70831 0 0 701300. 2426.64 0.24 0.01 0.09 -1 -1 0.24 0.00333664 0.00279419 40 21 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_013bits.v common 4.29 vpr 62.11 MiB -1 -1 0.08 20672 5 0.07 -1 -1 35688 -1 -1 7 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63604 27 14 91 105 1 70 48 17 17 289 -1 unnamed_device 23.7 MiB 0.02 245 4050 1294 2043 713 62.1 MiB 0.01 0.00 1.49544 -30.1225 -1.49544 1.49544 0.71 5.3573e-05 3.793e-05 0.00368467 0.00277026 30 671 12 6.55708e+06 84385 526063. 1820.29 1.86 0.0229181 0.018113 21886 126133 -1 532 12 261 366 18457 5503 1.61564 1.61564 -36.5349 -1.61564 0 0 666494. 2306.21 0.25 0.01 0.08 -1 -1 0.25 0.00291187 0.00257652 42 24 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_014bits.v common 4.16 vpr 62.14 MiB -1 -1 0.10 20672 6 0.07 -1 -1 35668 -1 -1 7 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63628 29 15 95 110 1 74 51 17 17 289 -1 unnamed_device 23.5 MiB 0.03 480 3247 818 2222 207 62.1 MiB 0.01 0.00 2.15556 -41.1272 -2.15556 2.15556 0.72 7.1224e-05 5.2445e-05 0.00251016 0.00186484 26 932 14 6.55708e+06 84385 477104. 1650.88 1.76 0.019542 0.0156567 21022 109990 -1 866 8 247 337 23783 5660 2.27576 2.27576 -50.107 -2.27576 0 0 585099. 2024.56 0.21 0.01 0.07 -1 -1 0.21 0.00224042 0.00198936 45 23 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_015bits.v common 3.97 vpr 62.19 MiB -1 -1 0.09 20672 6 0.06 -1 -1 35460 -1 -1 10 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63684 31 16 104 120 1 81 57 17 17 289 -1 unnamed_device 23.7 MiB 0.03 450 3218 711 2053 454 62.2 MiB 0.01 0.00 1.85404 -42.0213 -1.85404 1.85404 0.75 6.1386e-05 4.5304e-05 0.00269977 0.0020318 28 942 13 6.55708e+06 120550 500653. 1732.36 1.41 0.0221194 0.017551 21310 115450 -1 898 11 290 452 28117 6895 1.85404 1.85404 -49.5175 -1.85404 0 0 612192. 2118.31 0.25 0.02 0.07 -1 -1 0.25 0.00466882 0.00409672 50 27 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_016bits.v common 3.45 vpr 62.21 MiB -1 -1 0.11 20824 7 0.07 -1 -1 35936 -1 -1 7 33 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63708 33 17 112 129 1 86 57 17 17 289 -1 unnamed_device 23.6 MiB 0.04 276 3872 864 2308 700 62.2 MiB 0.01 0.00 2.2223 -43.1848 -2.2223 2.2223 0.77 6.4509e-05 4.8198e-05 0.00294537 0.0022702 26 1102 41 6.55708e+06 84385 477104. 1650.88 0.92 0.0214355 0.0171276 21022 109990 -1 814 20 454 577 46543 14772 2.67756 2.67756 -56.191 -2.67756 0 0 585099. 2024.56 0.23 0.02 0.06 -1 -1 0.23 0.00548295 0.00474595 52 30 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_018bits.v common 4.50 vpr 62.50 MiB -1 -1 0.09 20824 7 0.07 -1 -1 35540 -1 -1 10 37 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64000 37 19 127 146 1 99 66 17 17 289 -1 unnamed_device 24.0 MiB 0.02 474 6184 1386 4140 658 62.5 MiB 0.04 0.00 2.75256 -59.8445 -2.75256 2.75256 0.74 0.000104281 7.9277e-05 0.00880037 0.00677681 28 1032 11 6.55708e+06 120550 500653. 1732.36 2.02 0.0299702 0.0240611 21310 115450 -1 924 9 327 465 26373 7110 2.75256 2.75256 -67.6576 -2.75256 0 0 612192. 2118.31 0.24 0.01 0.10 -1 -1 0.24 0.00354096 0.00321399 59 35 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_020bits.v common 3.79 vpr 62.63 MiB -1 -1 0.09 20824 8 0.07 -1 -1 35724 -1 -1 11 41 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64132 41 21 139 160 1 110 73 17 17 289 -1 unnamed_device 24.0 MiB 0.04 458 3873 828 2846 199 62.6 MiB 0.01 0.00 2.6619 -61.4888 -2.6619 2.6619 0.69 9.3894e-05 7.1634e-05 0.00305188 0.00245563 26 1260 21 6.55708e+06 132605 477104. 1650.88 1.37 0.0317773 0.0261788 21022 109990 -1 1050 13 428 581 35790 9737 2.87476 2.87476 -75.1916 -2.87476 0 0 585099. 2024.56 0.23 0.01 0.07 -1 -1 0.23 0.00484235 0.00436471 67 37 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_022bits.v common 4.35 vpr 62.73 MiB -1 -1 0.11 20976 9 0.07 -1 -1 35892 -1 -1 13 45 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64232 45 23 153 176 1 123 81 17 17 289 -1 unnamed_device 24.1 MiB 0.21 685 9881 3283 4938 1660 62.7 MiB 0.03 0.00 2.78916 -74.1871 -2.78916 2.78916 0.80 8.7231e-05 6.6473e-05 0.00669785 0.00534844 28 1358 19 6.55708e+06 156715 500653. 1732.36 1.63 0.0366589 0.030201 21310 115450 -1 1276 17 400 497 32412 8004 2.99036 2.99036 -88.7887 -2.99036 0 0 612192. 2118.31 0.23 0.02 0.08 -1 -1 0.23 0.00747012 0.00661072 74 41 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_024bits.v common 3.23 vpr 62.80 MiB -1 -1 0.10 20824 10 0.08 -1 -1 35908 -1 -1 12 49 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64312 49 25 166 191 1 129 86 17 17 289 -1 unnamed_device 24.1 MiB 0.06 679 9347 2383 5794 1170 62.8 MiB 0.03 0.00 3.63882 -88.2716 -3.63882 3.63882 0.77 0.000112239 8.7838e-05 0.00752494 0.005994 28 1465 22 6.55708e+06 144660 500653. 1732.36 0.63 0.0265351 0.0222861 21310 115450 -1 1376 13 454 631 43959 10927 3.63882 3.63882 -101.013 -3.63882 0 0 612192. 2118.31 0.24 0.02 0.08 -1 -1 0.24 0.0064257 0.00582425 79 44 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_028bits.v common 5.47 vpr 62.88 MiB -1 -1 0.10 21128 11 0.08 -1 -1 35624 -1 -1 14 57 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64384 57 29 198 227 1 159 100 17 17 289 -1 unnamed_device 24.1 MiB 0.21 1014 12396 2960 7708 1728 62.9 MiB 0.04 0.00 3.64848 -107.302 -3.64848 3.64848 0.76 0.000124869 9.9817e-05 0.0095033 0.00768598 28 2087 29 6.55708e+06 168770 500653. 1732.36 2.74 0.065233 0.0548568 21310 115450 -1 1826 15 556 731 62438 14070 4.00908 4.00908 -129.502 -4.00908 0 0 612192. 2118.31 0.25 0.02 0.07 -1 -1 0.25 0.00699282 0.00625305 93 56 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_032bits.v common 5.42 vpr 62.87 MiB -1 -1 0.10 21128 13 0.07 -1 -1 35944 -1 -1 16 65 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64380 65 33 224 257 1 180 114 17 17 289 -1 unnamed_device 24.1 MiB 0.24 790 9222 1775 7317 130 62.9 MiB 0.04 0.00 3.94196 -122.203 -3.94196 3.94196 0.72 0.000213341 0.000133982 0.00828553 0.00691861 34 1916 35 6.55708e+06 192880 585099. 2024.56 2.64 0.0749708 0.0637431 22462 138074 -1 1680 14 684 934 70136 17880 4.06216 4.06216 -140.834 -4.06216 0 0 742403. 2568.87 0.28 0.02 0.10 -1 -1 0.28 0.00796713 0.00727301 107 62 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_048bits.v common 5.46 vpr 63.93 MiB -1 -1 0.12 21432 19 0.12 -1 -1 35868 -1 -1 24 97 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65464 97 49 340 389 1 266 170 17 17 289 -1 unnamed_device 25.0 MiB 0.20 1299 33540 9996 18373 5171 63.9 MiB 0.09 0.00 6.49539 -244.258 -6.49539 6.49539 0.73 0.000296559 0.00025704 0.0209142 0.0177778 32 3181 39 6.55708e+06 289320 554710. 1919.41 2.47 0.117186 0.102306 22174 131602 -1 2639 13 1001 1390 96473 25075 6.85599 6.85599 -276.754 -6.85599 0 0 701300. 2426.64 0.28 0.03 0.08 -1 -1 0.28 0.0121906 0.0110932 161 98 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml adder_064bits.v common 4.31 vpr 64.61 MiB -1 -1 0.14 21584 26 0.11 -1 -1 36100 -1 -1 35 129 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66160 129 65 453 518 1 353 229 17 17 289 -1 unnamed_device 25.6 MiB 0.18 1831 49929 13784 30790 5355 64.6 MiB 0.15 0.00 9.03516 -416.746 -9.03516 9.03516 0.71 0.000402716 0.000351353 0.0365796 0.0318671 34 3913 25 6.55708e+06 421925 585099. 2024.56 1.32 0.126084 0.112665 22462 138074 -1 3544 13 1282 1768 136123 32475 9.27556 9.27556 -457.374 -9.27556 0 0 742403. 2568.87 0.27 0.04 0.08 -1 -1 0.27 0.0166968 0.0155947 213 131 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 0.40 abc 32.69 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33472 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24052 7 4 24 25 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 0.42 abc 32.52 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33296 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 9 5 30 31 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 0.40 abc 32.83 MiB -1 -1 0.07 20672 1 0.03 -1 -1 33620 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23900 11 6 36 37 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 0.43 abc 32.69 MiB -1 -1 0.11 20672 1 0.02 -1 -1 33472 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23900 13 7 42 43 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 0.44 abc 32.68 MiB -1 -1 0.07 20520 1 0.02 -1 -1 33464 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 15 8 49 50 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 0.41 abc 32.64 MiB -1 -1 0.09 20520 1 0.02 -1 -1 33420 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24056 17 9 55 56 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 0.41 abc 32.86 MiB -1 -1 0.08 20824 1 0.03 -1 -1 33648 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24208 19 10 61 62 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 0.41 abc 32.91 MiB -1 -1 0.08 20824 1 0.02 -1 -1 33696 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 21 11 67 68 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 0.41 abc 32.91 MiB -1 -1 0.07 20672 1 0.03 -1 -1 33704 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23904 23 12 74 75 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 0.41 abc 33.05 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33840 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 25 13 80 81 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 0.40 abc 32.89 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33684 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24052 27 14 86 87 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 0.42 abc 32.88 MiB -1 -1 0.09 20824 1 0.02 -1 -1 33668 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24356 29 15 92 93 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_015bits.v common 0.44 abc 32.82 MiB -1 -1 0.08 20824 1 0.03 -1 -1 33604 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24356 31 16 99 100 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_016bits.v common 0.44 abc 32.72 MiB -1 -1 0.08 20672 1 0.03 -1 -1 33508 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24356 33 17 105 106 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 0.44 abc 33.09 MiB -1 -1 0.11 20672 1 0.02 -1 -1 33888 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 37 19 117 118 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 0.41 abc 32.96 MiB -1 -1 0.08 20824 1 0.02 -1 -1 33748 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24052 41 21 130 131 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 0.40 abc 33.09 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33884 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 45 23 142 143 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 0.44 abc 32.94 MiB -1 -1 0.10 20824 1 0.02 -1 -1 33728 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24056 49 25 155 156 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 0.43 abc 32.63 MiB -1 -1 0.08 20824 1 0.03 -1 -1 33416 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24356 57 29 180 181 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 0.41 abc 32.82 MiB -1 -1 0.07 20976 1 0.03 -1 -1 33608 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24204 65 33 205 206 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 0.47 abc 32.62 MiB -1 -1 0.13 20976 1 0.03 -1 -1 33400 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24508 97 49 305 306 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 0.44 abc 33.17 MiB -1 -1 0.10 21280 1 0.03 -1 -1 33968 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24964 129 65 405 406 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 0.39 abc 32.80 MiB -1 -1 0.06 20520 1 0.02 -1 -1 33592 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23500 7 4 24 25 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 0.39 abc 32.66 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33444 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23712 9 5 30 31 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 0.39 abc 32.66 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33448 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 11 6 36 37 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 0.43 abc 32.68 MiB -1 -1 0.09 20520 1 0.02 -1 -1 33460 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 13 7 42 43 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 0.40 abc 32.76 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33544 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 15 8 49 50 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 0.42 abc 32.90 MiB -1 -1 0.10 20672 1 0.02 -1 -1 33688 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23652 17 9 55 56 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 0.41 abc 33.03 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33824 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 19 10 61 62 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 0.42 abc 32.75 MiB -1 -1 0.08 20672 1 0.03 -1 -1 33540 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 21 11 67 68 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 0.42 abc 32.75 MiB -1 -1 0.09 20824 1 0.02 -1 -1 33532 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24108 23 12 74 75 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 0.41 abc 33.04 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33836 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 25 13 80 81 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 0.40 abc 32.74 MiB -1 -1 0.06 20824 1 0.02 -1 -1 33524 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23956 27 14 86 87 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 0.40 abc 32.71 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33496 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23652 29 15 92 93 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_015bits.v common 0.40 abc 32.86 MiB -1 -1 0.07 20672 1 0.02 -1 -1 33648 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23956 31 16 99 100 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_016bits.v common 0.39 abc 32.83 MiB -1 -1 0.07 20672 1 0.02 -1 -1 33616 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23960 33 17 105 106 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 0.41 abc 32.95 MiB -1 -1 0.09 20672 1 0.02 -1 -1 33740 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23956 37 19 117 118 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 0.40 abc 33.07 MiB -1 -1 0.07 20672 1 0.02 -1 -1 33868 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24108 41 21 130 131 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 0.40 abc 32.96 MiB -1 -1 0.08 20672 1 0.03 -1 -1 33756 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24092 45 23 142 143 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 0.41 abc 32.92 MiB -1 -1 0.08 20824 1 0.02 -1 -1 33712 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 23804 49 25 155 156 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 0.41 abc 32.93 MiB -1 -1 0.09 20824 1 0.02 -1 -1 33720 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24260 57 29 180 181 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 0.41 abc 32.70 MiB -1 -1 0.07 20824 1 0.03 -1 -1 33488 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24108 65 33 205 206 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 0.42 abc 32.92 MiB -1 -1 0.09 20976 1 0.03 -1 -1 33708 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24568 97 49 305 306 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_lookahead_unbalanced_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 0.46 abc 33.29 MiB -1 -1 0.12 21432 1 0.03 -1 -1 34084 -1 -1 -1 -1 -1 -1 exited with return code 134 v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 24868 129 65 405 406 1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 2.36 vpr 62.06 MiB -1 -1 0.07 20520 1 0.02 -1 -1 33260 -1 -1 2 7 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63552 7 4 27 28 1 14 13 17 17 289 -1 unnamed_device 23.6 MiB 0.01 35 163 52 107 4 62.1 MiB 0.00 0.00 0.649848 -6.09173 -0.649848 0.649848 0.68 1.9734e-05 1.1207e-05 0.000460362 0.00032802 12 121 19 6.64007e+06 25116 231691. 801.699 0.29 0.00171274 0.00123551 19090 58805 -1 93 14 46 46 3550 1039 0.890248 0.890248 -7.65433 -0.890248 0 0 318358. 1101.58 0.12 0.00 0.04 -1 -1 0.12 0.000599849 0.000465941 10 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 2.46 vpr 62.23 MiB -1 -1 0.07 20520 1 0.02 -1 -1 33568 -1 -1 2 9 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63724 9 5 34 35 1 20 16 17 17 289 -1 unnamed_device 23.8 MiB 0.01 47 516 138 334 44 62.2 MiB 0.00 0.00 0.671848 -7.44342 -0.671848 0.671848 0.68 2.2384e-05 1.311e-05 0.000747521 0.000472193 16 182 19 6.64007e+06 25116 318358. 1101.58 0.36 0.00464428 0.00322562 19666 69277 -1 135 18 154 154 6758 2294 1.02145 1.02145 -10.0628 -1.02145 0 0 394039. 1363.46 0.15 0.01 0.05 -1 -1 0.15 0.0013567 0.00107201 13 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 2.75 vpr 62.27 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33576 -1 -1 2 11 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63764 11 6 41 42 1 26 19 17 17 289 -1 unnamed_device 23.8 MiB 0.01 58 769 230 467 72 62.3 MiB 0.01 0.00 0.682848 -9.22145 -0.682848 0.682848 0.70 3.0401e-05 1.9216e-05 0.00153066 0.000993681 26 209 37 6.64007e+06 25116 477104. 1650.88 0.52 0.00663243 0.00464602 21682 110474 -1 174 33 249 249 11423 4007 1.03245 1.03245 -12.4308 -1.03245 0 0 585099. 2024.56 0.21 0.01 0.07 -1 -1 0.21 0.00210949 0.00159534 16 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 2.79 vpr 62.16 MiB -1 -1 0.07 20672 1 0.02 -1 -1 33304 -1 -1 4 13 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63652 13 7 48 49 1 32 24 17 17 289 -1 unnamed_device 23.6 MiB 0.01 197 704 186 503 15 62.2 MiB 0.01 0.00 0.704848 -13.5631 -0.704848 0.704848 0.69 2.823e-05 1.7615e-05 0.00113627 0.000778287 26 363 17 6.64007e+06 50232 477104. 1650.88 0.52 0.00537076 0.00386425 21682 110474 -1 355 16 159 159 18515 4250 0.945248 0.945248 -18.8519 -0.945248 0 0 585099. 2024.56 0.21 0.01 0.07 -1 -1 0.21 0.00172342 0.00135417 20 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 4.14 vpr 62.04 MiB -1 -1 0.09 20520 1 0.02 -1 -1 33708 -1 -1 3 15 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63532 15 8 55 56 1 38 26 17 17 289 -1 unnamed_device 23.6 MiB 0.01 109 1318 461 754 103 62.0 MiB 0.01 0.00 0.944958 -13.5599 -0.944958 0.944958 0.69 2.9633e-05 1.8492e-05 0.00144573 0.00101833 32 271 11 6.64007e+06 37674 554710. 1919.41 1.85 0.012601 0.00915278 22834 132086 -1 255 12 150 150 7582 2373 0.976248 0.976248 -18.1588 -0.976248 0 0 701300. 2426.64 0.25 0.01 0.09 -1 -1 0.25 0.00148741 0.00123649 22 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_008bits.v common 3.69 vpr 61.93 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33548 -1 -1 4 17 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63416 17 9 62 63 1 41 30 17 17 289 -1 unnamed_device 23.6 MiB 0.02 133 1594 387 867 340 61.9 MiB 0.01 0.00 0.955958 -15.7312 -0.955958 0.955958 0.68 3.4075e-05 2.235e-05 0.00141457 0.000972274 28 262 11 6.64007e+06 50232 500653. 1732.36 1.46 0.0121591 0.00891278 21970 115934 -1 252 9 115 115 5817 1775 0.943248 0.943248 -19.7638 -0.943248 0 0 612192. 2118.31 0.22 0.00 0.07 -1 -1 0.22 0.00124195 0.00104864 25 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 2.84 vpr 62.29 MiB -1 -1 0.07 20672 1 0.02 -1 -1 33840 -1 -1 4 19 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63784 19 10 69 70 1 44 33 17 17 289 -1 unnamed_device 23.9 MiB 0.02 130 2321 691 1153 477 62.3 MiB 0.01 0.00 0.966958 -17.9136 -0.966958 0.966958 0.69 3.4108e-05 2.1606e-05 0.00215287 0.00143833 26 416 11 6.64007e+06 50232 477104. 1650.88 0.51 0.0074596 0.00552905 21682 110474 -1 323 9 151 151 9664 2759 1.10745 1.10745 -24.1668 -1.10745 0 0 585099. 2024.56 0.25 0.01 0.07 -1 -1 0.25 0.00153075 0.00128194 28 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_010bits.v common 4.23 vpr 62.35 MiB -1 -1 0.08 20824 1 0.02 -1 -1 33664 -1 -1 5 21 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63848 21 11 76 77 1 49 37 17 17 289 -1 unnamed_device 23.8 MiB 0.02 146 2477 677 1286 514 62.4 MiB 0.01 0.00 0.977958 -19.8665 -0.977958 0.977958 0.68 4.4724e-05 3.0712e-05 0.00222585 0.00155158 32 383 12 6.64007e+06 62790 554710. 1919.41 1.93 0.0156608 0.0117851 22834 132086 -1 330 14 182 182 10304 2884 0.987248 0.987248 -24.8471 -0.987248 0 0 701300. 2426.64 0.25 0.01 0.09 -1 -1 0.25 0.00222816 0.00186765 31 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_011bits.v common 2.94 vpr 62.50 MiB -1 -1 0.10 20672 1 0.02 -1 -1 33708 -1 -1 5 23 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63996 23 12 83 84 1 55 40 17 17 289 -1 unnamed_device 23.9 MiB 0.03 198 2964 1048 1253 663 62.5 MiB 0.01 0.00 0.988958 -22.191 -0.988958 0.988958 0.73 4.5193e-05 3.0659e-05 0.00286157 0.00209674 28 444 14 6.64007e+06 62790 500653. 1732.36 0.59 0.00975852 0.0075422 21970 115934 -1 382 10 192 192 12528 3400 0.987248 0.987248 -28.4291 -0.987248 0 0 612192. 2118.31 0.22 0.01 0.07 -1 -1 0.22 0.00183831 0.0015918 34 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 3.28 vpr 62.40 MiB -1 -1 0.08 20672 1 0.03 -1 -1 33380 -1 -1 5 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63900 25 13 90 91 1 61 43 17 17 289 -1 unnamed_device 24.1 MiB 0.02 188 2818 769 1542 507 62.4 MiB 0.01 0.00 0.999958 -24.0458 -0.999958 0.999958 0.75 4.301e-05 2.9399e-05 0.00226755 0.00166191 32 530 20 6.64007e+06 62790 554710. 1919.41 0.77 0.0120549 0.00927109 22834 132086 -1 473 20 435 435 27907 7972 1.04345 1.04345 -30.9097 -1.04345 0 0 701300. 2426.64 0.31 0.02 0.09 -1 -1 0.31 0.00466369 0.00388628 37 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 4.04 vpr 62.45 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33536 -1 -1 6 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63948 27 14 97 98 1 67 47 17 17 289 -1 unnamed_device 23.9 MiB 0.02 243 3575 1303 1746 526 62.4 MiB 0.01 0.00 1.01096 -27.1135 -1.01096 1.01096 0.71 0.000111885 8.8427e-05 0.00327909 0.00244537 28 607 14 6.64007e+06 75348 500653. 1732.36 1.67 0.0245283 0.018848 21970 115934 -1 512 10 238 238 14540 3860 1.11845 1.11845 -33.9673 -1.11845 0 0 612192. 2118.31 0.23 0.01 0.08 -1 -1 0.23 0.00214712 0.00186634 40 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 3.05 vpr 62.48 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33472 -1 -1 7 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63984 29 15 104 105 1 73 51 17 17 289 -1 unnamed_device 23.9 MiB 0.02 232 3529 1196 1796 537 62.5 MiB 0.01 0.00 1.02196 -28.6296 -1.02196 1.02196 0.73 0.000176927 0.000154273 0.0029226 0.00218955 32 695 25 6.64007e+06 87906 554710. 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64020 37 19 132 133 1 90 64 17 17 289 -1 unnamed_device 24.1 MiB 0.02 338 7176 2525 3067 1584 62.5 MiB 0.02 0.00 1.29507 -38.2448 -1.29507 1.29507 0.75 6.317e-05 4.6373e-05 0.00441301 0.00334938 30 840 20 6.64007e+06 100464 526063. 1820.29 1.46 0.0260841 0.0207414 22546 126617 -1 661 13 420 420 26793 7305 1.02025 1.02025 -45.3445 -1.02025 0 0 666494. 2306.21 0.25 0.01 0.09 -1 -1 0.25 0.00330018 0.00278503 55 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 3.04 vpr 62.66 MiB -1 -1 0.08 20976 1 0.03 -1 -1 33892 -1 -1 8 41 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64160 41 21 146 147 1 102 70 17 17 289 -1 unnamed_device 24.2 MiB 0.03 451 8134 3308 4729 97 62.7 MiB 0.02 0.00 1.31707 -45.3421 -1.31707 1.31707 0.70 6.8401e-05 5.0726e-05 0.00472156 0.00363712 30 1027 29 6.64007e+06 100464 526063. 1820.29 0.65 0.0190038 0.0151666 22546 126617 -1 832 12 369 369 26827 6859 1.24845 1.24845 -55.7326 -1.24845 0 0 666494. 2306.21 0.25 0.01 0.08 -1 -1 0.25 0.00318813 0.00276252 61 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 4.61 vpr 62.88 MiB -1 -1 0.10 20824 1 0.03 -1 -1 33712 -1 -1 10 45 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64392 45 23 160 161 1 114 78 17 17 289 -1 unnamed_device 24.4 MiB 0.02 509 9374 3829 5402 143 62.9 MiB 0.03 0.00 1.33907 -50.1996 -1.33907 1.33907 0.72 0.000103281 7.7804e-05 0.00600342 0.00471474 32 1129 17 6.64007e+06 125580 554710. 1919.41 2.12 0.0373773 0.0304387 22834 132086 -1 908 13 453 453 33644 8640 1.13925 1.13925 -58.7874 -1.13925 0 0 701300. 2426.64 0.28 0.01 0.08 -1 -1 0.28 0.00411313 0.00359562 68 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 3.18 vpr 63.10 MiB -1 -1 0.09 20976 1 0.02 -1 -1 33756 -1 -1 10 49 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64616 49 25 174 175 1 123 84 17 17 289 -1 unnamed_device 24.5 MiB 0.03 523 5208 1012 3926 270 63.1 MiB 0.02 0.00 1.59018 -56.6412 -1.59018 1.59018 0.76 9.6098e-05 7.3461e-05 0.00402729 0.00308733 32 1253 19 6.64007e+06 125580 554710. 1919.41 0.67 0.0215448 0.0177155 22834 132086 -1 982 14 513 513 33898 9004 1.18125 1.18125 -64.2909 -1.18125 0 0 701300. 2426.64 0.23 0.01 0.09 -1 -1 0.23 0.00487512 0.00433118 73 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 4.64 vpr 63.12 MiB -1 -1 0.11 20976 1 0.03 -1 -1 33524 -1 -1 11 57 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64640 57 29 202 203 1 143 97 17 17 289 -1 unnamed_device 24.6 MiB 0.03 831 13417 3240 9555 622 63.1 MiB 0.05 0.00 1.63418 -72.9016 -1.63418 1.63418 0.72 0.000186825 0.000161576 0.00914489 0.00732641 32 1590 14 6.64007e+06 138138 554710. 1919.41 2.10 0.0467505 0.0385834 22834 132086 -1 1494 13 605 605 53116 11842 1.19225 1.19225 -80.5386 -1.19225 0 0 701300. 2426.64 0.26 0.02 0.09 -1 -1 0.26 0.00525708 0.00464377 85 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 3.36 vpr 63.12 MiB -1 -1 0.10 20976 1 0.03 -1 -1 33488 -1 -1 13 65 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64640 65 33 230 231 1 164 111 17 17 289 -1 unnamed_device 24.6 MiB 0.04 821 18997 4618 12974 1405 63.1 MiB 0.06 0.00 1.90729 -82.5843 -1.90729 1.90729 0.71 0.000151602 0.000120557 0.0116264 0.00940947 32 1877 45 6.64007e+06 163254 554710. 1919.41 0.77 0.0418272 0.0352205 22834 132086 -1 1612 15 804 804 73983 18287 1.39845 1.39845 -97.0573 -1.39845 0 0 701300. 2426.64 0.26 0.02 0.10 -1 -1 0.26 0.00646994 0.00575449 97 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 5.05 vpr 63.88 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33852 -1 -1 19 97 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65412 97 49 342 343 1 246 165 17 17 289 -1 unnamed_device 25.1 MiB 0.05 1579 31353 10762 18393 2198 63.9 MiB 0.11 0.00 2.54151 -146.889 -2.54151 2.54151 0.72 0.000201451 0.000169135 0.018652 0.0155522 32 2959 19 6.64007e+06 238602 554710. 1919.41 2.33 0.0816981 0.0708703 22834 132086 -1 2645 15 986 986 97283 21364 1.63645 1.63645 -154.947 -1.63645 0 0 701300. 2426.64 0.27 0.03 0.10 -1 -1 0.27 0.0113641 0.0103462 145 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 5.61 vpr 64.52 MiB -1 -1 0.12 21280 1 0.04 -1 -1 33868 -1 -1 25 129 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66072 129 65 454 455 1 328 219 17 17 289 -1 unnamed_device 25.8 MiB 0.08 2068 47667 16504 27751 3412 64.5 MiB 0.16 0.00 3.17573 -213.889 -3.17573 3.17573 0.73 0.000319971 0.00027836 0.0275048 0.0240175 32 3946 45 6.64007e+06 313950 554710. 1919.41 2.75 0.168749 0.151981 22834 132086 -1 3491 21 1355 1355 140776 30872 1.71145 1.71145 -202.831 -1.71145 0 0 701300. 2426.64 0.27 0.05 0.09 -1 -1 0.27 0.0187772 0.017051 193 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_003bits.v common 2.52 vpr 61.88 MiB -1 -1 0.07 20520 1 0.02 -1 -1 33448 -1 -1 2 7 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63368 7 4 27 28 1 14 13 17 17 289 -1 unnamed_device 23.4 MiB 0.00 35 163 52 107 4 61.9 MiB 0.00 0.00 0.649848 -6.05553 -0.649848 0.649848 0.76 1.9281e-05 1.0697e-05 0.000385558 0.000259611 12 111 11 6.65987e+06 25356 231691. 801.699 0.28 0.00133321 0.000971853 19090 58805 -1 91 10 41 41 2467 804 0.889189 0.889189 -7.25541 -0.889189 0 0 318358. 1101.58 0.14 0.00 0.04 -1 -1 0.14 0.000835485 0.000642413 10 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_004bits.v common 2.84 vpr 61.75 MiB -1 -1 0.07 20520 1 0.03 -1 -1 33476 -1 -1 2 9 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63232 9 5 34 35 1 20 16 17 17 289 -1 unnamed_device 23.4 MiB 0.01 55 396 81 266 49 61.8 MiB 0.00 0.00 0.660848 -7.29716 -0.660848 0.660848 0.74 2.3078e-05 1.3389e-05 0.00074427 0.000512524 24 172 9 6.65987e+06 25356 448715. 1552.65 0.50 0.00407357 0.00289966 21394 104001 -1 141 14 74 74 3830 1178 0.770048 0.770048 -10.0478 -0.770048 0 0 554710. 1919.41 0.22 0.00 0.08 -1 -1 0.22 0.0011639 0.000947277 13 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_005bits.v common 2.90 vpr 62.10 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33452 -1 -1 2 11 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63588 11 6 41 42 1 26 19 17 17 289 -1 unnamed_device 23.6 MiB 0.01 57 794 216 487 91 62.1 MiB 0.00 0.00 0.682848 -9.10125 -0.682848 0.682848 0.73 2.3352e-05 1.3681e-05 0.0010229 0.000669306 28 199 20 6.65987e+06 25356 500653. 1732.36 0.57 0.00514579 0.0035361 21970 115934 -1 169 23 208 208 10414 3421 1.03245 1.03245 -12.1904 -1.03245 0 0 612192. 2118.31 0.22 0.01 0.08 -1 -1 0.22 0.00177404 0.00135267 16 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_006bits.v common 4.21 vpr 61.83 MiB -1 -1 0.07 20520 1 0.03 -1 -1 33604 -1 -1 4 13 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63316 13 7 48 49 1 32 24 17 17 289 -1 unnamed_device 23.4 MiB 0.01 82 1180 315 625 240 61.8 MiB 0.01 0.00 0.704848 -11.2793 -0.704848 0.704848 0.71 3.3328e-05 2.0365e-05 0.00160676 0.00110252 32 313 27 6.65987e+06 50712 554710. 1919.41 1.80 0.0153125 0.0107859 22834 132086 -1 226 24 260 260 18407 6049 1.04345 1.04345 -16.5833 -1.04345 0 0 701300. 2426.64 0.25 0.01 0.09 -1 -1 0.25 0.00239887 0.00184419 20 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_007bits.v common 2.95 vpr 61.87 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33536 -1 -1 3 15 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63356 15 8 55 56 1 38 26 17 17 289 -1 unnamed_device 23.6 MiB 0.01 122 1318 531 759 28 61.9 MiB 0.01 0.00 0.944958 -14.5215 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1.10745 -21.5634 -1.10745 0 0 701300. 2426.64 0.28 0.01 0.09 -1 -1 0.28 0.00168287 0.00141343 25 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_009bits.v common 2.97 vpr 61.98 MiB -1 -1 0.08 20672 1 0.03 -1 -1 33516 -1 -1 4 19 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63468 19 10 69 70 1 44 33 17 17 289 -1 unnamed_device 23.6 MiB 0.01 131 2321 684 1169 468 62.0 MiB 0.01 0.00 0.966958 -17.7934 -0.966958 0.966958 0.70 3.381e-05 2.1457e-05 0.00234333 0.00156046 30 344 8 6.65987e+06 50712 526063. 1820.29 0.60 0.00769816 0.00564609 22546 126617 -1 301 12 174 174 11663 3347 1.02539 1.02539 -23.0677 -1.02539 0 0 666494. 2306.21 0.26 0.01 0.08 -1 -1 0.26 0.00188389 0.00154264 28 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_010bits.v 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63540 23 12 83 84 1 55 40 17 17 289 -1 unnamed_device 23.6 MiB 0.01 198 2964 1076 1593 295 62.1 MiB 0.01 0.00 0.988958 -22.5516 -0.988958 0.988958 0.69 4.4503e-05 2.9959e-05 0.0026792 0.00185805 26 500 17 6.65987e+06 63390 477104. 1650.88 0.58 0.0101327 0.00765179 21682 110474 -1 420 16 238 238 16969 4911 1.14045 1.14045 -30.5211 -1.14045 0 0 585099. 2024.56 0.25 0.01 0.07 -1 -1 0.25 0.00232219 0.00195403 34 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_012bits.v common 3.03 vpr 61.98 MiB -1 -1 0.10 20672 1 0.02 -1 -1 33352 -1 -1 5 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63468 25 13 90 91 1 61 43 17 17 289 -1 unnamed_device 23.7 MiB 0.01 184 3268 980 1600 688 62.0 MiB 0.01 0.00 0.999958 -24.0458 -0.999958 0.999958 0.72 4.1214e-05 2.7341e-05 0.00264709 0.00195825 32 594 17 6.65987e+06 63390 554710. 1919.41 0.64 0.011888 0.00924061 22834 132086 -1 475 15 313 313 28827 7993 1.27165 1.27165 -34.5707 -1.27165 0 0 701300. 2426.64 0.25 0.01 0.09 -1 -1 0.25 0.00296579 0.00247244 37 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_013bits.v common 3.94 vpr 62.43 MiB -1 -1 0.09 20824 1 0.02 -1 -1 33532 -1 -1 6 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63924 27 14 97 98 1 67 47 17 17 289 -1 unnamed_device 24.0 MiB 0.01 240 3575 1257 1677 641 62.4 MiB 0.02 0.00 1.01096 -26.9933 -1.01096 1.01096 0.70 7.0558e-05 4.8862e-05 0.00361809 0.00244816 28 599 17 6.65987e+06 76068 500653. 1732.36 1.63 0.0234821 0.0178245 21970 115934 -1 507 17 279 279 23991 6262 1.03125 1.03125 -34.1691 -1.03125 0 0 612192. 2118.31 0.23 0.01 0.07 -1 -1 0.23 0.00288742 0.00243908 40 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_014bits.v common 2.99 vpr 62.16 MiB -1 -1 0.08 20672 1 0.02 -1 -1 33492 -1 -1 7 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63656 29 15 104 105 1 73 51 17 17 289 -1 unnamed_device 23.7 MiB 0.01 307 3623 1303 1741 579 62.2 MiB 0.01 0.00 1.02196 -29.471 -1.02196 1.02196 0.74 5.0131e-05 3.513e-05 0.00282572 0.00210369 32 691 21 6.65987e+06 88746 554710. 1919.41 0.61 0.0126168 0.0099887 22834 132086 -1 591 13 317 317 23878 6456 1.06939 1.06939 -36.9078 -1.06939 0 0 701300. 2426.64 0.25 0.01 0.08 -1 -1 0.25 0.00254184 0.00224995 44 -1 -1 -1 -1 -1 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release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64036 33 17 118 119 1 82 57 17 17 289 -1 unnamed_device 24.0 MiB 0.01 365 6488 2657 3720 111 62.5 MiB 0.02 0.00 1.27307 -35.7591 -1.27307 1.27307 0.72 5.8944e-05 4.3392e-05 0.0049583 0.00377995 30 722 16 6.65987e+06 88746 526063. 1820.29 1.95 0.0230633 0.0182274 22546 126617 -1 602 16 307 307 19188 5295 0.975048 0.975048 -40.1012 -0.975048 0 0 666494. 2306.21 0.24 0.01 0.07 -1 -1 0.24 0.00336399 0.00290985 49 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_018bits.v common 4.42 vpr 62.34 MiB -1 -1 0.10 20672 1 0.03 -1 -1 33596 -1 -1 8 37 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63840 37 19 132 133 1 90 64 17 17 289 -1 unnamed_device 23.9 MiB 0.02 340 7176 2269 3381 1526 62.3 MiB 0.02 0.00 1.29507 -37.764 -1.29507 1.29507 0.71 6.1139e-05 4.4109e-05 0.00464636 0.00351117 32 931 22 6.65987e+06 101424 554710. 1919.41 2.01 0.0291023 0.0232939 22834 132086 -1 734 16 366 366 28257 7378 1.20445 1.20445 -49.0435 -1.20445 0 0 701300. 2426.64 0.26 0.01 0.08 -1 -1 0.26 0.00420298 0.00361454 55 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_020bits.v common 3.16 vpr 62.48 MiB -1 -1 0.08 20824 1 0.03 -1 -1 33900 -1 -1 8 41 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63984 41 21 146 147 1 102 70 17 17 289 -1 unnamed_device 23.9 MiB 0.02 384 8134 3331 4638 165 62.5 MiB 0.02 0.00 1.31707 -42.9381 -1.31707 1.31707 0.70 8.8195e-05 5.8085e-05 0.00505567 0.00389305 32 1019 34 6.65987e+06 101424 554710. 1919.41 0.74 0.0219728 0.0176863 22834 132086 -1 877 16 536 536 50239 13379 1.37965 1.37965 -57.7476 -1.37965 0 0 701300. 2426.64 0.27 0.02 0.08 -1 -1 0.27 0.00418896 0.00356935 61 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_022bits.v common 4.51 vpr 62.56 MiB -1 -1 0.09 20824 1 0.03 -1 -1 33748 -1 -1 10 45 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64064 45 23 160 161 1 114 78 17 17 289 -1 unnamed_device 24.0 MiB 0.02 500 9374 3830 5385 159 62.6 MiB 0.03 0.00 1.33907 -49.9592 -1.33907 1.33907 0.72 8.3703e-05 6.3928e-05 0.00570638 0.00449527 28 1226 35 6.65987e+06 126780 500653. 1732.36 2.11 0.038225 0.0308787 21970 115934 -1 1025 17 546 546 53878 13166 1.16125 1.16125 -60.6868 -1.16125 0 0 612192. 2118.31 0.24 0.02 0.08 -1 -1 0.24 0.00442289 0.00383964 68 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_024bits.v common 4.08 vpr 62.94 MiB -1 -1 0.08 20976 1 0.02 -1 -1 33868 -1 -1 10 49 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64448 49 25 174 175 1 123 84 17 17 289 -1 unnamed_device 24.2 MiB 0.02 518 7953 1698 5867 388 62.9 MiB 0.03 0.00 1.59018 -54.9583 -1.59018 1.59018 0.71 9.2608e-05 7.1758e-05 0.00524252 0.00397078 30 1317 40 6.65987e+06 126780 526063. 1820.29 1.70 0.0424875 0.0343948 22546 126617 -1 1043 14 510 510 38750 9966 1.14825 1.14825 -64.4174 -1.14825 0 0 666494. 2306.21 0.26 0.01 0.08 -1 -1 0.26 0.00432975 0.00382352 73 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_028bits.v common 4.78 vpr 62.96 MiB -1 -1 0.10 20824 1 0.03 -1 -1 33656 -1 -1 11 57 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64468 57 29 202 203 1 143 97 17 17 289 -1 unnamed_device 24.3 MiB 0.02 692 10753 2417 7715 621 63.0 MiB 0.03 0.00 1.63418 -68.5744 -1.63418 1.63418 0.73 0.000110869 8.8402e-05 0.00690914 0.0056177 32 1737 40 6.65987e+06 139458 554710. 1919.41 2.32 0.0509222 0.0420446 22834 132086 -1 1432 19 710 710 60508 16393 1.44365 1.44365 -85.9843 -1.44365 0 0 701300. 2426.64 0.25 0.02 0.08 -1 -1 0.25 0.00625711 0.00547933 85 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_032bits.v common 3.23 vpr 62.96 MiB -1 -1 0.09 20976 1 0.03 -1 -1 33464 -1 -1 13 65 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64476 65 33 230 231 1 164 111 17 17 289 -1 unnamed_device 24.5 MiB 0.02 992 18997 5558 12096 1343 63.0 MiB 0.06 0.00 1.90729 -88.2336 -1.90729 1.90729 0.74 0.000134738 0.000108641 0.011033 0.0090292 32 1892 14 6.65987e+06 164814 554710. 1919.41 0.68 0.0326957 0.0274559 22834 132086 -1 1727 17 749 749 68007 16145 1.40945 1.40945 -100.25 -1.40945 0 0 701300. 2426.64 0.25 0.02 0.09 -1 -1 0.25 0.00715909 0.00628831 97 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_048bits.v common 3.29 vpr 64.03 MiB -1 -1 0.08 21128 1 0.03 -1 -1 33664 -1 -1 19 97 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65564 97 49 342 343 1 246 165 17 17 289 -1 unnamed_device 25.2 MiB 0.03 1598 31353 10728 17929 2696 64.0 MiB 0.10 0.00 2.54151 -146.769 -2.54151 2.54151 0.69 0.00022622 0.000189313 0.0166637 0.0140338 32 2981 14 6.65987e+06 240882 554710. 1919.41 0.75 0.0489817 0.0426119 22834 132086 -1 2680 17 1050 1050 106933 23990 1.49425 1.49425 -148.49 -1.49425 0 0 701300. 2426.64 0.26 0.03 0.08 -1 -1 0.26 0.0110431 0.00985379 145 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml adder_064bits.v common 5.39 vpr 64.68 MiB -1 -1 0.11 21432 1 0.03 -1 -1 33604 -1 -1 25 129 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66228 129 65 454 455 1 328 219 17 17 289 -1 unnamed_device 25.9 MiB 0.05 2043 47667 15752 27729 4186 64.7 MiB 0.16 0.00 3.17573 -213.408 -3.17573 3.17573 0.71 0.000311637 0.000271548 0.025845 0.0226259 32 4105 34 6.65987e+06 316950 554710. 1919.41 2.64 0.163719 0.145584 22834 132086 -1 3530 18 1417 1417 145849 33368 1.84145 1.84145 -210.164 -1.84145 0 0 701300. 2426.64 0.27 0.05 0.09 -1 -1 0.27 0.0160756 0.0146896 193 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml adder_003bits.v common 2.36 vpr 62.89 MiB -1 -1 0.08 20520 1 0.03 -1 -1 33584 -1 -1 1 7 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64400 7 4 27 28 1 12 12 17 17 289 -1 unnamed_device 24.4 MiB 0.01 75 38 20 18 0 62.9 MiB 0.00 0.00 0.942216 -8.48094 -0.942216 0.942216 0.72 3.0623e-05 1.6048e-05 0.000218674 0.000162315 8 136 7 6.95648e+06 14475.7 166176. 575.005 0.21 0.00101507 0.000792526 20866 45572 -1 121 11 44 44 3522 786 0.942216 0.942216 -9.10744 -0.942216 0 0 202963. 702.294 0.10 0.00 0.03 -1 -1 0.10 0.000970769 0.000673977 5 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml adder_004bits.v common 2.80 vpr 62.79 MiB -1 -1 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64036 11 6 41 42 1 19 18 17 17 289 -1 unnamed_device 24.1 MiB 0.03 50 455 107 320 28 62.5 MiB 0.00 0.00 0.701895 -10.2821 -0.701895 0.701895 0.72 2.413e-05 1.4167e-05 0.00081604 0.000572593 22 188 10 6.95648e+06 14475.7 443629. 1535.05 0.50 0.00456598 0.00340264 23458 102101 -1 126 10 62 62 3079 1067 0.74674 0.74674 -12.2869 -0.74674 0 0 531479. 1839.03 0.20 0.00 0.06 -1 -1 0.20 0.00123693 0.00100407 8 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml adder_006bits.v common 3.36 vpr 62.87 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33456 -1 -1 2 13 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64376 13 7 48 49 1 25 22 17 17 289 -1 unnamed_device 24.4 MiB 0.03 64 562 145 396 21 62.9 MiB 0.00 0.00 0.710132 -12.7823 -0.710132 0.710132 0.74 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64668 29 15 104 105 1 72 48 17 17 289 -1 unnamed_device 24.6 MiB 0.02 361 3876 1161 2082 633 63.2 MiB 0.02 0.00 0.834592 -34.1238 -0.834592 0.834592 0.78 7.9782e-05 5.6331e-05 0.00508579 0.00374592 34 870 24 6.95648e+06 57902.7 618332. 2139.56 1.06 0.0233769 0.0178178 25762 151098 -1 772 17 422 422 41301 9196 1.36963 1.36963 -46.7901 -1.36963 0 0 787024. 2723.27 0.29 0.01 0.11 -1 -1 0.29 0.00301559 0.00253567 23 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml adder_015bits.v common 3.64 vpr 63.19 MiB -1 -1 0.10 20672 1 0.03 -1 -1 33892 -1 -1 3 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64708 31 16 111 112 1 78 50 17 17 289 -1 unnamed_device 24.7 MiB 0.04 264 4650 1874 2729 47 63.2 MiB 0.02 0.00 1.08336 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64348 13 7 48 49 1 26 22 17 17 289 -1 unnamed_device 24.3 MiB 0.01 66 502 127 363 12 62.8 MiB 0.01 0.00 0.710132 -12.5285 -0.710132 0.710132 0.76 3.1704e-05 1.9896e-05 0.00105341 0.000811635 24 195 10 6.99608e+06 29431.4 470940. 1629.55 1.71 0.0118074 0.00836178 24034 113901 -1 194 10 92 92 4769 1631 0.791432 0.791432 -16.0822 -0.791432 0 0 586450. 2029.24 0.21 0.01 0.07 -1 -1 0.21 0.00198376 0.00161794 10 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml adder_007bits.v common 4.23 vpr 62.87 MiB -1 -1 0.07 20672 1 0.03 -1 -1 33648 -1 -1 2 15 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64540 23 12 83 84 1 54 38 17 17 289 -1 unnamed_device 24.4 MiB 0.01 163 1109 204 877 28 63.0 MiB 0.01 0.00 0.754132 -21.3368 -0.754132 0.754132 0.72 6.8295e-05 4.7038e-05 0.00150768 0.00112098 30 503 18 6.99608e+06 44147 556674. 1926.21 1.94 0.0166853 0.0127012 25186 138497 -1 418 14 292 292 18671 5421 1.08603 1.08603 -30.5285 -1.08603 0 0 706193. 2443.58 0.25 0.01 0.08 -1 -1 0.25 0.00222494 0.0018685 17 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml adder_012bits.v common 4.43 vpr 63.06 MiB -1 -1 0.09 20824 1 0.02 -1 -1 33388 -1 -1 3 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64572 25 13 90 91 1 60 41 17 17 289 -1 unnamed_device 24.6 MiB 0.01 178 1441 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64428 33 17 118 119 1 81 54 17 17 289 -1 unnamed_device 24.6 MiB 0.02 279 5256 2170 3037 49 62.9 MiB 0.02 0.00 1.06616 -34.4197 -1.06616 1.06616 0.77 5.5302e-05 3.9265e-05 0.00375525 0.00271798 34 903 30 6.99608e+06 58862.7 618332. 2139.56 1.24 0.0232694 0.0181505 25762 151098 -1 660 17 456 456 46010 11114 1.20503 1.20503 -46.0713 -1.20503 0 0 787024. 2723.27 0.27 0.02 0.10 -1 -1 0.27 0.00424668 0.00364735 25 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml adder_018bits.v common 3.67 vpr 63.13 MiB -1 -1 0.09 20672 1 0.02 -1 -1 33592 -1 -1 4 37 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64644 37 19 132 133 1 87 60 17 17 289 -1 unnamed_device 24.6 MiB 0.02 317 7431 3190 4192 49 63.1 MiB 0.02 0.00 1.08816 -39.1261 -1.08816 1.08816 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64808 49 25 174 175 1 118 79 17 17 289 -1 unnamed_device 24.6 MiB 0.02 517 10050 4250 5734 66 63.3 MiB 0.03 0.00 1.14316 -55.0096 -1.14316 1.14316 0.73 9.6536e-05 7.448e-05 0.00638632 0.00486954 34 1538 33 6.99608e+06 73578.4 618332. 2139.56 3.14 0.0504885 0.0407844 25762 151098 -1 1126 14 602 602 58218 14342 1.41833 1.41833 -75.5491 -1.41833 0 0 787024. 2723.27 0.28 0.02 0.10 -1 -1 0.28 0.00464802 0.00409995 37 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml adder_028bits.v common 5.79 vpr 63.72 MiB -1 -1 0.10 20824 1 0.03 -1 -1 33476 -1 -1 6 57 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65252 57 29 202 203 1 141 92 17 17 289 -1 unnamed_device 25.0 MiB 0.03 637 15410 6711 8615 84 63.7 MiB 0.04 0.00 1.19816 -66.0749 -1.19816 1.19816 0.75 0.000114889 8.8473e-05 0.00938424 0.00752 38 1449 17 6.99608e+06 88294.1 678818. 2348.85 3.16 0.0544467 0.0450253 26626 170182 -1 1151 14 724 724 61028 14262 1.35903 1.35903 -84.1148 -1.35903 0 0 902133. 3121.57 0.29 0.03 0.12 -1 -1 0.29 0.00699184 0.00620137 43 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml adder_032bits.v common 6.08 vpr 63.76 MiB -1 -1 0.09 20976 1 0.03 -1 -1 33616 -1 -1 7 65 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65288 65 33 230 231 1 162 105 17 17 289 -1 unnamed_device 25.2 MiB 0.03 775 17889 7694 10045 150 63.8 MiB 0.07 0.00 1.47719 -78.1586 -1.47719 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63532 7 4 21 25 1 11 12 17 17 289 -1 unnamed_device 23.5 MiB 0.00 62 38 19 19 0 62.0 MiB 0.00 0.00 0.816915 -7.18451 -0.816915 0.816915 0.73 3.024e-05 1.6294e-05 0.000209626 0.000156122 18 122 6 6.79088e+06 13472 376052. 1301.22 0.39 0.000872718 0.000681037 22222 88205 -1 119 8 23 23 3521 885 0.942216 0.942216 -9.06401 -0.942216 0 0 470940. 1629.55 0.16 0.00 0.05 -1 -1 0.16 0.000768999 0.000617536 6 4 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_004bits.v common 2.72 vpr 62.23 MiB -1 -1 0.07 20672 2 0.05 -1 -1 35984 -1 -1 1 9 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63720 9 5 28 33 1 16 15 17 17 289 -1 unnamed_device 23.6 MiB 0.01 35 519 186 312 21 62.2 MiB 0.00 0.00 0.883748 -8.8411 -0.883748 0.883748 0.70 2.6081e-05 1.5758e-05 0.000864687 0.000560684 24 117 8 6.79088e+06 13472 470940. 1629.55 0.48 0.00370658 0.00254196 23374 113417 -1 88 12 43 43 1406 557 0.883748 0.883748 -9.9688 -0.883748 0 0 586450. 2029.24 0.20 0.00 0.07 -1 -1 0.20 0.000914381 0.000729027 8 6 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_005bits.v common 4.05 vpr 62.11 MiB -1 -1 0.08 20520 2 0.05 -1 -1 35560 -1 -1 2 11 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63600 11 6 34 40 1 23 19 17 17 289 -1 unnamed_device 23.6 MiB 0.01 62 394 83 301 10 62.1 MiB 0.00 0.00 1.02368 -11.3325 -1.02368 1.02368 0.70 4.044e-05 2.6342e-05 0.000743508 0.000518371 26 189 13 6.79088e+06 26944 503264. 1741.40 1.76 0.00625941 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63600 17 9 56 65 1 43 28 17 17 289 -1 unnamed_device 23.6 MiB 0.04 256 994 247 649 98 62.1 MiB 0.01 0.00 1.27433 -21.9359 -1.27433 1.27433 0.71 5.9379e-05 4.4614e-05 0.0013172 0.000982867 26 580 18 6.79088e+06 26944 503264. 1741.40 1.51 0.0101954 0.00769685 23662 119890 -1 547 10 181 218 18188 4222 1.27433 1.27433 -27.2846 -1.27433 0 0 618332. 2139.56 0.22 0.01 0.07 -1 -1 0.22 0.00220323 0.00189449 16 14 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_009bits.v common 4.39 vpr 62.12 MiB -1 -1 0.08 20672 4 0.06 -1 -1 35652 -1 -1 3 19 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63616 19 10 60 70 1 49 32 17 17 289 -1 unnamed_device 23.6 MiB 0.04 128 2382 698 1186 498 62.1 MiB 0.01 0.00 1.1736 -21.0018 -1.1736 1.1736 0.64 3.8497e-05 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63928 25 13 83 96 1 66 41 17 17 289 -1 unnamed_device 23.9 MiB 0.18 396 2211 508 1462 241 62.4 MiB 0.01 0.00 1.67834 -37.1705 -1.67834 1.67834 0.71 7.8186e-05 5.5685e-05 0.00224907 0.00171692 30 791 11 6.79088e+06 40416 556674. 1926.21 1.38 0.0187028 0.0148431 24526 138013 -1 705 8 222 270 17317 4059 1.67834 1.67834 -42.6837 -1.67834 0 0 706193. 2443.58 0.26 0.01 0.09 -1 -1 0.26 0.00228636 0.00205494 23 21 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_013bits.v common 3.76 vpr 62.33 MiB -1 -1 0.10 20672 5 0.06 -1 -1 35844 -1 -1 4 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63828 27 14 91 105 1 72 45 17 17 289 -1 unnamed_device 23.8 MiB 0.31 326 2205 524 1421 260 62.3 MiB 0.01 0.00 1.81483 -37.5133 -1.81483 1.81483 0.71 6.2134e-05 4.5569e-05 0.00240629 0.00186657 34 763 14 6.79088e+06 53888 618332. 2139.56 0.97 0.0186058 0.0149565 25102 150614 -1 701 14 269 351 25062 6268 1.81483 1.81483 -42.8619 -1.81483 0 0 787024. 2723.27 0.27 0.01 0.09 -1 -1 0.27 0.00356641 0.0031691 27 24 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_014bits.v common 4.96 vpr 62.65 MiB -1 -1 0.09 20672 6 0.06 -1 -1 35536 -1 -1 4 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64156 29 15 95 110 1 77 48 17 17 289 -1 unnamed_device 24.1 MiB 0.21 327 2571 494 2037 40 62.7 MiB 0.01 0.00 2.06549 -39.791 -2.06549 2.06549 0.74 7.5413e-05 5.5955e-05 0.0026195 0.00202675 34 746 9 6.79088e+06 53888 618332. 2139.56 2.25 0.0223556 0.0176744 25102 150614 -1 684 13 273 319 19393 5340 2.19079 2.19079 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64096 33 17 112 129 1 88 55 17 17 289 -1 unnamed_device 24.1 MiB 0.73 531 4735 1460 2804 471 62.6 MiB 0.02 0.00 2.39454 -55.2353 -2.39454 2.39454 0.74 7.8279e-05 5.7736e-05 0.00369073 0.00282382 28 1086 34 6.79088e+06 67360 531479. 1839.03 2.01 0.0314483 0.02503 23950 126010 -1 960 17 365 468 32373 7692 2.48064 2.48064 -64.084 -2.48064 0 0 648988. 2245.63 0.23 0.01 0.09 -1 -1 0.23 0.00403026 0.0034541 32 30 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_018bits.v common 4.99 vpr 62.70 MiB -1 -1 0.10 20976 7 0.06 -1 -1 35536 -1 -1 6 37 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64204 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64568 57 29 198 227 1 158 94 17 17 289 -1 unnamed_device 24.4 MiB 1.36 825 13939 3858 9311 770 63.1 MiB 0.04 0.00 3.65124 -113.218 -3.65124 3.65124 0.81 0.000127858 0.000102218 0.0105393 0.0085489 34 1884 22 6.79088e+06 107776 618332. 2139.56 1.42 0.0511149 0.0429484 25102 150614 -1 1676 15 646 938 68992 17003 3.65124 3.65124 -124.832 -3.65124 0 0 787024. 2723.27 0.30 0.02 0.09 -1 -1 0.30 0.00782811 0.00707468 59 56 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml adder_032bits.v common 6.90 vpr 63.06 MiB -1 -1 0.11 20976 13 0.09 -1 -1 36092 -1 -1 9 65 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64576 65 33 224 257 1 176 107 17 17 289 -1 unnamed_device 24.5 MiB 1.68 860 16046 6110 9065 871 63.1 MiB 0.04 0.00 4.44928 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64480 27 14 97 98 1 67 45 17 17 289 -1 unnamed_device 24.5 MiB 0.05 210 4365 1644 2064 657 63.0 MiB 0.01 0.00 1.0198 -29.2415 -1.0198 1.0198 0.75 4.6477e-05 3.1793e-05 0.00335591 0.00237462 32 704 36 6.87369e+06 55895.4 586450. 2029.24 0.96 0.0159615 0.0121589 25474 144626 -1 563 19 380 380 29842 8025 1.15867 1.15867 -38.7573 -1.15867 0 0 744469. 2576.02 0.25 0.01 0.09 -1 -1 0.25 0.00316905 0.00262704 28 -1 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml adder_014bits.v common 3.56 vpr 62.67 MiB -1 -1 0.06 20672 1 0.02 -1 -1 33472 -1 -1 5 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64176 29 15 104 105 1 74 49 17 17 289 -1 unnamed_device 24.2 MiB 0.09 237 5033 2069 2883 81 62.7 MiB 0.02 0.00 1.0308 -31.2922 -1.0308 1.0308 0.73 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65200 65 33 230 231 1 165 107 17 17 289 -1 unnamed_device 25.2 MiB 0.09 1053 16046 5631 8312 2103 63.7 MiB 0.09 0.00 1.93389 -95.3942 -1.93389 1.93389 0.75 0.000412992 0.000357929 0.0161153 0.0128677 34 2073 21 6.87369e+06 125765 618332. 2139.56 1.13 0.0406755 0.0334632 25762 151098 -1 1846 15 790 790 79691 16997 1.41667 1.41667 -107.308 -1.41667 0 0 787024. 2723.27 0.26 0.02 0.09 -1 -1 0.26 0.00572165 0.00504149 66 -1 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml adder_048bits.v common 4.79 vpr 64.32 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33852 -1 -1 13 97 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65868 97 49 342 343 1 247 159 17 17 289 -1 unnamed_device 25.6 MiB 0.13 1509 31549 10639 18646 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63904 11 6 41 42 1 27 20 17 17 289 -1 unnamed_device 23.9 MiB 0.03 104 263 79 175 9 62.4 MiB 0.00 0.00 0.691973 -11.0729 -0.691973 0.691973 0.78 2.4839e-05 1.5208e-05 0.000451897 0.000316691 26 196 9 6.89349e+06 42281.5 503264. 1741.40 0.55 0.00472356 0.00330062 24322 120374 -1 198 11 91 91 6096 1694 0.800073 0.800073 -13.9004 -0.800073 0 0 618332. 2139.56 0.23 0.01 0.08 -1 -1 0.23 0.00113559 0.000913336 13 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_006bits.v common 3.16 vpr 62.29 MiB -1 -1 0.08 20520 1 0.02 -1 -1 33604 -1 -1 3 13 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 63780 13 7 48 49 1 33 23 17 17 289 -1 unnamed_device 23.9 MiB 0.04 79 759 172 473 114 62.3 MiB 0.01 0.00 0.707773 -12.7134 -0.707773 0.707773 0.78 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64184 19 10 69 70 1 46 32 17 17 289 -1 unnamed_device 24.4 MiB 0.04 134 2582 860 1178 544 62.7 MiB 0.01 0.00 0.975803 -19.6041 -0.975803 0.975803 0.72 3.7732e-05 2.4957e-05 0.00235082 0.00156084 30 338 15 6.89349e+06 42281.5 556674. 1926.21 1.29 0.0136933 0.010084 25186 138497 -1 271 15 179 179 9018 2610 0.978373 0.978373 -23.2494 -0.978373 0 0 706193. 2443.58 0.24 0.01 0.08 -1 -1 0.24 0.00207004 0.00162267 20 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_010bits.v common 3.13 vpr 62.33 MiB -1 -1 0.09 20672 1 0.02 -1 -1 33348 -1 -1 3 21 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64256 29 15 104 105 1 74 49 17 17 289 -1 unnamed_device 24.4 MiB 0.07 228 5033 1712 2431 890 62.8 MiB 0.02 0.00 1.0308 -31.5428 -1.0308 1.0308 0.72 4.8213e-05 3.3235e-05 0.0035847 0.00264479 40 609 25 6.89349e+06 70469.2 706193. 2443.58 2.65 0.0277059 0.0211784 26914 176310 -1 535 22 435 435 63075 29598 1.09662 1.09662 -36.4901 -1.09662 0 0 926341. 3205.33 0.32 0.02 0.11 -1 -1 0.32 0.00442755 0.00369867 31 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_015bits.v common 3.23 vpr 62.80 MiB -1 -1 0.08 20672 1 0.03 -1 -1 33904 -1 -1 5 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64304 31 16 111 112 1 80 52 17 17 289 -1 unnamed_device 24.2 MiB 0.10 290 5387 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27468 7286 1.09932 1.09932 -44.3333 -1.09932 0 0 706193. 2443.58 0.25 0.01 0.09 -1 -1 0.25 0.00282604 0.00241883 34 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_018bits.v common 4.66 vpr 63.03 MiB -1 -1 0.09 20672 1 0.03 -1 -1 33572 -1 -1 5 37 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64544 37 19 132 133 1 90 61 17 17 289 -1 unnamed_device 24.5 MiB 0.07 337 6421 2626 3687 108 63.0 MiB 0.02 0.00 1.30983 -42.1622 -1.30983 1.30983 0.72 6.1605e-05 4.4383e-05 0.00422612 0.00322382 32 1027 23 6.89349e+06 70469.2 586450. 2029.24 2.17 0.0267178 0.0209857 25474 144626 -1 807 15 424 424 47144 11285 1.39827 1.39827 -56.3917 -1.39827 0 0 744469. 2576.02 0.27 0.01 0.09 -1 -1 0.27 0.00349538 0.00298992 38 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_020bits.v common 3.49 vpr 63.09 MiB -1 -1 0.08 20824 1 0.02 -1 -1 33908 -1 -1 6 41 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64600 41 21 146 147 1 102 68 17 17 289 -1 unnamed_device 24.5 MiB 0.07 400 7796 3228 4474 94 63.1 MiB 0.02 0.00 1.33183 -48.1638 -1.33183 1.33183 0.71 7.7448e-05 5.7715e-05 0.00491474 0.00378373 34 1131 21 6.89349e+06 84563 618332. 2139.56 1.02 0.0259442 0.0206484 25762 151098 -1 916 14 532 532 54773 13411 1.39197 1.39197 -62.0723 -1.39197 0 0 787024. 2723.27 0.26 0.02 0.10 -1 -1 0.26 0.00366045 0.0031126 42 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_022bits.v common 5.74 vpr 63.10 MiB -1 -1 0.08 20824 1 0.03 -1 -1 33564 -1 -1 7 45 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64616 45 23 160 161 1 115 75 17 17 289 -1 unnamed_device 24.7 MiB 0.09 441 8923 3660 5101 162 63.1 MiB 0.03 0.00 1.35383 -53.6522 -1.35383 1.35383 0.77 9.6917e-05 7.2199e-05 0.00603556 0.00459515 36 1227 21 6.89349e+06 98656.9 648988. 2245.63 3.11 0.0504098 0.0400845 26050 158493 -1 1057 26 731 731 132325 47237 1.34722 1.34722 -66.4393 -1.34722 0 0 828058. 2865.25 0.27 0.03 0.10 -1 -1 0.27 0.00619214 0.00528196 47 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_024bits.v common 5.23 vpr 63.05 MiB -1 -1 0.08 20976 1 0.03 -1 -1 34016 -1 -1 7 49 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64560 49 25 174 175 1 124 81 17 17 289 -1 unnamed_device 24.4 MiB 0.09 527 10231 2406 7311 514 63.0 MiB 0.03 0.00 1.61086 -60.657 -1.61086 1.61086 0.70 9.1481e-05 7.0035e-05 0.00674944 0.00528883 40 1169 14 6.89349e+06 98656.9 706193. 2443.58 2.60 0.0396304 0.0322205 26914 176310 -1 1085 14 570 570 54634 13464 1.34167 1.34167 -74.0035 -1.34167 0 0 926341. 3205.33 0.30 0.02 0.11 -1 -1 0.30 0.00445629 0.00389418 50 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_028bits.v common 3.58 vpr 63.47 MiB -1 -1 0.09 20976 1 0.03 -1 -1 33608 -1 -1 8 57 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64996 57 29 202 203 1 143 94 17 17 289 -1 unnamed_device 24.8 MiB 0.07 656 7336 1465 5453 418 63.5 MiB 0.03 0.00 1.65486 -74.1161 -1.65486 1.65486 0.71 0.000167617 0.000131411 0.00486553 0.00393922 34 1739 32 6.89349e+06 112751 618332. 2139.56 1.05 0.0367215 0.0304908 25762 151098 -1 1441 15 744 744 74343 18399 1.26862 1.26862 -88.0423 -1.26862 0 0 787024. 2723.27 0.27 0.02 0.09 -1 -1 0.27 0.00526002 0.00458633 58 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_032bits.v common 3.65 vpr 63.33 MiB -1 -1 0.09 20976 1 0.03 -1 -1 33464 -1 -1 9 65 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64852 65 33 230 231 1 165 107 17 17 289 -1 unnamed_device 24.8 MiB 0.09 1026 16046 6684 9284 78 63.3 MiB 0.05 0.00 1.93389 -94.0159 -1.93389 1.93389 0.73 0.00011526 9.1574e-05 0.00943912 0.00748347 34 2012 13 6.89349e+06 126845 618332. 2139.56 1.06 0.0427519 0.0357468 25762 151098 -1 1780 19 815 815 87842 18939 1.41197 1.41197 -104.785 -1.41197 0 0 787024. 2723.27 0.26 0.03 0.09 -1 -1 0.26 0.00718585 0.00616494 66 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_048bits.v common 3.97 vpr 64.35 MiB -1 -1 0.10 21280 1 0.03 -1 -1 33668 -1 -1 13 97 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65896 97 49 342 343 1 247 159 17 17 289 -1 unnamed_device 25.5 MiB 0.10 1486 31549 10583 18689 2277 64.4 MiB 0.10 0.00 2.57995 -155.455 -2.57995 2.57995 0.72 0.000220044 0.000184317 0.0179737 0.0150024 34 3396 21 6.89349e+06 183220 618332. 2139.56 1.29 0.0768044 0.0666136 25762 151098 -1 2737 20 1177 1177 137536 30476 1.78192 1.78192 -173.256 -1.78192 0 0 787024. 2723.27 0.26 0.04 0.09 -1 -1 0.26 0.012441 0.0111653 98 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml adder_064bits.v common 6.53 vpr 64.80 MiB -1 -1 0.11 21432 1 0.06 -1 -1 34036 -1 -1 17 129 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66360 129 65 454 455 1 329 211 17 17 289 -1 unnamed_device 26.0 MiB 0.11 1980 49744 15942 29606 4196 64.8 MiB 0.15 0.00 3.22602 -228.359 -3.22602 3.22602 0.74 0.000327652 0.000286351 0.0291935 0.025611 38 4067 20 6.89349e+06 239595 678818. 2348.85 3.34 0.169037 0.151455 26626 170182 -1 3647 20 1502 1502 150772 33390 1.88167 1.88167 -227.999 -1.88167 0 0 902133. 3121.57 0.29 0.04 0.11 -1 -1 0.29 0.0163871 0.0148492 130 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/multless_consts/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/multless_consts/config/golden_results.txt index 78cba1d6b86..05d95404626 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/multless_consts/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/multless_consts/config/golden_results.txt @@ -1,1025 +1,1025 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_001.v common 12.25 vpr 64.91 MiB -1 -1 0.22 20668 14 0.31 -1 -1 36916 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66472 32 32 277 309 1 204 91 17 17 289 -1 unnamed_device 26.3 MiB 0.49 1279 6823 1440 4905 478 64.9 MiB 0.07 0.00 7.95704 -163.811 -7.95704 7.95704 0.90 0.000644466 0.000584951 0.0261223 0.0237692 36 3193 16 6.55708e+06 325485 612192. 2118.31 8.17 0.299451 0.263742 22750 144809 -1 2849 34 1240 3807 386059 168230 6.88996 6.88996 -155.56 -6.88996 0 0 782063. 2706.10 0.32 0.16 0.14 -1 -1 0.32 0.0491233 0.0437711 183 182 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_002.v common 6.18 vpr 64.90 MiB -1 -1 0.24 20520 14 0.37 -1 -1 36508 -1 -1 31 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66456 30 32 272 304 1 210 93 17 17 289 -1 unnamed_device 26.3 MiB 0.62 1272 10173 2471 6545 1157 64.9 MiB 0.08 0.00 8.16064 -158.468 -8.16064 8.16064 0.88 0.000639138 0.000583373 0.0333726 0.0303216 36 3251 22 6.55708e+06 373705 612192. 2118.31 1.88 0.149984 0.131988 22750 144809 -1 2871 28 1569 4797 434858 167668 7.27044 7.27044 -149.639 -7.27044 0 0 782063. 2706.10 0.32 0.16 0.14 -1 -1 0.32 0.0419223 0.0374642 184 181 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_003.v common 7.06 vpr 64.44 MiB -1 -1 0.19 20480 11 0.28 -1 -1 36192 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65984 32 32 280 312 1 205 90 17 17 289 -1 unnamed_device 25.9 MiB 0.40 1375 11748 3042 6701 2005 64.4 MiB 0.10 0.00 6.90223 -139.699 -6.90223 6.90223 0.89 0.000623937 0.000563213 0.0404364 0.0366665 28 4030 31 6.55708e+06 313430 500653. 1732.36 3.22 0.155824 0.138594 21310 115450 -1 3257 20 1688 5676 395500 88119 6.50178 6.50178 -144.577 -6.50178 0 0 612192. 2118.31 0.27 0.12 0.11 -1 -1 0.27 0.0343819 0.0310306 186 185 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_004.v common 7.08 vpr 64.93 MiB -1 -1 0.22 20396 12 0.41 -1 -1 36396 -1 -1 30 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66484 29 32 275 307 1 205 91 17 17 289 -1 unnamed_device 26.6 MiB 0.67 1263 4783 870 3608 305 64.9 MiB 0.05 0.00 7.83974 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0.27 0.12 0.11 -1 -1 0.27 0.0349563 0.0312854 210 207 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_006.v common 8.48 vpr 64.61 MiB -1 -1 0.23 20876 13 0.30 -1 -1 36540 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66164 32 32 292 324 1 217 96 17 17 289 -1 unnamed_device 26.2 MiB 0.42 1337 11046 2900 6780 1366 64.6 MiB 0.10 0.00 7.78297 -154.862 -7.78297 7.78297 0.89 0.000662512 0.000599304 0.0373972 0.0338582 36 3405 22 6.55708e+06 385760 612192. 2118.31 4.52 0.291738 0.255592 22750 144809 -1 2807 15 1168 3766 204246 48163 6.8411 6.8411 -146.675 -6.8411 0 0 782063. 2706.10 0.32 0.08 0.14 -1 -1 0.32 0.0287825 0.026157 198 197 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_007.v common 6.88 vpr 64.32 MiB -1 -1 0.19 20392 12 0.24 -1 -1 36376 -1 -1 27 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65864 27 32 229 261 1 176 86 17 17 289 -1 unnamed_device 26.0 MiB 0.33 1022 8969 2278 5945 746 64.3 MiB 0.07 0.00 7.21391 -130.754 -7.21391 7.21391 0.87 0.000551298 0.000503406 0.0287552 0.0262008 30 2436 17 6.55708e+06 325485 526063. 1820.29 3.29 0.172506 0.151142 21886 126133 -1 2080 16 937 2522 114156 28302 6.43104 6.43104 -125.386 -6.43104 0 0 666494. 2306.21 0.28 0.06 0.12 -1 -1 0.28 0.0230929 0.0208209 152 144 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_008.v common 7.16 vpr 64.28 MiB -1 -1 0.20 20500 12 0.24 -1 -1 36320 -1 -1 22 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65824 31 32 229 261 1 184 85 17 17 289 -1 unnamed_device 25.9 MiB 0.28 1233 12733 3609 7498 1626 64.3 MiB 0.10 0.00 6.32286 -134.975 -6.32286 6.32286 0.89 0.000551316 0.000496822 0.0395188 0.0358134 36 3149 24 6.55708e+06 265210 612192. 2118.31 3.47 0.167718 0.147153 22750 144809 -1 2676 17 1207 3768 201034 45387 5.53052 5.53052 -132.576 -5.53052 0 0 782063. 2706.10 0.32 0.07 0.14 -1 -1 0.32 0.0237697 0.0213872 140 136 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_009.v common 7.78 vpr 64.46 MiB -1 -1 0.20 21124 12 0.20 -1 -1 36472 -1 -1 26 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66008 31 32 235 267 1 192 89 17 17 289 -1 unnamed_device 26.1 MiB 0.29 1203 13157 3412 7574 2171 64.5 MiB 0.10 0.00 6.35469 -136.224 -6.35469 6.35469 0.89 0.000577583 0.000525054 0.0397524 0.036129 36 2772 21 6.55708e+06 313430 612192. 2118.31 4.13 0.2804 0.246039 22750 144809 -1 2370 14 985 2568 141811 32387 5.67826 5.67826 -129.27 -5.67826 0 0 782063. 2706.10 0.32 0.06 0.14 -1 -1 0.32 0.0214843 0.0193815 150 142 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_010.v common 5.71 vpr 64.44 MiB -1 -1 0.20 20576 13 0.24 -1 -1 36396 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65988 32 32 250 282 1 193 89 17 17 289 -1 unnamed_device 26.0 MiB 0.36 1164 8207 1986 5229 992 64.4 MiB 0.07 0.00 7.79043 -163.222 -7.79043 7.79043 0.89 0.00060297 0.000549364 0.0275702 0.0251544 28 3341 23 6.55708e+06 301375 500653. 1732.36 2.01 0.116153 0.103085 21310 115450 -1 2943 16 1280 3583 227960 53199 6.58844 6.58844 -160.003 -6.58844 0 0 612192. 2118.31 0.26 0.08 0.12 -1 -1 0.26 0.0255869 0.0230857 157 155 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_011.v common 9.68 vpr 64.00 MiB -1 -1 0.19 20328 12 0.22 -1 -1 36340 -1 -1 24 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65540 30 32 216 248 1 168 86 17 17 289 -1 unnamed_device 25.4 MiB 0.30 1043 7646 1812 5284 550 64.0 MiB 0.06 0.00 6.98257 -137.016 -6.98257 6.98257 0.88 0.000521162 0.000471955 0.0223587 0.0201975 28 2870 17 6.55708e+06 289320 500653. 1732.36 6.13 0.159058 0.138799 21310 115450 -1 2423 29 956 2599 287403 124368 5.86158 5.86158 -130.373 -5.86158 0 0 612192. 2118.31 0.26 0.12 0.10 -1 -1 0.26 0.0320021 0.0283341 132 125 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_012.v common 12.92 vpr 64.37 MiB -1 -1 0.20 20444 12 0.19 -1 -1 36192 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65912 32 32 236 268 1 183 86 17 17 289 -1 unnamed_device 25.8 MiB 0.30 1210 6701 1475 4829 397 64.4 MiB 0.06 0.00 6.74278 -155.388 -6.74278 6.74278 0.89 0.000479134 0.000431229 0.0213102 0.0193087 28 3180 36 6.55708e+06 265210 500653. 1732.36 9.36 0.206601 0.179932 21310 115450 -1 2743 23 1051 2953 280355 102696 5.95786 5.95786 -150.76 -5.95786 0 0 612192. 2118.31 0.25 0.10 0.11 -1 -1 0.25 0.0282883 0.0251581 146 141 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_013.v common 11.19 vpr 64.79 MiB -1 -1 0.24 20628 13 0.30 -1 -1 36444 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66348 32 32 283 315 1 223 94 17 17 289 -1 unnamed_device 26.2 MiB 0.30 1329 9892 2541 6359 992 64.8 MiB 0.09 0.00 8.09466 -168.958 -8.09466 8.09466 0.90 0.000650341 0.000591084 0.0341279 0.0309589 28 3841 47 6.55708e+06 361650 500653. 1732.36 7.40 0.249207 0.219725 21310 115450 -1 3125 14 1275 3654 217111 49344 6.96836 6.96836 -162.422 -6.96836 0 0 612192. 2118.31 0.26 0.08 0.11 -1 -1 0.26 0.0272073 0.0247744 191 188 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_014.v common 14.84 vpr 65.14 MiB -1 -1 0.24 20976 14 0.38 -1 -1 36596 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66708 32 32 303 335 1 241 94 17 17 289 -1 unnamed_device 26.7 MiB 0.50 1640 11170 2650 7415 1105 65.1 MiB 0.09 0.00 9.0039 -186.596 -9.0039 9.0039 0.90 0.000628638 0.000571533 0.0382222 0.0345794 30 4087 23 6.55708e+06 361650 526063. 1820.29 10.76 0.307692 0.269717 21886 126133 -1 3325 19 1537 4514 224801 51116 7.64835 7.64835 -171.324 -7.64835 0 0 666494. 2306.21 0.29 0.09 0.12 -1 -1 0.29 0.0327013 0.0292665 210 208 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_015.v common 4.99 vpr 64.56 MiB -1 -1 0.19 20340 11 0.21 -1 -1 36368 -1 -1 27 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66112 29 32 225 257 1 174 88 17 17 289 -1 unnamed_device 26.2 MiB 0.29 878 5158 949 3601 608 64.6 MiB 0.05 0.00 6.71354 -123.992 -6.71354 6.71354 0.87 0.000524094 0.000476057 0.0168837 0.015385 28 3083 35 6.55708e+06 325485 500653. 1732.36 1.48 0.109797 0.0966377 21310 115450 -1 2258 18 1080 2942 164903 40606 6.13918 6.13918 -124.562 -6.13918 0 0 612192. 2118.31 0.26 0.07 0.11 -1 -1 0.26 0.023759 0.0213037 147 136 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_016.v common 18.58 vpr 64.97 MiB -1 -1 0.23 20840 12 0.35 -1 -1 36780 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66532 32 32 301 333 1 230 97 17 17 289 -1 unnamed_device 26.5 MiB 0.46 1420 10309 2435 6528 1346 65.0 MiB 0.09 0.00 7.45763 -153.823 -7.45763 7.45763 0.89 0.000685575 0.000620359 0.0369141 0.0334064 34 4188 46 6.55708e+06 397815 585099. 2024.56 14.43 0.43819 0.383266 22462 138074 -1 3417 30 1712 6122 483902 135469 6.58278 6.58278 -149.989 -6.58278 0 0 742403. 2568.87 0.31 0.17 0.14 -1 -1 0.31 0.0469367 0.0418013 209 206 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_017.v common 8.40 vpr 64.93 MiB -1 -1 0.23 20564 14 0.31 -1 -1 36492 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66492 32 32 277 309 1 217 93 17 17 289 -1 unnamed_device 26.4 MiB 0.35 1436 5553 1081 4073 399 64.9 MiB 0.06 0.00 7.42808 -156.41 -7.42808 7.42808 0.90 0.000628103 0.000568937 0.0203437 0.0184807 38 3267 17 6.55708e+06 349595 638502. 2209.35 4.49 0.234867 0.20453 23326 155178 -1 2853 17 1235 3687 188502 42656 6.46824 6.46824 -148.294 -6.46824 0 0 851065. 2944.86 0.35 0.08 0.15 -1 -1 0.35 0.0284457 0.0255955 184 182 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_018.v common 5.64 vpr 64.25 MiB -1 -1 0.20 20320 12 0.20 -1 -1 36060 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65792 32 32 227 259 1 178 87 17 17 289 -1 unnamed_device 25.7 MiB 0.40 1097 11991 2937 7207 1847 64.2 MiB 0.09 0.00 7.19884 -160.926 -7.19884 7.19884 0.91 0.000529656 0.00047873 0.03635 0.0329696 28 3171 46 6.55708e+06 277265 500653. 1732.36 1.92 0.139267 0.122785 21310 115450 -1 2530 17 1028 2794 175881 40837 6.01958 6.01958 -151.671 -6.01958 0 0 612192. 2118.31 0.27 0.07 0.11 -1 -1 0.27 0.0242703 0.0218063 140 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2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65888 31 32 231 263 1 184 87 17 17 289 -1 unnamed_device 26.0 MiB 0.47 1075 12951 3421 7713 1817 64.3 MiB 0.09 0.00 6.90774 -144.707 -6.90774 6.90774 0.87 0.000518921 0.000470492 0.0383893 0.0348581 28 3088 32 6.55708e+06 289320 500653. 1732.36 1.75 0.127841 0.112804 21310 115450 -1 2418 21 1210 3242 183150 43715 6.49978 6.49978 -146.691 -6.49978 0 0 612192. 2118.31 0.28 0.08 0.12 -1 -1 0.28 0.0288292 0.025754 144 138 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_021.v common 7.79 vpr 65.11 MiB -1 -1 0.21 20644 13 0.34 -1 -1 36364 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 32 32 304 336 1 224 95 17 17 289 -1 unnamed_device 26.7 MiB 0.50 1429 6575 1166 5105 304 65.1 MiB 0.07 0.00 8.01121 -157.98 -8.01121 8.01121 0.88 0.000682184 0.000620156 0.0251293 0.0228848 34 3477 22 6.55708e+06 373705 585099. 2024.56 3.77 0.259269 0.227576 22462 138074 -1 3110 20 1424 4228 228234 53308 7.2403 7.2403 -154.176 -7.2403 0 0 742403. 2568.87 0.31 0.09 0.13 -1 -1 0.31 0.0356212 0.0321156 211 209 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_022.v common 6.66 vpr 64.86 MiB -1 -1 0.23 20728 13 0.35 -1 -1 36668 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66420 32 32 288 320 1 221 91 17 17 289 -1 unnamed_device 26.5 MiB 0.53 1433 6823 1289 5315 219 64.9 MiB 0.07 0.00 7.886 -165.604 -7.886 7.886 0.88 0.000678421 0.000615822 0.0262773 0.0238461 44 3574 22 6.55708e+06 325485 742403. 2568.87 2.46 0.154591 0.137323 24478 177802 -1 2942 14 1252 4194 212048 48398 7.0397 7.0397 -155.854 -7.0397 0 0 937218. 3242.97 0.38 0.08 0.18 -1 -1 0.38 0.0289466 0.026386 194 193 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_023.v common 4.41 vpr 63.80 MiB -1 -1 0.17 20096 9 0.11 -1 -1 35676 -1 -1 24 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65336 26 32 152 184 1 120 82 17 17 289 -1 unnamed_device 25.3 MiB 0.21 744 10762 3120 6243 1399 63.8 MiB 0.06 0.00 5.06374 -98.4324 -5.06374 5.06374 0.86 0.000348834 0.000318644 0.0229421 0.0208564 26 1898 20 6.55708e+06 289320 477104. 1650.88 1.23 0.0725384 0.0638617 21022 109990 -1 1641 15 634 1522 95057 22191 4.8332 4.8332 -99.6652 -4.8332 0 0 585099. 2024.56 0.24 0.04 0.11 -1 -1 0.24 0.0138234 0.0123184 87 69 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_024.v common 6.92 vpr 64.78 MiB -1 -1 0.20 20480 13 0.36 -1 -1 36596 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66332 32 32 287 319 1 210 89 17 17 289 -1 unnamed_device 26.4 MiB 0.30 1381 10781 2930 5957 1894 64.8 MiB 0.10 0.00 7.83519 -151.249 -7.83519 7.83519 0.89 0.000681693 0.000616765 0.0401308 0.0364445 30 4083 42 6.55708e+06 301375 526063. 1820.29 3.11 0.162937 0.143911 21886 126133 -1 3116 19 1424 4288 219011 50426 6.9633 6.9633 -149.742 -6.9633 0 0 666494. 2306.21 0.27 0.08 0.12 -1 -1 0.27 0.0305639 0.0274023 193 192 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_025.v common 4.07 vpr 63.58 MiB -1 -1 0.15 19852 8 0.10 -1 -1 36192 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65108 32 32 154 186 1 120 80 17 17 289 -1 unnamed_device 25.2 MiB 0.14 553 7648 2806 3716 1126 63.6 MiB 0.04 0.00 4.12642 -89.8462 -4.12642 4.12642 0.87 0.000355901 0.000319822 0.016355 0.0147544 30 1616 22 6.55708e+06 192880 526063. 1820.29 0.98 0.0627594 0.0545273 21886 126133 -1 1260 14 548 1189 58527 16069 3.73148 3.73148 -90.4104 -3.73148 0 0 666494. 2306.21 0.29 0.03 0.11 -1 -1 0.29 0.0129312 0.0115289 77 59 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_026.v common 6.20 vpr 64.61 MiB -1 -1 0.21 20724 15 0.29 -1 -1 36332 -1 -1 28 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66160 32 32 254 286 1 199 92 17 17 289 -1 unnamed_device 26.1 MiB 0.41 1321 6923 1475 4903 545 64.6 MiB 0.06 0.00 8.32249 -162.146 -8.32249 8.32249 0.88 0.000588242 0.00053421 0.0235334 0.0214168 36 3269 25 6.55708e+06 337540 612192. 2118.31 2.35 0.168579 0.148055 22750 144809 -1 2787 16 1252 3638 203897 46010 7.4009 7.4009 -155.503 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66188 32 32 279 311 1 212 93 17 17 289 -1 unnamed_device 26.1 MiB 0.28 1276 11223 2538 6825 1860 64.6 MiB 0.09 0.00 7.85647 -160.581 -7.85647 7.85647 0.88 0.000660788 0.000601001 0.038465 0.0349657 30 3320 24 6.55708e+06 349595 526063. 1820.29 1.40 0.141788 0.126165 21886 126133 -1 2648 15 1237 3758 172498 41897 6.7183 6.7183 -150.821 -6.7183 0 0 666494. 2306.21 0.28 0.07 0.12 -1 -1 0.28 0.0273409 0.0247965 187 184 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_029.v common 6.04 vpr 64.06 MiB -1 -1 0.20 20384 12 0.19 -1 -1 36208 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65596 32 32 238 270 1 189 87 17 17 289 -1 unnamed_device 25.7 MiB 0.40 1153 7191 1558 5291 342 64.1 MiB 0.07 0.00 6.57592 -147.41 -6.57592 6.57592 0.90 0.000558458 0.000508672 0.0236861 0.021517 36 3148 35 6.55708e+06 277265 612192. 2118.31 2.30 0.156682 0.136833 22750 144809 -1 2589 16 1117 3275 186852 43337 5.60692 5.60692 -136.412 -5.60692 0 0 782063. 2706.10 0.31 0.07 0.14 -1 -1 0.31 0.0226543 0.020286 147 143 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_030.v common 4.71 vpr 64.31 MiB -1 -1 0.19 20700 11 0.19 -1 -1 36264 -1 -1 23 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65856 30 32 213 245 1 165 85 17 17 289 -1 unnamed_device 25.8 MiB 0.22 963 12919 3847 7319 1753 64.3 MiB 0.09 0.00 6.46503 -135.82 -6.46503 6.46503 0.91 0.000490911 0.000447319 0.0367836 0.0333483 28 2611 19 6.55708e+06 277265 500653. 1732.36 1.25 0.106111 0.0938547 21310 115450 -1 2181 15 892 2397 136411 32401 5.86158 5.86158 -133.481 -5.86158 0 0 612192. 2118.31 0.27 0.05 0.11 -1 -1 0.27 0.0198488 0.0178761 131 122 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_031.v common 6.21 vpr 64.55 MiB -1 -1 0.20 20744 11 0.21 -1 -1 36208 -1 -1 28 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66096 28 32 227 259 1 175 88 17 17 289 -1 unnamed_device 26.2 MiB 0.49 1010 6913 1544 4325 1044 64.5 MiB 0.06 0.00 6.38158 -126.573 -6.38158 6.38158 0.88 0.000520869 0.000472366 0.0217731 0.0198163 26 3323 50 6.55708e+06 337540 477104. 1650.88 2.51 0.136235 0.120153 21022 109990 -1 2605 19 1204 3141 191966 45003 5.47906 5.47906 -126.663 -5.47906 0 0 585099. 2024.56 0.25 0.07 0.11 -1 -1 0.25 0.0253699 0.0226094 150 140 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_032.v common 9.42 vpr 64.79 MiB -1 -1 0.18 20448 12 0.25 -1 -1 36596 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66340 32 32 274 306 1 206 90 17 17 289 -1 unnamed_device 26.3 MiB 0.31 1304 6321 1255 4617 449 64.8 MiB 0.06 0.00 7.16635 -157.812 -7.16635 7.16635 0.89 0.000588914 0.000539791 0.0223338 0.0202531 26 3817 49 6.55708e+06 313430 477104. 1650.88 5.81 0.238264 0.208701 21022 109990 -1 3145 19 1545 4159 251819 59845 6.4035 6.4035 -162.091 -6.4035 0 0 585099. 2024.56 0.25 0.09 0.10 -1 -1 0.25 0.0296307 0.026522 181 179 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_033.v common 11.10 vpr 64.38 MiB -1 -1 0.20 20440 12 0.20 -1 -1 36452 -1 -1 23 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65928 31 32 237 269 1 179 86 17 17 289 -1 unnamed_device 26.0 MiB 0.70 980 5567 1150 4291 126 64.4 MiB 0.05 0.00 7.18658 -144.693 -7.18658 7.18658 0.90 0.000565952 0.000514525 0.0191329 0.0174352 28 3147 34 6.55708e+06 277265 500653. 1732.36 7.12 0.182722 0.15927 21310 115450 -1 2468 29 1178 3073 296477 117738 6.07044 6.07044 -141.421 -6.07044 0 0 612192. 2118.31 0.26 0.12 0.11 -1 -1 0.26 0.0337425 0.0297443 149 144 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_034.v common 6.72 vpr 64.24 MiB -1 -1 0.20 20320 10 0.17 -1 -1 36372 -1 -1 22 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65780 29 32 220 252 1 163 83 17 17 289 -1 unnamed_device 25.7 MiB 0.21 1013 6563 1489 4557 517 64.2 MiB 0.05 0.00 5.76546 -121.445 -5.76546 5.76546 0.89 0.000517195 0.000469475 0.0214517 0.0195286 30 2358 16 6.55708e+06 265210 526063. 1820.29 3.28 0.175898 0.153605 21886 126133 -1 2081 16 885 2605 122669 28892 5.20346 5.20346 -117.311 -5.20346 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0220691 0.0199107 137 131 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_035.v common 7.97 vpr 64.75 MiB -1 -1 0.24 21132 13 0.37 -1 -1 36728 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66304 32 32 315 347 1 239 95 17 17 289 -1 unnamed_device 26.2 MiB 0.30 1488 10247 2366 6979 902 64.8 MiB 0.10 0.00 7.78037 -164.973 -7.78037 7.78037 0.90 0.000704721 0.000635979 0.0385778 0.034882 32 4128 46 6.55708e+06 373705 554710. 1919.41 3.99 0.266158 0.233 22174 131602 -1 3512 16 1530 4876 330660 74130 6.86804 6.86804 -154.58 -6.86804 0 0 701300. 2426.64 0.30 0.11 0.13 -1 -1 0.30 0.0330441 0.0299616 221 220 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_036.v common 6.02 vpr 64.72 MiB -1 -1 0.24 20924 14 0.40 -1 -1 36620 -1 -1 28 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66276 32 32 282 314 1 220 92 17 17 289 -1 unnamed_device 26.4 MiB 0.60 1341 7544 1708 5122 714 64.7 MiB 0.07 0.00 7.48711 -165.315 -7.48711 7.48711 0.90 0.000654151 0.000592667 0.0280969 0.0255674 30 3756 44 6.55708e+06 337540 526063. 1820.29 1.81 0.153203 0.135554 21886 126133 -1 2987 18 1338 3927 186931 44346 6.65518 6.65518 -156.797 -6.65518 0 0 666494. 2306.21 0.28 0.08 0.12 -1 -1 0.28 0.0303871 0.0273993 191 187 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_037.v common 7.69 vpr 64.30 MiB -1 -1 0.19 20572 12 0.18 -1 -1 36224 -1 -1 29 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65848 31 32 241 273 1 189 92 17 17 289 -1 unnamed_device 26.0 MiB 0.27 1061 14582 3956 8171 2455 64.3 MiB 0.10 0.00 7.55424 -147.694 -7.55424 7.55424 0.89 0.000486045 0.000440463 0.0403416 0.0362602 36 2670 17 6.55708e+06 349595 612192. 2118.31 4.14 0.199519 0.173264 22750 144809 -1 2298 15 923 2506 139164 32090 6.4819 6.4819 -138 -6.4819 0 0 782063. 2706.10 0.32 0.06 0.13 -1 -1 0.32 0.0214999 0.0193023 156 148 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_038.v common 5.77 vpr 65.11 MiB -1 -1 0.24 20636 12 0.33 -1 -1 36568 -1 -1 33 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 31 32 307 339 1 235 96 17 17 289 -1 unnamed_device 26.6 MiB 0.51 1440 9951 2153 6171 1627 65.1 MiB 0.09 0.00 7.66392 -155.521 -7.66392 7.66392 0.89 0.000721143 0.00065522 0.0362656 0.0329955 30 3843 35 6.55708e+06 397815 526063. 1820.29 1.72 0.1679 0.14982 21886 126133 -1 3200 21 1554 4521 218190 52222 6.67144 6.67144 -150.22 -6.67144 0 0 666494. 2306.21 0.28 0.09 0.12 -1 -1 0.28 0.0377392 0.033975 218 214 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_039.v common 5.80 vpr 64.82 MiB -1 -1 0.23 21104 14 0.42 -1 -1 36852 -1 -1 29 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66380 31 32 293 325 1 224 92 17 17 289 -1 unnamed_device 26.4 MiB 0.36 1368 10442 2445 6848 1149 64.8 MiB 0.10 0.00 8.27333 -162.102 -8.27333 8.27333 0.89 0.00067557 0.000606444 0.0386856 0.035136 30 3476 48 6.55708e+06 349595 526063. 1820.29 1.79 0.179927 0.159918 21886 126133 -1 2944 17 1606 5087 230104 55320 7.34122 7.34122 -156.976 -7.34122 0 0 666494. 2306.21 0.29 0.09 0.12 -1 -1 0.29 0.0318529 0.0287799 202 200 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66064 31 32 269 301 1 203 89 17 17 289 -1 unnamed_device 26.0 MiB 0.45 1345 7613 1868 4862 883 64.5 MiB 0.07 0.00 7.08841 -141.492 -7.08841 7.08841 0.90 0.000603212 0.000539013 0.0269313 0.0243664 34 3664 49 6.55708e+06 313430 585099. 2024.56 4.81 0.278093 0.243934 22462 138074 -1 3164 17 1313 4163 244724 55552 5.97978 5.97978 -133.201 -5.97978 0 0 742403. 2568.87 0.29 0.08 0.14 -1 -1 0.29 0.0275263 0.0247646 179 176 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_042.v common 5.23 vpr 64.62 MiB -1 -1 0.19 20560 12 0.23 -1 -1 36560 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66176 32 32 264 296 1 196 88 17 17 289 -1 unnamed_device 26.2 MiB 0.26 1315 5548 1167 3981 400 64.6 MiB 0.05 0.00 7.00741 -145.329 -7.00741 7.00741 0.90 0.00060048 0.000544707 0.0212606 0.0193414 28 3273 27 6.55708e+06 289320 500653. 1732.36 1.66 0.114027 0.100764 21310 115450 -1 2880 18 1362 4073 243587 55099 6.10198 6.10198 -140.629 -6.10198 0 0 612192. 2118.31 0.27 0.09 0.11 -1 -1 0.27 0.0279141 0.0250507 171 169 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_043.v common 8.58 vpr 65.35 MiB -1 -1 0.28 21808 14 0.49 -1 -1 36804 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66916 32 32 324 356 1 249 95 17 17 289 -1 unnamed_device 26.7 MiB 0.48 1670 9383 2100 6642 641 65.3 MiB 0.09 0.00 8.23218 -176.173 -8.23218 8.23218 0.91 0.000733629 0.000664825 0.0372289 0.0337247 34 4632 43 6.55708e+06 373705 585099. 2024.56 4.23 0.24471 0.216033 22462 138074 -1 3783 16 1514 4948 301263 67057 7.28976 7.28976 -169.641 -7.28976 0 0 742403. 2568.87 0.30 0.10 0.14 -1 -1 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66584 31 32 284 316 1 206 91 17 17 289 -1 unnamed_device 26.6 MiB 0.42 1315 7435 1572 5156 707 65.0 MiB 0.07 0.00 8.06447 -154.642 -8.06447 8.06447 0.90 0.000601988 0.00053796 0.0271764 0.0245834 28 3730 45 6.55708e+06 337540 500653. 1732.36 2.20 0.155149 0.13724 21310 115450 -1 2993 18 1246 4009 311549 83022 7.29176 7.29176 -151.859 -7.29176 0 0 612192. 2118.31 0.26 0.11 0.11 -1 -1 0.26 0.0314071 0.0283091 193 191 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_046.v common 21.81 vpr 65.11 MiB -1 -1 0.22 20824 12 0.32 -1 -1 36476 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 32 32 303 335 1 222 93 17 17 289 -1 unnamed_device 26.6 MiB 0.54 1532 15213 4154 8657 2402 65.1 MiB 0.13 0.00 7.13712 -150.826 -7.13712 7.13712 0.90 0.000704138 0.000629131 0.0546584 0.0493196 36 3865 38 6.55708e+06 349595 612192. 2118.31 17.61 0.334816 0.292518 22750 144809 -1 3379 23 1418 5004 458665 164388 6.19264 6.19264 -141.127 -6.19264 0 0 782063. 2706.10 0.31 0.15 0.15 -1 -1 0.31 0.0378792 0.033838 210 208 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_047.v common 4.90 vpr 64.79 MiB -1 -1 0.20 20340 13 0.31 -1 -1 36492 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66340 32 32 272 304 1 203 93 17 17 289 -1 unnamed_device 26.2 MiB 0.31 1350 5133 911 3808 414 64.8 MiB 0.05 0.00 7.54057 -158.305 -7.54057 7.54057 0.88 0.000662323 0.00060256 0.019492 0.0177701 30 3259 22 6.55708e+06 349595 526063. 1820.29 1.20 0.118645 0.105355 21886 126133 -1 2779 18 1243 3580 170868 40631 6.90724 6.90724 -155.01 -6.90724 0 0 666494. 2306.21 0.28 0.08 0.12 -1 -1 0.28 0.0302657 0.0272399 183 177 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_048.v common 8.22 vpr 64.73 MiB -1 -1 0.22 20844 13 0.25 -1 -1 37192 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66284 32 32 271 303 1 212 90 17 17 289 -1 unnamed_device 26.2 MiB 0.35 1371 12351 2891 7373 2087 64.7 MiB 0.10 0.00 7.1188 -155.865 -7.1188 7.1188 0.86 0.000556928 0.000501843 0.0398034 0.0359327 36 3355 27 6.55708e+06 313430 612192. 2118.31 4.48 0.239177 0.208844 22750 144809 -1 2803 15 1125 3397 194744 43752 6.17898 6.17898 -146.024 -6.17898 0 0 782063. 2706.10 0.32 0.07 0.13 -1 -1 0.32 0.0250818 0.0226275 178 176 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_049.v common 8.52 vpr 64.99 MiB -1 -1 0.23 20716 12 0.30 -1 -1 36540 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66548 32 32 288 320 1 223 94 17 17 289 -1 unnamed_device 26.6 MiB 0.53 1446 11170 2757 7067 1346 65.0 MiB 0.10 0.00 7.31654 -157.818 -7.31654 7.31654 0.89 0.000667995 0.00060712 0.0386894 0.0350251 38 3284 17 6.55708e+06 361650 638502. 2209.35 4.43 0.250369 0.22001 23326 155178 -1 2853 15 1250 4137 194632 45234 6.26904 6.26904 -147.068 -6.26904 0 0 851065. 2944.86 0.34 0.08 0.15 -1 -1 0.34 0.0289959 0.0263013 197 193 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_050.v common 6.97 vpr 65.16 MiB -1 -1 0.23 20960 13 0.36 -1 -1 37064 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66728 32 32 306 338 1 233 95 17 17 289 -1 unnamed_device 26.6 MiB 0.51 1513 7223 1461 5178 584 65.2 MiB 0.07 0.00 7.58438 -161.714 -7.58438 7.58438 0.91 0.000720195 0.000653342 0.0279684 0.0254265 36 3945 19 6.55708e+06 373705 612192. 2118.31 2.81 0.197032 0.174062 22750 144809 -1 3296 18 1573 4871 256506 58577 6.70864 6.70864 -153.326 -6.70864 0 0 782063. 2706.10 0.31 0.09 0.15 -1 -1 0.31 0.0332142 0.0298137 212 211 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_051.v common 5.70 vpr 64.63 MiB -1 -1 0.21 20352 14 0.35 -1 -1 36584 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66184 32 32 262 294 1 191 88 17 17 289 -1 unnamed_device 26.1 MiB 0.30 1215 10813 2361 6891 1561 64.6 MiB 0.09 0.00 8.31609 -163.248 -8.31609 8.31609 0.89 0.000603849 0.000548601 0.0368174 0.0333693 30 3273 27 6.55708e+06 289320 526063. 1820.29 1.91 0.137581 0.122306 21886 126133 -1 2720 18 1271 3852 181225 42639 7.1187 7.1187 -154.864 -7.1187 0 0 666494. 2306.21 0.28 0.07 0.12 -1 -1 0.28 0.028264 0.0253764 168 167 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_052.v common 6.93 vpr 64.77 MiB -1 -1 0.21 20828 13 0.33 -1 -1 36716 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66328 32 32 291 323 1 224 94 17 17 289 -1 unnamed_device 26.4 MiB 0.42 1503 5206 957 3956 293 64.8 MiB 0.05 0.00 8.07478 -162.365 -8.07478 8.07478 0.90 0.00067534 0.000612461 0.0204251 0.0186498 28 4195 32 6.55708e+06 361650 500653. 1732.36 3.06 0.134601 0.118935 21310 115450 -1 3466 19 1840 5622 342639 75414 7.0005 7.0005 -158.548 -7.0005 0 0 612192. 2118.31 0.26 0.11 0.11 -1 -1 0.26 0.0326711 0.0293118 198 196 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_053.v common 6.85 vpr 64.70 MiB -1 -1 0.24 20804 13 0.34 -1 -1 36624 -1 -1 31 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66256 31 32 302 334 1 235 94 17 17 289 -1 unnamed_device 26.2 MiB 0.32 1405 8401 1949 5780 672 64.7 MiB 0.08 0.00 7.80415 -160.841 -7.80415 7.80415 0.91 0.000680924 0.000608364 0.0310077 0.0280246 34 3777 50 6.55708e+06 373705 585099. 2024.56 2.93 0.2301 0.201938 22462 138074 -1 3251 15 1437 4206 244223 55741 6.8411 6.8411 -155.997 -6.8411 0 0 742403. 2568.87 0.29 0.08 0.14 -1 -1 0.29 0.027592 0.0249137 213 209 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_054.v common 7.56 vpr 65.00 MiB -1 -1 0.24 20848 12 0.37 -1 -1 36556 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66564 32 32 308 340 1 238 97 17 17 289 -1 unnamed_device 26.6 MiB 0.33 1438 11641 3058 7283 1300 65.0 MiB 0.10 0.00 7.70272 -159.771 -7.70272 7.70272 0.90 0.000686949 0.000621653 0.0411524 0.0372667 30 3780 27 6.55708e+06 397815 526063. 1820.29 3.62 0.263933 0.231008 21886 126133 -1 2888 18 1519 4182 184934 45916 6.6419 6.6419 -150.702 -6.6419 0 0 666494. 2306.21 0.28 0.08 0.12 -1 -1 0.28 0.0314899 0.0282856 216 213 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_055.v common 5.03 vpr 64.02 MiB -1 -1 0.17 20348 11 0.16 -1 -1 36512 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65552 32 32 216 248 1 160 82 17 17 289 -1 unnamed_device 25.5 MiB 0.29 1054 3998 719 2985 294 64.0 MiB 0.04 0.00 6.14869 -128.86 -6.14869 6.14869 0.90 0.000490114 0.000444983 0.0137398 0.0125478 26 2734 30 6.55708e+06 216990 477104. 1650.88 1.61 0.0995431 0.0877328 21022 109990 -1 2325 17 931 2444 150962 34991 5.41032 5.41032 -130.798 -5.41032 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0228773 0.0205964 125 121 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_056.v common 12.28 vpr 64.75 MiB -1 -1 0.22 20892 13 0.26 -1 -1 36600 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 32 32 254 286 1 194 88 17 17 289 -1 unnamed_device 26.3 MiB 0.42 1266 7888 1808 5375 705 64.7 MiB 0.07 0.00 7.4424 -157.565 -7.4424 7.4424 0.88 0.00059955 0.000544654 0.0277904 0.0252534 28 3615 32 6.55708e+06 289320 500653. 1732.36 8.52 0.224821 0.196889 21310 115450 -1 2988 19 1194 3381 209369 47676 6.62764 6.62764 -152.575 -6.62764 0 0 612192. 2118.31 0.27 0.08 0.11 -1 -1 0.27 0.0282636 0.0253491 161 159 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_057.v common 8.46 vpr 65.47 MiB -1 -1 0.25 21508 14 0.55 -1 -1 36756 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67040 32 32 338 370 1 252 97 17 17 289 -1 unnamed_device 27.0 MiB 0.32 1601 9199 2042 6426 731 65.5 MiB 0.09 0.00 8.66873 -176.87 -8.66873 8.66873 0.89 0.000795907 0.000713031 0.0375875 0.0340391 30 4285 34 6.55708e+06 397815 526063. 1820.29 4.33 0.286844 0.252184 21886 126133 -1 3448 17 1855 5819 263765 63459 7.36876 7.36876 -164.684 -7.36876 0 0 666494. 2306.21 0.28 0.09 0.13 -1 -1 0.28 0.0348567 0.0314849 245 243 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_058.v common 8.50 vpr 64.78 MiB -1 -1 0.20 20652 13 0.34 -1 -1 36508 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 32 32 271 303 1 212 91 17 17 289 -1 unnamed_device 26.5 MiB 0.44 1376 4579 799 3553 227 64.8 MiB 0.05 0.00 8.02278 -172.696 -8.02278 8.02278 0.85 0.000586579 0.000519278 0.0175959 0.0159623 36 3334 17 6.55708e+06 325485 612192. 2118.31 4.69 0.264884 0.231753 22750 144809 -1 2862 16 1170 3389 185657 42603 7.0769 7.0769 -164.702 -7.0769 0 0 782063. 2706.10 0.32 0.07 0.13 -1 -1 0.32 0.0274889 0.0247842 178 176 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_059.v common 5.90 vpr 64.37 MiB -1 -1 0.19 20580 11 0.20 -1 -1 36292 -1 -1 23 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65916 30 32 224 256 1 165 85 17 17 289 -1 unnamed_device 25.8 MiB 0.20 1035 10687 2518 6679 1490 64.4 MiB 0.08 0.00 6.59735 -138.464 -6.59735 6.59735 0.88 0.000532214 0.000482862 0.0333559 0.0302268 34 2502 23 6.55708e+06 277265 585099. 2024.56 2.42 0.167549 0.147705 22462 138074 -1 2257 17 992 2850 154109 36061 5.97918 5.97918 -135.235 -5.97918 0 0 742403. 2568.87 0.31 0.06 0.14 -1 -1 0.31 0.0230548 0.020677 139 133 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_060.v common 9.44 vpr 65.16 MiB -1 -1 0.25 21688 15 0.65 -1 -1 36536 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66728 32 32 351 383 1 268 98 17 17 289 -1 unnamed_device 27.0 MiB 0.38 1771 9773 2274 6549 950 65.2 MiB 0.10 0.00 9.55013 -184.943 -9.55013 9.55013 0.89 0.000819065 0.000741389 0.040598 0.0367505 36 4458 20 6.55708e+06 409870 612192. 2118.31 5.06 0.326523 0.288033 22750 144809 -1 3874 20 2194 7275 428147 94060 8.24735 8.24735 -174.541 -8.24735 0 0 782063. 2706.10 0.32 0.14 0.14 -1 -1 0.32 0.0446404 0.0403799 257 256 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65968 32 32 231 263 1 176 86 17 17 289 -1 unnamed_device 25.9 MiB 0.36 1082 11804 3066 7108 1630 64.4 MiB 0.09 0.00 6.28346 -137.062 -6.28346 6.28346 0.88 0.000530045 0.000484201 0.0361037 0.032783 30 2616 26 6.55708e+06 265210 526063. 1820.29 3.38 0.194818 0.169838 21886 126133 -1 2211 13 935 2761 132039 31269 5.40772 5.40772 -129.072 -5.40772 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.018729 0.0168721 141 136 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_063.v common 8.44 vpr 65.21 MiB -1 -1 0.23 20724 12 0.38 -1 -1 36780 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66772 32 32 305 337 1 231 94 17 17 289 -1 unnamed_device 26.6 MiB 0.51 1459 6058 1136 4425 497 65.2 MiB 0.06 0.00 7.4882 -153.189 -7.4882 7.4882 0.90 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66184 32 32 267 299 1 205 92 17 17 289 -1 unnamed_device 26.1 MiB 0.49 1316 5267 941 3849 477 64.6 MiB 0.05 0.00 8.08175 -166.146 -8.08175 8.08175 0.89 0.000629175 0.000568539 0.0184496 0.0167256 36 3344 49 6.55708e+06 337540 612192. 2118.31 4.49 0.196686 0.172242 22750 144809 -1 2858 19 1239 3732 213441 48577 7.1997 7.1997 -158.608 -7.1997 0 0 782063. 2706.10 0.32 0.08 0.14 -1 -1 0.32 0.0296124 0.0266451 179 172 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_088.v common 7.61 vpr 65.22 MiB -1 -1 0.23 21348 15 0.53 -1 -1 36620 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66784 32 32 334 366 1 263 97 17 17 289 -1 unnamed_device 26.8 MiB 0.34 1738 9421 2028 6135 1258 65.2 MiB 0.09 0.00 9.11118 -191.695 -9.11118 9.11118 0.88 0.0007798 0.000705332 0.0371173 0.0337509 34 4874 38 6.55708e+06 397815 585099. 2024.56 3.47 0.215211 0.190773 22462 138074 -1 4018 16 1790 5405 326327 73180 7.89901 7.89901 -181.681 -7.89901 0 0 742403. 2568.87 0.30 0.10 0.14 -1 -1 0.30 0.033626 0.0305228 241 239 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_089.v common 5.67 vpr 64.43 MiB -1 -1 0.17 20512 11 0.20 -1 -1 36704 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65980 32 32 220 252 1 157 86 17 17 289 -1 unnamed_device 25.9 MiB 0.43 1015 8213 1831 5887 495 64.4 MiB 0.06 0.00 6.43354 -132.345 -6.43354 6.43354 0.88 0.000551808 0.000491864 0.0251582 0.0227642 26 2795 26 6.55708e+06 265210 477104. 1650.88 2.12 0.112344 0.099665 21022 109990 -1 2458 18 1052 3068 207681 46574 5.66498 5.66498 -136.662 -5.66498 0 0 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66696 32 32 300 332 1 237 96 17 17 289 -1 unnamed_device 26.7 MiB 0.37 1374 9732 2347 6008 1377 65.1 MiB 0.09 0.00 7.22518 -156.32 -7.22518 7.22518 0.86 0.000666203 0.000602886 0.0339281 0.0306793 30 3769 28 6.55708e+06 385760 526063. 1820.29 2.11 0.14269 0.125728 21886 126133 -1 2987 18 1457 4433 208409 50290 6.39384 6.39384 -155.293 -6.39384 0 0 666494. 2306.21 0.27 0.09 0.12 -1 -1 0.27 0.0331844 0.0299012 213 205 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_092.v common 7.94 vpr 64.51 MiB -1 -1 0.23 20860 12 0.29 -1 -1 36244 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66060 32 32 271 303 1 211 90 17 17 289 -1 unnamed_device 26.0 MiB 0.38 1295 7929 1664 5456 809 64.5 MiB 0.07 0.00 7.52995 -159.234 -7.52995 7.52995 0.87 0.000625373 0.000568114 0.0285355 0.0259745 36 3430 23 6.55708e+06 313430 612192. 2118.31 4.10 0.222351 0.194431 22750 144809 -1 2916 14 1211 3646 201814 45483 6.7621 6.7621 -152.293 -6.7621 0 0 782063. 2706.10 0.31 0.07 0.14 -1 -1 0.31 0.0260086 0.0235668 181 176 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_093.v common 9.64 vpr 65.47 MiB -1 -1 0.22 21192 14 0.57 -1 -1 36460 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67044 32 32 327 359 1 242 95 17 17 289 -1 unnamed_device 27.1 MiB 0.64 1613 7655 1578 5578 499 65.5 MiB 0.08 0.00 9.00229 -179.771 -9.00229 9.00229 0.88 0.000786157 0.000714409 0.0323257 0.0293521 36 4565 44 6.55708e+06 373705 612192. 2118.31 5.20 0.259284 0.229414 22750 144809 -1 3729 18 1683 5449 299007 67961 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66704 31 32 321 353 1 256 98 17 17 289 -1 unnamed_device 26.5 MiB 0.33 1537 8423 1899 6115 409 65.1 MiB 0.09 0.00 7.71709 -159.898 -7.71709 7.71709 0.89 0.000780462 0.000708611 0.0320929 0.0290867 36 3879 25 6.55708e+06 421925 612192. 2118.31 2.96 0.212038 0.186587 22750 144809 -1 3339 18 1652 4918 259156 61816 6.7601 6.7601 -150.909 -6.7601 0 0 782063. 2706.10 0.32 0.10 0.14 -1 -1 0.32 0.0348514 0.0314958 233 228 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_101.v common 6.41 vpr 64.75 MiB -1 -1 0.21 20684 11 0.31 -1 -1 36628 -1 -1 31 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 30 32 287 319 1 212 93 17 17 289 -1 unnamed_device 26.4 MiB 0.30 1421 8703 2291 5674 738 64.7 MiB 0.08 0.00 6.43018 -129.379 -6.43018 6.43018 0.87 0.000630248 0.000565102 0.0295938 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66240 29 32 239 271 1 189 90 17 17 289 -1 unnamed_device 26.2 MiB 0.50 1116 9738 2558 6406 774 64.7 MiB 0.07 0.00 7.61081 -154.169 -7.61081 7.61081 0.88 0.000524099 0.000475224 0.0287786 0.0260053 34 2924 23 6.55708e+06 349595 585099. 2024.56 3.93 0.225774 0.196444 22462 138074 -1 2524 19 1266 3488 189442 44375 6.7621 6.7621 -146.16 -6.7621 0 0 742403. 2568.87 0.31 0.07 0.13 -1 -1 0.31 0.0260064 0.0231503 157 150 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_105.v common 5.30 vpr 64.45 MiB -1 -1 0.20 20512 11 0.19 -1 -1 36116 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66000 32 32 235 267 1 176 85 17 17 289 -1 unnamed_device 25.9 MiB 0.25 1023 14221 4533 7413 2275 64.5 MiB 0.10 0.00 6.85492 -138.928 -6.85492 6.85492 0.88 0.000518837 0.000469596 0.0436947 0.0396557 36 2737 18 6.55708e+06 253155 612192. 2118.31 1.70 0.134167 0.118493 22750 144809 -1 2246 16 942 2470 135554 32757 6.07244 6.07244 -134.807 -6.07244 0 0 782063. 2706.10 0.32 0.06 0.14 -1 -1 0.32 0.0226429 0.0203836 145 140 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_106.v common 7.90 vpr 64.71 MiB -1 -1 0.22 20692 13 0.40 -1 -1 36424 -1 -1 29 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66260 31 32 294 326 1 226 92 17 17 289 -1 unnamed_device 26.3 MiB 0.59 1413 7544 1727 4833 984 64.7 MiB 0.07 0.00 7.87899 -160.785 -7.87899 7.87899 0.89 0.000670414 0.000606904 0.0284216 0.0258362 36 4021 32 6.55708e+06 349595 612192. 2118.31 3.63 0.202252 0.177573 22750 144809 -1 3157 19 1672 5284 291593 66424 7.0005 7.0005 -155.01 -7.0005 0 0 782063. 2706.10 0.33 0.10 0.14 -1 -1 0.33 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unnamed_device 26.2 MiB 0.29 1172 8405 1842 5723 840 64.6 MiB 0.07 0.00 6.25963 -142.54 -6.25963 6.25963 0.90 0.000554286 0.000492277 0.0260056 0.0236444 28 3065 24 6.55708e+06 301375 500653. 1732.36 3.33 0.173213 0.151039 21310 115450 -1 2690 15 1100 2962 178308 40669 5.57032 5.57032 -138.049 -5.57032 0 0 612192. 2118.31 0.26 0.07 0.12 -1 -1 0.26 0.0224431 0.0202409 148 138 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_114.v common 6.86 vpr 64.68 MiB -1 -1 0.20 20516 13 0.27 -1 -1 36304 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66232 32 32 254 286 1 196 88 17 17 289 -1 unnamed_device 26.2 MiB 0.36 1201 7888 1972 5242 674 64.7 MiB 0.07 0.00 7.53481 -156.077 -7.53481 7.53481 0.92 0.000608824 0.000551261 0.0263359 0.0239625 36 3071 27 6.55708e+06 289320 612192. 2118.31 3.01 0.176339 0.155061 22750 144809 -1 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11 0.23 -1 -1 36264 -1 -1 27 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66008 29 32 243 275 1 185 88 17 17 289 -1 unnamed_device 26.1 MiB 0.22 1119 12568 3466 6955 2147 64.5 MiB 0.09 0.00 6.27069 -123.259 -6.27069 6.27069 0.85 0.000576092 0.000507729 0.0384626 0.0348084 44 2576 19 6.55708e+06 325485 742403. 2568.87 4.06 0.21394 0.186071 24478 177802 -1 2190 12 775 2429 119567 27751 5.50298 5.50298 -115.238 -5.50298 0 0 937218. 3242.97 0.38 0.05 0.18 -1 -1 0.38 0.0207771 0.0188964 160 154 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_117.v common 7.12 vpr 65.16 MiB -1 -1 0.24 21472 14 0.40 -1 -1 36452 -1 -1 35 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66720 32 32 318 350 1 251 99 17 17 289 -1 unnamed_device 26.5 MiB 0.42 1606 6711 1323 5111 277 65.2 MiB 0.07 0.00 8.36721 -183.374 -8.36721 8.36721 0.93 0.00074168 0.00066739 0.0262745 0.0238192 34 4307 28 6.55708e+06 421925 585099. 2024.56 3.00 0.206876 0.182711 22462 138074 -1 3744 20 1814 5595 320360 73228 7.48896 7.48896 -175.746 -7.48896 0 0 742403. 2568.87 0.31 0.11 0.14 -1 -1 0.31 0.0378817 0.0341325 224 223 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_118.v common 6.00 vpr 64.50 MiB -1 -1 0.18 20176 12 0.19 -1 -1 36600 -1 -1 28 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66048 31 32 222 254 1 184 91 17 17 289 -1 unnamed_device 25.9 MiB 0.34 1117 4987 873 3940 174 64.5 MiB 0.04 0.00 6.95154 -148.876 -6.95154 6.95154 0.89 0.000515315 0.000466629 0.0155203 0.014147 36 2672 44 6.55708e+06 337540 612192. 2118.31 2.32 0.16006 0.140162 22750 144809 -1 2387 13 875 2354 137817 31246 5.97978 5.97978 -139.331 -5.97978 0 0 782063. 2706.10 0.32 0.05 0.14 -1 -1 0.32 0.0199705 0.0180949 138 129 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_119.v common 18.00 vpr 64.77 MiB -1 -1 0.25 21392 13 0.37 -1 -1 36832 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66324 32 32 282 314 1 218 89 17 17 289 -1 unnamed_device 26.2 MiB 0.51 1370 8603 2025 5470 1108 64.8 MiB 0.08 0.00 7.91043 -160.998 -7.91043 7.91043 0.89 0.000650229 0.000590415 0.0323159 0.0293442 28 4265 49 6.55708e+06 301375 500653. 1732.36 13.96 0.264358 0.231947 21310 115450 -1 3442 17 1520 4590 286136 64967 6.7575 6.7575 -154.136 -6.7575 0 0 612192. 2118.31 0.25 0.10 0.12 -1 -1 0.25 0.0306259 0.0276559 189 187 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_120.v 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66372 32 32 269 301 1 199 90 17 17 289 -1 unnamed_device 26.3 MiB 0.31 1163 6723 1513 4783 427 64.8 MiB 0.06 0.00 6.89912 -149.425 -6.89912 6.89912 0.89 0.00063084 0.00056957 0.0246121 0.0222993 28 3528 41 6.55708e+06 313430 500653. 1732.36 2.65 0.141599 0.124861 21310 115450 -1 2778 17 1161 3524 204815 47103 6.14118 6.14118 -144.817 -6.14118 0 0 612192. 2118.31 0.27 0.08 0.11 -1 -1 0.27 0.0300304 0.0271226 176 174 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_122.v common 9.28 vpr 65.18 MiB -1 -1 0.25 21416 15 0.61 -1 -1 37108 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66748 32 32 350 382 1 272 100 17 17 289 -1 unnamed_device 27.0 MiB 0.32 1744 7060 1356 4899 805 65.2 MiB 0.08 0.00 8.47263 -171.112 -8.47263 8.47263 0.91 0.000836552 0.000754199 0.0300136 0.0272017 34 5706 47 6.55708e+06 433980 585099. 2024.56 4.99 0.244609 0.215009 22462 138074 -1 4214 21 2110 6945 423302 93623 7.49096 7.49096 -169.064 -7.49096 0 0 742403. 2568.87 0.32 0.14 0.14 -1 -1 0.32 0.0457901 0.0412921 256 255 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_123.v common 4.94 vpr 63.49 MiB -1 -1 0.18 20332 10 0.12 -1 -1 36040 -1 -1 18 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65016 30 32 172 204 1 134 80 17 17 289 -1 unnamed_device 25.0 MiB 0.13 585 9368 2413 5125 1830 63.5 MiB 0.06 0.00 5.46394 -116.249 -5.46394 5.46394 0.89 0.000480365 0.000437018 0.0220217 0.0199058 34 2054 46 6.55708e+06 216990 585099. 2024.56 1.69 0.103112 0.0896721 22462 138074 -1 1479 14 714 1708 96959 25712 5.08126 5.08126 -118.595 -5.08126 0 0 742403. 2568.87 0.31 0.04 0.13 -1 -1 0.31 0.0147178 0.0132184 90 81 -1 -1 -1 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2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 32 32 264 296 1 204 88 17 17 289 -1 unnamed_device 26.3 MiB 0.33 1142 5938 1144 4647 147 64.8 MiB 0.06 0.00 7.66077 -153.727 -7.66077 7.66077 0.89 0.000609029 0.000552189 0.0217998 0.0198391 28 3544 30 6.55708e+06 289320 500653. 1732.36 1.58 0.125859 0.11158 21310 115450 -1 2828 19 1483 4043 231278 55286 6.90984 6.90984 -156.407 -6.90984 0 0 612192. 2118.31 0.27 0.09 0.11 -1 -1 0.27 0.0304137 0.0273699 171 169 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_126.v common 6.55 vpr 63.76 MiB -1 -1 0.17 20276 9 0.16 -1 -1 36324 -1 -1 22 25 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65288 25 32 183 215 1 140 79 17 17 289 -1 unnamed_device 25.4 MiB 0.20 820 8191 2009 5395 787 63.8 MiB 0.06 0.00 5.29417 -99.0147 -5.29417 5.29417 0.89 0.000429395 0.000389589 0.0232809 0.0211338 28 2275 34 6.55708e+06 265210 500653. 1732.36 3.21 0.146959 0.12734 21310 115450 -1 1826 18 849 2459 131345 31144 4.7914 4.7914 -98.7253 -4.7914 0 0 612192. 2118.31 0.25 0.05 0.11 -1 -1 0.25 0.0193268 0.0172128 111 102 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_127.v common 17.94 vpr 64.75 MiB -1 -1 0.23 20692 12 0.33 -1 -1 36524 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 32 32 300 332 1 233 97 17 17 289 -1 unnamed_device 26.3 MiB 0.38 1501 7867 1766 5013 1088 64.7 MiB 0.07 0.00 7.24465 -156.602 -7.24465 7.24465 0.87 0.000647194 0.000584524 0.0272576 0.0247367 36 4232 25 6.55708e+06 397815 612192. 2118.31 13.99 0.319319 0.280068 22750 144809 -1 3544 18 1721 4955 296703 67997 6.47224 6.47224 -152.633 -6.47224 0 0 782063. 2706.10 0.32 0.10 0.14 -1 -1 0.32 0.0336025 0.0304515 212 205 -1 -1 -1 -1 -fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_128.v common 5.71 vpr 64.91 MiB -1 -1 0.25 21524 13 0.39 -1 -1 36376 -1 -1 30 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66472 31 32 290 322 1 226 93 17 17 289 -1 unnamed_device 26.5 MiB 0.36 1408 5343 959 3971 413 64.9 MiB 0.05 0.00 8.27458 -166.489 -8.27458 8.27458 0.90 0.000629898 0.00057368 0.0208921 0.0190079 30 3772 34 6.55708e+06 361650 526063. 1820.29 1.73 0.138158 0.122358 21886 126133 -1 3080 17 1417 4341 206664 49561 7.2801 7.2801 -159.365 -7.2801 0 0 666494. 2306.21 0.29 0.08 0.12 -1 -1 0.29 0.0306908 0.0276673 200 197 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_001.v common 4.29 vpr 65.09 MiB -1 -1 0.17 20564 1 0.03 -1 -1 33948 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66656 32 32 354 285 1 202 96 17 17 289 -1 unnamed_device 26.5 MiB 0.26 1124 13017 3784 8461 772 65.1 MiB 0.11 0.00 5.44269 -161.211 -5.44269 5.44269 0.84 0.000485938 0.000436895 0.0325906 0.0297322 32 2442 21 6.64007e+06 401856 554710. 1919.41 0.94 0.0968539 0.0854191 22834 132086 -1 2197 22 1375 2183 153641 35574 4.17168 4.17168 -144.286 -4.17168 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.0232293 0.0204671 154 47 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_002.v common 4.40 vpr 65.08 MiB -1 -1 0.18 20484 1 0.03 -1 -1 33820 -1 -1 24 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66640 30 32 363 293 1 194 86 17 17 289 -1 unnamed_device 26.3 MiB 0.22 1017 14639 5117 7505 2017 65.1 MiB 0.13 0.00 4.98742 -150.865 -4.98742 4.98742 0.88 0.000511902 0.000465459 0.0417982 0.0381293 32 2368 24 6.64007e+06 301392 554710. 1919.41 1.00 0.108828 0.09607 22834 132086 -1 2072 21 1726 2597 175792 40973 4.22388 4.22388 -142.728 -4.22388 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0242675 0.0214544 139 58 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_003.v common 4.65 vpr 64.73 MiB -1 -1 0.15 20132 1 0.03 -1 -1 33968 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66280 32 32 299 247 1 188 87 17 17 289 -1 unnamed_device 26.3 MiB 0.25 982 7575 1808 5319 448 64.7 MiB 0.07 0.00 4.35696 -123.732 -4.35696 4.35696 0.89 0.000478407 0.0004272 0.0202582 0.0185333 26 2567 31 6.64007e+06 288834 477104. 1650.88 1.40 0.0948574 0.0837349 21682 110474 -1 2183 21 1344 1867 149309 34880 3.78583 3.78583 -126.34 -3.78583 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0216394 0.0192231 126 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_004.v common 4.13 vpr 64.73 MiB -1 -1 0.16 20108 1 0.03 -1 -1 33796 -1 -1 27 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66284 29 32 308 248 1 169 88 17 17 289 -1 unnamed_device 26.4 MiB 0.06 985 10228 2796 6251 1181 64.7 MiB 0.09 0.00 4.65835 -126.219 -4.65835 4.65835 0.89 0.000458981 0.000418632 0.0263532 0.0240692 32 2212 23 6.64007e+06 339066 554710. 1919.41 0.98 0.0868776 0.0764994 22834 132086 -1 1983 21 1477 2736 183594 40068 3.57863 3.57863 -119.515 -3.57863 0 0 701300. 2426.64 0.28 0.07 0.13 -1 -1 0.28 0.0215601 0.0190947 126 25 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_005.v common 4.13 vpr 64.70 MiB -1 -1 0.14 20276 1 0.03 -1 -1 33612 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66256 32 32 336 268 1 174 87 17 17 289 -1 unnamed_device 26.3 MiB 0.07 1007 9687 2297 6508 882 64.7 MiB 0.09 0.00 4.57112 -133.029 -4.57112 4.57112 0.88 0.000504793 0.000453154 0.0279566 0.0255594 30 2231 22 6.64007e+06 288834 526063. 1820.29 1.00 0.0946938 0.0835274 22546 126617 -1 2005 18 1146 2272 118837 28404 3.55723 3.55723 -127.325 -3.55723 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0208788 0.0185571 130 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_006.v common 4.71 vpr 65.14 MiB -1 -1 0.14 20424 1 0.03 -1 -1 33644 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66708 32 32 366 295 1 189 98 17 17 289 -1 unnamed_device 26.4 MiB 0.10 1031 10673 2804 7227 642 65.1 MiB 0.09 0.00 3.47522 -121.603 -3.47522 3.47522 0.89 0.000490954 0.000449366 0.0257828 0.0233939 26 2825 19 6.64007e+06 426972 477104. 1650.88 1.57 0.0990001 0.0872567 21682 110474 -1 2327 20 1354 2211 164800 38038 3.00717 3.00717 -119.334 -3.00717 0 0 585099. 2024.56 0.25 0.07 0.10 -1 -1 0.25 0.022964 0.0203201 142 55 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_007.v common 4.07 vpr 64.32 MiB -1 -1 0.15 20108 1 0.03 -1 -1 34012 -1 -1 19 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65864 27 32 259 221 1 130 78 17 17 289 -1 unnamed_device 25.9 MiB 0.09 589 11532 3345 7374 813 64.3 MiB 0.08 0.00 4.00878 -100.807 -4.00878 4.00878 0.90 0.000399371 0.000364347 0.0299262 0.027308 32 1498 22 6.64007e+06 238602 554710. 1919.41 0.93 0.0811583 0.0714212 22834 132086 -1 1201 19 858 1449 89869 22288 2.83977 2.83977 -92.5512 -2.83977 0 0 701300. 2426.64 0.29 0.04 0.13 -1 -1 0.29 0.0172864 0.015312 93 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_008.v common 4.08 vpr 64.57 MiB -1 -1 0.15 20216 1 0.03 -1 -1 33544 -1 -1 31 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66116 31 32 271 219 1 162 94 17 17 289 -1 unnamed_device 26.0 MiB 0.07 892 10318 2381 7361 576 64.6 MiB 0.09 0.00 3.4251 -99.9264 -3.4251 3.4251 0.90 0.000442638 0.000404854 0.0230449 0.0209374 28 2086 21 6.64007e+06 389298 500653. 1732.36 0.97 0.0807499 0.0710863 21970 115934 -1 1808 19 967 1802 110205 25769 2.73877 2.73877 -95.7999 -2.73877 0 0 612192. 2118.31 0.27 0.05 0.11 -1 -1 0.27 0.0185954 0.0165029 115 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_009.v common 4.19 vpr 64.75 MiB -1 -1 0.16 20716 1 0.03 -1 -1 33964 -1 -1 20 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 31 32 317 271 1 167 83 17 17 289 -1 unnamed_device 26.4 MiB 0.21 960 9623 2754 6116 753 64.7 MiB 0.08 0.00 3.62801 -120.96 -3.62801 3.62801 0.91 0.000474116 0.000432052 0.0269613 0.024659 28 2163 20 6.64007e+06 251160 500653. 1732.36 0.92 0.0843278 0.0741694 21970 115934 -1 1910 18 1014 1444 99492 23284 3.14783 3.14783 -117.396 -3.14783 0 0 612192. 2118.31 0.25 0.05 0.12 -1 -1 0.25 0.0192463 0.0170868 111 60 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_010.v common 4.22 vpr 64.48 MiB -1 -1 0.15 20416 1 0.03 -1 -1 33608 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66032 32 32 298 248 1 156 81 17 17 289 -1 unnamed_device 25.9 MiB 0.15 841 12506 4273 6237 1996 64.5 MiB 0.10 0.00 3.87558 -126.558 -3.87558 3.87558 0.90 0.000455409 0.000413221 0.034838 0.0317699 28 1979 19 6.64007e+06 213486 500653. 1732.36 0.97 0.0910656 0.0804561 21970 115934 -1 1831 18 1137 1856 132799 29714 2.85977 2.85977 -117.521 -2.85977 0 0 612192. 2118.31 0.27 0.06 0.12 -1 -1 0.27 0.0189201 0.016782 112 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_011.v common 4.15 vpr 64.51 MiB -1 -1 0.15 20240 1 0.03 -1 -1 33444 -1 -1 17 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66060 30 32 303 262 1 139 79 17 17 289 -1 unnamed_device 26.0 MiB 0.12 796 12078 3517 6936 1625 64.5 MiB 0.09 0.00 4.09995 -113.228 -4.09995 4.09995 0.92 0.00044763 0.000407704 0.0339461 0.031026 32 1650 18 6.64007e+06 213486 554710. 1919.41 0.92 0.0873572 0.0770956 22834 132086 -1 1526 18 834 1316 89472 20060 2.80076 2.80076 -103.785 -2.80076 0 0 701300. 2426.64 0.28 0.05 0.13 -1 -1 0.28 0.018787 0.0166804 98 58 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_012.v common 4.25 vpr 64.58 MiB -1 -1 0.14 20252 1 0.03 -1 -1 33744 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66132 32 32 276 237 1 166 82 17 17 289 -1 unnamed_device 26.0 MiB 0.25 811 8448 2011 5971 466 64.6 MiB 0.07 0.00 3.76138 -119.223 -3.76138 3.76138 0.90 0.000432217 0.000396398 0.0224878 0.0205316 32 2052 21 6.64007e+06 226044 554710. 1919.41 0.95 0.0780662 0.0685083 22834 132086 -1 1782 17 1005 1343 92897 22236 2.94117 2.94117 -111.84 -2.94117 0 0 701300. 2426.64 0.31 0.05 0.13 -1 -1 0.31 0.0177974 0.0158612 109 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_013.v common 4.41 vpr 64.91 MiB -1 -1 0.16 20792 1 0.03 -1 -1 33988 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66468 32 32 344 272 1 202 88 17 17 289 -1 unnamed_device 26.4 MiB 0.25 1094 10228 2675 6918 635 64.9 MiB 0.10 0.00 4.45106 -144.281 -4.45106 4.45106 0.89 0.000526938 0.00047914 0.0290399 0.0265763 28 2647 19 6.64007e+06 301392 500653. 1732.36 1.06 0.0970592 0.0858121 21970 115934 -1 2302 21 1517 2276 157265 35537 3.39957 3.39957 -130.65 -3.39957 0 0 612192. 2118.31 0.27 0.07 0.11 -1 -1 0.27 0.0249662 0.0221948 139 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_014.v common 4.63 vpr 65.08 MiB -1 -1 0.15 20452 1 0.03 -1 -1 33752 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66640 32 32 363 295 1 181 95 17 17 289 -1 unnamed_device 26.6 MiB 0.15 940 8735 2013 6355 367 65.1 MiB 0.09 0.00 5.05578 -142.31 -5.05578 5.05578 0.90 0.000519762 0.000473852 0.0236687 0.0216606 26 2673 31 6.64007e+06 389298 477104. 1650.88 1.43 0.112784 0.0999837 21682 110474 -1 2369 24 1700 2809 252365 57579 4.10303 4.10303 -143.708 -4.10303 0 0 585099. 2024.56 0.25 0.09 0.11 -1 -1 0.25 0.0274942 0.0242351 134 58 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_015.v common 3.97 vpr 64.23 MiB -1 -1 0.14 20212 1 0.03 -1 -1 33732 -1 -1 21 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65772 29 32 248 215 1 137 82 17 17 289 -1 unnamed_device 25.8 MiB 0.09 637 6668 1590 4651 427 64.2 MiB 0.05 0.00 3.28519 -90.5035 -3.28519 3.28519 0.92 0.000410293 0.000373504 0.0166108 0.0151957 28 1662 22 6.64007e+06 263718 500653. 1732.36 0.91 0.0671077 0.0587603 21970 115934 -1 1542 18 837 1409 97266 22395 2.87917 2.87917 -91.5222 -2.87917 0 0 612192. 2118.31 0.26 0.05 0.12 -1 -1 0.26 0.0164128 0.0145382 98 21 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_016.v common 4.05 vpr 64.77 MiB -1 -1 0.14 20536 1 0.03 -1 -1 34008 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66320 32 32 370 297 1 183 86 17 17 289 -1 unnamed_device 26.3 MiB 0.13 961 6890 1523 4904 463 64.8 MiB 0.07 0.00 4.06512 -124.686 -4.06512 4.06512 0.86 0.000487713 0.000440968 0.0208235 0.0189791 32 2268 21 6.64007e+06 276276 554710. 1919.41 0.93 0.0850328 0.0743124 22834 132086 -1 2137 19 1378 2491 165441 37726 3.26157 3.26157 -120.084 -3.26157 0 0 701300. 2426.64 0.29 0.06 0.12 -1 -1 0.29 0.0230284 0.0203988 133 55 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_017.v common 4.40 vpr 64.68 MiB -1 -1 0.14 20392 1 0.03 -1 -1 33936 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66232 32 32 338 269 1 196 87 17 17 289 -1 unnamed_device 26.2 MiB 0.24 1114 15447 4373 9239 1835 64.7 MiB 0.14 0.00 4.49004 -144.522 -4.49004 4.49004 0.88 0.000508988 0.000458954 0.0432068 0.0394891 30 2367 22 6.64007e+06 288834 526063. 1820.29 1.04 0.113121 0.100561 22546 126617 -1 2082 22 1283 1774 106684 24449 3.52743 3.52743 -132.363 -3.52743 0 0 666494. 2306.21 0.28 0.06 0.12 -1 -1 0.28 0.0246663 0.0218447 138 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_018.v common 4.17 vpr 64.77 MiB -1 -1 0.15 20328 1 0.03 -1 -1 33632 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66328 32 32 323 276 1 153 93 17 17 289 -1 unnamed_device 26.2 MiB 0.11 723 8493 1892 6266 335 64.8 MiB 0.08 0.00 2.85064 -99.9956 -2.85064 2.85064 0.87 0.00049609 0.000450993 0.0213282 0.0194464 26 1971 23 6.64007e+06 364182 477104. 1650.88 1.07 0.0887986 0.0782333 21682 110474 -1 1682 23 1157 1829 133991 31802 2.16631 2.16631 -95.695 -2.16631 0 0 585099. 2024.56 0.26 0.06 0.10 -1 -1 0.26 0.0238253 0.0210597 110 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_019.v common 3.93 vpr 63.73 MiB -1 -1 0.15 20620 1 0.03 -1 -1 33852 -1 -1 15 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65264 30 32 222 206 1 117 77 17 17 289 -1 unnamed_device 25.3 MiB 0.06 681 12139 4399 6260 1480 63.7 MiB 0.08 0.00 2.38033 -81.64 -2.38033 2.38033 0.88 0.000354102 0.000323468 0.0281724 0.0257314 32 1405 20 6.64007e+06 188370 554710. 1919.41 0.88 0.0717183 0.0630653 22834 132086 -1 1332 19 687 974 77488 17623 2.11131 2.11131 -84.6627 -2.11131 0 0 701300. 2426.64 0.29 0.04 0.13 -1 -1 0.29 0.0153282 0.0135058 81 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_020.v common 5.24 vpr 64.62 MiB -1 -1 0.15 20568 1 0.03 -1 -1 33960 -1 -1 20 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66176 31 32 291 243 1 171 83 17 17 289 -1 unnamed_device 26.2 MiB 0.22 706 14123 4873 6572 2678 64.6 MiB 0.10 0.00 4.95769 -142.332 -4.95769 4.95769 0.89 0.00043877 0.000398568 0.0372408 0.0339624 36 1838 20 6.64007e+06 251160 612192. 2118.31 1.90 0.134987 0.118448 23410 145293 -1 1478 17 801 1099 85912 22741 3.70143 3.70143 -127.634 -3.70143 0 0 782063. 2706.10 0.31 0.05 0.14 -1 -1 0.31 0.0184859 0.0164687 128 30 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_021.v common 4.11 vpr 64.59 MiB -1 -1 0.16 20560 1 0.03 -1 -1 34064 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66136 32 32 342 271 1 179 95 17 17 289 -1 unnamed_device 26.1 MiB 0.06 905 8735 1899 5951 885 64.6 MiB 0.08 0.00 4.18572 -129.145 -4.18572 4.18572 0.89 0.000512718 0.000469161 0.0232024 0.0212275 30 2116 22 6.64007e+06 389298 526063. 1820.29 0.99 0.0879887 0.0773103 22546 126617 -1 1860 21 1144 1874 106775 25052 3.51643 3.51643 -123.572 -3.51643 0 0 666494. 2306.21 0.28 0.06 0.12 -1 -1 0.28 0.0228636 0.0202427 135 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_022.v common 5.47 vpr 65.14 MiB -1 -1 0.16 20520 1 0.03 -1 -1 33912 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66704 32 32 372 300 1 204 89 17 17 289 -1 unnamed_device 26.4 MiB 0.27 1203 12167 3358 7515 1294 65.1 MiB 0.12 0.00 4.64616 -143.706 -4.64616 4.64616 0.88 0.000548139 0.000500918 0.0360826 0.0329529 26 3212 23 6.64007e+06 313950 477104. 1650.88 2.10 0.114111 0.100968 21682 110474 -1 2759 22 1650 2668 239641 52048 4.42528 4.42528 -144.001 -4.42528 0 0 585099. 2024.56 0.25 0.09 0.11 -1 -1 0.25 0.0265663 0.0235179 144 59 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_023.v common 3.95 vpr 63.82 MiB -1 -1 0.13 20052 1 0.02 -1 -1 34124 -1 -1 18 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65352 26 32 190 182 1 110 76 17 17 289 -1 unnamed_device 25.4 MiB 0.15 410 10636 4183 5187 1266 63.8 MiB 0.06 0.00 2.43955 -66.7065 -2.43955 2.43955 0.88 0.000342124 0.000314802 0.0220671 0.0201461 26 1192 25 6.64007e+06 226044 477104. 1650.88 0.92 0.064298 0.056493 21682 110474 -1 933 19 592 836 60371 15069 1.93811 1.93811 -66.8476 -1.93811 0 0 585099. 2024.56 0.25 0.04 0.11 -1 -1 0.25 0.0137048 0.0121143 77 21 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_024.v common 3.99 vpr 64.33 MiB -1 -1 0.15 20204 1 0.03 -1 -1 33844 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65872 32 32 285 227 1 165 85 17 17 289 -1 unnamed_device 26.0 MiB 0.05 995 7897 1725 4978 1194 64.3 MiB 0.07 0.00 5.05066 -128.356 -5.05066 5.05066 0.90 0.000437717 0.000399808 0.0209425 0.0191592 28 2296 20 6.64007e+06 263718 500653. 1732.36 0.93 0.0769377 0.0676926 21970 115934 -1 2002 19 1149 2144 141277 31796 3.76362 3.76362 -124.406 -3.76362 0 0 612192. 2118.31 0.25 0.06 0.11 -1 -1 0.25 0.0194558 0.0172148 118 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_025.v common 3.82 vpr 63.99 MiB -1 -1 0.14 19840 1 0.03 -1 -1 33240 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65524 32 32 173 169 1 116 78 17 17 289 -1 unnamed_device 25.6 MiB 0.05 661 11200 3826 5626 1748 64.0 MiB 0.06 0.00 2.56853 -79.0193 -2.56853 2.56853 0.89 0.000299883 0.000274295 0.0216434 0.0197133 28 1267 14 6.64007e+06 175812 500653. 1732.36 0.86 0.0568021 0.0501349 21970 115934 -1 1189 14 407 458 37605 8621 2.02211 2.02211 -77.5953 -2.02211 0 0 612192. 2118.31 0.25 0.03 0.12 -1 -1 0.25 0.00996251 0.00889143 79 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_026.v common 3.92 vpr 64.54 MiB -1 -1 0.13 20428 1 0.03 -1 -1 33856 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66088 32 32 300 245 1 165 94 17 17 289 -1 unnamed_device 26.2 MiB 0.05 831 10318 2723 6880 715 64.5 MiB 0.08 0.00 4.58015 -125.342 -4.58015 4.58015 0.87 0.000419215 0.000382022 0.0231821 0.0210537 28 2131 21 6.64007e+06 376740 500653. 1732.36 0.94 0.0795435 0.0696537 21970 115934 -1 1845 18 1048 1710 106719 26161 3.57362 3.57362 -117.035 -3.57362 0 0 612192. 2118.31 0.26 0.05 0.10 -1 -1 0.26 0.0184269 0.0162798 123 21 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_027.v common 4.07 vpr 64.54 MiB -1 -1 0.15 20116 1 0.03 -1 -1 33796 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66084 32 32 297 233 1 177 95 17 17 289 -1 unnamed_device 26.2 MiB 0.05 850 7439 1494 5462 483 64.5 MiB 0.07 0.00 3.82887 -106.637 -3.82887 3.82887 0.89 0.000470159 0.000429446 0.0183052 0.016727 28 2324 24 6.64007e+06 389298 500653. 1732.36 0.98 0.080586 0.0707612 21970 115934 -1 1818 19 1113 2008 106218 27824 2.96817 2.96817 -107.142 -2.96817 0 0 612192. 2118.31 0.27 0.05 0.11 -1 -1 0.27 0.0208819 0.0186408 128 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_028.v common 4.89 vpr 64.82 MiB -1 -1 0.15 20660 1 0.03 -1 -1 33840 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66372 32 32 338 277 1 179 91 17 17 289 -1 unnamed_device 26.4 MiB 0.12 906 17635 6157 8662 2816 64.8 MiB 0.15 0.00 4.78135 -133.838 -4.78135 4.78135 0.89 0.000516909 0.000470984 0.0460085 0.0419768 28 2693 30 6.64007e+06 339066 500653. 1732.36 1.66 0.129582 0.115266 21970 115934 -1 2068 18 1181 2011 163906 36763 3.79863 3.79863 -128.222 -3.79863 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0215354 0.0191616 126 47 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_029.v common 3.94 vpr 64.02 MiB -1 -1 0.15 20180 1 0.03 -1 -1 33696 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65552 32 32 284 241 1 145 80 17 17 289 -1 unnamed_device 25.5 MiB 0.07 735 5928 1206 4471 251 64.0 MiB 0.05 0.00 3.02179 -99.7239 -3.02179 3.02179 0.87 0.000440606 0.000401448 0.0170288 0.0155812 26 2048 22 6.64007e+06 200928 477104. 1650.88 0.94 0.0760971 0.0667886 21682 110474 -1 1729 20 1095 1740 122619 28865 3.06837 3.06837 -113.451 -3.06837 0 0 585099. 2024.56 0.24 0.05 0.11 -1 -1 0.24 0.0191608 0.0169927 101 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_030.v common 4.10 vpr 64.09 MiB -1 -1 0.14 20244 1 0.03 -1 -1 33748 -1 -1 23 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65624 30 32 262 227 1 135 85 17 17 289 -1 unnamed_device 25.7 MiB 0.07 661 11617 2521 8405 691 64.1 MiB 0.08 0.00 3.24119 -97.0143 -3.24119 3.24119 0.89 0.000393135 0.000359162 0.0277408 0.025326 28 1701 20 6.64007e+06 288834 500653. 1732.36 1.01 0.0799748 0.0704787 21970 115934 -1 1547 17 853 1296 94316 21406 2.79497 2.79497 -96.8 -2.79497 0 0 612192. 2118.31 0.27 0.05 0.12 -1 -1 0.27 0.0167073 0.0148046 97 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_031.v common 4.22 vpr 64.28 MiB -1 -1 0.15 20292 1 0.03 -1 -1 33832 -1 -1 23 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65824 28 32 260 223 1 140 83 17 17 289 -1 unnamed_device 25.8 MiB 0.05 583 14123 3845 8834 1444 64.3 MiB 0.09 0.00 3.43604 -94.4648 -3.43604 3.43604 0.88 0.000369679 0.000335897 0.0315777 0.0287068 28 1800 26 6.64007e+06 288834 500653. 1732.36 1.08 0.0896892 0.0789453 21970 115934 -1 1566 20 916 1539 109893 29879 2.74177 2.74177 -95.1293 -2.74177 0 0 612192. 2118.31 0.25 0.05 0.11 -1 -1 0.25 0.0182793 0.0161632 98 27 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_032.v common 5.89 vpr 64.34 MiB -1 -1 0.13 20096 1 0.03 -1 -1 33732 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65880 32 32 253 210 1 154 83 17 17 289 -1 unnamed_device 25.9 MiB 0.05 702 4763 881 3747 135 64.3 MiB 0.04 0.00 3.98575 -113.461 -3.98575 3.98575 0.87 0.000390365 0.00035526 0.0120982 0.0110781 26 2390 34 6.64007e+06 238602 477104. 1650.88 2.92 0.132224 0.114964 21682 110474 -1 1814 22 1363 2192 166936 41393 3.11217 3.11217 -116.399 -3.11217 0 0 585099. 2024.56 0.25 0.07 0.11 -1 -1 0.25 0.0203613 0.0180514 110 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_033.v common 4.17 vpr 64.58 MiB -1 -1 0.16 20560 1 0.03 -1 -1 33384 -1 -1 27 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66128 31 32 271 231 1 148 90 17 17 289 -1 unnamed_device 26.1 MiB 0.05 705 6924 1381 5320 223 64.6 MiB 0.06 0.00 3.56847 -102.973 -3.56847 3.56847 0.89 0.000423852 0.000387018 0.0164957 0.0150612 26 2212 43 6.64007e+06 339066 477104. 1650.88 1.15 0.0887873 0.0774617 21682 110474 -1 1683 19 1008 1700 120423 28387 2.97797 2.97797 -105.892 -2.97797 0 0 585099. 2024.56 0.26 0.05 0.11 -1 -1 0.26 0.0181919 0.0160751 103 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_034.v common 4.04 vpr 64.61 MiB -1 -1 0.16 20544 1 0.03 -1 -1 33604 -1 -1 26 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66156 29 32 291 250 1 153 87 17 17 289 -1 unnamed_device 26.1 MiB 0.13 800 11799 3784 6073 1942 64.6 MiB 0.05 0.00 3.4791 -109.298 -3.4791 3.4791 0.87 0.00025032 0.000227888 0.0175455 0.0160331 28 1940 18 6.64007e+06 326508 500653. 1732.36 0.91 0.0701812 0.0615429 21970 115934 -1 1709 19 961 1369 109961 25852 2.36297 2.36297 -96.7073 -2.36297 0 0 612192. 2118.31 0.26 0.05 0.12 -1 -1 0.26 0.0191146 0.0169247 105 48 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_035.v common 4.27 vpr 65.17 MiB -1 -1 0.16 20556 1 0.03 -1 -1 33372 -1 -1 38 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66736 32 32 367 282 1 201 102 17 17 289 -1 unnamed_device 26.8 MiB 0.14 1109 16524 4269 9768 2487 65.2 MiB 0.13 0.00 4.35696 -124.032 -4.35696 4.35696 0.88 0.000548371 0.000493613 0.0397782 0.0362302 32 2645 21 6.64007e+06 477204 554710. 1919.41 0.97 0.108211 0.0954535 22834 132086 -1 2264 17 1243 2131 135685 30613 3.93102 3.93102 -119.547 -3.93102 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65996 31 32 279 237 1 161 82 17 17 289 -1 unnamed_device 25.9 MiB 0.23 894 10228 3268 4917 2043 64.4 MiB 0.08 0.00 4.39381 -127.308 -4.39381 4.39381 0.88 0.000455098 0.000418388 0.0274214 0.0251687 32 2018 21 6.64007e+06 238602 554710. 1919.41 0.94 0.082651 0.0730412 22834 132086 -1 1748 19 1015 1433 93274 21875 3.15083 3.15083 -111.221 -3.15083 0 0 701300. 2426.64 0.30 0.05 0.13 -1 -1 0.30 0.0189528 0.0168678 112 30 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_038.v common 4.25 vpr 65.09 MiB -1 -1 0.17 20520 1 0.03 -1 -1 33716 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66648 31 32 370 297 1 186 88 17 17 289 -1 unnamed_device 26.5 MiB 0.13 1026 15298 5172 7552 2574 65.1 MiB 0.13 0.00 4.30797 -133.38 -4.30797 4.30797 0.89 0.0004931 0.000447439 0.0424328 0.0385686 32 2288 22 6.64007e+06 313950 554710. 1919.41 0.96 0.109709 0.0967233 22834 132086 -1 1951 22 1450 2591 173643 38508 2.89797 2.89797 -112.425 -2.89797 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0241763 0.021301 138 57 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_039.v common 4.61 vpr 65.03 MiB -1 -1 0.17 20492 1 0.03 -1 -1 33540 -1 -1 29 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66588 31 32 377 302 1 233 92 17 17 289 -1 unnamed_device 26.8 MiB 0.40 1296 14996 4340 8343 2313 65.0 MiB 0.14 0.00 5.87616 -177.472 -5.87616 5.87616 0.89 0.00054626 0.000496363 0.0409653 0.0373834 32 3094 21 6.64007e+06 364182 554710. 1919.41 1.02 0.110007 0.0972575 22834 132086 -1 2524 19 1742 2613 176076 40477 4.74615 4.74615 -163.707 -4.74615 0 0 701300. 2426.64 0.28 0.07 0.13 -1 -1 0.28 0.0241597 0.0215074 172 60 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_040.v common 4.58 vpr 65.02 MiB -1 -1 0.15 20604 1 0.03 -1 -1 33752 -1 -1 27 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66580 31 32 383 305 1 209 90 17 17 289 -1 unnamed_device 26.5 MiB 0.38 1150 16974 4810 10660 1504 65.0 MiB 0.15 0.00 5.08852 -153.875 -5.08852 5.08852 0.88 0.00047263 0.000431891 0.0485684 0.044197 28 3077 19 6.64007e+06 339066 500653. 1732.36 1.04 0.118163 0.104639 21970 115934 -1 2547 20 1680 2607 189567 42842 4.56048 4.56048 -155.741 -4.56048 0 0 612192. 2118.31 0.27 0.07 0.12 -1 -1 0.27 0.0253092 0.0224673 164 60 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_041.v common 4.18 vpr 65.04 MiB -1 -1 0.16 20508 1 0.03 -1 -1 33848 -1 -1 31 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66604 31 32 352 285 1 184 94 17 17 289 -1 unnamed_device 26.5 MiB 0.13 1075 13513 3858 8482 1173 65.0 MiB 0.12 0.00 4.68524 -137.744 -4.68524 4.68524 0.89 0.000526159 0.000485053 0.0345771 0.0314989 30 2366 21 6.64007e+06 389298 526063. 1820.29 0.93 0.0989639 0.0872754 22546 126617 -1 1961 15 884 1464 71687 17433 3.23063 3.23063 -121.351 -3.23063 0 0 666494. 2306.21 0.28 0.05 0.13 -1 -1 0.28 0.0196416 0.0176696 135 51 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_042.v common 4.53 vpr 64.73 MiB -1 -1 0.15 20272 1 0.03 -1 -1 33920 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66288 32 32 291 242 1 179 87 17 17 289 -1 unnamed_device 26.4 MiB 0.22 975 7767 1720 5470 577 64.7 MiB 0.07 0.00 4.38513 -117.551 -4.38513 4.38513 0.88 0.000429156 0.000390203 0.0202506 0.0184913 26 2701 24 6.64007e+06 288834 477104. 1650.88 1.32 0.0842826 0.0740391 21682 110474 -1 2166 19 1317 1939 167610 36546 3.68463 3.68463 -121.244 -3.68463 0 0 585099. 2024.56 0.26 0.06 0.11 -1 -1 0.26 0.0198718 0.0176958 119 24 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_043.v common 4.56 vpr 65.29 MiB -1 -1 0.17 20868 1 0.03 -1 -1 34004 -1 -1 40 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66860 32 32 457 356 1 223 104 17 17 289 -1 unnamed_device 26.9 MiB 0.19 1225 15720 4488 9844 1388 65.3 MiB 0.14 0.00 5.18355 -167.471 -5.18355 5.18355 0.88 0.000600229 0.000545501 0.0419975 0.0382061 26 3193 18 6.64007e+06 502320 477104. 1650.88 1.21 0.123926 0.109557 21682 110474 -1 2728 17 1590 2477 169182 38780 4.27989 4.27989 -152.775 -4.27989 0 0 585099. 2024.56 0.26 0.07 0.11 -1 -1 0.26 0.0257696 0.0229756 174 84 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_044.v common 4.10 vpr 64.18 MiB -1 -1 0.15 20228 1 0.03 -1 -1 33420 -1 -1 21 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65720 31 32 261 225 1 142 84 17 17 289 -1 unnamed_device 25.8 MiB 0.08 755 11064 4559 5783 722 64.2 MiB 0.07 0.00 3.8227 -103.618 -3.8227 3.8227 0.88 0.000417739 0.000380753 0.026839 0.0244642 30 1736 20 6.64007e+06 263718 526063. 1820.29 1.01 0.0797708 0.0703244 22546 126617 -1 1480 21 908 1504 89570 21574 2.79977 2.79977 -98.5206 -2.79977 0 0 666494. 2306.21 0.29 0.05 0.12 -1 -1 0.29 0.0192969 0.0170289 101 24 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_045.v common 4.57 vpr 64.71 MiB -1 -1 0.16 20352 1 0.03 -1 -1 33820 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66264 31 32 337 267 1 205 88 17 17 289 -1 unnamed_device 26.0 MiB 0.25 1189 14518 4594 8025 1899 64.7 MiB 0.14 0.00 5.24081 -156.256 -5.24081 5.24081 0.89 0.000507393 0.00046225 0.0395191 0.036089 28 3102 25 6.64007e+06 313950 500653. 1732.36 1.19 0.109945 0.0971693 21970 115934 -1 2470 20 1224 1701 126371 27807 4.70968 4.70968 -150.995 -4.70968 0 0 612192. 2118.31 0.26 0.06 0.12 -1 -1 0.26 0.0217173 0.0193231 144 30 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_046.v common 9.53 vpr 64.92 MiB -1 -1 0.15 20856 1 0.03 -1 -1 33884 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66476 32 32 349 284 1 183 97 17 17 289 -1 unnamed_device 26.4 MiB 0.13 1030 10531 2414 7661 456 64.9 MiB 0.11 0.00 4.0171 -121.213 -4.0171 4.0171 0.89 0.000535276 0.000489907 0.0266968 0.0243479 26 3025 43 6.64007e+06 414414 477104. 1650.88 6.35 0.213801 0.186711 21682 110474 -1 2292 14 1163 2099 151082 34983 3.08816 3.08816 -118 -3.08816 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0191523 0.0171419 131 50 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_047.v common 4.09 vpr 64.31 MiB -1 -1 0.14 20300 1 0.03 -1 -1 33956 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65852 32 32 291 230 1 168 88 17 17 289 -1 unnamed_device 26.0 MiB 0.05 891 13153 4464 6066 2623 64.3 MiB 0.10 0.00 4.20356 -126.138 -4.20356 4.20356 0.89 0.000435639 0.000398581 0.0325848 0.0297661 32 2178 21 6.64007e+06 301392 554710. 1919.41 0.97 0.0917992 0.0811164 22834 132086 -1 1719 21 1074 2024 133293 30707 3.82482 3.82482 -119.413 -3.82482 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0216249 0.0191769 123 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_048.v common 5.05 vpr 64.98 MiB -1 -1 0.15 20708 1 0.03 -1 -1 33628 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66544 32 32 353 287 1 198 88 17 17 289 -1 unnamed_device 26.5 MiB 0.28 1089 13933 3596 8128 2209 65.0 MiB 0.11 0.00 4.81394 -142.313 -4.81394 4.81394 0.88 0.000464398 0.000421499 0.0368163 0.033428 26 2775 32 6.64007e+06 301392 477104. 1650.88 1.74 0.118046 0.104012 21682 110474 -1 2352 18 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-1 -1 0.16 20476 1 0.03 -1 -1 33880 -1 -1 37 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66604 32 32 382 305 1 192 101 17 17 289 -1 unnamed_device 26.5 MiB 0.14 901 8796 1803 6364 629 65.0 MiB 0.09 0.00 4.787 -140.677 -4.787 4.787 0.89 0.000525948 0.000478637 0.02249 0.0205062 32 2513 22 6.64007e+06 464646 554710. 1919.41 0.95 0.09006 0.0789917 22834 132086 -1 1954 18 1106 1629 93353 23736 3.48203 3.48203 -125.684 -3.48203 0 0 701300. 2426.64 0.30 0.05 0.13 -1 -1 0.30 0.0225167 0.0199919 145 59 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_051.v common 4.10 vpr 64.77 MiB -1 -1 0.14 20140 1 0.03 -1 -1 33504 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66320 32 32 306 248 1 166 93 17 17 289 -1 unnamed_device 26.4 MiB 0.06 902 12903 3419 8175 1309 64.8 MiB 0.10 0.00 4.24273 -122.494 -4.24273 4.24273 0.89 0.000453487 0.000415183 0.0305077 0.0278021 32 1909 19 6.64007e+06 364182 554710. 1919.41 0.93 0.0887278 0.0781368 22834 132086 -1 1739 19 1143 1869 117063 27589 3.64463 3.64463 -118.883 -3.64463 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 0.0206899 0.0184067 122 21 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_052.v common 4.29 vpr 64.88 MiB -1 -1 0.16 20740 1 0.03 -1 -1 33716 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66432 32 32 319 257 1 198 88 17 17 289 -1 unnamed_device 26.5 MiB 0.25 983 6913 1568 4936 409 64.9 MiB 0.07 0.00 5.07997 -139.694 -5.07997 5.07997 0.89 0.000480504 0.000436415 0.0195429 0.0178759 32 2406 21 6.64007e+06 301392 554710. 1919.41 0.96 0.0801799 0.0703931 22834 132086 -1 2179 20 1491 2098 133320 32792 3.85003 3.85003 -128.971 -3.85003 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.022478 0.0199478 133 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_053.v common 5.98 vpr 65.16 MiB -1 -1 0.17 20472 1 0.03 -1 -1 33852 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66720 31 32 373 299 1 202 88 17 17 289 -1 unnamed_device 26.7 MiB 0.29 1148 9058 2364 5808 886 65.2 MiB 0.09 0.00 5.0113 -149.211 -5.0113 5.0113 0.90 0.00053096 0.000482227 0.0265604 0.0242384 26 3407 45 6.64007e+06 313950 477104. 1650.88 2.54 0.125049 0.109973 21682 110474 -1 2639 24 1898 3099 233977 51589 4.31263 4.31263 -142.786 -4.31263 0 0 585099. 2024.56 0.26 0.09 0.11 -1 -1 0.26 0.0288628 0.0255103 148 58 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_054.v common 4.38 vpr 64.72 MiB -1 -1 0.16 20620 1 0.03 -1 -1 33896 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66272 32 32 387 315 1 189 86 17 17 289 -1 unnamed_device 26.2 MiB 0.16 977 15962 5144 8098 2720 64.7 MiB 0.14 0.00 4.21776 -130.397 -4.21776 4.21776 0.89 0.000549674 0.000501539 0.047722 0.0433563 32 2870 23 6.64007e+06 276276 554710. 1919.41 1.04 0.122245 0.107868 22834 132086 -1 2220 15 1299 2324 157370 35871 3.78082 3.78082 -127.954 -3.78082 0 0 701300. 2426.64 0.31 0.06 0.13 -1 -1 0.31 0.0213396 0.0191242 136 74 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_055.v common 4.06 vpr 64.36 MiB -1 -1 0.14 20472 1 0.03 -1 -1 33732 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65904 32 32 251 219 1 140 88 17 17 289 -1 unnamed_device 25.9 MiB 0.05 763 11398 3223 7297 878 64.4 MiB 0.08 0.00 3.46744 -102.907 -3.46744 3.46744 0.89 0.000418139 0.000382862 0.024185 0.0220491 26 1977 28 6.64007e+06 301392 477104. 1650.88 1.03 0.084143 0.074091 21682 110474 -1 1674 20 804 1237 85402 19533 2.71977 2.71977 -98.3296 -2.71977 0 0 585099. 2024.56 0.26 0.05 0.11 -1 -1 0.26 0.0184654 0.0163905 97 20 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_056.v common 4.31 vpr 65.02 MiB -1 -1 0.15 20636 1 0.03 -1 -1 33696 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66584 32 32 341 285 1 187 86 17 17 289 -1 unnamed_device 26.6 MiB 0.24 982 8969 2347 6212 410 65.0 MiB 0.09 0.00 4.05536 -139.886 -4.05536 4.05536 0.93 0.000473643 0.000428377 0.0258267 0.0235492 30 2184 22 6.64007e+06 276276 526063. 1820.29 0.97 0.0896666 0.0787377 22546 126617 -1 1875 19 1272 1814 105981 24118 3.03143 3.03143 -122.855 -3.03143 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0212781 0.0188808 127 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_057.v common 4.93 vpr 64.83 MiB -1 -1 0.15 20676 1 0.03 -1 -1 34068 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66384 32 32 387 293 1 234 93 17 17 289 -1 unnamed_device 26.6 MiB 0.25 1389 7443 1662 5262 519 64.8 MiB 0.09 0.00 5.61123 -170.011 -5.61123 5.61123 0.90 0.000563899 0.000513939 0.0227089 0.0207808 28 3624 25 6.64007e+06 364182 500653. 1732.36 1.55 0.112985 0.100228 21970 115934 -1 2961 21 1866 2993 218466 47396 4.65768 4.65768 -159.09 -4.65768 0 0 612192. 2118.31 0.27 0.08 0.11 -1 -1 0.27 0.0280755 0.025097 169 28 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_058.v common 4.10 vpr 64.86 MiB -1 -1 0.15 20736 1 0.03 -1 -1 33660 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66412 32 32 340 270 1 181 96 17 17 289 -1 unnamed_device 26.5 MiB 0.11 962 14988 4939 7718 2331 64.9 MiB 0.12 0.00 4.60549 -136.553 -4.60549 4.60549 0.88 0.000521117 0.000472987 0.0356532 0.0324121 30 2140 21 6.64007e+06 401856 526063. 1820.29 0.94 0.0981381 0.0864743 22546 126617 -1 1783 17 1010 1711 104239 23066 2.88497 2.88497 -112.713 -2.88497 0 0 666494. 2306.21 0.29 0.05 0.11 -1 -1 0.29 0.019318 0.0172411 133 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_059.v common 3.98 vpr 64.47 MiB -1 -1 0.16 20180 1 0.03 -1 -1 33556 -1 -1 26 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66020 30 32 278 235 1 148 88 17 17 289 -1 unnamed_device 26.0 MiB 0.05 702 10423 3012 6489 922 64.5 MiB 0.08 0.00 3.51327 -104.848 -3.51327 3.51327 0.89 0.000419685 0.000380459 0.0241922 0.0220516 28 1807 22 6.64007e+06 326508 500653. 1732.36 0.90 0.0788565 0.0692779 21970 115934 -1 1568 22 1108 1754 103440 24891 2.72357 2.72357 -100.219 -2.72357 0 0 612192. 2118.31 0.26 0.05 0.12 -1 -1 0.26 0.0208774 0.0184844 104 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_060.v common 4.71 vpr 65.13 MiB -1 -1 0.18 20940 1 0.03 -1 -1 34056 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66692 32 32 431 332 1 235 91 17 17 289 -1 unnamed_device 27.0 MiB 0.33 1216 15187 4686 7965 2536 65.1 MiB 0.15 0.00 6.49087 -185.665 -6.49087 6.49087 0.89 0.000628297 0.000576265 0.0484064 0.0441669 30 3247 27 6.64007e+06 339066 526063. 1820.29 1.14 0.137346 0.121677 22546 126617 -1 2515 22 1992 2989 190825 42741 4.92734 4.92734 -165.423 -4.92734 0 0 666494. 2306.21 0.29 0.08 0.12 -1 -1 0.29 0.0309693 0.0274765 170 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_061.v common 4.45 vpr 64.69 MiB -1 -1 0.16 20448 1 0.03 -1 -1 33980 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66244 32 32 336 268 1 174 97 17 17 289 -1 unnamed_device 26.2 MiB 0.14 903 6979 1333 5401 245 64.7 MiB 0.07 0.00 4.64606 -138.337 -4.64606 4.64606 0.90 0.000493516 0.000450105 0.0182104 0.0166845 26 2639 42 6.64007e+06 414414 477104. 1650.88 1.27 0.103007 0.090034 21682 110474 -1 2098 19 1524 2359 164433 38859 3.75183 3.75183 -134.746 -3.75183 0 0 585099. 2024.56 0.26 0.06 0.11 -1 -1 0.26 0.0217608 0.0192677 130 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_062.v common 3.98 vpr 64.26 MiB -1 -1 0.14 20048 1 0.03 -1 -1 33552 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65804 32 32 231 199 1 140 87 17 17 289 -1 unnamed_device 25.9 MiB 0.07 832 12375 4208 6622 1545 64.3 MiB 0.09 0.00 3.58247 -103.673 -3.58247 3.58247 0.88 0.000400032 0.000365973 0.0269492 0.0246163 28 2023 24 6.64007e+06 288834 500653. 1732.36 0.92 0.0783567 0.0689434 21970 115934 -1 1729 19 808 1414 115942 25349 2.89797 2.89797 -102.799 -2.89797 0 0 612192. 2118.31 0.27 0.05 0.12 -1 -1 0.27 0.0168365 0.0149259 100 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_063.v common 6.36 vpr 65.07 MiB -1 -1 0.16 20372 1 0.03 -1 -1 33692 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66636 32 32 349 273 1 191 98 17 17 289 -1 unnamed_device 26.4 MiB 0.10 993 9098 1971 6187 940 65.1 MiB 0.08 0.00 5.56744 -134.001 -5.56744 5.56744 0.89 0.000500265 0.000455166 0.023119 0.021127 28 2715 23 6.64007e+06 426972 500653. 1732.36 3.22 0.173965 0.151975 21970 115934 -1 2155 22 1488 2892 193907 44774 4.78768 4.78768 -137.22 -4.78768 0 0 612192. 2118.31 0.27 0.08 0.11 -1 -1 0.27 0.0256112 0.022697 139 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_064.v common 3.95 vpr 64.31 MiB -1 -1 0.14 20296 1 0.03 -1 -1 33864 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65856 32 32 247 207 1 147 84 17 17 289 -1 unnamed_device 25.9 MiB 0.05 822 7770 1860 5212 698 64.3 MiB 0.06 0.00 3.4291 -106.218 -3.4291 3.4291 0.89 0.000402357 0.000366948 0.0189894 0.0173358 26 1966 20 6.64007e+06 251160 477104. 1650.88 0.91 0.0717967 0.0630973 21682 110474 -1 1794 20 1189 2015 145791 32533 2.96717 2.96717 -110.105 -2.96717 0 0 585099. 2024.56 0.26 0.06 0.11 -1 -1 0.26 0.018745 0.0166169 104 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_065.v common 4.22 vpr 64.26 MiB -1 -1 0.14 20188 1 0.03 -1 -1 33732 -1 -1 33 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65800 30 32 278 235 1 147 95 17 17 289 -1 unnamed_device 25.7 MiB 0.11 857 12839 3557 7998 1284 64.3 MiB 0.10 0.00 4.12483 -113.809 -4.12483 4.12483 0.90 0.000387975 0.000348945 0.0276919 0.025242 26 1933 22 6.64007e+06 414414 477104. 1650.88 1.06 0.0853952 0.0751953 21682 110474 -1 1626 17 791 1503 98783 21815 2.81177 2.81177 -102.96 -2.81177 0 0 585099. 2024.56 0.25 0.05 0.11 -1 -1 0.25 0.0166491 0.0147267 105 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_066.v common 4.40 vpr 65.09 MiB -1 -1 0.17 20620 1 0.03 -1 -1 33976 -1 -1 26 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66652 29 32 355 287 1 198 87 17 17 289 -1 unnamed_device 26.4 MiB 0.30 1104 17175 4885 10433 1857 65.1 MiB 0.15 0.00 4.60024 -135.427 -4.60024 4.60024 0.86 0.000496929 0.000455283 0.0479374 0.0437754 28 2667 21 6.64007e+06 326508 500653. 1732.36 0.97 0.114975 0.10179 21970 115934 -1 2393 25 1500 2282 138739 32634 4.10842 4.10842 -132.907 -4.10842 0 0 612192. 2118.31 0.27 0.07 0.11 -1 -1 0.27 0.0278142 0.0246166 139 56 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_067.v common 4.22 vpr 64.73 MiB -1 -1 0.15 20548 1 0.03 -1 -1 33952 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66284 32 32 358 289 1 175 88 17 17 289 -1 unnamed_device 26.3 MiB 0.12 772 4768 876 3724 168 64.7 MiB 0.05 0.00 4.51224 -132.005 -4.51224 4.51224 0.92 0.000520133 0.000472466 0.015224 0.0139356 32 2190 25 6.64007e+06 301392 554710. 1919.41 1.01 0.0856509 0.0748587 22834 132086 -1 1821 22 1657 2534 173073 42172 3.74782 3.74782 -128.311 -3.74782 0 0 701300. 2426.64 0.30 0.07 0.13 -1 -1 0.30 0.0254961 0.022607 130 51 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_068.v common 4.15 vpr 64.51 MiB -1 -1 0.16 20464 1 0.03 -1 -1 33860 -1 -1 28 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66056 32 32 353 285 1 181 92 17 17 289 -1 unnamed_device 26.0 MiB 0.12 1030 11891 3350 7362 1179 64.5 MiB 0.10 0.00 4.72138 -141.993 -4.72138 4.72138 0.90 0.000479495 0.000437429 0.0300112 0.0272721 32 2311 18 6.64007e+06 351624 554710. 1919.41 0.93 0.0901741 0.0791367 22834 132086 -1 2022 18 1159 1995 135404 30180 3.52623 3.52623 -131.325 -3.52623 0 0 701300. 2426.64 0.29 0.06 0.12 -1 -1 0.29 0.0210134 0.0186497 133 48 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_069.v common 4.30 vpr 64.33 MiB -1 -1 0.15 20108 1 0.03 -1 -1 33480 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65876 32 32 276 237 1 159 81 17 17 289 -1 unnamed_device 25.8 MiB 0.26 799 9356 2375 6010 971 64.3 MiB 0.08 0.00 4.79432 -131.982 -4.79432 4.79432 0.88 0.000401927 0.000368659 0.0244077 0.0223246 26 2160 21 6.64007e+06 213486 477104. 1650.88 1.08 0.0854385 0.0755299 21682 110474 -1 1917 20 1110 1536 115013 27360 3.25803 3.25803 -118.562 -3.25803 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0202233 0.0179562 105 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_070.v common 4.28 vpr 64.81 MiB -1 -1 0.17 20520 1 0.03 -1 -1 33996 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66364 31 32 319 272 1 168 82 17 17 289 -1 unnamed_device 26.4 MiB 0.24 899 12898 4205 6789 1904 64.8 MiB 0.10 0.00 3.96736 -127.03 -3.96736 3.96736 0.88 0.00045545 0.000413823 0.035729 0.0326002 32 2035 18 6.64007e+06 238602 554710. 1919.41 0.92 0.0923315 0.081596 22834 132086 -1 1836 19 1223 1799 123742 27820 3.01863 3.01863 -117.895 -3.01863 0 0 701300. 2426.64 0.31 0.06 0.13 -1 -1 0.31 0.0211877 0.0187883 113 60 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_071.v common 4.81 vpr 64.64 MiB -1 -1 0.16 20164 1 0.03 -1 -1 33688 -1 -1 33 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66196 30 32 329 273 1 166 95 17 17 289 -1 unnamed_device 26.3 MiB 0.12 857 8087 1703 5875 509 64.6 MiB 0.07 0.00 3.59243 -98.9543 -3.59243 3.59243 0.91 0.000480078 0.000438295 0.0201024 0.0183717 26 2500 27 6.64007e+06 414414 477104. 1650.88 1.64 0.0917369 0.0805631 21682 110474 -1 1945 19 1161 2050 166589 39629 2.76177 2.76177 -99.6151 -2.76177 0 0 585099. 2024.56 0.26 0.06 0.11 -1 -1 0.26 0.021541 0.0191671 123 52 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_072.v common 4.06 vpr 64.72 MiB -1 -1 0.15 20276 1 0.03 -1 -1 33712 -1 -1 35 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66276 28 32 277 229 1 155 95 17 17 289 -1 unnamed_device 26.1 MiB 0.09 873 14567 3705 9538 1324 64.7 MiB 0.10 0.00 4.33724 -105.319 -4.33724 4.33724 0.90 0.000412129 0.000374095 0.0309832 0.0282679 26 2165 27 6.64007e+06 439530 477104. 1650.88 0.94 0.0914894 0.0805545 21682 110474 -1 1828 19 946 1883 134782 28404 3.80183 3.80183 -107.35 -3.80183 0 0 585099. 2024.56 0.25 0.05 0.11 -1 -1 0.25 0.018869 0.0167584 115 20 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_073.v common 4.21 vpr 64.62 MiB -1 -1 0.16 20428 1 0.03 -1 -1 33676 -1 -1 18 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66168 30 32 317 269 1 152 80 17 17 289 -1 unnamed_device 26.1 MiB 0.13 857 12980 4441 6366 2173 64.6 MiB 0.10 0.00 4.19523 -120.389 -4.19523 4.19523 0.89 0.000471815 0.000428917 0.0351458 0.0320921 32 1926 20 6.64007e+06 226044 554710. 1919.41 0.98 0.0924843 0.0816125 22834 132086 -1 1769 19 1175 1932 148827 32317 3.06217 3.06217 -111.242 -3.06217 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0201697 0.0178706 108 58 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_074.v common 4.27 vpr 64.87 MiB -1 -1 0.16 20768 1 0.03 -1 -1 33760 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66428 32 32 335 282 1 184 85 17 17 289 -1 unnamed_device 26.4 MiB 0.23 1011 9385 2419 5667 1299 64.9 MiB 0.09 0.00 4.0237 -135.679 -4.0237 4.0237 0.89 0.000481476 0.000438389 0.026587 0.0242964 32 2261 23 6.64007e+06 263718 554710. 1919.41 0.95 0.0894937 0.0786613 22834 132086 -1 2018 18 1093 1588 111076 24869 3.32603 3.32603 -130.745 -3.32603 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 0.0203445 0.0180598 121 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_075.v common 6.29 vpr 64.73 MiB -1 -1 0.16 20244 1 0.03 -1 -1 34000 -1 -1 32 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66288 31 32 293 230 1 175 95 17 17 289 -1 unnamed_device 26.3 MiB 0.05 926 9383 1965 6366 1052 64.7 MiB 0.07 0.00 4.61041 -129.144 -4.61041 4.61041 0.90 0.000469823 0.000428997 0.0220688 0.0201389 28 2322 28 6.64007e+06 401856 500653. 1732.36 3.17 0.157453 0.137079 21970 115934 -1 1918 20 1309 2325 142579 33944 3.84183 3.84183 -122.709 -3.84183 0 0 612192. 2118.31 0.26 0.06 0.11 -1 -1 0.26 0.0215806 0.0192019 127 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_076.v common 4.47 vpr 64.98 MiB -1 -1 0.15 20600 1 0.03 -1 -1 33984 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66540 32 32 350 275 1 209 88 17 17 289 -1 unnamed_device 26.2 MiB 0.28 1230 14128 4435 7821 1872 65.0 MiB 0.14 0.00 5.3267 -167.408 -5.3267 5.3267 0.90 0.000509993 0.000463533 0.0401436 0.036664 32 3153 21 6.64007e+06 301392 554710. 1919.41 1.02 0.106686 0.0942991 22834 132086 -1 2670 20 1471 2127 203069 40274 4.46509 4.46509 -159.817 -4.46509 0 0 701300. 2426.64 0.30 0.07 0.12 -1 -1 0.30 0.0238807 0.0212647 146 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_077.v common 4.46 vpr 64.88 MiB -1 -1 0.16 20688 1 0.03 -1 -1 33744 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66436 32 32 385 308 1 185 98 17 17 289 -1 unnamed_device 26.3 MiB 0.19 846 12473 3077 8180 1216 64.9 MiB 0.11 0.00 5.24026 -142.21 -5.24026 5.24026 0.89 0.000541091 0.000490878 0.0333525 0.0304373 30 2493 25 6.64007e+06 426972 526063. 1820.29 1.14 0.115402 0.102309 22546 126617 -1 1863 20 1088 2106 109487 27680 3.81508 3.81508 -134.95 -3.81508 0 0 666494. 2306.21 0.29 0.06 0.12 -1 -1 0.29 0.024756 0.021999 144 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_078.v common 4.42 vpr 64.89 MiB -1 -1 0.15 20396 1 0.03 -1 -1 33716 -1 -1 37 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66452 32 32 387 309 1 190 101 17 17 289 -1 unnamed_device 26.3 MiB 0.12 1088 19136 5971 10565 2600 64.9 MiB 0.15 0.00 4.47484 -142.459 -4.47484 4.47484 0.88 0.000541063 0.000490969 0.0446296 0.0403409 28 2720 22 6.64007e+06 464646 500653. 1732.36 1.23 0.121668 0.107413 21970 115934 -1 2387 19 1473 2617 177636 39843 3.70543 3.70543 -136.956 -3.70543 0 0 612192. 2118.31 0.27 0.07 0.10 -1 -1 0.27 0.0229289 0.0203061 140 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_079.v common 4.05 vpr 64.27 MiB -1 -1 0.16 20472 1 0.03 -1 -1 33548 -1 -1 19 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65808 30 32 272 232 1 147 81 17 17 289 -1 unnamed_device 25.8 MiB 0.10 810 10756 3573 5296 1887 64.3 MiB 0.08 0.00 3.86158 -115.559 -3.86158 3.86158 0.88 0.000416137 0.000378282 0.027428 0.0249951 28 2024 20 6.64007e+06 238602 500653. 1732.36 0.92 0.0796977 0.0701591 21970 115934 -1 1812 24 1223 2130 161484 35053 2.85977 2.85977 -104.747 -2.85977 0 0 612192. 2118.31 0.27 0.07 0.12 -1 -1 0.27 0.0219755 0.0193389 104 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_080.v common 4.30 vpr 65.10 MiB -1 -1 0.16 20616 1 0.03 -1 -1 33904 -1 -1 23 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66664 30 32 375 299 1 187 85 17 17 289 -1 unnamed_device 26.6 MiB 0.15 996 11989 3165 6999 1825 65.1 MiB 0.11 0.00 4.82523 -141.177 -4.82523 4.82523 0.89 0.00053894 0.000494687 0.0365319 0.0333474 32 2408 19 6.64007e+06 288834 554710. 1919.41 1.00 0.103819 0.0917681 22834 132086 -1 1994 21 1700 2635 168605 39469 3.73163 3.73163 -133.479 -3.73163 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0255579 0.0227132 138 58 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_081.v common 4.75 vpr 65.07 MiB -1 -1 0.16 20796 1 0.03 -1 -1 33792 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66632 32 32 340 270 1 200 90 17 17 289 -1 unnamed_device 26.5 MiB 0.25 1103 10743 2816 7025 902 65.1 MiB 0.10 0.00 5.45357 -158.764 -5.45357 5.45357 0.90 0.0005092 0.000464202 0.0296747 0.0271066 26 2972 34 6.64007e+06 326508 477104. 1650.88 1.37 0.110625 0.0974396 21682 110474 -1 2568 22 1724 2771 237679 51373 4.19368 4.19368 -144.555 -4.19368 0 0 585099. 2024.56 0.25 0.08 0.11 -1 -1 0.25 0.0243351 0.0215715 140 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_082.v common 4.53 vpr 64.72 MiB -1 -1 0.17 20436 1 0.03 -1 -1 33656 -1 -1 30 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66276 31 32 340 275 1 195 93 17 17 289 -1 unnamed_device 26.3 MiB 0.28 1102 15423 4945 8075 2403 64.7 MiB 0.13 0.00 5.30601 -154.372 -5.30601 5.30601 0.89 0.000509603 0.000464963 0.0394947 0.0360395 28 3024 19 6.64007e+06 376740 500653. 1732.36 1.13 0.108238 0.0960729 21970 115934 -1 2450 20 1449 2163 173727 36410 4.47448 4.47448 -149.944 -4.47448 0 0 612192. 2118.31 0.26 0.07 0.12 -1 -1 0.26 0.0230322 0.020483 148 43 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_083.v common 4.31 vpr 64.83 MiB -1 -1 0.17 20864 1 0.03 -1 -1 33576 -1 -1 33 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66384 30 32 377 310 1 177 95 17 17 289 -1 unnamed_device 26.3 MiB 0.22 960 11975 3127 7423 1425 64.8 MiB 0.11 0.00 4.52304 -132.575 -4.52304 4.52304 0.89 0.000530984 0.000485274 0.0323188 0.0295126 32 2201 21 6.64007e+06 414414 554710. 1919.41 0.96 0.100228 0.0883685 22834 132086 -1 1847 18 942 1594 100135 23271 3.03543 3.03543 -114.645 -3.03543 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 0.0226851 0.0201809 135 78 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_084.v common 4.29 vpr 64.98 MiB -1 -1 0.16 20528 1 0.03 -1 -1 33928 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66540 32 32 365 294 1 185 85 17 17 289 -1 unnamed_device 26.5 MiB 0.12 891 9571 2183 6911 477 65.0 MiB 0.10 0.00 5.02278 -140.291 -5.02278 5.02278 0.91 0.000530078 0.000482029 0.0300516 0.0274311 30 2581 25 6.64007e+06 263718 526063. 1820.29 1.06 0.10466 0.0921333 22546 126617 -1 2011 22 1227 2238 124501 30320 3.82963 3.82963 -134.319 -3.82963 0 0 666494. 2306.21 0.28 0.06 0.12 -1 -1 0.28 0.0254835 0.0225891 134 54 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_085.v common 4.25 vpr 64.83 MiB -1 -1 0.17 20536 1 0.03 -1 -1 33960 -1 -1 31 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66384 29 32 378 310 1 177 92 17 17 289 -1 unnamed_device 26.3 MiB 0.15 875 11270 2503 8088 679 64.8 MiB 0.10 0.00 4.91881 -136.338 -4.91881 4.91881 0.89 0.00053174 0.000484901 0.031223 0.0284502 32 2070 20 6.64007e+06 389298 554710. 1919.41 0.94 0.0970308 0.0852794 22834 132086 -1 1833 21 1140 1867 115580 27353 3.65943 3.65943 -125.768 -3.65943 0 0 701300. 2426.64 0.31 0.06 0.13 -1 -1 0.31 0.0253765 0.0224447 132 79 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_086.v common 3.91 vpr 64.36 MiB -1 -1 0.13 20220 1 0.03 -1 -1 34024 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65908 32 32 243 205 1 139 79 17 17 289 -1 unnamed_device 26.0 MiB 0.04 680 10219 2541 6421 1257 64.4 MiB 0.08 0.00 3.88758 -112.502 -3.88758 3.88758 0.89 0.00039476 0.000355168 0.0258355 0.0236554 28 1667 19 6.64007e+06 188370 500653. 1732.36 0.88 0.0751647 0.0664184 21970 115934 -1 1566 19 853 1297 89732 21195 2.92697 2.92697 -106.606 -2.92697 0 0 612192. 2118.31 0.27 0.05 0.11 -1 -1 0.27 0.0179086 0.0159463 96 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_087.v common 4.61 vpr 64.99 MiB -1 -1 0.16 20444 1 0.03 -1 -1 33876 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 373 302 1 176 96 17 17 289 -1 unnamed_device 26.5 MiB 0.22 1003 15426 4168 9105 2153 65.0 MiB 0.13 0.00 4.65236 -140.168 -4.65236 4.65236 0.90 0.000532856 0.000486504 0.0401894 0.0366914 28 2185 20 6.64007e+06 401856 500653. 1732.36 1.27 0.116898 0.104025 21970 115934 -1 1998 20 1322 2197 140567 32453 3.84903 3.84903 -133.976 -3.84903 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0242349 0.0215153 132 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_088.v common 4.41 vpr 65.11 MiB -1 -1 0.17 20384 1 0.03 -1 -1 33920 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66668 32 32 397 314 1 196 86 17 17 289 -1 unnamed_device 26.6 MiB 0.15 1074 11237 2615 7354 1268 65.1 MiB 0.11 0.00 4.84723 -152.835 -4.84723 4.84723 0.91 0.000585534 0.000533424 0.0366865 0.0334925 32 2517 24 6.64007e+06 276276 554710. 1919.41 1.07 0.114333 0.10094 22834 132086 -1 2165 24 1914 3076 222092 49372 3.86183 3.86183 -143.393 -3.86183 0 0 701300. 2426.64 0.30 0.09 0.13 -1 -1 0.30 0.0301433 0.0267128 148 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_089.v common 4.31 vpr 64.43 MiB -1 -1 0.14 20204 1 0.03 -1 -1 33872 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65976 32 32 269 231 1 170 84 17 17 289 -1 unnamed_device 25.9 MiB 0.24 745 8136 1743 5584 809 64.4 MiB 0.06 0.00 4.31784 -119.848 -4.31784 4.31784 0.88 0.000404661 0.000373878 0.0190128 0.017294 28 2436 31 6.64007e+06 251160 500653. 1732.36 1.16 0.082231 0.0719421 21970 115934 -1 1890 21 1141 1486 118566 29283 3.66597 3.66597 -125.385 -3.66597 0 0 612192. 2118.31 0.26 0.05 0.11 -1 -1 0.26 0.0192044 0.0170028 109 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_090.v common 3.97 vpr 64.47 MiB -1 -1 0.14 20312 1 0.03 -1 -1 33688 -1 -1 21 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66016 31 32 245 205 1 150 84 17 17 289 -1 unnamed_device 26.0 MiB 0.05 720 11430 2918 7192 1320 64.5 MiB 0.09 0.00 3.81035 -108.914 -3.81035 3.81035 0.89 0.000415854 0.000371977 0.0269856 0.0246309 26 2000 23 6.64007e+06 263718 477104. 1650.88 0.94 0.0813124 0.0716699 21682 110474 -1 1806 19 1161 1910 131605 30533 2.89397 2.89397 -108.713 -2.89397 0 0 585099. 2024.56 0.25 0.05 0.11 -1 -1 0.25 0.0173909 0.0154067 106 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_091.v common 4.95 vpr 64.99 MiB -1 -1 0.16 20516 1 0.03 -1 -1 33716 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 348 274 1 211 90 17 17 289 -1 unnamed_device 26.5 MiB 0.23 1132 12753 3748 7734 1271 65.0 MiB 0.11 0.00 5.06147 -160.912 -5.06147 5.06147 0.87 0.000502682 0.000458073 0.0348079 0.0317668 26 3087 40 6.64007e+06 326508 477104. 1650.88 1.65 0.122632 0.107896 21682 110474 -1 2355 20 1868 2497 190002 41388 3.92229 3.92229 -146.247 -3.92229 0 0 585099. 2024.56 0.26 0.07 0.11 -1 -1 0.26 0.0240719 0.0214256 144 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_092.v common 4.40 vpr 64.88 MiB -1 -1 0.16 20832 1 0.03 -1 -1 33656 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66432 32 32 356 289 1 202 93 17 17 289 -1 unnamed_device 26.1 MiB 0.23 1035 16893 5570 8364 2959 64.9 MiB 0.14 0.00 5.02458 -149.361 -5.02458 5.02458 0.89 0.000501523 0.0004589 0.0437494 0.0399435 32 2745 25 6.64007e+06 364182 554710. 1919.41 1.01 0.113701 0.100652 22834 132086 -1 2253 20 1492 2370 153128 36800 4.34809 4.34809 -142.117 -4.34809 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.023764 0.0211335 155 53 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_093.v common 4.84 vpr 65.10 MiB -1 -1 0.17 20424 1 0.03 -1 -1 33488 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66664 32 32 349 260 1 204 100 17 17 289 -1 unnamed_device 26.8 MiB 0.08 1057 12164 2729 8794 641 65.1 MiB 0.11 0.00 5.48474 -146.154 -5.48474 5.48474 0.89 0.000530546 0.000480356 0.0308256 0.0280049 28 3239 24 6.64007e+06 452088 500653. 1732.36 1.62 0.107667 0.0951347 21970 115934 -1 2648 20 1616 2857 269688 60325 4.87389 4.87389 -152.412 -4.87389 0 0 612192. 2118.31 0.25 0.09 0.12 -1 -1 0.25 0.0237558 0.0210791 153 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_094.v common 4.00 vpr 64.78 MiB -1 -1 0.15 20500 1 0.03 -1 -1 33784 -1 -1 32 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 30 32 316 264 1 162 94 17 17 289 -1 unnamed_device 26.4 MiB 0.12 890 11170 2805 7440 925 64.8 MiB 0.09 0.00 3.51924 -105.227 -3.51924 3.51924 0.85 0.000476787 0.000433992 0.0271153 0.0247181 26 2070 19 6.64007e+06 401856 477104. 1650.88 0.90 0.0864753 0.0758994 21682 110474 -1 1811 19 1221 2143 148491 33695 2.80477 2.80477 -101.447 -2.80477 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0192165 0.0169975 121 47 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_095.v common 3.94 vpr 64.30 MiB -1 -1 0.15 20288 1 0.03 -1 -1 34184 -1 -1 21 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65840 27 32 255 219 1 132 80 17 17 289 -1 unnamed_device 25.9 MiB 0.05 645 11948 3714 6556 1678 64.3 MiB 0.08 0.00 3.4543 -94.7001 -3.4543 3.4543 0.89 0.00037526 0.00034237 0.0290315 0.0265073 26 1652 20 6.64007e+06 263718 477104. 1650.88 0.91 0.0807053 0.0712072 21682 110474 -1 1462 20 950 1369 109801 25165 2.92817 2.92817 -95.5092 -2.92817 0 0 585099. 2024.56 0.25 0.05 0.11 -1 -1 0.25 0.0180634 0.015933 97 26 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_096.v common 4.51 vpr 64.95 MiB -1 -1 0.17 20504 1 0.03 -1 -1 33992 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66504 32 32 421 327 1 232 90 17 17 289 -1 unnamed_device 26.7 MiB 0.24 1270 10743 2480 7803 460 64.9 MiB 0.11 0.00 4.37195 -138.919 -4.37195 4.37195 0.89 0.00059496 0.000543531 0.0345427 0.0315779 32 3375 24 6.64007e+06 326508 554710. 1919.41 1.07 0.116423 0.102882 22834 132086 -1 2791 23 2060 3365 248010 55326 3.84783 3.84783 -138.713 -3.84783 0 0 701300. 2426.64 0.29 0.09 0.13 -1 -1 0.29 0.0310088 0.0274958 170 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_097.v common 4.40 vpr 64.95 MiB -1 -1 0.17 20540 1 0.03 -1 -1 33896 -1 -1 23 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66512 31 32 365 296 1 193 86 17 17 289 -1 unnamed_device 26.5 MiB 0.31 989 14828 4611 8220 1997 65.0 MiB 0.12 0.00 5.41669 -159.225 -5.41669 5.41669 0.89 0.000497213 0.000452505 0.0420188 0.0383493 28 2481 23 6.64007e+06 288834 500653. 1732.36 0.97 0.11023 0.0974299 21970 115934 -1 2153 20 1535 2472 159921 37576 4.54748 4.54748 -151.702 -4.54748 0 0 612192. 2118.31 0.27 0.07 0.11 -1 -1 0.27 0.0248391 0.0221078 152 60 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_098.v common 4.34 vpr 64.82 MiB -1 -1 0.17 20520 1 0.03 -1 -1 34008 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66380 32 32 331 280 1 174 83 17 17 289 -1 unnamed_device 26.5 MiB 0.30 825 13583 3778 7563 2242 64.8 MiB 0.12 0.00 4.65475 -131.833 -4.65475 4.65475 0.88 0.000490084 0.000445476 0.0388354 0.0354176 30 1948 20 6.64007e+06 238602 526063. 1820.29 0.95 0.0983101 0.0867608 22546 126617 -1 1626 18 802 1237 72373 16961 3.52843 3.52843 -124.473 -3.52843 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0205512 0.0182974 128 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_099.v common 4.62 vpr 64.76 MiB -1 -1 0.16 20228 1 0.03 -1 -1 33980 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66316 32 32 326 263 1 176 94 17 17 289 -1 unnamed_device 26.3 MiB 0.06 911 16708 5166 8976 2566 64.8 MiB 0.12 0.00 5.41998 -135.015 -5.41998 5.41998 0.88 0.000490416 0.000445419 0.0392955 0.0357237 28 2820 28 6.64007e+06 376740 500653. 1732.36 1.46 0.114999 0.101752 21970 115934 -1 2215 20 1177 1920 157877 36958 3.85082 3.85082 -126.566 -3.85082 0 0 612192. 2118.31 0.26 0.06 0.12 -1 -1 0.26 0.0218738 0.01936 126 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_100.v common 4.79 vpr 65.02 MiB -1 -1 0.18 20304 1 0.03 -1 -1 33872 -1 -1 34 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66584 31 32 373 294 1 196 97 17 17 289 -1 unnamed_device 26.5 MiB 0.14 1048 7423 1517 5297 609 65.0 MiB 0.08 0.00 5.01701 -136.816 -5.01701 5.01701 0.89 0.000522939 0.000472941 0.0192557 0.0174744 26 2859 33 6.64007e+06 426972 477104. 1650.88 1.60 0.106321 0.0932312 21682 110474 -1 2296 20 1422 2465 203490 44242 3.76082 3.76082 -129.287 -3.76082 0 0 585099. 2024.56 0.25 0.07 0.10 -1 -1 0.25 0.0235864 0.0208883 145 46 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_101.v common 4.21 vpr 64.58 MiB -1 -1 0.15 20416 1 0.03 -1 -1 33968 -1 -1 31 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66132 30 32 325 268 1 171 93 17 17 289 -1 unnamed_device 26.2 MiB 0.13 829 7233 1598 5117 518 64.6 MiB 0.07 0.00 3.67989 -107.648 -3.67989 3.67989 0.88 0.000496119 0.000451257 0.0190422 0.0173614 30 2144 22 6.64007e+06 389298 526063. 1820.29 1.04 0.0845305 0.0741047 22546 126617 -1 1628 20 1009 1796 99734 24777 2.92597 2.92597 -101.5 -2.92597 0 0 666494. 2306.21 0.28 0.05 0.13 -1 -1 0.28 0.0219041 0.0193453 124 46 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_102.v common 8.24 vpr 65.24 MiB -1 -1 0.16 20508 1 0.03 -1 -1 33768 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66804 32 32 350 275 1 214 89 17 17 289 -1 unnamed_device 26.7 MiB 0.27 1174 10979 2913 7012 1054 65.2 MiB 0.11 0.00 5.12747 -161.736 -5.12747 5.12747 0.91 0.000536086 0.000489276 0.0316273 0.0288983 26 3490 36 6.64007e+06 313950 477104. 1650.88 4.86 0.194304 0.169992 21682 110474 -1 2650 20 1925 2965 218244 49499 4.12068 4.12068 -148.064 -4.12068 0 0 585099. 2024.56 0.25 0.08 0.11 -1 -1 0.25 0.0243836 0.0217119 148 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_103.v common 4.38 vpr 64.94 MiB -1 -1 0.16 20460 1 0.03 -1 -1 33936 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66500 32 32 386 307 1 195 100 17 17 289 -1 unnamed_device 26.4 MiB 0.19 1093 17036 4934 9564 2538 64.9 MiB 0.14 0.00 4.75546 -148.188 -4.75546 4.75546 0.88 0.000516193 0.000468845 0.0426129 0.0388278 28 2591 20 6.64007e+06 452088 500653. 1732.36 1.06 0.11748 0.104123 21970 115934 -1 2227 17 1227 1962 128843 29850 3.51922 3.51922 -129.458 -3.51922 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.022904 0.0204555 144 59 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_104.v common 3.95 vpr 64.24 MiB -1 -1 0.15 20620 1 0.03 -1 -1 33984 -1 -1 17 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65780 29 32 269 229 1 129 78 17 17 289 -1 unnamed_device 25.8 MiB 0.08 731 10536 4018 5581 937 64.2 MiB 0.07 0.00 3.74538 -111.28 -3.74538 3.74538 0.89 0.000397225 0.000361252 0.0278234 0.0254163 30 1443 17 6.64007e+06 213486 526063. 1820.29 0.87 0.0745341 0.0658323 22546 126617 -1 1262 17 750 1088 62961 14826 2.68977 2.68977 -98.4877 -2.68977 0 0 666494. 2306.21 0.29 0.04 0.12 -1 -1 0.29 0.0168795 0.0150115 91 28 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_105.v common 4.38 vpr 64.72 MiB -1 -1 0.16 20492 1 0.03 -1 -1 33840 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66272 32 32 310 266 1 175 85 17 17 289 -1 unnamed_device 26.3 MiB 0.20 882 13849 5109 6856 1884 64.7 MiB 0.10 0.00 4.03956 -127.808 -4.03956 4.03956 0.90 0.000469064 0.000426126 0.0354675 0.032334 28 2218 24 6.64007e+06 263718 500653. 1732.36 1.03 0.0972248 0.0857064 21970 115934 -1 1895 23 1297 1769 147915 33084 3.22483 3.22483 -120.552 -3.22483 0 0 612192. 2118.31 0.26 0.06 0.12 -1 -1 0.26 0.0226422 0.0199606 117 55 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_106.v common 4.10 vpr 64.94 MiB -1 -1 0.16 20324 1 0.03 -1 -1 33392 -1 -1 37 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66500 31 32 326 261 1 177 100 17 17 289 -1 unnamed_device 26.5 MiB 0.07 954 14020 3601 8035 2384 64.9 MiB 0.11 0.00 4.80044 -128.284 -4.80044 4.80044 0.88 0.000482616 0.000438462 0.0318425 0.028967 32 2139 23 6.64007e+06 464646 554710. 1919.41 0.96 0.0903567 0.0793056 22834 132086 -1 2014 21 1419 2451 173087 38123 3.85382 3.85382 -125.331 -3.85382 0 0 701300. 2426.64 0.28 0.06 0.12 -1 -1 0.28 0.0210214 0.0185965 129 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_107.v common 4.37 vpr 64.21 MiB -1 -1 0.15 20284 1 0.03 -1 -1 33696 -1 -1 22 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65748 29 32 262 224 1 168 83 17 17 289 -1 unnamed_device 25.7 MiB 0.25 763 7103 1547 5010 546 64.2 MiB 0.06 0.00 4.32884 -114.709 -4.32884 4.32884 0.90 0.000399024 0.000365751 0.0178774 0.0163699 26 2139 24 6.64007e+06 276276 477104. 1650.88 1.13 0.0786062 0.0692697 21682 110474 -1 1766 20 1098 1421 93712 22469 3.56143 3.56143 -115.197 -3.56143 0 0 585099. 2024.56 0.25 0.05 0.11 -1 -1 0.25 0.0188171 0.0166968 109 25 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_108.v common 4.14 vpr 64.50 MiB -1 -1 0.14 20296 1 0.03 -1 -1 33804 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66048 32 32 278 238 1 149 81 17 17 289 -1 unnamed_device 26.0 MiB 0.13 634 12856 3328 7254 2274 64.5 MiB 0.10 0.00 3.90075 -115.478 -3.90075 3.90075 0.88 0.000429466 0.000392232 0.0335093 0.0305491 28 2041 24 6.64007e+06 213486 500653. 1732.36 0.95 0.0899676 0.079157 21970 115934 -1 1792 22 1362 2294 161189 38138 3.12337 3.12337 -112.776 -3.12337 0 0 612192. 2118.31 0.28 0.07 0.11 -1 -1 0.28 0.0214895 0.0189637 108 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_109.v common 4.25 vpr 65.02 MiB -1 -1 0.17 20684 1 0.03 -1 -1 33884 -1 -1 36 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66584 31 32 373 300 1 181 99 17 17 289 -1 unnamed_device 26.5 MiB 0.12 1014 15147 3968 9710 1469 65.0 MiB 0.12 0.00 4.15695 -125.813 -4.15695 4.15695 0.92 0.000535621 0.000487907 0.0384199 0.0348758 32 1987 18 6.64007e+06 452088 554710. 1919.41 0.98 0.103657 0.0913404 22834 132086 -1 1806 17 1104 1789 117607 26569 2.98336 2.98336 -111.526 -2.98336 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 0.0214164 0.0191208 136 60 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_110.v common 4.17 vpr 64.40 MiB -1 -1 0.16 20236 1 0.03 -1 -1 34004 -1 -1 20 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65944 31 32 265 230 1 162 83 17 17 289 -1 unnamed_device 25.8 MiB 0.21 920 10163 2724 6503 936 64.4 MiB 0.08 0.00 4.05252 -124.711 -4.05252 4.05252 0.89 0.000422718 0.000388545 0.0257611 0.0235774 30 1979 19 6.64007e+06 251160 526063. 1820.29 0.92 0.0772277 0.0680608 22546 126617 -1 1733 20 812 1183 75670 17017 2.96343 2.96343 -112.059 -2.96343 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0186859 0.0165918 107 30 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_111.v common 4.33 vpr 64.86 MiB -1 -1 0.15 20648 1 0.03 -1 -1 33944 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66416 32 32 349 286 1 171 96 17 17 289 -1 unnamed_device 26.3 MiB 0.12 987 10827 2770 6959 1098 64.9 MiB 0.09 0.00 3.75038 -118.864 -3.75038 3.75038 0.88 0.000511331 0.00046486 0.0269971 0.0246087 26 2424 21 6.64007e+06 401856 477104. 1650.88 1.15 0.0981164 0.0866138 21682 110474 -1 2057 21 1289 2282 165102 37170 2.73977 2.73977 -108.013 -2.73977 0 0 585099. 2024.56 0.26 0.07 0.11 -1 -1 0.26 0.0243696 0.0216412 127 54 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_112.v common 4.45 vpr 64.80 MiB -1 -1 0.17 20548 1 0.03 -1 -1 33704 -1 -1 32 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66356 31 32 396 325 1 183 95 17 17 289 -1 unnamed_device 26.3 MiB 0.28 927 10247 2394 7169 684 64.8 MiB 0.10 0.00 4.34696 -134.379 -4.34696 4.34696 0.90 0.000564886 0.000516479 0.0294089 0.0268335 32 2248 20 6.64007e+06 401856 554710. 1919.41 0.95 0.0995628 0.0877631 22834 132086 -1 1950 20 1313 1831 120295 29232 3.33903 3.33903 -128.306 -3.33903 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.0253328 0.0224341 138 87 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_113.v common 4.17 vpr 64.62 MiB -1 -1 0.15 20352 1 0.03 -1 -1 33412 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66168 32 32 303 262 1 150 81 17 17 289 -1 unnamed_device 26.1 MiB 0.16 835 12681 3362 7951 1368 64.6 MiB 0.09 0.00 3.3851 -106.107 -3.3851 3.3851 0.90 0.00045576 0.000417227 0.0343093 0.0312464 26 2103 18 6.64007e+06 213486 477104. 1650.88 0.97 0.0918568 0.0812154 21682 110474 -1 1822 21 1002 1582 127645 28263 2.76677 2.76677 -106.335 -2.76677 0 0 585099. 2024.56 0.26 0.06 0.11 -1 -1 0.26 0.0205871 0.0181994 104 54 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_114.v common 4.24 vpr 64.82 MiB -1 -1 0.14 20192 1 0.03 -1 -1 33660 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66372 32 32 290 244 1 175 85 17 17 289 -1 unnamed_device 26.4 MiB 0.23 876 14407 4775 7452 2180 64.8 MiB 0.11 0.00 4.41384 -136.056 -4.41384 4.41384 0.92 0.000392533 0.000355633 0.0339565 0.030795 30 2137 20 6.64007e+06 263718 526063. 1820.29 0.94 0.0867564 0.0762115 22546 126617 -1 1844 19 1079 1610 102910 23440 3.19163 3.19163 -119.952 -3.19163 0 0 666494. 2306.21 0.28 0.05 0.13 -1 -1 0.28 0.0191075 0.0169245 117 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_115.v common 4.24 vpr 64.90 MiB -1 -1 0.16 20708 1 0.03 -1 -1 33720 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66460 32 32 318 257 1 194 87 17 17 289 -1 unnamed_device 26.4 MiB 0.21 1070 9111 2300 6161 650 64.9 MiB 0.08 0.00 4.68344 -140.114 -4.68344 4.68344 0.89 0.000485914 0.000446096 0.0253387 0.0231762 32 2486 17 6.64007e+06 288834 554710. 1919.41 0.95 0.0853762 0.0754192 22834 132086 -1 2124 20 1344 1810 132646 30744 3.78882 3.78882 -132.22 -3.78882 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.022406 0.019948 130 27 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_116.v common 4.20 vpr 64.84 MiB -1 -1 0.16 20528 1 0.03 -1 -1 33924 -1 -1 29 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66400 29 32 324 268 1 168 90 17 17 289 -1 unnamed_device 26.4 MiB 0.19 969 13959 4223 8147 1589 64.8 MiB 0.11 0.00 4.71146 -123.714 -4.71146 4.71146 0.88 0.000492873 0.000451125 0.03498 0.0319118 32 1988 20 6.64007e+06 364182 554710. 1919.41 0.92 0.0933108 0.0824136 22834 132086 -1 1799 14 777 1319 84447 19201 3.07743 3.07743 -106.617 -3.07743 0 0 701300. 2426.64 0.29 0.04 0.14 -1 -1 0.29 0.0177797 0.0159802 122 49 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_117.v common 4.53 vpr 65.32 MiB -1 -1 0.16 20820 1 0.03 -1 -1 33612 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66892 32 32 393 312 1 213 88 17 17 289 -1 unnamed_device 26.8 MiB 0.28 1164 12568 3311 8092 1165 65.3 MiB 0.13 0.00 5.44678 -170.492 -5.44678 5.44678 0.90 0.000577259 0.000527477 0.0385692 0.0352443 28 3017 24 6.64007e+06 301392 500653. 1732.36 1.10 0.116091 0.102523 21970 115934 -1 2587 19 1713 2544 209427 46081 4.52369 4.52369 -158.217 -4.52369 0 0 612192. 2118.31 0.27 0.08 0.11 -1 -1 0.27 0.0252171 0.0224224 154 62 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_118.v common 3.99 vpr 64.49 MiB -1 -1 0.15 20352 1 0.03 -1 -1 33800 -1 -1 18 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66036 31 32 229 197 1 138 81 17 17 289 -1 unnamed_device 26.1 MiB 0.05 802 9356 2223 6300 833 64.5 MiB 0.07 0.00 3.65167 -102.287 -3.65167 3.65167 0.88 0.000384361 0.000344033 0.0229451 0.0210703 32 1738 16 6.64007e+06 226044 554710. 1919.41 0.90 0.0685178 0.0603631 22834 132086 -1 1550 18 717 1200 83961 19380 2.89017 2.89017 -97.9917 -2.89017 0 0 701300. 2426.64 0.31 0.04 0.13 -1 -1 0.31 0.0165378 0.0146879 96 -1 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_119.v common 4.42 vpr 65.07 MiB -1 -1 0.16 20624 1 0.03 -1 -1 33536 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66628 32 32 412 334 1 190 98 17 17 289 -1 unnamed_device 26.4 MiB 0.14 1014 15173 4325 8191 2657 65.1 MiB 0.13 0.00 4.24115 -141.749 -4.24115 4.24115 0.90 0.000557445 0.000507325 0.041753 0.0381099 32 2563 27 6.64007e+06 426972 554710. 1919.41 1.05 0.122162 0.10811 22834 132086 -1 2184 19 1571 2371 170912 38410 3.72983 3.72983 -138.118 -3.72983 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0256507 0.0228303 145 87 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_120.v common 4.16 vpr 64.60 MiB -1 -1 0.15 20664 1 0.03 -1 -1 33840 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66148 32 32 376 318 1 155 81 17 17 289 -1 unnamed_device 26.3 MiB 0.23 854 11456 4252 5499 1705 64.6 MiB 0.09 0.00 3.5233 -125.693 -3.5233 3.5233 0.86 0.00047995 0.000438768 0.0347494 0.0317081 32 1976 23 6.64007e+06 213486 554710. 1919.41 0.93 0.0988327 0.0869689 22834 132086 -1 1747 19 1250 1820 139253 29466 2.95177 2.95177 -122.552 -2.95177 0 0 701300. 2426.64 0.28 0.06 0.12 -1 -1 0.28 0.0220966 0.019502 114 93 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_121.v common 4.39 vpr 65.00 MiB -1 -1 0.15 20428 1 0.03 -1 -1 33640 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66556 32 32 360 293 1 179 96 17 17 289 -1 unnamed_device 26.5 MiB 0.13 993 15864 4238 9461 2165 65.0 MiB 0.12 0.00 4.43584 -134.986 -4.43584 4.43584 0.88 0.000448359 0.000409184 0.0374467 0.0341228 26 2557 24 6.64007e+06 401856 477104. 1650.88 1.20 0.11343 0.100213 21682 110474 -1 2081 15 926 1423 96949 22387 3.21363 3.21363 -116.31 -3.21363 0 0 585099. 2024.56 0.25 0.05 0.11 -1 -1 0.25 0.0196742 0.0175592 131 57 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_122.v common 4.80 vpr 64.91 MiB -1 -1 0.17 20580 1 0.03 -1 -1 34008 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66464 32 32 396 299 1 236 91 17 17 289 -1 unnamed_device 26.6 MiB 0.33 1309 17635 5897 9510 2228 64.9 MiB 0.18 0.00 6.39084 -191.431 -6.39084 6.39084 0.90 0.000534152 0.000488152 0.0532702 0.0485501 28 3357 19 6.64007e+06 339066 500653. 1732.36 1.23 0.13339 0.118662 21970 115934 -1 2809 20 1792 2549 197016 42830 5.36314 5.36314 -177.542 -5.36314 0 0 612192. 2118.31 0.27 0.08 0.11 -1 -1 0.27 0.0274252 0.0244253 170 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_123.v common 4.07 vpr 64.43 MiB -1 -1 0.15 20360 1 0.03 -1 -1 33648 -1 -1 18 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65976 30 32 224 207 1 137 80 17 17 289 -1 unnamed_device 26.1 MiB 0.17 697 8680 1945 6222 513 64.4 MiB 0.06 0.00 3.31307 -102.387 -3.31307 3.31307 0.89 0.000373143 0.000341638 0.0197998 0.0181044 28 1666 19 6.64007e+06 226044 500653. 1732.36 0.93 0.0669346 0.0588789 21970 115934 -1 1432 14 605 760 77617 18525 2.39717 2.39717 -94.9129 -2.39717 0 0 612192. 2118.31 0.27 0.04 0.11 -1 -1 0.27 0.0134126 0.0119902 87 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_124.v common 4.00 vpr 64.55 MiB -1 -1 0.14 20216 1 0.03 -1 -1 33696 -1 -1 16 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66100 30 32 286 239 1 134 78 17 17 289 -1 unnamed_device 26.1 MiB 0.10 791 11864 3247 7177 1440 64.6 MiB 0.08 0.00 4.38638 -124.628 -4.38638 4.38638 0.90 0.000397452 0.00036378 0.031206 0.0283761 32 1680 15 6.64007e+06 200928 554710. 1919.41 0.89 0.0799447 0.0703516 22834 132086 -1 1479 22 920 1506 118207 25985 3.18337 3.18337 -111.753 -3.18337 0 0 701300. 2426.64 0.30 0.05 0.12 -1 -1 0.30 0.0200545 0.0176547 92 29 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_125.v common 4.04 vpr 64.39 MiB -1 -1 0.14 20152 1 0.03 -1 -1 33872 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65940 32 32 296 247 1 157 85 17 17 289 -1 unnamed_device 25.8 MiB 0.08 807 14407 3847 9113 1447 64.4 MiB 0.11 0.00 3.46104 -112.673 -3.46104 3.46104 0.89 0.000445835 0.000404834 0.0364534 0.0332512 28 2067 23 6.64007e+06 263718 500653. 1732.36 0.92 0.0954167 0.0841169 21970 115934 -1 1884 21 1265 2247 152707 35374 2.75777 2.75777 -107.934 -2.75777 0 0 612192. 2118.31 0.26 0.06 0.11 -1 -1 0.26 0.0210398 0.0186262 115 31 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_126.v common 3.98 vpr 64.13 MiB -1 -1 0.14 20120 1 0.03 -1 -1 33736 -1 -1 27 25 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65668 25 32 216 194 1 122 84 17 17 289 -1 unnamed_device 25.7 MiB 0.05 469 9234 3273 3848 2113 64.1 MiB 0.05 0.00 3.37029 -77.6943 -3.37029 3.37029 0.88 0.000297241 0.000269513 0.0180186 0.0163648 30 1496 25 6.64007e+06 339066 526063. 1820.29 0.96 0.0647251 0.0563744 22546 126617 -1 1146 17 610 1009 61629 15763 2.92917 2.92917 -76.4452 -2.92917 0 0 666494. 2306.21 0.30 0.04 0.12 -1 -1 0.30 0.0141731 0.0125867 89 19 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_127.v common 4.22 vpr 65.00 MiB -1 -1 0.15 20592 1 0.03 -1 -1 33632 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66556 32 32 376 307 1 185 85 17 17 289 -1 unnamed_device 26.5 MiB 0.16 937 9571 2534 6630 407 65.0 MiB 0.09 0.00 4.28889 -129.632 -4.28889 4.28889 0.90 0.00054113 0.000492869 0.0299642 0.0273839 30 2291 20 6.64007e+06 263718 526063. 1820.29 0.97 0.099106 0.0874281 22546 126617 -1 1909 19 1147 2018 101105 24783 3.56243 3.56243 -125.04 -3.56243 0 0 666494. 2306.21 0.29 0.05 0.12 -1 -1 0.29 0.0233231 0.0207226 136 69 -1 -1 -1 -1 -fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_128.v common 4.31 vpr 65.38 MiB -1 -1 0.18 20428 1 0.03 -1 -1 33752 -1 -1 35 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66944 31 32 409 331 1 191 98 17 17 289 -1 unnamed_device 26.7 MiB 0.18 1018 17423 5293 9473 2657 65.4 MiB 0.15 0.00 4.47881 -144.552 -4.47881 4.47881 0.88 0.000583811 0.000530037 0.0465214 0.0423737 32 2355 20 6.64007e+06 439530 554710. 1919.41 0.97 0.116505 0.102795 22834 132086 -1 1953 21 1310 2040 144978 31263 3.34137 3.34137 -129.49 -3.34137 0 0 701300. 2426.64 0.28 0.07 0.12 -1 -1 0.28 0.0261469 0.0230995 143 86 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_001.v common 4.60 vpr 64.36 MiB -1 -1 0.15 20440 1 0.03 -1 -1 34032 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65900 32 32 354 285 1 202 94 17 17 289 -1 unnamed_device 26.0 MiB 0.38 962 17134 5020 8898 3216 64.4 MiB 0.13 0.00 5.27972 -153.369 -5.27972 5.27972 0.88 0.000513206 0.000467221 0.0428108 0.038965 32 2793 32 6.65987e+06 380340 554710. 1919.41 1.07 0.119854 0.105947 22834 132086 -1 2266 23 1794 2718 200976 48039 4.74857 4.74857 -148.259 -4.74857 0 0 701300. 2426.64 0.28 0.08 0.13 -1 -1 0.28 0.0267605 0.023777 152 47 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_002.v common 4.47 vpr 64.67 MiB -1 -1 0.16 20496 1 0.03 -1 -1 33840 -1 -1 23 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66220 30 32 363 293 1 194 85 17 17 289 -1 unnamed_device 26.2 MiB 0.30 1040 12361 3404 6762 2195 64.7 MiB 0.11 0.00 4.63676 -143.523 -4.63676 4.63676 0.90 0.000519162 0.000473046 0.0377942 0.0345234 32 2391 26 6.65987e+06 291594 554710. 1919.41 1.01 0.109508 0.0966938 22834 132086 -1 2137 22 1808 2733 205071 46641 4.06963 4.06963 -142.287 -4.06963 0 0 701300. 2426.64 0.28 0.07 0.13 -1 -1 0.28 0.0252415 0.0223497 138 58 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_003.v common 4.74 vpr 64.40 MiB -1 -1 0.15 20628 1 0.03 -1 -1 33924 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65948 32 32 299 247 1 188 87 17 17 289 -1 unnamed_device 25.9 MiB 0.11 1057 9111 2109 6460 542 64.4 MiB 0.08 0.00 4.05544 -117.725 -4.05544 4.05544 0.90 0.000455451 0.000407493 0.0236738 0.0216507 26 2909 26 6.65987e+06 291594 477104. 1650.88 1.60 0.0968882 0.0858659 21682 110474 -1 2304 21 1445 2010 175906 39220 3.52151 3.52151 -120.603 -3.52151 0 0 585099. 2024.56 0.24 0.07 0.11 -1 -1 0.24 0.0228223 0.0203394 126 26 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_004.v common 4.22 vpr 64.55 MiB -1 -1 0.15 20360 1 0.03 -1 -1 33944 -1 -1 27 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66100 29 32 308 248 1 169 88 17 17 289 -1 unnamed_device 26.1 MiB 0.09 995 11593 2944 7290 1359 64.6 MiB 0.10 0.00 4.34155 -118.133 -4.34155 4.34155 0.89 0.000483718 0.000433673 0.0301451 0.0274365 32 2314 24 6.65987e+06 342306 554710. 1919.41 0.98 0.0920624 0.0809955 22834 132086 -1 2116 20 1335 2441 194474 43071 3.76777 3.76777 -117.12 -3.76777 0 0 701300. 2426.64 0.30 0.07 0.13 -1 -1 0.30 0.0220079 0.0195499 126 25 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_005.v common 6.62 vpr 64.77 MiB -1 -1 0.15 20644 1 0.03 -1 -1 33764 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66328 32 32 336 268 1 174 87 17 17 289 -1 unnamed_device 26.3 MiB 0.11 1007 8919 2464 5628 827 64.8 MiB 0.09 0.00 4.36781 -127.596 -4.36781 4.36781 0.91 0.000502346 0.000459761 0.025551 0.0233173 34 2558 26 6.65987e+06 291594 585099. 2024.56 3.35 0.168716 0.146812 23122 138558 -1 2077 21 1475 2816 191677 44850 3.43891 3.43891 -123.186 -3.43891 0 0 742403. 2568.87 0.31 0.07 0.14 -1 -1 0.31 0.0228129 0.0201426 130 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_006.v common 4.31 vpr 64.63 MiB -1 -1 0.17 20724 1 0.03 -1 -1 33916 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66184 32 32 366 295 1 189 97 17 17 289 -1 unnamed_device 26.0 MiB 0.15 1045 18079 5207 10774 2098 64.6 MiB 0.16 0.00 3.41904 -120.465 -3.41904 3.41904 0.91 0.000522474 0.000468502 0.0458245 0.0417646 30 2159 22 6.65987e+06 418374 526063. 1820.29 0.94 0.114674 0.101303 22546 126617 -1 1847 19 1124 1809 96785 23008 2.73771 2.73771 -111.043 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-1 33740 -1 -1 31 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66124 31 32 271 219 1 162 94 17 17 289 -1 unnamed_device 26.2 MiB 0.05 903 9466 2130 6738 598 64.6 MiB 0.08 0.00 3.22661 -96.4595 -3.22661 3.22661 0.89 0.000429365 0.000388346 0.0211244 0.0192301 30 1887 19 6.65987e+06 393018 526063. 1820.29 0.90 0.0744419 0.0651676 22546 126617 -1 1660 17 761 1366 74007 17618 2.51331 2.51331 -91.8345 -2.51331 0 0 666494. 2306.21 0.28 0.04 0.13 -1 -1 0.28 0.0179516 0.0160126 115 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_009.v common 4.21 vpr 64.70 MiB -1 -1 0.16 20612 1 0.03 -1 -1 33740 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66248 31 32 317 271 1 168 82 17 17 289 -1 unnamed_device 26.3 MiB 0.16 765 13788 3701 7917 2170 64.7 MiB 0.10 0.00 3.4209 -112.776 -3.4209 3.4209 0.90 0.000460016 0.000420772 0.0380082 0.0347321 32 2114 22 6.65987e+06 240882 554710. 1919.41 0.95 0.0990249 0.0876232 22834 132086 -1 1728 17 1058 1542 110918 26906 2.81811 2.81811 -106.836 -2.81811 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 0.0196929 0.0176011 111 60 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_010.v common 4.34 vpr 64.21 MiB -1 -1 0.15 20332 1 0.03 -1 -1 33572 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65748 32 32 298 248 1 156 81 17 17 289 -1 unnamed_device 25.6 MiB 0.27 876 13906 4295 8097 1514 64.2 MiB 0.11 0.00 3.72312 -122.883 -3.72312 3.72312 0.90 0.000453574 0.000414194 0.0380594 0.0347391 32 2018 21 6.65987e+06 215526 554710. 1919.41 0.96 0.0969898 0.0859123 22834 132086 -1 1742 20 1225 1923 138608 31820 2.76451 2.76451 -111.5 -2.76451 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0211088 0.0187818 113 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_011.v common 4.19 vpr 64.52 MiB -1 -1 0.16 20632 1 0.03 -1 -1 33464 -1 -1 17 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66072 30 32 303 262 1 139 79 17 17 289 -1 unnamed_device 26.0 MiB 0.27 696 7008 1825 4747 436 64.5 MiB 0.06 0.00 4.00989 -109.174 -4.00989 4.00989 0.87 0.000454652 0.000414532 0.0209532 0.0191995 30 1525 18 6.65987e+06 215526 526063. 1820.29 0.92 0.0765163 0.0673374 22546 126617 -1 1365 17 574 884 51942 12389 2.68271 2.68271 -96.6812 -2.68271 0 0 666494. 2306.21 0.29 0.04 0.13 -1 -1 0.29 0.0184319 0.0164982 98 58 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_012.v common 4.27 vpr 64.32 MiB -1 -1 0.14 20388 1 0.03 -1 -1 33548 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65864 32 32 276 237 1 166 81 17 17 289 -1 unnamed_device 26.0 MiB 0.25 721 6381 1297 4466 618 64.3 MiB 0.05 0.00 3.89466 -119.961 -3.89466 3.89466 0.91 0.000413054 0.000376173 0.0173536 0.0158444 32 2079 21 6.65987e+06 215526 554710. 1919.41 0.98 0.0744001 0.0652788 22834 132086 -1 1739 22 1249 1676 130638 32083 2.71505 2.71505 -108.626 -2.71505 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0210228 0.018583 106 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_013.v common 4.42 vpr 64.66 MiB -1 -1 0.15 20512 1 0.03 -1 -1 33960 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66216 32 32 344 272 1 202 88 17 17 289 -1 unnamed_device 26.3 MiB 0.24 1056 16468 6105 8420 1943 64.7 MiB 0.15 0.00 4.37712 -140.294 -4.37712 4.37712 0.89 0.000519333 0.00047337 0.0462399 0.0421491 32 2620 22 6.65987e+06 304272 554710. 1919.41 1.01 0.115455 0.102327 22834 132086 -1 2184 21 1699 2549 188889 42181 3.20051 3.20051 -125.325 -3.20051 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0246912 0.0219578 139 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_014.v common 4.30 vpr 64.91 MiB -1 -1 0.15 20420 1 0.03 -1 -1 33956 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66468 32 32 363 295 1 181 94 17 17 289 -1 unnamed_device 26.4 MiB 0.20 951 14365 3991 8802 1572 64.9 MiB 0.13 0.00 4.63803 -131.953 -4.63803 4.63803 0.89 0.000530724 0.000483331 0.0379137 0.0346529 28 2495 26 6.65987e+06 380340 500653. 1732.36 0.99 0.111182 0.0983072 21970 115934 -1 2246 23 1604 2513 195977 44240 3.75925 3.75925 -131.777 -3.75925 0 0 612192. 2118.31 0.26 0.07 0.12 -1 -1 0.26 0.0245653 0.0217243 133 58 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_015.v common 3.99 vpr 64.37 MiB -1 -1 0.14 20532 1 0.03 -1 -1 33616 -1 -1 21 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65916 29 32 248 215 1 137 82 17 17 289 -1 unnamed_device 25.9 MiB 0.14 640 7914 1978 5337 599 64.4 MiB 0.06 0.00 3.16393 -88.5429 -3.16393 3.16393 0.91 0.000377546 0.000343413 0.0190271 0.0173631 28 1656 19 6.65987e+06 266238 500653. 1732.36 0.87 0.0653047 0.0572095 21970 115934 -1 1539 18 815 1389 99319 23560 2.82385 2.82385 -89.4422 -2.82385 0 0 612192. 2118.31 0.26 0.05 0.11 -1 -1 0.26 0.0161632 0.0142953 98 21 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_016.v common 4.58 vpr 64.87 MiB -1 -1 0.15 20332 1 0.03 -1 -1 33824 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66424 32 32 370 297 1 183 85 17 17 289 -1 unnamed_device 26.3 MiB 0.43 1044 14035 4479 7571 1985 64.9 MiB 0.12 0.00 3.91387 -124.268 -3.91387 3.91387 0.89 0.000534047 0.000485047 0.0424307 0.0386412 32 2474 22 6.65987e+06 266238 554710. 1919.41 0.98 0.110813 0.0978306 22834 132086 -1 2152 20 1401 2504 176126 40482 3.25057 3.25057 -119.253 -3.25057 0 0 701300. 2426.64 0.30 0.07 0.13 -1 -1 0.30 0.0257132 0.0228624 132 55 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_017.v common 4.57 vpr 64.75 MiB -1 -1 0.15 20600 1 0.03 -1 -1 34048 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66304 32 32 338 269 1 196 85 17 17 289 -1 unnamed_device 26.1 MiB 0.22 1069 12919 3925 6776 2218 64.8 MiB 0.11 0.00 4.31458 -139.268 -4.31458 4.31458 0.91 0.000512184 0.000460118 0.0378025 0.0344828 28 2604 25 6.65987e+06 266238 500653. 1732.36 1.21 0.109347 0.0966309 21970 115934 -1 2350 23 1620 2389 184014 41533 3.34617 3.34617 -124.198 -3.34617 0 0 612192. 2118.31 0.25 0.07 0.11 -1 -1 0.25 0.0252579 0.0223606 137 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_018.v common 4.16 vpr 64.53 MiB -1 -1 0.15 20288 1 0.03 -1 -1 33696 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66080 32 32 323 276 1 153 93 17 17 289 -1 unnamed_device 26.2 MiB 0.22 695 9543 2025 7276 242 64.5 MiB 0.08 0.00 2.85064 -99.0938 -2.85064 2.85064 0.89 0.000472073 0.000430698 0.0239719 0.0218568 30 1712 20 6.65987e+06 367662 526063. 1820.29 0.92 0.0834493 0.0733254 22546 126617 -1 1441 15 777 1258 62201 16037 2.15051 2.15051 -92.0519 -2.15051 0 0 666494. 2306.21 0.28 0.04 0.12 -1 -1 0.28 0.0177321 0.0158835 110 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_019.v common 3.81 vpr 63.86 MiB -1 -1 0.14 20248 1 0.03 -1 -1 33724 -1 -1 15 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65388 30 32 222 206 1 117 77 17 17 289 -1 unnamed_device 25.3 MiB 0.12 717 11976 4624 5984 1368 63.9 MiB 0.07 0.00 2.25907 -80.296 -2.25907 2.25907 0.88 0.000316513 0.000285981 0.0261614 0.0237841 26 1528 21 6.65987e+06 190170 477104. 1650.88 0.78 0.0692514 0.0607233 21682 110474 -1 1374 17 625 877 65267 15370 1.85605 1.85605 -80.6905 -1.85605 0 0 585099. 2024.56 0.25 0.04 0.10 -1 -1 0.25 0.0137921 0.0122085 81 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_020.v common 4.43 vpr 64.33 MiB -1 -1 0.14 20328 1 0.03 -1 -1 34044 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65876 31 32 291 243 1 171 82 17 17 289 -1 unnamed_device 25.9 MiB 0.36 848 12008 3931 5654 2423 64.3 MiB 0.10 0.00 4.81535 -141.646 -4.81535 4.81535 0.90 0.000431036 0.000392403 0.0322118 0.0294667 32 2106 20 6.65987e+06 240882 554710. 1919.41 0.97 0.0898587 0.0795433 22834 132086 -1 1880 20 1338 1882 162953 37212 3.56017 3.56017 -127.18 -3.56017 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0207858 0.018518 127 30 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_021.v common 4.14 vpr 64.68 MiB -1 -1 0.16 20448 1 0.03 -1 -1 33912 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66236 32 32 342 271 1 179 95 17 17 289 -1 unnamed_device 26.2 MiB 0.05 910 8087 1796 5473 818 64.7 MiB 0.07 0.00 4.13176 -127.852 -4.13176 4.13176 0.88 0.000523894 0.00047631 0.0207476 0.0189572 28 2425 21 6.65987e+06 393018 500653. 1732.36 1.04 0.0904762 0.079705 21970 115934 -1 2103 20 1357 2130 169483 37977 3.47643 3.47643 -125.531 -3.47643 0 0 612192. 2118.31 0.27 0.07 0.12 -1 -1 0.27 0.0241289 0.0214901 135 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_022.v common 4.36 vpr 64.95 MiB -1 -1 0.16 20700 1 0.03 -1 -1 33848 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66508 32 32 372 300 1 204 87 17 17 289 -1 unnamed_device 26.4 MiB 0.24 1181 9303 2469 6067 767 64.9 MiB 0.09 0.00 4.32644 -135.633 -4.32644 4.32644 0.92 0.000554175 0.000505083 0.0281369 0.0256612 30 2631 22 6.65987e+06 291594 526063. 1820.29 1.00 0.0987668 0.0865017 22546 126617 -1 2153 23 1289 2094 130332 28525 3.28937 3.28937 -120.165 -3.28937 0 0 666494. 2306.21 0.28 0.06 0.12 -1 -1 0.28 0.027021 0.0239546 142 59 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_023.v common 6.00 vpr 63.65 MiB -1 -1 0.14 20000 1 0.03 -1 -1 34012 -1 -1 18 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65180 26 32 190 182 1 110 76 17 17 289 -1 unnamed_device 25.2 MiB 0.27 356 10636 3977 4816 1843 63.7 MiB 0.06 0.00 2.4343 -65.7683 -2.4343 2.4343 0.91 0.000287835 0.0002612 0.0220865 0.0201466 30 997 16 6.65987e+06 228204 526063. 1820.29 2.74 0.0951645 0.0826135 22546 126617 -1 741 16 447 580 26686 7955 2.19451 2.19451 -64.9642 -2.19451 0 0 666494. 2306.21 0.29 0.03 0.12 -1 -1 0.29 0.0120818 0.0107465 77 21 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_024.v common 4.25 vpr 64.60 MiB -1 -1 0.14 20176 1 0.03 -1 -1 33736 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66148 32 32 285 227 1 165 85 17 17 289 -1 unnamed_device 26.2 MiB 0.10 978 9571 2391 5607 1573 64.6 MiB 0.08 0.00 4.9364 -125.004 -4.9364 4.9364 0.91 0.000443787 0.000404395 0.024645 0.0225166 32 2187 34 6.65987e+06 266238 554710. 1919.41 1.04 0.09275 0.0814807 22834 132086 -1 1928 19 1077 2024 137083 32628 3.70177 3.70177 -117.838 -3.70177 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0203388 0.0181079 118 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_025.v common 3.90 vpr 63.62 MiB -1 -1 0.13 19824 1 0.03 -1 -1 33664 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65148 32 32 173 169 1 116 78 17 17 289 -1 unnamed_device 25.1 MiB 0.07 681 11200 3514 6177 1509 63.6 MiB 0.06 0.00 2.44727 -77.3331 -2.44727 2.44727 0.92 0.000300717 0.000274266 0.0218899 0.0199763 26 1411 15 6.65987e+06 177492 477104. 1650.88 0.86 0.0586952 0.0518058 21682 110474 -1 1284 15 508 576 57479 12943 1.93211 1.93211 -77.6137 -1.93211 0 0 585099. 2024.56 0.25 0.03 0.11 -1 -1 0.25 0.011732 0.0104938 79 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_026.v common 4.20 vpr 64.54 MiB -1 -1 0.15 20264 1 0.03 -1 -1 33864 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66084 32 32 300 245 1 165 94 17 17 289 -1 unnamed_device 26.1 MiB 0.08 819 10531 2694 7192 645 64.5 MiB 0.09 0.00 4.34174 -119.601 -4.34174 4.34174 0.92 0.000448484 0.000408457 0.0253699 0.0231817 32 2048 22 6.65987e+06 380340 554710. 1919.41 0.96 0.0837697 0.0736803 22834 132086 -1 1821 18 1090 1817 127223 31545 3.42805 3.42805 -113.683 -3.42805 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.0198513 0.0177402 123 21 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_027.v common 4.40 vpr 64.66 MiB -1 -1 0.15 20144 1 0.03 -1 -1 34084 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66208 32 32 297 233 1 177 95 17 17 289 -1 unnamed_device 26.2 MiB 0.10 841 8087 1664 5850 573 64.7 MiB 0.07 0.00 3.58635 -102.903 -3.58635 3.58635 0.89 0.000459214 0.000420228 0.0194523 0.0177408 28 2267 21 6.65987e+06 393018 500653. 1732.36 1.29 0.0875723 0.0774438 21970 115934 -1 2021 19 1195 2217 144338 35484 2.86871 2.86871 -103.513 -2.86871 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0215595 0.0192402 128 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_028.v common 4.23 vpr 64.53 MiB -1 -1 0.15 20544 1 0.03 -1 -1 33904 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66080 32 32 338 277 1 179 90 17 17 289 -1 unnamed_device 25.9 MiB 0.12 1047 15165 4413 8666 2086 64.5 MiB 0.12 0.00 4.3944 -130.237 -4.3944 4.3944 0.89 0.000447519 0.000408357 0.0376057 0.0341624 32 2492 25 6.65987e+06 329628 554710. 1919.41 0.98 0.101016 0.0888005 22834 132086 -1 2137 19 1363 2369 169359 39834 3.31885 3.31885 -121.57 -3.31885 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0226472 0.0201384 125 47 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_029.v common 4.05 vpr 64.19 MiB -1 -1 0.13 20136 1 0.03 -1 -1 33552 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65732 32 32 284 241 1 145 80 17 17 289 -1 unnamed_device 25.7 MiB 0.05 780 6100 1392 4485 223 64.2 MiB 0.06 0.00 2.90053 -100.349 -2.90053 2.90053 0.91 0.000438569 0.000391864 0.0176367 0.0161768 32 1965 19 6.65987e+06 202848 554710. 1919.41 0.94 0.0721118 0.0634464 22834 132086 -1 1697 21 1091 1759 139787 33032 2.67165 2.67165 -101.934 -2.67165 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0205575 0.0181807 101 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_030.v common 4.07 vpr 64.04 MiB -1 -1 0.15 20300 1 0.03 -1 -1 33572 -1 -1 23 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65576 30 32 262 227 1 135 85 17 17 289 -1 unnamed_device 25.6 MiB 0.09 630 9199 2049 6385 765 64.0 MiB 0.06 0.00 2.99867 -92.259 -2.99867 2.99867 0.90 0.000415388 0.000379384 0.022297 0.0204063 32 1813 20 6.65987e+06 291594 554710. 1919.41 0.93 0.0737735 0.0649683 22834 132086 -1 1461 21 1012 1572 113500 26995 2.90791 2.90791 -95.8313 -2.90791 0 0 701300. 2426.64 0.29 0.05 0.13 -1 -1 0.29 0.0191766 0.0169727 97 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_031.v common 4.07 vpr 64.30 MiB -1 -1 0.15 20404 1 0.03 -1 -1 33332 -1 -1 23 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65848 28 32 260 223 1 140 83 17 17 289 -1 unnamed_device 25.8 MiB 0.04 575 14123 3775 8918 1430 64.3 MiB 0.09 0.00 3.31478 -91.535 -3.31478 3.31478 0.89 0.000407507 0.000372494 0.0332638 0.0302417 32 1755 23 6.65987e+06 291594 554710. 1919.41 0.94 0.0851337 0.0749232 22834 132086 -1 1402 21 1087 1837 130276 32833 2.67565 2.67565 -90.39 -2.67565 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0192401 0.0170005 98 27 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_032.v common 4.19 vpr 64.30 MiB -1 -1 0.14 20224 1 0.03 -1 -1 33716 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65848 32 32 253 210 1 154 83 17 17 289 -1 unnamed_device 25.8 MiB 0.10 714 4763 885 3714 164 64.3 MiB 0.04 0.00 3.74323 -109.194 -3.74323 3.74323 0.91 0.000398567 0.000362658 0.0124216 0.0113878 30 1851 22 6.65987e+06 240882 526063. 1820.29 1.05 0.069857 0.0614172 22546 126617 -1 1562 20 1047 1749 98103 23919 2.62751 2.62751 -102.66 -2.62751 0 0 666494. 2306.21 0.29 0.05 0.12 -1 -1 0.29 0.0186633 0.0165819 110 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_033.v common 4.09 vpr 64.52 MiB -1 -1 0.15 20444 1 0.03 -1 -1 33428 -1 -1 27 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66072 31 32 271 231 1 148 90 17 17 289 -1 unnamed_device 25.9 MiB 0.10 740 8130 1715 6151 264 64.5 MiB 0.07 0.00 3.32595 -98.9982 -3.32595 3.32595 0.89 0.000423031 0.000385436 0.0192537 0.0175834 32 1842 22 6.65987e+06 342306 554710. 1919.41 0.94 0.0742053 0.0650159 22834 132086 -1 1570 20 1022 1665 112884 27377 2.72051 2.72051 -99.0807 -2.72051 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.0200849 0.017337 103 26 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_034.v common 4.26 vpr 64.52 MiB -1 -1 0.17 20108 1 0.03 -1 -1 33632 -1 -1 25 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66064 29 32 291 250 1 153 86 17 17 289 -1 unnamed_device 26.2 MiB 0.24 874 10103 2597 6479 1027 64.5 MiB 0.08 0.00 3.27578 -104.365 -3.27578 3.27578 0.90 0.000444799 0.000406176 0.0253026 0.0231333 32 1837 16 6.65987e+06 316950 554710. 1919.41 0.92 0.0772704 0.0680926 22834 132086 -1 1643 19 1041 1556 109533 25783 2.40005 2.40005 -98.5579 -2.40005 0 0 701300. 2426.64 0.30 0.05 0.13 -1 -1 0.30 0.0194287 0.0172528 105 48 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_035.v common 4.29 vpr 64.56 MiB -1 -1 0.15 20432 1 0.03 -1 -1 33700 -1 -1 37 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66108 32 32 367 282 1 201 101 17 17 289 -1 unnamed_device 26.0 MiB 0.27 1205 9971 2413 6766 792 64.6 MiB 0.09 0.00 4.35696 -124.779 -4.35696 4.35696 0.89 0.000574687 0.000529817 0.0259757 0.0237278 30 2470 20 6.65987e+06 469086 526063. 1820.29 0.91 0.0933104 0.0819482 22546 126617 -1 2143 21 987 1859 103605 23151 3.67963 3.67963 -120.47 -3.67963 0 0 666494. 2306.21 0.29 0.06 0.12 -1 -1 0.29 0.0257007 0.0229055 150 26 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_036.v common 4.59 vpr 65.09 MiB -1 -1 0.16 20376 1 0.03 -1 -1 33932 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66652 32 32 391 311 1 192 100 17 17 289 -1 unnamed_device 26.7 MiB 0.27 1009 12860 3291 8398 1171 65.1 MiB 0.12 0.00 3.75432 -126.947 -3.75432 3.75432 0.90 0.000585413 0.000536026 0.0343654 0.0314004 26 2525 36 6.65987e+06 456408 477104. 1650.88 1.19 0.12982 0.115072 21682 110474 -1 2140 19 1553 2391 155367 36688 2.97837 2.97837 -123.475 -2.97837 0 0 585099. 2024.56 0.25 0.07 0.11 -1 -1 0.25 0.0254991 0.0227746 146 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_037.v common 6.62 vpr 63.92 MiB -1 -1 0.16 20248 1 0.03 -1 -1 33764 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65456 31 32 279 237 1 161 80 17 17 289 -1 unnamed_device 25.6 MiB 0.27 731 8852 2206 5531 1115 63.9 MiB 0.08 0.00 4.21752 -119.384 -4.21752 4.21752 0.88 0.000436539 0.000397667 0.023835 0.0217745 28 2061 26 6.65987e+06 215526 500653. 1732.36 3.32 0.140315 0.122065 21970 115934 -1 1827 20 1090 1500 104657 25299 3.14271 3.14271 -113.213 -3.14271 0 0 612192. 2118.31 0.27 0.05 0.11 -1 -1 0.27 0.0198102 0.0175781 109 30 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_038.v common 4.46 vpr 64.87 MiB -1 -1 0.16 20636 1 0.03 -1 -1 33864 -1 -1 24 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66428 31 32 370 297 1 186 87 17 17 289 -1 unnamed_device 26.3 MiB 0.26 838 9687 2447 6341 899 64.9 MiB 0.09 0.00 4.30117 -127.913 -4.30117 4.30117 0.89 0.000560435 0.00051195 0.0276231 0.0252748 28 2472 25 6.65987e+06 304272 500653. 1732.36 1.12 0.107815 0.0953649 21970 115934 -1 2020 21 1371 2445 169274 40806 3.06817 3.06817 -116.785 -3.06817 0 0 612192. 2118.31 0.27 0.07 0.11 -1 -1 0.27 0.0261627 0.0232785 137 57 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_039.v common 4.62 vpr 64.66 MiB -1 -1 0.16 20348 1 0.03 -1 -1 33936 -1 -1 27 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66208 31 32 377 302 1 233 90 17 17 289 -1 unnamed_device 26.7 MiB 0.36 1313 13758 3781 7541 2436 64.7 MiB 0.13 0.00 5.77198 -171.36 -5.77198 5.77198 0.89 0.000549411 0.000502245 0.0401228 0.0366608 32 3132 21 6.65987e+06 342306 554710. 1919.41 1.04 0.113516 0.100579 22834 132086 -1 2551 22 2197 3203 211784 51203 4.70894 4.70894 -163.62 -4.70894 0 0 701300. 2426.64 0.30 0.08 0.13 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66236 31 32 352 285 1 184 92 17 17 289 -1 unnamed_device 26.1 MiB 0.22 864 6095 1129 4612 354 64.7 MiB 0.07 0.00 4.47092 -130.094 -4.47092 4.47092 0.88 0.00050271 0.000458357 0.0181339 0.0166014 28 2546 32 6.65987e+06 367662 500653. 1732.36 1.36 0.0989388 0.0869937 21970 115934 -1 2020 21 1236 1940 117144 30484 3.23625 3.23625 -120.221 -3.23625 0 0 612192. 2118.31 0.27 0.06 0.12 -1 -1 0.27 0.0249655 0.0222158 133 51 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_042.v common 6.21 vpr 64.60 MiB -1 -1 0.15 20256 1 0.03 -1 -1 33956 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66152 32 32 291 242 1 179 86 17 17 289 -1 unnamed_device 26.0 MiB 0.17 918 12371 3407 6390 2574 64.6 MiB 0.09 0.00 4.0455 -110.07 -4.0455 4.0455 0.89 0.000402307 0.000362768 0.0303272 0.0275857 28 2605 20 6.65987e+06 278916 500653. 1732.36 3.04 0.153001 0.13279 21970 115934 -1 2180 19 1317 1949 158383 36532 3.51625 3.51625 -115.535 -3.51625 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0200713 0.0178565 118 24 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_043.v common 5.46 vpr 64.89 MiB -1 -1 0.16 20840 1 0.03 -1 -1 34000 -1 -1 38 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66448 32 32 457 356 1 223 102 17 17 289 -1 unnamed_device 26.8 MiB 0.29 1184 10336 2301 7496 539 64.9 MiB 0.11 0.00 5.18869 -164.242 -5.18869 5.18869 0.89 0.000645589 0.000590108 0.0305839 0.027916 26 3457 39 6.65987e+06 481764 477104. 1650.88 1.95 0.1363 0.119956 21682 110474 -1 2828 25 2036 3190 320818 89509 4.52437 4.52437 -157.469 -4.52437 0 0 585099. 2024.56 0.26 0.12 0.11 -1 -1 0.26 0.0359786 0.0320082 172 84 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_044.v common 4.17 vpr 64.48 MiB -1 -1 0.15 20436 1 0.03 -1 -1 33688 -1 -1 21 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66024 31 32 261 225 1 142 84 17 17 289 -1 unnamed_device 26.0 MiB 0.12 660 11064 4480 5786 798 64.5 MiB 0.07 0.00 3.61218 -99.209 -3.61218 3.61218 0.90 0.000405597 0.000368173 0.0268362 0.0244644 32 1891 29 6.65987e+06 266238 554710. 1919.41 0.98 0.0847252 0.0743362 22834 132086 -1 1581 22 1137 1828 142459 35231 2.90705 2.90705 -99.775 -2.90705 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0200184 0.0176742 101 24 -1 -1 -1 -1 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66244 32 32 349 284 1 183 97 17 17 289 -1 unnamed_device 26.1 MiB 0.15 975 10087 2133 7508 446 64.7 MiB 0.10 0.00 3.91407 -118.639 -3.91407 3.91407 0.89 0.000500736 0.000457444 0.0258652 0.0236547 28 2750 43 6.65987e+06 418374 500653. 1732.36 1.43 0.119147 0.105115 21970 115934 -1 2171 17 1119 1988 146167 33613 3.02611 3.02611 -112.426 -3.02611 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0219896 0.0196816 131 50 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_047.v common 4.45 vpr 64.52 MiB -1 -1 0.14 20080 1 0.03 -1 -1 33760 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66072 32 32 291 230 1 168 88 17 17 289 -1 unnamed_device 26.1 MiB 0.10 889 13153 5130 6680 1343 64.5 MiB 0.11 0.00 4.00941 -121.212 -4.00941 4.00941 0.88 0.000443302 0.000403657 0.0331071 0.0302394 32 2460 38 6.65987e+06 304272 554710. 1919.41 1.20 0.108577 0.0960193 22834 132086 -1 1936 29 1457 2672 381718 164248 3.53945 3.53945 -118.826 -3.53945 0 0 701300. 2426.64 0.29 0.14 0.13 -1 -1 0.29 0.0295228 0.0261526 123 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_048.v common 4.62 vpr 64.65 MiB -1 -1 0.16 20712 1 0.03 -1 -1 33968 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66204 32 32 353 287 1 198 86 17 17 289 -1 unnamed_device 26.4 MiB 0.37 1135 8213 1899 5522 792 64.7 MiB 0.08 0.00 4.53182 -135.539 -4.53182 4.53182 0.91 0.000533613 0.000487489 0.0253982 0.0232906 26 2769 24 6.65987e+06 278916 477104. 1650.88 1.19 0.103169 0.0914738 21682 110474 -1 2364 24 1365 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4.63 vpr 64.78 MiB -1 -1 0.16 20756 1 0.03 -1 -1 33672 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 32 32 382 305 1 192 100 17 17 289 -1 unnamed_device 26.4 MiB 0.36 1080 10772 2746 7404 622 64.8 MiB 0.11 0.00 4.49669 -137.938 -4.49669 4.49669 0.89 0.000553612 0.000507191 0.028252 0.0257699 26 2751 23 6.65987e+06 456408 477104. 1650.88 1.18 0.103415 0.090858 21682 110474 -1 2424 22 1401 2036 158685 36651 3.54111 3.54111 -130.601 -3.54111 0 0 585099. 2024.56 0.26 0.07 0.10 -1 -1 0.26 0.0274359 0.024338 144 59 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_051.v common 4.17 vpr 64.63 MiB -1 -1 0.15 20260 1 0.03 -1 -1 33400 -1 -1 29 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66184 32 32 306 248 1 166 93 17 17 289 -1 unnamed_device 26.2 MiB 0.10 888 10593 2829 7083 681 64.6 MiB 0.09 0.00 3.98836 -118.206 -3.98836 3.98836 0.92 0.000483479 0.000440596 0.0260979 0.0237732 32 2021 22 6.65987e+06 367662 554710. 1919.41 0.95 0.0852225 0.0749632 22834 132086 -1 1760 21 1196 1953 123809 29858 3.27785 3.27785 -112.011 -3.27785 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.022454 0.019875 122 21 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_052.v common 4.19 vpr 64.59 MiB -1 -1 0.14 20224 1 0.03 -1 -1 33764 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66136 32 32 319 257 1 198 87 17 17 289 -1 unnamed_device 26.1 MiB 0.12 1026 6999 1560 5055 384 64.6 MiB 0.07 0.00 4.76946 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66376 32 32 341 285 1 187 84 17 17 289 -1 unnamed_device 26.3 MiB 0.14 904 12345 3635 7531 1179 64.8 MiB 0.11 0.00 3.9733 -136.305 -3.9733 3.9733 0.89 0.000490244 0.000446661 0.0352752 0.0321901 28 2501 21 6.65987e+06 253560 500653. 1732.36 2.96 0.173278 0.151262 21970 115934 -1 2099 21 1493 2105 171768 38779 3.41097 3.41097 -132.539 -3.41097 0 0 612192. 2118.31 0.25 0.07 0.11 -1 -1 0.25 0.0219487 0.019375 125 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_057.v common 4.49 vpr 64.76 MiB -1 -1 0.16 20352 1 0.03 -1 -1 33844 -1 -1 28 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66312 32 32 387 293 1 234 92 17 17 289 -1 unnamed_device 26.7 MiB 0.18 1234 10649 2580 7238 831 64.8 MiB 0.12 0.00 5.507 -161.149 -5.507 5.507 0.89 0.000599102 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0.27 0.0224426 0.019927 133 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_059.v common 5.68 vpr 64.26 MiB -1 -1 0.14 20296 1 0.03 -1 -1 33636 -1 -1 26 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65800 30 32 278 235 1 148 88 17 17 289 -1 unnamed_device 25.7 MiB 0.05 691 10228 2870 6479 879 64.3 MiB 0.09 0.00 3.33678 -100.638 -3.33678 3.33678 0.90 0.000432615 0.000393507 0.0246924 0.0226163 26 1949 23 6.65987e+06 329628 477104. 1650.88 2.60 0.142358 0.124129 21682 110474 -1 1713 22 1236 2017 169711 40616 2.71771 2.71771 -101.15 -2.71771 0 0 585099. 2024.56 0.25 0.07 0.11 -1 -1 0.25 0.0212924 0.0187952 104 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_060.v common 4.95 vpr 64.87 MiB -1 -1 0.16 20876 1 0.03 -1 -1 34008 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66424 32 32 431 332 1 235 89 17 17 289 -1 unnamed_device 26.7 MiB 0.36 1262 6623 1301 4680 642 64.9 MiB 0.08 0.00 6.41663 -184.149 -6.41663 6.41663 0.91 0.000567608 0.000518878 0.023864 0.0218601 30 3204 25 6.65987e+06 316950 526063. 1820.29 1.43 0.112521 0.0993179 22546 126617 -1 2549 21 1554 2249 144381 31759 4.98034 4.98034 -166.106 -4.98034 0 0 666494. 2306.21 0.27 0.07 0.12 -1 -1 0.27 0.0289696 0.0258286 168 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_061.v common 4.40 vpr 64.38 MiB -1 -1 0.16 20456 1 0.03 -1 -1 33384 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65924 32 32 336 268 1 174 96 17 17 289 -1 unnamed_device 25.9 MiB 0.28 921 16959 4303 11211 1445 64.4 MiB 0.14 0.00 4.44175 -133.512 -4.44175 4.44175 0.90 0.000495156 0.000452781 0.0405047 0.0369281 26 2186 24 6.65987e+06 405696 477104. 1650.88 1.02 0.111172 0.098347 21682 110474 -1 1832 22 1113 1842 133668 30945 3.44211 3.44211 -120.204 -3.44211 0 0 585099. 2024.56 0.26 0.06 0.11 -1 -1 0.26 0.0247484 0.0219269 130 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_062.v common 3.97 vpr 64.01 MiB -1 -1 0.14 20140 1 0.03 -1 -1 33508 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65544 32 32 231 199 1 140 87 17 17 289 -1 unnamed_device 25.6 MiB 0.04 793 12375 3802 6579 1994 64.0 MiB 0.09 0.00 3.21869 -96.935 -3.21869 3.21869 0.90 0.000371409 0.000340189 0.0268186 0.0245325 30 1766 15 6.65987e+06 291594 526063. 1820.29 0.93 0.0735292 0.0650973 22546 126617 -1 1544 16 659 1107 76228 16685 2.40211 2.40211 -91.256 -2.40211 0 0 666494. 2306.21 0.28 0.04 0.12 -1 -1 0.28 0.0152761 0.013632 100 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_063.v common 6.30 vpr 64.64 MiB -1 -1 0.16 20564 1 0.03 -1 -1 33904 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66192 32 32 349 273 1 191 98 17 17 289 -1 unnamed_device 26.4 MiB 0.13 997 10448 2232 7093 1123 64.6 MiB 0.08 0.00 5.44618 -130.736 -5.44618 5.44618 0.87 0.000486278 0.000447008 0.0245751 0.0223083 30 2483 23 6.65987e+06 431052 526063. 1820.29 3.14 0.174467 0.151459 22546 126617 -1 1969 22 1092 2125 114624 28201 4.42602 4.42602 -126.911 -4.42602 0 0 666494. 2306.21 0.27 0.06 0.13 -1 -1 0.27 0.0235252 0.0208675 139 26 -1 -1 -1 -1 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66112 30 32 278 235 1 147 95 17 17 289 -1 unnamed_device 26.0 MiB 0.15 870 16295 4607 9720 1968 64.6 MiB 0.11 0.00 3.88231 -108.178 -3.88231 3.88231 0.89 0.000425114 0.000388714 0.0336782 0.0307451 26 1911 26 6.65987e+06 418374 477104. 1650.88 1.10 0.0972791 0.086103 21682 110474 -1 1673 16 662 1152 76214 17335 2.61725 2.61725 -99.6073 -2.61725 0 0 585099. 2024.56 0.25 0.04 0.11 -1 -1 0.25 0.0169821 0.0151888 105 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_066.v common 6.49 vpr 65.14 MiB -1 -1 0.17 20556 1 0.03 -1 -1 33604 -1 -1 24 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66704 29 32 355 287 1 198 85 17 17 289 -1 unnamed_device 26.6 MiB 0.27 1186 15151 5050 8219 1882 65.1 MiB 0.14 0.00 4.37661 -129.138 -4.37661 4.37661 0.87 0.000513222 0.000466665 0.0438425 0.0400178 28 2757 20 6.65987e+06 304272 500653. 1732.36 3.12 0.180295 0.157349 21970 115934 -1 2326 20 1558 2342 169332 38302 3.29317 3.29317 -116.352 -3.29317 0 0 612192. 2118.31 0.26 0.07 0.11 -1 -1 0.26 0.0241406 0.0214446 138 56 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_067.v common 4.22 vpr 64.90 MiB -1 -1 0.15 20640 1 0.03 -1 -1 33712 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66456 32 32 358 289 1 175 88 17 17 289 -1 unnamed_device 26.4 MiB 0.17 884 5548 1103 3958 487 64.9 MiB 0.06 0.00 4.37207 -129.772 -4.37207 4.37207 0.90 0.000521368 0.000475022 0.0174358 0.0159769 32 2141 21 6.65987e+06 304272 554710. 1919.41 0.94 0.0836828 0.0731978 22834 132086 -1 1854 20 1282 1951 132992 31888 3.70757 3.70757 -130.332 -3.70757 0 0 701300. 2426.64 0.31 0.06 0.13 -1 -1 0.31 0.0240226 0.021298 130 51 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_068.v common 4.35 vpr 64.73 MiB -1 -1 0.16 20516 1 0.03 -1 -1 33860 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66284 32 32 353 285 1 181 91 17 17 289 -1 unnamed_device 26.2 MiB 0.21 1040 15391 4199 8930 2262 64.7 MiB 0.14 0.00 4.54089 -136.701 -4.54089 4.54089 0.90 0.000518634 0.000473431 0.0419063 0.0382912 32 2316 24 6.65987e+06 342306 554710. 1919.41 0.98 0.111378 0.0986247 22834 132086 -1 2093 18 1106 1900 131883 30619 3.67131 3.67131 -128.131 -3.67131 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.0226257 0.0201913 132 48 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_069.v common 4.19 vpr 64.54 MiB -1 -1 0.12 20072 1 0.03 -1 -1 33792 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66092 32 32 276 237 1 159 80 17 17 289 -1 unnamed_device 26.2 MiB 0.27 821 7476 1923 4958 595 64.5 MiB 0.07 0.00 4.66411 -131.468 -4.66411 4.66411 0.90 0.000444719 0.000407156 0.0206189 0.0189039 30 1841 19 6.65987e+06 202848 526063. 1820.29 0.88 0.0716597 0.0629998 22546 126617 -1 1650 18 685 936 56545 13237 3.08625 3.08625 -110.111 -3.08625 0 0 666494. 2306.21 0.29 0.04 0.12 -1 -1 0.29 0.018296 0.0162905 103 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_070.v common 4.19 vpr 64.28 MiB -1 -1 0.16 20636 1 0.03 -1 -1 33732 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65824 31 32 319 272 1 168 82 17 17 289 -1 unnamed_device 25.9 MiB 0.22 768 7736 1918 4969 849 64.3 MiB 0.08 0.00 3.69598 -115.422 -3.69598 3.69598 0.90 0.000456646 0.00041652 0.0226453 0.0207308 30 1988 17 6.65987e+06 240882 526063. 1820.29 0.92 0.0793065 0.0697842 22546 126617 -1 1656 20 991 1482 85033 20146 2.94771 2.94771 -106.549 -2.94771 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.021421 0.0190272 111 60 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_071.v common 4.67 vpr 64.10 MiB -1 -1 0.16 20324 1 0.03 -1 -1 33720 -1 -1 33 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65640 30 32 329 273 1 166 95 17 17 289 -1 unnamed_device 25.7 MiB 0.22 822 9815 2052 6788 975 64.1 MiB 0.08 0.00 3.34001 -95.394 -3.34001 3.34001 0.88 0.000462003 0.00042156 0.0242751 0.0221528 28 2190 24 6.65987e+06 418374 500653. 1732.36 1.40 0.0925367 0.0814287 21970 115934 -1 1852 15 1072 1834 124485 30633 2.76159 2.76159 -95.2544 -2.76159 0 0 612192. 2118.31 0.28 0.05 0.12 -1 -1 0.28 0.0181479 0.0161788 123 52 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_072.v common 4.69 vpr 64.36 MiB -1 -1 0.16 20512 1 0.03 -1 -1 34080 -1 -1 35 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65900 28 32 277 229 1 155 95 17 17 289 -1 unnamed_device 26.0 MiB 0.13 864 12623 3003 8699 921 64.4 MiB 0.08 0.00 4.17801 -101.983 -4.17801 4.17801 0.90 0.000385859 0.000346511 0.0260256 0.0237816 26 2268 22 6.65987e+06 443730 477104. 1650.88 1.54 0.0886628 0.0782281 21682 110474 -1 1937 20 1051 2141 185449 39228 3.47031 3.47031 -104.035 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-1 -1 33692 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66176 32 32 335 282 1 184 84 17 17 289 -1 unnamed_device 26.2 MiB 0.17 854 4110 634 3368 108 64.6 MiB 0.04 0.00 3.78604 -125.597 -3.78604 3.78604 0.84 0.00042341 0.000387235 0.0115685 0.0106187 26 2393 26 6.65987e+06 253560 477104. 1650.88 1.33 0.0774239 0.0674809 21682 110474 -1 1995 20 1275 1873 148398 35276 3.03351 3.03351 -122.493 -3.03351 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0222654 0.019744 120 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_075.v common 4.15 vpr 64.33 MiB -1 -1 0.15 20264 1 0.03 -1 -1 33776 -1 -1 32 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65876 31 32 293 230 1 175 95 17 17 289 -1 unnamed_device 25.8 MiB 0.09 847 5711 1070 3973 668 64.3 MiB 0.05 0.00 4.49904 -123.598 -4.49904 4.49904 0.88 0.000445687 0.000405707 0.0140767 0.0128703 30 2337 22 6.65987e+06 405696 526063. 1820.29 1.06 0.0762809 0.0670238 22546 126617 -1 1888 24 1168 2212 131068 32744 3.69257 3.69257 -118.678 -3.69257 0 0 666494. 2306.21 0.28 0.06 0.12 -1 -1 0.28 0.0234009 0.0206924 127 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_076.v common 4.47 vpr 65.13 MiB -1 -1 0.16 20484 1 0.03 -1 -1 33740 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66692 32 32 350 275 1 209 86 17 17 289 -1 unnamed_device 26.6 MiB 0.28 1096 14639 4278 7910 2451 65.1 MiB 0.14 0.00 5.13815 -159.632 -5.13815 5.13815 0.89 0.000514822 0.000470594 0.0426908 0.0389925 32 3087 25 6.65987e+06 278916 554710. 1919.41 1.03 0.11727 0.10407 22834 132086 -1 2460 21 1795 2659 205239 47320 4.22151 4.22151 -146.209 -4.22151 0 0 701300. 2426.64 0.30 0.08 0.13 -1 -1 0.30 0.0257404 0.0229204 144 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_077.v common 4.60 vpr 64.86 MiB -1 -1 0.16 20428 1 0.03 -1 -1 33880 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66420 32 32 385 308 1 185 96 17 17 289 -1 unnamed_device 26.6 MiB 0.33 1097 14331 4044 8499 1788 64.9 MiB 0.13 0.00 4.9662 -142.984 -4.9662 4.9662 0.90 0.000553247 0.000497872 0.0388271 0.035368 28 2572 22 6.65987e+06 405696 500653. 1732.36 1.14 0.116643 0.103298 21970 115934 -1 2172 17 1073 1895 133148 29668 3.78603 3.78603 -131.107 -3.78603 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0228357 0.0204145 142 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_078.v common 6.48 vpr 65.05 MiB -1 -1 0.15 20452 1 0.03 -1 -1 34040 -1 -1 37 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66612 32 32 387 309 1 190 101 17 17 289 -1 unnamed_device 26.7 MiB 0.26 1087 19136 6054 10420 2662 65.1 MiB 0.15 0.00 4.23232 -136.463 -4.23232 4.23232 0.87 0.000492589 0.00044499 0.0445248 0.0403682 28 2899 28 6.65987e+06 469086 500653. 1732.36 3.16 0.198867 0.173296 21970 115934 -1 2417 25 1675 2949 230320 50849 3.47891 3.47891 -134.175 -3.47891 0 0 612192. 2118.31 0.26 0.08 0.10 -1 -1 0.26 0.0283216 0.0249 140 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_079.v common 4.30 vpr 64.31 MiB -1 -1 0.16 20340 1 0.03 -1 -1 33952 -1 -1 19 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65856 30 32 272 232 1 147 81 17 17 289 -1 unnamed_device 25.8 MiB 0.23 753 14081 4985 6810 2286 64.3 MiB 0.10 0.00 3.61906 -107.365 -3.61906 3.61906 0.88 0.000368692 0.000336239 0.0337314 0.0307378 32 1967 21 6.65987e+06 240882 554710. 1919.41 0.97 0.0874367 0.0772454 22834 132086 -1 1733 22 1136 1898 162835 35973 2.77265 2.77265 -98.3726 -2.77265 0 0 701300. 2426.64 0.31 0.07 0.14 -1 -1 0.31 0.021309 0.0188706 105 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_080.v common 4.41 vpr 65.11 MiB -1 -1 0.16 20540 1 0.03 -1 -1 33632 -1 -1 21 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66672 30 32 375 299 1 187 83 17 17 289 -1 unnamed_device 26.4 MiB 0.25 993 13583 3880 7603 2100 65.1 MiB 0.12 0.00 4.75724 -141.541 -4.75724 4.75724 0.92 0.00054277 0.000495666 0.0435105 0.039776 32 2250 20 6.65987e+06 266238 554710. 1919.41 0.99 0.111706 0.0989843 22834 132086 -1 2011 20 1613 2556 171997 40019 3.57237 3.57237 -133.43 -3.57237 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0244834 0.0216877 137 58 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_081.v common 4.55 vpr 64.64 MiB -1 -1 0.16 20520 1 0.03 -1 -1 33756 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66188 32 32 340 270 1 200 88 17 17 289 -1 unnamed_device 26.1 MiB 0.30 984 6328 1212 4906 210 64.6 MiB 0.06 0.00 5.08874 -146.537 -5.08874 5.08874 0.88 0.000513575 0.000467543 0.0181569 0.0165713 30 2772 46 6.65987e+06 304272 526063. 1820.29 1.19 0.106453 0.0931788 22546 126617 -1 2211 20 1228 1907 136054 30889 3.73165 3.73165 -133.157 -3.73165 0 0 666494. 2306.21 0.29 0.06 0.12 -1 -1 0.29 0.0234701 0.020982 138 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_082.v common 4.56 vpr 64.82 MiB -1 -1 0.16 20436 1 0.03 -1 -1 33668 -1 -1 28 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66372 31 32 340 275 1 195 91 17 17 289 -1 unnamed_device 26.5 MiB 0.38 1115 15391 3929 9868 1594 64.8 MiB 0.13 0.00 5.2191 -153.261 -5.2191 5.2191 0.90 0.000508089 0.00046398 0.0407386 0.0372349 32 2703 22 6.65987e+06 354984 554710. 1919.41 0.99 0.10849 0.0960822 22834 132086 -1 2398 21 1413 2244 171506 39576 4.49237 4.49237 -149.522 -4.49237 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0248821 0.0221898 146 43 -1 -1 -1 -1 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66296 32 32 365 294 1 185 84 17 17 289 -1 unnamed_device 26.3 MiB 0.20 1042 15822 5317 8613 1892 64.7 MiB 0.15 0.00 4.76549 -137.992 -4.76549 4.76549 0.89 0.000531596 0.000483537 0.0488004 0.0444594 30 2491 20 6.65987e+06 253560 526063. 1820.29 1.01 0.113819 0.100551 22546 126617 -1 2119 19 1152 2004 130735 29222 3.60711 3.60711 -129.356 -3.60711 0 0 666494. 2306.21 0.26 0.05 0.11 -1 -1 0.26 0.0208829 0.0186015 133 54 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_085.v common 5.02 vpr 64.74 MiB -1 -1 0.16 20464 1 0.03 -1 -1 33652 -1 -1 29 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66296 29 32 378 310 1 177 90 17 17 289 -1 unnamed_device 26.0 MiB 0.39 913 8934 2134 6274 526 64.7 MiB 0.08 0.00 4.51892 -126.294 -4.51892 4.51892 0.87 0.000524397 0.000476082 0.0260688 0.0237759 26 2602 20 6.65987e+06 367662 477104. 1650.88 1.58 0.101128 0.0892161 21682 110474 -1 2145 20 1380 2178 169956 39900 3.37797 3.37797 -123.439 -3.37797 0 0 585099. 2024.56 0.25 0.07 0.11 -1 -1 0.25 0.0251311 0.0223296 131 79 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_086.v common 3.93 vpr 64.09 MiB -1 -1 0.13 20248 1 0.03 -1 -1 34104 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65624 32 32 243 205 1 139 79 17 17 289 -1 unnamed_device 25.7 MiB 0.09 724 12416 3530 7132 1754 64.1 MiB 0.08 0.00 3.74649 -112.139 -3.74649 3.74649 0.88 0.000386134 0.00035357 0.0296708 0.0269823 32 1726 22 6.65987e+06 190170 554710. 1919.41 0.89 0.0771166 0.0679691 22834 132086 -1 1519 18 897 1350 107597 25022 2.71465 2.71465 -102.628 -2.71465 0 0 701300. 2426.64 0.29 0.04 0.12 -1 -1 0.29 0.0160529 0.0142893 96 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_087.v common 4.45 vpr 64.70 MiB -1 -1 0.17 20416 1 0.03 -1 -1 33420 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66256 32 32 373 302 1 176 94 17 17 289 -1 unnamed_device 26.2 MiB 0.28 989 15430 4612 8155 2663 64.7 MiB 0.13 0.00 4.41154 -133.367 -4.41154 4.41154 0.88 0.00052096 0.000473609 0.0412009 0.0375574 32 2429 22 6.65987e+06 380340 554710. 1919.41 1.01 0.109069 0.0964279 22834 132086 -1 2063 21 1487 2519 184259 42773 3.84791 3.84791 -129.508 -3.84791 0 0 701300. 2426.64 0.31 0.07 0.13 -1 -1 0.31 0.0264848 0.0235727 130 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_088.v common 4.49 vpr 64.86 MiB -1 -1 0.16 20464 1 0.03 -1 -1 33904 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66412 32 32 397 314 1 196 84 17 17 289 -1 unnamed_device 26.5 MiB 0.29 902 8685 2007 6399 279 64.9 MiB 0.10 0.00 4.76517 -143.598 -4.76517 4.76517 0.89 0.000571076 0.000521455 0.0300493 0.0274757 32 2497 24 6.65987e+06 253560 554710. 1919.41 1.04 0.107497 0.0949249 22834 132086 -1 2183 21 1883 2973 209659 50687 3.93397 3.93397 -140.255 -3.93397 0 0 701300. 2426.64 0.30 0.08 0.13 -1 -1 0.30 0.0284611 0.0253925 147 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_089.v common 4.86 vpr 64.17 MiB -1 -1 0.14 20244 1 0.03 -1 -1 33928 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65712 32 32 269 231 1 170 83 17 17 289 -1 unnamed_device 25.8 MiB 0.22 946 12143 3182 7420 1541 64.2 MiB 0.09 0.00 4.15372 -120.605 -4.15372 4.15372 0.90 0.000427065 0.000390109 0.0306759 0.0280289 26 2395 43 6.65987e+06 240882 477104. 1650.88 1.60 0.110401 0.0976876 21682 110474 -1 2067 28 1364 1766 225074 80275 3.06105 3.06105 -114.874 -3.06105 0 0 585099. 2024.56 0.25 0.09 0.11 -1 -1 0.25 0.0248296 0.0219021 111 26 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_090.v common 4.03 vpr 64.37 MiB -1 -1 0.13 20316 1 0.03 -1 -1 33792 -1 -1 21 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65916 31 32 245 205 1 150 84 17 17 289 -1 unnamed_device 25.8 MiB 0.10 732 8685 2467 5468 750 64.4 MiB 0.07 0.00 3.75938 -108.757 -3.75938 3.75938 0.89 0.000400444 0.000366713 0.0209799 0.0191907 30 1655 19 6.65987e+06 266238 526063. 1820.29 0.91 0.0695418 0.0611845 22546 126617 -1 1544 21 996 1668 101042 23801 2.51311 2.51311 -96.4545 -2.51311 0 0 666494. 2306.21 0.29 0.05 0.12 -1 -1 0.29 0.0190289 0.0168562 106 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_091.v common 4.56 vpr 64.89 MiB -1 -1 0.17 20848 1 0.03 -1 -1 33792 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66448 32 32 348 274 1 211 89 17 17 289 -1 unnamed_device 26.3 MiB 0.15 1015 15533 4784 8284 2465 64.9 MiB 0.14 0.00 4.92983 -152.714 -4.92983 4.92983 0.89 0.000494647 0.000449561 0.0433768 0.0396963 28 3244 30 6.65987e+06 316950 500653. 1732.36 1.29 0.121748 0.107739 21970 115934 -1 2307 22 1749 2275 179013 42202 4.61143 4.61143 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0.03 -1 -1 33752 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66456 32 32 349 260 1 204 100 17 17 289 -1 unnamed_device 26.5 MiB 0.06 1117 11004 2566 7834 604 64.9 MiB 0.11 0.00 5.28255 -141.369 -5.28255 5.28255 0.90 0.000549976 0.000503935 0.0282797 0.025824 26 3370 49 6.65987e+06 456408 477104. 1650.88 5.96 0.21369 0.187565 21682 110474 -1 2670 20 1658 2923 254838 56451 4.40303 4.40303 -143.411 -4.40303 0 0 585099. 2024.56 0.25 0.09 0.11 -1 -1 0.25 0.0263358 0.0235489 153 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_094.v common 4.13 vpr 64.22 MiB -1 -1 0.16 20192 1 0.03 -1 -1 33884 -1 -1 31 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65764 30 32 316 264 1 162 93 17 17 289 -1 unnamed_device 25.8 MiB 0.23 750 7863 1674 5072 1117 64.2 MiB 0.07 0.00 3.28175 -94.6726 -3.28175 3.28175 0.88 0.000444798 0.00040478 0.0190662 0.0173869 30 1756 22 6.65987e+06 393018 526063. 1820.29 0.90 0.0762009 0.0665605 22546 126617 -1 1506 19 933 1598 77376 19176 2.62125 2.62125 -90.575 -2.62125 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0202408 0.0179056 120 47 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_095.v common 3.94 vpr 64.42 MiB -1 -1 0.14 20276 1 0.03 -1 -1 34060 -1 -1 21 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65964 27 32 255 219 1 132 80 17 17 289 -1 unnamed_device 26.0 MiB 0.05 638 11948 3525 6694 1729 64.4 MiB 0.08 0.00 3.4543 -94.1654 -3.4543 3.4543 0.88 0.000388733 0.000355256 0.0293959 0.0268616 28 1599 22 6.65987e+06 266238 500653. 1732.36 0.89 0.0781612 0.0688563 21970 115934 -1 1335 20 856 1254 87240 20842 2.77577 2.77577 -90.3712 -2.77577 0 0 612192. 2118.31 0.27 0.05 0.12 -1 -1 0.27 0.0180868 0.0160349 97 26 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_096.v common 6.83 vpr 64.87 MiB -1 -1 0.17 20816 1 0.03 -1 -1 33964 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66424 32 32 421 327 1 232 90 17 17 289 -1 unnamed_device 26.8 MiB 0.16 1319 10542 2869 6884 789 64.9 MiB 0.11 0.00 4.22384 -138.261 -4.22384 4.22384 0.87 0.000601108 0.000547526 0.0340018 0.0310114 28 3615 24 6.65987e+06 329628 500653. 1732.36 3.52 0.204288 0.178252 21970 115934 -1 3006 22 1865 2973 215904 49606 3.64757 3.64757 -137.164 -3.64757 0 0 612192. 2118.31 0.26 0.08 0.12 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66244 32 32 331 280 1 175 82 17 17 289 -1 unnamed_device 26.2 MiB 1.03 910 12186 3808 6300 2078 64.7 MiB 0.10 0.00 4.17204 -128.915 -4.17204 4.17204 0.89 0.00048288 0.000440088 0.0355983 0.0325166 30 2037 22 6.65987e+06 228204 526063. 1820.29 0.95 0.0977441 0.0862216 22546 126617 -1 1758 18 928 1406 83079 19030 3.13577 3.13577 -122.213 -3.13577 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0207301 0.0184965 126 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_099.v common 4.15 vpr 64.73 MiB -1 -1 0.15 20356 1 0.03 -1 -1 33948 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66280 32 32 326 263 1 176 94 17 17 289 -1 unnamed_device 26.2 MiB 0.11 997 13726 4134 8495 1097 64.7 MiB 0.12 0.00 4.87399 -127.071 -4.87399 4.87399 0.89 0.000481363 0.000436762 0.0339313 0.0308901 30 2100 21 6.65987e+06 380340 526063. 1820.29 0.93 0.0969858 0.0855672 22546 126617 -1 1834 17 818 1333 78781 18665 3.24665 3.24665 -110.551 -3.24665 0 0 666494. 2306.21 0.28 0.05 0.12 -1 -1 0.28 0.0203988 0.0183144 126 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_100.v common 6.39 vpr 64.97 MiB -1 -1 0.16 20756 1 0.03 -1 -1 33780 -1 -1 33 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66528 31 32 373 294 1 196 96 17 17 289 -1 unnamed_device 26.6 MiB 0.23 1094 9732 2284 6801 647 65.0 MiB 0.10 0.00 4.71929 -136.272 -4.71929 4.71929 0.90 0.000555884 0.000506794 0.0268662 0.0246028 26 2676 39 6.65987e+06 418374 477104. 1650.88 3.06 0.199508 0.175174 21682 110474 -1 2326 19 1471 2455 178546 41726 3.76783 3.76783 -132.157 -3.76783 0 0 585099. 2024.56 0.26 0.07 0.11 -1 -1 0.26 0.0253538 0.0225867 144 46 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_101.v common 4.25 vpr 64.48 MiB -1 -1 0.15 20540 1 0.03 -1 -1 34124 -1 -1 31 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66032 30 32 325 268 1 171 93 17 17 289 -1 unnamed_device 26.1 MiB 0.15 968 12693 2914 8596 1183 64.5 MiB 0.11 0.00 3.66981 -110.801 -3.66981 3.66981 0.89 0.000481595 0.000438406 0.0305688 0.0278662 32 2261 19 6.65987e+06 393018 554710. 1919.41 0.96 0.0884951 0.0780084 22834 132086 -1 1967 20 1164 2022 141932 31880 2.86191 2.86191 -102.093 -2.86191 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0226223 0.0201233 124 46 -1 -1 -1 -1 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on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66512 32 32 386 307 1 195 98 17 17 289 -1 unnamed_device 26.6 MiB 0.38 1013 10448 2457 7443 548 65.0 MiB 0.10 0.00 4.61703 -140.056 -4.61703 4.61703 0.88 0.000538439 0.000487792 0.0265367 0.0240942 26 2952 23 6.65987e+06 431052 477104. 1650.88 1.55 0.10722 0.0946902 21682 110474 -1 2326 22 1350 2117 162283 37175 3.41651 3.41651 -129.627 -3.41651 0 0 585099. 2024.56 0.25 0.07 0.10 -1 -1 0.25 0.0261695 0.0230887 143 59 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_104.v common 3.97 vpr 64.13 MiB -1 -1 0.14 20396 1 0.03 -1 -1 33804 -1 -1 17 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65672 29 32 269 229 1 129 78 17 17 289 -1 unnamed_device 25.7 MiB 0.13 669 12030 4965 6160 905 64.1 MiB 0.08 0.00 3.76255 -110.557 -3.76255 3.76255 0.86 0.000417242 0.000379871 0.029484 0.0269193 32 1475 20 6.65987e+06 215526 554710. 1919.41 0.88 0.0785965 0.0692783 22834 132086 -1 1382 19 921 1285 116578 25787 2.80197 2.80197 -99.1743 -2.80197 0 0 701300. 2426.64 0.28 0.05 0.13 -1 -1 0.28 0.0173496 0.0154056 92 28 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_105.v common 4.27 vpr 64.69 MiB -1 -1 0.14 20348 1 0.03 -1 -1 33772 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66240 32 32 310 266 1 175 84 17 17 289 -1 unnamed_device 26.3 MiB 0.25 897 13992 5018 7267 1707 64.7 MiB 0.11 0.00 3.93547 -124.701 -3.93547 3.93547 0.92 0.000456503 0.00041486 0.0371667 0.0338442 28 2149 19 6.65987e+06 253560 500653. 1732.36 0.93 0.0963657 0.0852149 21970 115934 -1 1871 22 1402 1872 148824 33300 3.11557 3.11557 -115.482 -3.11557 0 0 612192. 2118.31 0.26 0.06 0.12 -1 -1 0.26 0.0215616 0.0191556 116 55 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_106.v common 4.25 vpr 64.64 MiB -1 -1 0.17 20560 1 0.03 -1 -1 33680 -1 -1 37 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66192 31 32 326 261 1 177 100 17 17 289 -1 unnamed_device 26.1 MiB 0.10 945 14020 3581 8011 2428 64.6 MiB 0.11 0.00 4.66818 -124.475 -4.66818 4.66818 0.89 0.000490686 0.00044747 0.0322252 0.0293665 32 2224 21 6.65987e+06 469086 554710. 1919.41 0.99 0.0954997 0.0841624 22834 132086 -1 1970 23 1500 2561 184931 41768 3.57631 3.57631 -118.353 -3.57631 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0249156 0.0220551 129 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_107.v common 4.70 vpr 64.36 MiB -1 -1 0.14 20308 1 0.03 -1 -1 33748 -1 -1 21 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65908 29 32 262 224 1 168 82 17 17 289 -1 unnamed_device 26.0 MiB 0.20 809 8448 1963 6049 436 64.4 MiB 0.07 0.00 4.16472 -111.492 -4.16472 4.16472 0.89 0.00040396 0.000370519 0.0213047 0.0195459 26 2404 34 6.65987e+06 266238 477104. 1650.88 1.54 0.0938857 0.0829991 21682 110474 -1 1953 21 1368 1776 170413 41923 3.16857 3.16857 -106.139 -3.16857 0 0 585099. 2024.56 0.25 0.06 0.11 -1 -1 0.25 0.0197541 0.0174691 110 25 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_108.v common 4.28 vpr 64.28 MiB -1 -1 0.14 20036 1 0.03 -1 -1 33980 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65820 32 32 278 238 1 149 80 17 17 289 -1 unnamed_device 25.8 MiB 0.21 618 8852 1890 6315 647 64.3 MiB 0.07 0.00 3.69503 -110.464 -3.69503 3.69503 0.90 0.000431449 0.000394297 0.0242888 0.022253 32 2025 24 6.65987e+06 202848 554710. 1919.41 1.00 0.0821136 0.0721242 22834 132086 -1 1568 21 1327 2272 160443 39596 2.88191 2.88191 -106.381 -2.88191 0 0 701300. 2426.64 0.29 0.06 0.13 -1 -1 0.29 0.0205613 0.0182582 109 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_109.v common 4.40 vpr 64.48 MiB -1 -1 0.15 20664 1 0.03 -1 -1 33952 -1 -1 35 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66024 31 32 373 300 1 181 98 17 17 289 -1 unnamed_device 26.0 MiB 0.25 938 16973 4485 9905 2583 64.5 MiB 0.14 0.00 4.16177 -122.328 -4.16177 4.16177 0.90 0.00053659 0.000491708 0.0436657 0.0398684 32 2086 22 6.65987e+06 443730 554710. 1919.41 0.97 0.113496 0.100509 22834 132086 -1 1855 19 1333 2075 132666 31802 2.96496 2.96496 -111.053 -2.96496 0 0 701300. 2426.64 0.30 0.06 0.13 -1 -1 0.30 0.0244141 0.0217758 135 60 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_110.v common 4.18 vpr 64.46 MiB -1 -1 0.15 20472 1 0.03 -1 -1 33660 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66004 31 32 265 230 1 162 82 17 17 289 -1 unnamed_device 25.9 MiB 0.17 818 9872 2327 5876 1669 64.5 MiB 0.08 0.00 3.9535 -119.787 -3.9535 3.9535 0.90 0.00044378 0.000406393 0.0257439 0.0235764 28 2135 19 6.65987e+06 240882 500653. 1732.36 0.97 0.0785647 0.0694057 21970 115934 -1 1848 18 1008 1481 115769 26162 3.05777 3.05777 -111.219 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-1 33864 -1 -1 32 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66232 31 32 396 325 1 183 95 17 17 289 -1 unnamed_device 26.4 MiB 0.93 956 13055 3385 8531 1139 64.7 MiB 0.11 0.00 4.2257 -136.613 -4.2257 4.2257 0.90 0.000572715 0.000522704 0.0351299 0.0319452 32 2142 21 6.65987e+06 405696 554710. 1919.41 0.94 0.105122 0.0925337 22834 132086 -1 1950 20 1403 1904 129517 30385 3.45123 3.45123 -132.174 -3.45123 0 0 701300. 2426.64 0.31 0.06 0.13 -1 -1 0.31 0.0256983 0.0229034 138 87 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_113.v common 4.27 vpr 64.16 MiB -1 -1 0.14 20460 1 0.03 -1 -1 33680 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65700 32 32 303 262 1 150 81 17 17 289 -1 unnamed_device 25.6 MiB 0.25 770 8481 2112 5900 469 64.2 MiB 0.07 0.00 3.26384 -102.093 -3.26384 3.26384 0.93 0.000451163 0.000410602 0.0239105 0.0217922 30 1814 29 6.65987e+06 215526 526063. 1820.29 0.96 0.0881317 0.077233 22546 126617 -1 1464 17 761 1208 72569 16667 2.62051 2.62051 -96.4977 -2.62051 0 0 666494. 2306.21 0.29 0.04 0.12 -1 -1 0.29 0.0183042 0.0163108 104 54 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_114.v common 4.13 vpr 64.43 MiB -1 -1 0.15 20628 1 0.03 -1 -1 33740 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65980 32 32 290 244 1 175 83 17 17 289 -1 unnamed_device 26.0 MiB 0.15 877 7823 1725 5526 572 64.4 MiB 0.07 0.00 4.21052 -129.412 -4.21052 4.21052 0.90 0.000461736 0.000423919 0.0215262 0.0196956 28 2168 19 6.65987e+06 240882 500653. 1732.36 0.96 0.0787772 0.0692487 21970 115934 -1 2030 21 1304 1913 146005 33733 3.07585 3.07585 -118.205 -3.07585 0 0 612192. 2118.31 0.27 0.06 0.11 -1 -1 0.27 0.0212255 0.0188474 115 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_115.v common 4.39 vpr 64.88 MiB -1 -1 0.15 20716 1 0.03 -1 -1 33720 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66440 32 32 318 257 1 194 86 17 17 289 -1 unnamed_device 26.2 MiB 0.12 1033 8591 2028 5962 601 64.9 MiB 0.07 0.00 4.5425 -136.752 -4.5425 4.5425 0.88 0.000538258 0.000493416 0.0229967 0.0209636 26 2706 26 6.65987e+06 278916 477104. 1650.88 1.33 0.0936232 0.0823221 21682 110474 -1 2297 18 1566 2196 158849 37891 3.71871 3.71871 -131.764 -3.71871 0 0 585099. 2024.56 0.25 0.06 0.10 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66192 32 32 393 312 1 213 87 17 17 289 -1 unnamed_device 26.3 MiB 0.26 1007 9495 2407 6691 397 64.6 MiB 0.10 0.00 5.16517 -161.462 -5.16517 5.16517 0.89 0.000558154 0.000505928 0.030809 0.0281385 32 2658 22 6.65987e+06 291594 554710. 1919.41 1.00 0.101731 0.0895584 22834 132086 -1 2234 22 1802 2507 169937 41350 3.82117 3.82117 -143.64 -3.82117 0 0 701300. 2426.64 0.29 0.07 0.13 -1 -1 0.29 0.0256159 0.0226723 153 62 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_118.v common 3.99 vpr 64.25 MiB -1 -1 0.14 20116 1 0.03 -1 -1 33488 -1 -1 18 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65792 31 32 229 197 1 138 81 17 17 289 -1 unnamed_device 25.9 MiB 0.09 794 9181 2203 6150 828 64.2 MiB 0.06 0.00 3.53041 -99.5418 -3.53041 3.53041 0.90 0.000379129 0.000344975 0.0210929 0.0192751 32 1764 19 6.65987e+06 228204 554710. 1919.41 0.90 0.0681511 0.0599665 22834 132086 -1 1564 17 692 1110 76497 18243 2.71371 2.71371 -96.112 -2.71371 0 0 701300. 2426.64 0.30 0.04 0.13 -1 -1 0.30 0.0161652 0.0144316 96 -1 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_119.v common 4.62 vpr 65.12 MiB -1 -1 0.17 20616 1 0.03 -1 -1 33900 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66680 32 32 412 334 1 190 97 17 17 289 -1 unnamed_device 26.8 MiB 0.47 947 7201 1402 5250 549 65.1 MiB 0.08 0.00 4.0805 -134.669 -4.0805 4.0805 0.89 0.00060069 0.000550682 0.0220595 0.0201561 32 2497 24 6.65987e+06 418374 554710. 1919.41 1.01 0.0988275 0.0867835 22834 132086 -1 2184 22 1638 2272 171887 40530 3.68557 3.68557 -133.353 -3.68557 0 0 701300. 2426.64 0.30 0.08 0.13 -1 -1 0.30 0.0286394 0.0253559 144 87 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_120.v common 4.33 vpr 64.62 MiB -1 -1 0.15 20528 1 0.03 -1 -1 33756 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66176 32 32 376 318 1 156 80 17 17 289 -1 unnamed_device 26.2 MiB 0.22 692 9368 2494 5834 1040 64.6 MiB 0.09 0.00 3.5233 -119.857 -3.5233 3.5233 0.89 0.000525352 0.000479082 0.0308483 0.0281382 32 1730 23 6.65987e+06 202848 554710. 1919.41 0.98 0.0980736 0.0861207 22834 132086 -1 1559 23 1459 2083 162526 37135 2.97497 2.97497 -117.069 -2.97497 0 0 701300. 2426.64 0.30 0.07 0.13 -1 -1 0.30 0.0269032 0.0238053 115 93 -1 -1 -1 -1 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66612 32 32 396 299 1 236 89 17 17 289 -1 unnamed_device 27.0 MiB 0.35 1323 16127 4193 10390 1544 65.1 MiB 0.17 0.00 6.49946 -194.782 -6.49946 6.49946 0.88 0.00058017 0.000527893 0.0494848 0.045156 28 3840 36 6.65987e+06 316950 500653. 1732.36 8.32 0.227936 0.200449 21970 115934 -1 2990 21 1959 2728 227624 50018 5.35994 5.35994 -179.572 -5.35994 0 0 612192. 2118.31 0.26 0.09 0.11 -1 -1 0.26 0.0290884 0.0260153 168 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_123.v common 4.10 vpr 64.18 MiB -1 -1 0.13 20348 1 0.03 -1 -1 33792 -1 -1 17 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65724 30 32 224 207 1 137 79 17 17 289 -1 unnamed_device 25.8 MiB 0.18 701 10895 2966 6376 1553 64.2 MiB 0.07 0.00 3.19181 -99.2246 -3.19181 3.19181 0.90 0.000358455 0.00032723 0.0251323 0.0230013 32 1552 19 6.65987e+06 215526 554710. 1919.41 0.91 0.0692538 0.061087 22834 132086 -1 1399 21 714 923 72542 17195 2.17571 2.17571 -87.784 -2.17571 0 0 701300. 2426.64 0.30 0.04 0.13 -1 -1 0.30 0.0162845 0.0144193 86 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_124.v common 4.12 vpr 64.38 MiB -1 -1 0.14 20108 1 0.03 -1 -1 34024 -1 -1 16 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65924 30 32 286 239 1 134 78 17 17 289 -1 unnamed_device 25.9 MiB 0.12 559 11200 4645 5368 1187 64.4 MiB 0.07 0.00 4.03052 -111.683 -4.03052 4.03052 0.88 0.000376606 0.000337674 0.0285447 0.0259148 32 1719 26 6.65987e+06 202848 554710. 1919.41 1.00 0.0851649 0.0745607 22834 132086 -1 1381 33 1516 2373 220958 51242 2.94085 2.94085 -104.913 -2.94085 0 0 701300. 2426.64 0.29 0.08 0.12 -1 -1 0.29 0.0272363 0.0237949 92 29 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_125.v common 4.20 vpr 64.29 MiB -1 -1 0.15 20200 1 0.03 -1 -1 33632 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65836 32 32 296 247 1 157 85 17 17 289 -1 unnamed_device 26.0 MiB 0.05 882 13663 3967 7775 1921 64.3 MiB 0.12 0.00 3.38183 -111.047 -3.38183 3.38183 0.89 0.000455978 0.000417394 0.0358345 0.0326963 32 2232 25 6.65987e+06 266238 554710. 1919.41 1.00 0.0964517 0.0850311 22834 132086 -1 1983 21 1389 2472 214229 47394 2.78771 2.78771 -108.095 -2.78771 0 0 701300. 2426.64 0.30 0.07 0.13 -1 -1 0.30 0.0217256 0.0192488 115 31 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_126.v common 6.85 vpr 64.02 MiB -1 -1 0.15 20352 1 0.03 -1 -1 33840 -1 -1 27 25 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65556 25 32 216 194 1 122 84 17 17 289 -1 unnamed_device 25.6 MiB 0.09 461 9234 2985 4025 2224 64.0 MiB 0.05 0.00 3.09981 -73.1644 -3.09981 3.09981 0.89 0.000341503 0.00031139 0.0191808 0.0175135 38 1143 33 6.65987e+06 342306 638502. 2209.35 3.75 0.118935 0.102752 23986 155662 -1 888 17 513 851 43957 11516 2.24185 2.24185 -63.6531 -2.24185 0 0 851065. 2944.86 0.34 0.03 0.15 -1 -1 0.34 0.0139909 0.0124441 89 19 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_127.v common 4.45 vpr 64.64 MiB -1 -1 0.16 20600 1 0.03 -1 -1 33972 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66188 32 32 376 307 1 185 84 17 17 289 -1 unnamed_device 26.1 MiB 0.19 1082 15273 5386 7964 1923 64.6 MiB 0.15 0.00 3.97418 -128.905 -3.97418 3.97418 0.90 0.000529054 0.000483291 0.047631 0.0434835 32 2803 23 6.65987e+06 253560 554710. 1919.41 1.03 0.117462 0.10407 22834 132086 -1 2459 23 1634 2959 236870 51536 3.44305 3.44305 -126.805 -3.44305 0 0 701300. 2426.64 0.30 0.09 0.13 -1 -1 0.30 0.0288212 0.0255762 135 69 -1 -1 -1 -1 -fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_128.v common 4.55 vpr 64.97 MiB -1 -1 0.18 20496 1 0.03 -1 -1 33692 -1 -1 33 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66532 31 32 409 331 1 191 96 17 17 289 -1 unnamed_device 26.5 MiB 0.41 841 9951 2183 7152 616 65.0 MiB 0.10 0.00 4.37472 -138.365 -4.37472 4.37472 0.91 0.000586659 0.000535695 0.0289111 0.0264068 32 2335 20 6.65987e+06 418374 554710. 1919.41 0.99 0.100608 0.0886003 22834 132086 -1 1838 17 1307 1888 108740 27817 3.30177 3.30177 -122.786 -3.30177 0 0 701300. 2426.64 0.28 0.06 0.13 -1 -1 0.28 0.0229758 0.0204191 142 86 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_001.v common 9.05 vpr 65.30 MiB -1 -1 0.17 20484 1 0.03 -1 -1 33712 -1 -1 13 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66872 32 32 354 285 1 193 77 17 17 289 -1 unnamed_device 26.9 MiB 2.62 849 12139 5116 6732 291 65.3 MiB 0.10 0.00 5.4594 -159.287 -5.4594 5.4594 0.90 0.000530095 0.000481825 0.0392635 0.0358167 44 2778 24 6.95648e+06 188184 787024. 2723.27 3.06 0.16026 0.140817 27778 195446 -1 2100 22 1620 2390 205020 42905 4.50786 4.50786 -152.69 -4.50786 0 0 997811. 3452.63 0.39 0.08 0.19 -1 -1 0.39 0.026191 0.0232501 81 47 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_002.v common 8.06 vpr 65.69 MiB -1 -1 0.17 20512 1 0.03 -1 -1 33864 -1 -1 15 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67268 30 32 363 293 1 187 77 17 17 289 -1 unnamed_device 27.3 MiB 2.19 750 10998 3991 5243 1764 65.7 MiB 0.09 0.00 4.63092 -138.355 -4.63092 4.63092 0.91 0.000502878 0.000458118 0.0373991 0.0341549 40 2398 38 6.95648e+06 217135 706193. 2443.58 2.53 0.172818 0.151571 26914 176310 -1 2062 23 1948 2706 287194 61968 4.57081 4.57081 -154.872 -4.57081 0 0 926341. 3205.33 0.36 0.10 0.17 -1 -1 0.36 0.0280095 0.024913 80 58 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_003.v common 7.80 vpr 64.97 MiB -1 -1 0.14 20540 1 0.03 -1 -1 33956 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66528 32 32 299 247 1 182 79 17 17 289 -1 unnamed_device 26.6 MiB 1.31 1011 6839 1853 4585 401 65.0 MiB 0.06 0.00 3.76508 -124.296 -3.76508 3.76508 0.93 0.000446599 0.000407219 0.0209668 0.0192209 38 2570 30 6.95648e+06 217135 678818. 2348.85 3.27 0.139765 0.122892 26626 170182 -1 2196 20 1226 1684 137441 28682 3.69172 3.69172 -129.324 -3.69172 0 0 902133. 3121.57 0.34 0.06 0.16 -1 -1 0.34 0.0220366 0.0196492 76 26 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_004.v common 6.47 vpr 65.45 MiB -1 -1 0.15 20396 1 0.03 -1 -1 33924 -1 -1 19 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67016 29 32 308 248 1 162 80 17 17 289 -1 unnamed_device 26.9 MiB 0.37 653 13152 5791 6666 695 65.4 MiB 0.09 0.00 4.18338 -115.281 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0.38 0.06 0.20 -1 -1 0.38 0.0220364 0.0196094 73 31 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_006.v common 9.02 vpr 65.22 MiB -1 -1 0.16 20624 1 0.03 -1 -1 33948 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66788 32 32 366 295 1 182 85 17 17 289 -1 unnamed_device 26.8 MiB 1.08 762 14779 6278 7942 559 65.2 MiB 0.10 0.00 3.0584 -114.242 -3.0584 3.0584 0.93 0.000564679 0.000516546 0.0443612 0.0404257 46 2130 23 6.95648e+06 303989 828058. 2865.25 4.55 0.221481 0.192947 28066 200906 -1 1614 21 1350 1975 141226 31692 3.17337 3.17337 -118.004 -3.17337 0 0 1.01997e+06 3529.29 0.39 0.06 0.19 -1 -1 0.39 0.025398 0.0225819 79 55 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_007.v common 10.31 vpr 64.96 MiB -1 -1 0.16 20112 1 0.03 -1 -1 33988 -1 -1 13 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66524 27 32 259 221 1 125 72 17 17 289 -1 unnamed_device 26.6 MiB 5.11 400 8118 3296 4253 569 65.0 MiB 0.05 0.00 3.56899 -93.1575 -3.56899 3.56899 0.94 0.000385867 0.000351571 0.0232018 0.0211858 40 1513 27 6.95648e+06 188184 706193. 2443.58 1.98 0.112342 0.0979473 26914 176310 -1 1345 20 1051 1528 151147 38012 3.12397 3.12397 -102.326 -3.12397 0 0 926341. 3205.33 0.34 0.06 0.16 -1 -1 0.34 0.0184405 0.0163102 52 26 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_008.v common 6.52 vpr 65.14 MiB -1 -1 0.16 20188 1 0.03 -1 -1 34012 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66700 31 32 271 219 1 157 88 17 17 289 -1 unnamed_device 26.5 MiB 0.44 691 11983 4028 5840 2115 65.1 MiB 0.08 0.00 3.0166 -94.5957 -3.0166 3.0166 0.91 0.000417242 0.000379465 0.0279262 0.0254513 38 2198 34 6.95648e+06 361892 678818. 2348.85 2.88 0.130855 0.113728 26626 170182 -1 1562 21 1128 1795 124372 27855 2.92072 2.92072 -102.496 -2.92072 0 0 902133. 3121.57 0.33 0.06 0.17 -1 -1 0.33 0.0208351 0.0185236 69 -1 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_009.v common 10.43 vpr 65.14 MiB -1 -1 0.16 20700 1 0.03 -1 -1 34004 -1 -1 11 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66708 31 32 317 271 1 163 74 17 17 289 -1 unnamed_device 26.6 MiB 2.11 579 9684 3905 5251 528 65.1 MiB 0.07 0.00 3.39469 -115.112 -3.39469 3.39469 0.91 0.000493013 0.000441143 0.0312721 0.0285532 48 1811 26 6.95648e+06 159232 865456. 2994.66 4.97 0.191199 0.165534 28354 207349 -1 1465 22 1268 1776 142283 33598 3.24576 3.24576 -115.708 -3.24576 0 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66672 30 32 303 262 1 137 74 17 17 289 -1 unnamed_device 26.7 MiB 1.89 471 10304 4280 5549 475 65.1 MiB 0.07 0.00 3.43453 -102.366 -3.43453 3.43453 0.92 0.00044187 0.000402588 0.0310724 0.0283889 44 1644 41 6.95648e+06 173708 787024. 2723.27 1.82 0.134992 0.117216 27778 195446 -1 1210 19 1006 1391 107894 26111 2.87247 2.87247 -102.182 -2.87247 0 0 997811. 3452.63 0.38 0.05 0.19 -1 -1 0.38 0.0197255 0.0175132 55 58 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_012.v common 8.26 vpr 65.06 MiB -1 -1 0.15 20196 1 0.03 -1 -1 33752 -1 -1 10 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66620 32 32 276 237 1 160 74 17 17 289 -1 unnamed_device 26.6 MiB 1.57 590 10614 3394 4881 2339 65.1 MiB 0.07 0.00 3.37833 -114.652 -3.37833 3.37833 0.93 0.000419608 0.000382322 0.0314832 0.028765 48 2065 26 6.95648e+06 144757 865456. 2994.66 3.31 0.12774 0.111748 28354 207349 -1 1594 22 1339 1737 177767 43429 2.98202 2.98202 -113.691 -2.98202 0 0 1.05005e+06 3633.38 0.42 0.07 0.20 -1 -1 0.42 0.0216897 0.0192871 62 31 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_013.v common 10.66 vpr 65.58 MiB -1 -1 0.17 20692 1 0.03 -1 -1 33620 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67152 32 32 344 272 1 194 79 17 17 289 -1 unnamed_device 27.2 MiB 1.92 833 13261 5618 7295 348 65.6 MiB 0.10 0.00 3.96008 -134.144 -3.96008 3.96008 0.92 0.000517619 0.000469135 0.042897 0.0391338 50 2529 26 6.95648e+06 217135 902133. 3121.57 5.30 0.214813 0.18725 28642 213929 -1 2081 20 1634 2343 195756 41013 3.35556 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66492 29 32 248 215 1 136 74 17 17 289 -1 unnamed_device 26.4 MiB 1.43 470 8444 3456 4562 426 64.9 MiB 0.06 0.00 3.10275 -88.0296 -3.10275 3.10275 0.93 0.000396814 0.000362521 0.0231537 0.0211814 40 2005 31 6.95648e+06 188184 706193. 2443.58 2.37 0.117067 0.102166 26914 176310 -1 1534 23 1125 1652 175061 53068 3.19337 3.19337 -104.765 -3.19337 0 0 926341. 3205.33 0.34 0.07 0.18 -1 -1 0.34 0.0196541 0.0173297 55 21 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_016.v common 9.20 vpr 65.40 MiB -1 -1 0.14 20380 1 0.03 -1 -1 33776 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66968 32 32 370 297 1 180 81 17 17 289 -1 unnamed_device 26.9 MiB 1.11 736 13381 4767 6091 2523 65.4 MiB 0.09 0.00 3.0625 -113.087 -3.0625 3.0625 0.91 0.000490878 0.000443623 0.0403828 0.0366381 46 2125 28 6.95648e+06 246087 828058. 2865.25 4.80 0.214918 0.185607 28066 200906 -1 1730 22 1527 2399 181497 42649 3.74967 3.74967 -124.464 -3.74967 0 0 1.01997e+06 3529.29 0.39 0.07 0.18 -1 -1 0.39 0.0252722 0.0223378 76 55 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_017.v common 7.56 vpr 65.48 MiB -1 -1 0.15 20788 1 0.03 -1 -1 33960 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67056 32 32 338 269 1 190 78 17 17 289 -1 unnamed_device 27.1 MiB 2.06 821 11698 3981 5913 1804 65.5 MiB 0.10 0.00 4.42651 -139.682 -4.42651 4.42651 0.93 0.000497906 0.000453588 0.0381088 0.0348267 38 2675 39 6.95648e+06 202660 678818. 2348.85 2.21 0.144947 0.127327 26626 170182 -1 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169 75 17 17 289 -1 unnamed_device 26.4 MiB 2.30 900 8449 3439 4770 240 64.9 MiB 0.06 0.00 4.11557 -135.517 -4.11557 4.11557 0.91 0.000372803 0.000337996 0.0244584 0.0222841 40 2181 21 6.95648e+06 173708 706193. 2443.58 4.51 0.169684 0.147127 26914 176310 -1 1992 22 1613 2157 226592 45321 3.91426 3.91426 -139.471 -3.91426 0 0 926341. 3205.33 0.35 0.08 0.17 -1 -1 0.35 0.0225473 0.0199798 69 30 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_021.v common 7.45 vpr 65.57 MiB -1 -1 0.17 20636 1 0.03 -1 -1 33872 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67148 32 32 342 271 1 173 84 17 17 289 -1 unnamed_device 27.2 MiB 0.79 691 13626 5075 6512 2039 65.6 MiB 0.09 0.00 3.69419 -120.83 -3.69419 3.69419 0.93 0.00052818 0.000484085 0.0404926 0.0368961 44 2266 33 6.95648e+06 289514 787024. 2723.27 3.30 0.16929 0.148666 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0.13 19880 1 0.02 -1 -1 33852 -1 -1 13 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66024 26 32 190 182 1 104 71 17 17 289 -1 unnamed_device 26.1 MiB 0.94 416 8539 3544 4471 524 64.5 MiB 0.04 0.00 2.23646 -66.7931 -2.23646 2.23646 0.88 0.000263319 0.000238953 0.01738 0.015841 34 1152 47 6.95648e+06 188184 618332. 2139.56 1.44 0.089208 0.0771018 25762 151098 -1 988 17 605 766 68818 15227 2.23768 2.23768 -73.5335 -2.23768 0 0 787024. 2723.27 0.32 0.04 0.15 -1 -1 0.32 0.0123683 0.0109967 44 21 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_024.v common 6.94 vpr 64.82 MiB -1 -1 0.15 20056 1 0.03 -1 -1 33928 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66380 32 32 285 227 1 161 79 17 17 289 -1 unnamed_device 26.3 MiB 0.86 670 9543 3600 4533 1410 64.8 MiB 0.07 0.00 4.68425 -117.235 -4.68425 4.68425 0.92 0.000433971 0.000395048 0.0275237 0.0251497 44 2456 40 6.95648e+06 217135 787024. 2723.27 2.78 0.131157 0.11526 27778 195446 -1 1660 19 1265 2070 156131 39900 3.85601 3.85601 -120.654 -3.85601 0 0 997811. 3452.63 0.38 0.06 0.17 -1 -1 0.38 0.0203603 0.018116 66 -1 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_025.v common 5.20 vpr 64.71 MiB -1 -1 0.12 19792 1 0.03 -1 -1 33468 -1 -1 8 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66268 32 32 173 169 1 112 72 17 17 289 -1 unnamed_device 26.3 MiB 0.31 360 10055 3887 4514 1654 64.7 MiB 0.05 0.00 2.15326 -68.8392 -2.15326 2.15326 0.91 0.000282396 0.000256489 0.0207279 0.0188478 38 1061 21 6.95648e+06 115805 678818. 2348.85 1.81 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 67004 32 32 338 277 1 172 83 17 17 289 -1 unnamed_device 27.0 MiB 0.81 795 15383 6700 8206 477 65.4 MiB 0.11 0.00 4.43549 -130.994 -4.43549 4.43549 0.95 0.000468103 0.000431331 0.0450466 0.0409989 48 2092 29 6.95648e+06 275038 865456. 2994.66 2.77 0.166769 0.146597 28354 207349 -1 1795 22 1236 2056 165591 37261 3.80591 3.80591 -130.105 -3.80591 0 0 1.05005e+06 3633.38 0.42 0.07 0.20 -1 -1 0.42 0.0247178 0.0218623 72 47 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_029.v common 8.28 vpr 64.99 MiB -1 -1 0.14 20152 1 0.03 -1 -1 33700 -1 -1 10 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 284 241 1 141 74 17 17 289 -1 unnamed_device 26.6 MiB 1.04 836 12164 3915 6903 1346 65.0 MiB 0.08 0.00 3.08875 -104.395 -3.08875 3.08875 0.90 0.000370172 0.000338845 0.033401 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66580 32 32 253 210 1 149 74 17 17 289 -1 unnamed_device 26.6 MiB 0.49 490 8754 2672 4372 1710 65.0 MiB 0.05 0.00 3.37459 -106.603 -3.37459 3.37459 0.88 0.000347734 0.000317389 0.0229824 0.0209953 52 1349 34 6.95648e+06 144757 926341. 3205.33 5.04 0.152828 0.132553 29218 227130 -1 1114 21 1103 1579 114360 28737 2.88157 2.88157 -104.561 -2.88157 0 0 1.14541e+06 3963.36 0.43 0.05 0.21 -1 -1 0.43 0.0189791 0.0168535 58 -1 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_033.v common 6.79 vpr 65.19 MiB -1 -1 0.14 20268 1 0.03 -1 -1 33492 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66756 31 32 271 231 1 143 82 17 17 289 -1 unnamed_device 26.7 MiB 0.44 514 10050 3328 4861 1861 65.2 MiB 0.06 0.00 3.16614 -99.0057 -3.16614 3.16614 0.91 0.000385321 0.000346629 0.0244657 0.0220605 44 1932 39 6.95648e+06 275038 787024. 2723.27 3.06 0.137634 0.120103 27778 195446 -1 1339 24 1230 1923 229518 85397 2.94462 2.94462 -105.107 -2.94462 0 0 997811. 3452.63 0.40 0.09 0.18 -1 -1 0.40 0.0223265 0.0196544 61 26 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_034.v common 14.83 vpr 65.25 MiB -1 -1 0.15 20436 1 0.03 -1 -1 33696 -1 -1 12 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66812 29 32 291 250 1 148 73 17 17 289 -1 unnamed_device 26.7 MiB 1.24 761 12537 5784 6209 544 65.2 MiB 0.08 0.00 2.98425 -104.866 -2.98425 2.98425 0.92 0.000417186 0.000380594 0.0371095 0.0339368 40 1951 35 6.95648e+06 173708 706193. 2443.58 10.35 0.240487 0.210056 26914 176310 -1 1632 19 1072 1486 183744 40499 2.73002 2.73002 -103.333 -2.73002 0 0 926341. 3205.33 0.36 0.06 0.16 -1 -1 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66876 32 32 391 311 1 184 88 17 17 289 -1 unnamed_device 26.8 MiB 1.05 745 13738 4997 6870 1871 65.3 MiB 0.10 0.00 3.2962 -117.206 -3.2962 3.2962 0.93 0.000478788 0.000433482 0.0402864 0.0365295 40 2441 27 6.95648e+06 347416 706193. 2443.58 2.91 0.174111 0.152558 26914 176310 -1 2016 22 1949 2778 252661 56579 3.50372 3.50372 -130.751 -3.50372 0 0 926341. 3205.33 0.35 0.09 0.18 -1 -1 0.35 0.0274613 0.0243324 82 62 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_037.v common 9.60 vpr 65.06 MiB -1 -1 0.16 20148 1 0.03 -1 -1 34060 -1 -1 11 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66620 31 32 279 237 1 153 74 17 17 289 -1 unnamed_device 26.6 MiB 2.06 860 8754 2885 4850 1019 65.1 MiB 0.07 0.00 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67412 31 32 383 305 1 204 79 17 17 289 -1 unnamed_device 27.3 MiB 2.79 938 15120 6700 8021 399 65.8 MiB 0.12 0.00 4.47954 -148.558 -4.47954 4.47954 0.93 0.000550559 0.000494899 0.0518372 0.0473671 40 2977 25 6.95648e+06 231611 706193. 2443.58 2.58 0.185891 0.164327 26914 176310 -1 2471 20 1757 2550 249964 52119 4.78676 4.78676 -162.397 -4.78676 0 0 926341. 3205.33 0.36 0.08 0.16 -1 -1 0.36 0.0265549 0.0237015 88 60 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_041.v common 9.61 vpr 65.19 MiB -1 -1 0.15 20580 1 0.03 -1 -1 33916 -1 -1 22 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66756 31 32 352 285 1 177 85 17 17 289 -1 unnamed_device 26.7 MiB 1.15 806 12733 4192 6306 2235 65.2 MiB 0.09 0.00 4.14583 -131.471 -4.14583 4.14583 0.88 0.000501942 0.000457351 0.0370142 0.0339269 44 2580 41 6.95648e+06 318465 787024. 2723.27 5.24 0.276151 0.241497 27778 195446 -1 1877 20 1310 1980 158921 34446 3.55827 3.55827 -129.134 -3.55827 0 0 997811. 3452.63 0.38 0.07 0.18 -1 -1 0.38 0.0236445 0.021082 78 51 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_042.v common 6.98 vpr 64.98 MiB -1 -1 0.16 20292 1 0.03 -1 -1 33816 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66536 32 32 291 242 1 173 78 17 17 289 -1 unnamed_device 26.4 MiB 1.39 717 8212 2161 5077 974 65.0 MiB 0.07 0.00 4.19005 -113.386 -4.19005 4.19005 0.91 0.000439446 0.00040162 0.0242029 0.0221604 46 1942 38 6.95648e+06 202660 828058. 2865.25 2.30 0.122531 0.107962 28066 200906 -1 1539 18 1104 1571 122247 26899 4.11171 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unnamed_device 26.8 MiB 1.45 1043 13358 5192 6540 1626 65.3 MiB 0.11 0.00 4.83562 -153.036 -4.83562 4.83562 0.92 0.00049756 0.0004538 0.0430263 0.0393232 40 2908 41 6.95648e+06 217135 706193. 2443.58 15.11 0.274088 0.238836 26914 176310 -1 2542 19 1727 2534 265189 51613 4.58201 4.58201 -157.296 -4.58201 0 0 926341. 3205.33 0.35 0.08 0.18 -1 -1 0.35 0.0226925 0.0202058 84 30 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_046.v common 9.46 vpr 65.59 MiB -1 -1 0.16 20580 1 0.03 -1 -1 33904 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67168 32 32 349 284 1 175 81 17 17 289 -1 unnamed_device 27.1 MiB 1.15 832 15481 6850 8276 355 65.6 MiB 0.11 0.00 3.22585 -113.908 -3.22585 3.22585 0.94 0.000500221 0.000454955 0.047262 0.0429843 44 2391 28 6.95648e+06 246087 787024. 2723.27 4.94 0.233932 0.203644 27778 195446 -1 1981 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31 32 373 299 1 194 78 17 17 289 -1 unnamed_device 26.9 MiB 1.65 847 12030 5014 6584 432 65.4 MiB 0.09 0.00 4.57287 -144.308 -4.57287 4.57287 0.92 0.000528692 0.000479812 0.0405551 0.0370606 46 3239 34 6.95648e+06 217135 828058. 2865.25 4.86 0.176818 0.155278 28066 200906 -1 2319 21 1807 2822 246652 51934 4.03581 4.03581 -139.978 -4.03581 0 0 1.01997e+06 3529.29 0.39 0.09 0.20 -1 -1 0.39 0.0274742 0.0245468 85 58 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_054.v common 23.04 vpr 65.30 MiB -1 -1 0.16 20500 1 0.03 -1 -1 33764 -1 -1 13 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66864 32 32 387 315 1 182 77 17 17 289 -1 unnamed_device 26.9 MiB 2.63 757 13443 5119 6395 1929 65.3 MiB 0.09 0.00 4.08826 -130.07 -4.08826 4.08826 0.87 0.000479491 0.000439016 0.0420975 0.0383263 50 2778 50 6.95648e+06 188184 902133. 3121.57 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common 8.12 vpr 65.31 MiB -1 -1 0.15 20460 1 0.03 -1 -1 33772 -1 -1 12 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66876 32 32 341 285 1 181 76 17 17 289 -1 unnamed_device 26.9 MiB 1.60 674 9676 3990 5312 374 65.3 MiB 0.07 0.00 3.76865 -134.987 -3.76865 3.76865 0.92 0.000485795 0.000443059 0.0317941 0.029053 60 1835 21 6.95648e+06 173708 1.01997e+06 3529.29 3.03 0.158904 0.138744 30658 258169 -1 1517 23 1426 1989 172709 39333 3.73911 3.73911 -132.853 -3.73911 0 0 1.27783e+06 4421.56 0.49 0.07 0.26 -1 -1 0.49 0.0253224 0.0224086 76 62 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_057.v common 11.48 vpr 65.66 MiB -1 -1 0.17 20456 1 0.03 -1 -1 33696 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67232 32 32 387 293 1 225 80 17 17 289 -1 unnamed_device 27.2 MiB 2.18 1197 6788 1593 4785 410 65.7 MiB 0.07 0.00 4.81732 -154.887 -4.81732 4.81732 0.91 0.000568504 0.000519588 0.0255631 0.0234675 56 2745 25 6.95648e+06 231611 973134. 3367.25 5.83 0.247176 0.215709 29794 239141 -1 2575 20 1810 2734 267843 53538 4.69936 4.69936 -158.923 -4.69936 0 0 1.19926e+06 4149.71 0.45 0.09 0.24 -1 -1 0.45 0.0282058 0.0252843 97 28 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_058.v common 9.32 vpr 65.34 MiB -1 -1 0.15 20624 1 0.03 -1 -1 33432 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66908 32 32 340 270 1 175 81 17 17 289 -1 unnamed_device 27.0 MiB 0.88 755 11806 4947 6514 345 65.3 MiB 0.08 0.00 4.55181 -144.133 -4.55181 4.55181 0.90 0.000462726 0.000419797 0.0344299 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66948 32 32 336 268 1 169 87 17 17 289 -1 unnamed_device 26.9 MiB 1.24 717 11799 3733 5850 2216 65.4 MiB 0.09 0.00 4.62806 -129.887 -4.62806 4.62806 0.91 0.000503817 0.00045753 0.033576 0.0305597 40 2137 23 6.95648e+06 332941 706193. 2443.58 9.83 0.262179 0.22782 26914 176310 -1 1846 22 1420 2105 204275 43664 4.24312 4.24312 -135.251 -4.24312 0 0 926341. 3205.33 0.35 0.08 0.18 -1 -1 0.35 0.0244993 0.0217059 74 31 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_062.v common 5.31 vpr 64.71 MiB -1 -1 0.14 20208 1 0.03 -1 -1 33452 -1 -1 13 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66260 32 32 231 199 1 136 77 17 17 289 -1 unnamed_device 26.2 MiB 0.27 514 10509 3980 5034 1495 64.7 MiB 0.06 0.00 2.96656 -92.2738 -2.96656 2.96656 0.89 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on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66780 32 32 276 237 1 155 74 17 17 289 -1 unnamed_device 26.8 MiB 3.27 640 8909 3664 5023 222 65.2 MiB 0.07 0.00 4.07418 -127.444 -4.07418 4.07418 0.94 0.000415061 0.000377321 0.0267557 0.0244504 40 2228 26 6.95648e+06 144757 706193. 2443.58 11.06 0.227487 0.197192 26914 176310 -1 1908 20 1236 1636 170227 43620 3.49292 3.49292 -123.985 -3.49292 0 0 926341. 3205.33 0.35 0.07 0.17 -1 -1 0.35 0.0203761 0.0181456 61 31 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_070.v common 7.44 vpr 65.39 MiB -1 -1 0.15 20488 1 0.03 -1 -1 33936 -1 -1 12 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66960 31 32 319 272 1 165 75 17 17 289 -1 unnamed_device 26.8 MiB 2.00 607 11925 5002 6435 488 65.4 MiB 0.08 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66884 30 32 317 269 1 149 74 17 17 289 -1 unnamed_device 26.7 MiB 0.84 539 10769 4210 5259 1300 65.3 MiB 0.08 0.00 3.44073 -108.225 -3.44073 3.44073 0.93 0.000472088 0.000429789 0.0344458 0.0314227 48 1688 34 6.95648e+06 173708 865456. 2994.66 8.56 0.244843 0.21194 28354 207349 -1 1454 20 1284 1813 161942 38490 2.90237 2.90237 -113.138 -2.90237 0 0 1.05005e+06 3633.38 0.40 0.06 0.21 -1 -1 0.40 0.0217269 0.0192765 60 58 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_074.v common 8.31 vpr 65.15 MiB -1 -1 0.15 20732 1 0.03 -1 -1 33644 -1 -1 11 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66716 32 32 335 282 1 178 75 17 17 289 -1 unnamed_device 26.8 MiB 1.69 645 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32 32 349 286 1 165 86 17 17 289 -1 unnamed_device 27.0 MiB 1.37 827 13505 5541 6681 1283 65.4 MiB 0.10 0.00 3.208 -113.036 -3.208 3.208 0.93 0.000518637 0.000461468 0.0384563 0.0350655 40 2180 23 6.95648e+06 318465 706193. 2443.58 11.09 0.276739 0.241213 26914 176310 -1 1944 22 1395 2260 237037 48189 3.27047 3.27047 -118.143 -3.27047 0 0 926341. 3205.33 0.35 0.08 0.18 -1 -1 0.35 0.0253935 0.0225241 71 54 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_112.v common 10.01 vpr 65.52 MiB -1 -1 0.17 20460 1 0.03 -1 -1 33788 -1 -1 15 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67096 31 32 396 325 1 176 78 17 17 289 -1 unnamed_device 27.1 MiB 1.82 717 9706 3985 5340 381 65.5 MiB 0.08 0.00 3.995 -134.818 -3.995 3.995 0.93 0.000537082 0.000488355 0.034115 0.0311067 44 2136 23 6.95648e+06 217135 787024. 2723.27 4.79 0.202067 0.17595 27778 195446 -1 1559 21 1323 1791 115158 27485 3.49017 3.49017 -133.994 -3.49017 0 0 997811. 3452.63 0.40 0.06 0.19 -1 -1 0.40 0.0263597 0.023422 73 87 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_113.v common 7.41 vpr 65.09 MiB -1 -1 0.15 20276 1 0.03 -1 -1 33460 -1 -1 10 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66656 32 32 303 262 1 145 74 17 17 289 -1 unnamed_device 26.6 MiB 1.43 546 10149 3579 4930 1640 65.1 MiB 0.07 0.00 2.9023 -96.8242 -2.9023 2.9023 0.93 0.000421276 0.00038608 0.0298826 0.0272356 46 1638 37 6.95648e+06 144757 828058. 2865.25 2.65 0.146272 0.128144 28066 200906 -1 1065 31 1105 1702 170168 64073 2.92452 2.92452 -98.2858 -2.92452 0 0 1.01997e+06 3529.29 0.39 0.08 0.20 -1 -1 0.39 0.0284071 0.0249461 57 54 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_114.v common 7.28 vpr 65.00 MiB -1 -1 0.14 20232 1 0.03 -1 -1 33692 -1 -1 11 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66564 32 32 290 244 1 170 75 17 17 289 -1 unnamed_device 26.5 MiB 1.53 688 11293 4712 6328 253 65.0 MiB 0.08 0.00 4.09973 -130.941 -4.09973 4.09973 0.91 0.000429303 0.00039029 0.0321728 0.0292453 46 2135 28 6.95648e+06 159232 828058. 2865.25 2.47 0.136335 0.118953 28066 200906 -1 1698 23 1365 1978 168465 36966 3.48812 3.48812 -125.856 -3.48812 0 0 1.01997e+06 3529.29 0.40 0.07 0.18 -1 -1 0.40 0.0220184 0.0194785 70 31 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_115.v common 9.48 vpr 65.33 MiB -1 -1 0.15 20696 1 0.03 -1 -1 33788 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66900 32 32 318 257 1 188 78 17 17 289 -1 unnamed_device 26.9 MiB 2.62 759 11034 4566 6063 405 65.3 MiB 0.08 0.00 4.18668 -129.57 -4.18668 4.18668 0.92 0.000471188 0.000429117 0.0343881 0.0314055 40 2605 27 6.95648e+06 202660 706193. 2443.58 3.53 0.154952 0.136443 26914 176310 -1 2030 28 2034 2690 321469 108944 4.18692 4.18692 -144.182 -4.18692 0 0 926341. 3205.33 0.36 0.12 0.17 -1 -1 0.36 0.0303446 0.0268562 79 27 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_116.v common 15.19 vpr 65.40 MiB -1 -1 0.15 20620 1 0.03 -1 -1 33728 -1 -1 21 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66968 29 32 324 268 1 162 82 17 17 289 -1 unnamed_device 26.8 MiB 1.18 716 10228 3612 4706 1910 65.4 MiB 0.07 0.00 4.16289 -113.847 -4.16289 4.16289 0.88 0.000457138 0.000415882 0.0288889 0.0264171 40 2239 28 6.95648e+06 303989 706193. 2443.58 10.83 0.286454 0.250051 26914 176310 -1 1916 21 1219 1919 167378 38434 3.83102 3.83102 -120.807 -3.83102 0 0 926341. 3205.33 0.34 0.07 0.16 -1 -1 0.34 0.0225628 0.0200248 71 49 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_117.v common 11.16 vpr 65.47 MiB -1 -1 0.16 20620 1 0.03 -1 -1 33648 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67044 32 32 393 312 1 206 78 17 17 289 -1 unnamed_device 26.9 MiB 1.61 846 13524 5903 7163 458 65.5 MiB 0.11 0.00 4.885 -157.826 -4.885 4.885 0.91 0.000571596 0.000525106 0.0477869 0.0436657 56 2698 26 6.95648e+06 202660 973134. 3367.25 6.04 0.262533 0.229524 29794 239141 -1 2164 24 2275 3274 346015 70595 4.53181 4.53181 -153.712 -4.53181 0 0 1.19926e+06 4149.71 0.45 0.11 0.24 -1 -1 0.45 0.031482 0.0280511 89 62 -1 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67348 32 32 412 334 1 182 89 17 17 289 -1 unnamed_device 27.3 MiB 1.15 1008 14543 5389 7197 1957 65.8 MiB 0.11 0.00 3.70954 -138.278 -3.70954 3.70954 0.92 0.00057382 0.000520757 0.0448382 0.0406107 40 2412 20 6.95648e+06 361892 706193. 2443.58 2.13 0.16028 0.141512 26914 176310 -1 2154 19 1653 2182 212075 52958 3.94551 3.94551 -149.35 -3.94551 0 0 926341. 3205.33 0.34 0.08 0.16 -1 -1 0.34 0.0261995 0.0234177 81 87 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_120.v common 8.75 vpr 65.38 MiB -1 -1 0.16 20668 1 0.03 -1 -1 33600 -1 -1 10 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66944 32 32 376 318 1 154 74 17 17 289 -1 unnamed_device 26.8 MiB 3.21 599 11389 4446 5401 1542 65.4 MiB 0.09 0.00 2.96105 -112.244 -2.96105 2.96105 0.92 0.000511549 0.000465974 0.0410275 0.0374909 38 1957 49 6.95648e+06 144757 678818. 2348.85 2.27 0.169195 0.148764 26626 170182 -1 1545 21 1439 1962 170499 37127 3.32342 3.32342 -127.868 -3.32342 0 0 902133. 3121.57 0.34 0.07 0.16 -1 -1 0.34 0.0248949 0.0220564 61 93 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_121.v common 9.54 vpr 65.23 MiB -1 -1 0.15 20448 1 0.03 -1 -1 33848 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66792 32 32 360 293 1 172 86 17 17 289 -1 unnamed_device 26.8 MiB 1.14 728 11993 4280 5583 2130 65.2 MiB 0.08 0.00 4.11943 -125.672 -4.11943 4.11943 0.93 0.000446952 0.000406227 0.033114 0.03018 44 2660 42 6.95648e+06 318465 787024. 2723.27 5.08 0.239462 0.207535 27778 195446 -1 1849 23 1170 1786 148503 34066 3.72046 3.72046 -123.66 -3.72046 0 0 997811. 3452.63 0.38 0.07 0.19 -1 -1 0.38 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66320 30 32 224 207 1 132 73 17 17 289 -1 unnamed_device 26.3 MiB 2.78 506 10409 4642 5419 348 64.8 MiB 0.06 0.00 2.68965 -94.6691 -2.68965 2.68965 0.93 0.000346012 0.000314475 0.0261688 0.0238732 38 1556 24 6.95648e+06 159232 678818. 2348.85 4.13 0.141157 0.122128 26626 170182 -1 1195 19 802 1041 94426 20467 2.45462 2.45462 -95.1551 -2.45462 0 0 902133. 3121.57 0.33 0.05 0.16 -1 -1 0.33 0.0164791 0.0146457 52 29 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_124.v common 10.43 vpr 65.23 MiB -1 -1 0.15 20476 1 0.03 -1 -1 33960 -1 -1 11 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66792 30 32 286 239 1 135 73 17 17 289 -1 unnamed_device 26.8 MiB 1.61 453 9649 4016 5181 452 65.2 MiB 0.07 0.00 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GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67132 32 32 376 307 1 178 76 17 17 289 -1 unnamed_device 27.1 MiB 1.92 736 10796 3697 5176 1923 65.6 MiB 0.09 0.00 3.75962 -125.032 -3.75962 3.75962 0.90 0.000526048 0.000478975 0.0381008 0.0347675 46 3469 47 6.95648e+06 173708 828058. 2865.25 21.11 0.311609 0.27107 28066 200906 -1 2274 26 1722 2861 316286 80992 4.55982 4.55982 -147.737 -4.55982 0 0 1.01997e+06 3529.29 0.39 0.11 0.20 -1 -1 0.39 0.0309111 0.0273732 73 69 -1 -1 -1 -1 -fixed_k6_frac_2ripple_N8_22nm.xml mult_128.v common 16.12 vpr 65.73 MiB -1 -1 0.18 20408 1 0.03 -1 -1 33940 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67308 31 32 409 331 1 183 80 17 17 289 -1 unnamed_device 27.2 MiB 1.09 761 10744 4472 5806 466 65.7 MiB 0.08 0.00 4.07648 -139.886 -4.07648 4.07648 0.88 0.00056105 0.000511811 0.0377016 0.0344449 40 2524 30 6.95648e+06 246087 706193. 2443.58 11.79 0.319213 0.279264 26914 176310 -1 2082 24 1894 2565 277033 61234 3.75172 3.75172 -141.408 -3.75172 0 0 926341. 3205.33 0.34 0.10 0.16 -1 -1 0.34 0.0303157 0.0268398 80 86 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_001.v common 7.17 vpr 65.20 MiB -1 -1 0.16 20464 1 0.03 -1 -1 33988 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66764 32 32 354 285 1 206 79 17 17 289 -1 unnamed_device 26.8 MiB 1.73 820 12416 4576 5562 2278 65.2 MiB 0.09 0.00 5.01635 -146.768 -5.01635 5.01635 0.87 0.000483925 0.000435888 0.0370353 0.0337885 50 2377 29 6.99608e+06 220735 902133. 3121.57 2.15 0.140086 0.123388 28642 213929 -1 1909 22 1605 2314 176575 41070 4.26721 4.26721 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66732 32 32 299 247 1 183 78 17 17 289 -1 unnamed_device 26.7 MiB 0.87 839 12196 5162 6681 353 65.2 MiB 0.08 0.00 3.55379 -113.123 -3.55379 3.55379 0.92 0.000397962 0.000359775 0.0332116 0.0301214 46 2261 50 6.99608e+06 206020 828058. 2865.25 5.27 0.215435 0.186877 28066 200906 -1 1688 21 1220 1684 108708 25079 3.33991 3.33991 -112.007 -3.33991 0 0 1.01997e+06 3529.29 0.40 0.05 0.18 -1 -1 0.40 0.0206343 0.0183143 76 26 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_004.v common 7.48 vpr 65.12 MiB -1 -1 0.15 20232 1 0.03 -1 -1 33984 -1 -1 16 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66684 29 32 308 248 1 179 77 17 17 289 -1 unnamed_device 26.5 MiB 1.55 700 12302 4830 6041 1431 65.1 MiB 0.09 0.00 4.05128 -116.185 -4.05128 4.05128 0.93 0.000462262 0.000420921 0.0374133 0.0341596 44 2703 50 6.99608e+06 235451 787024. 2723.27 2.56 0.169995 0.149136 27778 195446 -1 1833 21 1187 1876 151742 33849 3.80801 3.80801 -121.421 -3.80801 0 0 997811. 3452.63 0.39 0.06 0.19 -1 -1 0.39 0.0220082 0.0195215 78 25 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_005.v common 8.90 vpr 65.34 MiB -1 -1 0.16 20268 1 0.03 -1 -1 33472 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66908 32 32 336 268 1 194 78 17 17 289 -1 unnamed_device 27.0 MiB 2.92 903 10204 4241 5732 231 65.3 MiB 0.08 0.00 4.44731 -141.413 -4.44731 4.44731 0.94 0.000509421 0.00045858 0.0332986 0.0303593 40 3203 32 6.99608e+06 206020 706193. 2443.58 2.59 0.142659 0.12485 26914 176310 -1 2582 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0.03 -1 -1 34136 -1 -1 15 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66600 27 32 259 221 1 154 74 17 17 289 -1 unnamed_device 26.6 MiB 1.72 527 10769 4406 5481 882 65.0 MiB 0.07 0.00 3.89582 -110.808 -3.89582 3.89582 0.92 0.000387886 0.000352524 0.0291034 0.0265696 36 2292 38 6.99608e+06 220735 648988. 2245.63 2.40 0.122155 0.107091 26050 158493 -1 1359 21 1244 1818 169708 37451 3.29456 3.29456 -109.219 -3.29456 0 0 828058. 2865.25 0.33 0.06 0.15 -1 -1 0.33 0.0190884 0.0168897 66 26 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_008.v common 14.79 vpr 65.13 MiB -1 -1 0.15 20100 1 0.03 -1 -1 33964 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66692 31 32 271 219 1 157 88 17 17 289 -1 unnamed_device 26.6 MiB 0.39 664 11203 3028 6067 2108 65.1 MiB 0.08 0.00 2.75465 -88.1636 -2.75465 2.75465 0.92 0.000424789 0.000386943 0.0266542 0.0243112 40 2155 26 6.99608e+06 367892 706193. 2443.58 11.16 0.233094 0.203111 26914 176310 -1 1692 20 1158 1910 156293 36151 2.88741 2.88741 -100.184 -2.88741 0 0 926341. 3205.33 0.36 0.06 0.17 -1 -1 0.36 0.019927 0.0176655 69 -1 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_009.v common 6.59 vpr 65.40 MiB -1 -1 0.16 20612 1 0.03 -1 -1 34016 -1 -1 14 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66972 31 32 317 271 1 204 77 17 17 289 -1 unnamed_device 27.0 MiB 1.02 886 12302 5141 6872 289 65.4 MiB 0.09 0.00 3.35914 -124.887 -3.35914 3.35914 0.92 0.000460079 0.000419943 0.036954 0.0337003 38 2606 25 6.99608e+06 206020 678818. 2348.85 2.31 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66744 32 32 276 237 1 165 75 17 17 289 -1 unnamed_device 26.7 MiB 0.76 784 8133 1910 6031 192 65.2 MiB 0.06 0.00 3.27288 -116.653 -3.27288 3.27288 0.91 0.000418765 0.0003765 0.02363 0.021642 42 2243 48 6.99608e+06 161872 744469. 2576.02 4.46 0.171289 0.148211 27202 183097 -1 1765 18 1184 1528 133685 27691 3.25642 3.25642 -118.512 -3.25642 0 0 949917. 3286.91 0.35 0.05 0.18 -1 -1 0.35 0.0170088 0.0151195 66 31 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_013.v common 6.85 vpr 65.05 MiB -1 -1 0.16 20600 1 0.03 -1 -1 33968 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66616 32 32 344 272 1 201 79 17 17 289 -1 unnamed_device 26.6 MiB 0.92 822 13937 5978 7482 477 65.1 MiB 0.11 0.00 3.95082 -133.749 -3.95082 3.95082 0.92 0.000510435 0.000465777 0.0449979 0.0411941 44 2826 40 6.99608e+06 220735 787024. 2723.27 2.57 0.178084 0.156823 27778 195446 -1 2114 22 1906 2780 212010 46158 3.47486 3.47486 -129.119 -3.47486 0 0 997811. 3452.63 0.38 0.08 0.19 -1 -1 0.38 0.0251021 0.0222774 87 31 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_014.v common 21.56 vpr 65.61 MiB -1 -1 0.16 20604 1 0.03 -1 -1 33760 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67188 32 32 363 295 1 228 81 17 17 289 -1 unnamed_device 27.1 MiB 1.59 975 9706 2651 5494 1561 65.6 MiB 0.09 0.00 4.79397 -141.28 -4.79397 4.79397 0.91 0.000532358 0.000486545 0.0317101 0.02898 40 3303 38 6.99608e+06 250167 706193. 2443.58 16.61 0.314783 0.275522 26914 176310 -1 2620 23 2520 3437 448745 95617 4.80751 4.80751 -162.56 -4.80751 0 0 926341. 3205.33 0.35 0.13 0.17 -1 -1 0.35 0.0299887 0.0267759 97 58 -1 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66812 32 32 370 297 1 222 80 17 17 289 -1 unnamed_device 26.8 MiB 1.43 999 13840 5885 7630 325 65.2 MiB 0.11 0.00 3.63599 -124.523 -3.63599 3.63599 0.92 0.000537379 0.000489757 0.0455688 0.0414688 42 3382 43 6.99608e+06 235451 744469. 2576.02 2.42 0.174502 0.153623 27202 183097 -1 2337 22 1991 3046 222901 49590 3.85421 3.85421 -132.716 -3.85421 0 0 949917. 3286.91 0.37 0.08 0.17 -1 -1 0.37 0.0279754 0.0248066 96 55 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_017.v common 6.19 vpr 65.43 MiB -1 -1 0.16 20536 1 0.03 -1 -1 33868 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66996 32 32 338 269 1 198 79 17 17 289 -1 unnamed_device 27.1 MiB 0.86 791 13092 5076 6583 1433 65.4 MiB 0.10 0.00 4.34151 -134.806 -4.34151 4.34151 0.87 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66760 31 32 291 243 1 171 76 17 17 289 -1 unnamed_device 26.7 MiB 2.35 843 8236 2227 5366 643 65.2 MiB 0.06 0.00 3.78247 -126.288 -3.78247 3.78247 0.90 0.000420582 0.00038269 0.0244959 0.0223685 38 2536 29 6.99608e+06 191304 678818. 2348.85 4.48 0.177675 0.153642 26626 170182 -1 2106 23 1547 2212 217668 42716 3.58136 3.58136 -136.48 -3.58136 0 0 902133. 3121.57 0.34 0.07 0.17 -1 -1 0.34 0.0217948 0.0192768 72 30 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_021.v common 7.13 vpr 64.94 MiB -1 -1 0.16 20644 1 0.03 -1 -1 34080 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66496 32 32 342 271 1 201 84 17 17 289 -1 unnamed_device 26.6 MiB 1.51 802 15273 5455 7440 2378 64.9 MiB 0.11 0.00 3.98218 -132.203 -3.98218 3.98218 0.91 0.000504509 0.000458572 0.0453157 0.0413266 44 2430 42 6.99608e+06 294314 787024. 2723.27 2.28 0.184353 0.162255 27778 195446 -1 2006 22 2002 2886 210270 47858 3.85615 3.85615 -138.988 -3.85615 0 0 997811. 3452.63 0.39 0.08 0.19 -1 -1 0.39 0.0256819 0.0228193 88 31 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_022.v common 11.45 vpr 65.47 MiB -1 -1 0.16 20700 1 0.03 -1 -1 33852 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67044 32 32 372 300 1 225 80 17 17 289 -1 unnamed_device 27.0 MiB 2.51 1225 15044 5236 8229 1579 65.5 MiB 0.12 0.00 4.6726 -146.803 -4.6726 4.6726 0.92 0.000533369 0.000487239 0.0497205 0.0454671 40 3256 42 6.99608e+06 235451 706193. 2443.58 5.57 0.204241 0.180657 26914 176310 -1 2959 22 2174 3170 324163 61807 4.397 4.397 -154.131 -4.397 0 0 926341. 3205.33 0.35 0.10 0.17 -1 -1 0.35 0.0285952 0.0255082 100 59 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_023.v common 9.42 vpr 64.75 MiB -1 -1 0.14 19996 1 0.03 -1 -1 34028 -1 -1 13 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66308 26 32 190 182 1 123 71 17 17 289 -1 unnamed_device 26.3 MiB 2.34 422 8539 3493 4523 523 64.8 MiB 0.05 0.00 2.7298 -77.3475 -2.7298 2.7298 0.91 0.000302433 0.00027557 0.0194896 0.0178214 38 1230 26 6.99608e+06 191304 678818. 2348.85 3.97 0.131323 0.113346 26626 170182 -1 988 17 660 740 59916 14111 2.52491 2.52491 -76.7508 -2.52491 0 0 902133. 3121.57 0.34 0.03 0.17 -1 -1 0.34 0.013074 0.0116894 53 21 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_024.v common 8.70 vpr 64.78 MiB -1 -1 0.13 20152 1 0.03 -1 -1 33788 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66332 32 32 285 227 1 162 79 17 17 289 -1 unnamed_device 26.3 MiB 1.08 692 10050 3569 4878 1603 64.8 MiB 0.07 0.00 4.56174 -113.848 -4.56174 4.56174 0.91 0.000428232 0.000388963 0.0280353 0.025583 40 2097 25 6.99608e+06 220735 706193. 2443.58 4.40 0.187332 0.162486 26914 176310 -1 1605 23 1263 2079 137488 34805 3.61236 3.61236 -117.368 -3.61236 0 0 926341. 3205.33 0.36 0.06 0.16 -1 -1 0.36 0.0227475 0.020175 66 -1 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_025.v common 5.29 vpr 64.32 MiB -1 -1 0.12 19864 1 0.03 -1 -1 33624 -1 -1 8 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65868 32 32 173 169 1 112 72 17 17 289 -1 unnamed_device 26.0 MiB 0.23 399 10055 4241 5582 232 64.3 MiB 0.06 0.00 2.06111 -67.7592 -2.06111 2.06111 0.92 0.000299165 0.000271322 0.0216467 0.0196924 36 1381 35 6.99608e+06 117725 648988. 2245.63 1.99 0.09418 0.08178 26050 158493 -1 935 18 613 680 59062 14806 1.90102 1.90102 -72.2718 -1.90102 0 0 828058. 2865.25 0.32 0.04 0.15 -1 -1 0.32 0.0130402 0.0115803 42 -1 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_026.v common 6.84 vpr 64.82 MiB -1 -1 0.15 20476 1 0.03 -1 -1 33792 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66372 32 32 300 245 1 178 78 17 17 289 -1 unnamed_device 26.3 MiB 1.29 805 13358 5696 7249 413 64.8 MiB 0.10 0.00 4.47086 -121.677 -4.47086 4.47086 0.92 0.000455458 0.00041661 0.039091 0.0357033 38 2634 33 6.99608e+06 206020 678818. 2348.85 2.31 0.140899 0.123774 26626 170182 -1 2001 18 1258 1814 144356 32185 4.05506 4.05506 -129.534 -4.05506 0 0 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66412 32 32 338 277 1 205 79 17 17 289 -1 unnamed_device 26.5 MiB 1.70 800 6839 1729 4140 970 64.9 MiB 0.06 0.00 4.20669 -125.419 -4.20669 4.20669 0.90 0.0004914 0.000448351 0.0219086 0.0200545 46 2866 37 6.99608e+06 220735 828058. 2865.25 16.40 0.260928 0.226109 28066 200906 -1 1963 27 1930 2965 207915 54574 3.98026 3.98026 -130.663 -3.98026 0 0 1.01997e+06 3529.29 0.38 0.09 0.20 -1 -1 0.38 0.0284892 0.025116 87 47 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_029.v common 10.00 vpr 64.87 MiB -1 -1 0.15 20144 1 0.03 -1 -1 33760 -1 -1 12 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66424 32 32 284 241 1 168 76 17 17 289 -1 unnamed_device 26.4 MiB 2.47 688 11116 4644 6232 240 64.9 MiB 0.08 0.00 3.13575 -107.33 -3.13575 3.13575 0.93 0.000428665 0.000391157 0.0319454 0.0291598 40 2069 25 6.99608e+06 176588 706193. 2443.58 4.31 0.176975 0.153193 26914 176310 -1 1705 19 1205 1671 144211 32934 2.85647 2.85647 -115.13 -2.85647 0 0 926341. 3205.33 0.34 0.06 0.17 -1 -1 0.34 0.0193962 0.0172106 69 31 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_030.v common 7.75 vpr 65.11 MiB -1 -1 0.15 20424 1 0.03 -1 -1 33600 -1 -1 14 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 30 32 262 227 1 160 76 17 17 289 -1 unnamed_device 26.7 MiB 1.58 579 8876 3271 4297 1308 65.1 MiB 0.06 0.00 3.70857 -107.816 -3.70857 3.70857 0.91 0.000394713 0.000359612 0.0245716 0.0224686 46 2274 40 6.99608e+06 206020 828058. 2865.25 2.93 0.122538 0.107771 28066 200906 -1 1494 18 1131 1685 141949 32817 3.31781 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success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66212 32 32 253 210 1 149 74 17 17 289 -1 unnamed_device 26.1 MiB 0.43 677 11234 4696 6284 254 64.7 MiB 0.07 0.00 3.31833 -109.934 -3.31833 3.31833 0.93 0.000425625 0.000386923 0.0310569 0.0283721 38 2069 49 6.99608e+06 147157 678818. 2348.85 2.63 0.138966 0.121043 26626 170182 -1 1632 22 1173 1750 152835 32234 3.08097 3.08097 -114.127 -3.08097 0 0 902133. 3121.57 0.33 0.06 0.17 -1 -1 0.33 0.0205199 0.0181923 58 -1 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_033.v common 7.12 vpr 64.94 MiB -1 -1 0.16 20248 1 0.03 -1 -1 33544 -1 -1 13 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66500 31 32 271 231 1 165 76 17 17 289 -1 unnamed_device 26.5 MiB 1.00 656 7596 1857 5260 479 64.9 MiB 0.06 0.00 3.30918 -105.476 -3.30918 3.30918 0.93 0.000413902 0.00037684 0.0221067 0.0202451 36 2831 44 6.99608e+06 191304 648988. 2245.63 2.94 0.117237 0.102309 26050 158493 -1 1963 22 1288 1769 137287 33344 3.28422 3.28422 -119.957 -3.28422 0 0 828058. 2865.25 0.33 0.06 0.16 -1 -1 0.33 0.02022 0.0178674 69 26 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_034.v common 8.01 vpr 65.12 MiB -1 -1 0.16 20212 1 0.03 -1 -1 33680 -1 -1 15 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66684 29 32 291 250 1 180 76 17 17 289 -1 unnamed_device 26.6 MiB 2.88 919 9036 2362 6094 580 65.1 MiB 0.06 0.00 2.93125 -106.214 -2.93125 2.93125 0.92 0.000426419 0.000387565 0.0257187 0.0235001 38 2275 29 6.99608e+06 220735 678818. 2348.85 1.92 0.103438 0.0904464 26626 170182 -1 1906 20 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66956 31 32 352 285 1 215 79 17 17 289 -1 unnamed_device 27.0 MiB 2.37 879 13768 5339 6393 2036 65.4 MiB 0.11 0.00 3.89582 -126.245 -3.89582 3.89582 0.91 0.00051052 0.000465516 0.0437545 0.0399566 54 2532 25 6.99608e+06 235451 949917. 3286.91 5.45 0.237219 0.206743 29506 232905 -1 1991 21 1567 2125 189300 39017 3.55316 3.55316 -123.951 -3.55316 0 0 1.17392e+06 4061.99 0.45 0.07 0.23 -1 -1 0.45 0.025411 0.02261 93 51 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_042.v common 19.21 vpr 65.21 MiB -1 -1 0.15 20192 1 0.03 -1 -1 33712 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66776 32 32 291 242 1 178 78 17 17 289 -1 unnamed_device 26.7 MiB 1.06 818 11864 4957 6528 379 65.2 MiB 0.07 0.00 3.99218 -112.33 -3.99218 3.99218 0.86 0.000388638 0.000354923 0.0300181 0.0274465 40 2655 45 6.99608e+06 206020 706193. 2443.58 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66748 31 32 337 267 1 200 78 17 17 289 -1 unnamed_device 26.8 MiB 0.70 792 13524 5096 6588 1840 65.2 MiB 0.10 0.00 4.60267 -142.66 -4.60267 4.60267 0.88 0.000489414 0.000451811 0.0422257 0.0384594 52 2817 39 6.99608e+06 220735 926341. 3205.33 5.40 0.223187 0.194488 29218 227130 -1 1873 23 1635 2275 182344 41764 4.12671 4.12671 -138.837 -4.12671 0 0 1.14541e+06 3963.36 0.42 0.07 0.22 -1 -1 0.42 0.0251886 0.0222632 85 30 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_046.v common 25.48 vpr 65.41 MiB -1 -1 0.17 20508 1 0.03 -1 -1 33456 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66976 32 32 349 284 1 213 79 17 17 289 -1 unnamed_device 27.0 MiB 1.41 1020 12416 4555 6119 1742 65.4 MiB 0.10 0.00 3.83208 -127.177 -3.83208 3.83208 0.92 0.000505438 0.000461956 0.0401764 0.0367112 42 3450 36 6.99608e+06 220735 744469. 2576.02 20.74 0.283403 0.247016 27202 183097 -1 2539 19 1614 2491 229704 48395 3.46042 3.46042 -128.596 -3.46042 0 0 949917. 3286.91 0.37 0.08 0.18 -1 -1 0.37 0.0236063 0.0210592 91 50 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_047.v common 7.77 vpr 65.11 MiB -1 -1 0.14 20324 1 0.03 -1 -1 33992 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66668 32 32 291 230 1 166 80 17 17 289 -1 unnamed_device 26.6 MiB 0.95 673 10228 2970 5232 2026 65.1 MiB 0.07 0.00 4.31309 -118.378 -4.31309 4.31309 0.92 0.00046046 0.000419644 0.0292112 0.0266735 40 2459 37 6.99608e+06 235451 706193. 2443.58 3.58 0.146884 0.128504 26914 176310 -1 1893 23 1363 2339 206113 46973 4.01142 4.01142 -127.274 -4.01142 0 0 926341. 3205.33 0.35 0.08 0.17 -1 -1 0.35 0.022998 0.0203347 68 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67088 32 32 361 291 1 216 79 17 17 289 -1 unnamed_device 27.0 MiB 1.78 1099 13430 4920 6010 2500 65.5 MiB 0.11 0.00 3.65969 -129.38 -3.65969 3.65969 0.91 0.000518411 0.000471618 0.0435778 0.0398068 40 2995 22 6.99608e+06 220735 706193. 2443.58 3.03 0.17179 0.15186 26914 176310 -1 2604 43 2315 3605 725612 310216 3.48731 3.48731 -133.555 -3.48731 0 0 926341. 3205.33 0.35 0.25 0.17 -1 -1 0.35 0.0475929 0.0420816 92 52 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_050.v common 8.74 vpr 65.59 MiB -1 -1 0.16 20492 1 0.03 -1 -1 33828 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67160 32 32 382 305 1 237 80 17 17 289 -1 unnamed_device 27.0 MiB 2.68 1101 15216 5672 7066 2478 65.6 MiB 0.12 0.00 3.74401 -128.073 -3.74401 3.74401 0.91 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66784 31 32 373 299 1 224 79 17 17 289 -1 unnamed_device 26.8 MiB 1.00 950 10726 4120 5384 1222 65.2 MiB 0.09 0.00 4.31211 -136.261 -4.31211 4.31211 0.92 0.000546397 0.000502373 0.036739 0.0334947 48 3520 36 6.99608e+06 235451 865456. 2994.66 2.84 0.151068 0.132657 28354 207349 -1 2537 37 2842 4365 548908 166410 4.26266 4.26266 -143.635 -4.26266 0 0 1.05005e+06 3633.38 0.39 0.17 0.20 -1 -1 0.39 0.0388478 0.0340138 99 58 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_054.v common 8.22 vpr 65.46 MiB -1 -1 0.16 20444 1 0.03 -1 -1 33852 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67036 32 32 387 315 1 241 80 17 17 289 -1 unnamed_device 26.9 MiB 1.10 977 12980 5460 6998 522 65.5 MiB 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66816 32 32 387 293 1 226 80 17 17 289 -1 unnamed_device 26.7 MiB 1.19 950 12808 5316 6896 596 65.2 MiB 0.11 0.00 4.80548 -149.393 -4.80548 4.80548 0.92 0.000593504 0.000544102 0.0448247 0.0410046 50 3454 27 6.99608e+06 235451 902133. 3121.57 21.78 0.345938 0.303046 28642 213929 -1 2403 29 2499 3801 392900 102108 5.00186 5.00186 -162.712 -5.00186 0 0 1.08113e+06 3740.92 0.41 0.13 0.21 -1 -1 0.41 0.0353471 0.0312688 98 28 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_058.v common 7.94 vpr 65.16 MiB -1 -1 0.16 20620 1 0.03 -1 -1 33680 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66724 32 32 340 270 1 203 79 17 17 289 -1 unnamed_device 26.8 MiB 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77 17 17 289 -1 unnamed_device 26.1 MiB 0.25 516 10672 4080 5320 1272 64.5 MiB 0.06 0.00 2.96036 -91.6204 -2.96036 2.96036 0.93 0.000371046 0.000336173 0.0264421 0.0241638 40 1546 38 6.99608e+06 191304 706193. 2443.58 8.29 0.212326 0.183684 26914 176310 -1 1189 18 859 1340 90198 25029 2.86132 2.86132 -98.2156 -2.86132 0 0 926341. 3205.33 0.34 0.05 0.17 -1 -1 0.34 0.0164226 0.0145876 51 -1 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_063.v common 20.77 vpr 65.46 MiB -1 -1 0.15 20820 1 0.03 -1 -1 33848 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67032 32 32 349 273 1 207 80 17 17 289 -1 unnamed_device 27.1 MiB 1.42 903 15560 6646 7056 1858 65.5 MiB 0.11 0.00 4.75332 -131.249 -4.75332 4.75332 0.89 0.000518406 0.000460496 0.048369 0.0441035 48 2982 46 6.99608e+06 235451 865456. 2994.66 16.02 0.323525 0.282807 28354 207349 -1 2202 23 1722 2767 230689 51369 4.63516 4.63516 -141.993 -4.63516 0 0 1.05005e+06 3633.38 0.39 0.08 0.19 -1 -1 0.39 0.0256821 0.0227697 85 26 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_064.v common 6.94 vpr 64.99 MiB -1 -1 0.14 20292 1 0.03 -1 -1 33856 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 247 207 1 142 78 17 17 289 -1 unnamed_device 26.4 MiB 1.03 493 9540 2740 5276 1524 65.0 MiB 0.06 0.00 2.966 -97.1273 -2.966 2.966 0.92 0.000396255 0.000360261 0.0248049 0.0226393 38 1851 39 6.99608e+06 206020 678818. 2348.85 2.75 0.133324 0.116723 26626 170182 -1 1279 23 1077 1568 111684 26906 3.55017 3.55017 -109.108 -3.55017 0 0 902133. 3121.57 0.34 0.06 0.16 -1 -1 0.34 0.020514 0.0181257 57 -1 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_065.v common 7.51 vpr 64.89 MiB -1 -1 0.16 20288 1 0.03 -1 -1 33580 -1 -1 13 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66444 30 32 278 235 1 170 75 17 17 289 -1 unnamed_device 26.4 MiB 0.68 768 9081 3737 5047 297 64.9 MiB 0.07 0.00 3.80347 -118.428 -3.80347 3.80347 0.92 0.000439536 0.000402439 0.0268342 0.0244907 38 2446 44 6.99608e+06 191304 678818. 2348.85 3.61 0.142439 0.124355 26626 170182 -1 1772 21 1331 1863 163805 32644 3.34751 3.34751 -114.704 -3.34751 0 0 902133. 3121.57 0.34 0.06 0.16 -1 -1 0.34 0.0208849 0.0185742 69 29 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_066.v common 8.17 vpr 65.57 MiB -1 -1 0.17 20688 1 0.03 -1 -1 33608 -1 -1 18 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67144 29 32 355 287 1 213 79 17 17 289 -1 unnamed_device 27.1 MiB 1.90 956 12416 5112 6468 836 65.6 MiB 0.10 0.00 4.12666 -129.088 -4.12666 4.12666 0.92 0.000535236 0.000492155 0.0400105 0.0365327 38 3346 46 6.99608e+06 264882 678818. 2348.85 2.92 0.16503 0.144941 26626 170182 -1 2546 22 1925 2830 259948 53297 4.4105 4.4105 -145.109 -4.4105 0 0 902133. 3121.57 0.36 0.09 0.17 -1 -1 0.36 0.0274571 0.0244233 97 56 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_067.v common 8.91 vpr 65.26 MiB -1 -1 0.16 20600 1 0.03 -1 -1 33924 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66824 32 32 358 289 1 217 79 17 17 289 -1 unnamed_device 26.8 MiB 1.69 974 13599 5339 6861 1399 65.3 MiB 0.11 0.00 4.25698 -140.266 -4.25698 4.25698 0.92 0.000516664 0.000470129 0.0443707 0.0404738 38 3070 41 6.99608e+06 220735 678818. 2348.85 3.91 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64.94 MiB -1 -1 0.15 20124 1 0.03 -1 -1 33584 -1 -1 11 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66496 32 32 276 237 1 163 75 17 17 289 -1 unnamed_device 26.5 MiB 2.28 854 11609 4663 6043 903 64.9 MiB 0.08 0.00 3.95082 -130.122 -3.95082 3.95082 0.90 0.000415192 0.000378599 0.0334915 0.0305527 38 2338 24 6.99608e+06 161872 678818. 2348.85 2.50 0.132159 0.115847 26626 170182 -1 1952 23 1202 1634 138008 27635 3.34956 3.34956 -121.518 -3.34956 0 0 902133. 3121.57 0.34 0.06 0.17 -1 -1 0.34 0.0218788 0.0193617 67 31 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_070.v common 6.86 vpr 65.18 MiB -1 -1 0.16 20616 1 0.03 -1 -1 34000 -1 -1 14 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66744 31 32 319 272 1 200 77 17 17 289 -1 unnamed_device 26.8 MiB 1.00 785 11813 4965 6422 426 65.2 MiB 0.09 0.00 3.70143 -122.026 -3.70143 3.70143 0.91 0.000446596 0.000409231 0.0358874 0.0327736 46 2466 44 6.99608e+06 206020 828058. 2865.25 2.54 0.16834 0.147994 28066 200906 -1 1742 24 1592 2267 169951 39702 3.57132 3.57132 -119.748 -3.57132 0 0 1.01997e+06 3529.29 0.39 0.07 0.19 -1 -1 0.39 0.0249189 0.0221129 86 60 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_071.v common 9.66 vpr 65.36 MiB -1 -1 0.15 20672 1 0.03 -1 -1 34028 -1 -1 19 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66932 30 32 329 273 1 202 81 17 17 289 -1 unnamed_device 26.9 MiB 1.36 809 10756 2943 5618 2195 65.4 MiB 0.08 0.00 3.4598 -111.751 -3.4598 3.4598 0.91 0.000470758 0.000429096 0.0316238 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 335 282 1 216 78 17 17 289 -1 unnamed_device 26.5 MiB 0.93 988 11366 4377 5078 1911 65.0 MiB 0.09 0.00 3.4477 -126.272 -3.4477 3.4477 0.93 0.000488388 0.000445787 0.0359505 0.0328559 40 3223 42 6.99608e+06 206020 706193. 2443.58 4.29 0.166114 0.145472 26914 176310 -1 2772 21 2024 2787 332780 64435 3.28857 3.28857 -136.411 -3.28857 0 0 926341. 3205.33 0.34 0.09 0.17 -1 -1 0.34 0.0234909 0.0208233 93 62 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_075.v common 9.04 vpr 64.79 MiB -1 -1 0.13 20216 1 0.03 -1 -1 33896 -1 -1 24 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66344 31 32 293 230 1 168 87 17 17 289 -1 unnamed_device 26.3 MiB 0.43 735 13335 5144 6746 1445 64.8 MiB 0.09 0.00 4.50448 -121.497 -4.50448 4.50448 0.92 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0.00 4.31695 -124.149 -4.31695 4.31695 0.91 0.000419829 0.000383719 0.0256412 0.0234776 42 2236 38 6.99608e+06 191304 744469. 2576.02 2.29 0.129362 0.112713 27202 183097 -1 1564 19 1116 1583 126166 28470 3.33556 3.33556 -115.866 -3.33556 0 0 949917. 3286.91 0.35 0.06 0.18 -1 -1 0.35 0.018777 0.0167322 71 29 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_080.v common 10.02 vpr 65.52 MiB -1 -1 0.15 20580 1 0.03 -1 -1 33952 -1 -1 18 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67092 30 32 375 299 1 233 80 17 17 289 -1 unnamed_device 27.1 MiB 1.09 919 12808 4622 5804 2382 65.5 MiB 0.10 0.00 5.00926 -154.589 -5.00926 5.00926 0.92 0.00054069 0.00049358 0.0426545 0.0390008 48 2897 47 6.99608e+06 264882 865456. 2994.66 5.50 0.260096 0.22623 28354 207349 -1 2329 23 2356 3266 309320 75619 4.83874 4.83874 -164.15 -4.83874 0 0 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67084 31 32 340 275 1 199 80 17 17 289 -1 unnamed_device 27.1 MiB 1.30 794 10228 3166 5486 1576 65.5 MiB 0.08 0.00 5.19565 -143.212 -5.19565 5.19565 0.92 0.000490519 0.000447272 0.0330313 0.0301792 42 2712 27 6.99608e+06 250167 744469. 2576.02 2.17 0.134158 0.117727 27202 183097 -1 2054 20 1322 1912 169320 36759 4.33151 4.33151 -137.058 -4.33151 0 0 949917. 3286.91 0.37 0.07 0.18 -1 -1 0.37 0.0234878 0.0209129 87 43 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_083.v common 8.78 vpr 65.28 MiB -1 -1 0.16 20404 1 0.03 -1 -1 34000 -1 -1 20 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66844 30 32 377 310 1 234 82 17 17 289 -1 unnamed_device 26.7 MiB 2.25 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66464 27 32 255 219 1 145 74 17 17 289 -1 unnamed_device 26.5 MiB 1.09 490 9374 3097 4710 1567 64.9 MiB 0.06 0.00 3.44679 -100.328 -3.44679 3.44679 0.91 0.000394823 0.000361121 0.0256528 0.0235317 38 1628 40 6.99608e+06 220735 678818. 2348.85 3.37 0.129689 0.113241 26626 170182 -1 1015 22 964 1436 85969 21901 3.78332 3.78332 -105.678 -3.78332 0 0 902133. 3121.57 0.33 0.05 0.17 -1 -1 0.33 0.018981 0.0167138 66 26 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_096.v common 11.16 vpr 65.90 MiB -1 -1 0.16 20596 1 0.03 -1 -1 33976 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67480 32 32 421 327 1 257 82 17 17 289 -1 unnamed_device 27.5 MiB 0.95 1154 16102 6967 8731 404 65.9 MiB 0.14 0.00 4.18254 -144.202 -4.18254 4.18254 0.90 0.000579852 0.000526836 0.0554539 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2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66592 32 32 326 263 1 197 79 17 17 289 -1 unnamed_device 26.7 MiB 0.78 1057 13599 5180 6238 2181 65.0 MiB 0.11 0.00 4.11318 -134.456 -4.11318 4.11318 0.91 0.000477805 0.000436075 0.0411999 0.0376181 38 2724 25 6.99608e+06 220735 678818. 2348.85 2.56 0.155153 0.136644 26626 170182 -1 2270 21 1412 1911 157008 31445 3.87982 3.87982 -137.691 -3.87982 0 0 902133. 3121.57 0.34 0.07 0.16 -1 -1 0.34 0.0242072 0.0215316 81 31 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_100.v common 9.95 vpr 65.64 MiB -1 -1 0.16 20544 1 0.03 -1 -1 33548 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67220 31 32 373 294 1 221 80 17 17 289 -1 unnamed_device 27.1 MiB 1.61 870 12120 4959 6494 667 65.6 MiB 0.10 0.00 4.09557 -123.875 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66672 29 32 262 224 1 162 74 17 17 289 -1 unnamed_device 26.7 MiB 1.07 586 8909 3659 4796 454 65.1 MiB 0.06 0.00 3.79267 -108.98 -3.79267 3.79267 0.93 0.000362169 0.000324165 0.0251072 0.0229264 44 2352 39 6.99608e+06 191304 787024. 2723.27 2.41 0.115075 0.100186 27778 195446 -1 1570 31 1378 1749 242201 105330 3.57531 3.57531 -110.334 -3.57531 0 0 997811. 3452.63 0.39 0.11 0.19 -1 -1 0.39 0.0271784 0.023938 68 25 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_108.v common 7.22 vpr 64.75 MiB -1 -1 0.14 20584 1 0.03 -1 -1 33716 -1 -1 12 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 32 32 278 238 1 178 76 17 17 289 -1 unnamed_device 26.3 MiB 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66640 29 32 324 268 1 195 79 17 17 289 -1 unnamed_device 26.7 MiB 1.64 807 9881 4044 5289 548 65.1 MiB 0.08 0.00 3.78147 -112.033 -3.78147 3.78147 0.91 0.000473872 0.00043133 0.0300701 0.0274345 40 2561 37 6.99608e+06 264882 706193. 2443.58 4.28 0.154506 0.135271 26914 176310 -1 2185 21 1573 2240 248384 59453 3.75971 3.75971 -116.507 -3.75971 0 0 926341. 3205.33 0.35 0.08 0.17 -1 -1 0.35 0.0237155 0.0210721 88 49 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_117.v common 10.45 vpr 65.59 MiB -1 -1 0.14 20512 1 0.03 -1 -1 33736 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67168 32 32 393 312 1 235 81 17 17 289 -1 unnamed_device 27.0 MiB 1.52 1189 13031 5003 6393 1635 65.6 MiB 0.11 0.00 5.55394 -180.701 -5.55394 5.55394 0.87 0.000548783 0.000497626 0.0434253 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66996 32 32 376 318 1 253 80 17 17 289 -1 unnamed_device 26.8 MiB 0.95 1317 10744 3615 5258 1871 65.4 MiB 0.09 0.00 4.50112 -167.331 -4.50112 4.50112 0.90 0.00053635 0.000487047 0.034898 0.0317958 40 3495 26 6.99608e+06 235451 706193. 2443.58 19.28 0.295159 0.256549 26914 176310 -1 2926 24 3276 4138 494202 92561 4.85739 4.85739 -181.953 -4.85739 0 0 926341. 3205.33 0.36 0.13 0.17 -1 -1 0.36 0.0292428 0.026016 110 93 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_121.v common 8.04 vpr 65.39 MiB -1 -1 0.15 20528 1 0.03 -1 -1 33756 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66960 32 32 360 293 1 219 79 17 17 289 -1 unnamed_device 26.9 MiB 1.53 944 9712 3948 5370 394 65.4 MiB 0.08 0.00 3.79657 -123.64 -3.79657 3.79657 0.91 0.000510066 0.000464272 0.032039 0.0292466 44 3075 49 6.99608e+06 220735 787024. 2723.27 3.17 0.148786 0.130076 27778 195446 -1 1984 21 1585 2040 163763 38450 3.46081 3.46081 -119.657 -3.46081 0 0 997811. 3452.63 0.41 0.07 0.19 -1 -1 0.41 0.0254222 0.0225713 94 57 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_122.v common 9.21 vpr 65.43 MiB -1 -1 0.17 20720 1 0.03 -1 -1 33788 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67000 32 32 396 299 1 228 79 17 17 289 -1 unnamed_device 26.9 MiB 1.04 1078 15796 7109 8306 381 65.4 MiB 0.14 0.00 5.81442 -170.312 -5.81442 5.81442 0.93 0.000587058 0.000533698 0.0562947 0.051349 46 3303 43 6.99608e+06 220735 828058. 2865.25 4.73 0.211617 0.1862 28066 200906 -1 2519 19 2001 2996 241064 50553 4.8635 4.8635 -169.634 -4.8635 0 0 1.01997e+06 3529.29 0.39 0.08 0.20 -1 -1 0.39 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x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66568 30 32 286 239 1 157 76 17 17 289 -1 unnamed_device 26.5 MiB 3.87 598 11756 4032 5894 1830 65.0 MiB 0.08 0.00 3.77712 -117.524 -3.77712 3.77712 0.90 0.000432557 0.000394307 0.0340795 0.0311328 38 1780 24 6.99608e+06 206020 678818. 2348.85 1.96 0.133349 0.116781 26626 170182 -1 1431 21 1164 1714 139245 30323 3.30746 3.30746 -119.712 -3.30746 0 0 902133. 3121.57 0.35 0.06 0.16 -1 -1 0.35 0.0220672 0.019672 68 29 -1 -1 -1 -1 -fixed_k6_frac_2uripple_N8_22nm.xml mult_125.v common 6.99 vpr 65.28 MiB -1 -1 0.15 20428 1 0.03 -1 -1 33632 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66848 32 32 296 247 1 182 81 17 17 289 -1 unnamed_device 26.7 MiB 0.62 791 12331 4777 6250 1304 65.3 MiB 0.09 0.00 3.68644 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66440 29 32 275 307 1 202 85 17 17 289 -1 unnamed_device 26.5 MiB 1.38 1099 5293 1100 3885 308 64.9 MiB 0.05 0.00 7.28153 -143.815 -7.28153 7.28153 0.91 0.000645439 0.000586905 0.0226092 0.0206425 36 3357 33 6.79088e+06 323328 648988. 2245.63 3.93 0.18571 0.162438 25390 158009 -1 2586 20 1448 4044 231944 51886 6.54158 6.54158 -139.567 -6.54158 0 0 828058. 2865.25 0.31 0.08 0.15 -1 -1 0.31 0.0321549 0.0287802 136 186 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_005.v common 10.64 vpr 65.08 MiB -1 -1 0.22 20608 13 0.34 -1 -1 36784 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66640 32 32 302 334 1 234 86 17 17 289 -1 unnamed_device 26.5 MiB 2.10 1401 5756 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66160 31 32 229 261 1 188 80 17 17 289 -1 unnamed_device 26.1 MiB 3.43 997 12636 5258 7154 224 64.6 MiB 0.10 0.00 6.42294 -136.16 -6.42294 6.42294 0.90 0.000517842 0.000470049 0.0411964 0.0374197 44 2627 22 6.79088e+06 229024 787024. 2723.27 4.55 0.222911 0.194649 27118 194962 -1 2129 16 1056 2792 155188 35766 5.65861 5.65861 -131.48 -5.65861 0 0 997811. 3452.63 0.39 0.06 0.19 -1 -1 0.39 0.0233226 0.0209899 106 136 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_009.v common 9.24 vpr 64.83 MiB -1 -1 0.20 20536 12 0.21 -1 -1 36372 -1 -1 20 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66384 31 32 235 267 1 194 83 17 17 289 -1 unnamed_device 26.3 MiB 3.57 1116 6203 1235 4627 341 64.8 MiB 0.06 0.00 7.04997 -146.463 -7.04997 7.04997 0.92 0.000549236 0.000496796 0.022341 0.0203246 38 2827 29 6.79088e+06 269440 678818. 2348.85 2.23 0.133234 0.117176 25966 169698 -1 2377 15 1090 2724 145236 33529 6.25178 6.25178 -137.947 -6.25178 0 0 902133. 3121.57 0.34 0.06 0.17 -1 -1 0.34 0.0226567 0.0204842 113 142 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_010.v common 9.80 vpr 64.52 MiB -1 -1 0.21 20428 13 0.23 -1 -1 36500 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66068 32 32 250 282 1 182 79 17 17 289 -1 unnamed_device 26.0 MiB 2.50 1109 7177 1737 4800 640 64.5 MiB 0.07 0.00 7.59858 -166.488 -7.59858 7.59858 0.90 0.00059305 0.000536228 0.0277161 0.0251894 36 3033 30 6.79088e+06 202080 648988. 2245.63 3.90 0.171898 0.150696 25390 158009 -1 2399 14 1005 2359 142479 31916 6.91327 6.91327 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66160 32 32 236 268 1 171 81 17 17 289 -1 unnamed_device 26.1 MiB 2.78 937 12856 4731 5927 2198 64.6 MiB 0.10 0.00 5.84661 -143.137 -5.84661 5.84661 0.89 0.000512652 0.000464209 0.0411426 0.0373743 44 2800 36 6.79088e+06 229024 787024. 2723.27 2.04 0.141388 0.123826 27118 194962 -1 2043 14 969 2636 142102 32796 5.18431 5.18431 -135.735 -5.18431 0 0 997811. 3452.63 0.37 0.05 0.19 -1 -1 0.37 0.0198793 0.0179727 101 141 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_013.v common 10.38 vpr 65.09 MiB -1 -1 0.23 20896 13 0.32 -1 -1 36396 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66648 32 32 283 315 1 215 84 17 17 289 -1 unnamed_device 26.6 MiB 2.30 1258 8319 2303 5000 1016 65.1 MiB 0.08 0.00 7.91028 -166.355 -7.91028 7.91028 0.93 0.000670319 0.000600335 0.0346418 0.0314185 44 3023 21 6.79088e+06 269440 787024. 2723.27 4.34 0.243774 0.213791 27118 194962 -1 2599 18 1118 3067 177490 38715 6.88526 6.88526 -157.731 -6.88526 0 0 997811. 3452.63 0.38 0.07 0.19 -1 -1 0.38 0.029879 0.0269193 134 188 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_014.v common 9.95 vpr 65.30 MiB -1 -1 0.23 20772 14 0.38 -1 -1 36156 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66872 32 32 303 335 1 230 86 17 17 289 -1 unnamed_device 26.8 MiB 2.31 1345 7268 1767 5038 463 65.3 MiB 0.08 0.00 8.74626 -182.518 -8.74626 8.74626 0.92 0.000711796 0.000643975 0.0315094 0.0286192 36 3522 26 6.79088e+06 296384 648988. 2245.63 3.94 0.206273 0.181266 25390 158009 -1 2989 18 1459 3621 213522 48818 7.56225 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66844 32 32 301 333 1 221 88 17 17 289 -1 unnamed_device 26.7 MiB 1.70 1224 13348 3764 6998 2586 65.3 MiB 0.12 0.00 7.24781 -156.42 -7.24781 7.24781 0.93 0.000662075 0.000603597 0.0508777 0.0460019 44 3277 40 6.79088e+06 323328 787024. 2723.27 5.80 0.2981 0.260615 27118 194962 -1 2666 17 1385 4252 222241 51840 6.58078 6.58078 -147.103 -6.58078 0 0 997811. 3452.63 0.37 0.08 0.19 -1 -1 0.37 0.0308524 0.0278356 145 206 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_017.v common 12.16 vpr 65.14 MiB -1 -1 0.23 20724 14 0.31 -1 -1 36348 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66704 32 32 277 309 1 210 83 17 17 289 -1 unnamed_device 26.7 MiB 2.83 1311 6743 1544 4772 427 65.1 MiB 0.07 0.00 8.47078 -173.752 -8.47078 8.47078 0.91 0.000629052 0.000568685 0.0277647 0.0252867 44 3464 31 6.79088e+06 255968 787024. 2723.27 5.65 0.261332 0.229463 27118 194962 -1 2780 17 1214 3544 197627 42898 7.22545 7.22545 -161.109 -7.22545 0 0 997811. 3452.63 0.39 0.08 0.19 -1 -1 0.39 0.0295195 0.0267068 126 182 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_018.v common 9.66 vpr 64.60 MiB -1 -1 0.20 20420 12 0.20 -1 -1 36364 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66148 32 32 227 259 1 172 79 17 17 289 -1 unnamed_device 26.1 MiB 2.06 1008 11740 3543 6499 1698 64.6 MiB 0.09 0.00 7.24148 -161.628 -7.24148 7.24148 0.90 0.000517684 0.000469872 0.039377 0.0357443 36 2795 45 6.79088e+06 202080 648988. 2245.63 4.22 0.207282 0.18054 25390 158009 -1 2378 15 976 2474 149319 33765 6.21607 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65984 31 32 231 263 1 186 81 17 17 289 -1 unnamed_device 26.0 MiB 2.57 997 12331 4111 5801 2419 64.4 MiB 0.10 0.00 7.54752 -160.268 -7.54752 7.54752 0.93 0.000562827 0.000512848 0.0419301 0.0381923 36 2929 29 6.79088e+06 242496 648988. 2245.63 4.04 0.228328 0.19995 25390 158009 -1 2308 18 1125 2654 153918 35011 6.16922 6.16922 -147.333 -6.16922 0 0 828058. 2865.25 0.31 0.06 0.15 -1 -1 0.31 0.0250608 0.0224628 107 138 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_021.v common 22.74 vpr 65.30 MiB -1 -1 0.21 20736 13 0.35 -1 -1 36528 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66868 32 32 304 336 1 224 85 17 17 289 -1 unnamed_device 26.8 MiB 2.20 1287 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66744 32 32 287 319 1 214 87 17 17 289 -1 unnamed_device 26.7 MiB 2.39 1263 10263 2709 7113 441 65.2 MiB 0.10 0.00 8.1433 -166.845 -8.1433 8.1433 0.92 0.000645812 0.000584724 0.0393833 0.0358534 40 3385 50 6.79088e+06 309856 706193. 2443.58 16.89 0.380538 0.332335 26254 175826 -1 3075 21 1607 4496 277530 61024 7.34382 7.34382 -164.809 -7.34382 0 0 926341. 3205.33 0.34 0.10 0.17 -1 -1 0.34 0.033289 0.0298443 136 192 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_025.v common 9.37 vpr 63.82 MiB -1 -1 0.15 19816 8 0.10 -1 -1 36240 -1 -1 11 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65356 32 32 154 186 1 126 75 17 17 289 -1 unnamed_device 25.4 MiB 2.37 633 5921 1256 4594 71 63.8 MiB 0.04 0.00 4.18492 -95.1021 -4.18492 4.18492 0.92 0.000369421 0.000337223 0.0151576 0.0138485 36 1824 30 6.79088e+06 148192 648988. 2245.63 3.83 0.121482 0.104963 25390 158009 -1 1490 18 656 1469 79844 19181 3.83796 3.83796 -94.1549 -3.83796 0 0 828058. 2865.25 0.31 0.04 0.15 -1 -1 0.31 0.0156784 0.0139708 60 59 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_026.v common 13.84 vpr 64.75 MiB -1 -1 0.21 20348 15 0.29 -1 -1 36592 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 32 32 254 286 1 202 82 17 17 289 -1 unnamed_device 26.4 MiB 2.76 1197 14144 5293 7084 1767 64.7 MiB 0.12 0.00 8.89118 -178.017 -8.89118 8.89118 0.90 0.000579739 0.00052512 0.0501756 0.0455769 36 3911 43 6.79088e+06 242496 648988. 2245.63 7.42 0.214282 0.188204 25390 158009 -1 3064 31 1411 3990 445921 169785 7.93467 7.93467 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66540 32 32 279 311 1 202 82 17 17 289 -1 unnamed_device 26.5 MiB 1.91 1179 7024 1686 4552 786 65.0 MiB 0.07 0.00 7.81323 -165.772 -7.81323 7.81323 0.91 0.000651714 0.000591028 0.0296709 0.0270275 40 3618 36 6.79088e+06 242496 706193. 2443.58 23.78 0.400013 0.351114 26254 175826 -1 3151 26 1711 4941 532467 172390 6.77334 6.77334 -165.618 -6.77334 0 0 926341. 3205.33 0.35 0.17 0.17 -1 -1 0.35 0.0419525 0.0375795 136 184 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_029.v common 10.14 vpr 64.43 MiB -1 -1 0.20 20512 12 0.19 -1 -1 36608 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65980 32 32 238 270 1 186 80 17 17 289 -1 unnamed_device 25.9 MiB 2.38 1077 9024 2472 4753 1799 64.4 MiB 0.07 0.00 6.90294 -154.176 -6.90294 6.90294 0.89 0.000524521 0.000474555 0.0309725 0.0281393 44 2601 23 6.79088e+06 215552 787024. 2723.27 4.27 0.20215 0.176431 27118 194962 -1 2193 15 961 2304 130018 29335 5.99004 5.99004 -140.976 -5.99004 0 0 997811. 3452.63 0.38 0.06 0.19 -1 -1 0.38 0.0231961 0.0210261 103 143 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_030.v common 14.18 vpr 64.35 MiB -1 -1 0.19 20448 11 0.18 -1 -1 36336 -1 -1 18 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65892 30 32 213 245 1 164 80 17 17 289 -1 unnamed_device 25.9 MiB 2.27 910 12120 3870 6285 1965 64.3 MiB 0.09 0.00 6.3635 -135.496 -6.3635 6.3635 0.92 0.000512861 0.000463096 0.0379176 0.0344668 36 2758 44 6.79088e+06 242496 648988. 2245.63 8.49 0.246379 0.214228 25390 158009 -1 2137 15 968 2319 151256 33988 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66492 32 32 274 306 1 209 81 17 17 289 -1 unnamed_device 26.5 MiB 3.03 1143 7431 2070 3957 1404 64.9 MiB 0.07 0.00 7.03679 -162.788 -7.03679 7.03679 0.93 0.000630149 0.000571766 0.0300385 0.027382 38 3489 28 6.79088e+06 229024 678818. 2348.85 13.26 0.313813 0.273693 25966 169698 -1 2750 18 1400 3465 198948 44554 6.45548 6.45548 -161.876 -6.45548 0 0 902133. 3121.57 0.33 0.08 0.16 -1 -1 0.33 0.0285068 0.0256825 119 179 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_033.v common 9.99 vpr 64.84 MiB -1 -1 0.17 20736 12 0.18 -1 -1 36184 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66400 31 32 237 269 1 176 80 17 17 289 -1 unnamed_device 26.4 MiB 2.56 1005 7304 1599 5397 308 64.8 MiB 0.06 0.00 6.85818 -143.144 -6.85818 6.85818 0.87 0.000520274 0.000475024 0.0254953 0.0233132 36 3104 26 6.79088e+06 229024 648988. 2245.63 4.19 0.172703 0.15276 25390 158009 -1 2546 20 1197 3028 191255 42293 5.92738 5.92738 -138.337 -5.92738 0 0 828058. 2865.25 0.32 0.07 0.15 -1 -1 0.32 0.0262347 0.0233443 101 144 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_034.v common 7.90 vpr 64.41 MiB -1 -1 0.19 20464 10 0.18 -1 -1 36540 -1 -1 17 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65960 29 32 220 252 1 166 78 17 17 289 -1 unnamed_device 26.0 MiB 1.84 942 8378 2178 5592 608 64.4 MiB 0.07 0.00 6.16888 -135.594 -6.16888 6.16888 0.91 0.000512463 0.000465075 0.0291677 0.0264848 34 2825 33 6.79088e+06 229024 618332. 2139.56 2.70 0.16374 0.143806 25102 150614 -1 2283 15 958 2705 169570 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66332 32 32 282 314 1 225 82 17 17 289 -1 unnamed_device 26.3 MiB 2.60 1261 10584 2627 7173 784 64.8 MiB 0.10 0.00 7.68903 -168.897 -7.68903 7.68903 0.92 0.000693553 0.000630595 0.0441343 0.0399651 44 3649 50 6.79088e+06 242496 787024. 2723.27 3.49 0.2202 0.19531 27118 194962 -1 2886 17 1427 3968 219322 49259 6.95258 6.95258 -162.986 -6.95258 0 0 997811. 3452.63 0.39 0.08 0.18 -1 -1 0.39 0.0317261 0.0287371 136 187 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_037.v common 10.07 vpr 64.56 MiB -1 -1 0.20 20660 12 0.19 -1 -1 35932 -1 -1 16 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66108 31 32 241 273 1 173 79 17 17 289 -1 unnamed_device 26.1 MiB 2.56 1099 9036 2242 5503 1291 64.6 MiB 0.07 0.00 7.11595 -155.813 -7.11595 7.11595 0.91 0.000528262 0.000487042 0.032112 0.0292636 42 2594 21 6.79088e+06 215552 744469. 2576.02 4.04 0.212805 0.186396 26542 182613 -1 2155 16 879 2322 148727 32785 6.33018 6.33018 -150.18 -6.33018 0 0 949917. 3286.91 0.37 0.06 0.17 -1 -1 0.37 0.0238762 0.0215537 101 148 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_038.v common 11.21 vpr 65.33 MiB -1 -1 0.23 20912 12 0.34 -1 -1 36656 -1 -1 24 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66900 31 32 307 339 1 226 87 17 17 289 -1 unnamed_device 26.8 MiB 2.84 1467 6039 1319 4287 433 65.3 MiB 0.07 0.00 7.47278 -158.083 -7.47278 7.47278 0.92 0.000707446 0.000636052 0.0266136 0.0243316 48 3354 17 6.79088e+06 323328 865456. 2994.66 4.56 0.242093 0.211949 27694 206865 -1 3077 17 1391 4060 254908 53783 6.54502 6.54502 -148.257 -6.54502 0 0 1.05005e+06 3633.38 0.41 0.09 0.20 -1 -1 0.41 0.0343509 0.0311792 146 214 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_039.v common 8.66 vpr 64.98 MiB -1 -1 0.23 20940 14 0.45 -1 -1 37092 -1 -1 22 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66536 31 32 293 325 1 209 85 17 17 289 -1 unnamed_device 26.5 MiB 1.61 1271 10129 2796 6287 1046 65.0 MiB 0.09 0.00 8.30959 -169.599 -8.30959 8.30959 0.89 0.000649076 0.00058897 0.0407419 0.0370204 36 3450 22 6.79088e+06 296384 648988. 2245.63 3.29 0.208089 0.183999 25390 158009 -1 2866 16 1351 3700 212299 48794 7.47267 7.47267 -164.725 -7.47267 0 0 828058. 2865.25 0.33 0.08 0.16 -1 -1 0.33 0.031103 0.0282323 142 200 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_040.v common 8.84 vpr 65.05 MiB -1 -1 0.23 21020 13 0.32 -1 -1 36096 -1 -1 23 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66608 31 32 276 308 1 215 86 17 17 289 -1 unnamed_device 26.6 MiB 2.51 1280 4811 900 3622 289 65.0 MiB 0.05 0.00 8.58767 -169.841 -8.58767 8.58767 0.90 0.000621717 0.00056412 0.0197583 0.0180653 38 3430 34 6.79088e+06 309856 678818. 2348.85 2.72 0.17978 0.157231 25966 169698 -1 2787 17 1355 3483 187965 42656 7.47267 7.47267 -159.441 -7.47267 0 0 902133. 3121.57 0.34 0.08 0.17 -1 -1 0.34 0.030277 0.0274221 136 183 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_041.v common 11.24 vpr 65.20 MiB -1 -1 0.23 20692 13 0.32 -1 -1 36528 -1 -1 21 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66764 31 32 269 301 1 204 84 17 17 289 -1 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289 -1 unnamed_device 26.4 MiB 2.10 1224 12683 3651 6628 2404 64.9 MiB 0.11 0.00 8.19665 -170.984 -8.19665 8.19665 0.92 0.000657851 0.00059852 0.0506602 0.0460715 36 3521 25 6.79088e+06 269440 648988. 2245.63 4.83 0.266318 0.234665 25390 158009 -1 2718 17 1178 3776 220011 48287 7.01061 7.01061 -160.627 -7.01061 0 0 828058. 2865.25 0.32 0.08 0.15 -1 -1 0.32 0.0307487 0.0277822 137 191 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_046.v common 9.15 vpr 65.07 MiB -1 -1 0.23 20800 12 0.32 -1 -1 36840 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66632 32 32 303 335 1 212 85 17 17 289 -1 unnamed_device 26.6 MiB 2.36 1183 14221 4949 6932 2340 65.1 MiB 0.13 0.00 7.19197 -155.782 -7.19197 7.19197 0.91 0.000668725 0.000603172 0.0561395 0.0508001 48 3258 28 6.79088e+06 282912 865456. 2994.66 2.93 0.233481 0.20651 27694 206865 -1 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218 84 17 17 289 -1 unnamed_device 26.7 MiB 2.41 1339 6489 1417 4538 534 65.2 MiB 0.07 0.00 7.45027 -163.951 -7.45027 7.45027 0.91 0.000656827 0.000594857 0.0278586 0.0253729 44 3321 18 6.79088e+06 269440 787024. 2723.27 5.22 0.251652 0.221194 27118 194962 -1 2880 15 1268 4103 226307 48638 6.33367 6.33367 -151.313 -6.33367 0 0 997811. 3452.63 0.38 0.08 0.19 -1 -1 0.38 0.0283178 0.025574 140 193 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_050.v common 9.23 vpr 64.74 MiB -1 -1 0.24 20576 13 0.36 -1 -1 37008 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66292 32 32 306 338 1 225 84 17 17 289 -1 unnamed_device 26.2 MiB 1.91 1312 5757 1265 4157 335 64.7 MiB 0.06 0.00 7.77691 -170.238 -7.77691 7.77691 0.90 0.000676657 0.000612776 0.0266315 0.0241677 36 4117 46 6.79088e+06 269440 648988. 2245.63 3.55 0.213782 0.187064 25390 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334 1 224 84 17 17 289 -1 unnamed_device 26.7 MiB 2.10 1309 8319 2069 5720 530 65.2 MiB 0.08 0.00 7.83086 -168.91 -7.83086 7.83086 0.86 0.000656622 0.000598175 0.0348215 0.0315983 38 3459 40 6.79088e+06 282912 678818. 2348.85 13.32 0.418321 0.369661 25966 169698 -1 2928 18 1445 4114 215674 47831 6.83836 6.83836 -161.551 -6.83836 0 0 902133. 3121.57 0.32 0.08 0.15 -1 -1 0.32 0.0317574 0.0287195 144 209 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_054.v common 20.00 vpr 65.30 MiB -1 -1 0.24 20884 12 0.37 -1 -1 36616 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66872 32 32 308 340 1 225 85 17 17 289 -1 unnamed_device 26.8 MiB 1.87 1321 14779 4130 8902 1747 65.3 MiB 0.14 0.00 7.66848 -162.706 -7.66848 7.66848 0.92 0.000709593 0.000642671 0.0607605 0.0552647 38 3631 50 6.79088e+06 282912 678818. 2348.85 14.31 0.457888 0.403823 25966 169698 -1 3008 18 1459 4087 232219 51644 6.98829 6.98829 -157.579 -6.98829 0 0 902133. 3121.57 0.34 0.09 0.16 -1 -1 0.34 0.034069 0.0307701 147 213 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_055.v common 8.95 vpr 64.66 MiB -1 -1 0.18 20140 11 0.16 -1 -1 36524 -1 -1 14 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66208 32 32 216 248 1 160 78 17 17 289 -1 unnamed_device 26.3 MiB 1.56 752 5224 962 4133 129 64.7 MiB 0.05 0.00 6.41251 -131.25 -6.41251 6.41251 0.91 0.000484321 0.000440563 0.018111 0.0164763 36 2354 24 6.79088e+06 188608 648988. 2245.63 4.10 0.171959 0.148226 25390 158009 -1 1841 17 982 2579 141528 34864 5.56708 5.56708 -127.034 -5.56708 0 0 828058. 2865.25 0.32 0.06 0.15 -1 -1 0.32 0.0212566 0.0190376 91 121 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_056.v common 10.21 vpr 64.60 MiB -1 -1 0.21 20816 13 0.26 -1 -1 36284 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66148 32 32 254 286 1 197 84 17 17 289 -1 unnamed_device 26.0 MiB 2.21 1180 7221 1648 4796 777 64.6 MiB 0.07 0.00 7.59268 -164.24 -7.59268 7.59268 0.93 0.000578226 0.000523387 0.0272677 0.0247612 36 3135 25 6.79088e+06 269440 648988. 2245.63 4.48 0.189031 0.166513 25390 158009 -1 2766 17 1158 3022 197887 43020 6.74539 6.74539 -159.239 -6.74539 0 0 828058. 2865.25 0.33 0.08 0.15 -1 -1 0.33 0.0282293 0.0254107 118 159 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_057.v common 10.73 vpr 65.61 MiB -1 -1 0.24 21368 14 0.55 -1 -1 36800 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67188 32 32 338 370 1 251 88 17 17 289 -1 unnamed_device 27.0 MiB 1.59 1584 7108 1588 4936 584 65.6 MiB 0.08 0.00 9.32595 -187.261 -9.32595 9.32595 0.92 0.000779735 0.00070675 0.0344565 0.031268 50 3511 18 6.79088e+06 323328 902133. 3121.57 5.05 0.283337 0.249107 27982 213445 -1 3216 16 1699 4871 267896 58380 8.0201 8.0201 -173.358 -8.0201 0 0 1.08113e+06 3740.92 0.40 0.09 0.21 -1 -1 0.40 0.0348191 0.0316049 171 243 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_058.v common 10.08 vpr 65.09 MiB -1 -1 0.22 20764 13 0.36 -1 -1 36672 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66652 32 32 271 303 1 215 85 17 17 289 -1 unnamed_device 26.7 MiB 1.91 1314 12733 3340 7297 2096 65.1 MiB 0.11 0.00 7.97246 -177.126 -7.97246 7.97246 0.92 0.000670912 0.000576913 0.0480351 0.043583 38 3411 27 6.79088e+06 282912 678818. 2348.85 4.43 0.208133 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32 297 329 1 217 84 17 17 289 -1 unnamed_device 26.5 MiB 1.38 1281 8502 2158 5508 836 65.0 MiB 0.09 0.00 8.03603 -175.042 -8.03603 8.03603 0.93 0.000720902 0.00065592 0.0372752 0.0339501 38 3308 18 6.79088e+06 269440 678818. 2348.85 4.66 0.264985 0.233824 25966 169698 -1 2729 15 1311 3591 186034 41679 7.09671 7.09671 -167.647 -7.09671 0 0 902133. 3121.57 0.34 0.07 0.16 -1 -1 0.34 0.0303378 0.0275774 139 202 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_062.v common 14.91 vpr 64.68 MiB -1 -1 0.17 20120 11 0.16 -1 -1 36612 -1 -1 13 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66232 32 32 231 263 1 165 77 17 17 289 -1 unnamed_device 26.3 MiB 1.53 1102 10183 2765 6008 1410 64.7 MiB 0.08 0.00 6.80233 -145.463 -6.80233 6.80233 0.91 0.00052614 0.000479557 0.0353834 0.0322068 30 2820 19 6.79088e+06 175136 556674. 1926.21 10.13 0.190607 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66344 32 32 269 301 1 198 81 17 17 289 -1 unnamed_device 26.4 MiB 2.58 1083 11456 4044 5385 2027 64.8 MiB 0.10 0.00 7.96611 -159.164 -7.96611 7.96611 0.91 0.000619582 0.000561272 0.0444148 0.0401768 38 3010 34 6.79088e+06 229024 678818. 2348.85 3.92 0.215577 0.190675 25966 169698 -1 2533 21 1329 3905 220140 48577 6.88531 6.88531 -150.267 -6.88531 0 0 902133. 3121.57 0.34 0.09 0.16 -1 -1 0.34 0.0327173 0.0294507 122 174 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_078.v common 10.72 vpr 65.25 MiB -1 -1 0.24 20852 13 0.42 -1 -1 36168 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66812 32 32 296 328 1 223 86 17 17 289 -1 unnamed_device 26.7 MiB 2.21 1338 8024 1861 5707 456 65.2 MiB 0.08 0.00 8.29812 -170.177 -8.29812 8.29812 0.91 0.000707864 0.000644094 0.0334516 0.030392 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66460 32 32 274 306 1 205 82 17 17 289 -1 unnamed_device 26.5 MiB 2.02 1251 6312 1329 4019 964 64.9 MiB 0.06 0.00 8.37235 -176.058 -8.37235 8.37235 0.90 0.000622634 0.000553052 0.0258384 0.0234149 40 3069 17 6.79088e+06 242496 706193. 2443.58 15.23 0.348767 0.304178 26254 175826 -1 2990 20 1531 4498 306796 65009 7.25783 7.25783 -172.618 -7.25783 0 0 926341. 3205.33 0.35 0.10 0.17 -1 -1 0.35 0.0341689 0.0307847 128 179 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_082.v common 9.23 vpr 65.04 MiB -1 -1 0.23 21020 13 0.28 -1 -1 36412 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66604 31 32 266 298 1 196 82 17 17 289 -1 unnamed_device 26.6 MiB 2.24 1125 7914 1884 5216 814 65.0 MiB 0.07 0.00 7.39828 -160.2 -7.39828 7.39828 0.95 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x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67052 32 32 327 359 1 233 86 17 17 289 -1 unnamed_device 27.1 MiB 2.24 1339 6323 1159 4879 285 65.5 MiB 0.07 0.00 9.2305 -183.989 -9.2305 9.2305 0.91 0.000775215 0.000702017 0.0308593 0.0281089 38 3705 30 6.79088e+06 296384 678818. 2348.85 2.38 0.19357 0.171937 25966 169698 -1 3013 18 1532 4522 227149 51743 7.89131 7.89131 -171.065 -7.89131 0 0 902133. 3121.57 0.34 0.09 0.16 -1 -1 0.34 0.0386118 0.0351048 167 232 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_094.v common 19.16 vpr 64.80 MiB -1 -1 0.22 20388 12 0.26 -1 -1 36500 -1 -1 19 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66356 30 32 246 278 1 185 81 17 17 289 -1 unnamed_device 26.2 MiB 1.92 1023 10231 4165 5804 262 64.8 MiB 0.09 0.00 7.21752 -140.072 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66560 31 32 277 309 1 197 85 17 17 289 -1 unnamed_device 26.6 MiB 1.99 1264 9385 2554 5852 979 65.0 MiB 0.08 0.00 8.41881 -168.357 -8.41881 8.41881 0.86 0.000626121 0.000565327 0.0352686 0.0320327 30 3443 28 6.79088e+06 296384 556674. 1926.21 2.11 0.149188 0.133304 24526 138013 -1 2741 17 1270 3452 177968 40166 7.21431 7.21431 -163.766 -7.21431 0 0 706193. 2443.58 0.28 0.07 0.12 -1 -1 0.28 0.0291486 0.0263761 130 184 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_098.v common 8.32 vpr 64.76 MiB -1 -1 0.22 20560 12 0.20 -1 -1 36048 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66316 32 32 229 261 1 174 82 17 17 289 -1 unnamed_device 26.3 MiB 1.98 1075 7736 1882 5428 426 64.8 MiB 0.07 0.00 7.20863 -155.968 -7.20863 7.20863 0.92 0.000556668 0.000506123 0.0272571 0.0248144 38 2746 23 6.79088e+06 242496 678818. 2348.85 2.88 0.168635 0.148998 25966 169698 -1 2229 18 1032 2575 147443 32944 6.12992 6.12992 -146.185 -6.12992 0 0 902133. 3121.57 0.34 0.07 0.16 -1 -1 0.34 0.0263243 0.0237482 109 134 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_099.v common 9.64 vpr 64.83 MiB -1 -1 0.21 20648 13 0.34 -1 -1 36604 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66388 32 32 263 295 1 199 82 17 17 289 -1 unnamed_device 26.4 MiB 1.63 1233 12542 3940 6787 1815 64.8 MiB 0.11 0.00 8.09146 -166.475 -8.09146 8.09146 0.88 0.000626642 0.000567799 0.047815 0.0434252 36 3202 30 6.79088e+06 242496 648988. 2245.63 4.47 0.209304 0.184525 25390 158009 -1 2687 18 1245 3410 184945 42779 6.82029 6.82029 -158.939 -6.82029 0 0 828058. 2865.25 0.30 0.07 0.14 -1 -1 0.30 0.028343 0.0253849 128 168 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_100.v common 25.16 vpr 65.19 MiB -1 -1 0.23 21272 13 0.40 -1 -1 37388 -1 -1 24 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66752 31 32 321 353 1 241 87 17 17 289 -1 unnamed_device 26.8 MiB 2.05 1392 4695 845 3563 287 65.2 MiB 0.06 0.00 7.47587 -155.329 -7.47587 7.47587 0.93 0.000744942 0.000674406 0.0231085 0.0211028 40 3664 28 6.79088e+06 323328 706193. 2443.58 19.31 0.385675 0.33753 26254 175826 -1 3433 18 1707 4807 297818 65147 6.54507 6.54507 -151.854 -6.54507 0 0 926341. 3205.33 0.34 0.10 0.17 -1 -1 0.34 0.0345944 0.0313059 157 228 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_101.v common 10.24 vpr 65.24 MiB -1 -1 0.22 20544 11 0.31 -1 -1 36416 -1 -1 22 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66808 30 32 287 319 1 201 84 17 17 289 -1 unnamed_device 26.7 MiB 2.08 1218 4659 929 3342 388 65.2 MiB 0.05 0.00 7.06923 -144.171 -7.06923 7.06923 0.90 0.000631761 0.000572986 0.0200545 0.0182881 36 3280 38 6.79088e+06 296384 648988. 2245.63 4.64 0.236118 0.205741 25390 158009 -1 2789 15 1179 3509 202940 44755 6.16912 6.16912 -138.96 -6.16912 0 0 828058. 2865.25 0.32 0.07 0.15 -1 -1 0.32 0.0269389 0.0244179 141 196 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_102.v common 10.73 vpr 65.09 MiB -1 -1 0.21 20600 15 0.42 -1 -1 36368 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66656 32 32 296 328 1 220 86 17 17 289 -1 unnamed_device 26.6 MiB 1.78 1290 8402 2178 5761 463 65.1 MiB 0.08 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GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 32 32 235 267 1 172 78 17 17 289 -1 unnamed_device 26.3 MiB 1.85 1018 5722 1217 4259 246 64.8 MiB 0.05 0.00 6.71746 -144.764 -6.71746 6.71746 0.92 0.000533857 0.000485054 0.0216192 0.0197075 36 2822 26 6.79088e+06 188608 648988. 2245.63 3.89 0.159051 0.139544 25390 158009 -1 2332 17 1031 2563 161297 35918 5.86813 5.86813 -141.367 -5.86813 0 0 828058. 2865.25 0.32 0.06 0.15 -1 -1 0.32 0.0243838 0.0219375 98 140 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_106.v common 17.96 vpr 65.17 MiB -1 -1 0.23 20912 13 0.39 -1 -1 36388 -1 -1 21 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66736 31 32 294 326 1 212 84 17 17 289 -1 unnamed_device 26.7 MiB 1.37 1236 5940 1259 4215 466 65.2 MiB 0.06 0.00 8.31912 -162.691 -8.31912 8.31912 0.89 0.000673814 0.000609912 0.0264368 0.0240299 38 3344 20 6.79088e+06 282912 678818. 2348.85 12.94 0.326584 0.285974 25966 169698 -1 2835 16 1360 3850 202602 44829 7.6875 7.6875 -160.272 -7.6875 0 0 902133. 3121.57 0.33 0.08 0.16 -1 -1 0.33 0.0306634 0.0277452 143 201 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_107.v common 6.75 vpr 64.55 MiB -1 -1 0.18 20456 10 0.19 -1 -1 36440 -1 -1 17 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66104 29 32 219 251 1 163 78 17 17 289 -1 unnamed_device 26.2 MiB 2.13 951 4560 1025 3135 400 64.6 MiB 0.04 0.00 6.21922 -128.027 -6.21922 6.21922 0.87 0.000508709 0.000453616 0.0165664 0.0151168 30 2695 24 6.79088e+06 229024 556674. 1926.21 1.51 0.101912 0.0905318 24526 138013 -1 2076 18 907 2285 114350 26868 5.53902 5.53902 -125.872 -5.53902 0 0 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0.09 0.00 6.85518 -144.407 -6.85518 6.85518 0.87 0.000428289 0.000389569 0.0373761 0.0339405 46 2350 15 6.79088e+06 229024 828058. 2865.25 4.55 0.1689 0.146549 27406 200422 -1 2033 17 937 2446 140777 31315 5.99343 5.99343 -137.347 -5.99343 0 0 1.01997e+06 3529.29 0.37 0.06 0.18 -1 -1 0.37 0.0212952 0.0191106 99 132 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_111.v common 8.33 vpr 65.23 MiB -1 -1 0.22 20748 12 0.24 -1 -1 36408 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66796 32 32 288 320 1 203 82 17 17 289 -1 unnamed_device 26.8 MiB 2.39 1190 9694 2639 6567 488 65.2 MiB 0.09 0.00 7.04874 -155.773 -7.04874 7.04874 0.91 0.000647534 0.000585415 0.0398601 0.036169 46 2758 18 6.79088e+06 242496 828058. 2865.25 2.31 0.201434 0.178384 27406 200422 -1 2312 15 1077 3163 160333 35862 6.20488 6.20488 -146.595 -6.20488 0 0 1.01997e+06 3529.29 0.39 0.07 0.19 -1 -1 0.39 0.0289912 0.0263539 130 193 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_112.v common 10.72 vpr 65.11 MiB -1 -1 0.24 20536 13 0.37 -1 -1 36336 -1 -1 20 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66668 31 32 282 314 1 212 83 17 17 289 -1 unnamed_device 26.6 MiB 1.41 1303 8543 2004 5667 872 65.1 MiB 0.08 0.00 7.83951 -165.716 -7.83951 7.83951 0.92 0.000661343 0.000599994 0.0357231 0.0324637 44 3097 29 6.79088e+06 269440 787024. 2723.27 5.52 0.271885 0.23906 27118 194962 -1 2570 17 1266 3559 181705 41523 6.69391 6.69391 -153.626 -6.69391 0 0 997811. 3452.63 0.37 0.07 0.19 -1 -1 0.37 0.030017 0.0270005 143 189 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_113.v common 9.44 vpr 64.77 MiB -1 -1 0.20 20420 11 0.21 -1 -1 36452 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66324 32 32 233 265 1 183 80 17 17 289 -1 unnamed_device 26.3 MiB 2.33 1116 6616 1429 3881 1306 64.8 MiB 0.06 0.00 6.2158 -147.345 -6.2158 6.2158 0.94 0.00052143 0.000472683 0.0238202 0.0216628 36 3218 33 6.79088e+06 215552 648988. 2245.63 3.64 0.181511 0.160044 25390 158009 -1 2609 16 1232 3209 185957 42205 5.35995 5.35995 -141.952 -5.35995 0 0 828058. 2865.25 0.33 0.07 0.15 -1 -1 0.33 0.025264 0.0228306 106 138 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_114.v common 19.81 vpr 64.81 MiB -1 -1 0.19 20600 13 0.25 -1 -1 36596 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66368 32 32 254 286 1 188 79 17 17 289 -1 unnamed_device 26.2 MiB 2.90 994 9543 2876 4545 2122 64.8 MiB 0.08 0.00 7.66009 -161.63 -7.66009 7.66009 0.91 0.000578253 0.000523234 0.0352378 0.0318191 38 3161 25 6.79088e+06 202080 678818. 2348.85 13.45 0.283478 0.24748 25966 169698 -1 2217 20 1130 3116 162814 38166 6.67042 6.67042 -152.159 -6.67042 0 0 902133. 3121.57 0.35 0.07 0.16 -1 -1 0.35 0.0299339 0.0268321 113 159 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_115.v common 9.85 vpr 64.91 MiB -1 -1 0.21 20632 13 0.31 -1 -1 36592 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66464 32 32 285 317 1 214 83 17 17 289 -1 unnamed_device 26.5 MiB 1.42 1317 8183 2040 5445 698 64.9 MiB 0.08 0.00 7.48608 -168.657 -7.48608 7.48608 0.94 0.000657271 0.000597875 0.0340335 0.0309283 44 3175 16 6.79088e+06 255968 787024. 2723.27 4.72 0.252203 0.222293 27118 194962 -1 2665 18 1320 3547 186742 42334 6.57319 6.57319 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66940 32 32 318 350 1 238 87 17 17 289 -1 unnamed_device 27.1 MiB 1.82 1275 12567 3064 6849 2654 65.4 MiB 0.12 0.00 8.90517 -187.129 -8.90517 8.90517 0.92 0.00070332 0.0006379 0.0525168 0.0476633 44 3352 27 6.79088e+06 309856 787024. 2723.27 4.59 0.316715 0.279885 27118 194962 -1 2648 15 1225 3208 170537 39164 8.06351 8.06351 -178.018 -8.06351 0 0 997811. 3452.63 0.39 0.08 0.19 -1 -1 0.39 0.033133 0.0302082 159 223 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_118.v common 19.50 vpr 64.45 MiB -1 -1 0.18 20048 12 0.19 -1 -1 36872 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65996 31 32 222 254 1 188 82 17 17 289 -1 unnamed_device 26.0 MiB 2.92 1076 14144 4263 7957 1924 64.4 MiB 0.11 0.00 6.67019 -155.032 -6.67019 6.67019 0.91 0.000534722 0.000483629 0.0443354 0.0402832 38 2834 33 6.79088e+06 255968 678818. 2348.85 13.13 0.261129 0.228272 25966 169698 -1 2431 17 1063 2485 143989 31620 5.9004 5.9004 -146.441 -5.9004 0 0 902133. 3121.57 0.33 0.06 0.16 -1 -1 0.33 0.0235487 0.0212163 106 129 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_119.v common 10.84 vpr 65.16 MiB -1 -1 0.24 21260 13 0.37 -1 -1 36644 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66728 32 32 282 314 1 211 84 17 17 289 -1 unnamed_device 26.7 MiB 1.76 1249 10698 2850 6495 1353 65.2 MiB 0.10 0.00 8.17702 -169.59 -8.17702 8.17702 0.90 0.000671228 0.000605879 0.0402982 0.0364376 44 3113 45 6.79088e+06 269440 787024. 2723.27 5.30 0.296029 0.259835 27118 194962 -1 2692 18 1225 3591 188122 42059 7.25008 7.25008 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66100 32 32 269 301 1 190 83 17 17 289 -1 unnamed_device 26.2 MiB 1.93 1129 6563 1390 4948 225 64.6 MiB 0.06 0.00 7.37103 -160.155 -7.37103 7.37103 0.90 0.000613022 0.000559105 0.0263226 0.023946 34 3386 26 6.79088e+06 255968 618332. 2139.56 2.67 0.144578 0.126568 25102 150614 -1 2655 19 1221 3448 208020 47191 6.49812 6.49812 -154.121 -6.49812 0 0 787024. 2723.27 0.31 0.08 0.15 -1 -1 0.31 0.030736 0.0275892 128 174 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_122.v common 25.55 vpr 65.63 MiB -1 -1 0.25 21548 15 0.60 -1 -1 37048 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67204 32 32 350 382 1 256 89 17 17 289 -1 unnamed_device 27.0 MiB 1.42 1461 7019 1723 4462 834 65.6 MiB 0.08 0.00 9.4802 -194.196 -9.4802 9.4802 0.92 0.00081089 0.00072992 0.0350114 0.0317021 40 3857 20 6.79088e+06 336800 706193. 2443.58 20.10 0.480877 0.425287 26254 175826 -1 3750 20 2150 6380 414318 91535 8.47507 8.47507 -190.97 -8.47507 0 0 926341. 3205.33 0.34 0.14 0.15 -1 -1 0.34 0.0463026 0.0419684 183 255 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_123.v common 11.24 vpr 64.17 MiB -1 -1 0.18 20056 10 0.12 -1 -1 35860 -1 -1 12 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65708 30 32 172 204 1 133 74 17 17 289 -1 unnamed_device 25.8 MiB 1.89 790 7049 2015 4252 782 64.2 MiB 0.05 0.00 4.74332 -119.113 -4.74332 4.74332 0.94 0.000389166 0.000352306 0.0199462 0.0181442 30 2094 24 6.79088e+06 161664 556674. 1926.21 6.13 0.155691 0.13601 24526 138013 -1 1704 15 667 1522 94047 20784 4.33162 4.33162 -116.881 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65928 32 32 264 296 1 200 82 17 17 289 -1 unnamed_device 26.1 MiB 2.45 1289 8448 2191 5318 939 64.4 MiB 0.08 0.00 7.18863 -160.485 -7.18863 7.18863 0.93 0.000612795 0.000557231 0.0328445 0.0299871 38 3079 21 6.79088e+06 242496 678818. 2348.85 3.06 0.179419 0.158276 25966 169698 -1 2575 15 1269 3143 178719 39214 6.08296 6.08296 -151.708 -6.08296 0 0 902133. 3121.57 0.33 0.07 0.17 -1 -1 0.33 0.0252184 0.0227649 117 169 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_126.v common 9.66 vpr 64.39 MiB -1 -1 0.17 20092 9 0.16 -1 -1 36096 -1 -1 18 25 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65936 25 32 183 215 1 134 75 17 17 289 -1 unnamed_device 25.9 MiB 1.05 752 9555 2712 5903 940 64.4 MiB 0.06 0.00 5.16629 -99.605 -5.16629 5.16629 0.88 0.000438927 0.000398032 0.0281944 0.025565 30 2043 29 6.79088e+06 242496 556674. 1926.21 5.46 0.175251 0.152644 24526 138013 -1 1659 17 741 2054 108678 24546 4.39659 4.39659 -97.2578 -4.39659 0 0 706193. 2443.58 0.28 0.05 0.12 -1 -1 0.28 0.0193587 0.0173262 86 102 -1 -1 -1 -1 -fixed_k6_frac_N8_22nm.xml mult_127.v common 10.56 vpr 65.02 MiB -1 -1 0.23 20744 12 0.33 -1 -1 36356 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66576 32 32 300 332 1 226 85 17 17 289 -1 unnamed_device 26.5 MiB 1.86 1312 13291 3621 7142 2528 65.0 MiB 0.12 0.00 7.35568 -164.212 -7.35568 7.35568 0.90 0.000673353 0.000605805 0.052143 0.0471236 38 3697 28 6.79088e+06 282912 678818. 2348.85 5.00 0.227631 0.201279 25966 169698 -1 3095 17 1650 4419 232270 52748 6.67037 6.67037 -158.867 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 354 285 1 207 90 17 17 289 -1 unnamed_device 26.6 MiB 3.79 1137 15768 5063 8031 2674 65.0 MiB 0.14 0.00 5.46262 -163.811 -5.46262 5.46262 0.91 0.000520609 0.000475443 0.0422712 0.0385774 34 2793 23 6.87369e+06 363320 618332. 2139.56 1.90 0.15361 0.134513 25762 151098 -1 2290 18 1636 2589 181807 43066 4.4513 4.4513 -151.51 -4.4513 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0212311 0.0187931 142 47 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_002.v common 7.61 vpr 65.14 MiB -1 -1 0.16 20548 1 0.03 -1 -1 33884 -1 -1 24 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66700 30 32 363 293 1 199 86 17 17 289 -1 unnamed_device 26.8 MiB 2.73 995 9347 2406 6094 847 65.1 MiB 0.09 0.00 4.40625 -134.148 -4.40625 4.40625 0.90 0.000517663 0.000470325 0.0282397 0.0257073 34 2568 29 6.87369e+06 335372 618332. 2139.56 1.72 0.149534 0.130052 25762 151098 -1 2204 21 1821 2766 192148 46144 4.07136 4.07136 -140.123 -4.07136 0 0 787024. 2723.27 0.32 0.07 0.15 -1 -1 0.32 0.0244948 0.0215923 138 58 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_003.v common 7.76 vpr 64.99 MiB -1 -1 0.15 20320 1 0.03 -1 -1 33924 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66548 32 32 299 247 1 190 85 17 17 289 -1 unnamed_device 26.4 MiB 3.01 954 15337 4637 8345 2355 65.0 MiB 0.12 0.00 4.42735 -120.659 -4.42735 4.42735 0.92 0.000451198 0.000412041 0.0383292 0.0348731 34 2485 25 6.87369e+06 293451 618332. 2139.56 1.56 0.137988 0.120624 25762 151098 -1 1976 20 1261 1705 123346 29622 3.61336 3.61336 -117.518 -3.61336 0 0 787024. 2723.27 0.31 0.06 0.14 -1 -1 0.31 0.0203928 0.0179968 124 26 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_004.v common 6.06 vpr 64.80 MiB -1 -1 0.16 20308 1 0.03 -1 -1 34032 -1 -1 29 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66352 29 32 308 248 1 172 90 17 17 289 -1 unnamed_device 26.3 MiB 1.20 990 16170 4805 9691 1674 64.8 MiB 0.13 0.00 4.56722 -126.881 -4.56722 4.56722 0.91 0.00046816 0.000427161 0.0393312 0.0358649 34 2380 21 6.87369e+06 405241 618332. 2139.56 1.63 0.135423 0.118454 25762 151098 -1 2046 23 1518 2779 207672 47000 3.7744 3.7744 -124.262 -3.7744 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0221407 0.0194315 124 25 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_005.v common 8.05 vpr 65.18 MiB -1 -1 0.15 20468 1 0.03 -1 -1 33372 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66744 32 32 336 268 1 181 91 17 17 289 -1 unnamed_device 26.8 MiB 1.52 1020 12127 3332 7989 806 65.2 MiB 0.11 0.00 4.58138 -135.491 -4.58138 4.58138 0.92 0.000515996 0.000467648 0.0322305 0.0292693 28 2864 24 6.87369e+06 377294 531479. 1839.03 3.36 0.18598 0.162275 24610 126494 -1 2425 23 1873 3644 282352 63929 3.9097 3.9097 -138.221 -3.9097 0 0 648988. 2245.63 0.27 0.09 0.12 -1 -1 0.27 0.0253209 0.0223373 131 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_006.v common 5.87 vpr 64.66 MiB -1 -1 0.17 20756 1 0.03 -1 -1 33964 -1 -1 30 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66216 32 32 366 295 1 189 94 17 17 289 -1 unnamed_device 26.3 MiB 1.75 1076 15643 4151 9274 2218 64.7 MiB 0.13 0.00 3.36233 -119.977 -3.36233 3.36233 0.91 0.000500423 0.000455782 0.0396196 0.0360698 28 2604 23 6.87369e+06 419215 531479. 1839.03 0.96 0.106668 0.0939048 24610 126494 -1 2382 21 1482 2421 183960 41128 3.11061 3.11061 -126.364 -3.11061 0 0 648988. 2245.63 0.26 0.07 0.12 -1 -1 0.26 0.0235506 0.0206805 136 55 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_007.v common 7.32 vpr 64.40 MiB -1 -1 0.15 20332 1 0.03 -1 -1 33916 -1 -1 19 27 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65948 27 32 259 221 1 141 78 17 17 289 -1 unnamed_device 25.8 MiB 2.65 768 11200 3422 6221 1557 64.4 MiB 0.08 0.00 3.88482 -108.503 -3.88482 3.88482 0.93 0.000401929 0.000366432 0.0279202 0.0254617 34 1729 19 6.87369e+06 265503 618332. 2139.56 1.49 0.10845 0.0945339 25762 151098 -1 1509 20 1099 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17 289 -1 unnamed_device 26.2 MiB 4.51 866 10916 3152 5921 1843 64.7 MiB 0.09 0.00 4.09393 -136.454 -4.09393 4.09393 0.94 0.000459703 0.000418961 0.0304682 0.0277851 34 2156 24 6.87369e+06 223581 618332. 2139.56 3.28 0.170545 0.147626 25762 151098 -1 1860 21 1208 2066 158811 35660 3.14326 3.14326 -128.503 -3.14326 0 0 787024. 2723.27 0.32 0.06 0.15 -1 -1 0.32 0.0208871 0.0183738 107 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_011.v common 8.01 vpr 64.55 MiB -1 -1 0.15 20132 1 0.03 -1 -1 33736 -1 -1 16 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66104 30 32 303 262 1 148 78 17 17 289 -1 unnamed_device 26.1 MiB 3.48 765 11532 2973 7641 918 64.6 MiB 0.08 0.00 4.09699 -119.415 -4.09699 4.09699 0.88 0.000439755 0.000396931 0.0310568 0.0282592 34 1766 21 6.87369e+06 223581 618332. 2139.56 1.46 0.122252 0.106205 25762 151098 -1 1515 20 1085 1715 117780 28644 2.85166 2.85166 -105.6 -2.85166 0 0 787024. 2723.27 0.30 0.05 0.15 -1 -1 0.30 0.0193595 0.0170408 98 58 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_012.v common 9.80 vpr 64.73 MiB -1 -1 0.16 20492 1 0.03 -1 -1 33720 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66284 32 32 276 237 1 171 81 17 17 289 -1 unnamed_device 26.3 MiB 2.70 706 8306 1954 5512 840 64.7 MiB 0.06 0.00 3.6525 -111.833 -3.6525 3.6525 0.90 0.000431744 0.00039486 0.0219474 0.0200454 36 1988 27 6.87369e+06 237555 648988. 2245.63 3.97 0.153577 0.132596 26050 158493 -1 1661 19 1125 1568 111534 28073 2.96326 2.96326 -113.226 -2.96326 0 0 828058. 2865.25 0.32 0.05 0.15 -1 -1 0.32 0.0185689 0.0164115 107 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_013.v common 9.59 vpr 65.15 MiB -1 -1 0.15 20424 1 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363 295 1 181 95 17 17 289 -1 unnamed_device 26.8 MiB 2.84 989 10031 2534 6882 615 65.2 MiB 0.09 0.00 4.81484 -142.23 -4.81484 4.81484 0.91 0.000507392 0.000463137 0.0260487 0.0237922 32 2593 24 6.87369e+06 433189 586450. 2029.24 1.05 0.0931325 0.0816057 25474 144626 -1 2153 22 1723 2788 217881 49682 4.00776 4.00776 -140.461 -4.00776 0 0 744469. 2576.02 0.29 0.08 0.14 -1 -1 0.29 0.0242276 0.0213058 133 58 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_015.v common 5.91 vpr 64.67 MiB -1 -1 0.15 20608 1 0.03 -1 -1 33732 -1 -1 19 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66224 29 32 248 215 1 142 80 17 17 289 -1 unnamed_device 26.1 MiB 1.93 614 5068 1019 3719 330 64.7 MiB 0.04 0.00 3.26207 -95.0897 -3.26207 3.26207 0.93 0.000373238 0.000339187 0.0128208 0.0117071 26 1919 28 6.87369e+06 265503 503264. 1741.40 0.97 0.0698518 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66596 32 32 323 276 1 156 92 17 17 289 -1 unnamed_device 26.5 MiB 2.88 847 14168 4025 7985 2158 65.0 MiB 0.10 0.00 3.09156 -110.795 -3.09156 3.09156 0.89 0.000468919 0.000422044 0.0332836 0.0303249 34 2031 19 6.87369e+06 391268 618332. 2139.56 1.51 0.125978 0.109575 25762 151098 -1 1698 23 1184 1734 139759 32212 2.18787 2.18787 -100.659 -2.18787 0 0 787024. 2723.27 0.30 0.06 0.14 -1 -1 0.30 0.0233242 0.0204478 109 62 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_019.v common 4.69 vpr 64.66 MiB -1 -1 0.14 20456 1 0.03 -1 -1 33556 -1 -1 14 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66216 30 32 222 206 1 117 76 17 17 289 -1 unnamed_device 26.3 MiB 0.69 656 11276 3436 6760 1080 64.7 MiB 0.07 0.00 2.61023 -88.8242 -2.61023 2.61023 0.91 0.000359245 0.000329115 0.0263573 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66840 32 32 372 300 1 206 86 17 17 289 -1 unnamed_device 26.8 MiB 2.46 995 6701 1305 5169 227 65.3 MiB 0.07 0.00 4.31715 -129.69 -4.31715 4.31715 0.91 0.000522326 0.00047487 0.0207729 0.0189426 34 3077 27 6.87369e+06 307425 618332. 2139.56 2.18 0.143547 0.124338 25762 151098 -1 2241 22 1750 2856 245759 55031 3.75866 3.75866 -130.038 -3.75866 0 0 787024. 2723.27 0.31 0.08 0.15 -1 -1 0.31 0.024984 0.0220305 142 59 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_023.v common 7.30 vpr 64.39 MiB -1 -1 0.13 20052 1 0.03 -1 -1 34212 -1 -1 17 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65936 26 32 190 182 1 108 75 17 17 289 -1 unnamed_device 25.9 MiB 2.02 371 10977 3839 5013 2125 64.4 MiB 0.06 0.00 2.58413 -70.3474 -2.58413 2.58413 0.93 0.000297288 0.000269046 0.0225869 0.0205695 28 1325 27 6.87369e+06 237555 531479. 1839.03 2.28 0.104498 0.0906076 24610 126494 -1 1074 22 742 1040 84221 21563 2.50407 2.50407 -79.8397 -2.50407 0 0 648988. 2245.63 0.27 0.04 0.12 -1 -1 0.27 0.0144896 0.0126549 67 21 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_024.v common 5.21 vpr 64.88 MiB -1 -1 0.15 20084 1 0.03 -1 -1 33724 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66432 32 32 285 227 1 169 87 17 17 289 -1 unnamed_device 26.4 MiB 1.17 952 5847 1159 4467 221 64.9 MiB 0.05 0.00 4.63338 -129.909 -4.63338 4.63338 0.90 0.000394512 0.000360154 0.0151736 0.0138561 30 2387 25 6.87369e+06 321398 556674. 1926.21 1.02 0.0757989 0.0663911 25186 138497 -1 1962 22 1181 2132 158416 34156 3.7241 3.7241 -122.996 -3.7241 0 0 706193. 2443.58 0.28 0.06 0.13 -1 -1 0.28 0.0204275 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2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66692 32 32 300 245 1 169 94 17 17 289 -1 unnamed_device 26.6 MiB 0.97 922 10744 2499 7805 440 65.1 MiB 0.08 0.00 4.70738 -131.097 -4.70738 4.70738 0.90 0.000386362 0.000353004 0.0224475 0.0204594 26 2404 21 6.87369e+06 419215 503264. 1741.40 1.08 0.0781243 0.0685282 24322 120374 -1 2181 26 1365 2192 198316 46035 4.0267 4.0267 -126.462 -4.0267 0 0 618332. 2139.56 0.24 0.08 0.10 -1 -1 0.24 0.0223639 0.0195544 120 21 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_027.v common 5.21 vpr 65.20 MiB -1 -1 0.16 20372 1 0.03 -1 -1 33808 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66760 32 32 297 233 1 177 95 17 17 289 -1 unnamed_device 26.6 MiB 1.04 1018 15215 4457 9037 1721 65.2 MiB 0.12 0.00 3.58631 -115.037 -3.58631 3.58631 0.92 0.000481488 0.000441483 0.0347799 0.0316925 28 2435 25 6.87369e+06 433189 531479. 1839.03 1.06 0.100177 0.0885296 24610 126494 -1 2089 16 1119 1959 128537 28970 2.77996 2.77996 -111.593 -2.77996 0 0 648988. 2245.63 0.27 0.06 0.12 -1 -1 0.27 0.0183776 0.0163675 130 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_028.v common 6.32 vpr 64.65 MiB -1 -1 0.16 20620 1 0.03 -1 -1 33604 -1 -1 28 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66204 32 32 338 277 1 186 92 17 17 289 -1 unnamed_device 26.3 MiB 2.09 1070 17066 5177 9769 2120 64.7 MiB 0.14 0.00 4.79173 -136.462 -4.79173 4.79173 0.92 0.000507672 0.000461251 0.0429621 0.0391144 30 2520 24 6.87369e+06 391268 556674. 1926.21 1.03 0.10785 0.0950071 25186 138497 -1 2060 17 1055 1910 104827 24868 3.6681 3.6681 -124.886 -3.6681 0 0 706193. 2443.58 0.28 0.05 0.14 -1 -1 0.28 0.0191859 0.0169518 131 47 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_029.v common 5.71 vpr 64.74 MiB -1 -1 0.15 20304 1 0.03 -1 -1 33756 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66296 32 32 284 241 1 148 80 17 17 289 -1 unnamed_device 26.4 MiB 1.10 703 9368 2220 5797 1351 64.7 MiB 0.07 0.00 3.24007 -107.338 -3.24007 3.24007 0.91 0.000422738 0.000385943 0.0246142 0.0224844 34 1987 21 6.87369e+06 223581 618332. 2139.56 1.49 0.112037 0.0972992 25762 151098 -1 1602 21 1019 1690 110919 26652 2.93026 2.93026 -109.609 -2.93026 0 0 787024. 2723.27 0.30 0.05 0.15 -1 -1 0.30 0.0192975 0.0169086 99 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_030.v common 5.87 vpr 64.79 MiB -1 -1 0.14 20320 1 0.03 -1 -1 33852 -1 -1 26 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66340 30 32 262 227 1 138 88 17 17 289 -1 unnamed_device 26.2 MiB 1.36 624 12763 3540 6427 2796 64.8 MiB 0.08 0.00 3.24697 -98.9537 -3.24697 3.24697 0.89 0.000411744 0.000374607 0.0276799 0.0251511 34 1668 26 6.87369e+06 363320 618332. 2139.56 1.47 0.113433 0.0985374 25762 151098 -1 1287 19 837 1210 79394 20357 2.88626 2.88626 -92.5246 -2.88626 0 0 787024. 2723.27 0.30 0.04 0.14 -1 -1 0.30 0.0167451 0.0147636 97 29 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_031.v common 5.04 vpr 64.78 MiB -1 -1 0.15 20424 1 0.03 -1 -1 33736 -1 -1 18 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 28 32 260 223 1 140 78 17 17 289 -1 unnamed_device 26.2 MiB 1.06 763 12694 4114 7113 1467 64.8 MiB 0.09 0.00 3.5993 -104.629 -3.5993 3.5993 0.88 0.0003966 0.000361848 0.0320318 0.0293155 32 2109 21 6.87369e+06 251529 586450. 2029.24 0.98 0.0823055 0.0726557 25474 144626 -1 1799 19 1081 1917 171125 38306 3.09656 3.09656 -109.387 -3.09656 0 0 744469. 2576.02 0.29 0.06 0.13 -1 -1 0.29 0.0169574 0.0149949 95 27 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_032.v common 4.96 vpr 64.85 MiB -1 -1 0.15 20388 1 0.03 -1 -1 33752 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66404 32 32 253 210 1 156 81 17 17 289 -1 unnamed_device 26.5 MiB 0.88 834 13031 3636 7853 1542 64.8 MiB 0.10 0.00 3.99153 -123.226 -3.99153 3.99153 0.92 0.000410092 0.000372736 0.0325485 0.0297345 30 1992 21 6.87369e+06 237555 556674. 1926.21 0.97 0.0849014 0.074919 25186 138497 -1 1733 20 1068 1783 108326 24960 2.87696 2.87696 -115.111 -2.87696 0 0 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66188 29 32 291 250 1 154 86 17 17 289 -1 unnamed_device 26.2 MiB 3.45 863 14072 4376 7539 2157 64.6 MiB 0.10 0.00 3.04756 -100.489 -3.04756 3.04756 0.91 0.000433109 0.000391232 0.0336179 0.0306664 34 1909 21 6.87369e+06 349346 618332. 2139.56 1.51 0.12378 0.107882 25762 151098 -1 1708 19 1091 1614 119245 28263 2.38047 2.38047 -99.7204 -2.38047 0 0 787024. 2723.27 0.32 0.05 0.15 -1 -1 0.32 0.0186644 0.0164849 106 48 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_035.v common 9.27 vpr 65.55 MiB -1 -1 0.16 20460 1 0.03 -1 -1 33700 -1 -1 40 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67124 32 32 367 282 1 201 104 17 17 289 -1 unnamed_device 26.9 MiB 4.12 1118 10108 2278 7040 790 65.6 MiB 0.09 0.00 4.17389 -123.088 -4.17389 4.17389 0.92 0.000538795 0.000490771 0.0240015 0.021772 26 3090 38 6.87369e+06 558954 503264. 1741.40 1.87 0.124758 0.110147 24322 120374 -1 2752 73 3440 6386 638453 134864 3.8437 3.8437 -130.264 -3.8437 0 0 618332. 2139.56 0.26 0.23 0.11 -1 -1 0.26 0.0677001 0.0584745 156 26 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_036.v common 9.98 vpr 65.27 MiB -1 -1 0.16 20564 1 0.03 -1 -1 33896 -1 -1 38 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66836 32 32 391 311 1 194 102 17 17 289 -1 unnamed_device 26.8 MiB 3.88 1050 18428 5889 9545 2994 65.3 MiB 0.15 0.00 3.99748 -134.85 -3.99748 3.99748 0.91 0.000532083 0.000481872 0.0443131 0.0401879 30 2304 26 6.87369e+06 531006 556674. 1926.21 2.89 0.198731 0.172884 25186 138497 -1 1893 18 1445 2277 122140 29198 2.89086 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c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66976 31 32 370 297 1 187 89 17 17 289 -1 unnamed_device 27.0 MiB 3.10 953 14543 4925 6755 2863 65.4 MiB 0.13 0.00 3.78134 -121.658 -3.78134 3.78134 0.95 0.000538184 0.000490247 0.041515 0.0378113 34 2770 24 6.87369e+06 363320 618332. 2139.56 1.77 0.160498 0.140333 25762 151098 -1 2008 21 1651 2803 198970 45902 3.16061 3.16061 -121.592 -3.16061 0 0 787024. 2723.27 0.32 0.07 0.15 -1 -1 0.32 0.0243826 0.0214994 136 57 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_039.v common 12.36 vpr 65.05 MiB -1 -1 0.18 20620 1 0.03 -1 -1 34008 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66608 31 32 377 302 1 237 88 17 17 289 -1 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102 17 17 289 -1 unnamed_device 27.4 MiB 3.79 1125 12954 3388 8890 676 66.0 MiB 0.13 0.00 4.84068 -153.465 -4.84068 4.84068 0.87 0.000544515 0.000496071 0.035678 0.0325259 30 2992 40 6.87369e+06 531006 556674. 1926.21 4.83 0.232938 0.204696 25186 138497 -1 2204 20 1416 2329 119183 30863 3.83736 3.83736 -145.825 -3.83736 0 0 706193. 2443.58 0.28 0.07 0.13 -1 -1 0.28 0.0270398 0.0239869 173 84 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_044.v common 5.93 vpr 64.34 MiB -1 -1 0.16 20384 1 0.03 -1 -1 33600 -1 -1 22 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65880 31 32 261 225 1 148 85 17 17 289 -1 unnamed_device 26.0 MiB 1.94 779 13291 4134 7087 2070 64.3 MiB 0.08 0.00 3.55895 -107.74 -3.55895 3.55895 0.87 0.000348471 0.000318322 0.0281164 0.025622 32 2017 21 6.87369e+06 307425 586450. 2029.24 0.98 0.0788197 0.0692308 25474 144626 -1 1822 19 1136 1936 156094 34416 2.84596 2.84596 -105.425 -2.84596 0 0 744469. 2576.02 0.29 0.06 0.14 -1 -1 0.29 0.0170216 0.0149344 96 24 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_045.v common 7.11 vpr 65.02 MiB -1 -1 0.17 20468 1 0.03 -1 -1 33824 -1 -1 23 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66580 31 32 337 267 1 207 86 17 17 289 -1 unnamed_device 26.6 MiB 2.82 1055 8969 2107 6380 482 65.0 MiB 0.09 0.00 4.79158 -142.334 -4.79158 4.79158 0.91 0.000491833 0.000445393 0.0256183 0.0234377 30 2731 23 6.87369e+06 321398 556674. 1926.21 1.15 0.0920384 0.0807424 25186 138497 -1 2039 22 1317 1992 125222 30107 3.86576 3.86576 -132.751 -3.86576 0 0 706193. 2443.58 0.29 0.06 0.13 -1 -1 0.29 0.0233319 0.0205559 140 30 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_046.v common 7.11 vpr 65.29 MiB -1 -1 0.16 20532 1 0.03 -1 -1 33808 -1 -1 32 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66852 32 32 349 284 1 183 96 17 17 289 -1 unnamed_device 27.0 MiB 2.29 980 9951 2142 7372 437 65.3 MiB 0.09 0.00 3.6843 -115.486 -3.6843 3.6843 0.92 0.000499064 0.000448106 0.0253224 0.0230711 32 2890 26 6.87369e+06 447163 586450. 2029.24 1.62 0.116301 0.101723 25474 144626 -1 2221 21 1588 2681 224480 50258 3.07761 3.07761 -115.254 -3.07761 0 0 744469. 2576.02 0.29 0.08 0.14 -1 -1 0.29 0.0227179 0.0199562 132 50 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_047.v common 5.24 vpr 64.91 MiB -1 -1 0.14 20496 1 0.03 -1 -1 33968 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66468 32 32 291 230 1 175 90 17 17 289 -1 unnamed_device 26.3 MiB 0.74 972 9537 2296 6533 708 64.9 MiB 0.08 0.00 4.25479 -129.925 -4.25479 4.25479 0.85 0.00047277 0.000429986 0.0221583 0.0201924 34 2449 22 6.87369e+06 363320 618332. 2139.56 1.50 0.110816 0.096135 25762 151098 -1 2032 21 1272 2425 189312 41406 3.7011 3.7011 -125.423 -3.7011 0 0 787024. 2723.27 0.29 0.07 0.14 -1 -1 0.29 0.0211511 0.0186367 123 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_048.v common 8.08 vpr 64.84 MiB -1 -1 0.16 20532 1 0.03 -1 -1 33924 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66392 32 32 353 287 1 203 86 17 17 289 -1 unnamed_device 26.5 MiB 3.34 1122 14450 4547 7634 2269 64.8 MiB 0.12 0.00 5.14049 -153.237 -5.14049 5.14049 0.90 0.000505941 0.000460523 0.0407089 0.0371256 34 2716 24 6.87369e+06 307425 618332. 2139.56 1.58 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66504 32 32 306 248 1 170 97 17 17 289 -1 unnamed_device 26.4 MiB 1.07 881 12751 3354 7696 1701 64.9 MiB 0.10 0.00 4.26989 -123.123 -4.26989 4.26989 0.90 0.000461614 0.00042136 0.028219 0.0256544 30 2195 22 6.87369e+06 461137 556674. 1926.21 0.97 0.0867729 0.0761345 25186 138497 -1 1695 21 965 1709 89776 21316 3.6008 3.6008 -117.658 -3.6008 0 0 706193. 2443.58 0.28 0.05 0.13 -1 -1 0.28 0.0204462 0.0180247 124 21 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_052.v common 7.24 vpr 65.05 MiB -1 -1 0.15 20244 1 0.03 -1 -1 33828 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66608 32 32 319 257 1 203 86 17 17 289 -1 unnamed_device 26.7 MiB 2.45 1140 14450 4739 7431 2280 65.0 MiB 0.12 0.00 4.86398 -140.272 -4.86398 4.86398 0.89 0.000487476 0.000445578 0.0373875 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66032 32 32 251 219 1 141 86 17 17 289 -1 unnamed_device 25.9 MiB 0.88 730 9914 2670 6709 535 64.5 MiB 0.07 0.00 3.5583 -105.077 -3.5583 3.5583 0.90 0.000422254 0.000386898 0.0224718 0.0205284 28 1795 23 6.87369e+06 307425 531479. 1839.03 0.93 0.0734855 0.0644472 24610 126494 -1 1697 21 974 1670 124586 29567 2.90826 2.90826 -103.963 -2.90826 0 0 648988. 2245.63 0.27 0.05 0.12 -1 -1 0.27 0.0181162 0.0158982 93 20 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_056.v common 7.31 vpr 65.08 MiB -1 -1 0.16 20500 1 0.03 -1 -1 33760 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66644 32 32 341 285 1 188 82 17 17 289 -1 unnamed_device 26.5 MiB 2.11 968 15568 5616 7798 2154 65.1 MiB 0.12 0.00 3.7434 -130.891 -3.7434 3.7434 0.90 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66580 32 32 349 273 1 191 101 17 17 289 -1 unnamed_device 26.6 MiB 2.51 1091 19371 5911 10963 2497 65.0 MiB 0.16 0.00 5.19487 -138.438 -5.19487 5.19487 0.90 0.000517424 0.000472626 0.0452253 0.0410528 28 2690 23 6.87369e+06 517032 531479. 1839.03 1.43 0.115468 0.101684 24610 126494 -1 2422 22 1633 3034 222693 49806 4.75015 4.75015 -146.366 -4.75015 0 0 648988. 2245.63 0.26 0.08 0.13 -1 -1 0.26 0.0239894 0.0210183 145 26 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_064.v common 5.39 vpr 64.74 MiB -1 -1 0.12 20492 1 0.03 -1 -1 34052 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66296 32 32 247 207 1 153 83 17 17 289 -1 unnamed_device 26.2 MiB 0.88 765 8363 1967 5928 468 64.7 MiB 0.07 0.00 3.6502 -113.574 -3.6502 3.6502 0.89 0.000400929 0.000366399 0.0202049 0.0184325 34 2139 22 6.87369e+06 265503 618332. 2139.56 1.49 0.100872 0.0874606 25762 151098 -1 1778 19 1158 2038 144835 33647 2.93826 2.93826 -111.413 -2.93826 0 0 787024. 2723.27 0.30 0.05 0.14 -1 -1 0.30 0.0168042 0.0148908 98 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_065.v common 7.39 vpr 64.98 MiB -1 -1 0.15 20272 1 0.03 -1 -1 33768 -1 -1 34 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66544 30 32 278 235 1 151 96 17 17 289 -1 unnamed_device 26.5 MiB 2.91 687 8418 1716 5962 740 65.0 MiB 0.07 0.00 3.88482 -111.398 -3.88482 3.88482 0.90 0.000445705 0.000404815 0.0189174 0.0171527 28 2032 22 6.87369e+06 475111 531479. 1839.03 1.43 0.0792183 0.069529 24610 126494 -1 1732 18 1171 2098 140097 34058 3.01326 3.01326 -110.382 -3.01326 0 0 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 32 32 358 289 1 183 90 17 17 289 -1 unnamed_device 26.7 MiB 2.67 806 8532 1884 6173 475 65.1 MiB 0.08 0.00 4.39805 -136.981 -4.39805 4.39805 0.91 0.000520112 0.000474618 0.0244185 0.0223366 34 2439 23 6.87369e+06 363320 618332. 2139.56 1.68 0.139763 0.121893 25762 151098 -1 1892 22 1562 2465 167343 39695 4.014 4.014 -132.895 -4.014 0 0 787024. 2723.27 0.32 0.07 0.15 -1 -1 0.32 0.0244201 0.0214172 132 51 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_068.v common 9.64 vpr 65.29 MiB -1 -1 0.16 20576 1 0.03 -1 -1 33520 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66856 32 32 353 285 1 188 91 17 17 289 -1 unnamed_device 26.9 MiB 2.52 1121 14983 4753 8344 1886 65.3 MiB 0.13 0.00 4.71348 -141.457 -4.71348 4.71348 0.87 0.000514885 0.000468321 0.0397039 0.0361257 36 2713 22 6.87369e+06 377294 648988. 2245.63 3.97 0.201791 0.175664 26050 158493 -1 2340 22 1503 2593 259528 52852 4.01806 4.01806 -139.978 -4.01806 0 0 828058. 2865.25 0.31 0.08 0.14 -1 -1 0.31 0.02407 0.0212325 133 48 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_069.v common 10.44 vpr 64.79 MiB -1 -1 0.15 20500 1 0.03 -1 -1 33660 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66348 32 32 276 237 1 165 79 17 17 289 -1 unnamed_device 26.4 MiB 3.95 883 12923 4460 6401 2062 64.8 MiB 0.10 0.00 4.76482 -134.311 -4.76482 4.76482 0.94 0.000428806 0.000391035 0.0346738 0.0315959 34 2173 23 6.87369e+06 209608 618332. 2139.56 3.28 0.168537 0.146229 25762 151098 -1 1919 24 1085 1501 133785 29128 3.40117 3.40117 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66620 30 32 329 273 1 167 96 17 17 289 -1 unnamed_device 26.4 MiB 3.09 925 17835 5186 10054 2595 65.1 MiB 0.13 0.00 3.47005 -102.148 -3.47005 3.47005 0.90 0.000480914 0.000431892 0.0403324 0.0365238 32 2458 31 6.87369e+06 475111 586450. 2029.24 1.04 0.108145 0.0948711 25474 144626 -1 1948 22 1270 2371 177844 39960 2.91726 2.91726 -101.622 -2.91726 0 0 744469. 2576.02 0.30 0.06 0.14 -1 -1 0.30 0.0212569 0.0186187 124 52 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_072.v common 6.55 vpr 65.00 MiB -1 -1 0.15 20288 1 0.03 -1 -1 33868 -1 -1 35 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66560 28 32 277 229 1 156 95 17 17 289 -1 unnamed_device 26.5 MiB 2.19 875 14783 4032 9129 1622 65.0 MiB 0.11 0.00 4.05975 -105.458 -4.05975 4.05975 0.91 0.000423658 0.000386651 0.0307022 0.027963 26 2270 25 6.87369e+06 489084 503264. 1741.40 1.23 0.0896358 0.0786259 24322 120374 -1 2027 21 1268 2387 205598 45639 3.972 3.972 -115.213 -3.972 0 0 618332. 2139.56 0.26 0.07 0.12 -1 -1 0.26 0.0199025 0.0174921 117 20 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_073.v common 9.95 vpr 64.93 MiB -1 -1 0.15 20288 1 0.03 -1 -1 33540 -1 -1 17 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66484 30 32 317 269 1 155 79 17 17 289 -1 unnamed_device 26.4 MiB 3.34 802 13599 4534 7471 1594 64.9 MiB 0.11 0.00 4.04073 -123.042 -4.04073 4.04073 0.93 0.000444007 0.00040368 0.0385088 0.0350249 28 2087 22 6.87369e+06 237555 531479. 1839.03 3.45 0.177637 0.153918 24610 126494 -1 1892 21 1343 2306 173766 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success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66420 31 32 293 230 1 175 94 17 17 289 -1 unnamed_device 26.3 MiB 0.92 1014 15430 4861 8054 2515 64.9 MiB 0.12 0.00 4.6284 -133.663 -4.6284 4.6284 0.94 0.000447448 0.000403242 0.035067 0.031753 32 2693 29 6.87369e+06 433189 586450. 2029.24 1.12 0.103173 0.0908666 25474 144626 -1 2134 19 1219 2210 164082 37394 3.5018 3.5018 -123.469 -3.5018 0 0 744469. 2576.02 0.30 0.06 0.14 -1 -1 0.30 0.020363 0.0181257 129 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_076.v common 9.00 vpr 64.91 MiB -1 -1 0.14 20480 1 0.03 -1 -1 34044 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66472 32 32 350 275 1 214 87 17 17 289 -1 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17 289 -1 unnamed_device 26.7 MiB 3.97 958 7038 1640 4840 558 65.1 MiB 0.08 0.00 4.57902 -143.19 -4.57902 4.57902 0.92 0.000533304 0.000486529 0.0229364 0.0209179 34 2472 21 6.87369e+06 307425 618332. 2139.56 1.68 0.136744 0.118895 25762 151098 -1 1990 20 1617 2540 179225 41610 3.7651 3.7651 -137.998 -3.7651 0 0 787024. 2723.27 0.31 0.07 0.15 -1 -1 0.31 0.0236872 0.0209684 136 58 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_081.v common 8.05 vpr 64.68 MiB -1 -1 0.15 20480 1 0.03 -1 -1 33708 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66236 32 32 340 270 1 204 87 17 17 289 -1 unnamed_device 26.3 MiB 2.99 1035 6615 1396 4961 258 64.7 MiB 0.07 0.00 5.21006 -150.271 -5.21006 5.21006 0.91 0.000528523 0.000484294 0.0197894 0.0181251 34 2845 24 6.87369e+06 321398 618332. 2139.56 1.86 0.137934 0.120667 25762 151098 -1 2413 22 1704 2806 223267 50806 4.44196 4.44196 -146.742 -4.44196 0 0 787024. 2723.27 0.31 0.08 0.14 -1 -1 0.31 0.02527 0.0223577 140 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_082.v common 9.95 vpr 64.92 MiB -1 -1 0.16 20468 1 0.03 -1 -1 33624 -1 -1 28 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66476 31 32 340 275 1 201 91 17 17 289 -1 unnamed_device 26.5 MiB 2.67 1178 17839 5313 10611 1915 64.9 MiB 0.15 0.00 5.241 -151.339 -5.241 5.241 0.92 0.000485306 0.000441947 0.0459976 0.0418424 36 2587 21 6.87369e+06 391268 648988. 2245.63 3.99 0.201547 0.174779 26050 158493 -1 2283 20 1514 2383 165366 37937 4.261 4.261 -144.483 -4.261 0 0 828058. 2865.25 0.33 0.07 0.15 -1 -1 0.33 0.0231214 0.020453 141 43 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_083.v common 7.40 vpr 65.35 MiB -1 -1 0.15 20704 1 0.03 -1 -1 34000 -1 -1 32 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66916 30 32 377 310 1 183 94 17 17 289 -1 unnamed_device 26.9 MiB 3.20 1032 10531 2482 6524 1525 65.3 MiB 0.09 0.00 4.69758 -143.214 -4.69758 4.69758 0.90 0.000515593 0.000469424 0.0283257 0.0257929 32 2579 23 6.87369e+06 447163 586450. 2029.24 1.03 0.0956764 0.0837837 25474 144626 -1 2142 21 1344 2275 193292 43208 3.4535 3.4535 -131.105 -3.4535 0 0 744469. 2576.02 0.29 0.07 0.14 -1 -1 0.29 0.0233241 0.0205048 135 78 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_084.v common 7.41 vpr 64.85 MiB -1 -1 0.15 20352 1 0.03 -1 -1 33672 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66404 32 32 365 294 1 187 85 17 17 289 -1 unnamed_device 26.5 MiB 2.64 1030 11245 3242 7121 882 64.8 MiB 0.10 0.00 4.79284 -145.044 -4.79284 4.79284 0.87 0.000510084 0.000466337 0.032837 0.0300184 34 2708 22 6.87369e+06 293451 618332. 2139.56 1.66 0.146884 0.128623 25762 151098 -1 2211 24 1772 3172 252269 55262 3.84946 3.84946 -137.262 -3.84946 0 0 787024. 2723.27 0.30 0.09 0.14 -1 -1 0.30 0.0261573 0.0230354 132 54 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_085.v common 8.09 vpr 65.24 MiB -1 -1 0.16 20512 1 0.03 -1 -1 33964 -1 -1 29 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66804 29 32 378 310 1 179 90 17 17 289 -1 unnamed_device 26.9 MiB 3.18 973 10944 3003 6644 1297 65.2 MiB 0.09 0.00 4.08063 -124.263 -4.08063 4.08063 0.92 0.000558358 0.000508298 0.030109 0.0274239 34 2457 23 6.87369e+06 405241 618332. 2139.56 1.69 0.144418 0.125811 25762 151098 -1 2069 23 1652 2711 206508 47762 3.11951 3.11951 -119.044 -3.11951 0 0 787024. 2723.27 0.31 0.08 0.15 -1 -1 0.31 0.0252513 0.0221205 132 79 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_086.v common 5.46 vpr 64.55 MiB -1 -1 0.12 20460 1 0.03 -1 -1 33716 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66096 32 32 243 205 1 149 81 17 17 289 -1 unnamed_device 26.0 MiB 0.76 780 13906 5362 7318 1226 64.5 MiB 0.10 0.00 4.08063 -122.384 -4.08063 4.08063 0.93 0.00038561 0.000352678 0.0329269 0.0300005 34 1855 45 6.87369e+06 237555 618332. 2139.56 1.53 0.129855 0.113385 25762 151098 -1 1545 20 890 1368 99226 22570 2.94401 2.94401 -106.567 -2.94401 0 0 787024. 2723.27 0.32 0.05 0.15 -1 -1 0.32 0.018086 0.0159531 96 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_087.v common 9.28 vpr 65.25 MiB -1 -1 0.15 20536 1 0.03 -1 -1 33636 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66820 32 32 373 302 1 184 98 17 17 289 -1 unnamed_device 26.8 MiB 5.18 1081 9548 2182 6489 877 65.3 MiB 0.08 0.00 4.62608 -140.581 -4.62608 4.62608 0.85 0.00053273 0.000484603 0.0232394 0.0211392 28 2635 30 6.87369e+06 475111 531479. 1839.03 1.10 0.0933675 0.0815094 24610 126494 -1 2394 20 1652 2696 203697 47134 4.0193 4.0193 -140.548 -4.0193 0 0 648988. 2245.63 0.25 0.08 0.11 -1 -1 0.25 0.0237858 0.0209788 137 62 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_088.v common 10.08 vpr 65.06 MiB -1 -1 0.15 20392 1 0.03 -1 -1 33868 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66624 32 32 397 314 1 197 85 17 17 289 -1 unnamed_device 26.6 MiB 4.71 1050 13477 3452 8462 1563 65.1 MiB 0.13 0.00 4.60818 -154.696 -4.60818 4.60818 0.92 0.000559627 0.000509273 0.0433323 0.0394866 34 2764 25 6.87369e+06 293451 618332. 2139.56 2.13 0.169146 0.148152 25762 151098 -1 2341 19 1705 2865 213262 48811 3.7531 3.7531 -149.559 -3.7531 0 0 787024. 2723.27 0.31 0.08 0.14 -1 -1 0.31 0.0240206 0.021267 142 62 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_089.v common 8.54 vpr 64.79 MiB -1 -1 0.14 20484 1 0.03 -1 -1 33656 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66340 32 32 269 231 1 170 80 17 17 289 -1 unnamed_device 26.3 MiB 3.70 803 10744 3029 6489 1226 64.8 MiB 0.09 0.00 4.47622 -122.656 -4.47622 4.47622 0.91 0.000440161 0.000400585 0.028441 0.0260283 34 2330 21 6.87369e+06 223581 618332. 2139.56 1.70 0.120409 0.105149 25762 151098 -1 1874 19 1142 1513 111450 26852 3.4908 3.4908 -118.606 -3.4908 0 0 787024. 2723.27 0.31 0.05 0.15 -1 -1 0.31 0.0179319 0.0158883 106 26 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_090.v common 4.84 vpr 64.72 MiB -1 -1 0.14 20424 1 0.03 -1 -1 33916 -1 -1 20 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66272 31 32 245 205 1 153 83 17 17 289 -1 unnamed_device 26.1 MiB 0.82 704 7103 1505 5021 577 64.7 MiB 0.06 0.00 4.06963 -117.109 -4.06963 4.06963 0.93 0.000423064 0.000386493 0.0176076 0.0160998 30 1825 19 6.87369e+06 279477 556674. 1926.21 0.94 0.066098 0.0577397 25186 138497 -1 1577 16 870 1445 78907 18836 2.91301 2.91301 -105.151 -2.91301 0 0 706193. 2443.58 0.28 0.04 0.14 -1 -1 0.28 0.0148382 0.0131602 99 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_091.v common 8.25 vpr 65.34 MiB -1 -1 0.14 20476 1 0.03 -1 -1 33812 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66908 32 32 348 274 1 215 87 17 17 289 -1 unnamed_device 26.9 MiB 3.33 1122 16407 5100 9312 1995 65.3 MiB 0.15 0.00 4.76368 -149.576 -4.76368 4.76368 0.87 0.000506264 0.000462711 0.044131 0.0403742 34 3132 23 6.87369e+06 321398 618332. 2139.56 1.81 0.163202 0.144159 25762 151098 -1 2492 20 1868 2567 249452 54373 4.30566 4.30566 -151.517 -4.30566 0 0 787024. 2723.27 0.30 0.08 0.14 -1 -1 0.30 0.0231735 0.0205278 145 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_092.v common 10.34 vpr 65.04 MiB -1 -1 0.16 20532 1 0.03 -1 -1 33624 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66604 32 32 356 289 1 202 91 17 17 289 -1 unnamed_device 26.6 MiB 3.15 1027 10087 2665 7077 345 65.0 MiB 0.09 0.00 5.28228 -152.543 -5.28228 5.28228 0.91 0.000499252 0.000455204 0.0272394 0.0248898 36 2623 39 6.87369e+06 377294 648988. 2245.63 4.00 0.196689 0.170004 26050 158493 -1 2094 19 1245 1937 117668 28657 4.6349 4.6349 -144.976 -4.6349 0 0 828058. 2865.25 0.32 0.06 0.15 -1 -1 0.32 0.0217863 0.0192983 142 53 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_093.v common 9.12 vpr 65.37 MiB -1 -1 0.14 20448 1 0.03 -1 -1 33416 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66936 32 32 349 260 1 204 100 17 17 289 -1 unnamed_device 26.9 MiB 0.95 1027 19820 5642 10737 3441 65.4 MiB 0.17 0.00 5.45503 -148.146 -5.45503 5.45503 0.93 0.000477641 0.000433255 0.0463213 0.0418618 30 3056 37 6.87369e+06 503058 556674. 1926.21 4.91 0.216999 0.190163 25186 138497 -1 2126 21 1515 2796 169916 40317 4.54885 4.54885 -143.677 -4.54885 0 0 706193. 2443.58 0.29 0.07 0.13 -1 -1 0.29 0.024568 0.021655 157 -1 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_094.v common 7.03 vpr 65.03 MiB -1 -1 0.16 20228 1 0.03 -1 -1 33520 -1 -1 34 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66592 30 32 316 264 1 165 96 17 17 289 -1 unnamed_device 26.5 MiB 2.84 803 13893 3888 7187 2818 65.0 MiB 0.10 0.00 3.64131 -107.005 -3.64131 3.64131 0.91 0.000471621 0.000430634 0.0313976 0.0285984 32 2150 23 6.87369e+06 475111 586450. 2029.24 1.03 0.0930692 0.0817272 25474 144626 -1 1779 22 1365 2449 186602 43150 2.93196 2.93196 -102.245 -2.93196 0 0 744469. 2576.02 0.30 0.07 0.14 -1 -1 0.30 0.0221573 0.0195103 119 47 -1 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66904 32 32 421 327 1 233 88 17 17 289 -1 unnamed_device 26.6 MiB 4.31 1378 10228 2746 6595 887 65.3 MiB 0.11 0.00 4.35815 -140.01 -4.35815 4.35815 0.92 0.000617252 0.000556354 0.034008 0.0310184 34 3944 37 6.87369e+06 335372 618332. 2139.56 3.19 0.185411 0.162321 25762 151098 -1 3174 19 1978 3279 270018 60360 4.54246 4.54246 -148.713 -4.54246 0 0 787024. 2723.27 0.32 0.09 0.15 -1 -1 0.32 0.0258856 0.0229494 165 62 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_097.v common 12.01 vpr 65.11 MiB -1 -1 0.16 20612 1 0.03 -1 -1 33868 -1 -1 22 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 31 32 365 296 1 203 85 17 17 289 -1 unnamed_device 26.7 MiB 4.79 1036 15709 5736 7909 2064 65.1 MiB 0.13 0.00 5.60997 -168.26 -5.60997 5.60997 0.88 0.00053792 0.000492646 0.0453279 0.0414375 34 2870 35 6.87369e+06 307425 618332. 2139.56 4.07 0.248131 0.217332 25762 151098 -1 2240 23 2002 3041 253136 56900 4.5866 4.5866 -154.916 -4.5866 0 0 787024. 2723.27 0.30 0.09 0.14 -1 -1 0.30 0.0259799 0.0230428 139 60 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_098.v common 10.30 vpr 65.06 MiB -1 -1 0.17 20712 1 0.03 -1 -1 33888 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66620 32 32 331 280 1 185 82 17 17 289 -1 unnamed_device 26.5 MiB 5.23 954 12542 3477 7836 1229 65.1 MiB 0.10 0.00 4.34735 -144.276 -4.34735 4.34735 0.91 0.000517465 0.000463488 0.0363612 0.0331871 34 2396 24 6.87369e+06 251529 618332. 2139.56 1.87 0.143117 0.125198 25762 151098 -1 1977 20 1353 1987 138164 34066 3.5981 3.5981 -140.671 -3.5981 0 0 787024. 2723.27 0.31 0.06 0.15 -1 -1 0.31 0.021548 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2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66780 31 32 373 294 1 197 97 17 17 289 -1 unnamed_device 26.8 MiB 2.23 1064 18301 5445 10263 2593 65.2 MiB 0.15 0.00 4.47348 -130.92 -4.47348 4.47348 0.91 0.000522044 0.000475222 0.0464527 0.0423055 32 2670 22 6.87369e+06 475111 586450. 2029.24 1.03 0.115903 0.102282 25474 144626 -1 2206 21 1472 2558 198438 45014 3.63536 3.63536 -124.973 -3.63536 0 0 744469. 2576.02 0.30 0.08 0.14 -1 -1 0.30 0.0249785 0.0220724 149 46 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_101.v common 7.01 vpr 65.12 MiB -1 -1 0.14 20616 1 0.03 -1 -1 33544 -1 -1 31 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66680 30 32 325 268 1 172 93 17 17 289 -1 unnamed_device 26.5 MiB 2.34 1005 13953 3900 8706 1347 65.1 MiB 0.11 0.00 3.71604 -108.811 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9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65968 29 32 269 229 1 150 80 17 17 289 -1 unnamed_device 26.1 MiB 2.27 666 12120 4433 5222 2465 64.4 MiB 0.09 0.00 3.97634 -118.279 -3.97634 3.97634 0.93 0.000408371 0.000372081 0.0310185 0.0283063 32 1713 25 6.87369e+06 265503 586450. 2029.24 0.99 0.0851843 0.0750807 25474 144626 -1 1450 16 1051 1510 102810 24073 2.88196 2.88196 -105.209 -2.88196 0 0 744469. 2576.02 0.29 0.05 0.14 -1 -1 0.29 0.0155006 0.0137312 101 28 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_105.v common 6.13 vpr 64.73 MiB -1 -1 0.15 20400 1 0.03 -1 -1 33752 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66284 32 32 310 266 1 176 81 17 17 289 -1 unnamed_device 26.2 MiB 1.94 954 14256 4666 7594 1996 64.7 MiB 0.11 0.00 4.32352 -124.508 -4.32352 4.32352 0.94 0.000447837 0.000407528 0.0385335 0.0351138 30 2387 23 6.87369e+06 237555 556674. 1926.21 1.02 0.100637 0.0887454 25186 138497 -1 2015 15 856 1149 82635 18383 3.26184 3.26184 -123.375 -3.26184 0 0 706193. 2443.58 0.29 0.04 0.13 -1 -1 0.29 0.0168239 0.0149811 112 55 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_106.v common 8.36 vpr 65.12 MiB -1 -1 0.15 20248 1 0.03 -1 -1 33756 -1 -1 39 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66684 31 32 326 261 1 178 102 17 17 289 -1 unnamed_device 26.7 MiB 2.02 1008 17238 4626 10206 2406 65.1 MiB 0.13 0.00 4.58512 -131.297 -4.58512 4.58512 0.91 0.000478898 0.000438114 0.0367055 0.0334029 28 2463 22 6.87369e+06 544980 531479. 1839.03 3.12 0.169915 0.147585 24610 126494 -1 2321 20 1520 2685 209113 46179 4.2616 4.2616 -136.339 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IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66268 32 32 278 238 1 158 79 17 17 289 -1 unnamed_device 26.3 MiB 3.62 839 11909 3234 7671 1004 64.7 MiB 0.09 0.00 4.09853 -129.483 -4.09853 4.09853 0.87 0.000404786 0.000369967 0.0309203 0.0282532 34 2157 23 6.87369e+06 209608 618332. 2139.56 1.48 0.120398 0.105443 25762 151098 -1 1820 21 1422 2436 176587 40630 2.89096 2.89096 -115.541 -2.89096 0 0 787024. 2723.27 0.30 0.06 0.13 -1 -1 0.30 0.0198265 0.0175159 101 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_109.v common 8.91 vpr 65.43 MiB -1 -1 0.16 20620 1 0.03 -1 -1 33728 -1 -1 37 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66996 31 32 373 300 1 185 100 17 17 289 -1 unnamed_device 26.9 MiB 3.31 942 11236 2692 7798 746 65.4 MiB 0.11 0.00 3.93572 -125.697 -3.93572 3.93572 0.92 0.000549085 0.000500069 0.0287983 0.0261391 30 2084 23 6.87369e+06 517032 556674. 1926.21 2.43 0.157035 0.135452 25186 138497 -1 1755 22 1427 2345 123843 30179 2.85066 2.85066 -111.306 -2.85066 0 0 706193. 2443.58 0.27 0.06 0.13 -1 -1 0.27 0.0219725 0.0192946 141 60 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_110.v common 8.01 vpr 64.91 MiB -1 -1 0.15 20120 1 0.03 -1 -1 34004 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66472 31 32 265 230 1 169 80 17 17 289 -1 unnamed_device 26.5 MiB 3.30 854 11604 2702 8073 829 64.9 MiB 0.08 0.00 3.71466 -115.66 -3.71466 3.71466 0.94 0.000395842 0.000360367 0.0290258 0.0265034 34 2121 22 6.87369e+06 237555 618332. 2139.56 1.51 0.116899 0.102067 25762 151098 -1 1793 24 1269 1863 147188 34139 3.22491 3.22491 -116.376 -3.22491 0 0 787024. 2723.27 0.32 0.06 0.15 -1 -1 0.32 0.021203 0.018606 105 30 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_111.v common 9.44 vpr 65.14 MiB -1 -1 0.16 20460 1 0.03 -1 -1 33728 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66708 32 32 349 286 1 177 95 17 17 289 -1 unnamed_device 26.8 MiB 3.43 1000 15215 3699 9919 1597 65.1 MiB 0.12 0.00 3.6733 -115.913 -3.6733 3.6733 0.87 0.000493305 0.000451208 0.0362932 0.0330658 28 2463 22 6.87369e+06 433189 531479. 1839.03 2.99 0.182795 0.159877 24610 126494 -1 2134 17 1072 1687 130609 29568 3.23291 3.23291 -117.711 -3.23291 0 0 648988. 2245.63 0.26 0.06 0.11 -1 -1 0.26 0.0202833 0.0180587 129 54 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_112.v common 8.50 vpr 65.42 MiB -1 -1 0.17 20468 1 0.03 -1 -1 33684 -1 -1 32 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66988 31 32 396 325 1 185 95 17 17 289 -1 unnamed_device 27.0 MiB 3.99 1013 12839 3510 8051 1278 65.4 MiB 0.11 0.00 3.7214 -127.022 -3.7214 3.7214 0.91 0.000531639 0.000485402 0.0340412 0.0310095 26 2613 33 6.87369e+06 447163 503264. 1741.40 1.34 0.117896 0.103426 24322 120374 -1 2318 22 1836 2739 240609 53381 3.49736 3.49736 -136.167 -3.49736 0 0 618332. 2139.56 0.26 0.08 0.12 -1 -1 0.26 0.0258841 0.0227059 137 87 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_113.v common 7.48 vpr 64.54 MiB -1 -1 0.15 20304 1 0.03 -1 -1 33700 -1 -1 16 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66088 32 32 303 262 1 154 80 17 17 289 -1 unnamed_device 26.2 MiB 2.78 868 13324 3871 8104 1349 64.5 MiB 0.10 0.00 3.6034 -114.008 -3.6034 3.6034 0.91 0.000458747 0.000419539 0.0366337 0.0334452 34 2053 23 6.87369e+06 223581 618332. 2139.56 1.52 0.132574 0.115981 25762 151098 -1 1867 20 1096 1750 148394 33483 2.93031 2.93031 -111.865 -2.93031 0 0 787024. 2723.27 0.31 0.06 0.15 -1 -1 0.31 0.0205729 0.0181829 99 54 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_114.v common 6.59 vpr 64.98 MiB -1 -1 0.16 20300 1 0.03 -1 -1 33712 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66540 32 32 290 244 1 177 82 17 17 289 -1 unnamed_device 26.5 MiB 1.81 974 10050 2495 6517 1038 65.0 MiB 0.09 0.00 4.16989 -130.796 -4.16989 4.16989 0.91 0.000437643 0.00040023 0.0272002 0.0247303 34 2564 21 6.87369e+06 251529 618332. 2139.56 1.63 0.117592 0.102199 25762 151098 -1 2158 22 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33464 -1 -1 29 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66616 29 32 324 268 1 169 90 17 17 289 -1 unnamed_device 26.5 MiB 3.12 938 11346 3139 7252 955 65.1 MiB 0.09 0.00 4.10263 -113.928 -4.10263 4.10263 0.87 0.000467598 0.00042873 0.0279375 0.025573 34 2292 21 6.87369e+06 405241 618332. 2139.56 1.46 0.123418 0.107763 25762 151098 -1 1865 18 985 1663 101328 25310 3.08831 3.08831 -105.918 -3.08831 0 0 787024. 2723.27 0.30 0.05 0.14 -1 -1 0.30 0.0188781 0.0166375 123 49 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_117.v common 8.48 vpr 65.46 MiB -1 -1 0.16 20780 1 0.03 -1 -1 33632 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67028 32 32 393 312 1 215 86 17 17 289 -1 unnamed_device 27.0 MiB 3.37 1137 15773 5092 8347 2334 65.5 MiB 0.15 0.00 5.16181 -165.054 -5.16181 5.16181 0.87 0.000551003 0.000495389 0.0471888 0.0427977 34 3224 24 6.87369e+06 307425 618332. 2139.56 1.95 0.175105 0.153937 25762 151098 -1 2506 23 1972 3000 246393 55956 4.23626 4.23626 -156.047 -4.23626 0 0 787024. 2723.27 0.30 0.09 0.14 -1 -1 0.30 0.0267467 0.0235845 151 62 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_118.v common 5.21 vpr 64.46 MiB -1 -1 0.15 20244 1 0.03 -1 -1 33680 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66008 31 32 229 197 1 143 80 17 17 289 -1 unnamed_device 25.9 MiB 0.78 812 10400 2700 6281 1419 64.5 MiB 0.07 0.00 3.6213 -110.383 -3.6213 3.6213 0.88 0.000372362 0.000341788 0.0241452 0.0220839 34 1771 19 6.87369e+06 237555 618332. 2139.56 1.40 0.0992655 0.0864373 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32 32 360 293 1 182 96 17 17 289 -1 unnamed_device 26.6 MiB 3.45 1010 10827 2581 6963 1283 65.0 MiB 0.10 0.00 4.11773 -126.026 -4.11773 4.11773 0.92 0.000521868 0.000467758 0.0282521 0.0257437 34 2332 20 6.87369e+06 447163 618332. 2139.56 1.59 0.1381 0.120602 25762 151098 -1 1913 20 1166 1887 120654 28634 2.75641 2.75641 -108.206 -2.75641 0 0 787024. 2723.27 0.31 0.06 0.14 -1 -1 0.31 0.0232081 0.0205076 134 57 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_122.v common 9.99 vpr 65.42 MiB -1 -1 0.17 20528 1 0.03 -1 -1 33784 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66992 32 32 396 299 1 240 89 17 17 289 -1 unnamed_device 26.9 MiB 4.82 1280 16127 4711 8958 2458 65.4 MiB 0.16 0.00 5.89191 -180.703 -5.89191 5.89191 0.90 0.00055824 0.00050839 0.048551 0.0443055 34 3352 23 6.87369e+06 349346 618332. 2139.56 1.87 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66344 32 32 296 247 1 158 87 17 17 289 -1 unnamed_device 26.3 MiB 1.23 913 15639 4952 8936 1751 64.8 MiB 0.12 0.00 3.6323 -121.89 -3.6323 3.6323 0.91 0.000444903 0.00040235 0.038183 0.0347282 32 2483 25 6.87369e+06 321398 586450. 2029.24 1.05 0.0967275 0.0851387 25474 144626 -1 2082 23 1398 2534 242205 51921 3.19991 3.19991 -122.936 -3.19991 0 0 744469. 2576.02 0.29 0.08 0.14 -1 -1 0.29 0.0213071 0.0186433 109 31 -1 -1 -1 -1 -fixed_k6_frac_ripple_N8_22nm.xml mult_126.v common 4.86 vpr 64.50 MiB -1 -1 0.15 20232 1 0.03 -1 -1 33676 -1 -1 29 25 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66052 25 32 216 194 1 123 86 17 17 289 -1 unnamed_device 26.0 MiB 0.91 516 9536 2821 4714 2001 64.5 MiB 0.06 0.00 3.5473 -82.6349 -3.5473 3.5473 0.90 0.000346225 0.000316471 0.0191146 0.0174719 28 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65928 32 32 354 285 1 223 88 17 17 289 -1 unnamed_device 26.1 MiB 2.90 1101 11203 3178 6921 1104 64.4 MiB 0.11 0.00 5.42457 -156.316 -5.42457 5.42457 0.88 0.000515179 0.000471352 0.0314436 0.0287064 34 2918 37 6.89349e+06 338252 618332. 2139.56 1.92 0.163024 0.142749 25762 151098 -1 2330 21 1708 2520 163764 40336 4.34515 4.34515 -149.16 -4.34515 0 0 787024. 2723.27 0.31 0.07 0.14 -1 -1 0.31 0.0234365 0.0207034 149 47 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_002.v common 7.13 vpr 64.71 MiB -1 -1 0.18 20428 1 0.03 -1 -1 33704 -1 -1 26 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66264 30 32 363 293 1 228 88 17 17 289 -1 unnamed_device 26.3 MiB 1.94 1174 12178 3196 7626 1356 64.7 MiB 0.12 0.00 4.90208 -149.95 -4.90208 4.90208 0.91 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2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66552 32 32 336 268 1 212 87 17 17 289 -1 unnamed_device 26.5 MiB 1.72 1121 10839 3086 5720 2033 65.0 MiB 0.11 0.00 5.28221 -151.791 -5.28221 5.28221 0.92 0.000488934 0.000446083 0.0297489 0.0271673 36 3048 26 6.89349e+06 324158 648988. 2245.63 2.73 0.144367 0.12558 26050 158493 -1 2547 20 1919 3437 271377 58237 4.29409 4.29409 -144.18 -4.29409 0 0 828058. 2865.25 0.32 0.08 0.15 -1 -1 0.32 0.0217688 0.0192005 142 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_006.v common 7.53 vpr 64.85 MiB -1 -1 0.15 20736 1 0.03 -1 -1 33892 -1 -1 33 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66408 32 32 366 295 1 231 97 17 17 289 -1 unnamed_device 26.4 MiB 2.38 1263 20077 7001 10670 2406 64.9 MiB 0.17 0.00 3.92406 -127.128 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on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66140 31 32 317 271 1 207 83 17 17 289 -1 unnamed_device 26.1 MiB 2.02 1042 10703 3845 4978 1880 64.6 MiB 0.09 0.00 3.68945 -124.167 -3.68945 3.68945 0.89 0.000461732 0.000419103 0.0291141 0.0265369 34 2732 28 6.89349e+06 281877 618332. 2139.56 1.92 0.110672 0.0965447 25762 151098 -1 2160 20 1579 2113 170875 38070 2.94946 2.94946 -119.188 -2.94946 0 0 787024. 2723.27 0.30 0.06 0.15 -1 -1 0.30 0.0202018 0.0178049 130 60 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_010.v common 7.12 vpr 64.90 MiB -1 -1 0.15 20264 1 0.03 -1 -1 33984 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66456 32 32 298 248 1 185 82 17 17 289 -1 unnamed_device 26.4 MiB 2.36 928 7914 1841 5211 862 64.9 MiB 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66432 32 32 344 272 1 209 87 17 17 289 -1 unnamed_device 26.3 MiB 2.46 1060 16407 4994 8930 2483 64.9 MiB 0.14 0.00 4.09068 -131.143 -4.09068 4.09068 0.92 0.000522804 0.00047528 0.0459086 0.0418864 34 2942 46 6.89349e+06 324158 618332. 2139.56 2.05 0.179022 0.156918 25762 151098 -1 2312 19 1654 2518 184499 42386 3.22401 3.22401 -123.401 -3.22401 0 0 787024. 2723.27 0.31 0.07 0.15 -1 -1 0.31 0.0221056 0.0196319 143 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_014.v common 9.49 vpr 65.14 MiB -1 -1 0.16 20628 1 0.03 -1 -1 33628 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66700 32 32 363 295 1 232 88 17 17 289 -1 unnamed_device 26.8 MiB 2.24 1222 15298 4935 8519 1844 65.1 MiB 0.14 0.00 5.57191 -161.898 -5.57191 5.57191 0.90 0.00050621 0.000460503 0.042297 0.0385646 44 2654 22 6.89349e+06 338252 787024. 2723.27 3.90 0.204456 0.177606 27778 195446 -1 2226 18 1228 1749 116448 26023 4.17965 4.17965 -143.988 -4.17965 0 0 997811. 3452.63 0.38 0.06 0.19 -1 -1 0.38 0.0213578 0.0189539 153 58 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_015.v common 6.62 vpr 64.67 MiB -1 -1 0.15 20296 1 0.03 -1 -1 33392 -1 -1 18 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66224 29 32 248 215 1 160 79 17 17 289 -1 unnamed_device 26.1 MiB 2.13 847 11909 3522 6229 2158 64.7 MiB 0.08 0.00 3.19582 -98.7926 -3.19582 3.19582 0.88 0.000369834 0.000338146 0.028192 0.0257899 34 1978 21 6.89349e+06 253689 618332. 2139.56 1.50 0.108576 0.0948409 25762 151098 -1 1713 20 983 1407 102917 23465 2.73986 2.73986 -96.8501 -2.73986 0 0 787024. 2723.27 0.30 0.05 0.14 -1 -1 0.30 0.0167047 0.0147173 102 21 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_016.v common 10.14 vpr 65.30 MiB -1 -1 0.16 20596 1 0.03 -1 -1 33896 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66872 32 32 370 297 1 234 88 17 17 289 -1 unnamed_device 26.9 MiB 2.60 1270 15103 4761 8086 2256 65.3 MiB 0.13 0.00 4.1162 -136.486 -4.1162 4.1162 0.90 0.000539052 0.00048468 0.0422336 0.0384289 38 3035 24 6.89349e+06 338252 678818. 2348.85 4.26 0.213084 0.18531 26626 170182 -1 2635 18 1851 2943 211103 45834 3.459 3.459 -129.009 -3.459 0 0 902133. 3121.57 0.34 0.07 0.17 -1 -1 0.34 0.0217922 0.0192599 159 55 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_017.v common 9.59 vpr 64.84 MiB -1 -1 0.16 20788 1 0.03 -1 -1 34056 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66400 32 32 338 269 1 205 86 17 17 289 -1 unnamed_device 26.3 MiB 2.36 1061 15017 4935 7452 2630 64.8 MiB 0.12 0.00 4.12104 -133.123 -4.12104 4.12104 0.90 0.000498366 0.000456422 0.0410704 0.0375113 36 2514 26 6.89349e+06 310065 648988. 2245.63 4.01 0.189552 0.16462 26050 158493 -1 2201 18 1382 2001 156507 34318 3.04636 3.04636 -120.145 -3.04636 0 0 828058. 2865.25 0.32 0.06 0.15 -1 -1 0.32 0.0206654 0.0183065 142 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_018.v common 7.70 vpr 65.00 MiB -1 -1 0.14 20208 1 0.03 -1 -1 33436 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66560 32 32 323 276 1 215 85 17 17 289 -1 unnamed_device 26.5 MiB 2.07 1121 14407 4796 7561 2050 65.0 MiB 0.12 0.00 3.60799 -127.319 -3.60799 3.60799 0.93 0.000468869 0.000428022 0.0390201 0.0356253 36 2593 20 6.89349e+06 295971 648988. 2245.63 2.38 0.152466 0.13445 26050 158493 -1 2266 19 1560 2114 154286 34059 3.02646 3.02646 -124.23 -3.02646 0 0 828058. 2865.25 0.32 0.06 0.15 -1 -1 0.32 0.0206142 0.0182037 131 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_019.v common 9.08 vpr 64.23 MiB -1 -1 0.13 20392 1 0.03 -1 -1 33540 -1 -1 15 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65772 30 32 222 206 1 141 77 17 17 289 -1 unnamed_device 25.8 MiB 1.18 565 9205 3754 4929 522 64.2 MiB 0.06 0.00 2.67033 -85.3827 -2.67033 2.67033 0.91 0.000357875 0.000325993 0.0218612 0.0199723 38 1394 30 6.89349e+06 211408 678818. 2348.85 4.81 0.181924 0.156635 26626 170182 -1 1159 13 560 635 58152 13020 2.05307 2.05307 -80.887 -2.05307 0 0 902133. 3121.57 0.35 0.03 0.16 -1 -1 0.35 0.0112064 0.00996965 82 29 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_020.v common 7.31 vpr 64.70 MiB -1 -1 0.15 20244 1 0.03 -1 -1 34128 -1 -1 19 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66256 31 32 291 243 1 179 82 17 17 289 -1 unnamed_device 26.3 MiB 2.48 986 14322 4290 8044 1988 64.7 MiB 0.11 0.00 4.76552 -144.771 -4.76552 4.76552 0.87 0.000418743 0.000382837 0.036184 0.0330712 34 2322 29 6.89349e+06 267783 618332. 2139.56 1.79 0.137959 0.120894 25762 151098 -1 2014 20 1276 1972 146102 33382 3.479 3.479 -129.696 -3.479 0 0 787024. 2723.27 0.30 0.06 0.14 -1 -1 0.30 0.0194601 0.0171498 117 30 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_021.v common 6.37 vpr 65.05 MiB -1 -1 0.14 20464 1 0.03 -1 -1 34048 -1 -1 34 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66616 32 32 342 271 1 207 98 17 17 289 -1 unnamed_device 26.5 MiB 1.32 1121 13823 3432 8585 1806 65.1 MiB 0.11 0.00 4.71322 -150.624 -4.71322 4.71322 0.90 0.000510305 0.000463511 0.0331911 0.0302227 34 2727 22 6.89349e+06 479191 618332. 2139.56 1.88 0.140003 0.121834 25762 151098 -1 2334 20 1481 2227 174544 39115 4.00824 4.00824 -143.79 -4.00824 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0218108 0.0191272 151 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_022.v common 6.87 vpr 64.75 MiB -1 -1 0.15 20756 1 0.03 -1 -1 33796 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 32 32 372 300 1 229 87 17 17 289 -1 unnamed_device 26.4 MiB 1.52 1277 12375 3467 7863 1045 64.7 MiB 0.12 0.00 4.43295 -138.206 -4.43295 4.43295 0.87 0.000547 0.000501104 0.0357371 0.0326587 36 3078 26 6.89349e+06 324158 648988. 2245.63 2.22 0.160668 0.141149 26050 158493 -1 2617 21 2034 3206 249894 52894 3.89554 3.89554 -137.73 -3.89554 0 0 828058. 2865.25 0.32 0.08 0.14 -1 -1 0.32 0.0248548 0.0219394 155 59 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_023.v common 8.04 vpr 64.43 MiB -1 -1 0.13 19988 1 0.03 -1 -1 33940 -1 -1 19 26 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65972 26 32 190 182 1 126 77 17 17 289 -1 unnamed_device 26.0 MiB 1.41 448 11324 4682 5071 1571 64.4 MiB 0.06 0.00 2.70371 -73.039 -2.70371 2.70371 0.93 0.000309526 0.000282134 0.022769 0.0207806 40 1106 23 6.89349e+06 267783 706193. 2443.58 3.46 0.120786 0.10429 26914 176310 -1 982 22 792 952 75437 18340 2.39095 2.39095 -69.6367 -2.39095 0 0 926341. 3205.33 0.34 0.04 0.18 -1 -1 0.34 0.0146172 0.012786 76 21 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_024.v common 5.90 vpr 64.61 MiB -1 -1 0.14 20108 1 0.03 -1 -1 33940 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66164 32 32 285 227 1 169 87 17 17 289 -1 unnamed_device 26.3 MiB 1.05 989 9879 2312 6247 1320 64.6 MiB 0.09 0.00 4.42392 -127.052 -4.42392 4.42392 0.91 0.000433013 0.0003954 0.0243814 0.0222603 34 2328 22 6.89349e+06 324158 618332. 2139.56 1.71 0.118377 0.102868 25762 151098 -1 1979 21 1206 2295 156747 36159 3.50885 3.50885 -121.305 -3.50885 0 0 787024. 2723.27 0.31 0.06 0.15 -1 -1 0.31 0.020173 0.0177894 119 -1 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_025.v common 4.29 vpr 64.20 MiB -1 -1 0.13 19856 1 0.02 -1 -1 33612 -1 -1 12 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65744 32 32 173 169 1 114 76 17 17 289 -1 unnamed_device 25.7 MiB 0.42 477 9356 3828 5185 343 64.2 MiB 0.05 0.00 2.35052 -74.7133 -2.35052 2.35052 0.92 0.000302185 0.000274082 0.0177176 0.0160242 30 1271 33 6.89349e+06 169126 556674. 1926.21 0.91 0.0588033 0.0510992 25186 138497 -1 917 13 471 601 34359 9289 1.85746 1.85746 -71.2035 -1.85746 0 0 706193. 2443.58 0.29 0.02 0.12 -1 -1 0.29 0.00915238 0.00813441 65 -1 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_026.v common 6.84 vpr 64.64 MiB -1 -1 0.16 20188 1 0.03 -1 -1 33632 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66192 32 32 300 245 1 187 84 17 17 289 -1 unnamed_device 26.2 MiB 1.96 1046 9966 2582 6701 683 64.6 MiB 0.09 0.00 4.91481 -138.303 -4.91481 4.91481 0.92 0.000466719 0.000426875 0.0271521 0.0248085 34 2316 22 6.89349e+06 281877 618332. 2139.56 1.71 0.129273 0.113116 25762 151098 -1 1980 19 1004 1540 102606 24225 3.76736 3.76736 -123.228 -3.76736 0 0 787024. 2723.27 0.31 0.05 0.15 -1 -1 0.31 0.0195068 0.0172583 125 21 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_027.v common 6.84 vpr 64.47 MiB -1 -1 0.14 20124 1 0.03 -1 -1 34012 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66016 32 32 297 233 1 177 95 17 17 289 -1 unnamed_device 26.0 MiB 0.87 1030 18239 5331 10544 2364 64.5 MiB 0.14 0.00 3.48935 -111.917 -3.48935 3.48935 0.90 0.00044961 0.000410018 0.0400424 0.0363427 30 2299 29 6.89349e+06 436909 556674. 1926.21 2.87 0.165377 0.143993 25186 138497 -1 1943 18 1002 1825 117062 25649 2.62651 2.62651 -101.154 -2.62651 0 0 706193. 2443.58 0.28 0.05 0.12 -1 -1 0.28 0.0182899 0.0161967 130 -1 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_028.v common 7.98 vpr 65.11 MiB -1 -1 0.14 20788 1 0.03 -1 -1 33980 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66672 32 32 338 277 1 215 87 17 17 289 -1 unnamed_device 26.6 MiB 2.58 1031 15255 4057 8092 3106 65.1 MiB 0.13 0.00 4.82008 -133.501 -4.82008 4.82008 0.91 0.000490467 0.0004496 0.0414621 0.0378409 34 2929 28 6.89349e+06 324158 618332. 2139.56 2.18 0.162845 0.143009 25762 151098 -1 2406 20 1641 2502 180517 44433 4.15846 4.15846 -138.48 -4.15846 0 0 787024. 2723.27 0.31 0.07 0.14 -1 -1 0.31 0.0222578 0.0197248 142 47 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_029.v common 6.54 vpr 64.67 MiB -1 -1 0.14 20224 1 0.03 -1 -1 33488 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66220 32 32 284 241 1 177 81 17 17 289 -1 unnamed_device 26.3 MiB 1.97 1042 13556 4378 7182 1996 64.7 MiB 0.11 0.00 3.7536 -126.104 -3.7536 3.7536 0.88 0.000423475 0.000387287 0.0348091 0.0317082 34 2426 26 6.89349e+06 239595 618332. 2139.56 1.54 0.127869 0.111536 25762 151098 -1 2062 21 1231 1775 140537 30780 3.10151 3.10151 -121.28 -3.10151 0 0 787024. 2723.27 0.30 0.06 0.14 -1 -1 0.30 0.0190397 0.0166792 112 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_030.v common 6.78 vpr 64.43 MiB -1 -1 0.14 20164 1 0.03 -1 -1 33756 -1 -1 17 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65980 30 32 262 227 1 161 79 17 17 289 -1 unnamed_device 25.9 MiB 2.05 868 13092 4092 7012 1988 64.4 MiB 0.10 0.00 4.03552 -117.607 -4.03552 4.03552 0.87 0.000406238 0.000372263 0.033216 0.0303892 34 2273 22 6.89349e+06 239595 618332. 2139.56 1.71 0.12525 0.110228 25762 151098 -1 1875 20 958 1604 132449 28430 3.37775 3.37775 -111.98 -3.37775 0 0 787024. 2723.27 0.30 0.05 0.14 -1 -1 0.30 0.0178219 0.0157376 104 29 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_031.v common 6.15 vpr 64.32 MiB -1 -1 0.15 20420 1 0.03 -1 -1 33496 -1 -1 20 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65860 28 32 260 223 1 163 80 17 17 289 -1 unnamed_device 25.8 MiB 1.97 757 6960 1669 4834 457 64.3 MiB 0.06 0.00 4.17394 -114.526 -4.17394 4.17394 0.92 0.00039784 0.000362913 0.0177823 0.0162284 30 2142 28 6.89349e+06 281877 556674. 1926.21 1.06 0.074364 0.0649195 25186 138497 -1 1666 20 1033 1810 114421 26114 3.22555 3.22555 -108.797 -3.22555 0 0 706193. 2443.58 0.29 0.05 0.13 -1 -1 0.29 0.0173537 0.0153042 107 27 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_032.v common 7.01 vpr 64.34 MiB -1 -1 0.13 20124 1 0.03 -1 -1 33416 -1 -1 17 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65880 32 32 253 210 1 156 81 17 17 289 -1 unnamed_device 25.8 MiB 0.69 835 13031 3792 7568 1671 64.3 MiB 0.09 0.00 3.90738 -121.629 -3.90738 3.90738 0.93 0.000384935 0.000352652 0.0311697 0.0283307 32 2291 36 6.89349e+06 239595 586450. 2029.24 3.19 0.149855 0.129812 25474 144626 -1 1971 20 1241 2047 177578 39376 2.97946 2.97946 -115.239 -2.97946 0 0 744469. 2576.02 0.30 0.06 0.13 -1 -1 0.30 0.0175582 0.0154551 101 -1 -1 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66256 29 32 291 250 1 185 83 17 17 289 -1 unnamed_device 26.2 MiB 2.23 982 10163 2807 6505 851 64.7 MiB 0.08 0.00 3.48715 -105.954 -3.48715 3.48715 0.91 0.000430221 0.000393195 0.0259756 0.0237365 36 2114 24 6.89349e+06 310065 648988. 2245.63 3.99 0.150788 0.130215 26050 158493 -1 1893 17 1056 1446 109106 24335 2.53636 2.53636 -101.077 -2.53636 0 0 828058. 2865.25 0.32 0.05 0.15 -1 -1 0.32 0.0167574 0.0148016 120 48 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_035.v common 6.61 vpr 65.18 MiB -1 -1 0.14 20424 1 0.03 -1 -1 33792 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66744 32 32 367 282 1 224 89 17 17 289 -1 unnamed_device 26.8 MiB 1.85 1339 15137 4138 9246 1753 65.2 MiB 0.14 0.00 4.47915 -132.321 -4.47915 4.47915 0.87 0.000524397 0.000477889 0.0422276 0.0385313 34 2963 23 6.89349e+06 352346 618332. 2139.56 1.66 0.160668 0.140999 25762 151098 -1 2512 21 1427 2365 176883 38523 3.84576 3.84576 -128.825 -3.84576 0 0 787024. 2723.27 0.30 0.07 0.14 -1 -1 0.30 0.0245685 0.0218043 159 26 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_036.v common 7.85 vpr 65.16 MiB -1 -1 0.15 20592 1 0.03 -1 -1 33876 -1 -1 24 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66728 32 32 391 311 1 250 88 17 17 289 -1 unnamed_device 26.7 MiB 2.42 1289 13933 4065 8243 1625 65.2 MiB 0.14 0.00 4.58977 -156.464 -4.58977 4.58977 0.93 0.000562243 0.000512903 0.0419003 0.0382553 36 2961 23 6.89349e+06 338252 648988. 2245.63 2.14 0.175689 0.15488 26050 158493 -1 2768 19 2118 2977 227249 49577 3.80435 3.80435 -151.02 -3.80435 0 0 828058. 2865.25 0.33 0.08 0.15 -1 -1 0.33 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66336 31 32 370 297 1 235 88 17 17 289 -1 unnamed_device 26.4 MiB 2.49 1249 10813 2744 7185 884 64.8 MiB 0.10 0.00 4.24063 -135.696 -4.24063 4.24063 0.92 0.000527779 0.000480205 0.0315807 0.0288431 34 3153 26 6.89349e+06 352346 618332. 2139.56 1.86 0.151221 0.13196 25762 151098 -1 2661 18 1662 2449 211819 44945 3.88885 3.88885 -140.681 -3.88885 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0213258 0.0188579 160 57 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_039.v common 8.74 vpr 65.03 MiB -1 -1 0.16 20388 1 0.03 -1 -1 34004 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66588 31 32 377 302 1 241 88 17 17 289 -1 unnamed_device 26.6 MiB 2.91 1247 16273 5220 8383 2670 65.0 MiB 0.16 0.00 5.45989 -162.138 -5.45989 5.45989 0.88 0.000523942 0.000478616 0.0461034 0.0421193 36 3304 23 6.89349e+06 352346 648988. 2245.63 2.63 0.18344 0.16272 26050 158493 -1 2788 22 2139 3182 279459 58032 4.86768 4.86768 -161.55 -4.86768 0 0 828058. 2865.25 0.31 0.09 0.14 -1 -1 0.31 0.0262488 0.0232094 163 60 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_040.v common 9.46 vpr 65.10 MiB -1 -1 0.15 20448 1 0.02 -1 -1 34020 -1 -1 25 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66660 31 32 383 305 1 240 88 17 17 289 -1 unnamed_device 26.7 MiB 2.56 1201 15298 5197 6778 3323 65.1 MiB 0.14 0.00 5.99918 -171.098 -5.99918 5.99918 0.94 0.000527795 0.000479148 0.045585 0.041563 36 3723 40 6.89349e+06 352346 648988. 2245.63 3.57 0.192238 0.168904 26050 158493 -1 2576 21 1820 2714 210431 54047 5.27384 5.27384 -170.652 -5.27384 0 0 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66260 32 32 291 242 1 188 84 17 17 289 -1 unnamed_device 26.3 MiB 2.22 909 14358 5137 7007 2214 64.7 MiB 0.11 0.00 4.5826 -118.27 -4.5826 4.5826 0.90 0.000426108 0.000388611 0.0361049 0.0329036 34 2771 28 6.89349e+06 281877 618332. 2139.56 1.87 0.135435 0.118137 25762 151098 -1 2020 19 1141 1651 146263 32423 3.57426 3.57426 -114.046 -3.57426 0 0 787024. 2723.27 0.30 0.06 0.15 -1 -1 0.30 0.0187297 0.0164734 120 24 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_043.v common 10.25 vpr 65.47 MiB -1 -1 0.15 20384 1 0.03 -1 -1 33760 -1 -1 31 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67044 32 32 457 356 1 296 95 17 17 289 -1 unnamed_device 27.1 MiB 2.55 1620 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33768 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66860 32 32 382 305 1 243 90 17 17 289 -1 unnamed_device 26.9 MiB 2.05 1246 9336 2230 6513 593 65.3 MiB 0.10 0.00 4.12904 -136.238 -4.12904 4.12904 0.87 0.000545319 0.00049831 0.0265155 0.0241558 34 3265 27 6.89349e+06 366440 618332. 2139.56 2.04 0.155827 0.136257 25762 151098 -1 2627 24 1955 2681 199538 45676 3.39606 3.39606 -133.734 -3.39606 0 0 787024. 2723.27 0.30 0.08 0.14 -1 -1 0.30 0.0271674 0.0239257 164 59 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_051.v common 6.55 vpr 64.91 MiB -1 -1 0.14 20372 1 0.03 -1 -1 33572 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66464 32 32 306 248 1 188 85 17 17 289 -1 unnamed_device 26.4 MiB 1.83 1001 8641 2091 5830 720 64.9 MiB 0.08 0.00 4.50695 -131.282 -4.50695 4.50695 0.88 0.000474476 0.00043527 0.0227421 0.0208116 34 2625 20 6.89349e+06 295971 618332. 2139.56 1.68 0.119526 0.104205 25762 151098 -1 2079 21 1304 2062 140160 33197 3.71836 3.71836 -125.299 -3.71836 0 0 787024. 2723.27 0.31 0.06 0.15 -1 -1 0.31 0.0211386 0.0186441 128 21 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_052.v common 6.96 vpr 65.04 MiB -1 -1 0.15 20864 1 0.03 -1 -1 33744 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66604 32 32 319 257 1 203 86 17 17 289 -1 unnamed_device 26.5 MiB 1.94 1119 14450 4565 7826 2059 65.0 MiB 0.12 0.00 4.84598 -139.753 -4.84598 4.84598 0.90 0.000475429 0.000433105 0.0386457 0.035237 34 2751 32 6.89349e+06 310065 618332. 2139.56 1.81 0.150979 0.131942 25762 151098 -1 2320 19 1445 2039 150966 33994 3.94096 3.94096 -133.357 -3.94096 0 0 787024. 2723.27 0.31 0.06 0.14 -1 -1 0.31 0.0206262 0.0182985 135 26 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_053.v common 6.81 vpr 65.12 MiB -1 -1 0.17 20800 1 0.03 -1 -1 33768 -1 -1 24 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66680 31 32 373 299 1 227 87 17 17 289 -1 unnamed_device 26.7 MiB 1.59 1292 15447 4870 8199 2378 65.1 MiB 0.14 0.00 4.72898 -145.597 -4.72898 4.72898 0.91 0.000515455 0.000469674 0.0441199 0.0402438 34 3305 38 6.89349e+06 338252 618332. 2139.56 1.96 0.172844 0.150821 25762 151098 -1 2664 22 1683 2685 217728 46549 4.1093 4.1093 -142.399 -4.1093 0 0 787024. 2723.27 0.31 0.08 0.15 -1 -1 0.31 0.0243176 0.0212994 156 58 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_054.v common 9.06 vpr 65.40 MiB -1 -1 0.16 20460 1 0.03 -1 -1 33864 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66968 32 32 387 315 1 249 89 17 17 289 -1 unnamed_device 26.9 MiB 2.96 1374 13553 4031 8630 892 65.4 MiB 0.13 0.00 4.3848 -136.299 -4.3848 4.3848 0.92 0.000566713 0.0005178 0.0397734 0.0363463 36 3546 21 6.89349e+06 352346 648988. 2245.63 2.78 0.174405 0.153881 26050 158493 -1 3131 35 2877 4359 347677 74272 3.85536 3.85536 -136.421 -3.85536 0 0 828058. 2865.25 0.33 0.13 0.15 -1 -1 0.33 0.0379774 0.0332215 166 74 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_055.v common 6.80 vpr 64.71 MiB -1 -1 0.15 20232 1 0.03 -1 -1 33700 -1 -1 15 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66264 32 32 251 219 1 156 79 17 17 289 -1 unnamed_device 26.2 MiB 1.93 841 8022 2262 5194 566 64.7 MiB 0.07 0.00 3.56029 -109.346 -3.56029 3.56029 0.92 0.000410923 0.000376707 0.0208245 0.0190669 36 1876 16 6.89349e+06 211408 648988. 2245.63 1.75 0.102423 0.0892126 26050 158493 -1 1781 20 889 1394 102255 23750 2.58651 2.58651 -99.1772 -2.58651 0 0 828058. 2865.25 0.32 0.05 0.15 -1 -1 0.32 0.0171238 0.0150965 96 20 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_056.v common 6.89 vpr 64.83 MiB -1 -1 0.16 20772 1 0.03 -1 -1 33528 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66388 32 32 341 285 1 219 84 17 17 289 -1 unnamed_device 26.3 MiB 1.55 1155 11979 3435 7133 1411 64.8 MiB 0.11 0.00 4.30741 -149.256 -4.30741 4.30741 0.90 0.00049109 0.000447597 0.0334827 0.0305345 34 2804 26 6.89349e+06 281877 618332. 2139.56 2.17 0.149604 0.130859 25762 151098 -1 2340 20 1904 2594 200265 44004 3.6786 3.6786 -144.817 -3.6786 0 0 787024. 2723.27 0.30 0.07 0.14 -1 -1 0.30 0.0214487 0.0189471 138 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_057.v common 7.75 vpr 65.10 MiB -1 -1 0.17 20896 1 0.03 -1 -1 34148 -1 -1 25 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66664 32 32 387 293 1 237 89 17 17 289 -1 unnamed_device 26.6 MiB 2.14 1337 12167 3186 7820 1161 65.1 MiB 0.13 0.00 5.53202 -162.159 -5.53202 5.53202 0.91 0.000575948 0.000523598 0.037165 0.0338915 34 3534 45 6.89349e+06 352346 618332. 2139.56 2.31 0.180992 0.157641 25762 151098 -1 2896 34 2519 3992 292876 64073 4.7323 4.7323 -160.064 -4.7323 0 0 787024. 2723.27 0.32 0.11 0.14 -1 -1 0.32 0.038065 0.0333611 168 28 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_058.v common 8.21 vpr 64.91 MiB -1 -1 0.15 20608 1 0.03 -1 -1 33608 -1 -1 22 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66472 32 32 340 270 1 212 86 17 17 289 -1 unnamed_device 26.4 MiB 2.24 981 15773 5650 7566 2557 64.9 MiB 0.14 0.00 4.48922 -138.529 -4.48922 4.48922 0.89 0.000498201 0.000453776 0.0435476 0.0397382 36 2706 29 6.89349e+06 310065 648988. 2245.63 2.76 0.158641 0.138789 26050 158493 -1 2148 21 1650 2368 177031 41003 3.31991 3.31991 -126.449 -3.31991 0 0 828058. 2865.25 0.31 0.07 0.16 -1 -1 0.31 0.0227222 0.0200309 144 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_059.v common 6.75 vpr 64.84 MiB -1 -1 0.16 20616 1 0.03 -1 -1 33852 -1 -1 27 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66400 30 32 278 235 1 175 89 17 17 289 -1 unnamed_device 26.4 MiB 1.68 892 10781 3144 6961 676 64.8 MiB 0.09 0.00 4.18863 -126.692 -4.18863 4.18863 0.91 0.000428073 0.000391509 0.0246593 0.0225079 36 2083 22 6.89349e+06 380534 648988. 2245.63 1.92 0.123708 0.108073 26050 158493 -1 1865 22 1178 1877 144664 32149 3.40385 3.40385 -122.331 -3.40385 0 0 828058. 2865.25 0.32 0.06 0.15 -1 -1 0.32 0.0199768 0.0175463 118 29 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_060.v common 10.58 vpr 65.62 MiB -1 -1 0.16 21036 1 0.03 -1 -1 33756 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67196 32 32 431 332 1 270 91 17 17 289 -1 unnamed_device 26.8 MiB 3.79 1573 16207 5526 8946 1735 65.6 MiB 0.18 0.00 6.36902 -185.345 -6.36902 6.36902 0.91 0.000596927 0.00054321 0.0507701 0.0461982 34 4174 50 6.89349e+06 380534 618332. 2139.56 3.43 0.216034 0.189453 25762 151098 -1 3178 20 2450 3885 284990 62516 5.14154 5.14154 -178.922 -5.14154 0 0 787024. 2723.27 0.31 0.10 0.15 -1 -1 0.31 0.0281897 0.0250888 188 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_061.v common 6.57 vpr 64.99 MiB -1 -1 0.14 20324 1 0.03 -1 -1 33984 -1 -1 21 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66548 32 32 336 268 1 205 85 17 17 289 -1 unnamed_device 26.5 MiB 1.72 1035 15151 5099 7891 2161 65.0 MiB 0.12 0.00 4.71732 -144.131 -4.71732 4.71732 0.90 0.000483243 0.000440883 0.0419427 0.0382974 34 2637 24 6.89349e+06 295971 618332. 2139.56 1.64 0.148956 0.130346 25762 151098 -1 2128 21 1700 2398 160101 36685 3.8815 3.8815 -138.492 -3.8815 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0230264 0.0203888 139 31 -1 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66768 32 32 349 273 1 214 87 17 17 289 -1 unnamed_device 26.6 MiB 2.24 1097 14679 5479 6928 2272 65.2 MiB 0.13 0.00 5.34057 -137.648 -5.34057 5.34057 0.93 0.000514688 0.000468686 0.0417962 0.0380928 34 3407 33 6.89349e+06 324158 618332. 2139.56 2.74 0.170979 0.150358 25762 151098 -1 2311 21 1355 2353 209044 46222 4.38625 4.38625 -135.864 -4.38625 0 0 787024. 2723.27 0.30 0.08 0.15 -1 -1 0.30 0.0243623 0.0215628 149 26 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_064.v common 5.40 vpr 64.51 MiB -1 -1 0.14 20416 1 0.03 -1 -1 33732 -1 -1 19 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66060 32 32 247 207 1 153 83 17 17 289 -1 unnamed_device 26.0 MiB 0.77 790 8543 2077 5745 721 64.5 MiB 0.07 0.00 3.60525 -112.744 -3.60525 3.60525 0.92 0.00042167 0.000381355 0.0208713 0.0190656 34 2095 22 6.89349e+06 267783 618332. 2139.56 1.52 0.103779 0.0901101 25762 151098 -1 1917 20 1208 2137 152743 35026 2.88036 2.88036 -109.901 -2.88036 0 0 787024. 2723.27 0.30 0.06 0.15 -1 -1 0.30 0.0170818 0.0150428 98 -1 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_065.v common 6.44 vpr 64.52 MiB -1 -1 0.16 20068 1 0.03 -1 -1 33664 -1 -1 20 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66068 30 32 278 235 1 175 82 17 17 289 -1 unnamed_device 26.2 MiB 1.58 900 11118 2938 7199 981 64.5 MiB 0.10 0.00 4.05078 -116.815 -4.05078 4.05078 0.91 0.000431216 0.000395132 0.0282771 0.0257452 34 2168 28 6.89349e+06 281877 618332. 2139.56 1.70 0.123006 0.107025 25762 151098 -1 1812 20 1256 1803 152268 33469 3.11246 3.11246 -112.985 -3.11246 0 0 787024. 2723.27 0.31 0.06 0.15 -1 -1 0.31 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Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66420 32 32 358 289 1 230 86 17 17 289 -1 unnamed_device 26.5 MiB 2.20 1209 16340 4806 9520 2014 64.9 MiB 0.14 0.00 5.15268 -160.098 -5.15268 5.15268 0.91 0.000523556 0.000476336 0.045859 0.0417434 36 2942 21 6.89349e+06 310065 648988. 2245.63 2.00 0.143261 0.125975 26050 158493 -1 2466 20 1667 2432 179214 39064 4.17665 4.17665 -150.568 -4.17665 0 0 828058. 2865.25 0.32 0.07 0.15 -1 -1 0.32 0.0235596 0.0207786 151 51 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_068.v common 9.66 vpr 64.93 MiB -1 -1 0.17 20540 1 0.03 -1 -1 33556 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66484 32 32 353 285 1 228 87 17 17 289 -1 unnamed_device 26.5 MiB 1.93 1151 8919 1954 6160 805 64.9 MiB 0.09 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VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66696 30 32 329 273 1 213 88 17 17 289 -1 unnamed_device 26.6 MiB 2.51 1024 15493 4307 9520 1666 65.1 MiB 0.12 0.00 3.806 -108.658 -3.806 3.806 0.92 0.000446943 0.000410885 0.039993 0.0363992 36 2360 20 6.89349e+06 366440 648988. 2245.63 4.13 0.192819 0.167053 26050 158493 -1 2000 19 1287 2025 142728 32893 3.04661 3.04661 -105.245 -3.04661 0 0 828058. 2865.25 0.33 0.06 0.15 -1 -1 0.33 0.0206384 0.018266 142 52 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_072.v common 6.37 vpr 64.54 MiB -1 -1 0.15 20288 1 0.03 -1 -1 34008 -1 -1 23 28 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66092 28 32 277 229 1 171 83 17 17 289 -1 unnamed_device 26.1 MiB 1.57 918 12323 3941 6490 1892 64.5 MiB 0.09 0.00 4.39675 -112.391 -4.39675 4.39675 0.93 0.000433295 0.00039776 0.0306922 0.0280059 34 2147 21 6.89349e+06 324158 618332. 2139.56 1.60 0.119001 0.103849 25762 151098 -1 1908 20 1138 1995 161837 33568 3.70146 3.70146 -109.98 -3.70146 0 0 787024. 2723.27 0.30 0.06 0.15 -1 -1 0.30 0.0188192 0.0165957 119 20 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_073.v common 7.89 vpr 64.76 MiB -1 -1 0.15 20468 1 0.03 -1 -1 33528 -1 -1 21 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66316 30 32 317 269 1 202 83 17 17 289 -1 unnamed_device 26.3 MiB 2.87 924 9083 2508 6037 538 64.8 MiB 0.09 0.00 4.56532 -133.276 -4.56532 4.56532 0.90 0.00044996 0.000410079 0.0248138 0.0226449 34 2736 29 6.89349e+06 295971 618332. 2139.56 1.88 0.129395 0.112496 25762 151098 -1 2186 20 1812 2507 189331 42418 4.31514 4.31514 -143.22 -4.31514 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.020237 0.0177991 130 58 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_074.v common 8.12 vpr 64.96 MiB -1 -1 0.16 20600 1 0.03 -1 -1 33588 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66516 32 32 335 282 1 222 84 17 17 289 -1 unnamed_device 26.4 MiB 2.46 1216 6123 1500 4259 364 65.0 MiB 0.07 0.00 3.91264 -134.898 -3.91264 3.91264 0.91 0.000493189 0.000450589 0.018287 0.0166719 36 2645 23 6.89349e+06 281877 648988. 2245.63 2.43 0.137606 0.120787 26050 158493 -1 2362 29 2125 2874 333718 104841 3.00176 3.00176 -122.65 -3.00176 0 0 828058. 2865.25 0.32 0.12 0.15 -1 -1 0.32 0.0295196 0.0259611 138 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_075.v common 4.90 vpr 64.20 MiB -1 -1 0.16 20000 1 0.03 -1 -1 33956 -1 -1 31 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65736 31 32 293 230 1 175 94 17 17 289 -1 unnamed_device 25.8 MiB 0.79 941 8614 1787 6108 719 64.2 MiB 0.08 0.00 4.73282 -132.206 -4.73282 4.73282 0.91 0.000454731 0.000415188 0.0203598 0.0185437 30 2255 21 6.89349e+06 436909 556674. 1926.21 1.00 0.0782981 0.0684347 25186 138497 -1 1974 21 1018 1913 116086 27921 3.52565 3.52565 -121.514 -3.52565 0 0 706193. 2443.58 0.29 0.06 0.14 -1 -1 0.29 0.0201692 0.0178121 129 -1 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_076.v common 9.99 vpr 64.86 MiB -1 -1 0.15 20436 1 0.03 -1 -1 33988 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66412 32 32 350 275 1 214 87 17 17 289 -1 unnamed_device 26.2 MiB 2.42 946 14295 4865 6147 3283 64.9 MiB 0.12 0.00 4.80372 -148.142 -4.80372 4.80372 0.90 0.000494335 0.000450718 0.0392866 0.0358666 38 2827 33 6.89349e+06 324158 678818. 2348.85 4.33 0.200178 0.173888 26626 170182 -1 2148 20 1613 2415 172416 40549 3.8457 3.8457 -136.281 -3.8457 0 0 902133. 3121.57 0.33 0.07 0.16 -1 -1 0.33 0.0220588 0.0194669 148 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_077.v common 9.82 vpr 65.11 MiB -1 -1 0.16 20564 1 0.03 -1 -1 33768 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66676 32 32 385 308 1 244 91 17 17 289 -1 unnamed_device 26.6 MiB 2.20 1348 15391 4691 8221 2479 65.1 MiB 0.15 0.00 5.48061 -170.804 -5.48061 5.48061 0.91 0.000538051 0.000486763 0.051502 0.0476288 36 2971 28 6.89349e+06 380534 648988. 2245.63 4.31 0.229235 0.200842 26050 158493 -1 2521 21 1856 2673 200167 44694 4.23189 4.23189 -155.088 -4.23189 0 0 828058. 2865.25 0.34 0.08 0.15 -1 -1 0.34 0.0253981 0.0224896 164 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_078.v common 9.99 vpr 65.29 MiB -1 -1 0.16 20444 1 0.03 -1 -1 33916 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66852 32 32 387 309 1 248 90 17 17 289 -1 unnamed_device 26.8 MiB 2.34 1348 16572 5279 8759 2534 65.3 MiB 0.15 0.00 4.59633 -149.535 -4.59633 4.59633 0.91 0.000542029 0.000492716 0.0475503 0.0432808 36 3220 22 6.89349e+06 366440 648988. 2245.63 4.33 0.217605 0.189312 26050 158493 -1 2729 22 1927 2866 248487 51644 3.7334 3.7334 -140.921 -3.7334 0 0 828058. 2865.25 0.32 0.09 0.15 -1 -1 0.32 0.026619 0.0235422 164 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_079.v common 7.00 vpr 64.38 MiB -1 -1 0.14 20692 1 0.03 -1 -1 34056 -1 -1 21 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65928 30 32 272 232 1 176 83 17 17 289 -1 unnamed_device 26.0 MiB 2.16 929 11603 3304 7249 1050 64.4 MiB 0.10 0.00 4.22559 -126.079 -4.22559 4.22559 0.91 0.0004284 0.000392859 0.0294275 0.0269077 34 2274 21 6.89349e+06 295971 618332. 2139.56 1.69 0.121218 0.106063 25762 151098 -1 1994 21 1138 1586 126934 27558 3.29711 3.29711 -116.443 -3.29711 0 0 787024. 2723.27 0.31 0.06 0.14 -1 -1 0.31 0.0193843 0.0170703 112 29 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_080.v common 8.05 vpr 65.25 MiB -1 -1 0.16 20868 1 0.03 -1 -1 33944 -1 -1 26 30 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66812 30 32 375 299 1 236 88 17 17 289 -1 unnamed_device 26.9 MiB 3.12 1157 9838 2412 6479 947 65.2 MiB 0.10 0.00 5.48387 -163.439 -5.48387 5.48387 0.91 0.000529417 0.000482479 0.029272 0.026675 34 2914 31 6.89349e+06 366440 618332. 2139.56 1.68 0.131967 0.114779 25762 151098 -1 2394 19 1932 2689 190948 42993 4.36915 4.36915 -156.668 -4.36915 0 0 787024. 2723.27 0.32 0.07 0.15 -1 -1 0.32 0.0235807 0.0209205 162 58 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_081.v common 6.94 vpr 64.85 MiB -1 -1 0.15 20460 1 0.03 -1 -1 33588 -1 -1 23 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66404 32 32 340 270 1 204 87 17 17 289 -1 unnamed_device 26.3 MiB 1.54 1128 9303 2368 6110 825 64.8 MiB 0.09 0.00 5.14805 -150.89 -5.14805 5.14805 0.92 0.00049571 0.000451587 0.026231 0.0239012 34 2876 34 6.89349e+06 324158 618332. 2139.56 2.19 0.149706 0.13046 25762 151098 -1 2362 19 1593 2666 208387 46147 3.97449 3.97449 -137.61 -3.97449 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0211728 0.0187012 139 31 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_082.v common 7.24 vpr 64.65 MiB -1 -1 0.17 20604 1 0.03 -1 -1 33760 -1 -1 23 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66200 31 32 340 275 1 211 86 17 17 289 -1 unnamed_device 26.1 MiB 2.18 1160 14828 4291 8520 2017 64.6 MiB 0.13 0.00 5.04939 -147.832 -5.04939 5.04939 0.90 0.000502443 0.000458195 0.0416159 0.0378506 34 2696 30 6.89349e+06 324158 618332. 2139.56 1.80 0.153844 0.134094 25762 151098 -1 2222 21 1562 2377 151469 35667 4.18485 4.18485 -141.313 -4.18485 0 0 787024. 2723.27 0.33 0.07 0.16 -1 -1 0.33 0.0233412 0.0205666 142 43 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_083.v common 7.99 vpr 65.00 MiB -1 -1 0.17 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66596 32 32 365 294 1 230 87 17 17 289 -1 unnamed_device 26.7 MiB 3.47 1143 12183 3367 8279 537 65.0 MiB 0.12 0.00 5.41467 -156.077 -5.41467 5.41467 0.89 0.000535616 0.000488837 0.0353168 0.032128 34 3317 24 6.89349e+06 324158 618332. 2139.56 1.98 0.131411 0.114886 25762 151098 -1 2550 21 1877 2841 221059 51776 4.56189 4.56189 -155.485 -4.56189 0 0 787024. 2723.27 0.31 0.08 0.16 -1 -1 0.31 0.0236245 0.020824 155 54 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_085.v common 9.25 vpr 65.36 MiB -1 -1 0.17 20620 1 0.03 -1 -1 33752 -1 -1 30 29 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66932 29 32 378 310 1 247 91 17 17 289 -1 unnamed_device 26.9 MiB 2.02 1279 8047 1945 5583 519 65.4 MiB 0.08 0.00 4.65125 -137.416 -4.65125 4.65125 0.90 0.000511352 0.000465794 0.022532 0.0205703 36 2926 21 6.89349e+06 422815 648988. 2245.63 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66852 32 32 397 314 1 256 89 17 17 289 -1 unnamed_device 26.8 MiB 3.73 1377 7415 1651 5387 377 65.3 MiB 0.09 0.00 5.30157 -175.126 -5.30157 5.30157 0.90 0.000510888 0.000461465 0.0233232 0.0212761 36 3393 25 6.89349e+06 352346 648988. 2245.63 2.57 0.152323 0.132413 26050 158493 -1 2835 22 2229 3205 258901 54853 4.72005 4.72005 -173.543 -4.72005 0 0 828058. 2865.25 0.32 0.09 0.16 -1 -1 0.32 0.0266574 0.0234914 171 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_089.v common 7.90 vpr 64.42 MiB -1 -1 0.14 20636 1 0.03 -1 -1 33920 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65968 32 32 269 231 1 172 82 17 17 289 -1 unnamed_device 25.8 MiB 2.97 743 12720 4130 6895 1695 64.4 MiB 0.10 0.00 4.14342 -113.505 -4.14342 4.14342 0.91 0.000404422 0.000367657 0.0313488 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66636 32 32 356 289 1 224 87 17 17 289 -1 unnamed_device 26.8 MiB 2.07 1083 8919 2056 5474 1389 65.1 MiB 0.08 0.00 4.89424 -142.728 -4.89424 4.89424 0.94 0.000528096 0.000480377 0.026587 0.0242552 34 3008 43 6.89349e+06 324158 618332. 2139.56 1.91 0.158614 0.137926 25762 151098 -1 2323 19 1527 2220 172266 41413 4.43665 4.43665 -142.524 -4.43665 0 0 787024. 2723.27 0.30 0.07 0.15 -1 -1 0.30 0.0222926 0.0197292 149 53 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_093.v common 9.42 vpr 65.01 MiB -1 -1 0.16 20608 1 0.03 -1 -1 33596 -1 -1 36 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66572 32 32 349 260 1 204 100 17 17 289 -1 unnamed_device 26.4 MiB 0.79 1033 19356 5199 10890 3267 65.0 MiB 0.17 0.00 5.32917 -146.087 -5.32917 5.32917 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x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66976 32 32 421 327 1 271 91 17 17 289 -1 unnamed_device 26.9 MiB 3.21 1514 18043 5658 10071 2314 65.4 MiB 0.18 0.00 4.58581 -147.507 -4.58581 4.58581 0.88 0.000560038 0.00051087 0.0537383 0.0490532 34 4194 50 6.89349e+06 380534 618332. 2139.56 2.40 0.190931 0.16852 25762 151098 -1 3210 21 1923 3102 270129 56903 4.10359 4.10359 -149.648 -4.10359 0 0 787024. 2723.27 0.31 0.09 0.15 -1 -1 0.31 0.0274047 0.0241109 185 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_097.v common 7.69 vpr 65.01 MiB -1 -1 0.17 20588 1 0.03 -1 -1 33728 -1 -1 24 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66572 31 32 365 296 1 233 87 17 17 289 -1 unnamed_device 26.7 MiB 2.27 1122 15639 4714 8375 2550 65.0 MiB 0.14 0.00 5.51467 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release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 65672 29 32 269 229 1 173 81 17 17 289 -1 unnamed_device 25.6 MiB 1.57 881 7081 1573 4782 726 64.1 MiB 0.06 0.00 4.21387 -125.832 -4.21387 4.21387 0.91 0.000406231 0.000371462 0.0183224 0.0167999 34 1947 20 6.89349e+06 281877 618332. 2139.56 1.50 0.102336 0.0888373 25762 151098 -1 1668 20 1336 1773 132678 29656 3.02156 3.02156 -111.286 -3.02156 0 0 787024. 2723.27 0.30 0.05 0.15 -1 -1 0.30 0.0180219 0.0158987 110 28 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_105.v common 8.77 vpr 64.75 MiB -1 -1 0.16 20632 1 0.03 -1 -1 33672 -1 -1 20 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66300 32 32 310 266 1 200 84 17 17 289 -1 unnamed_device 26.3 MiB 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32 303 262 1 200 82 17 17 289 -1 unnamed_device 26.4 MiB 2.83 1086 13432 3424 8813 1195 64.9 MiB 0.11 0.00 3.821 -117.953 -3.821 3.821 0.91 0.000439208 0.000400276 0.0347212 0.031595 34 2606 27 6.89349e+06 253689 618332. 2139.56 1.67 0.137605 0.119949 25762 151098 -1 2143 20 1427 1932 136459 31615 2.80696 2.80696 -111.298 -2.80696 0 0 787024. 2723.27 0.31 0.06 0.14 -1 -1 0.31 0.0210199 0.0185709 124 54 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_114.v common 8.57 vpr 64.70 MiB -1 -1 0.15 20404 1 0.03 -1 -1 33704 -1 -1 18 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66252 32 32 290 244 1 177 82 17 17 289 -1 unnamed_device 26.3 MiB 1.32 871 12898 3868 7278 1752 64.7 MiB 0.10 0.00 4.12213 -126.038 -4.12213 4.12213 0.92 0.000451206 0.00041309 0.0342206 0.0312897 36 2177 21 6.89349e+06 253689 648988. 2245.63 4.03 0.168656 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/root/vtr-verilog-to-routing/vtr-verilog-to-routing 66312 32 32 393 312 1 243 88 17 17 289 -1 unnamed_device 26.3 MiB 2.30 1170 10033 2409 6880 744 64.8 MiB 0.10 0.00 5.6505 -176.695 -5.6505 5.6505 0.90 0.000558091 0.000506719 0.0305673 0.0278868 34 3979 39 6.89349e+06 338252 618332. 2139.56 9.57 0.29377 0.253877 25762 151098 -1 2902 23 2152 3336 270669 62426 4.84719 4.84719 -171.492 -4.84719 0 0 787024. 2723.27 0.32 0.09 0.15 -1 -1 0.32 0.0271785 0.0239091 166 62 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_118.v common 5.24 vpr 64.61 MiB -1 -1 0.14 20084 1 0.03 -1 -1 33740 -1 -1 17 31 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66160 31 32 229 197 1 143 80 17 17 289 -1 unnamed_device 26.1 MiB 0.65 815 9368 2443 5733 1192 64.6 MiB 0.07 0.00 3.49795 -108.682 -3.49795 3.49795 0.90 0.000381949 0.00034856 0.0216447 0.0197439 34 1814 25 6.89349e+06 239595 618332. 2139.56 1.52 0.103031 0.0895431 25762 151098 -1 1577 19 774 1207 83395 19438 2.56436 2.56436 -99.3758 -2.56436 0 0 787024. 2723.27 0.31 0.04 0.14 -1 -1 0.31 0.0156408 0.0137878 92 -1 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_119.v common 7.60 vpr 65.50 MiB -1 -1 0.16 20576 1 0.03 -1 -1 33756 -1 -1 27 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67076 32 32 412 334 1 269 91 17 17 289 -1 unnamed_device 27.0 MiB 2.20 1425 17431 5130 10160 2141 65.5 MiB 0.17 0.00 5.66786 -177.951 -5.66786 5.66786 0.90 0.000566549 0.00051475 0.0510133 0.0465494 34 3494 40 6.89349e+06 380534 618332. 2139.56 2.08 0.192951 0.168638 25762 151098 -1 2800 23 2105 2897 221520 49926 5.00324 5.00324 -174.642 -5.00324 0 0 787024. 2723.27 0.30 0.08 0.15 -1 -1 0.30 0.0278375 0.0244536 175 87 -1 -1 -1 -1 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gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66688 32 32 360 293 1 227 86 17 17 289 -1 unnamed_device 26.8 MiB 2.22 1228 16529 5130 9253 2146 65.1 MiB 0.15 0.00 4.18062 -130.52 -4.18062 4.18062 0.93 0.000528953 0.000479595 0.047758 0.0435006 36 2679 46 6.89349e+06 310065 648988. 2245.63 4.19 0.230286 0.200561 26050 158493 -1 2371 19 1474 2061 158969 34359 3.14201 3.14201 -122.314 -3.14201 0 0 828058. 2865.25 0.32 0.06 0.16 -1 -1 0.32 0.022436 0.0198614 152 57 -1 -1 -1 -1 -fixed_k6_frac_uripple_N8_22nm.xml mult_122.v common 8.30 vpr 65.00 MiB -1 -1 0.17 20328 1 0.03 -1 -1 33704 -1 -1 26 32 0 0 success c2b7d0b-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-03T12:59:23 gh-actions-runner-vtr-auto-spawned238 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 66556 32 32 396 299 1 241 90 17 17 289 -1 unnamed_device 26.6 MiB 2.96 1277 13758 3654 8100 2004 65.0 MiB 0.15 0.00 5.8432 -174.13 -5.8432 5.8432 0.91 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65344 32 32 277 309 1 204 91 17 17 289 -1 unnamed_device 25.3 MiB 0.39 1387 6619 1257 4855 507 63.8 MiB 0.04 0.00 6.6399 -138.036 -6.6399 6.6399 0.68 0.000188205 0.000152593 0.00975451 0.0080884 36 3404 21 6.55708e+06 325485 612192. 2118.31 3.00 0.0706458 0.0587011 22750 144809 -1 2974 16 1393 4308 256375 56680 7.0397 7.0397 -159.412 -7.0397 0 0 782063. 2706.10 0.28 0.05 0.09 -1 -1 0.28 0.0139673 0.0126438 183 182 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_002.v common 6.27 vpr 63.86 MiB -1 -1 0.19 21888 14 0.28 -1 -1 36548 -1 -1 31 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65396 30 32 272 304 1 210 93 17 17 289 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65512 32 32 292 324 1 217 96 17 17 289 -1 unnamed_device 25.4 MiB 0.34 1474 7323 1491 5305 527 64.0 MiB 0.04 0.00 6.33838 -130.585 -6.33838 6.33838 0.71 0.000193617 0.000157318 0.00975033 0.00813324 36 3513 19 6.55708e+06 385760 612192. 2118.31 3.40 0.0973012 0.0834138 22750 144809 -1 3054 15 1236 3760 206664 47745 6.6791 6.6791 -149.702 -6.6791 0 0 782063. 2706.10 0.29 0.05 0.10 -1 -1 0.29 0.0140509 0.0128895 198 197 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_007.v common 4.14 vpr 63.50 MiB -1 -1 0.17 21280 12 0.23 -1 -1 36064 -1 -1 27 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65028 27 32 229 261 1 176 86 17 17 289 -1 unnamed_device 24.7 MiB 0.29 1051 8213 2062 5396 755 63.5 MiB 0.05 0.00 6.07044 -110.199 -6.07044 6.07044 0.77 0.000202377 0.000164229 0.0115888 0.00959968 30 2633 19 6.55708e+06 325485 526063. 1820.29 1.00 0.0446694 0.0377235 21886 126133 -1 2196 14 990 2647 126372 30363 6.31084 6.31084 -123.76 -6.31084 0 0 666494. 2306.21 0.26 0.03 0.08 -1 -1 0.26 0.0101561 0.00924598 152 144 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_008.v common 7.14 vpr 63.28 MiB -1 -1 0.15 21432 12 0.19 -1 -1 36356 -1 -1 22 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64796 31 32 229 261 1 184 85 17 17 289 -1 unnamed_device 24.6 MiB 0.24 1228 6037 1274 4231 532 63.3 MiB 0.03 0.00 5.19746 -114.596 -5.19746 5.19746 0.73 0.000212743 0.000176907 0.00747321 0.00608554 36 2995 17 6.55708e+06 265210 612192. 2118.31 4.04 0.0910489 0.076001 22750 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common 5.33 vpr 63.74 MiB -1 -1 0.16 21584 13 0.19 -1 -1 36284 -1 -1 25 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65272 32 32 250 282 1 193 89 17 17 289 -1 unnamed_device 25.0 MiB 0.30 1250 10583 2708 6481 1394 63.7 MiB 0.10 0.00 6.10764 -134.744 -6.10764 6.10764 0.73 0.000262572 0.000211975 0.0247366 0.0205627 36 2959 16 6.55708e+06 301375 612192. 2118.31 2.16 0.0794031 0.0668668 22750 144809 -1 2546 15 1048 2937 155140 36076 6.46824 6.46824 -152.404 -6.46824 0 0 782063. 2706.10 0.27 0.04 0.10 -1 -1 0.27 0.0125475 0.0115094 157 155 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_011.v common 4.31 vpr 63.17 MiB -1 -1 0.19 21432 12 0.20 -1 -1 36280 -1 -1 24 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64684 30 32 216 248 1 168 86 17 17 289 -1 unnamed_device 24.7 MiB 0.26 1037 6512 1433 4786 293 63.2 MiB 0.04 0.00 5.67264 -114.369 -5.67264 5.67264 0.78 0.000151611 0.000121604 0.00938544 0.00795564 28 2776 27 6.55708e+06 289320 500653. 1732.36 1.11 0.0434094 0.0368056 21310 115450 -1 2425 16 928 2402 144471 33830 6.15344 6.15344 -135.545 -6.15344 0 0 612192. 2118.31 0.29 0.04 0.08 -1 -1 0.29 0.0122715 0.0111361 132 125 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_012.v common 7.69 vpr 63.40 MiB -1 -1 0.16 21432 12 0.14 -1 -1 36224 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64924 32 32 236 268 1 183 86 17 17 289 -1 unnamed_device 24.7 MiB 0.26 1195 9158 2245 6089 824 63.4 MiB 0.04 0.00 5.54078 -128.9 -5.54078 5.54078 0.77 0.000160345 0.000129103 0.0107803 0.00881415 30 2913 31 6.55708e+06 265210 526063. 1820.29 4.70 0.079477 0.0662265 21886 126133 -1 2490 18 1049 2865 147320 34797 5.95786 5.95786 -146.78 -5.95786 0 0 666494. 2306.21 0.25 0.05 0.08 -1 -1 0.25 0.0166141 0.014803 146 141 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_013.v common 5.21 vpr 64.09 MiB -1 -1 0.17 21736 13 0.27 -1 -1 37020 -1 -1 30 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65628 32 32 283 315 1 223 94 17 17 289 -1 unnamed_device 25.3 MiB 0.26 1356 9466 2262 6772 432 64.1 MiB 0.05 0.00 6.60776 -137.972 -6.60776 6.60776 0.71 0.000198691 0.000161591 0.0119008 0.00980326 28 3920 32 6.55708e+06 361650 500653. 1732.36 2.07 0.0600463 0.0510724 21310 115450 -1 3312 20 1611 4720 274156 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65440 32 32 301 333 1 230 97 17 17 289 -1 unnamed_device 25.3 MiB 0.38 1391 17857 5602 9516 2739 63.9 MiB 0.09 0.00 6.19064 -127.507 -6.19064 6.19064 0.71 0.000223729 0.000168539 0.0225914 0.018321 44 3555 19 6.55708e+06 397815 742403. 2568.87 1.81 0.0758082 0.0637705 24478 177802 -1 2863 16 1354 4635 234471 54332 6.35264 6.35264 -140.218 -6.35264 0 0 937218. 3242.97 0.32 0.05 0.11 -1 -1 0.32 0.0160881 0.014677 209 206 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_017.v common 4.70 vpr 63.87 MiB -1 -1 0.18 21888 14 0.25 -1 -1 36348 -1 -1 29 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65400 32 32 277 309 1 217 93 17 17 289 -1 unnamed_device 25.2 MiB 0.30 1506 7653 1608 5168 877 63.9 MiB 0.05 0.00 6.22784 -132.429 -6.22784 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64884 31 32 231 263 1 184 87 17 17 289 -1 unnamed_device 24.7 MiB 0.38 1192 12375 3097 7556 1722 63.4 MiB 0.06 0.00 5.69758 -121.347 -5.69758 5.69758 0.69 0.000161103 0.00012933 0.0140682 0.0114212 30 2901 22 6.55708e+06 289320 526063. 1820.29 0.77 0.0456014 0.0384739 21886 126133 -1 2444 17 1056 2697 138058 33026 6.01898 6.01898 -142.536 -6.01898 0 0 666494. 2306.21 0.23 0.03 0.08 -1 -1 0.23 0.0117311 0.0106342 144 138 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_021.v common 4.66 vpr 64.18 MiB -1 -1 0.20 21736 13 0.27 -1 -1 36688 -1 -1 31 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65724 32 32 304 336 1 224 95 17 17 289 -1 unnamed_device 25.5 MiB 0.39 1387 7655 1636 5617 402 64.2 MiB 0.04 0.00 6.60976 -134.065 -6.60976 6.60976 0.69 0.000235843 0.000182515 0.011549 0.00956183 36 3299 21 6.55708e+06 373705 612192. 2118.31 1.41 0.0636525 0.0535904 22750 144809 -1 2913 20 1531 4982 255445 60524 6.89196 6.89196 -152.049 -6.89196 0 0 782063. 2706.10 0.26 0.06 0.09 -1 -1 0.26 0.0172848 0.0155364 211 209 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_022.v common 16.86 vpr 63.80 MiB -1 -1 0.20 22040 13 0.30 -1 -1 36608 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65336 32 32 288 320 1 221 91 17 17 289 -1 unnamed_device 25.3 MiB 0.44 1550 7231 1688 4820 723 63.8 MiB 0.04 0.00 6.34804 -139.291 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64764 30 32 213 245 1 165 85 17 17 289 -1 unnamed_device 24.6 MiB 0.20 1034 8827 2029 6113 685 63.2 MiB 0.04 0.00 5.26058 -110.338 -5.26058 5.26058 0.75 0.000152589 0.000122331 0.00999369 0.00811906 26 3087 42 6.55708e+06 277265 477104. 1650.88 3.39 0.0826113 0.0683363 21022 109990 -1 2520 19 1220 3361 262941 68014 5.84932 5.84932 -134.133 -5.84932 0 0 585099. 2024.56 0.23 0.08 0.07 -1 -1 0.23 0.0196673 0.0177118 131 122 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_031.v common 5.84 vpr 63.33 MiB -1 -1 0.17 21280 11 0.18 -1 -1 36256 -1 -1 28 28 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64852 28 32 227 259 1 175 88 17 17 289 -1 unnamed_device 24.6 MiB 0.43 1088 6523 1409 4488 626 63.3 MiB 0.03 0.00 5.26058 -106.418 -5.26058 5.26058 0.71 0.000171862 0.000135383 0.00807499 0.00665672 26 3190 41 6.55708e+06 337540 477104. 1650.88 2.70 0.0771898 0.064782 21022 109990 -1 2559 19 1283 3449 212798 52238 5.70218 5.70218 -129.567 -5.70218 0 0 585099. 2024.56 0.22 0.05 0.07 -1 -1 0.22 0.0128915 0.0116686 150 140 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_032.v common 4.25 vpr 63.95 MiB -1 -1 0.16 21432 12 0.21 -1 -1 36760 -1 -1 26 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65484 32 32 274 306 1 206 90 17 17 289 -1 unnamed_device 25.2 MiB 0.31 1296 7326 1706 4966 654 63.9 MiB 0.04 0.00 5.8417 -130.092 -5.8417 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65692 32 32 315 347 1 239 95 17 17 289 -1 unnamed_device 25.5 MiB 0.24 1640 8303 1835 5826 642 64.2 MiB 0.05 0.00 6.3159 -137.264 -6.3159 6.3159 0.82 0.000215228 0.00017545 0.0119522 0.00987054 30 4079 45 6.55708e+06 373705 526063. 1820.29 1.45 0.0719774 0.0612896 21886 126133 -1 3350 19 1384 4365 222228 50720 6.9195 6.9195 -161.515 -6.9195 0 0 666494. 2306.21 0.28 0.06 0.09 -1 -1 0.28 0.0213039 0.0192094 221 220 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_036.v common 5.23 vpr 63.94 MiB -1 -1 0.18 22040 14 0.33 -1 -1 36952 -1 -1 28 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65472 32 32 282 314 1 220 92 17 17 289 -1 unnamed_device 25.2 MiB 0.48 1381 7958 1934 5245 779 63.9 MiB 0.05 0.00 6.21358 -135.161 -6.21358 6.21358 0.69 0.000214653 0.00017608 0.0109731 0.00918126 36 3530 20 6.55708e+06 337540 612192. 2118.31 1.79 0.0713801 0.0606688 22750 144809 -1 3005 16 1328 3939 212390 50611 6.65518 6.65518 -155.553 -6.65518 0 0 782063. 2706.10 0.28 0.05 0.09 -1 -1 0.28 0.0151211 0.0137837 191 187 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_037.v common 4.05 vpr 63.50 MiB -1 -1 0.16 21432 12 0.15 -1 -1 36260 -1 -1 29 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65028 31 32 241 273 1 189 92 17 17 289 -1 unnamed_device 25.0 MiB 0.22 1226 8579 2126 5804 649 63.5 MiB 0.04 0.00 6.2415 -127.263 -6.2415 6.2415 0.68 0.000179245 0.000140858 0.00967507 0.00767735 30 3078 45 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65444 31 32 284 316 1 206 91 17 17 289 -1 unnamed_device 25.2 MiB 0.34 1341 7639 1588 5152 899 63.9 MiB 0.04 0.00 6.48956 -128.521 -6.48956 6.48956 0.69 0.000271272 0.000232414 0.010763 0.00905299 28 3884 28 6.55708e+06 337540 500653. 1732.36 1.89 0.0536576 0.0458431 21310 115450 -1 3041 18 1207 4003 268016 70310 6.77176 6.77176 -149.773 -6.77176 0 0 612192. 2118.31 0.22 0.06 0.07 -1 -1 0.22 0.0157639 0.0143264 193 191 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_046.v common 6.12 vpr 64.00 MiB -1 -1 0.21 21736 12 0.27 -1 -1 36540 -1 -1 29 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65536 32 32 303 335 1 222 93 17 17 289 -1 unnamed_device 25.3 MiB 0.50 1482 9333 2490 5789 1054 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65584 30 32 291 323 1 232 94 17 17 289 -1 unnamed_device 25.3 MiB 0.34 1471 7762 1557 5706 499 64.0 MiB 0.05 0.00 6.64956 -133.699 -6.64956 6.64956 0.68 0.000206039 0.000167502 0.0139748 0.0117011 34 3711 42 6.55708e+06 385760 585099. 2024.56 2.18 0.0932835 0.0793362 22462 138074 -1 3291 24 1538 4335 370319 126980 7.37076 7.37076 -157.695 -7.37076 0 0 742403. 2568.87 0.27 0.08 0.10 -1 -1 0.27 0.0190846 0.017154 203 200 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_081.v common 5.14 vpr 63.86 MiB -1 -1 0.20 21888 14 0.32 -1 -1 36536 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65396 32 32 274 306 1 210 91 17 17 289 -1 unnamed_device 25.2 MiB 0.46 1407 5803 1022 4556 225 63.9 MiB 0.04 0.00 6.57116 -137.255 -6.57116 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65724 32 32 310 342 1 238 101 17 17 289 -1 unnamed_device 25.5 MiB 0.37 1540 9971 2378 6379 1214 64.2 MiB 0.06 0.00 6.66744 -138.002 -6.66744 6.66744 0.72 0.000240648 0.000192647 0.0129698 0.0107302 36 3722 45 6.55708e+06 446035 612192. 2118.31 3.22 0.126938 0.108441 22750 144809 -1 3178 17 1431 4036 208595 49161 6.9175 6.9175 -154.6 -6.9175 0 0 782063. 2706.10 0.32 0.07 0.10 -1 -1 0.32 0.0281168 0.0257102 218 215 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_085.v common 8.71 vpr 63.63 MiB -1 -1 0.21 21888 11 0.28 -1 -1 36172 -1 -1 29 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65160 29 32 262 294 1 203 90 17 17 289 -1 unnamed_device 25.0 MiB 0.53 1252 7728 1867 5218 643 63.6 MiB 0.04 0.00 5.69758 -111.799 -5.69758 5.69758 0.74 0.000179953 0.000146007 0.0110395 0.00923481 28 3696 44 6.55708e+06 349595 500653. 1732.36 5.21 0.0998799 0.0836337 21310 115450 -1 3055 23 1365 4016 327415 100987 6.07244 6.07244 -131.664 -6.07244 0 0 612192. 2118.31 0.24 0.07 0.09 -1 -1 0.24 0.0172381 0.0155828 177 173 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_086.v common 4.33 vpr 63.18 MiB -1 -1 0.17 21432 13 0.16 -1 -1 36368 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64700 32 32 222 254 1 180 88 17 17 289 -1 unnamed_device 24.6 MiB 0.29 1165 8473 2218 5356 899 63.2 MiB 0.05 0.00 5.68852 -133.93 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64772 32 32 220 252 1 157 86 17 17 289 -1 unnamed_device 24.7 MiB 0.42 1053 11804 3159 6999 1646 63.3 MiB 0.05 0.00 5.26058 -111.69 -5.26058 5.26058 0.77 0.000207657 0.000168255 0.0135286 0.0107863 28 2659 25 6.55708e+06 265210 500653. 1732.36 1.27 0.0482252 0.0404853 21310 115450 -1 2388 19 951 2734 169992 39256 5.98178 5.98178 -136.176 -5.98178 0 0 612192. 2118.31 0.23 0.05 0.08 -1 -1 0.23 0.0133972 0.0118155 129 125 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_090.v common 4.93 vpr 63.54 MiB -1 -1 0.17 21432 12 0.20 -1 -1 36248 -1 -1 26 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65068 31 32 244 276 1 193 89 17 17 289 -1 unnamed_device 24.9 MiB 0.26 1280 9989 2456 6266 1267 63.5 MiB 0.05 0.00 5.84272 -127.244 -5.84272 5.84272 0.73 0.000200977 0.00016333 0.0117773 0.00973231 28 3779 35 6.55708e+06 313430 500653. 1732.36 1.82 0.052027 0.0440754 21310 115450 -1 3075 23 1408 3973 317219 86537 6.20332 6.20332 -152.129 -6.20332 0 0 612192. 2118.31 0.25 0.08 0.07 -1 -1 0.25 0.0161404 0.0143965 156 151 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_091.v common 11.76 vpr 63.92 MiB -1 -1 0.19 21888 12 0.30 -1 -1 36504 -1 -1 32 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65452 32 32 300 332 1 237 96 17 17 289 -1 unnamed_device 25.2 MiB 0.33 1464 15645 4459 9412 1774 63.9 MiB 0.09 0.00 6.09998 -131.854 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30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65040 30 32 246 278 1 191 87 17 17 289 -1 unnamed_device 25.0 MiB 0.38 1226 7575 1734 5377 464 63.5 MiB 0.04 0.00 6.01698 -115.014 -6.01698 6.01698 0.69 0.00029743 0.00026197 0.00976611 0.00805953 30 3180 18 6.55708e+06 301375 526063. 1820.29 2.95 0.0784693 0.0657767 21886 126133 -1 2649 18 1198 3934 194537 44632 6.40912 6.40912 -132.291 -6.40912 0 0 666494. 2306.21 0.26 0.05 0.08 -1 -1 0.26 0.0140574 0.0127501 160 155 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_095.v common 8.90 vpr 63.35 MiB -1 -1 0.19 21280 11 0.18 -1 -1 36220 -1 -1 26 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65744 31 32 321 353 1 256 98 17 17 289 -1 unnamed_device 25.5 MiB 0.27 1663 7523 1572 5432 519 64.2 MiB 0.05 0.00 6.2793 -134.923 -6.2793 6.2793 0.73 0.000249757 0.000200495 0.0115269 0.00960084 36 3950 32 6.55708e+06 421925 612192. 2118.31 2.27 0.0871776 0.0742897 22750 144809 -1 3458 27 1533 4631 399390 143723 6.9613 6.9613 -153.226 -6.9613 0 0 782063. 2706.10 0.27 0.10 0.09 -1 -1 0.27 0.0219064 0.0195709 233 228 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_101.v common 5.79 vpr 63.61 MiB -1 -1 0.17 21736 11 0.25 -1 -1 36204 -1 -1 31 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65132 30 32 287 319 1 212 93 17 17 289 -1 unnamed_device 25.0 MiB 0.25 1408 6603 1301 4785 517 63.6 MiB 0.04 0.00 5.50298 -108.991 -5.50298 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65116 29 32 239 271 1 189 90 17 17 289 -1 unnamed_device 24.9 MiB 0.47 1165 13155 3423 7845 1887 63.6 MiB 0.07 0.00 6.0801 -124.158 -6.0801 6.0801 0.73 0.000158771 0.000127985 0.0155656 0.012812 34 2968 40 6.55708e+06 349595 585099. 2024.56 2.94 0.109609 0.0918242 22462 138074 -1 2504 19 1290 3631 195966 47129 6.83084 6.83084 -146.698 -6.83084 0 0 742403. 2568.87 0.29 0.06 0.11 -1 -1 0.29 0.0157004 0.0139438 157 150 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_105.v common 9.14 vpr 63.37 MiB -1 -1 0.17 21584 11 0.17 -1 -1 36312 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64892 32 32 235 267 1 176 85 17 17 289 -1 unnamed_device 24.7 MiB 0.21 1119 7525 1575 5297 653 63.4 MiB 0.04 0.00 5.75104 -119.336 -5.75104 5.75104 0.71 0.00017164 0.000132474 0.00917738 0.00747652 28 3173 43 6.55708e+06 253155 500653. 1732.36 6.19 0.0801345 0.0670121 21310 115450 -1 2705 24 1187 3125 239291 74570 6.11164 6.11164 -142.097 -6.11164 0 0 612192. 2118.31 0.25 0.06 0.09 -1 -1 0.25 0.01566 0.0140764 145 140 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_106.v common 12.70 vpr 64.01 MiB -1 -1 0.18 21584 13 0.32 -1 -1 36524 -1 -1 29 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65548 31 32 294 326 1 226 92 17 17 289 -1 unnamed_device 25.3 MiB 0.54 1482 8993 2280 5689 1024 64.0 MiB 0.05 0.00 6.3603 -132.515 -6.3603 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65528 31 32 266 298 1 208 93 17 17 289 -1 unnamed_device 25.3 MiB 0.31 1312 12273 2972 7753 1548 64.0 MiB 0.06 0.00 6.22784 -134.078 -6.22784 6.22784 0.69 0.000193182 0.000154013 0.0160145 0.0130288 30 3216 25 6.55708e+06 361650 526063. 1820.29 0.93 0.0530003 0.0448992 21886 126133 -1 2799 32 1287 3627 363277 150131 6.46824 6.46824 -152.382 -6.46824 0 0 666494. 2306.21 0.24 0.10 0.07 -1 -1 0.24 0.0207575 0.0185786 180 173 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_110.v common 6.15 vpr 63.36 MiB -1 -1 0.17 21280 12 0.16 -1 -1 36276 -1 -1 26 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64880 31 32 225 257 1 178 89 17 17 289 -1 unnamed_device 24.7 MiB 0.31 1150 9593 2366 6094 1133 63.4 MiB 0.04 0.00 5.36912 -115.638 -5.36912 5.36912 0.69 0.000161715 0.00012929 0.00990513 0.00822773 28 2821 21 6.55708e+06 313430 500653. 1732.36 3.26 0.0643926 0.0535916 21310 115450 -1 2403 17 1089 2914 166384 38205 5.76892 5.76892 -134.714 -5.76892 0 0 612192. 2118.31 0.22 0.04 0.07 -1 -1 0.22 0.0112113 0.0100963 138 132 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_111.v common 5.30 vpr 63.91 MiB -1 -1 0.17 21584 12 0.19 -1 -1 37028 -1 -1 26 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65448 32 32 288 320 1 216 90 17 17 289 -1 unnamed_device 25.2 MiB 0.29 1415 8934 2141 5939 854 63.9 MiB 0.05 0.00 5.79284 -125.409 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65036 32 32 238 270 1 186 90 17 17 289 -1 unnamed_device 24.7 MiB 0.36 1211 5919 1164 4333 422 63.5 MiB 0.03 0.00 5.9599 -131.665 -5.9599 5.9599 0.79 0.000202078 0.000169566 0.00780428 0.00644699 28 3190 31 6.55708e+06 313430 500653. 1732.36 1.33 0.0498689 0.0424412 21310 115450 -1 2713 15 1135 3005 173392 40265 6.2813 6.2813 -151.406 -6.2813 0 0 612192. 2118.31 0.23 0.06 0.08 -1 -1 0.23 0.0180766 0.0160221 151 143 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_121.v common 4.84 vpr 63.63 MiB -1 -1 0.19 21736 12 0.22 -1 -1 36352 -1 -1 26 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65156 32 32 269 301 1 199 90 17 17 289 -1 unnamed_device 25.0 MiB 0.27 1377 9336 2471 6109 756 63.6 MiB 0.07 0.00 5.99144 -128.681 -5.99144 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64784 30 32 228 260 1 171 87 17 17 289 -1 unnamed_device 24.7 MiB 0.17 1003 11799 3351 6739 1709 63.3 MiB 0.05 0.00 6.21618 -124.551 -6.21618 6.21618 0.72 0.000166171 0.000133894 0.0134326 0.0110565 36 2537 20 6.55708e+06 301375 612192. 2118.31 3.29 0.0883998 0.0734546 22750 144809 -1 2218 16 1010 2769 140585 34591 6.21618 6.21618 -136.735 -6.21618 0 0 782063. 2706.10 0.30 0.04 0.10 -1 -1 0.30 0.0124232 0.0111294 143 137 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_125.v common 7.56 vpr 63.56 MiB -1 -1 0.17 21432 12 0.21 -1 -1 36232 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65088 32 32 264 296 1 204 88 17 17 289 -1 unnamed_device 25.0 MiB 0.26 1129 14323 4370 7502 2451 63.6 MiB 0.07 0.00 6.58844 -130.952 -6.58844 6.58844 0.75 0.000186422 0.000152141 0.01678 0.0138885 34 3390 49 6.55708e+06 289320 585099. 2024.56 4.44 0.116492 0.0972239 22462 138074 -1 2559 19 1454 3904 208810 52472 6.85838 6.85838 -149.684 -6.85838 0 0 742403. 2568.87 0.27 0.06 0.08 -1 -1 0.27 0.0169319 0.0149779 171 169 -1 -1 -1 -1 +fixed_k6_N8_gate_boost_0.2V_22nm.xml mult_126.v common 5.47 vpr 62.86 MiB -1 -1 0.14 21280 9 0.15 -1 -1 36232 -1 -1 22 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64368 25 32 183 215 1 140 79 17 17 289 -1 unnamed_device 24.4 MiB 0.18 883 9205 2241 6015 949 62.9 MiB 0.04 0.00 4.28106 -82.5375 -4.28106 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65448 30 32 363 293 1 196 87 17 17 289 -1 unnamed_device 25.4 MiB 0.23 997 16983 6527 7813 2643 63.9 MiB 0.08 0.00 4.01761 -118.419 -4.01761 4.01761 0.68 0.000138286 0.000109601 0.0157078 0.0128305 28 2390 21 6.64007e+06 313950 500653. 1732.36 2.45 0.0742341 0.0616249 21970 115934 -1 2073 22 1703 2538 186532 41652 4.10669 4.10669 -139.157 -4.10669 0 0 612192. 2118.31 0.23 0.04 0.07 -1 -1 0.23 0.0126816 0.0110953 141 58 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_003.v common 4.89 vpr 63.82 MiB -1 -1 0.13 21280 1 0.02 -1 -1 33724 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65352 32 32 299 247 1 188 87 17 17 289 -1 unnamed_device 25.1 MiB 0.21 1022 15063 4627 8183 2253 63.8 MiB 0.07 0.00 3.51556 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65108 27 32 259 221 1 130 78 17 17 289 -1 unnamed_device 24.9 MiB 0.07 703 12362 4150 6682 1530 63.6 MiB 0.05 0.00 3.15021 -84.8875 -3.15021 3.15021 0.70 0.000105808 8.2407e-05 0.00993819 0.0079573 32 1454 20 6.64007e+06 238602 554710. 1919.41 2.06 0.0553732 0.0454158 22834 132086 -1 1360 17 681 1147 67913 16726 2.81497 2.81497 -94.439 -2.81497 0 0 701300. 2426.64 0.25 0.02 0.08 -1 -1 0.25 0.00754766 0.00667157 93 26 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_008.v common 4.82 vpr 63.39 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33716 -1 -1 31 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64916 31 32 271 219 1 162 94 17 17 289 -1 unnamed_device 24.8 MiB 0.06 745 10105 2135 7346 624 63.4 MiB 0.05 0.00 2.7731 -79.8903 -2.7731 2.7731 0.77 0.000159463 0.000125897 0.00924198 0.00741344 30 1959 21 6.64007e+06 389298 526063. 1820.29 2.20 0.0638026 0.0529732 22546 126617 -1 1646 22 916 1583 95033 23643 2.69877 2.69877 -95.3435 -2.69877 0 0 666494. 2306.21 0.23 0.03 0.08 -1 -1 0.23 0.00958972 0.0084541 115 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_009.v common 4.61 vpr 63.96 MiB -1 -1 0.13 21432 1 0.04 -1 -1 33920 -1 -1 20 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65496 31 32 317 271 1 167 83 17 17 289 -1 unnamed_device 25.2 MiB 0.18 910 14123 4648 7340 2135 64.0 MiB 0.08 0.00 2.88585 -99.5553 -2.88585 2.88585 0.71 0.000220592 0.000118663 0.015995 0.0127044 30 2099 15 6.64007e+06 251160 526063. 1820.29 1.89 0.0588337 0.0480337 22546 126617 -1 1756 15 828 1216 74735 16982 2.94043 2.94043 -115.207 -2.94043 0 0 666494. 2306.21 0.24 0.02 0.09 -1 -1 0.24 0.00829159 0.00739961 111 60 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_010.v common 4.96 vpr 63.41 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33664 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64936 32 32 298 248 1 156 81 17 17 289 -1 unnamed_device 24.9 MiB 0.14 949 13381 4032 7569 1780 63.4 MiB 0.07 0.00 3.01701 -102.302 -3.01701 3.01701 0.71 0.000135611 0.00010763 0.012187 0.00976609 32 1938 20 6.64007e+06 213486 554710. 1919.41 2.22 0.0620828 0.0509395 22834 132086 -1 1754 21 1268 2100 140542 31708 2.83577 2.83577 -117.308 -2.83577 0 0 701300. 2426.64 0.25 0.04 0.09 -1 -1 0.25 0.0109939 0.00966545 112 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_011.v common 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65060 32 32 276 237 1 166 82 17 17 289 -1 unnamed_device 24.9 MiB 0.22 777 12364 4260 5850 2254 63.5 MiB 0.05 0.00 2.97901 -94.107 -2.97901 2.97901 0.69 0.000128583 0.000102786 0.0107178 0.00867297 28 2376 27 6.64007e+06 226044 500653. 1732.36 3.31 0.0591169 0.0486756 21970 115934 -1 1832 19 1057 1410 109883 26603 3.23977 3.23977 -114.222 -3.23977 0 0 612192. 2118.31 0.22 0.03 0.07 -1 -1 0.22 0.0103487 0.00917972 109 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_013.v common 5.22 vpr 64.18 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33768 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65716 32 32 344 272 1 202 88 17 17 289 -1 unnamed_device 25.4 MiB 0.22 1111 16273 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65544 32 32 338 269 1 196 87 17 17 289 -1 unnamed_device 25.3 MiB 0.24 1026 14871 5086 7141 2644 64.0 MiB 0.10 0.00 3.51127 -114.907 -3.51127 3.51127 0.71 0.000155035 0.000124199 0.01973 0.0161173 32 2457 41 6.64007e+06 288834 554710. 1919.41 2.38 0.082335 0.0682691 22834 132086 -1 2045 22 1442 2027 143831 34182 3.40723 3.40723 -125.403 -3.40723 0 0 701300. 2426.64 0.27 0.04 0.10 -1 -1 0.27 0.0134617 0.0117508 138 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_018.v common 4.95 vpr 63.92 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33504 -1 -1 29 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65456 32 32 323 276 1 153 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IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65804 32 32 372 300 1 204 89 17 17 289 -1 unnamed_device 25.5 MiB 0.23 1074 15929 4785 8366 2778 64.3 MiB 0.09 0.00 3.77042 -115.298 -3.77042 3.77042 0.72 0.00024038 0.0002061 0.0149787 0.0121554 32 2686 21 6.64007e+06 313950 554710. 1919.41 0.78 0.0492337 0.0410307 22834 132086 -1 2210 19 1425 2192 143940 33506 4.18889 4.18889 -134.305 -4.18889 0 0 701300. 2426.64 0.25 0.04 0.09 -1 -1 0.25 0.0124412 0.0108764 144 59 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_023.v common 4.61 vpr 62.94 MiB -1 -1 0.11 21128 1 0.03 -1 -1 34128 -1 -1 18 26 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64452 26 32 190 182 1 110 76 17 17 289 -1 unnamed_device 24.5 MiB 0.13 388 5516 1315 3437 764 62.9 MiB 0.02 0.00 1.89953 -51.597 -1.89953 1.89953 0.76 0.000113473 8.8084e-05 0.00420626 0.00333928 28 1070 26 6.64007e+06 226044 500653. 1732.36 1.94 0.0384153 0.0311412 21970 115934 -1 799 13 483 671 36266 10103 1.83391 1.83391 -62.6564 -1.83391 0 0 612192. 2118.31 0.24 0.01 0.09 -1 -1 0.24 0.00521435 0.00463857 77 21 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_024.v common 3.28 vpr 63.71 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33720 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65240 32 32 285 227 1 165 85 17 17 289 -1 unnamed_device 24.9 MiB 0.04 893 8827 2231 6160 436 63.7 MiB 0.05 0.00 4.06306 -103.134 -4.06306 4.06306 0.72 0.00014183 0.0001151 0.00813117 0.00651422 30 2007 21 6.64007e+06 263718 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65484 32 32 297 233 1 177 95 17 17 289 -1 unnamed_device 25.2 MiB 0.04 1074 10031 2564 6316 1151 63.9 MiB 0.06 0.00 3.0905 -91.9939 -3.0905 3.0905 0.73 0.000185533 0.000148084 0.00830692 0.00671016 28 2281 19 6.64007e+06 389298 500653. 1732.36 0.68 0.0351314 0.0297514 21970 115934 -1 2018 20 1174 2088 127206 29699 2.88897 2.88897 -109.137 -2.88897 0 0 612192. 2118.31 0.23 0.03 0.09 -1 -1 0.23 0.0100419 0.00879151 128 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_028.v common 5.79 vpr 64.06 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33656 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65596 32 32 338 277 1 179 91 17 17 289 -1 unnamed_device 25.4 MiB 0.10 876 9475 2288 6228 959 64.1 MiB 0.05 0.00 3.69347 -105.842 -3.69347 3.69347 0.69 0.000139007 0.000110217 0.00878494 0.00721117 28 2574 23 6.64007e+06 339066 500653. 1732.36 3.15 0.064153 0.0531081 21970 115934 -1 1968 22 1419 2421 161515 39524 4.01003 4.01003 -132.555 -4.01003 0 0 612192. 2118.31 0.23 0.04 0.08 -1 -1 0.23 0.0115445 0.0101854 126 47 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_029.v common 3.19 vpr 63.45 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33544 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64968 32 32 284 241 1 145 80 17 17 289 -1 unnamed_device 24.9 MiB 0.06 821 7304 1675 5162 467 63.4 MiB 0.04 0.00 2.42079 -84.9403 -2.42079 2.42079 0.69 0.000214868 0.000187698 0.00697423 0.00568707 32 1796 20 6.64007e+06 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IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64904 32 32 253 210 1 154 83 17 17 289 -1 unnamed_device 24.8 MiB 0.04 906 13403 4336 7151 1916 63.4 MiB 0.06 0.00 3.19341 -99.4645 -3.19341 3.19341 0.68 0.000113684 8.9673e-05 0.0107944 0.00849331 26 2250 25 6.64007e+06 238602 477104. 1650.88 0.79 0.0339176 0.0277606 21682 110474 -1 1885 23 1303 2060 149941 34477 3.01537 3.01537 -113.333 -3.01537 0 0 585099. 2024.56 0.22 0.03 0.07 -1 -1 0.22 0.00914029 0.0080234 110 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_033.v common 3.12 vpr 63.73 MiB -1 -1 0.12 21128 1 0.03 -1 -1 33740 -1 -1 27 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65260 31 32 271 231 1 148 90 17 17 289 -1 unnamed_device 25.2 MiB 0.04 761 9537 2019 7104 414 63.7 MiB 0.05 0.00 2.8301 -85.9203 -2.8301 2.8301 0.68 0.000134449 0.000107352 0.00779343 0.00635627 28 1942 20 6.64007e+06 339066 500653. 1732.36 0.67 0.0288729 0.0240412 21970 115934 -1 1609 18 1020 1710 116927 27176 2.72157 2.72157 -100.912 -2.72157 0 0 612192. 2118.31 0.22 0.03 0.08 -1 -1 0.22 0.00812887 0.00702783 103 26 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_034.v common 3.22 vpr 63.85 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33780 -1 -1 26 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65384 29 32 291 250 1 153 87 17 17 289 -1 unnamed_device 25.2 MiB 0.11 780 14679 4800 7602 2277 63.9 MiB 0.07 0.00 2.6377 -84.9732 -2.6377 2.6377 0.69 0.000131151 0.000103743 0.0114708 0.00925221 32 1747 20 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64912 31 32 279 237 1 161 82 17 17 289 -1 unnamed_device 24.8 MiB 0.19 961 13788 4431 7504 1853 63.4 MiB 0.06 0.00 3.60147 -106.571 -3.60147 3.60147 0.71 0.000276566 0.000249222 0.0114669 0.0091511 32 1951 19 6.64007e+06 238602 554710. 1919.41 0.66 0.0341196 0.0283263 22834 132086 -1 1726 19 923 1389 94970 22265 2.93843 2.93843 -109.561 -2.93843 0 0 701300. 2426.64 0.26 0.03 0.08 -1 -1 0.26 0.00913837 0.00790914 112 30 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_038.v common 3.44 vpr 63.91 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33660 -1 -1 25 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65440 31 32 370 297 1 186 88 17 17 289 -1 unnamed_device 25.3 MiB 0.10 981 16078 5387 7920 2771 63.9 MiB 0.08 0.00 3.41261 -105.021 -3.41261 3.41261 0.71 0.000148999 0.000118718 0.0152836 0.0123472 32 2571 22 6.64007e+06 313950 554710. 1919.41 0.72 0.0447994 0.0372665 22834 132086 -1 2107 21 1511 2657 204607 46849 2.93997 2.93997 -112.189 -2.93997 0 0 701300. 2426.64 0.25 0.05 0.09 -1 -1 0.25 0.0114829 0.0100532 138 57 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_039.v common 3.79 vpr 63.72 MiB -1 -1 0.13 21736 1 0.03 -1 -1 33892 -1 -1 29 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65248 31 32 377 302 1 233 92 17 17 289 -1 unnamed_device 25.7 MiB 0.33 1302 11063 3030 7182 851 63.7 MiB 0.07 0.00 4.59178 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65660 32 32 457 356 1 223 104 17 17 289 -1 unnamed_device 25.8 MiB 0.16 1218 12792 3156 8535 1101 64.1 MiB 0.08 0.00 4.04253 -131.869 -4.04253 4.04253 0.72 0.00018087 0.000146898 0.013925 0.0114794 32 2800 21 6.64007e+06 502320 554710. 1919.41 2.34 0.0961393 0.0802972 22834 132086 -1 2436 23 1614 2412 146040 34319 4.14769 4.14769 -153.792 -4.14769 0 0 701300. 2426.64 0.25 0.04 0.09 -1 -1 0.25 0.0148083 0.0128524 174 84 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_044.v common 3.47 vpr 63.67 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33704 -1 -1 21 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65200 31 32 261 225 1 142 84 17 17 289 -1 unnamed_device 24.9 MiB 0.10 660 8685 1938 6083 664 63.7 MiB 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65692 32 32 353 287 1 198 88 17 17 289 -1 unnamed_device 25.5 MiB 0.26 968 7498 1503 5413 582 64.2 MiB 0.05 0.00 3.75438 -112.247 -3.75438 3.75438 0.76 0.000227807 0.000194446 0.00901141 0.00736747 28 3085 31 6.64007e+06 301392 500653. 1732.36 2.81 0.075245 0.0622718 21970 115934 -1 2241 20 1230 1739 126249 30138 3.53023 3.53023 -126.567 -3.53023 0 0 612192. 2118.31 0.24 0.04 0.07 -1 -1 0.24 0.0115675 0.0101333 138 52 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_049.v common 4.66 vpr 64.04 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33696 -1 -1 32 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65580 32 32 361 291 1 185 96 17 17 289 -1 unnamed_device 25.2 MiB 0.13 1076 16740 4486 10199 2055 64.0 MiB 0.10 0.00 2.9943 -102.808 -2.9943 2.9943 0.73 0.000195812 0.000159654 0.0173027 0.0135819 26 2634 20 6.64007e+06 401856 477104. 1650.88 1.92 0.0687538 0.0563955 21682 110474 -1 2211 18 1291 2258 156775 35013 3.11637 3.11637 -117.602 -3.11637 0 0 585099. 2024.56 0.22 0.04 0.07 -1 -1 0.22 0.0102627 0.00913875 133 52 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_050.v common 5.14 vpr 64.27 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33676 -1 -1 37 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65812 32 32 382 305 1 192 101 17 17 289 -1 unnamed_device 25.5 MiB 0.11 998 18901 5830 10108 2963 64.3 MiB 0.13 0.00 3.82667 -116.163 -3.82667 3.82667 0.76 0.000208886 0.000174044 0.0204306 0.0163943 32 2366 22 6.64007e+06 464646 554710. 1919.41 2.29 0.0887702 0.0733721 22834 132086 -1 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65504 31 32 373 299 1 202 88 17 17 289 -1 unnamed_device 25.4 MiB 0.23 1178 10228 2974 6298 956 64.0 MiB 0.06 0.00 4.03253 -123.337 -4.03253 4.03253 0.72 0.000158645 0.000128231 0.0105893 0.00868184 30 2649 22 6.64007e+06 313950 526063. 1820.29 2.31 0.0665112 0.0553763 22546 126617 -1 2347 19 1241 2100 132103 29834 3.78908 3.78908 -132.938 -3.78908 0 0 666494. 2306.21 0.24 0.04 0.08 -1 -1 0.24 0.0118779 0.0106542 148 58 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_054.v common 3.57 vpr 64.09 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33816 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65628 32 32 387 315 1 189 86 17 17 289 -1 unnamed_device 25.5 MiB 0.14 966 10859 3124 6547 1188 64.1 MiB 0.06 0.00 3.49656 -106.459 -3.49656 3.49656 0.79 0.000153126 0.000122672 0.0110827 0.0091018 32 2698 21 6.64007e+06 276276 554710. 1919.41 0.74 0.0467996 0.0401231 22834 132086 -1 2255 18 1460 2602 165344 39211 3.57043 3.57043 -127.592 -3.57043 0 0 701300. 2426.64 0.28 0.04 0.09 -1 -1 0.28 0.0110837 0.00989619 136 74 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_055.v common 4.55 vpr 63.29 MiB -1 -1 0.16 21280 1 0.03 -1 -1 33408 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64808 32 32 251 219 1 140 88 17 17 289 -1 unnamed_device 24.8 MiB 0.04 783 10423 2806 6831 786 63.3 MiB 0.05 0.00 2.8131 -84.1217 -2.8131 2.8131 0.69 0.00011586 9.0854e-05 0.00851551 0.00680432 26 1913 23 6.64007e+06 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IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65468 32 32 340 270 1 181 96 17 17 289 -1 unnamed_device 25.2 MiB 0.09 865 9294 1914 7055 325 63.9 MiB 0.05 0.00 3.62672 -107.562 -3.62672 3.62672 0.68 0.000143099 0.000113697 0.00857626 0.00698922 28 2298 31 6.64007e+06 401856 500653. 1732.36 0.92 0.0384404 0.0321699 21970 115934 -1 1889 19 1079 1735 114781 27760 3.01637 3.01637 -116.428 -3.01637 0 0 612192. 2118.31 0.23 0.04 0.07 -1 -1 0.23 0.0122895 0.0109781 133 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_059.v common 4.59 vpr 63.46 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33800 -1 -1 26 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64984 30 32 278 235 1 148 88 17 17 289 -1 unnamed_device 24.9 MiB 0.04 732 12373 3942 6443 1988 63.5 MiB 0.06 0.00 2.7339 -83.6984 -2.7339 2.7339 0.69 0.000124254 9.7871e-05 0.00983276 0.00790832 30 1648 19 6.64007e+06 326508 526063. 1820.29 2.11 0.0603968 0.0499717 22546 126617 -1 1425 18 704 1194 76529 17250 2.51537 2.51537 -94.8592 -2.51537 0 0 666494. 2306.21 0.24 0.03 0.07 -1 -1 0.24 0.00907997 0.00817557 104 29 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_060.v common 3.67 vpr 64.05 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33904 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65592 32 32 431 332 1 235 91 17 17 289 -1 unnamed_device 25.8 MiB 0.26 1242 17227 6097 8060 3070 64.1 MiB 0.10 0.00 5.03129 -148.58 -5.03129 5.03129 0.68 0.00016662 0.000134111 0.0183305 0.0151489 32 3248 31 6.64007e+06 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65520 32 32 349 273 1 191 98 17 17 289 -1 unnamed_device 25.2 MiB 0.10 1149 16073 4019 10356 1698 64.0 MiB 0.09 0.00 4.43412 -114.883 -4.43412 4.43412 0.71 0.000149679 0.000120138 0.0136672 0.011158 32 2462 19 6.64007e+06 426972 554710. 1919.41 2.22 0.0658515 0.0545163 22834 132086 -1 2123 20 1204 2378 153017 34578 4.41608 4.41608 -132.882 -4.41608 0 0 701300. 2426.64 0.26 0.04 0.09 -1 -1 0.26 0.0107635 0.00943839 139 26 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_064.v common 4.75 vpr 63.43 MiB -1 -1 0.12 21128 1 0.03 -1 -1 33876 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64956 32 32 247 207 1 147 84 17 17 289 -1 unnamed_device 24.8 MiB 0.04 901 8319 2049 5692 578 63.4 MiB 0.04 0.00 2.7079 -89.3755 -2.7079 2.7079 0.77 0.000129358 9.5791e-05 0.00707168 0.00569446 26 2189 21 6.64007e+06 251160 477104. 1650.88 2.17 0.0523706 0.0430028 21682 110474 -1 1902 17 1057 1715 132547 29222 3.08417 3.08417 -113.845 -3.08417 0 0 585099. 2024.56 0.22 0.03 0.07 -1 -1 0.22 0.00771525 0.00675561 104 -1 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_065.v common 3.37 vpr 63.77 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33768 -1 -1 33 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65296 30 32 278 235 1 147 95 17 17 289 -1 unnamed_device 25.2 MiB 0.07 770 16943 5094 9463 2386 63.8 MiB 0.08 0.00 3.22421 -89.153 -3.22421 3.22421 0.69 0.000126403 0.000100664 0.0121221 0.00976244 26 1872 24 6.64007e+06 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release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65384 32 32 353 285 1 181 92 17 17 289 -1 unnamed_device 25.1 MiB 0.11 922 7130 1518 5143 469 63.9 MiB 0.05 0.00 3.83895 -112.69 -3.83895 3.83895 0.72 0.000151811 0.000121941 0.00751496 0.00607942 28 2510 26 6.64007e+06 351624 500653. 1732.36 0.81 0.0358591 0.0299591 21970 115934 -1 2130 20 1343 2426 167988 40150 3.64843 3.64843 -129.143 -3.64843 0 0 612192. 2118.31 0.22 0.04 0.10 -1 -1 0.22 0.0117736 0.0104447 133 48 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_069.v common 5.03 vpr 63.52 MiB -1 -1 0.13 21280 1 0.04 -1 -1 33696 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65040 32 32 276 237 1 159 81 17 17 289 -1 unnamed_device 24.9 MiB 0.21 919 13031 4327 6796 1908 63.5 MiB 0.06 0.00 3.67818 -108.047 -3.67818 3.67818 0.72 0.000141361 0.000110994 0.0111102 0.00880704 32 2014 18 6.64007e+06 213486 554710. 1919.41 2.22 0.0523959 0.0433982 22834 132086 -1 1777 19 924 1304 94335 21871 3.23803 3.23803 -116.206 -3.23803 0 0 701300. 2426.64 0.27 0.03 0.08 -1 -1 0.27 0.00928582 0.00815581 105 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_070.v common 5.12 vpr 63.67 MiB -1 -1 0.15 21432 1 0.03 -1 -1 34056 -1 -1 19 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65196 31 32 319 272 1 168 82 17 17 289 -1 unnamed_device 25.1 MiB 0.23 957 13610 4069 7870 1671 63.7 MiB 0.06 0.00 3.24616 -104.982 -3.24616 3.24616 0.66 0.000134741 0.000107458 0.0120607 0.00976796 32 2142 19 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65392 30 32 317 269 1 152 80 17 17 289 -1 unnamed_device 25.1 MiB 0.13 668 12636 3800 6947 1889 63.9 MiB 0.07 0.00 3.41481 -95.8346 -3.41481 3.41481 0.74 0.000152945 0.00012141 0.0131904 0.0104814 30 1790 21 6.64007e+06 226044 526063. 1820.29 0.71 0.0388931 0.032184 22546 126617 -1 1484 19 1100 1863 104502 25160 2.77957 2.77957 -104.838 -2.77957 0 0 666494. 2306.21 0.26 0.04 0.08 -1 -1 0.26 0.011191 0.00986127 108 58 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_074.v common 3.64 vpr 63.79 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33708 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65320 32 32 335 282 1 184 85 17 17 289 -1 unnamed_device 25.2 MiB 0.20 981 12919 3933 6904 2082 63.8 MiB 0.06 0.00 3.14796 -107.126 -3.14796 3.14796 0.75 0.000210509 0.000180899 0.0118675 0.00952841 32 2428 21 6.64007e+06 263718 554710. 1919.41 0.78 0.0378334 0.0314007 22834 132086 -1 2005 21 1308 1904 147224 32413 3.15283 3.15283 -120.299 -3.15283 0 0 701300. 2426.64 0.27 0.04 0.09 -1 -1 0.27 0.0104191 0.00914581 121 62 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_075.v common 5.00 vpr 63.80 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33768 -1 -1 32 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65336 31 32 293 230 1 175 95 17 17 289 -1 unnamed_device 25.2 MiB 0.04 1041 15215 4241 8980 1994 63.8 MiB 0.15 0.00 3.61447 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64.29 MiB -1 -1 0.13 21736 1 0.03 -1 -1 33776 -1 -1 37 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65832 32 32 387 309 1 190 101 17 17 289 -1 unnamed_device 25.6 MiB 0.11 1169 9736 2099 6826 811 64.3 MiB 0.06 0.00 3.70347 -120.321 -3.70347 3.70347 0.72 0.000178904 0.000145612 0.00900017 0.00741483 26 3183 25 6.64007e+06 464646 477104. 1650.88 1.67 0.0431447 0.036009 21682 110474 -1 2580 20 1616 2923 235930 50291 3.83363 3.83363 -143.081 -3.83363 0 0 585099. 2024.56 0.25 0.07 0.07 -1 -1 0.25 0.0166213 0.0145812 140 62 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_079.v common 3.70 vpr 63.57 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33764 -1 -1 19 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65092 30 32 272 232 1 147 81 17 17 289 -1 unnamed_device 24.8 MiB 0.09 714 14256 4922 6531 2803 63.6 MiB 0.08 0.00 3.00301 -88.4201 -3.00301 3.00301 0.79 0.000122972 9.6491e-05 0.0172971 0.0139183 32 1979 35 6.64007e+06 238602 554710. 1919.41 0.91 0.0464922 0.0383062 22834 132086 -1 1531 20 1032 1752 124213 29823 3.01117 3.01117 -102.831 -3.01117 0 0 701300. 2426.64 0.26 0.03 0.08 -1 -1 0.26 0.0102575 0.00915325 104 29 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_080.v common 5.02 vpr 64.16 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33920 -1 -1 23 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65696 30 32 375 299 1 187 85 17 17 289 -1 unnamed_device 25.5 MiB 0.12 876 7339 1686 4869 784 64.2 MiB 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65712 32 32 365 294 1 185 85 17 17 289 -1 unnamed_device 25.4 MiB 0.10 1084 16267 5233 9181 1853 64.2 MiB 0.09 0.00 3.97286 -116.848 -3.97286 3.97286 0.69 0.000235932 0.000202094 0.0162172 0.0132143 28 2558 21 6.64007e+06 263718 500653. 1732.36 2.18 0.0727097 0.0599872 21970 115934 -1 2305 20 1330 2284 159398 35657 4.07002 4.07002 -139.852 -4.07002 0 0 612192. 2118.31 0.23 0.04 0.07 -1 -1 0.23 0.0110059 0.00973826 134 54 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_085.v common 4.51 vpr 64.21 MiB -1 -1 0.16 21584 1 0.03 -1 -1 33672 -1 -1 31 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65756 29 32 378 310 1 177 92 17 17 289 -1 unnamed_device 25.7 MiB 0.13 883 8786 1993 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x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65052 32 32 269 231 1 170 84 17 17 289 -1 unnamed_device 24.9 MiB 0.20 969 12162 3088 7644 1430 63.5 MiB 0.05 0.00 3.43261 -101.59 -3.43261 3.43261 0.68 0.000126529 0.000101223 0.00969319 0.00788911 26 2164 19 6.64007e+06 251160 477104. 1650.88 0.71 0.0316213 0.0263542 21682 110474 -1 1865 18 1050 1365 92263 21672 3.10363 3.10363 -113.81 -3.10363 0 0 585099. 2024.56 0.22 0.03 0.07 -1 -1 0.22 0.00947286 0.00834182 109 26 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_090.v common 4.64 vpr 63.50 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33756 -1 -1 21 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65028 31 32 245 205 1 150 84 17 17 289 -1 unnamed_device 24.9 MiB 0.05 779 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65484 30 32 316 264 1 162 94 17 17 289 -1 unnamed_device 25.2 MiB 0.12 845 9892 2445 6698 749 63.9 MiB 0.05 0.00 2.7859 -82.4376 -2.7859 2.7859 0.71 0.000136713 0.00010898 0.00791318 0.00641403 30 1927 20 6.64007e+06 401856 526063. 1820.29 2.17 0.0644429 0.0530236 22546 126617 -1 1666 17 1028 1865 94596 22746 2.87917 2.87917 -96.5217 -2.87917 0 0 666494. 2306.21 0.24 0.03 0.08 -1 -1 0.24 0.00905965 0.00807465 121 47 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_095.v common 4.88 vpr 63.43 MiB -1 -1 0.11 21432 1 0.03 -1 -1 34020 -1 -1 21 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64948 27 32 255 219 1 132 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IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65408 32 32 326 263 1 176 94 17 17 289 -1 unnamed_device 25.1 MiB 0.05 963 11596 2816 8061 719 63.9 MiB 0.09 0.00 4.22418 -109.191 -4.22418 4.22418 0.74 0.000146821 0.000115935 0.0138251 0.0106957 26 2640 24 6.64007e+06 376740 477104. 1650.88 2.47 0.0719104 0.0589077 21682 110474 -1 2145 19 1218 1990 147350 35471 3.73963 3.73963 -128.228 -3.73963 0 0 585099. 2024.56 0.22 0.04 0.07 -1 -1 0.22 0.0103759 0.00915113 126 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_100.v common 5.12 vpr 63.82 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33776 -1 -1 34 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65356 31 32 373 294 1 196 97 17 17 289 -1 unnamed_device 25.2 MiB 0.11 1136 15637 4128 9626 1883 63.8 MiB 0.10 0.00 4.08226 -115.714 -4.08226 4.08226 0.72 0.000155651 0.00012519 0.01499 0.0118817 28 2667 25 6.64007e+06 426972 500653. 1732.36 2.40 0.0812944 0.0673362 21970 115934 -1 2148 17 1227 2040 140665 33330 3.88102 3.88102 -129.37 -3.88102 0 0 612192. 2118.31 0.23 0.04 0.09 -1 -1 0.23 0.0117409 0.0105078 145 46 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_101.v common 3.51 vpr 63.72 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33764 -1 -1 31 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65248 30 32 325 268 1 171 93 17 17 289 -1 unnamed_device 25.1 MiB 0.10 1014 10803 2737 6826 1240 63.7 MiB 0.06 0.00 2.8933 -91.5477 -2.8933 2.8933 0.73 0.000139846 0.000111494 0.0105667 0.00882345 32 2319 22 6.64007e+06 389298 554710. 1919.41 0.77 0.0383786 0.0325913 22834 132086 -1 2023 18 1202 2089 143827 32755 2.85197 2.85197 -105.112 -2.85197 0 0 701300. 2426.64 0.31 0.04 0.08 -1 -1 0.31 0.0109527 0.00947892 124 46 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_102.v common 7.34 vpr 64.26 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33712 -1 -1 25 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65804 32 32 350 275 1 214 89 17 17 289 -1 unnamed_device 25.7 MiB 0.25 1144 16325 5691 7973 2661 64.3 MiB 0.09 0.00 4.01133 -128.477 -4.01133 4.01133 0.75 0.000170947 0.000137466 0.0148589 0.0119267 30 3106 20 6.64007e+06 313950 526063. 1820.29 4.38 0.0790408 0.0650584 22546 126617 -1 2431 24 1763 2793 213368 45422 4.18408 4.18408 -144.561 -4.18408 0 0 666494. 2306.21 0.25 0.05 0.08 -1 -1 0.25 0.0131577 0.0116655 148 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_103.v common 3.50 vpr 64.29 MiB -1 -1 0.14 21432 1 0.05 -1 -1 33732 -1 -1 36 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65832 32 32 386 307 1 195 100 17 17 289 -1 unnamed_device 25.5 MiB 0.13 1184 15180 4099 9782 1299 64.3 MiB 0.09 0.00 3.95787 -124.991 -3.95787 3.95787 0.73 0.000160064 0.000127682 0.0130582 0.010704 26 2640 22 6.64007e+06 452088 477104. 1650.88 0.79 0.0466786 0.0388664 21682 110474 -1 2307 17 1274 1989 131258 30338 3.62142 3.62142 -132.604 -3.62142 0 0 585099. 2024.56 0.22 0.04 0.07 -1 -1 0.22 0.0132545 0.0118428 144 59 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_104.v common 3.34 vpr 63.46 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33512 -1 -1 17 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64980 29 32 269 229 1 129 78 17 17 289 -1 unnamed_device 25.0 MiB 0.07 664 11532 3302 7592 638 63.5 MiB 0.05 0.00 3.00701 -88.7075 -3.00701 3.00701 0.70 0.000199253 0.000173171 0.0108855 0.00884026 32 1467 21 6.64007e+06 213486 554710. 1919.41 0.70 0.0345355 0.0288628 22834 132086 -1 1288 18 846 1211 87973 20949 2.80197 2.80197 -99.5847 -2.80197 0 0 701300. 2426.64 0.29 0.03 0.08 -1 -1 0.29 0.00834881 0.00734016 91 28 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_105.v common 3.61 vpr 63.66 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33936 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65184 32 32 310 266 1 175 85 17 17 289 -1 unnamed_device 24.9 MiB 0.17 909 13105 3426 8541 1138 63.7 MiB 0.08 0.00 3.19816 -105.52 -3.19816 3.19816 0.78 0.000137784 0.000108727 0.0150565 0.0123791 32 2025 25 6.64007e+06 263718 554710. 1919.41 0.78 0.051002 0.0425292 22834 132086 -1 1789 23 1557 2112 164419 38127 3.39323 3.39323 -118.635 -3.39323 0 0 701300. 2426.64 0.26 0.04 0.10 -1 -1 0.26 0.0102665 0.00895707 117 55 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_106.v common 5.01 vpr 63.90 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33788 -1 -1 37 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65432 31 32 326 261 1 177 100 17 17 289 -1 unnamed_device 25.2 MiB 0.08 972 17036 4969 9266 2801 63.9 MiB 0.08 0.00 3.82167 -105.378 -3.82167 3.82167 0.72 0.000144638 0.000114125 0.0140502 0.0114411 30 2119 23 6.64007e+06 464646 526063. 1820.29 2.29 0.0786546 0.0649775 22546 126617 -1 1797 22 1146 2238 127789 29352 3.44123 3.44123 -115.969 -3.44123 0 0 666494. 2306.21 0.24 0.03 0.07 -1 -1 0.24 0.0106475 0.00937189 129 29 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_107.v common 4.96 vpr 63.50 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33736 -1 -1 22 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65028 29 32 262 224 1 168 83 17 17 289 -1 unnamed_device 24.9 MiB 0.23 830 13943 4457 7093 2393 63.5 MiB 0.06 0.00 3.59047 -99.4875 -3.59047 3.59047 0.72 0.000120277 9.5045e-05 0.0110266 0.0087931 30 1773 19 6.64007e+06 276276 526063. 1820.29 2.17 0.0628847 0.0513864 22546 126617 -1 1546 19 851 1062 61253 14853 3.11463 3.11463 -106.014 -3.11463 0 0 666494. 2306.21 0.26 0.02 0.08 -1 -1 0.26 0.00820561 0.00717181 109 25 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_108.v common 3.40 vpr 63.43 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33568 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64952 32 32 278 238 1 149 81 17 17 289 -1 unnamed_device 24.9 MiB 0.13 865 9531 2537 6462 532 63.4 MiB 0.05 0.00 3.14521 -100.65 -3.14521 3.14521 0.74 0.000182137 0.000143398 0.00975171 0.00789442 30 1899 21 6.64007e+06 213486 526063. 1820.29 0.70 0.0329657 0.0273493 22546 126617 -1 1676 22 1111 1859 103340 24161 2.90177 2.90177 -109.503 -2.90177 0 0 666494. 2306.21 0.25 0.03 0.08 -1 -1 0.25 0.0102552 0.00902686 108 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_109.v common 4.85 vpr 64.06 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33696 -1 -1 36 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65600 31 32 373 300 1 181 99 17 17 289 -1 unnamed_device 25.4 MiB 0.10 970 9675 2067 6869 739 64.1 MiB 0.05 0.00 3.36461 -100.27 -3.36461 3.36461 0.70 0.000227939 0.000124645 0.00923432 0.00762817 30 1964 19 6.64007e+06 452088 526063. 1820.29 2.17 0.0759482 0.0627834 22546 126617 -1 1725 21 1209 1927 100558 23725 3.06357 3.06357 -109.731 -3.06357 0 0 666494. 2306.21 0.27 0.03 0.09 -1 -1 0.27 0.0112568 0.00984443 136 60 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_110.v common 3.22 vpr 63.50 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33740 -1 -1 20 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65020 31 32 265 230 1 162 83 17 17 289 -1 unnamed_device 24.8 MiB 0.17 925 11063 2977 6802 1284 63.5 MiB 0.07 0.00 3.15716 -100.02 -3.15716 3.15716 0.71 0.000152948 0.000120838 0.0135846 0.0112692 28 2025 19 6.64007e+06 251160 500653. 1732.36 0.63 0.0347183 0.0291493 21970 115934 -1 1806 19 909 1323 92799 20889 2.90743 2.90743 -110.929 -2.90743 0 0 612192. 2118.31 0.22 0.03 0.07 -1 -1 0.22 0.00917081 0.00821706 107 30 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_111.v common 4.85 vpr 63.79 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33692 -1 -1 32 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65316 32 32 349 286 1 171 96 17 17 289 -1 unnamed_device 25.2 MiB 0.11 946 13893 4464 7218 2211 63.8 MiB 0.07 0.00 2.90281 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3.45123 3.45123 -132.718 -3.45123 0 0 585099. 2024.56 0.21 0.04 0.07 -1 -1 0.21 0.0121869 0.0107228 138 87 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_113.v common 4.52 vpr 63.81 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33436 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65344 32 32 303 262 1 150 81 17 17 289 -1 unnamed_device 25.1 MiB 0.14 813 8656 2351 5784 521 63.8 MiB 0.04 0.00 2.6639 -86.6835 -2.6639 2.6639 0.65 0.000226545 0.000198023 0.00868084 0.00699884 28 1936 21 6.64007e+06 213486 500653. 1732.36 2.02 0.049127 0.0405085 21970 115934 -1 1720 18 977 1500 98978 23272 2.62957 2.62957 -102.254 -2.62957 0 0 612192. 2118.31 0.22 0.03 0.08 -1 -1 0.22 0.00911027 0.00774637 104 54 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_114.v common 4.79 vpr 63.77 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33524 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65296 32 32 290 244 1 175 85 17 17 289 -1 unnamed_device 25.1 MiB 0.20 969 8641 2079 5844 718 63.8 MiB 0.05 0.00 3.43507 -111.748 -3.43507 3.43507 0.69 0.000127626 0.000101718 0.0081399 0.00653258 32 2189 20 6.64007e+06 263718 554710. 1919.41 2.14 0.064431 0.0533001 22834 132086 -1 1941 21 1230 1834 129484 29689 3.07943 3.07943 -119.243 -3.07943 0 0 701300. 2426.64 0.25 0.04 0.08 -1 -1 0.25 0.00998054 0.00875506 117 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_115.v common 4.74 vpr 63.87 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33844 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65404 32 32 318 257 1 194 87 17 17 289 -1 unnamed_device 25.2 MiB 0.17 1011 6615 1544 4743 328 63.9 MiB 0.04 0.00 3.96907 -118.151 -3.96907 3.96907 0.70 0.000139889 0.000112277 0.00675671 0.00558116 32 2472 20 6.64007e+06 288834 554710. 1919.41 2.10 0.0661433 0.0549266 22834 132086 -1 2116 20 1545 2067 148870 35681 3.84383 3.84383 -131.908 -3.84383 0 0 701300. 2426.64 0.24 0.04 0.09 -1 -1 0.24 0.0103849 0.00924591 130 27 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_116.v common 4.55 vpr 63.70 MiB -1 -1 0.14 21432 1 0.04 -1 -1 33856 -1 -1 29 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65224 29 32 324 268 1 168 90 17 17 289 -1 unnamed_device 25.1 MiB 0.13 971 12150 3717 7363 1070 63.7 MiB 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65452 32 32 376 318 1 155 81 17 17 289 -1 unnamed_device 25.2 MiB 0.20 788 12856 5002 6302 1552 63.9 MiB 0.06 0.00 2.8021 -100.155 -2.8021 2.8021 0.71 0.000151067 0.000119157 0.0136375 0.0110259 32 1889 19 6.64007e+06 213486 554710. 1919.41 0.73 0.04095 0.0341493 22834 132086 -1 1638 20 1425 2086 148262 33126 2.87377 2.87377 -120.273 -2.87377 0 0 701300. 2426.64 0.26 0.04 0.10 -1 -1 0.26 0.010654 0.00938163 114 93 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_121.v common 4.45 vpr 64.16 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33816 -1 -1 32 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65696 32 32 360 293 1 179 96 17 17 289 -1 unnamed_device 25.4 MiB 0.11 921 10827 2741 7146 940 64.2 MiB 0.06 0.00 3.56627 -108.257 -3.56627 3.56627 0.70 0.00015636 0.000122501 0.00926127 0.00750117 26 2236 19 6.64007e+06 401856 477104. 1650.88 1.83 0.057363 0.0475392 21682 110474 -1 1899 19 850 1337 80212 20285 3.19363 3.19363 -117.536 -3.19363 0 0 585099. 2024.56 0.21 0.03 0.07 -1 -1 0.21 0.0105559 0.0092006 131 57 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_122.v common 7.76 vpr 63.93 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33808 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65460 32 32 396 299 1 236 91 17 17 289 -1 unnamed_device 25.8 MiB 0.28 1382 16819 4789 9831 2199 63.9 MiB 0.11 0.00 5.03429 -155.875 -5.03429 5.03429 0.71 0.00021053 0.000141048 0.0176906 0.0143144 26 3719 46 6.64007e+06 339066 477104. 1650.88 4.84 0.0887098 0.073586 21682 110474 -1 2970 23 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65192 32 32 296 247 1 157 85 17 17 289 -1 unnamed_device 25.1 MiB 0.07 882 9943 2584 6850 509 63.7 MiB 0.06 0.00 2.7449 -92.9842 -2.7449 2.7449 0.72 0.000125498 9.9414e-05 0.0121434 0.009978 32 2053 23 6.64007e+06 263718 554710. 1919.41 0.71 0.0363653 0.0301816 22834 132086 -1 1922 20 1255 2259 172212 37757 2.90897 2.90897 -110.808 -2.90897 0 0 701300. 2426.64 0.25 0.05 0.08 -1 -1 0.25 0.0112052 0.00985236 115 31 -1 -1 -1 -1 +fixed_k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml mult_126.v common 3.52 vpr 63.14 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33648 -1 -1 27 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64652 25 32 216 194 1 122 84 17 17 289 -1 unnamed_device 24.6 MiB 0.03 481 9600 3305 4071 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release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65620 30 32 363 293 1 196 86 17 17 289 -1 unnamed_device 25.5 MiB 0.33 931 5378 1039 4156 183 64.1 MiB 0.04 0.00 3.89635 -113.563 -3.89635 3.89635 0.74 0.000149292 0.000119078 0.00712823 0.00565663 32 2412 24 6.65987e+06 304272 554710. 1919.41 0.72 0.0374556 0.0312274 22834 132086 -1 2115 22 1729 2602 172483 42056 4.23383 4.23383 -141.209 -4.23383 0 0 701300. 2426.64 0.25 0.05 0.09 -1 -1 0.25 0.0141965 0.0124092 140 58 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_003.v common 5.16 vpr 63.71 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33728 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65244 32 32 299 247 1 188 87 17 17 289 -1 unnamed_device 25.2 MiB 0.10 1036 15063 5050 7878 2135 63.7 MiB 0.07 0.00 3.21404 -97.3517 -3.21404 3.21404 0.70 0.000131341 0.000104637 0.0131384 0.0106116 30 2210 21 6.65987e+06 291594 526063. 1820.29 2.49 0.0740958 0.0613882 22546 126617 -1 1985 20 1032 1403 89984 20892 3.29691 3.29691 -115.002 -3.29691 0 0 666494. 2306.21 0.27 0.03 0.09 -1 -1 0.27 0.00990343 0.00884136 126 26 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_004.v common 4.93 vpr 63.79 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33820 -1 -1 27 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65316 29 32 308 248 1 169 88 17 17 289 -1 unnamed_device 25.1 MiB 0.08 874 9253 2472 6104 677 63.8 MiB 0.05 0.00 3.43715 -92.1189 -3.43715 3.43715 0.80 0.000134698 0.000107428 0.00907903 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0.05 0.11 -1 -1 0.27 0.012742 0.0112402 130 31 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_006.v common 3.44 vpr 63.74 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33544 -1 -1 33 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65272 32 32 366 295 1 189 97 17 17 289 -1 unnamed_device 25.1 MiB 0.17 1085 10309 2638 6667 1004 63.7 MiB 0.06 0.00 2.69784 -98.1889 -2.69784 2.69784 0.71 0.000193817 0.000153316 0.00921322 0.00759146 32 2395 23 6.65987e+06 418374 554710. 1919.41 0.68 0.0386776 0.0325217 22834 132086 -1 2096 19 1324 2129 142779 33122 2.85491 2.85491 -113.91 -2.85491 0 0 701300. 2426.64 0.28 0.03 0.10 -1 -1 0.28 0.0109509 0.00974428 141 55 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_007.v common 4.42 vpr 63.43 MiB -1 -1 0.12 21280 1 0.03 -1 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65168 32 32 344 272 1 202 88 17 17 289 -1 unnamed_device 25.2 MiB 0.19 1147 11593 3482 7355 756 63.6 MiB 0.07 0.00 3.37501 -114.875 -3.37501 3.37501 0.69 0.000148595 0.000119581 0.010962 0.00898171 28 2844 39 6.65987e+06 304272 500653. 1732.36 3.22 0.070083 0.0581484 21970 115934 -1 2537 20 1591 2344 208379 44880 3.41479 3.41479 -133.036 -3.41479 0 0 612192. 2118.31 0.22 0.05 0.07 -1 -1 0.22 0.0128895 0.0113797 139 31 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_014.v common 4.84 vpr 63.79 MiB -1 -1 0.15 21432 1 0.03 -1 -1 33824 -1 -1 30 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65324 32 32 363 295 1 181 94 17 17 289 -1 unnamed_device 25.2 MiB 0.15 958 11596 2788 8210 598 63.8 MiB 0.06 0.00 3.64209 -106.61 -3.64209 3.64209 0.70 0.000152401 0.000122358 0.0108647 0.00873971 26 2432 24 6.65987e+06 380340 477104. 1650.88 2.17 0.0613604 0.0506142 21682 110474 -1 2145 24 1649 2722 197024 45768 3.77271 3.77271 -129.255 -3.77271 0 0 585099. 2024.56 0.21 0.05 0.07 -1 -1 0.21 0.0134364 0.0118023 133 58 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_015.v common 4.28 vpr 63.27 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33444 -1 -1 21 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64784 29 32 248 215 1 137 82 17 17 289 -1 unnamed_device 24.6 MiB 0.11 661 9338 2597 5785 956 63.3 MiB 0.04 0.00 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33692 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64952 32 32 285 227 1 165 85 17 17 289 -1 unnamed_device 24.8 MiB 0.08 894 9013 2200 6338 475 63.4 MiB 0.05 0.00 3.9418 -99.1688 -3.9418 3.9418 0.73 0.000132883 0.000106534 0.00904925 0.00722494 32 2180 25 6.65987e+06 266238 554710. 1919.41 0.73 0.0383788 0.0323063 22834 132086 -1 1883 24 1110 2188 150953 35897 3.90997 3.90997 -120.991 -3.90997 0 0 701300. 2426.64 0.21 0.06 0.09 -1 -1 0.21 0.0141899 0.0121805 118 -1 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_025.v common 4.86 vpr 62.88 MiB -1 -1 0.19 20976 1 0.03 -1 -1 33624 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64892 30 32 262 227 1 135 85 17 17 289 -1 unnamed_device 24.6 MiB 0.10 751 11059 2845 7427 787 63.4 MiB 0.05 0.00 2.39767 -79.469 -2.39767 2.39767 0.73 0.000111343 8.7285e-05 0.00914551 0.00725998 32 1698 21 6.65987e+06 291594 554710. 1919.41 2.19 0.0614314 0.0508437 22834 132086 -1 1513 20 936 1476 104146 24032 2.66751 2.66751 -93.5954 -2.66751 0 0 701300. 2426.64 0.27 0.03 0.09 -1 -1 0.27 0.00931181 0.00815014 97 29 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_031.v common 5.08 vpr 63.38 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33588 -1 -1 23 28 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64900 28 32 260 223 1 140 83 17 17 289 -1 unnamed_device 24.6 MiB 0.04 767 14303 3893 9125 1285 63.4 MiB 0.06 0.00 2.60164 -78.0313 -2.60164 2.60164 0.72 0.000111566 8.8327e-05 0.0115434 0.00911813 34 1704 25 6.65987e+06 291594 585099. 2024.56 2.48 0.0570021 0.046619 23122 138558 -1 1532 22 849 1514 105350 24218 2.52551 2.52551 -91.3305 -2.52551 0 0 742403. 2568.87 0.28 0.03 0.09 -1 -1 0.28 0.009804 0.00865932 98 27 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_032.v common 4.87 vpr 63.23 MiB -1 -1 0.14 21280 1 0.03 -1 -1 33572 -1 -1 19 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64752 32 32 253 210 1 154 83 17 17 289 -1 unnamed_device 24.8 MiB 0.09 934 13403 3737 7688 1978 63.2 MiB 0.06 0.00 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65392 32 32 391 311 1 192 100 17 17 289 -1 unnamed_device 25.2 MiB 0.24 894 17268 4994 9514 2760 63.9 MiB 0.09 0.00 3.11415 -103.39 -3.11415 3.11415 0.72 0.000176408 0.000142888 0.0144625 0.0117081 32 2369 21 6.65987e+06 456408 554710. 1919.41 2.24 0.0869065 0.0719322 22834 132086 -1 1902 21 1692 2661 168526 41187 2.91291 2.91291 -112.67 -2.91291 0 0 701300. 2426.64 0.26 0.04 0.08 -1 -1 0.26 0.0125592 0.011042 146 62 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_037.v common 4.85 vpr 63.54 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33588 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65064 31 32 279 237 1 161 80 17 17 289 -1 unnamed_device 24.9 MiB 0.24 905 10744 2800 6964 980 63.5 MiB 0.05 0.00 3.23875 -99.8649 -3.23875 3.23875 0.70 0.000218738 0.00011894 0.0100528 0.00821619 32 2166 27 6.65987e+06 215526 554710. 1919.41 2.13 0.0654352 0.0535277 22834 132086 -1 1909 19 1201 1694 137215 31038 3.02911 3.02911 -112.969 -3.02911 0 0 701300. 2426.64 0.24 0.03 0.08 -1 -1 0.24 0.00898852 0.00800771 109 30 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_038.v common 4.95 vpr 64.01 MiB -1 -1 0.14 21280 1 0.03 -1 -1 33924 -1 -1 24 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65548 31 32 370 297 1 186 87 17 17 289 -1 unnamed_device 25.4 MiB 0.23 1073 15831 4774 8867 2190 64.0 MiB 0.08 0.00 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release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65392 32 32 331 280 1 175 82 17 17 289 -1 unnamed_device 25.2 MiB 0.91 891 12542 3577 7072 1893 63.9 MiB 0.09 0.00 3.4165 -105.968 -3.4165 3.4165 0.71 0.000196875 0.000156798 0.0165702 0.0131935 28 2414 24 6.65987e+06 228204 500653. 1732.36 2.35 0.0811626 0.0666444 21970 115934 -1 1945 21 1301 1870 141075 33238 3.70277 3.70277 -134.104 -3.70277 0 0 612192. 2118.31 0.25 0.04 0.08 -1 -1 0.25 0.0114409 0.0100958 126 62 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_099.v common 5.17 vpr 63.77 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33476 -1 -1 30 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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0.0132909 26 2608 24 6.65987e+06 418374 477104. 1650.88 0.97 0.0504495 0.0420934 21682 110474 -1 2143 19 1179 1961 129888 31398 3.57136 3.57136 -125.763 -3.57136 0 0 585099. 2024.56 0.20 0.06 0.07 -1 -1 0.20 0.0173517 0.0150639 144 46 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_101.v common 5.60 vpr 63.57 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33900 -1 -1 31 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65096 30 32 325 268 1 171 93 17 17 289 -1 unnamed_device 25.1 MiB 0.13 850 9123 1878 6847 398 63.6 MiB 0.05 0.00 2.8933 -86.9801 -2.8933 2.8933 0.75 0.000139365 0.000111194 0.00852606 0.0070428 30 2121 25 6.65987e+06 393018 526063. 1820.29 2.86 0.0585952 0.0483533 22546 126617 -1 1701 20 919 1638 105431 24890 2.69651 2.69651 -97.1709 -2.69651 0 0 666494. 2306.21 0.24 0.03 0.08 -1 -1 0.24 0.0104761 0.00909888 124 46 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_102.v common 5.38 vpr 63.99 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33684 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65528 32 32 350 275 1 214 88 17 17 289 -1 unnamed_device 25.5 MiB 0.13 1210 9838 2542 6744 552 64.0 MiB 0.06 0.00 3.7303 -121.602 -3.7303 3.7303 0.75 0.000149942 0.000120747 0.00953484 0.00784243 30 2826 23 6.65987e+06 304272 526063. 1820.29 2.61 0.0661903 0.0549682 22546 126617 -1 2272 22 1715 2600 157577 36251 3.93637 3.93637 -140.71 -3.93637 0 0 666494. 2306.21 0.25 0.06 0.08 -1 -1 0.25 0.0157866 0.0140003 147 31 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_103.v common 5.29 vpr 64.00 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33832 -1 -1 34 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65536 32 32 386 307 1 195 98 17 17 289 -1 unnamed_device 25.5 MiB 0.36 1002 13598 4046 8384 1168 64.0 MiB 0.08 0.00 3.63475 -110.525 -3.63475 3.63475 0.76 0.000156754 0.000126083 0.0124895 0.010347 32 2103 20 6.65987e+06 431052 554710. 1919.41 2.26 0.0844007 0.0699784 22834 132086 -1 1951 18 1083 1692 103928 26627 3.50017 3.50017 -128.103 -3.50017 0 0 701300. 2426.64 0.25 0.04 0.09 -1 -1 0.25 0.0153029 0.0136049 143 59 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_104.v common 4.47 vpr 63.37 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33836 -1 -1 17 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64888 29 32 269 229 1 129 78 17 17 289 -1 unnamed_device 24.8 MiB 0.12 574 12528 3684 6936 1908 63.4 MiB 0.05 0.00 3.00701 -86.843 -3.00701 3.00701 0.77 0.000115259 9.0843e-05 0.011112 0.00901967 28 1357 28 6.65987e+06 215526 500653. 1732.36 1.79 0.0686887 0.0569211 21970 115934 -1 1077 22 875 1296 76900 20616 2.74357 2.74357 -90.1708 -2.74357 0 0 612192. 2118.31 0.23 0.03 0.07 -1 -1 0.23 0.0110995 0.00989671 92 28 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_105.v common 3.45 vpr 63.80 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33928 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65332 32 32 310 266 1 175 84 17 17 289 -1 unnamed_device 25.1 MiB 0.25 968 13992 4481 7838 1673 63.8 MiB 0.07 0.00 3.0769 -103.381 -3.0769 3.0769 0.71 0.000127674 9.984e-05 0.0136352 0.0108619 30 1947 18 6.65987e+06 253560 526063. 1820.29 0.68 0.0381264 0.0316295 22546 126617 -1 1753 20 1131 1521 86058 20430 2.88317 2.88317 -111.852 -2.88317 0 0 666494. 2306.21 0.25 0.03 0.07 -1 -1 0.25 0.010388 0.00925322 116 55 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_106.v common 5.08 vpr 63.95 MiB -1 -1 0.14 21432 1 0.03 -1 -1 34008 -1 -1 37 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65480 31 32 326 261 1 177 100 17 17 289 -1 unnamed_device 25.2 MiB 0.08 988 17036 5204 9065 2767 63.9 MiB 0.08 0.00 3.56815 -98.194 -3.56815 3.56815 0.70 0.000148129 0.000117463 0.0125039 0.010124 28 2356 33 6.65987e+06 469086 500653. 1732.36 2.43 0.0759138 0.0618952 21970 115934 -1 1982 22 1371 2484 173575 40488 3.57631 3.57631 -118.551 -3.57631 0 0 612192. 2118.31 0.23 0.04 0.07 -1 -1 0.23 0.0120528 0.0106816 129 29 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_107.v common 4.90 vpr 63.36 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33888 -1 -1 21 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64876 29 32 262 224 1 168 82 17 17 289 -1 unnamed_device 24.8 MiB 0.19 952 8270 2083 5463 724 63.4 MiB 0.04 0.00 3.18595 -91.5029 -3.18595 3.18595 0.75 0.000128761 0.000103553 0.00739687 0.00597485 28 2028 19 6.65987e+06 266238 500653. 1732.36 2.15 0.0496904 0.0407974 21970 115934 -1 1748 18 961 1282 88381 20920 3.04851 3.04851 -104.244 -3.04851 0 0 612192. 2118.31 0.25 0.04 0.08 -1 -1 0.25 0.0122002 0.010406 110 25 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_108.v common 4.76 vpr 63.43 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33700 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64948 32 32 278 238 1 149 80 17 17 289 -1 unnamed_device 24.8 MiB 0.20 844 9196 2469 6261 466 63.4 MiB 0.05 0.00 2.90269 -93.9919 -2.90269 2.90269 0.74 0.000122416 9.6875e-05 0.0111338 0.00902738 28 1913 22 6.65987e+06 202848 500653. 1732.36 2.03 0.0622502 0.0513695 21970 115934 -1 1761 22 1291 2216 166395 37986 2.84197 2.84197 -107.193 -2.84197 0 0 612192. 2118.31 0.22 0.04 0.07 -1 -1 0.22 0.00974293 0.00846095 109 31 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_109.v common 5.14 vpr 63.92 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33424 -1 -1 35 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65452 31 32 373 300 1 181 98 17 17 289 -1 unnamed_device 25.2 MiB 0.22 794 15848 4761 7699 3388 63.9 MiB 0.07 0.00 3.14515 -92.0286 -3.14515 3.14515 0.72 0.000150072 0.000119506 0.0138414 0.011297 32 2265 27 6.65987e+06 443730 554710. 1919.41 2.33 0.075939 0.062278 22834 132086 -1 1660 18 1416 2081 136989 36202 3.19631 3.19631 -107.365 -3.19631 0 0 701300. 2426.64 0.26 0.03 0.08 -1 -1 0.26 0.0111201 0.00998941 135 60 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_110.v common 3.23 vpr 63.49 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33580 -1 -1 19 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65016 31 32 265 230 1 162 82 17 17 289 -1 unnamed_device 24.9 MiB 0.14 689 5600 1045 3807 748 63.5 MiB 0.03 0.00 3.0359 -91.5312 -3.0359 3.0359 0.69 0.000211828 0.00018461 0.00538721 0.00446024 32 1980 21 6.65987e+06 240882 554710. 1919.41 0.67 0.0275671 0.023191 22834 132086 -1 1558 20 1082 1558 94153 26396 3.19797 3.19797 -112.808 -3.19797 0 0 701300. 2426.64 0.25 0.03 0.09 -1 -1 0.25 0.00900044 0.00802215 108 30 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_111.v common 3.90 vpr 63.67 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33824 -1 -1 31 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65196 32 32 349 286 1 171 95 17 17 289 -1 unnamed_device 25.1 MiB 0.23 911 9167 1987 6560 620 63.7 MiB 0.06 0.00 2.82075 -90.0789 -2.82075 2.82075 0.69 0.000169053 0.00013931 0.00927077 0.00746295 26 2543 26 6.65987e+06 393018 477104. 1650.88 1.24 0.0396538 0.0329417 21682 110474 -1 2051 20 1274 2212 166713 38280 2.67851 2.67851 -107.02 -2.67851 0 0 585099. 2024.56 0.21 0.04 0.06 -1 -1 0.21 0.0108782 0.00952203 126 54 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_112.v common 5.49 vpr 63.99 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33732 -1 -1 32 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65528 31 32 396 325 1 183 95 17 17 289 -1 unnamed_device 25.4 MiB 0.80 920 11759 2810 8075 874 64.0 MiB 0.06 0.00 3.50555 -110.443 -3.50555 3.50555 0.68 0.000154991 0.000124154 0.0114579 0.00946477 32 2166 19 6.65987e+06 405696 554710. 1919.41 2.16 0.0740872 0.061604 22834 132086 -1 1875 21 1333 1883 127264 30507 3.33103 3.33103 -128.514 -3.33103 0 0 701300. 2426.64 0.24 0.03 0.08 -1 -1 0.24 0.0119533 0.0105889 138 87 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_113.v common 4.78 vpr 63.55 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33572 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65076 32 32 303 262 1 150 81 17 17 289 -1 unnamed_device 24.8 MiB 0.23 802 9006 2295 6347 364 63.6 MiB 0.05 0.00 2.54264 -83.0542 -2.54264 2.54264 0.70 0.000180531 0.000151528 0.00885674 0.00720422 28 2001 21 6.65987e+06 215526 500653. 1732.36 2.10 0.0662627 0.0544986 21970 115934 -1 1776 19 1012 1581 118388 27704 2.75471 2.75471 -101.683 -2.75471 0 0 612192. 2118.31 0.22 0.03 0.07 -1 -1 0.22 0.00933632 0.00818323 104 54 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_114.v common 4.46 vpr 63.62 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33512 -1 -1 19 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65144 32 32 290 244 1 175 83 17 17 289 -1 unnamed_device 24.9 MiB 0.13 849 9803 2572 6355 876 63.6 MiB 0.06 0.00 3.35195 -105.137 -3.35195 3.35195 0.69 0.000140663 0.00011175 0.00954883 0.0078388 30 1951 19 6.65987e+06 240882 526063. 1820.29 1.89 0.0538403 0.044566 22546 126617 -1 1697 18 965 1369 90314 21168 2.92911 2.92911 -112.999 -2.92911 0 0 666494. 2306.21 0.24 0.03 0.08 -1 -1 0.24 0.00886903 0.00791761 115 31 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_115.v common 4.86 vpr 63.89 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33700 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65428 32 32 318 257 1 194 86 17 17 289 -1 unnamed_device 25.2 MiB 0.10 1079 14639 4305 8020 2314 63.9 MiB 0.07 0.00 3.7011 -115.159 -3.7011 3.7011 0.70 0.000158921 0.000129534 0.0133199 0.0107441 28 2480 21 6.65987e+06 278916 500653. 1732.36 2.27 0.0733803 0.0608042 21970 115934 -1 2235 19 1413 2007 140927 32808 3.78071 3.78071 -129.474 -3.78071 0 0 612192. 2118.31 0.22 0.04 0.07 -1 -1 0.22 0.0123133 0.0110019 130 27 -1 -1 -1 -1 +fixed_k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml mult_116.v common 6.50 vpr 63.70 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33732 -1 -1 28 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65228 29 32 324 268 1 168 89 17 17 289 -1 unnamed_device 25.2 MiB 0.46 809 9197 2452 6183 562 63.7 MiB 0.05 0.00 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66120 31 32 352 285 1 177 85 17 17 289 -1 unnamed_device 25.9 MiB 1.05 791 15337 6504 8368 465 64.6 MiB 0.08 0.00 3.35282 -108.989 -3.35282 3.35282 0.76 0.000139316 0.00010907 0.0179079 0.0145836 42 2639 50 6.95648e+06 318465 744469. 2576.02 13.72 0.121324 0.0997494 27202 183097 -1 2012 19 1396 2120 212029 51725 3.93206 3.93206 -134.803 -3.93206 0 0 949917. 3286.91 0.33 0.05 0.13 -1 -1 0.33 0.0112597 0.0099982 78 51 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_042.v common 11.96 vpr 64.34 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33876 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65884 32 32 291 242 1 173 78 17 17 289 -1 unnamed_device 25.6 MiB 1.19 858 11034 4585 6057 392 64.3 MiB 0.04 0.00 3.28368 -95.1541 -3.28368 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66404 32 32 382 305 1 184 90 17 17 289 -1 unnamed_device 26.2 MiB 0.81 891 16170 6886 8870 414 64.8 MiB 0.07 0.00 3.54708 -114.324 -3.54708 3.54708 0.73 0.000154623 0.000123795 0.0150884 0.0121171 44 2904 49 6.95648e+06 376368 787024. 2723.27 4.62 0.100195 0.0820723 27778 195446 -1 2085 21 1520 2221 206607 44663 3.73146 3.73146 -137.786 -3.73146 0 0 997811. 3452.63 0.33 0.05 0.12 -1 -1 0.33 0.01269 0.0112136 83 59 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_051.v common 10.85 vpr 64.54 MiB -1 -1 0.12 21280 1 0.04 -1 -1 33824 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65572 32 32 251 219 1 136 82 17 17 289 -1 unnamed_device 25.5 MiB 0.22 626 12364 5189 6846 329 64.0 MiB 0.05 0.00 2.50468 -77.7236 -2.50468 2.50468 0.71 0.000109315 8.5045e-05 0.0106949 0.00872417 38 1811 27 6.95648e+06 260562 678818. 2348.85 1.64 0.0411269 0.0335558 26626 170182 -1 1485 22 1059 1623 132112 28044 3.32957 3.32957 -104.067 -3.32957 0 0 902133. 3121.57 0.29 0.04 0.10 -1 -1 0.29 0.00975135 0.00849502 57 20 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_056.v common 9.60 vpr 64.53 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33756 -1 -1 12 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66080 32 32 341 285 1 181 76 17 17 289 -1 unnamed_device 25.8 MiB 1.38 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65584 32 32 247 207 1 142 78 17 17 289 -1 unnamed_device 25.3 MiB 1.09 578 11200 3451 5449 2300 64.0 MiB 0.04 0.00 2.4781 -80.7591 -2.4781 2.4781 0.73 0.000184853 0.000159331 0.00956656 0.00769768 40 1455 28 6.95648e+06 202660 706193. 2443.58 3.43 0.0712036 0.0583829 26914 176310 -1 1290 21 1131 1605 117637 27445 3.11017 3.11017 -106.504 -3.11017 0 0 926341. 3205.33 0.36 0.04 0.11 -1 -1 0.36 0.0103411 0.00886601 57 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_065.v common 5.32 vpr 64.16 MiB -1 -1 0.13 21128 1 0.03 -1 -1 33768 -1 -1 17 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65704 30 32 278 235 1 144 79 17 17 289 -1 unnamed_device 25.5 MiB 0.91 561 9712 3991 5340 381 64.2 MiB 0.04 0.00 2.93563 -88.1206 -2.93563 2.93563 0.73 0.000141708 0.000115192 0.00863089 0.00699479 38 1968 29 6.95648e+06 246087 678818. 2348.85 1.68 0.046015 0.0377431 26626 170182 -1 1506 23 1142 1716 137100 30227 3.15897 3.15897 -107.958 -3.15897 0 0 902133. 3121.57 0.30 0.04 0.13 -1 -1 0.30 0.00990492 0.00869668 60 29 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_066.v common 6.07 vpr 64.47 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33808 -1 -1 16 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66020 29 32 355 287 1 186 77 17 17 289 -1 unnamed_device 25.9 MiB 1.44 1083 9857 3738 4490 1629 64.5 MiB 0.04 0.00 3.18532 -104.848 -3.18532 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65716 32 32 276 237 1 155 74 17 17 289 -1 unnamed_device 25.6 MiB 2.87 785 12164 5392 6488 284 64.2 MiB 0.04 0.00 3.30448 -107.452 -3.30448 3.30448 0.70 0.000114108 8.9429e-05 0.0115841 0.00938253 48 1862 45 6.95648e+06 144757 865456. 2994.66 2.26 0.0550654 0.0455721 28354 207349 -1 1647 26 1251 1602 366182 185339 3.73152 3.73152 -129.602 -3.73152 0 0 1.05005e+06 3633.38 0.34 0.09 0.12 -1 -1 0.34 0.0105311 0.00916276 61 31 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_070.v common 7.78 vpr 64.23 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33516 -1 -1 12 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65776 31 32 319 272 1 165 75 17 17 289 -1 unnamed_device 25.6 MiB 1.85 656 11925 5029 6519 377 64.2 MiB 0.04 0.00 3.15532 -99.747 -3.15532 3.15532 0.70 0.000122992 9.6023e-05 0.0116905 0.00933883 44 1952 21 6.95648e+06 173708 787024. 2723.27 3.30 0.0798364 0.0653144 27778 195446 -1 1440 23 1221 1779 134606 29417 3.30686 3.30686 -118.169 -3.30686 0 0 997811. 3452.63 0.34 0.03 0.12 -1 -1 0.34 0.0111651 0.00990183 68 60 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_071.v common 5.84 vpr 64.44 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33824 -1 -1 22 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65984 30 32 329 273 1 160 84 17 17 289 -1 unnamed_device 25.8 MiB 0.79 716 12345 5037 6539 769 64.4 MiB 0.05 0.00 2.4971 -78.2465 -2.4971 2.4971 0.73 0.000183214 0.000150883 0.011471 0.00938269 38 2445 38 6.95648e+06 318465 678818. 2348.85 2.42 0.0578355 0.0475123 26626 170182 -1 1752 21 1219 1850 143693 33730 3.38897 3.38897 -107.545 -3.38897 0 0 902133. 3121.57 0.30 0.04 0.10 -1 -1 0.30 0.0106679 0.0092837 71 52 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_072.v common 11.88 vpr 64.13 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33764 -1 -1 28 28 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65672 28 32 277 229 1 155 88 17 17 289 -1 unnamed_device 25.6 MiB 0.54 662 10228 4137 5467 624 64.1 MiB 0.04 0.00 2.98584 -81.1497 -2.98584 2.98584 0.73 0.00019629 0.000169277 0.00859451 0.00695098 38 2080 23 6.95648e+06 405319 678818. 2348.85 8.68 0.0894978 0.0734592 26626 170182 -1 1634 19 1115 1816 155444 33368 3.66382 3.66382 -105.436 -3.66382 0 0 902133. 3121.57 0.29 0.03 0.11 -1 -1 0.29 0.00881479 0.00783284 72 20 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_073.v common 4.72 vpr 64.20 MiB -1 -1 0.13 21432 1 0.04 -1 -1 33852 -1 -1 12 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65736 30 32 317 269 1 149 74 17 17 289 -1 unnamed_device 25.6 MiB 0.70 569 12164 5142 6536 486 64.2 MiB 0.05 0.00 2.79633 -89.3772 -2.79633 2.79633 0.78 0.000145758 0.000116693 0.0136541 0.0109668 40 1671 26 6.95648e+06 173708 706193. 2443.58 1.32 0.054151 0.044515 26914 176310 -1 1450 25 1462 2022 161209 38477 3.34252 3.34252 -118.82 -3.34252 0 0 926341. 3205.33 0.30 0.04 0.11 -1 -1 0.30 0.0113344 0.00987899 60 58 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_074.v common 7.05 vpr 64.17 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33712 -1 -1 11 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65712 32 32 335 282 1 178 75 17 17 289 -1 unnamed_device 25.6 MiB 1.50 640 12873 5491 6949 433 64.2 MiB 0.06 0.00 2.81495 -99.1216 -2.81495 2.81495 0.71 0.000139791 0.000109909 0.0156319 0.0127436 48 2443 48 6.95648e+06 159232 865456. 2994.66 2.71 0.0597444 0.0492551 28354 207349 -1 1829 37 1893 2798 493090 178672 3.39863 3.39863 -131.617 -3.39863 0 0 1.05005e+06 3633.38 0.34 0.10 0.13 -1 -1 0.34 0.0153638 0.0131819 72 62 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_075.v common 5.64 vpr 64.22 MiB -1 -1 0.13 21280 1 0.03 -1 -1 34056 -1 -1 24 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65764 31 32 293 230 1 168 87 17 17 289 -1 unnamed_device 25.6 MiB 0.42 698 11607 3283 6326 1998 64.2 MiB 0.05 0.00 4.02458 -104.751 -4.02458 4.02458 0.75 0.00016456 0.000130361 0.0113806 0.00908152 44 2762 45 6.95648e+06 347416 787024. 2723.27 2.45 0.0529762 0.0436454 27778 195446 -1 1853 19 1133 1904 178787 41284 4.18497 4.18497 -123.829 -4.18497 0 0 997811. 3452.63 0.35 0.04 0.12 -1 -1 0.35 0.00988769 0.00872518 74 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_076.v common 7.03 vpr 64.77 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33972 -1 -1 13 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66324 32 32 350 275 1 196 77 17 17 289 -1 unnamed_device 26.1 MiB 1.69 889 10346 4264 5799 283 64.8 MiB 0.05 0.00 3.69477 -121.493 -3.69477 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1.01997e+06 3529.29 0.32 0.05 0.12 -1 -1 0.32 0.0149485 0.0130841 80 62 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_078.v common 6.17 vpr 64.85 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33628 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66404 32 32 387 309 1 182 87 17 17 289 -1 unnamed_device 26.1 MiB 0.99 802 13911 4387 7532 1992 64.8 MiB 0.08 0.00 3.31672 -109.098 -3.31672 3.31672 0.75 0.000156601 0.000124217 0.0172985 0.0138088 44 2962 29 6.95648e+06 332941 787024. 2723.27 2.21 0.0609614 0.050192 27778 195446 -1 1999 23 1781 2955 222585 48536 3.83086 3.83086 -135.395 -3.83086 0 0 997811. 3452.63 0.41 0.06 0.15 -1 -1 0.41 0.0144285 0.0125867 80 62 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_079.v common 5.68 vpr 64.10 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33924 -1 -1 12 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65636 30 32 272 232 1 142 74 17 17 289 -1 unnamed_device 25.6 MiB 0.82 560 8909 3567 4298 1044 64.1 MiB 0.06 0.00 3.09846 -87.9247 -3.09846 3.09846 0.77 0.000295116 0.000229782 0.0145111 0.0119302 38 2068 47 6.95648e+06 173708 678818. 2348.85 2.09 0.0594933 0.0487307 26626 170182 -1 1611 23 1346 2070 159676 34569 3.45487 3.45487 -115.708 -3.45487 0 0 902133. 3121.57 0.28 0.04 0.12 -1 -1 0.28 0.00970413 0.00849988 57 29 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_080.v common 13.72 vpr 64.64 MiB -1 -1 0.13 21432 1 0.03 -1 -1 34044 -1 -1 14 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66192 30 32 375 299 1 179 76 17 17 289 -1 unnamed_device 25.9 MiB 0.88 775 9676 4017 5302 357 64.6 MiB 0.04 0.00 3.71763 -115.099 -3.71763 3.71763 0.72 0.000150523 0.000120424 0.0116992 0.00959182 38 2674 43 6.95648e+06 202660 678818. 2348.85 10.06 0.101149 0.0837549 26626 170182 -1 2005 21 1919 2685 243573 50367 4.03342 4.03342 -143.479 -4.03342 0 0 902133. 3121.57 0.31 0.09 0.12 -1 -1 0.31 0.0174727 0.0150739 76 58 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_081.v common 6.90 vpr 64.34 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33548 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65884 32 32 340 270 1 193 78 17 17 289 -1 unnamed_device 25.9 MiB 1.44 1037 12030 5015 6705 310 64.3 MiB 0.05 0.00 3.8826 -119.277 -3.8826 3.8826 0.75 0.000133804 0.000105409 0.0124282 0.0101097 48 2650 48 6.95648e+06 202660 865456. 2994.66 2.69 0.0666007 0.0547863 28354 207349 -1 2180 20 1724 2632 279049 56202 4.08261 4.08261 -143.242 -4.08261 0 0 1.05005e+06 3633.38 0.37 0.06 0.13 -1 -1 0.37 0.0117302 0.0103416 80 31 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_082.v common 6.78 vpr 64.57 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33732 -1 -1 14 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66124 31 32 340 275 1 187 77 17 17 289 -1 unnamed_device 26.0 MiB 2.09 753 12628 5372 6640 616 64.6 MiB 0.07 0.00 4.77836 -126.968 -4.77836 4.77836 0.73 0.00015643 0.000126603 0.0198203 0.0165566 50 2219 46 6.95648e+06 202660 902133. 3121.57 1.72 0.0645639 0.0541499 28642 213929 -1 1818 19 1119 1695 126593 30461 4.46991 4.46991 -141.53 -4.46991 0 0 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65844 32 32 365 294 1 177 77 17 17 289 -1 unnamed_device 25.8 MiB 1.03 747 9857 3130 4533 2194 64.3 MiB 0.05 0.00 3.77393 -114.467 -3.77393 3.77393 0.76 0.000155695 0.000124339 0.0118629 0.00980208 44 2616 26 6.95648e+06 188184 787024. 2723.27 9.49 0.0982266 0.0809849 27778 195446 -1 1873 20 1442 2400 216727 45097 3.78877 3.78877 -135.277 -3.78877 0 0 997811. 3452.63 0.33 0.04 0.12 -1 -1 0.33 0.0117513 0.010514 72 54 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_085.v common 5.79 vpr 64.46 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33840 -1 -1 16 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66004 29 32 378 310 1 170 77 17 17 289 -1 unnamed_device 25.9 MiB 1.04 631 10509 4153 5187 1169 64.5 MiB 0.04 0.00 3.26967 -101.033 -3.26967 3.26967 0.70 0.000149188 0.000119379 0.0124629 0.0100585 44 2169 47 6.95648e+06 231611 787024. 2723.27 2.07 0.0599092 0.0489349 27778 195446 -1 1418 22 1331 1917 131783 32204 3.44612 3.44612 -116.792 -3.44612 0 0 997811. 3452.63 0.34 0.03 0.12 -1 -1 0.34 0.0119672 0.0106079 73 79 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_086.v common 5.18 vpr 64.00 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33792 -1 -1 10 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65536 32 32 243 205 1 139 74 17 17 289 -1 unnamed_device 25.5 MiB 0.82 537 11699 4989 6426 284 64.0 MiB 0.04 0.00 2.91658 -84.4261 -2.91658 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65940 32 32 269 231 1 166 75 17 17 289 -1 unnamed_device 25.6 MiB 1.54 675 13189 5634 7223 332 64.4 MiB 0.05 0.00 3.40598 -100.299 -3.40598 3.40598 0.73 0.000115881 9.1058e-05 0.0120824 0.00965533 40 2185 41 6.95648e+06 159232 706193. 2443.58 1.61 0.0496487 0.040899 26914 176310 -1 1879 19 1117 1412 156589 37935 3.93911 3.93911 -132.693 -3.93911 0 0 926341. 3205.33 0.32 0.04 0.11 -1 -1 0.32 0.0104289 0.00927066 68 26 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_090.v common 7.58 vpr 63.94 MiB -1 -1 0.12 21280 1 0.01 -1 -1 33492 -1 -1 13 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66096 30 32 316 264 1 159 83 17 17 289 -1 unnamed_device 25.8 MiB 0.86 597 11603 3067 6649 1887 64.5 MiB 0.05 0.00 2.70513 -78.7652 -2.70513 2.70513 0.72 0.000135208 0.000106064 0.0110804 0.0089765 40 1866 33 6.95648e+06 303989 706193. 2443.58 7.60 0.097238 0.0794037 26914 176310 -1 1537 21 1322 2084 165685 39436 3.22012 3.22012 -107.364 -3.22012 0 0 926341. 3205.33 0.30 0.05 0.12 -1 -1 0.30 0.0117496 0.0102171 69 47 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_095.v common 7.93 vpr 64.03 MiB -1 -1 0.12 21280 1 0.03 -1 -1 34172 -1 -1 14 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65564 27 32 255 219 1 130 73 17 17 289 -1 unnamed_device 25.6 MiB 0.51 469 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66004 32 32 326 263 1 169 86 17 17 289 -1 unnamed_device 25.7 MiB 0.36 854 14828 6269 8051 508 64.5 MiB 0.06 0.00 3.48277 -100.17 -3.48277 3.48277 0.68 0.000161724 0.000132192 0.0132999 0.0107224 44 2689 33 6.95648e+06 318465 787024. 2723.27 2.03 0.0538209 0.0443208 27778 195446 -1 1755 18 1173 1837 142657 31806 4.06326 4.06326 -129.269 -4.06326 0 0 997811. 3452.63 0.32 0.03 0.12 -1 -1 0.32 0.0096944 0.00866135 74 31 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_100.v common 7.47 vpr 64.85 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33500 -1 -1 25 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66408 31 32 373 294 1 188 88 17 17 289 -1 unnamed_device 26.1 MiB 0.74 816 14323 5353 6337 2633 64.9 MiB 0.06 0.00 3.71103 -105.813 -3.71103 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66244 32 32 386 307 1 187 82 17 17 289 -1 unnamed_device 26.1 MiB 0.89 817 10584 4341 5762 481 64.7 MiB 0.04 0.00 3.58628 -117.906 -3.58628 3.58628 0.72 0.00015744 0.000125078 0.0116295 0.00948334 46 2586 42 6.95648e+06 260562 828058. 2865.25 11.32 0.129619 0.106102 28066 200906 -1 1803 23 1477 1970 130467 30965 3.58236 3.58236 -135.473 -3.58236 0 0 1.01997e+06 3529.29 0.31 0.02 0.13 -1 -1 0.31 0.0112039 0.0100369 80 59 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_104.v common 8.55 vpr 64.07 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33776 -1 -1 12 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65612 29 32 269 229 1 132 73 17 17 289 -1 unnamed_device 25.6 MiB 4.73 513 10713 4516 5723 474 64.1 MiB 0.04 0.00 3.14061 -83.7285 -3.14061 3.14061 0.74 0.00013126 0.000105204 0.0100342 0.00808523 34 1568 40 6.95648e+06 173708 618332. 2139.56 1.24 0.0422566 0.0346268 25762 151098 -1 1222 21 838 1142 96202 21527 3.12203 3.12203 -103.549 -3.12203 0 0 787024. 2723.27 0.26 0.03 0.10 -1 -1 0.26 0.00950957 0.00830052 53 28 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_105.v common 7.62 vpr 64.35 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33768 -1 -1 11 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65896 32 32 310 266 1 163 75 17 17 289 -1 unnamed_device 25.8 MiB 1.15 813 9713 4057 5499 157 64.4 MiB 0.04 0.00 3.06285 -107.585 -3.06285 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65568 32 32 278 238 1 144 73 17 17 289 -1 unnamed_device 25.5 MiB 1.25 658 9649 4054 5414 181 64.0 MiB 0.04 0.00 3.19126 -90.8265 -3.19126 3.19126 0.72 0.000114874 8.9916e-05 0.00965855 0.00787141 38 1949 24 6.95648e+06 130281 678818. 2348.85 1.95 0.0497876 0.0412217 26626 170182 -1 1541 21 1274 1906 169751 34739 3.23432 3.23432 -114.214 -3.23432 0 0 902133. 3121.57 0.32 0.05 0.13 -1 -1 0.32 0.0114125 0.00992727 56 31 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_109.v common 5.53 vpr 64.78 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33696 -1 -1 24 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66332 31 32 373 300 1 174 87 17 17 289 -1 unnamed_device 26.1 MiB 0.98 716 11799 3171 6877 1751 64.8 MiB 0.06 0.00 2.80413 -94.421 -2.80413 2.80413 0.76 0.000170974 0.000137395 0.0154614 0.0126305 44 1992 25 6.95648e+06 347416 787024. 2723.27 1.74 0.0562467 0.047055 27778 195446 -1 1451 23 1689 2228 160962 40769 3.10107 3.10107 -119.191 -3.10107 0 0 997811. 3452.63 0.36 0.04 0.12 -1 -1 0.36 0.0128461 0.0112872 79 60 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_110.v common 6.57 vpr 63.96 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33584 -1 -1 12 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65500 31 32 265 230 1 159 75 17 17 289 -1 unnamed_device 25.3 MiB 2.45 825 11293 4514 4954 1825 64.0 MiB 0.04 0.00 3.22567 -104.067 -3.22567 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65520 32 32 303 262 1 145 74 17 17 289 -1 unnamed_device 25.6 MiB 1.21 603 10304 4296 5642 366 64.0 MiB 0.04 0.00 2.4011 -80.4171 -2.4011 2.4011 0.69 0.000192425 0.000151339 0.0111222 0.00907445 46 1849 35 6.95648e+06 144757 828058. 2865.25 3.68 0.0731877 0.0604535 28066 200906 -1 1458 21 1178 1808 147331 33755 2.99782 2.99782 -108.468 -2.99782 0 0 1.01997e+06 3529.29 0.34 0.05 0.13 -1 -1 0.34 0.0114628 0.00995444 57 54 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_114.v common 11.97 vpr 64.16 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33804 -1 -1 11 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65704 32 32 290 244 1 170 75 17 17 289 -1 unnamed_device 25.6 MiB 1.35 659 11451 4261 5770 1420 64.2 MiB 0.05 0.00 3.29168 -105.903 -3.29168 3.29168 0.70 0.000131309 0.00010485 0.0112887 0.00912814 44 2422 42 6.95648e+06 159232 787024. 2723.27 8.02 0.0939971 0.0772308 27778 195446 -1 1710 19 1290 1892 146955 33502 3.55422 3.55422 -128.228 -3.55422 0 0 997811. 3452.63 0.30 0.04 0.12 -1 -1 0.30 0.010982 0.00966855 70 31 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_115.v common 6.66 vpr 64.49 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33840 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66036 32 32 318 257 1 188 78 17 17 289 -1 unnamed_device 25.8 MiB 2.27 782 12196 5116 6619 461 64.5 MiB 0.05 0.00 3.45418 -104.223 -3.45418 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1.05005e+06 3633.38 0.34 0.04 0.13 -1 -1 0.34 0.0118998 0.0104802 71 49 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_117.v common 8.45 vpr 64.62 MiB -1 -1 0.13 21736 1 0.03 -1 -1 33668 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66172 32 32 393 312 1 206 78 17 17 289 -1 unnamed_device 26.1 MiB 1.40 840 12860 5402 6979 479 64.6 MiB 0.06 0.00 4.0079 -127.527 -4.0079 4.0079 0.75 0.000173493 0.000140045 0.0149185 0.0122102 54 2528 32 6.95648e+06 202660 949917. 3286.91 4.22 0.0942499 0.0778975 29506 232905 -1 1842 24 1943 2758 210183 47035 4.17142 4.17142 -149.5 -4.17142 0 0 1.17392e+06 4061.99 0.37 0.05 0.16 -1 -1 0.37 0.0145302 0.0129549 89 62 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_118.v common 6.33 vpr 63.82 MiB -1 -1 0.11 20976 1 0.03 -1 -1 33752 -1 -1 13 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65348 31 32 229 197 1 137 76 17 17 289 -1 unnamed_device 25.3 MiB 1.46 573 9836 3716 4469 1651 63.8 MiB 0.05 0.00 3.10444 -77.9797 -3.10444 3.10444 0.74 0.000113166 8.8341e-05 0.0123647 0.0096107 36 1940 39 6.95648e+06 188184 648988. 2245.63 2.29 0.0544926 0.0443546 26050 158493 -1 1423 18 822 1278 101777 22946 3.06792 3.06792 -106.653 -3.06792 0 0 828058. 2865.25 0.29 0.03 0.10 -1 -1 0.29 0.00869144 0.0077423 54 -1 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_119.v common 7.49 vpr 64.64 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33804 -1 -1 25 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66192 32 32 412 334 1 182 89 17 17 289 -1 unnamed_device 25.9 MiB 0.98 824 15731 4263 11158 310 64.6 MiB 0.07 0.00 3.08305 -110.169 -3.08305 3.08305 0.72 0.000307824 0.000157399 0.0164286 0.0129362 38 2587 42 6.95648e+06 361892 678818. 2348.85 3.82 0.0972952 0.0796419 26626 170182 -1 1952 22 1737 2277 191995 40515 3.80686 3.80686 -145.399 -3.80686 0 0 902133. 3121.57 0.28 0.05 0.10 -1 -1 0.28 0.014038 0.012373 81 87 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_120.v common 14.89 vpr 64.51 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33724 -1 -1 10 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66056 32 32 376 318 1 154 74 17 17 289 -1 unnamed_device 25.8 MiB 2.92 597 11079 4654 6069 356 64.5 MiB 0.05 0.00 2.45985 -91.709 -2.45985 2.45985 0.73 0.000221214 0.000172619 0.0157652 0.0130378 40 1906 47 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on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65304 30 32 224 207 1 132 73 17 17 289 -1 unnamed_device 25.2 MiB 2.70 569 10865 4910 5602 353 63.8 MiB 0.04 0.00 2.22575 -77.9757 -2.22575 2.22575 0.75 0.000110858 8.6551e-05 0.00928621 0.00740417 36 1595 29 6.95648e+06 159232 648988. 2245.63 2.32 0.0442889 0.0363757 26050 158493 -1 1286 21 964 1226 142812 37347 2.29903 2.29903 -91.0995 -2.29903 0 0 828058. 2865.25 0.33 0.03 0.11 -1 -1 0.33 0.00825386 0.00724759 52 29 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_124.v common 5.55 vpr 64.01 MiB -1 -1 0.15 21280 1 0.03 -1 -1 33864 -1 -1 11 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65544 30 32 286 239 1 135 73 17 17 289 -1 unnamed_device 25.3 MiB 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64.63 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33704 -1 -1 12 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66180 32 32 376 307 1 178 76 17 17 289 -1 unnamed_device 26.0 MiB 1.65 709 13196 5200 5994 2002 64.6 MiB 0.05 0.00 3.43255 -109.213 -3.43255 3.43255 0.70 0.000166598 0.000134691 0.0150021 0.0120843 54 2446 44 6.95648e+06 173708 949917. 3286.91 4.96 0.10718 0.0881008 29506 232905 -1 1681 22 1586 2611 189278 44770 3.77502 3.77502 -129.79 -3.77502 0 0 1.17392e+06 4061.99 0.37 0.04 0.16 -1 -1 0.37 0.0124338 0.0109825 73 69 -1 -1 -1 -1 +fixed_k6_frac_2ripple_N8_22nm.xml mult_128.v common 7.58 vpr 64.76 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33892 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66312 31 32 409 331 1 183 80 17 17 289 -1 unnamed_device 26.1 MiB 0.91 704 11088 4569 5912 607 64.8 MiB 0.05 0.00 3.43898 -112.926 -3.43898 3.43898 0.71 0.000149719 0.000118411 0.0131437 0.0108389 56 1821 33 6.95648e+06 246087 973134. 3367.25 3.89 0.100547 0.0823644 29794 239141 -1 1629 23 1509 2005 187434 43541 3.70152 3.70152 -133.725 -3.70152 0 0 1.19926e+06 4149.71 0.37 0.04 0.16 -1 -1 0.37 0.0131636 0.0111884 80 86 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_001.v common 8.10 vpr 64.46 MiB -1 -1 0.13 21432 1 0.02 -1 -1 33476 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66012 32 32 354 285 1 206 79 17 17 289 -1 unnamed_device 25.9 MiB 1.63 858 12754 5387 6882 485 64.5 MiB 0.05 0.00 4.0552 -120.091 -4.0552 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65768 29 32 308 248 1 179 77 17 17 289 -1 unnamed_device 25.5 MiB 1.39 757 13606 6065 6910 631 64.2 MiB 0.06 0.00 3.29948 -95.8827 -3.29948 3.29948 0.70 0.000234246 0.000202129 0.0158054 0.0128683 40 2478 28 6.99608e+06 235451 706193. 2443.58 7.76 0.0855726 0.0698655 26914 176310 -1 1905 20 1556 2412 194700 43578 3.84382 3.84382 -126.437 -3.84382 0 0 926341. 3205.33 0.29 0.04 0.13 -1 -1 0.29 0.010004 0.00875711 78 25 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_005.v common 9.75 vpr 64.18 MiB -1 -1 0.16 21584 1 0.03 -1 -1 33696 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65720 32 32 336 268 1 194 78 17 17 289 -1 unnamed_device 25.5 MiB 2.77 944 10370 4298 5853 219 64.2 MiB 0.05 0.00 3.76679 -118.684 -3.76679 3.76679 0.74 0.000210059 0.000136064 0.0113167 0.00905754 46 2821 34 6.99608e+06 206020 828058. 2865.25 4.11 0.0798851 0.0658607 28066 200906 -1 2290 21 1612 2726 210045 43441 4.20221 4.20221 -147.156 -4.20221 0 0 1.01997e+06 3529.29 0.32 0.05 0.12 -1 -1 0.32 0.0115658 0.010215 81 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_006.v common 10.79 vpr 64.26 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33820 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65800 32 32 366 295 1 221 81 17 17 289 -1 unnamed_device 25.6 MiB 3.08 958 13556 4313 7021 2222 64.3 MiB 0.06 0.00 2.92096 -98.2273 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65728 32 32 298 248 1 181 77 17 17 289 -1 unnamed_device 25.5 MiB 0.88 747 12465 5272 6908 285 64.2 MiB 0.05 0.00 3.18112 -109.398 -3.18112 3.18112 0.74 0.000119148 9.3193e-05 0.0130948 0.0103714 40 2455 34 6.99608e+06 191304 706193. 2443.58 3.36 0.0764869 0.0619075 26914 176310 -1 1942 20 1476 1840 174721 37700 3.60016 3.60016 -133.674 -3.60016 0 0 926341. 3205.33 0.30 0.04 0.11 -1 -1 0.30 0.0102016 0.00900488 75 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_011.v common 5.81 vpr 63.94 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33872 -1 -1 14 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65476 30 32 303 262 1 188 76 17 17 289 -1 unnamed_device 25.3 MiB 0.78 784 12236 5187 6642 407 63.9 MiB 0.05 0.00 3.23463 -102.673 -3.23463 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65568 29 32 248 215 1 155 74 17 17 289 -1 unnamed_device 25.5 MiB 2.89 623 10614 4437 5695 482 64.0 MiB 0.04 0.00 2.5552 -73.931 -2.5552 2.5552 0.70 0.0001866 0.000158273 0.00991053 0.00794526 38 1953 31 6.99608e+06 191304 678818. 2348.85 3.12 0.0620256 0.0507863 26626 170182 -1 1564 20 1162 1640 131488 29589 3.01877 3.01877 -100.158 -3.01877 0 0 902133. 3121.57 0.29 0.03 0.11 -1 -1 0.29 0.0085661 0.0075665 64 21 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_016.v common 6.99 vpr 64.26 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33832 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65804 32 32 370 297 1 222 80 17 17 289 -1 unnamed_device 25.7 MiB 1.25 1177 12808 5396 7148 264 64.3 MiB 0.07 0.00 2.99159 -102.866 -2.99159 2.99159 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65420 30 32 222 206 1 131 72 17 17 289 -1 unnamed_device 25.2 MiB 1.80 565 10502 4646 5561 295 63.9 MiB 0.04 0.00 1.95956 -72.4529 -1.95956 1.95956 0.71 0.000132211 0.000107383 0.00948367 0.00734053 44 1358 20 6.99608e+06 147157 787024. 2723.27 3.11 0.0569639 0.0463898 27778 195446 -1 1044 20 686 736 142321 64907 2.34303 2.34303 -87.1866 -2.34303 0 0 997811. 3452.63 0.33 0.04 0.13 -1 -1 0.33 0.00753151 0.0066423 52 29 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_020.v common 8.42 vpr 63.93 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33732 -1 -1 13 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65464 31 32 291 243 1 171 76 17 17 289 -1 unnamed_device 25.5 MiB 2.14 907 8396 2653 4810 933 63.9 MiB 0.04 0.00 3.13707 -106.562 -3.13707 3.13707 0.77 0.000175966 0.000148539 0.00873983 0.00702267 44 2136 21 6.99608e+06 191304 787024. 2723.27 3.46 0.065984 0.0539086 27778 195446 -1 1879 19 1178 1754 172777 34284 3.47201 3.47201 -132.543 -3.47201 0 0 997811. 3452.63 0.37 0.04 0.12 -1 -1 0.37 0.00929633 0.00820358 72 30 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_021.v common 6.35 vpr 64.26 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33792 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65804 32 32 342 271 1 201 84 17 17 289 -1 unnamed_device 25.5 MiB 1.38 869 12345 5147 6722 476 64.3 MiB 0.06 0.00 3.38154 -106.458 -3.38154 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65424 32 32 285 227 1 162 79 17 17 289 -1 unnamed_device 25.3 MiB 0.98 725 12247 5137 6748 362 63.9 MiB 0.05 0.00 3.7303 -93.8133 -3.7303 3.7303 0.73 0.000122684 9.5878e-05 0.0118176 0.00963585 40 2399 24 6.99608e+06 220735 706193. 2443.58 7.64 0.0922746 0.0755337 26914 176310 -1 1945 25 1502 2580 233467 48418 3.99301 3.99301 -128.338 -3.99301 0 0 926341. 3205.33 0.32 0.06 0.14 -1 -1 0.32 0.0125607 0.0108237 66 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_025.v common 5.35 vpr 63.47 MiB -1 -1 0.11 20824 1 0.03 -1 -1 33624 -1 -1 8 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64992 32 32 173 169 1 112 72 17 17 289 -1 unnamed_device 24.9 MiB 0.19 550 8267 3434 4664 169 63.5 MiB 0.03 0.00 1.69321 -59.4254 -1.69321 1.69321 0.70 0.000103151 8.0697e-05 0.00688344 0.00551661 34 1306 26 6.99608e+06 117725 618332. 2139.56 2.63 0.051393 0.0416288 25762 151098 -1 1143 20 669 792 71474 16089 1.93402 1.93402 -78.2122 -1.93402 0 0 787024. 2723.27 0.27 0.02 0.11 -1 -1 0.27 0.00610802 0.00531805 42 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_026.v common 14.30 vpr 64.20 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33672 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65740 32 32 300 245 1 178 78 17 17 289 -1 unnamed_device 25.6 MiB 1.23 809 11698 4566 5295 1837 64.2 MiB 0.06 0.00 3.73043 -101.773 -3.73043 3.73043 0.75 0.000142874 0.000107118 0.0128543 0.0102396 38 2961 49 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11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65584 32 32 284 241 1 168 76 17 17 289 -1 unnamed_device 25.5 MiB 2.21 611 9356 2482 5074 1800 64.0 MiB 0.03 0.00 2.63455 -84.7575 -2.63455 2.63455 0.73 0.000128342 0.000101872 0.00905774 0.00731788 54 1563 36 6.99608e+06 176588 949917. 3286.91 4.41 0.078234 0.0639716 29506 232905 -1 1158 21 1113 1526 97005 25106 2.84132 2.84132 -106.731 -2.84132 0 0 1.17392e+06 4061.99 0.37 0.03 0.15 -1 -1 0.37 0.00989058 0.00870613 69 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_030.v common 5.59 vpr 63.97 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33592 -1 -1 14 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65504 30 32 262 227 1 160 76 17 17 289 -1 unnamed_device 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2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65872 29 32 291 250 1 180 76 17 17 289 -1 unnamed_device 25.6 MiB 2.71 780 11276 3080 7644 552 64.3 MiB 0.05 0.00 2.43005 -83.9441 -2.43005 2.43005 0.76 0.000115971 9.1199e-05 0.0110412 0.00886345 36 2428 22 6.99608e+06 220735 648988. 2245.63 2.46 0.0520035 0.0415248 26050 158493 -1 1897 21 1491 1949 147234 33749 2.65202 2.65202 -104.906 -2.65202 0 0 828058. 2865.25 0.28 0.04 0.10 -1 -1 0.28 0.00962201 0.00845802 77 48 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_035.v common 8.92 vpr 64.38 MiB -1 -1 0.13 21432 1 0.04 -1 -1 33996 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65924 32 32 367 282 1 217 80 17 17 289 -1 unnamed_device 25.8 MiB 1.21 905 11432 4692 6301 439 64.4 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66144 31 32 377 302 1 235 80 17 17 289 -1 unnamed_device 26.1 MiB 1.54 1035 11948 4912 6610 426 64.6 MiB 0.06 0.00 4.18756 -132.403 -4.18756 4.18756 0.70 0.000174332 0.000142366 0.0131836 0.0106939 48 3235 32 6.99608e+06 250167 865456. 2994.66 14.26 0.121651 0.0998137 28354 207349 -1 2500 23 2380 3441 317509 66079 5.0031 5.0031 -170.347 -5.0031 0 0 1.05005e+06 3633.38 0.34 0.06 0.12 -1 -1 0.34 0.0128438 0.0112761 104 60 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_040.v common 15.79 vpr 64.48 MiB -1 -1 0.14 21736 1 0.03 -1 -1 33784 -1 -1 18 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66024 31 32 383 305 1 233 81 17 17 289 -1 unnamed_device 26.0 MiB 3.13 1037 11806 3534 5936 2336 64.5 MiB 0.05 0.00 4.31328 -134.89 -4.31328 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66004 32 32 457 356 1 282 85 17 17 289 -1 unnamed_device 26.4 MiB 1.40 1306 12547 3187 9051 309 64.5 MiB 0.07 0.00 3.9997 -133.538 -3.9997 3.9997 0.71 0.000271257 0.000234855 0.0159784 0.0130686 44 3871 49 6.99608e+06 309029 787024. 2723.27 2.48 0.0840521 0.0696401 27778 195446 -1 2881 22 2579 3817 285628 59461 4.78264 4.78264 -168.535 -4.78264 0 0 997811. 3452.63 0.32 0.06 0.12 -1 -1 0.32 0.0176695 0.0159927 129 84 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_044.v common 9.64 vpr 63.92 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33496 -1 -1 11 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65792 32 32 340 270 1 203 79 17 17 289 -1 unnamed_device 25.5 MiB 0.64 932 14951 6589 7964 398 64.2 MiB 0.07 0.00 3.52245 -116.373 -3.52245 3.52245 0.72 0.000148377 0.000118796 0.0170022 0.0138749 36 3154 37 6.99608e+06 220735 648988. 2245.63 9.08 0.104378 0.0862652 26050 158493 -1 2315 21 1840 2493 252095 50874 3.46592 3.46592 -135.7 -3.46592 0 0 828058. 2865.25 0.29 0.07 0.12 -1 -1 0.29 0.016121 0.01384 85 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_059.v common 14.15 vpr 63.76 MiB -1 -1 0.10 21432 1 0.03 -1 -1 33744 -1 -1 20 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65292 30 32 278 235 1 166 82 17 17 289 -1 unnamed_device 25.2 MiB 1.30 659 11652 4699 6237 716 63.8 MiB 0.05 0.00 3.02694 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65992 32 32 349 273 1 207 80 17 17 289 -1 unnamed_device 25.8 MiB 1.32 1042 15388 6677 8324 387 64.4 MiB 0.07 0.00 4.00152 -112.448 -4.00152 4.00152 0.72 0.000157164 0.000125095 0.0161108 0.013167 44 3026 25 6.99608e+06 235451 787024. 2723.27 12.01 0.0998458 0.0824934 27778 195446 -1 2213 22 1547 2621 195462 40893 4.85251 4.85251 -145.306 -4.85251 0 0 997811. 3452.63 0.32 0.04 0.12 -1 -1 0.32 0.011303 0.00996905 85 26 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_064.v common 9.98 vpr 63.71 MiB -1 -1 0.11 20976 1 0.03 -1 -1 33868 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65240 32 32 247 207 1 142 78 17 17 289 -1 unnamed_device 25.2 MiB 0.90 460 11034 2723 5988 2323 63.7 MiB 0.04 0.00 2.5722 -80.1035 -2.5722 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66052 32 32 358 289 1 217 79 17 17 289 -1 unnamed_device 26.0 MiB 1.47 1033 7515 2753 3169 1593 64.5 MiB 0.04 0.00 3.50518 -115.562 -3.50518 3.50518 0.73 0.000154071 0.000125194 0.00923432 0.00754124 38 3027 43 6.99608e+06 220735 678818. 2348.85 1.78 0.054148 0.0451835 26626 170182 -1 2460 36 2746 3939 346503 72323 4.52985 4.52985 -157.164 -4.52985 0 0 902133. 3121.57 0.30 0.08 0.11 -1 -1 0.30 0.0175685 0.0152576 93 51 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_068.v common 8.93 vpr 64.48 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33820 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66024 32 32 353 285 1 213 79 17 17 289 -1 unnamed_device 25.8 MiB 2.36 1230 12585 3985 7020 1580 64.5 MiB 0.06 0.00 3.67287 -123.241 -3.67287 3.67287 0.72 0.000149206 0.000119321 0.0137031 0.0112321 44 2991 28 6.99608e+06 220735 787024. 2723.27 3.69 0.0840055 0.069975 27778 195446 -1 2479 23 1757 2636 225054 44576 4.42281 4.42281 -152.153 -4.42281 0 0 997811. 3452.63 0.34 0.05 0.13 -1 -1 0.34 0.0139288 0.0125467 90 48 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_069.v common 9.37 vpr 64.16 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33544 -1 -1 11 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65700 32 32 276 237 1 163 75 17 17 289 -1 unnamed_device 25.5 MiB 2.15 684 13347 5776 7183 388 64.2 MiB 0.06 0.00 3.18112 -100.137 -3.18112 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65424 28 32 277 229 1 170 77 17 17 289 -1 unnamed_device 25.5 MiB 0.46 673 12465 4136 6498 1831 63.9 MiB 0.06 0.00 3.06285 -84.355 -3.06285 3.06285 0.71 0.00011475 9.0088e-05 0.0138074 0.0111436 46 1807 29 6.99608e+06 250167 828058. 2865.25 4.29 0.0798921 0.0655441 28066 200906 -1 1316 20 1182 1805 110207 26859 3.57446 3.57446 -100.261 -3.57446 0 0 1.01997e+06 3529.29 0.40 0.03 0.13 -1 -1 0.40 0.0100432 0.00892097 71 20 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_073.v common 8.31 vpr 64.18 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33700 -1 -1 15 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65720 30 32 317 269 1 200 77 17 17 289 -1 unnamed_device 25.6 MiB 2.01 801 12302 5165 6544 593 64.2 MiB 0.06 0.00 3.54051 -110.579 -3.54051 3.54051 0.71 0.000166122 0.00013451 0.0147083 0.011943 52 1993 30 6.99608e+06 220735 926341. 3205.33 3.51 0.0795268 0.0653656 29218 227130 -1 1398 22 1512 2067 135857 34845 3.80305 3.80305 -131.441 -3.80305 0 0 1.14541e+06 3963.36 0.38 0.04 0.15 -1 -1 0.38 0.011531 0.0102091 87 58 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_074.v common 7.94 vpr 64.57 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33560 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66120 32 32 335 282 1 216 78 17 17 289 -1 unnamed_device 25.9 MiB 0.84 971 13856 4965 6485 2406 64.6 MiB 0.06 0.00 2.904 -100.708 -2.904 2.904 0.71 0.000128463 0.000101228 0.0141023 0.0115166 40 2969 49 6.99608e+06 206020 706193. 2443.58 4.37 0.0954634 0.0780532 26914 176310 -1 2359 23 2123 2912 280538 57017 3.44587 3.44587 -132.658 -3.44587 0 0 926341. 3205.33 0.30 0.05 0.12 -1 -1 0.30 0.0121984 0.0108355 93 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_075.v common 5.18 vpr 63.96 MiB -1 -1 0.12 21128 1 0.03 -1 -1 33768 -1 -1 24 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65492 31 32 293 230 1 168 87 17 17 289 -1 unnamed_device 25.5 MiB 0.39 756 13527 4716 6751 2060 64.0 MiB 0.06 0.00 3.86008 -101.483 -3.86008 3.86008 0.77 0.000150274 0.000122377 0.0122357 0.0100398 44 2731 38 6.99608e+06 353176 787024. 2723.27 2.01 0.0512144 0.0423843 27778 195446 -1 1882 25 1257 2287 182771 39729 3.75146 3.75146 -121.657 -3.75146 0 0 997811. 3452.63 0.33 0.04 0.13 -1 -1 0.33 0.0115475 0.0100056 74 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_076.v common 18.59 vpr 64.58 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33940 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66132 32 32 350 275 1 202 78 17 17 289 -1 unnamed_device 26.1 MiB 1.95 871 10702 4438 5957 307 64.6 MiB 0.05 0.00 3.51478 -116.564 -3.51478 3.51478 0.72 0.000140219 0.000111569 0.0120869 0.00980178 40 3185 44 6.99608e+06 206020 706193. 2443.58 14.02 0.103118 0.0847088 26914 176310 -1 2560 23 2108 3103 310586 66664 4.19766 4.19766 -154.082 -4.19766 0 0 926341. 3205.33 0.29 0.07 0.10 -1 -1 0.29 0.0147247 0.0129828 86 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_077.v common 7.03 vpr 64.78 MiB -1 -1 0.19 21432 1 0.03 -1 -1 33712 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66332 32 32 385 308 1 237 81 17 17 289 -1 unnamed_device 26.1 MiB 0.72 1170 15306 6094 7379 1833 64.8 MiB 0.07 0.00 3.90602 -128.242 -3.90602 3.90602 0.71 0.000212684 0.000179656 0.0165655 0.0134828 48 2890 25 6.99608e+06 250167 865456. 2994.66 3.54 0.0922574 0.0763888 28354 207349 -1 2505 20 1931 2648 223792 47150 4.63914 4.63914 -166.588 -4.63914 0 0 1.05005e+06 3633.38 0.34 0.05 0.13 -1 -1 0.34 0.0124091 0.0110931 102 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_078.v common 8.80 vpr 64.68 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33776 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66232 32 32 387 309 1 244 81 17 17 289 -1 unnamed_device 25.9 MiB 0.80 1145 13556 5443 7048 1065 64.7 MiB 0.07 0.00 3.49016 -119.33 -3.49016 3.49016 0.71 0.000150377 0.000119712 0.0156355 0.0127323 48 3687 23 6.99608e+06 250167 865456. 2994.66 5.23 0.0968609 0.0797432 28354 207349 -1 2777 20 2004 2888 330452 68479 4.4825 4.4825 -154.219 -4.4825 0 0 1.05005e+06 3633.38 0.33 0.06 0.13 -1 -1 0.33 0.0112417 0.00986645 104 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_079.v common 6.87 vpr 63.86 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33920 -1 -1 13 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65396 30 32 272 232 1 171 75 17 17 289 -1 unnamed_device 25.3 MiB 0.90 641 9081 2973 4201 1907 63.9 MiB 0.04 0.00 3.63675 -101.512 -3.63675 3.63675 0.72 0.000138975 0.000109953 0.00902148 0.00721389 44 1977 24 6.99608e+06 191304 787024. 2723.27 3.29 0.0683889 0.0564337 27778 195446 -1 1462 20 1058 1527 112421 25780 3.22226 3.22226 -112.502 -3.22226 0 0 997811. 3452.63 0.32 0.05 0.12 -1 -1 0.32 0.0125822 0.0108955 71 29 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_080.v common 8.82 vpr 64.73 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33908 -1 -1 18 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66284 30 32 375 299 1 233 80 17 17 289 -1 unnamed_device 26.1 MiB 1.00 880 12292 4214 5619 2459 64.7 MiB 0.05 0.00 4.55066 -132.822 -4.55066 4.55066 0.73 0.000144178 0.000115123 0.0135284 0.0110421 46 3362 45 6.99608e+06 264882 828058. 2865.25 5.05 0.0949326 0.0786145 28066 200906 -1 2137 21 2207 3155 248393 62553 4.7271 4.7271 -159.474 -4.7271 0 0 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65864 31 32 340 275 1 199 80 17 17 289 -1 unnamed_device 25.8 MiB 1.22 821 14700 5472 6749 2479 64.3 MiB 0.06 0.00 4.31205 -117.178 -4.31205 4.31205 0.72 0.00014056 0.000111624 0.0150801 0.0122404 40 2816 48 6.99608e+06 250167 706193. 2443.58 3.11 0.0660557 0.0543538 26914 176310 -1 2066 20 1475 2129 220473 59577 4.35436 4.35436 -144.023 -4.35436 0 0 926341. 3205.33 0.30 0.05 0.11 -1 -1 0.30 0.0114269 0.0101653 87 43 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_083.v common 19.70 vpr 64.66 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33868 -1 -1 19 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66216 30 32 377 310 1 234 81 17 17 289 -1 unnamed_device 26.0 MiB 1.91 1011 14781 5447 6700 2634 64.7 MiB 0.07 0.00 3.44926 -109.138 -3.44926 3.44926 0.79 0.00016185 0.000128086 0.0152496 0.0123367 40 3493 40 6.99608e+06 279598 706193. 2443.58 14.97 0.115606 0.0946869 26914 176310 -1 2560 21 2204 3080 288392 62198 4.1709 4.1709 -142.745 -4.1709 0 0 926341. 3205.33 0.29 0.06 0.11 -1 -1 0.29 0.013618 0.0119152 107 78 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_084.v common 7.20 vpr 64.69 MiB -1 -1 0.15 21432 1 0.03 -1 -1 33856 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66240 32 32 365 294 1 223 81 17 17 289 -1 unnamed_device 25.9 MiB 1.72 1204 11981 3985 7186 810 64.7 MiB 0.06 0.00 3.87837 -123.199 -3.87837 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3121.57 0.29 0.05 0.11 -1 -1 0.29 0.0126264 0.0111187 109 79 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_086.v common 5.52 vpr 63.96 MiB -1 -1 0.12 21128 1 0.03 -1 -1 33776 -1 -1 10 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65492 32 32 243 205 1 140 74 17 17 289 -1 unnamed_device 25.3 MiB 1.24 618 12009 5125 6574 310 64.0 MiB 0.04 0.00 2.91658 -85.8367 -2.91658 2.91658 0.74 0.000136428 0.000106568 0.0103643 0.00824935 38 2132 50 6.99608e+06 147157 678818. 2348.85 1.62 0.0550848 0.0452712 26626 170182 -1 1577 25 1229 1864 134729 29580 3.13192 3.13192 -109.758 -3.13192 0 0 902133. 3121.57 0.30 0.03 0.10 -1 -1 0.30 0.0104566 0.0091164 54 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_087.v common 5.69 vpr 64.57 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33580 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66124 32 32 373 302 1 234 81 17 17 289 -1 unnamed_device 26.1 MiB 0.68 1032 14256 4997 6853 2406 64.6 MiB 0.07 0.00 4.21916 -134.908 -4.21916 4.21916 0.72 0.000156297 0.000125568 0.0150674 0.0123725 46 2937 22 6.99608e+06 250167 828058. 2865.25 2.22 0.0681159 0.05673 28066 200906 -1 2132 22 1783 2579 196678 42660 4.62714 4.62714 -153.953 -4.62714 0 0 1.01997e+06 3529.29 0.33 0.05 0.12 -1 -1 0.33 0.0129195 0.011353 100 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_088.v common 9.48 vpr 64.43 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33740 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65972 32 32 397 314 1 249 81 17 17 289 -1 unnamed_device 25.6 MiB 0.87 1040 13381 5582 7256 543 64.4 MiB 0.06 0.00 4.125 -136.747 -4.125 4.125 0.71 0.000164325 0.000133059 0.0151621 0.0124199 46 3969 50 6.99608e+06 250167 828058. 2865.25 5.83 0.123841 0.102363 28066 200906 -1 2532 50 4528 6527 544411 117693 4.71241 4.71241 -167.584 -4.71241 0 0 1.01997e+06 3529.29 0.32 0.11 0.13 -1 -1 0.32 0.022575 0.0195095 109 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_089.v common 6.49 vpr 64.15 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33704 -1 -1 11 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65688 32 32 269 231 1 168 75 17 17 289 -1 unnamed_device 25.5 MiB 0.94 687 12557 5355 6851 351 64.1 MiB 0.05 0.00 3.15927 -93.4007 -3.15927 3.15927 0.69 0.000114658 8.9958e-05 0.0116594 0.0093735 38 2316 30 6.99608e+06 161872 678818. 2348.85 3.02 0.0606945 0.0493818 26626 170182 -1 1625 19 1145 1449 123552 29702 3.27591 3.27591 -113.685 -3.27591 0 0 902133. 3121.57 0.29 0.03 0.10 -1 -1 0.29 0.00985774 0.00874681 69 26 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_090.v common 6.57 vpr 63.98 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33792 -1 -1 13 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65520 31 32 245 205 1 144 76 17 17 289 -1 unnamed_device 25.3 MiB 0.47 486 10476 3296 4768 2412 64.0 MiB 0.04 0.00 2.91353 -84.6347 -2.91353 2.91353 0.73 0.000110406 8.615e-05 0.00930021 0.00735536 46 1544 30 6.99608e+06 191304 828058. 2865.25 3.49 0.0610124 0.0501389 28066 200906 -1 1265 31 1195 1748 116389 29613 3.08197 3.08197 -105.826 -3.08197 0 0 1.01997e+06 3529.29 0.32 0.03 0.12 -1 -1 0.32 0.0110695 0.00969349 56 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_091.v common 7.04 vpr 64.26 MiB -1 -1 0.12 21584 1 0.04 -1 -1 33844 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65804 32 32 348 274 1 208 79 17 17 289 -1 unnamed_device 25.5 MiB 0.81 859 12754 4889 5961 1904 64.3 MiB 0.05 0.00 3.83011 -122.691 -3.83011 3.83011 0.70 0.000136952 0.000107899 0.0133698 0.0108132 46 2300 21 6.99608e+06 220735 828058. 2865.25 3.56 0.0766427 0.0632526 28066 200906 -1 1918 20 1616 2141 154567 34141 4.26115 4.26115 -146.789 -4.26115 0 0 1.01997e+06 3529.29 0.33 0.04 0.12 -1 -1 0.33 0.0114122 0.0100165 88 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_092.v common 6.39 vpr 64.34 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33836 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65884 32 32 356 289 1 218 79 17 17 289 -1 unnamed_device 25.8 MiB 1.73 999 13599 5780 7526 293 64.3 MiB 0.06 0.00 3.63687 -112.918 -3.63687 3.63687 0.72 0.000229081 0.000197539 0.0143844 0.0117815 40 3111 30 6.99608e+06 220735 706193. 2443.58 2.00 0.0614979 0.0509956 26914 176310 -1 2421 23 1963 2660 278754 69421 4.69041 4.69041 -153.767 -4.69041 0 0 926341. 3205.33 0.29 0.06 0.12 -1 -1 0.29 0.012197 0.0106569 95 53 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_093.v common 7.32 vpr 64.23 MiB -1 -1 0.12 21280 1 0.04 -1 -1 33672 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65768 32 32 349 260 1 195 81 17 17 289 -1 unnamed_device 25.6 MiB 0.41 841 14256 6100 7460 696 64.2 MiB 0.06 0.00 3.89411 -113.689 -3.89411 3.89411 0.76 0.000151044 0.000120193 0.0161893 0.0132317 50 2211 22 6.99608e+06 250167 902133. 3121.57 4.11 0.0856722 0.0710852 28642 213929 -1 1756 22 1587 2730 216707 48849 4.01501 4.01501 -135.21 -4.01501 0 0 1.08113e+06 3740.92 0.38 0.05 0.13 -1 -1 0.38 0.013324 0.0116546 83 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_094.v common 7.38 vpr 64.32 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33752 -1 -1 16 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65860 30 32 316 264 1 197 78 17 17 289 -1 unnamed_device 25.8 MiB 1.14 884 12362 5149 6708 505 64.3 MiB 0.05 0.00 2.94579 -86.9736 -2.94579 2.94579 0.72 0.000133087 0.000105177 0.0124619 0.0101395 44 2461 31 6.99608e+06 235451 787024. 2723.27 3.56 0.0809232 0.0666443 27778 195446 -1 1891 20 1607 2393 169949 36699 3.19636 3.19636 -108.002 -3.19636 0 0 997811. 3452.63 0.32 0.04 0.12 -1 -1 0.32 0.0101666 0.00892577 86 47 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_095.v common 6.75 vpr 63.79 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33980 -1 -1 15 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65316 27 32 255 219 1 145 74 17 17 289 -1 unnamed_device 25.2 MiB 0.97 592 7824 3165 4240 419 63.8 MiB 0.03 0.00 2.96122 -85.4509 -2.96122 2.96122 0.70 0.000110447 8.6952e-05 0.00738416 0.00606823 36 2166 29 6.99608e+06 220735 648988. 2245.63 3.25 0.0619492 0.0501539 26050 158493 -1 1608 19 1040 1596 139138 30341 3.88516 3.88516 -122.092 -3.88516 0 0 828058. 2865.25 0.27 0.03 0.09 -1 -1 0.27 0.00836216 0.00735156 66 26 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_096.v common 8.73 vpr 64.85 MiB -1 -1 0.17 21584 1 0.03 -1 -1 33760 -1 -1 18 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66408 32 32 421 327 1 257 82 17 17 289 -1 unnamed_device 26.1 MiB 0.89 1139 7202 1701 4728 773 64.9 MiB 0.04 0.00 3.48633 -115.495 -3.48633 3.48633 0.72 0.000172886 0.000138819 0.00949141 0.00786098 54 3240 25 6.99608e+06 264882 949917. 3286.91 4.96 0.102992 0.0853852 29506 232905 -1 2448 23 2278 3416 273738 60666 4.79871 4.79871 -156.389 -4.79871 0 0 1.17392e+06 4061.99 0.37 0.06 0.15 -1 -1 0.37 0.0144589 0.0127886 111 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_097.v common 6.54 vpr 64.55 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33812 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66096 31 32 365 296 1 229 80 17 17 289 -1 unnamed_device 25.9 MiB 1.02 1149 10228 2416 7195 617 64.5 MiB 0.07 0.00 4.58189 -135.101 -4.58189 4.58189 0.73 0.000161339 0.000129596 0.0160995 0.013019 46 3044 48 6.99608e+06 250167 828058. 2865.25 2.73 0.0774757 0.0642167 28066 200906 -1 2441 22 2135 3079 282541 54401 4.872 4.872 -159.29 -4.872 0 0 1.01997e+06 3529.29 0.34 0.06 0.13 -1 -1 0.34 0.0127747 0.0113184 100 60 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_098.v common 15.85 vpr 64.55 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33932 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66096 32 32 331 280 1 215 78 17 17 289 -1 unnamed_device 25.8 MiB 0.90 964 11200 4314 5654 1232 64.5 MiB 0.05 0.00 3.59524 -128.12 -3.59524 3.59524 0.78 0.000126506 9.9556e-05 0.0114395 0.0091451 38 2954 24 6.99608e+06 206020 678818. 2348.85 12.25 0.0931805 0.0757217 26626 170182 -1 2399 20 1511 1916 188350 38658 4.00985 4.00985 -154.592 -4.00985 0 0 902133. 3121.57 0.30 0.06 0.11 -1 -1 0.30 0.015368 0.0137215 91 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_099.v common 5.00 vpr 64.30 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33448 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65848 32 32 326 263 1 197 79 17 17 289 -1 unnamed_device 25.8 MiB 0.70 1036 13768 5837 7696 235 64.3 MiB 0.06 0.00 3.34348 -110.425 -3.34348 3.34348 0.78 0.000134853 0.000107977 0.0148045 0.0119895 44 2621 22 6.99608e+06 220735 787024. 2723.27 1.54 0.0512172 0.042677 27778 195446 -1 2086 21 1329 1835 136433 27905 3.57921 3.57921 -128.613 -3.57921 0 0 997811. 3452.63 0.33 0.04 0.11 -1 -1 0.33 0.0110492 0.00974235 81 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_100.v common 6.12 vpr 64.43 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33512 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65980 31 32 373 294 1 221 80 17 17 289 -1 unnamed_device 25.6 MiB 1.53 892 12464 5228 6609 627 64.4 MiB 0.07 0.00 3.32588 -102.137 -3.32588 3.32588 0.78 0.000155868 0.000124626 0.01571 0.0127984 44 2957 22 6.99608e+06 250167 787024. 2723.27 1.69 0.0604057 0.0500096 27778 195446 -1 2051 24 1889 2618 187133 41185 4.06471 4.06471 -128.196 -4.06471 0 0 997811. 3452.63 0.35 0.05 0.13 -1 -1 0.35 0.0165499 0.0147607 97 46 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_101.v common 11.89 vpr 64.51 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33880 -1 -1 17 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66060 30 32 325 268 1 198 79 17 17 289 -1 unnamed_device 25.8 MiB 1.53 1029 10050 4176 5540 334 64.5 MiB 0.05 0.00 2.88949 -94.4834 -2.88949 2.88949 0.75 0.000135469 0.00010807 0.0105786 0.00865734 36 3032 38 6.99608e+06 250167 648988. 2245.63 7.72 0.0841027 0.068956 26050 158493 -1 2462 26 1742 2689 257105 55538 3.57127 3.57127 -126.488 -3.57127 0 0 828058. 2865.25 0.29 0.05 0.10 -1 -1 0.29 0.0124697 0.0108408 88 46 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_102.v common 5.72 vpr 64.29 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33708 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65828 32 32 350 275 1 209 78 17 17 289 -1 unnamed_device 25.8 MiB 0.85 975 9706 3418 4528 1760 64.3 MiB 0.04 0.00 3.51478 -115.229 -3.51478 3.51478 0.72 0.000149982 0.000118909 0.0111031 0.00918119 58 2300 43 6.99608e+06 206020 997811. 3452.63 1.93 0.064282 0.053751 30370 251734 -1 1818 22 1866 2718 193440 43312 4.17965 4.17965 -137.771 -4.17965 0 0 1.25153e+06 4330.55 0.42 0.05 0.16 -1 -1 0.42 0.0128223 0.0112781 88 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_103.v common 9.85 vpr 64.64 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33708 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66196 32 32 386 307 1 240 80 17 17 289 -1 unnamed_device 25.9 MiB 2.66 997 13840 5870 7545 425 64.6 MiB 0.07 0.00 3.06953 -104.458 -3.06953 3.06953 0.77 0.000162542 0.000130297 0.0165999 0.0136538 48 2706 25 6.99608e+06 235451 865456. 2994.66 4.32 0.105506 0.0867037 28354 207349 -1 2207 25 2089 2817 235698 51348 3.37127 3.37127 -128.874 -3.37127 0 0 1.05005e+06 3633.38 0.36 0.05 0.13 -1 -1 0.36 0.0140116 0.0122356 103 59 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_104.v common 6.91 vpr 64.00 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33796 -1 -1 14 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65532 29 32 269 229 1 168 75 17 17 289 -1 unnamed_device 25.4 MiB 1.30 589 10503 3015 5607 1881 64.0 MiB 0.09 0.00 3.37515 -95.8946 -3.37515 3.37515 0.71 0.000162813 0.00012636 0.0215969 0.0169224 44 1608 22 6.99608e+06 206020 787024. 2723.27 2.91 0.0748173 0.0609745 27778 195446 -1 1157 22 1157 1545 88500 21936 3.44186 3.44186 -112.917 -3.44186 0 0 997811. 3452.63 0.32 0.04 0.12 -1 -1 0.32 0.0116681 0.0101473 70 28 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_105.v common 6.89 vpr 64.38 MiB -1 -1 0.12 21432 1 0.04 -1 -1 33900 -1 -1 14 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65928 32 32 310 266 1 182 78 17 17 289 -1 unnamed_device 25.6 MiB 2.19 778 13026 5613 7123 290 64.4 MiB 0.05 0.00 3.25048 -109.445 -3.25048 3.25048 0.70 0.000123123 9.628e-05 0.0121024 0.00977263 46 2144 35 6.99608e+06 206020 828058. 2865.25 2.01 0.0569899 0.0473904 28066 200906 -1 1700 21 1457 1960 151862 33311 3.78725 3.78725 -130.937 -3.78725 0 0 1.01997e+06 3529.29 0.32 0.04 0.13 -1 -1 0.32 0.010106 0.0089701 79 55 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_106.v common 7.30 vpr 64.29 MiB -1 -1 0.12 21432 1 0.03 -1 -1 34012 -1 -1 15 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65836 31 32 326 261 1 193 78 17 17 289 -1 unnamed_device 25.8 MiB 0.78 768 12860 5463 6822 575 64.3 MiB 0.05 0.00 3.35878 -101.984 -3.35878 3.35878 0.71 0.000141012 0.000112606 0.0133012 0.0108843 48 2139 23 6.99608e+06 220735 865456. 2994.66 3.83 0.0808478 0.0668213 28354 207349 -1 1688 20 1512 2162 151830 34854 3.64452 3.64452 -123.051 -3.64452 0 0 1.05005e+06 3633.38 0.35 0.04 0.14 -1 -1 0.35 0.0110399 0.00987302 80 29 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_107.v common 7.15 vpr 64.12 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33608 -1 -1 13 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65660 29 32 262 224 1 162 74 17 17 289 -1 unnamed_device 25.5 MiB 0.93 668 9064 3938 4730 396 64.1 MiB 0.03 0.00 3.14827 -89.5957 -3.14827 3.14827 0.71 0.00012731 0.000100999 0.00852373 0.00677474 40 2124 39 6.99608e+06 191304 706193. 2443.58 3.58 0.0732865 0.0597547 26914 176310 -1 1542 28 1318 1724 230222 84550 3.33271 3.33271 -110.656 -3.33271 0 0 926341. 3205.33 0.30 0.06 0.11 -1 -1 0.30 0.0110057 0.00946425 68 25 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_108.v common 5.39 vpr 64.04 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33692 -1 -1 12 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65572 32 32 278 238 1 178 76 17 17 289 -1 unnamed_device 25.5 MiB 0.81 714 11276 4316 5596 1364 64.0 MiB 0.05 0.00 3.53345 -106.356 -3.53345 3.53345 0.74 0.000115877 9.0846e-05 0.0117303 0.00943446 38 2550 42 6.99608e+06 176588 678818. 2348.85 1.92 0.0471625 0.0387965 26626 170182 -1 1738 19 1413 1904 151706 33326 3.72546 3.72546 -132.226 -3.72546 0 0 902133. 3121.57 0.29 0.04 0.10 -1 -1 0.29 0.00937217 0.00839407 73 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_109.v common 8.14 vpr 64.43 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33672 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65980 31 32 373 300 1 231 80 17 17 289 -1 unnamed_device 25.9 MiB 0.92 964 13840 5841 7465 534 64.4 MiB 0.06 0.00 3.73911 -119.469 -3.73911 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66456 31 32 396 325 1 255 83 17 17 289 -1 unnamed_device 26.2 MiB 2.91 1150 15563 5800 7160 2603 64.9 MiB 0.08 0.00 3.78217 -126.879 -3.78217 3.78217 0.72 0.000152571 0.000121984 0.0194817 0.0159958 52 2961 31 6.99608e+06 294314 926341. 3205.33 4.18 0.092901 0.07671 29218 227130 -1 2428 22 2194 3068 238765 50410 4.54929 4.54929 -159.568 -4.54929 0 0 1.14541e+06 3963.36 0.37 0.08 0.14 -1 -1 0.37 0.0168207 0.0146825 113 87 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_113.v common 13.67 vpr 64.38 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33700 -1 -1 12 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65928 32 32 303 262 1 192 76 17 17 289 -1 unnamed_device 25.6 MiB 1.90 746 10796 3807 5114 1875 64.4 MiB 0.05 0.00 2.79904 -93.4911 -2.79904 2.79904 0.79 0.000144086 0.000114766 0.0137493 0.0109234 46 2189 40 6.99608e+06 176588 828058. 2865.25 8.87 0.105589 0.086219 28066 200906 -1 1665 19 1571 2082 143465 34485 3.12721 3.12721 -115.218 -3.12721 0 0 1.01997e+06 3529.29 0.36 0.05 0.15 -1 -1 0.36 0.0132537 0.0115622 80 54 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_114.v common 7.60 vpr 64.22 MiB -1 -1 0.11 21280 1 0.03 -1 -1 33672 -1 -1 11 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65764 32 32 290 244 1 172 75 17 17 289 -1 unnamed_device 25.6 MiB 0.72 710 10187 3352 4838 1997 64.2 MiB 0.04 0.00 3.13712 -99.5126 -3.13712 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66172 32 32 393 312 1 235 81 17 17 289 -1 unnamed_device 26.1 MiB 1.47 1100 11806 3822 5831 2153 64.6 MiB 0.06 0.00 4.47739 -141.385 -4.47739 4.47739 0.76 0.000233728 0.000200978 0.0138041 0.0112448 40 3559 25 6.99608e+06 250167 706193. 2443.58 4.09 0.0961918 0.0791963 26914 176310 -1 3016 20 2356 3545 366226 74975 5.362 5.362 -188.192 -5.362 0 0 926341. 3205.33 0.32 0.07 0.11 -1 -1 0.32 0.0143298 0.0127568 105 62 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_118.v common 5.40 vpr 63.77 MiB -1 -1 0.11 20976 1 0.03 -1 -1 33748 -1 -1 13 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65304 31 32 229 197 1 137 76 17 17 289 -1 unnamed_device 25.2 MiB 0.84 688 9836 2876 6379 581 63.8 MiB 0.02 0.00 2.70223 -75.658 -2.70223 2.70223 0.75 5.732e-05 4.3904e-05 0.00515969 0.00407775 36 1971 44 6.99608e+06 191304 648988. 2245.63 1.93 0.0372156 0.0307443 26050 158493 -1 1462 23 936 1571 119790 27595 2.96857 2.96857 -99.7957 -2.96857 0 0 828058. 2865.25 0.29 0.03 0.10 -1 -1 0.29 0.00859411 0.00749666 54 -1 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_119.v common 10.12 vpr 64.69 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33536 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66244 32 32 412 334 1 258 84 17 17 289 -1 unnamed_device 26.0 MiB 2.77 1067 15822 6418 7841 1563 64.7 MiB 0.07 0.00 4.12182 -133.831 -4.12182 4.12182 0.71 0.000168957 0.000135324 0.0175438 0.0143492 48 3489 44 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on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66196 32 32 396 299 1 228 79 17 17 289 -1 unnamed_device 26.1 MiB 0.91 975 11402 3989 5536 1877 64.6 MiB 0.05 0.00 4.91202 -137.531 -4.91202 4.91202 0.72 0.000159367 0.000127618 0.0135563 0.0112362 44 3717 28 6.99608e+06 220735 787024. 2723.27 2.55 0.0685355 0.0566355 27778 195446 -1 2415 24 2140 3204 255901 53968 4.9454 4.9454 -159.337 -4.9454 0 0 997811. 3452.63 0.34 0.05 0.13 -1 -1 0.34 0.0145735 0.0129418 98 31 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_123.v common 6.72 vpr 63.76 MiB -1 -1 0.12 21128 1 0.03 -1 -1 33684 -1 -1 12 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65292 30 32 224 207 1 132 74 17 17 289 -1 unnamed_device 25.0 MiB 0.64 450 11234 3301 6169 1764 63.8 MiB 0.04 0.00 2.28455 -76.8073 -2.28455 2.28455 0.70 0.000293004 0.000223631 0.0106346 0.0083509 40 1263 32 6.99608e+06 176588 706193. 2443.58 3.51 0.0613623 0.049386 26914 176310 -1 1095 17 733 932 71752 17907 2.56272 2.56272 -93.0983 -2.56272 0 0 926341. 3205.33 0.30 0.02 0.11 -1 -1 0.30 0.00680371 0.0059162 53 29 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_124.v common 9.11 vpr 63.73 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33884 -1 -1 14 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65264 30 32 286 239 1 157 76 17 17 289 -1 unnamed_device 25.2 MiB 3.51 856 9036 3302 4238 1496 63.7 MiB 0.04 0.00 3.02532 -101.806 -3.02532 3.02532 0.74 0.000124718 9.8806e-05 0.00973504 0.00800247 34 2198 29 6.99608e+06 206020 618332. 2139.56 2.99 0.0623955 0.0510699 25762 151098 -1 1798 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66300 32 32 376 307 1 234 81 17 17 289 -1 unnamed_device 26.1 MiB 3.14 1251 9181 3030 4242 1909 64.7 MiB 0.05 0.00 3.25282 -111.48 -3.25282 3.25282 0.72 0.000179591 0.000147721 0.0111963 0.00931583 40 3571 46 6.99608e+06 250167 706193. 2443.58 16.76 0.119089 0.0982703 26914 176310 -1 3141 28 2361 3556 426580 111231 4.16992 4.16992 -146.433 -4.16992 0 0 926341. 3205.33 0.32 0.09 0.10 -1 -1 0.32 0.0151673 0.0132849 103 69 -1 -1 -1 -1 +fixed_k6_frac_2uripple_N8_22nm.xml mult_128.v common 10.55 vpr 64.77 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33904 -1 -1 19 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66328 31 32 409 331 1 258 82 17 17 289 -1 unnamed_device 26.1 MiB 2.35 1025 14144 5003 6742 2399 64.8 MiB 0.08 0.00 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65720 32 32 283 315 1 215 84 17 17 289 -1 unnamed_device 25.6 MiB 2.00 1328 8868 2256 5650 962 64.2 MiB 0.05 0.00 6.55975 -137.602 -6.55975 6.55975 0.82 0.000203855 0.000165086 0.0137332 0.0115774 44 3032 20 6.79088e+06 269440 787024. 2723.27 3.61 0.102749 0.0871772 27118 194962 -1 2614 17 1197 3147 169992 38812 6.68505 6.68505 -153.135 -6.68505 0 0 997811. 3452.63 0.34 0.04 0.15 -1 -1 0.34 0.0134462 0.0121774 134 188 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml mult_014.v common 11.53 vpr 64.20 MiB -1 -1 0.19 21736 14 0.35 -1 -1 36376 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65740 32 32 303 335 1 230 86 17 17 289 -1 unnamed_device 25.6 MiB 2.00 1364 8780 2186 5857 737 64.2 MiB 0.05 0.00 7.13946 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65580 32 32 267 299 1 200 81 17 17 289 -1 unnamed_device 25.3 MiB 1.74 1145 11806 3061 6739 2006 64.0 MiB 0.06 0.00 6.71317 -139.324 -6.71317 6.71317 0.75 0.000191387 0.000155986 0.0169752 0.0140595 38 2829 20 6.79088e+06 229024 678818. 2348.85 3.42 0.0982272 0.0824191 25966 169698 -1 2501 17 1192 3256 179119 40013 6.96377 6.96377 -157.064 -6.96377 0 0 902133. 3121.57 0.29 0.05 0.10 -1 -1 0.29 0.0146793 0.013407 122 172 -1 -1 -1 -1 +fixed_k6_frac_N8_22nm.xml mult_088.v common 9.25 vpr 64.52 MiB -1 -1 0.20 22192 15 0.42 -1 -1 36548 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66068 32 32 334 366 1 254 87 17 17 289 -1 unnamed_device 26.0 MiB 1.82 1485 10455 2910 6157 1388 64.5 MiB 0.06 0.00 7.43275 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65752 32 32 336 268 1 181 91 17 17 289 -1 unnamed_device 25.6 MiB 1.28 1080 16819 5224 9596 1999 64.2 MiB 0.09 0.00 3.69312 -114.07 -3.69312 3.69312 0.72 0.000168445 0.000129878 0.0153356 0.0120453 34 2885 24 6.87369e+06 377294 618332. 2139.56 3.01 0.0879662 0.0720612 25762 151098 -1 2428 23 1811 3487 281304 63110 3.6981 3.6981 -133.056 -3.6981 0 0 787024. 2723.27 0.26 0.05 0.10 -1 -1 0.26 0.0112588 0.00963035 131 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_006.v common 6.48 vpr 64.18 MiB -1 -1 0.13 21432 1 0.04 -1 -1 33564 -1 -1 30 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65716 32 32 366 295 1 189 94 17 17 289 -1 unnamed_device 25.6 MiB 1.47 1056 14365 3715 9052 1598 64.2 MiB 0.07 0.00 2.67957 -97.3119 -2.67957 2.67957 0.71 0.000244036 0.000210567 0.0135106 0.0110155 28 2630 21 6.87369e+06 419215 531479. 1839.03 2.38 0.0842348 0.0688878 24610 126494 -1 2345 20 1438 2340 174245 39974 3.19991 3.19991 -127.926 -3.19991 0 0 648988. 2245.63 0.25 0.04 0.09 -1 -1 0.25 0.0107298 0.00934058 136 55 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_007.v common 7.43 vpr 63.71 MiB -1 -1 0.14 21280 1 0.03 -1 -1 34180 -1 -1 19 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65240 27 32 259 221 1 141 78 17 17 289 -1 unnamed_device 25.0 MiB 2.33 706 8212 2306 5077 829 63.7 MiB 0.04 0.00 2.94598 -86.4465 -2.94598 2.94598 0.75 0.0001376 0.000108436 0.0080685 0.00649658 34 1700 20 6.87369e+06 265503 618332. 2139.56 2.42 0.0636292 0.051856 25762 151098 -1 1437 18 1024 1701 120628 28450 2.95196 2.95196 -101.788 -2.95196 0 0 787024. 2723.27 0.27 0.03 0.10 -1 -1 0.27 0.00760307 0.00662556 97 26 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_008.v common 6.01 vpr 63.91 MiB -1 -1 0.13 21128 1 0.03 -1 -1 33580 -1 -1 32 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65444 31 32 271 219 1 164 95 17 17 289 -1 unnamed_device 25.2 MiB 0.91 943 16295 4941 8881 2473 63.9 MiB 0.07 0.00 2.73725 -86.2492 -2.73725 2.73725 0.75 0.000159636 0.000126045 0.0115444 0.0092046 34 2191 19 6.87369e+06 447163 618332. 2139.56 2.38 0.0696495 0.0572166 25762 151098 -1 1850 19 981 1643 114799 26495 2.69066 2.69066 -98.6049 -2.69066 0 0 787024. 2723.27 0.28 0.03 0.10 -1 -1 0.28 0.0100355 0.00889563 119 -1 -1 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65460 32 32 298 248 1 162 80 17 17 289 -1 unnamed_device 25.3 MiB 3.87 863 8680 1965 5842 873 63.9 MiB 0.05 0.00 3.21683 -110.279 -3.21683 3.21683 0.77 0.000184307 9.6536e-05 0.00892291 0.00713963 34 2237 20 6.87369e+06 223581 618332. 2139.56 1.14 0.0472948 0.0388968 25762 151098 -1 1807 21 1276 2130 150242 35265 3.03816 3.03816 -122.778 -3.03816 0 0 787024. 2723.27 0.28 0.05 0.09 -1 -1 0.28 0.0112342 0.00963378 107 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_011.v common 7.76 vpr 63.76 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33712 -1 -1 16 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65292 30 32 303 262 1 148 78 17 17 289 -1 unnamed_device 25.0 MiB 3.18 710 9208 2144 6180 884 63.8 MiB 0.04 0.00 3.28893 -96.8988 -3.28893 3.28893 0.73 0.000119896 9.3961e-05 0.00857837 0.0069742 28 1997 22 6.87369e+06 223581 531479. 1839.03 2.00 0.061871 0.0506106 24610 126494 -1 1637 18 1034 1563 100196 25459 3.40321 3.40321 -115.593 -3.40321 0 0 648988. 2245.63 0.25 0.03 0.09 -1 -1 0.25 0.00817259 0.00719615 98 58 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_012.v common 6.57 vpr 63.89 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33572 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65424 32 32 276 237 1 171 81 17 17 289 -1 unnamed_device 25.2 MiB 2.21 870 8131 2113 5564 454 63.9 MiB 0.04 0.00 3.0081 -96.5071 -3.0081 3.0081 0.72 0.000124228 9.9226e-05 0.00712683 0.00577504 30 2114 22 6.87369e+06 237555 556674. 1926.21 1.87 0.0486835 0.039838 25186 138497 -1 1705 22 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65100 29 32 248 215 1 142 80 17 17 289 -1 unnamed_device 24.9 MiB 1.59 793 10228 2477 6510 1241 63.6 MiB 0.05 0.00 2.63557 -83.59 -2.63557 2.63557 0.73 0.000113331 8.8856e-05 0.0106324 0.00845582 32 1945 22 6.87369e+06 265503 586450. 2029.24 0.70 0.0314702 0.0258369 25474 144626 -1 1681 23 1141 1813 142292 32884 2.94131 2.94131 -98.3531 -2.94131 0 0 744469. 2576.02 0.25 0.03 0.09 -1 -1 0.25 0.0083078 0.00713473 94 21 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_016.v common 6.53 vpr 64.03 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33392 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65568 32 32 370 297 1 191 88 17 17 289 -1 unnamed_device 25.5 MiB 1.98 957 17053 6501 8060 2492 64.0 MiB 0.08 0.00 2.9366 -97.8737 -2.9366 2.9366 0.73 0.000149929 0.000119345 0.0156655 0.0124913 34 2806 37 6.87369e+06 335372 618332. 2139.56 1.86 0.0657509 0.0538756 25762 151098 -1 2131 22 1680 3014 226648 54479 3.28591 3.28591 -118.235 -3.28591 0 0 787024. 2723.27 0.26 0.05 0.09 -1 -1 0.26 0.0114547 0.0100118 135 55 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_017.v common 7.92 vpr 64.39 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33528 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65940 32 32 338 269 1 204 85 17 17 289 -1 unnamed_device 25.6 MiB 4.07 1127 16081 4650 9218 2213 64.4 MiB 0.08 0.00 3.24063 -110.977 -3.24063 3.24063 0.73 0.000143745 0.000114721 0.0148139 0.0120381 34 2938 20 6.87369e+06 293451 618332. 2139.56 1.22 0.0576222 0.0478077 25762 151098 -1 2354 21 1623 2386 190838 42205 3.31981 3.31981 -131.097 -3.31981 0 0 787024. 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64956 30 32 222 206 1 117 76 17 17 289 -1 unnamed_device 25.0 MiB 0.63 661 9676 3808 4483 1385 63.4 MiB 0.05 0.00 2.08703 -73.6588 -2.08703 2.08703 0.73 0.000172021 0.00014726 0.01089 0.00878996 32 1613 20 6.87369e+06 195634 586450. 2029.24 1.03 0.0335159 0.0275901 25474 144626 -1 1346 20 682 976 90239 19707 2.12812 2.12812 -88.2069 -2.12812 0 0 744469. 2576.02 0.22 0.02 0.09 -1 -1 0.22 0.00685587 0.00589279 71 29 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_020.v common 7.91 vpr 64.01 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33880 -1 -1 19 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65548 31 32 291 243 1 178 82 17 17 289 -1 unnamed_device 25.3 MiB 3.02 929 15212 4641 8524 2047 64.0 MiB 0.07 0.00 3.92683 -121.174 -3.92683 3.92683 0.74 0.000128846 0.000103027 0.0136292 0.0110311 28 2407 43 6.87369e+06 265503 531479. 1839.03 2.33 0.0760065 0.0624639 24610 126494 -1 1979 21 1337 1973 147851 34264 3.94076 3.94076 -142.569 -3.94076 0 0 648988. 2245.63 0.23 0.04 0.09 -1 -1 0.23 0.00919737 0.0080015 116 30 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_021.v common 6.34 vpr 64.27 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33796 -1 -1 35 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65812 32 32 342 271 1 181 99 17 17 289 -1 unnamed_device 25.5 MiB 0.94 1071 18111 4766 11268 2077 64.3 MiB 0.09 0.00 3.32799 -111.564 -3.32799 3.32799 0.78 0.000206498 0.000163652 0.0151156 0.0118275 26 2703 33 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65528 32 32 285 227 1 169 87 17 17 289 -1 unnamed_device 25.5 MiB 1.09 1109 11799 2967 7432 1400 64.0 MiB 0.06 0.00 3.57882 -107.816 -3.57882 3.57882 0.81 0.000140323 0.000105821 0.0112221 0.00902206 36 2148 32 6.87369e+06 321398 648988. 2245.63 3.42 0.0823554 0.0669885 26050 158493 -1 2007 21 1162 2146 151999 33811 3.6791 3.6791 -124.476 -3.6791 0 0 828058. 2865.25 0.28 0.04 0.12 -1 -1 0.28 0.00978829 0.00846275 119 -1 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_025.v common 5.52 vpr 63.35 MiB -1 -1 0.11 20824 1 0.03 -1 -1 33616 -1 -1 12 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64872 32 32 173 169 1 114 76 17 17 289 -1 unnamed_device 24.9 MiB 0.47 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0.13 21280 1 0.03 -1 -1 33564 -1 -1 28 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65932 32 32 338 277 1 186 92 17 17 289 -1 unnamed_device 25.6 MiB 1.85 1083 12512 3640 7389 1483 64.4 MiB 0.07 0.00 3.84048 -113.176 -3.84048 3.84048 0.81 0.000171524 0.000137787 0.0113518 0.00919203 34 2698 24 6.87369e+06 391268 618332. 2139.56 1.28 0.0572273 0.0470023 25762 151098 -1 2160 19 1279 2150 155326 36874 3.82446 3.82446 -132.662 -3.82446 0 0 787024. 2723.27 0.28 0.04 0.10 -1 -1 0.28 0.00932996 0.00820786 131 47 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_029.v common 6.15 vpr 63.85 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33572 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65384 32 32 284 241 1 148 80 17 17 289 -1 unnamed_device 25.2 MiB 1.01 665 7820 1974 5060 786 63.9 MiB 0.04 0.00 2.61357 -87.3158 -2.61357 2.61357 0.73 0.000132456 0.000105391 0.00798428 0.00654409 34 1827 23 6.87369e+06 223581 618332. 2139.56 2.43 0.0632714 0.0518983 25762 151098 -1 1505 22 994 1658 108082 28011 2.89931 2.89931 -106.432 -2.89931 0 0 787024. 2723.27 0.29 0.03 0.10 -1 -1 0.29 0.00940973 0.00813339 99 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_030.v common 5.75 vpr 63.80 MiB -1 -1 0.11 21432 1 0.03 -1 -1 33804 -1 -1 26 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65336 30 32 262 227 1 138 88 17 17 289 -1 unnamed_device 25.1 MiB 1.19 782 10228 2645 6565 1018 63.8 MiB 0.05 0.00 2.60257 -84.4976 -2.60257 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65232 31 32 271 231 1 149 89 17 17 289 -1 unnamed_device 25.2 MiB 0.87 915 10187 2509 6498 1180 63.7 MiB 0.05 0.00 2.8296 -90.3402 -2.8296 2.8296 0.71 0.000126158 9.8376e-05 0.00763778 0.00612714 26 2234 24 6.87369e+06 363320 503264. 1741.40 1.82 0.0501923 0.0410387 24322 120374 -1 2005 23 1249 2094 200792 47243 3.21386 3.21386 -115.636 -3.21386 0 0 618332. 2139.56 0.21 0.04 0.07 -1 -1 0.21 0.00919066 0.00797581 102 26 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_034.v common 6.59 vpr 63.90 MiB -1 -1 0.11 21280 1 0.04 -1 -1 33664 -1 -1 25 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65436 29 32 291 250 1 154 86 17 17 289 -1 unnamed_device 25.2 MiB 2.96 735 14639 4029 8835 1775 63.9 MiB 0.06 0.00 2.48336 -81.0645 -2.48336 2.48336 0.72 0.000125478 9.9492e-05 0.0113443 0.00918515 34 1836 23 6.87369e+06 349346 618332. 2139.56 1.07 0.0478053 0.0389883 25762 151098 -1 1584 20 1105 1616 112033 27442 2.50877 2.50877 -100.049 -2.50877 0 0 787024. 2723.27 0.26 0.03 0.09 -1 -1 0.26 0.0101838 0.00897018 106 48 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_035.v common 9.04 vpr 64.42 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33692 -1 -1 40 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65964 32 32 367 282 1 201 104 17 17 289 -1 unnamed_device 25.8 MiB 3.51 1273 16208 4135 10440 1633 64.4 MiB 0.09 0.00 3.29679 -102.493 -3.29679 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65876 31 32 370 297 1 187 89 17 17 289 -1 unnamed_device 25.6 MiB 2.61 950 15335 4183 8717 2435 64.3 MiB 0.08 0.00 2.9678 -96.0281 -2.9678 2.9678 0.73 0.000151748 0.000120922 0.014081 0.0114975 34 2481 19 6.87369e+06 363320 618332. 2139.56 1.16 0.0489393 0.0402733 25762 151098 -1 2022 21 1556 2661 178874 41335 3.06646 3.06646 -115.856 -3.06646 0 0 787024. 2723.27 0.28 0.04 0.09 -1 -1 0.28 0.0107856 0.00943507 136 57 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_039.v common 8.80 vpr 64.31 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33844 -1 -1 25 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65856 31 32 377 302 1 237 88 17 17 289 -1 unnamed_device 25.6 MiB 4.07 1377 16663 5420 9071 2172 64.3 MiB 0.10 0.00 4.27988 -134.877 -4.27988 4.27988 0.76 0.000154348 0.000123354 0.0165792 0.0133157 34 3464 34 6.87369e+06 349346 618332. 2139.56 1.95 0.0683121 0.056095 25762 151098 -1 2800 21 2268 3292 266510 59793 5.11439 5.11439 -172.819 -5.11439 0 0 787024. 2723.27 0.28 0.05 0.10 -1 -1 0.28 0.0110788 0.00973955 159 60 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_040.v common 7.79 vpr 64.42 MiB -1 -1 0.16 21584 1 0.03 -1 -1 33748 -1 -1 27 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65968 31 32 383 305 1 212 90 17 17 289 -1 unnamed_device 25.8 MiB 3.61 1104 16170 4851 9534 1785 64.4 MiB 0.10 0.00 4.33584 -134.156 -4.33584 4.33584 0.76 0.000162454 0.000132104 0.0163528 0.0133785 34 2732 24 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66488 32 32 457 356 1 225 102 17 17 289 -1 unnamed_device 26.2 MiB 3.40 1166 11288 2683 8074 531 64.9 MiB 0.08 0.00 3.85958 -126.282 -3.85958 3.85958 0.74 0.000183091 0.000147252 0.01366 0.0110923 30 3164 24 6.87369e+06 531006 556674. 1926.21 0.95 0.0538959 0.0446601 25186 138497 -1 2424 18 1487 2576 155155 36636 3.84846 3.84846 -142.804 -3.84846 0 0 706193. 2443.58 0.28 0.05 0.09 -1 -1 0.28 0.0153644 0.0134995 173 84 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_044.v common 6.43 vpr 63.62 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33896 -1 -1 22 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65148 31 32 261 225 1 148 85 17 17 289 -1 unnamed_device 24.9 MiB 1.75 673 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65696 32 32 353 287 1 203 86 17 17 289 -1 unnamed_device 25.5 MiB 2.98 1151 14450 5245 7331 1874 64.2 MiB 0.08 0.00 3.93315 -123.633 -3.93315 3.93315 0.70 0.000149444 0.000120164 0.0145137 0.0117218 34 2793 19 6.87369e+06 307425 618332. 2139.56 2.40 0.0774796 0.0636874 25762 151098 -1 2232 18 1263 1690 125238 29190 3.7351 3.7351 -137.821 -3.7351 0 0 787024. 2723.27 0.26 0.03 0.09 -1 -1 0.26 0.00973687 0.00862588 136 52 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_049.v common 8.38 vpr 64.17 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33540 -1 -1 32 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65712 32 32 361 291 1 189 96 17 17 289 -1 unnamed_device 25.6 MiB 3.08 1084 17616 5247 9777 2592 64.2 MiB 0.09 0.00 2.9366 -101.225 -2.9366 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65744 31 32 373 299 1 204 85 17 17 289 -1 unnamed_device 25.6 MiB 2.21 1101 16639 5836 8314 2489 64.2 MiB 0.09 0.00 3.72318 -118.378 -3.72318 3.72318 0.73 0.000172336 0.000139218 0.0166725 0.0136177 34 3159 35 6.87369e+06 307425 618332. 2139.56 1.56 0.0661635 0.0542071 25762 151098 -1 2464 20 1830 2996 241491 56797 4.19236 4.19236 -141.615 -4.19236 0 0 787024. 2723.27 0.29 0.05 0.09 -1 -1 0.29 0.0114895 0.010097 141 58 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_054.v common 6.95 vpr 64.09 MiB -1 -1 0.11 21584 1 0.03 -1 -1 33668 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65624 32 32 387 315 1 194 85 17 17 289 -1 unnamed_device 25.5 MiB 2.76 1116 14779 5496 6899 2384 64.1 MiB 0.08 0.00 3.40015 -110.43 -3.40015 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65976 32 32 358 289 1 183 90 17 17 289 -1 unnamed_device 25.6 MiB 2.24 855 15366 5497 7042 2827 64.4 MiB 0.07 0.00 3.61045 -115.443 -3.61045 3.61045 0.71 0.000152797 0.000120752 0.0134075 0.0108867 34 2411 24 6.87369e+06 363320 618332. 2139.56 1.24 0.0596297 0.0493768 25762 151098 -1 1886 21 1578 2436 168551 40279 3.91776 3.91776 -134.235 -3.91776 0 0 787024. 2723.27 0.26 0.04 0.10 -1 -1 0.26 0.0108917 0.00943927 132 51 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_068.v common 7.34 vpr 64.13 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33660 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65668 32 32 353 285 1 188 91 17 17 289 -1 unnamed_device 25.3 MiB 2.19 1029 7843 1659 5721 463 64.1 MiB 0.05 0.00 3.81848 -116.076 -3.81848 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65888 30 32 329 273 1 167 96 17 17 289 -1 unnamed_device 25.6 MiB 2.64 944 13017 3544 8299 1174 64.3 MiB 0.07 0.00 2.86255 -87.1213 -2.86255 2.86255 0.74 0.000133966 0.000105783 0.01092 0.00880157 26 2413 18 6.87369e+06 475111 503264. 1741.40 1.71 0.0592457 0.0480432 24322 120374 -1 2184 20 1216 2189 186174 43748 3.05256 3.05256 -103.814 -3.05256 0 0 618332. 2139.56 0.23 0.04 0.07 -1 -1 0.23 0.00942083 0.00826237 124 52 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_072.v common 6.89 vpr 63.98 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33596 -1 -1 35 28 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65512 28 32 277 229 1 156 95 17 17 289 -1 unnamed_device 25.5 MiB 1.89 877 17375 5695 8921 2759 64.0 MiB 0.08 0.00 3.27479 -87.4415 -3.27479 3.27479 0.76 0.000135545 0.000101006 0.0123086 0.00974832 28 2031 25 6.87369e+06 489084 531479. 1839.03 2.38 0.0592085 0.0476593 24610 126494 -1 1809 20 1287 2391 184367 42488 3.7374 3.7374 -110.349 -3.7374 0 0 648988. 2245.63 0.25 0.04 0.08 -1 -1 0.25 0.00861921 0.0073857 117 20 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_073.v common 8.37 vpr 63.96 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33844 -1 -1 17 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65496 30 32 317 269 1 155 79 17 17 289 -1 unnamed_device 25.5 MiB 2.83 812 6839 2728 3712 399 64.0 MiB 0.05 0.00 3.16363 -98.5398 -3.16363 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65880 32 32 350 275 1 214 87 17 17 289 -1 unnamed_device 25.6 MiB 3.44 964 8919 2229 6134 556 64.3 MiB 0.06 0.00 3.78918 -120.631 -3.78918 3.78918 0.75 0.000154064 0.000124123 0.00952782 0.00751355 34 3266 31 6.87369e+06 321398 618332. 2139.56 1.81 0.0635641 0.0513512 25762 151098 -1 2386 25 2149 3323 255474 61310 4.22856 4.22856 -145.401 -4.22856 0 0 787024. 2723.27 0.28 0.06 0.10 -1 -1 0.28 0.012251 0.0106738 147 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_077.v common 9.59 vpr 64.26 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33536 -1 -1 36 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65800 32 32 385 308 1 196 100 17 17 289 -1 unnamed_device 25.5 MiB 4.03 1110 15412 3770 10563 1079 64.3 MiB 0.09 0.00 4.14037 -125.493 -4.14037 4.14037 0.73 0.000520922 0.000486904 0.0147941 0.0120286 34 2782 25 6.87369e+06 503058 618332. 2139.56 2.74 0.0956177 0.0781224 25762 151098 -1 2256 21 1529 2600 182099 43123 4.14195 4.14195 -139.978 -4.14195 0 0 787024. 2723.27 0.29 0.09 0.09 -1 -1 0.29 0.0212466 0.0181467 147 62 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_078.v common 9.07 vpr 64.43 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33740 -1 -1 41 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65972 32 32 387 309 1 192 105 17 17 289 -1 unnamed_device 25.8 MiB 3.25 1153 19618 5847 10986 2785 64.4 MiB 0.10 0.00 3.56482 -117.694 -3.56482 3.56482 0.76 0.000164464 0.000130913 0.0164663 0.0134914 28 2942 24 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65812 32 32 340 270 1 204 87 17 17 289 -1 unnamed_device 25.6 MiB 2.51 1190 11031 3222 7159 650 64.3 MiB 0.06 0.00 4.00821 -125.157 -4.00821 4.00821 0.72 0.000168424 0.000135328 0.0109388 0.00890455 30 2911 45 6.87369e+06 321398 556674. 1926.21 3.72 0.0724063 0.0597154 25186 138497 -1 2285 23 1414 2342 158031 36705 4.01676 4.01676 -141.669 -4.01676 0 0 706193. 2443.58 0.25 0.05 0.08 -1 -1 0.25 0.0119858 0.0103686 140 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_082.v common 6.21 vpr 64.43 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33772 -1 -1 28 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65972 31 32 340 275 1 201 91 17 17 289 -1 unnamed_device 25.8 MiB 2.29 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65396 32 32 243 205 1 149 81 17 17 289 -1 unnamed_device 25.2 MiB 0.66 755 14781 4333 8649 1799 63.9 MiB 0.07 0.00 3.18563 -97.6467 -3.18563 3.18563 0.70 0.000115092 9.069e-05 0.0122065 0.00972859 28 1730 16 6.87369e+06 237555 531479. 1839.03 1.99 0.0563377 0.0462988 24610 126494 -1 1498 18 794 1175 74817 19387 2.95201 2.95201 -107.356 -2.95201 0 0 648988. 2245.63 0.22 0.02 0.07 -1 -1 0.22 0.00739981 0.00648219 96 -1 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_087.v common 9.88 vpr 64.17 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33832 -1 -1 34 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65708 32 32 373 302 1 184 98 17 17 289 -1 unnamed_device 25.6 MiB 4.63 1157 12923 3589 8004 1330 64.2 MiB 0.07 0.00 3.54952 -114.198 -3.54952 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65112 31 32 245 205 1 153 83 17 17 289 -1 unnamed_device 25.1 MiB 0.78 864 12863 4361 6572 1930 63.6 MiB 0.08 0.00 3.17463 -100.379 -3.17463 3.17463 0.74 0.00022587 0.000194187 0.0140422 0.01113 32 2125 25 6.87369e+06 279477 586450. 2029.24 2.35 0.0576364 0.0465704 25474 144626 -1 1752 20 1149 1970 157093 34601 2.93301 2.93301 -111.886 -2.93301 0 0 744469. 2576.02 0.27 0.04 0.11 -1 -1 0.27 0.00805287 0.00690879 99 -1 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_091.v common 9.19 vpr 64.31 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33976 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65856 32 32 348 274 1 215 87 17 17 289 -1 unnamed_device 25.8 MiB 3.12 1089 14679 5136 7198 2345 64.3 MiB 0.08 0.00 3.74338 -119.577 -3.74338 3.74338 0.74 0.000183748 0.000147407 0.0151095 0.0122815 36 2817 21 6.87369e+06 321398 648988. 2245.63 3.25 0.0938752 0.0774042 26050 158493 -1 2379 19 1881 2570 209164 46169 4.05846 4.05846 -145.422 -4.05846 0 0 828058. 2865.25 0.30 0.05 0.10 -1 -1 0.30 0.0104754 0.00911551 145 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_092.v common 6.91 vpr 64.32 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33828 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65860 32 32 356 289 1 202 91 17 17 289 -1 unnamed_device 25.6 MiB 2.72 1148 9883 2684 6493 706 64.3 MiB 0.06 0.00 4.30764 -127.498 -4.30764 4.30764 0.76 0.000149995 0.000120071 0.0094485 0.00772072 34 2976 21 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on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65412 27 32 255 219 1 139 80 17 17 289 -1 unnamed_device 25.2 MiB 1.00 716 12980 4068 7724 1188 63.9 MiB 0.05 0.00 2.8908 -84.3979 -2.8908 2.8908 0.73 0.000121255 9.5951e-05 0.0104137 0.00833789 26 1936 21 6.87369e+06 293451 503264. 1741.40 2.18 0.048473 0.0397316 24322 120374 -1 1659 22 1173 1668 139001 31101 2.99326 2.99326 -105.243 -2.99326 0 0 618332. 2139.56 0.24 0.03 0.08 -1 -1 0.24 0.00801848 0.00691048 96 26 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_096.v common 8.63 vpr 64.45 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33856 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65992 32 32 421 327 1 233 88 17 17 289 -1 unnamed_device 25.9 MiB 3.89 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66088 31 32 373 294 1 197 97 17 17 289 -1 unnamed_device 25.8 MiB 1.89 1023 11863 2847 8304 712 64.5 MiB 0.07 0.00 3.46135 -103.482 -3.46135 3.46135 0.69 0.000286933 0.000251085 0.0115893 0.00925193 26 2731 22 6.87369e+06 475111 503264. 1741.40 0.76 0.0396244 0.032537 24322 120374 -1 2490 23 1753 2881 216390 50967 4.43126 4.43126 -138.919 -4.43126 0 0 618332. 2139.56 0.22 0.05 0.07 -1 -1 0.22 0.0122655 0.0106192 149 46 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_101.v common 6.68 vpr 64.15 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33896 -1 -1 31 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65692 30 32 325 268 1 172 93 17 17 289 -1 unnamed_device 25.6 MiB 2.03 1027 16263 4796 9554 1913 64.2 MiB 0.08 0.00 2.8846 -87.7471 -2.8846 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65048 29 32 269 229 1 150 80 17 17 289 -1 unnamed_device 25.0 MiB 1.91 776 14356 5588 6389 2379 63.5 MiB 0.06 0.00 3.00718 -96.4105 -3.00718 3.00718 0.76 0.000131974 0.00010628 0.0116603 0.00937845 32 1738 21 6.87369e+06 265503 586450. 2029.24 0.71 0.0328013 0.0270698 25474 144626 -1 1467 20 1243 1787 126078 28928 2.93216 2.93216 -110.575 -2.93216 0 0 744469. 2576.02 0.25 0.03 0.09 -1 -1 0.25 0.00875992 0.00723407 101 28 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_105.v common 5.61 vpr 63.74 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33740 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65272 32 32 310 266 1 176 81 17 17 289 -1 unnamed_device 25.0 MiB 1.62 801 10231 2379 7192 660 63.7 MiB 0.05 0.00 3.56661 -98.9505 -3.56661 3.56661 0.74 0.000245836 0.000213336 0.0106213 0.00857915 34 2412 42 6.87369e+06 237555 618332. 2139.56 1.40 0.0548416 0.04489 25762 151098 -1 1761 14 861 1149 94911 22628 3.26184 3.26184 -119.63 -3.26184 0 0 787024. 2723.27 0.25 0.02 0.10 -1 -1 0.25 0.00805252 0.00725721 112 55 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_106.v common 5.43 vpr 64.07 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33880 -1 -1 39 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65612 31 32 326 261 1 178 102 17 17 289 -1 unnamed_device 25.5 MiB 1.66 996 15334 3984 9897 1453 64.1 MiB 0.08 0.00 3.69012 -107.789 -3.69012 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65748 31 32 373 300 1 185 100 17 17 289 -1 unnamed_device 25.6 MiB 3.09 955 12628 3274 8586 768 64.2 MiB 0.08 0.00 3.08228 -102.484 -3.08228 3.08228 0.77 0.000266701 0.000220531 0.0117197 0.00933384 28 2384 34 6.87369e+06 517032 531479. 1839.03 2.40 0.0785619 0.0640003 24610 126494 -1 2032 20 1550 2398 159960 37732 3.08356 3.08356 -121.282 -3.08356 0 0 648988. 2245.63 0.24 0.06 0.08 -1 -1 0.24 0.0156425 0.0136407 141 60 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_110.v common 7.08 vpr 63.83 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33600 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65364 31 32 265 230 1 169 80 17 17 289 -1 unnamed_device 25.2 MiB 3.18 748 9540 2190 6415 935 63.8 MiB 0.05 0.00 3.0319 -93.4677 -3.0319 3.0319 0.73 0.00016598 0.000129757 0.00949625 0.00761387 36 2082 23 6.87369e+06 237555 648988. 2245.63 1.23 0.0541584 0.0445379 26050 158493 -1 1580 19 1231 1755 113667 28657 2.97131 2.97131 -108.632 -2.97131 0 0 828058. 2865.25 0.29 0.03 0.10 -1 -1 0.29 0.00772827 0.00679798 105 30 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_111.v common 6.77 vpr 64.25 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33820 -1 -1 31 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65796 32 32 349 286 1 177 95 17 17 289 -1 unnamed_device 25.5 MiB 3.14 1015 16079 5400 8221 2458 64.3 MiB 0.08 0.00 2.9036 -95.7985 -2.9036 2.9036 0.72 0.00014607 0.000116554 0.0133035 0.0107618 28 2556 24 6.87369e+06 433189 531479. 1839.03 0.99 0.0442708 0.0363781 24610 126494 -1 2232 20 1166 1846 156431 34935 3.37821 3.37821 -116.284 -3.37821 0 0 648988. 2245.63 0.24 0.04 0.08 -1 -1 0.24 0.0099573 0.0085002 129 54 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_112.v common 8.59 vpr 64.26 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33744 -1 -1 32 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65804 31 32 396 325 1 185 95 17 17 289 -1 unnamed_device 25.6 MiB 3.43 904 16511 5820 8241 2450 64.3 MiB 0.10 0.00 2.9696 -100.898 -2.9696 2.9696 0.75 0.000157014 0.000125449 0.0179571 0.0145224 30 2261 23 6.87369e+06 447163 556674. 1926.21 2.41 0.0799583 0.0652839 25186 138497 -1 1675 24 1407 2235 126469 30408 3.18561 3.18561 -120.219 -3.18561 0 0 706193. 2443.58 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65516 32 32 290 244 1 177 82 17 17 289 -1 unnamed_device 25.3 MiB 1.63 1074 11652 3537 6894 1221 64.0 MiB 0.05 0.00 3.21863 -106.506 -3.21863 3.21863 0.74 0.000132886 0.000106253 0.010144 0.0081764 34 2509 25 6.87369e+06 251529 618332. 2139.56 1.30 0.0508792 0.0415649 25762 151098 -1 2188 20 1455 2169 188854 42311 3.4651 3.4651 -126.207 -3.4651 0 0 787024. 2723.27 0.30 0.04 0.10 -1 -1 0.30 0.00858087 0.0074946 114 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_115.v common 6.51 vpr 64.04 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33684 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65572 32 32 318 257 1 197 86 17 17 289 -1 unnamed_device 25.5 MiB 2.64 1057 8969 2073 6209 687 64.0 MiB 0.05 0.00 3.91378 -113.603 -3.91378 3.91378 0.70 0.000238904 0.000209616 0.00869461 0.00713112 34 2694 28 6.87369e+06 307425 618332. 2139.56 1.24 0.0531898 0.0443869 25762 151098 -1 2185 19 1432 2014 141452 34170 4.02506 4.02506 -136.31 -4.02506 0 0 787024. 2723.27 0.27 0.03 0.10 -1 -1 0.27 0.00913179 0.00785663 132 27 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_116.v common 6.93 vpr 63.84 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33792 -1 -1 29 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65368 29 32 324 268 1 169 90 17 17 289 -1 unnamed_device 25.3 MiB 2.73 934 11949 3086 7890 973 63.8 MiB 0.06 0.00 3.33293 -95.2588 -3.33293 3.33293 0.71 0.00013841 0.000111124 0.0102206 0.00815018 30 2123 19 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66036 32 32 412 334 1 194 99 17 17 289 -1 unnamed_device 25.8 MiB 1.93 1100 18339 5192 11375 1772 64.5 MiB 0.10 0.00 3.50715 -121.196 -3.50715 3.50715 0.70 0.000166282 0.000132696 0.0163836 0.0131518 34 2438 24 6.87369e+06 489084 618332. 2139.56 2.35 0.0855931 0.0702696 25762 151098 -1 2154 24 1628 2385 186247 41559 4.09906 4.09906 -145.649 -4.09906 0 0 787024. 2723.27 0.26 0.04 0.09 -1 -1 0.26 0.0122555 0.0105675 145 87 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_120.v common 8.28 vpr 64.07 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33744 -1 -1 16 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65612 32 32 376 318 1 168 80 17 17 289 -1 unnamed_device 25.3 MiB 4.44 881 13668 3954 8564 1150 64.1 MiB 0.06 0.00 2.9898 -110.327 -2.9898 2.9898 0.74 0.000146271 0.000115779 0.0135272 0.0109219 34 2197 22 6.87369e+06 223581 618332. 2139.56 1.17 0.0584902 0.0476899 25762 151098 -1 1931 23 1624 2347 190834 43016 3.29991 3.29991 -134.553 -3.29991 0 0 787024. 2723.27 0.27 0.04 0.10 -1 -1 0.27 0.0110556 0.00946399 114 93 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_121.v common 8.00 vpr 64.29 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33388 -1 -1 32 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65836 32 32 360 293 1 182 96 17 17 289 -1 unnamed_device 25.7 MiB 2.94 1072 16959 5155 9436 2368 64.3 MiB 0.09 0.00 3.24063 -105.515 -3.24063 3.24063 0.72 0.000143863 0.000114632 0.0142268 0.0115007 26 2833 38 6.87369e+06 447163 503264. 1741.40 2.37 0.0766633 0.0628852 24322 120374 -1 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MiB -1 -1 0.12 21128 1 0.03 -1 -1 33864 -1 -1 15 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65300 30 32 224 207 1 137 77 17 17 289 -1 unnamed_device 25.0 MiB 1.36 683 9205 2299 6444 462 63.8 MiB 0.04 0.00 2.48956 -79.9946 -2.48956 2.48956 0.74 0.000104048 8.1067e-05 0.00727336 0.00579483 34 1686 23 6.87369e+06 209608 618332. 2139.56 1.05 0.0376266 0.0304875 25762 151098 -1 1461 21 765 1016 89244 20298 2.39767 2.39767 -98.3557 -2.39767 0 0 787024. 2723.27 0.27 0.03 0.10 -1 -1 0.27 0.00815375 0.0072083 81 29 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_124.v common 5.98 vpr 63.88 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33884 -1 -1 19 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65408 30 32 286 239 1 151 81 17 17 289 -1 unnamed_device 25.3 MiB 1.23 857 8131 2240 5280 611 63.9 MiB 0.05 0.00 3.14163 -101.814 -3.14163 3.14163 0.77 0.000216253 0.000171116 0.00821854 0.00662775 28 1931 22 6.87369e+06 265503 531479. 1839.03 2.00 0.0627463 0.0514744 24610 126494 -1 1724 20 1245 1850 146075 32295 3.03626 3.03626 -118.845 -3.03626 0 0 648988. 2245.63 0.31 0.04 0.08 -1 -1 0.31 0.0093802 0.0080685 105 29 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_125.v common 4.48 vpr 64.09 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33728 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65624 32 32 296 247 1 158 87 17 17 289 -1 unnamed_device 25.3 MiB 1.06 780 16599 5634 9026 1939 64.1 MiB 0.09 0.00 2.9879 -98.5729 -2.9879 2.9879 0.72 0.000188958 0.000147715 0.0158018 0.0123805 32 2293 22 6.87369e+06 321398 586450. 2029.24 0.75 0.0406086 0.0331442 25474 144626 -1 1853 22 1357 2354 200275 47035 3.25786 3.25786 -119.852 -3.25786 0 0 744469. 2576.02 0.28 0.05 0.09 -1 -1 0.28 0.0120672 0.0104584 109 31 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_126.v common 5.49 vpr 63.75 MiB -1 -1 0.13 21280 1 0.04 -1 -1 33840 -1 -1 29 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65284 25 32 216 194 1 123 86 17 17 289 -1 unnamed_device 25.0 MiB 0.79 513 12749 3876 6557 2316 63.8 MiB 0.04 0.00 2.9029 -67.6818 -2.9029 2.9029 0.75 9.5052e-05 7.3453e-05 0.00797551 0.00616257 26 1498 40 6.87369e+06 405241 503264. 1741.40 2.11 0.0539292 0.0432932 24322 120374 -1 1349 22 905 1665 140360 33801 3.02056 3.02056 -84.9741 -3.02056 0 0 618332. 2139.56 0.22 0.03 0.07 -1 -1 0.22 0.00767561 0.00662593 87 19 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_127.v common 6.89 vpr 64.19 MiB -1 -1 0.13 21432 1 0.05 -1 -1 33552 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65732 32 32 376 307 1 193 84 17 17 289 -1 unnamed_device 25.6 MiB 2.68 1054 16371 5257 9238 1876 64.2 MiB 0.09 0.00 3.39215 -105.953 -3.39215 3.39215 0.78 0.000144359 0.000115172 0.0164621 0.0132736 34 3005 20 6.87369e+06 279477 618332. 2139.56 1.36 0.0674562 0.0556112 25762 151098 -1 2354 22 1599 2874 215372 50766 3.94906 3.94906 -131.232 -3.94906 0 0 787024. 2723.27 0.28 0.05 0.09 -1 -1 0.28 0.0121876 0.0105425 133 69 -1 -1 -1 -1 +fixed_k6_frac_ripple_N8_22nm.xml mult_128.v common 7.08 vpr 64.32 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33896 -1 -1 31 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65860 31 32 409 331 1 193 94 17 17 289 -1 unnamed_device 25.8 MiB 3.14 1054 17773 5311 9902 2560 64.3 MiB 0.05 0.00 3.22963 -111.292 -3.22963 3.22963 0.75 8.8212e-05 6.9475e-05 0.00878246 0.00709199 34 2630 23 6.87369e+06 433189 618332. 2139.56 1.23 0.0584529 0.0479689 25762 151098 -1 2191 21 1778 2783 202360 46850 3.36391 3.36391 -129.551 -3.36391 0 0 787024. 2723.27 0.28 0.06 0.10 -1 -1 0.28 0.0142346 0.0124533 143 86 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_001.v common 6.86 vpr 64.16 MiB -1 -1 0.13 21432 1 0.04 -1 -1 33784 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65696 32 32 354 285 1 223 88 17 17 289 -1 unnamed_device 25.4 MiB 2.68 1148 17248 6742 9128 1378 64.2 MiB 0.09 0.00 4.26107 -128.643 -4.26107 4.26107 0.76 0.000150202 0.000120018 0.0164842 0.0132281 34 2875 24 6.89349e+06 338252 618332. 2139.56 1.38 0.0639395 0.0528563 25762 151098 -1 2333 23 1829 2568 183121 43295 4.52455 4.52455 -150.517 -4.52455 0 0 787024. 2723.27 0.27 0.04 0.10 -1 -1 0.27 0.0113399 0.00987703 149 47 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_002.v common 5.93 vpr 64.02 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33756 -1 -1 26 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65556 30 32 363 293 1 229 88 17 17 289 -1 unnamed_device 25.5 MiB 1.64 1125 17833 6126 8997 2710 64.0 MiB 0.09 0.00 3.89968 -122.593 -3.89968 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828058. 2865.25 0.28 0.03 0.10 -1 -1 0.28 0.00956888 0.00843726 125 26 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_004.v common 5.83 vpr 63.70 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33848 -1 -1 24 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65232 29 32 308 248 1 195 85 17 17 289 -1 unnamed_device 25.2 MiB 1.76 1081 10873 3339 6861 673 63.7 MiB 0.06 0.00 3.79798 -106.309 -3.79798 3.79798 0.79 0.000139214 0.000111527 0.0102274 0.00812292 34 2478 23 6.89349e+06 338252 618332. 2139.56 1.29 0.0523013 0.0427148 25762 151098 -1 2148 22 1503 2554 180826 41629 4.05246 4.05246 -126.889 -4.05246 0 0 787024. 2723.27 0.27 0.04 0.13 -1 -1 0.27 0.00963436 0.00839612 134 25 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_005.v common 5.81 vpr 63.89 MiB -1 -1 0.13 21584 1 0.03 -1 -1 33528 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65428 32 32 336 268 1 212 87 17 17 289 -1 unnamed_device 25.4 MiB 1.38 1066 14871 4682 7575 2614 63.9 MiB 0.08 0.00 4.11871 -120.592 -4.11871 4.11871 0.71 0.000179027 0.000143913 0.0132643 0.0106492 34 3093 42 6.89349e+06 324158 618332. 2139.56 1.82 0.0583319 0.0480982 25762 151098 -1 2382 21 1725 3055 235385 52223 4.49959 4.49959 -150.46 -4.49959 0 0 787024. 2723.27 0.27 0.05 0.09 -1 -1 0.27 0.0105127 0.00911067 142 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_006.v common 6.40 vpr 64.10 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33720 -1 -1 33 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65636 32 32 366 295 1 231 97 17 17 289 -1 unnamed_device 25.4 MiB 2.09 1284 18523 5543 10334 2646 64.1 MiB 0.10 0.00 3.29756 -108.322 -3.29756 3.29756 0.73 0.000161121 0.000123775 0.0155021 0.0120747 36 2910 28 6.89349e+06 465097 648988. 2245.63 1.63 0.0625381 0.0512573 26050 158493 -1 2479 19 1408 2321 163470 35416 3.34665 3.34665 -123.753 -3.34665 0 0 828058. 2865.25 0.28 0.04 0.10 -1 -1 0.28 0.0100682 0.00883034 162 55 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_007.v common 5.05 vpr 63.77 MiB -1 -1 0.11 21280 1 0.03 -1 -1 34180 -1 -1 21 27 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65304 27 32 259 221 1 160 80 17 17 289 -1 unnamed_device 25.2 MiB 1.29 710 10228 2518 6951 759 63.8 MiB 0.04 0.00 3.25123 -87.95 -3.25123 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65488 32 32 298 248 1 185 82 17 17 289 -1 unnamed_device 25.2 MiB 2.08 801 7914 1715 5709 490 64.0 MiB 0.05 0.00 3.15648 -103.336 -3.15648 3.15648 0.72 0.000241289 0.000213136 0.00875559 0.00703227 34 2236 24 6.89349e+06 253689 618332. 2139.56 1.11 0.0467887 0.038442 25762 151098 -1 1886 21 1351 1775 132703 31417 3.1444 3.1444 -120.916 -3.1444 0 0 787024. 2723.27 0.26 0.03 0.09 -1 -1 0.26 0.00898313 0.00770588 120 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_011.v common 7.85 vpr 63.70 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33732 -1 -1 21 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65232 30 32 303 262 1 191 83 17 17 289 -1 unnamed_device 25.1 MiB 2.18 951 9803 2763 6358 682 63.7 MiB 0.05 0.00 3.45767 -105.208 -3.45767 3.45767 0.70 0.000130884 0.000103383 0.00850264 0.00681898 36 2217 27 6.89349e+06 295971 648988. 2245.63 3.02 0.0614497 0.0502408 26050 158493 -1 1949 21 1274 1702 143774 31319 3.75555 3.75555 -128.539 -3.75555 0 0 828058. 2865.25 0.30 0.03 0.10 -1 -1 0.30 0.00901563 0.00789489 124 58 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_012.v common 5.33 vpr 63.70 MiB -1 -1 0.11 21280 1 0.04 -1 -1 33732 -1 -1 17 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65228 32 32 276 237 1 171 81 17 17 289 -1 unnamed_device 25.1 MiB 1.62 904 8831 2216 6235 380 63.7 MiB 0.05 0.00 2.911 -91.1954 -2.911 2.911 0.71 0.000137992 0.000109568 0.00833966 0.00670028 34 2280 31 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11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64936 29 32 248 215 1 160 79 17 17 289 -1 unnamed_device 24.9 MiB 1.97 872 9205 2493 5525 1187 63.4 MiB 0.04 0.00 2.57537 -82.1419 -2.57537 2.57537 0.72 0.000181038 0.000120748 0.00802658 0.006372 34 2019 21 6.89349e+06 253689 618332. 2139.56 1.30 0.0354523 0.0285891 25762 151098 -1 1725 19 1044 1507 110804 25949 3.05656 3.05656 -102.057 -3.05656 0 0 787024. 2723.27 0.28 0.03 0.09 -1 -1 0.28 0.00722887 0.00630871 102 21 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_016.v common 6.80 vpr 64.37 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33552 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65912 32 32 370 297 1 234 88 17 17 289 -1 unnamed_device 25.7 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65308 31 32 291 243 1 179 82 17 17 289 -1 unnamed_device 25.1 MiB 2.23 934 12186 3431 7696 1059 63.8 MiB 0.08 0.00 3.71932 -118.332 -3.71932 3.71932 0.77 0.000142047 0.000113926 0.0133341 0.0108808 34 2443 22 6.89349e+06 267783 618332. 2139.56 2.82 0.0709252 0.0583166 25762 151098 -1 1950 22 1316 2098 169090 38634 3.8616 3.8616 -138.366 -3.8616 0 0 787024. 2723.27 0.26 0.06 0.10 -1 -1 0.26 0.0131233 0.0109303 117 30 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_021.v common 5.38 vpr 63.97 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33808 -1 -1 34 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65504 32 32 342 271 1 207 98 17 17 289 -1 unnamed_device 25.2 MiB 1.14 1178 18773 5998 10047 2728 64.0 MiB 0.09 0.00 3.68693 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64964 32 32 285 227 1 169 87 17 17 289 -1 unnamed_device 25.0 MiB 0.88 1108 10071 2509 6471 1091 63.4 MiB 0.05 0.00 3.52907 -105.899 -3.52907 3.52907 0.76 0.000162321 0.000129998 0.00918084 0.00725741 36 2211 19 6.89349e+06 324158 648988. 2245.63 2.65 0.071226 0.0585696 26050 158493 -1 1986 17 1004 1835 120722 27470 3.48685 3.48685 -119.215 -3.48685 0 0 828058. 2865.25 0.28 0.03 0.10 -1 -1 0.28 0.00798598 0.00696666 119 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_025.v common 3.49 vpr 63.07 MiB -1 -1 0.11 20976 1 0.03 -1 -1 33652 -1 -1 12 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64584 32 32 173 169 1 114 76 17 17 289 -1 unnamed_device 24.7 MiB 0.34 395 9836 3139 4356 2341 63.1 MiB 0.03 0.00 1.84032 -57.7362 -1.84032 1.84032 0.69 9.2947e-05 7.1407e-05 0.00744049 0.00602134 30 1112 20 6.89349e+06 169126 556674. 1926.21 0.72 0.0233258 0.0190475 25186 138497 -1 826 19 471 579 41818 11926 1.90346 1.90346 -69.2948 -1.90346 0 0 706193. 2443.58 0.24 0.02 0.08 -1 -1 0.24 0.00595571 0.00515977 65 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_026.v common 5.45 vpr 63.97 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33688 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65504 32 32 300 245 1 187 84 17 17 289 -1 unnamed_device 25.4 MiB 1.62 872 8868 1930 6634 304 64.0 MiB 0.05 0.00 4.00208 -110.595 -4.00208 4.00208 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65280 32 32 284 241 1 177 81 17 17 289 -1 unnamed_device 25.2 MiB 1.81 1054 13556 4391 7391 1774 63.8 MiB 0.06 0.00 3.1092 -106.003 -3.1092 3.1092 0.73 0.000134649 0.000107512 0.0123448 0.00997783 30 2255 19 6.89349e+06 239595 556674. 1926.21 2.01 0.0568352 0.0465126 25186 138497 -1 1912 19 1081 1583 95517 22211 2.96526 2.96526 -117.304 -2.96526 0 0 706193. 2443.58 0.24 0.03 0.09 -1 -1 0.24 0.00847255 0.00739993 112 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_030.v common 7.63 vpr 63.49 MiB -1 -1 0.14 21280 1 0.03 -1 -1 33772 -1 -1 17 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65012 30 32 262 227 1 161 79 17 17 289 -1 unnamed_device 24.8 MiB 1.87 956 13261 4371 7075 1815 63.5 MiB 0.06 0.00 3.26582 -96.8322 -3.26582 3.26582 0.71 0.000119914 9.5299e-05 0.010804 0.00858886 38 1978 19 6.89349e+06 239595 678818. 2348.85 3.16 0.0564381 0.0460767 26626 170182 -1 1717 15 707 1170 83972 18409 3.1712 3.1712 -108.194 -3.1712 0 0 902133. 3121.57 0.29 0.02 0.11 -1 -1 0.29 0.00696023 0.00607346 104 29 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_031.v common 5.65 vpr 63.63 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33556 -1 -1 20 28 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65156 28 32 260 223 1 163 80 17 17 289 -1 unnamed_device 25.1 MiB 1.64 811 11260 2949 7697 614 63.6 MiB 0.05 0.00 3.40424 -95.9781 -3.40424 3.40424 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65024 29 32 291 250 1 185 83 17 17 289 -1 unnamed_device 24.9 MiB 1.93 974 10883 2899 7226 758 63.5 MiB 0.13 0.00 2.71745 -87.7148 -2.71745 2.71745 0.72 0.000325323 0.000264477 0.0227901 0.0185154 36 2103 24 6.89349e+06 310065 648988. 2245.63 3.06 0.0764072 0.0625662 26050 158493 -1 1838 18 987 1408 105173 23495 2.69886 2.69886 -102.501 -2.69886 0 0 828058. 2865.25 0.28 0.03 0.10 -1 -1 0.28 0.00781393 0.00676893 120 48 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_035.v common 5.97 vpr 64.21 MiB -1 -1 0.13 21432 1 0.04 -1 -1 33828 -1 -1 25 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65748 32 32 367 282 1 224 89 17 17 289 -1 unnamed_device 25.5 MiB 1.78 1354 13157 3372 7703 2082 64.2 MiB 0.07 0.00 3.64605 -111.373 -3.64605 3.64605 0.72 0.000247186 0.000214683 0.012586 0.0103602 34 3277 36 6.89349e+06 352346 618332. 2139.56 1.45 0.0690103 0.0573046 25762 151098 -1 2715 24 1419 2382 192053 41975 3.7926 3.7926 -130.298 -3.7926 0 0 787024. 2723.27 0.27 0.05 0.09 -1 -1 0.27 0.0127711 0.0111291 159 26 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_036.v common 6.69 vpr 64.31 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33848 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65856 32 32 391 311 1 250 88 17 17 289 -1 unnamed_device 25.5 MiB 2.09 1155 15298 4503 7979 2816 64.3 MiB 0.09 0.00 3.57677 -120.685 -3.57677 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65500 31 32 377 302 1 241 88 17 17 289 -1 unnamed_device 25.4 MiB 2.70 1295 17053 5784 8604 2665 64.0 MiB 0.13 0.00 4.33027 -132.719 -4.33027 4.33027 0.81 0.000147966 0.000117856 0.0228702 0.0186344 36 3204 20 6.89349e+06 352346 648988. 2245.63 1.92 0.0722786 0.0597979 26050 158493 -1 2671 20 2025 2968 286030 57850 4.74238 4.74238 -159.881 -4.74238 0 0 828058. 2865.25 0.32 0.05 0.11 -1 -1 0.32 0.0112117 0.0097541 163 60 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_040.v common 8.50 vpr 64.27 MiB -1 -1 0.13 21736 1 0.03 -1 -1 33636 -1 -1 25 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65816 31 32 383 305 1 240 88 17 17 289 -1 unnamed_device 25.5 MiB 2.33 1146 16468 5202 8235 3031 64.3 MiB 0.10 0.00 4.74618 -136.176 -4.74618 4.74618 0.74 0.000161214 0.000129225 0.0165129 0.0133562 36 3092 29 6.89349e+06 352346 648988. 2245.63 3.40 0.0927242 0.0745827 26050 158493 -1 2563 23 2112 3154 230431 52411 5.24764 5.24764 -176.577 -5.24764 0 0 828058. 2865.25 0.28 0.05 0.12 -1 -1 0.28 0.0115854 0.0100414 166 60 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_041.v common 6.70 vpr 64.00 MiB -1 -1 0.14 21432 1 0.04 -1 -1 33832 -1 -1 24 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65536 31 32 352 285 1 223 87 17 17 289 -1 unnamed_device 25.4 MiB 2.09 1236 15639 4884 8529 2226 64.0 MiB 0.09 0.00 3.17668 -104.773 -3.17668 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65164 31 32 261 225 1 171 81 17 17 289 -1 unnamed_device 24.9 MiB 1.63 880 14781 5364 7420 1997 63.6 MiB 0.06 0.00 2.974 -92.9645 -2.974 2.974 0.71 0.000121745 9.5783e-05 0.0117899 0.00937271 34 2145 25 6.89349e+06 253689 618332. 2139.56 1.09 0.0486033 0.0394371 25762 151098 -1 1789 18 1117 1495 104215 24339 2.88051 2.88051 -103.5 -2.88051 0 0 787024. 2723.27 0.27 0.03 0.09 -1 -1 0.27 0.00728387 0.00639872 106 24 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_045.v common 5.15 vpr 64.16 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33908 -1 -1 23 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 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amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65652 32 32 387 315 1 249 89 17 17 289 -1 unnamed_device 25.4 MiB 2.54 1257 11969 3270 8112 587 64.1 MiB 0.07 0.00 3.68195 -113.773 -3.68195 3.68195 0.75 0.000190154 0.000149649 0.0131177 0.0107018 36 3048 23 6.89349e+06 352346 648988. 2245.63 3.36 0.0953281 0.077845 26050 158493 -1 2444 20 1681 2477 150458 35907 3.74966 3.74966 -131.121 -3.74966 0 0 828058. 2865.25 0.28 0.06 0.10 -1 -1 0.28 0.0184628 0.0161048 166 74 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_055.v common 6.88 vpr 63.73 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33652 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65264 32 32 251 219 1 156 79 17 17 289 -1 unnamed_device 25.2 MiB 1.67 795 12754 5369 6883 502 63.7 MiB 0.06 0.00 2.91589 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65284 30 32 278 235 1 175 89 17 17 289 -1 unnamed_device 25.2 MiB 1.49 985 15137 4339 8674 2124 63.8 MiB 0.07 0.00 3.17564 -101.28 -3.17564 3.17564 0.75 0.000128219 0.000102497 0.0117362 0.00926453 36 2067 20 6.89349e+06 380534 648988. 2245.63 1.64 0.0506865 0.0414372 26050 158493 -1 1888 19 1161 1892 136962 30791 3.24315 3.24315 -117.897 -3.24315 0 0 828058. 2865.25 0.27 0.03 0.10 -1 -1 0.27 0.0083145 0.00724549 118 29 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_060.v common 10.00 vpr 64.55 MiB -1 -1 0.13 21888 1 0.04 -1 -1 33900 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66096 32 32 431 332 1 270 91 17 17 289 -1 unnamed_device 25.7 MiB 3.36 1537 15595 5335 8503 1757 64.5 MiB 0.11 0.00 5.17195 -152.829 -5.17195 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65824 32 32 349 273 1 214 87 17 17 289 -1 unnamed_device 25.5 MiB 1.84 1250 16023 4950 8932 2141 64.3 MiB 0.08 0.00 4.35947 -119.699 -4.35947 4.35947 0.71 0.000222657 0.000130013 0.015316 0.0122179 36 2814 19 6.89349e+06 324158 648988. 2245.63 3.12 0.0776892 0.0635587 26050 158493 -1 2490 19 1263 2373 178535 39354 4.24825 4.24825 -137.193 -4.24825 0 0 828058. 2865.25 0.27 0.04 0.09 -1 -1 0.27 0.00957816 0.00828483 149 26 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_064.v common 4.28 vpr 63.57 MiB -1 -1 0.10 21128 1 0.03 -1 -1 33572 -1 -1 19 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65092 32 32 247 207 1 153 83 17 17 289 -1 unnamed_device 25.1 MiB 0.63 897 14663 4920 7593 2150 63.6 MiB 0.06 0.00 2.81765 -93.4991 -2.81765 2.81765 0.73 0.000123112 9.7386e-05 0.0108588 0.00868393 34 2079 18 6.89349e+06 267783 618332. 2139.56 1.09 0.0432651 0.0353489 25762 151098 -1 1870 18 1085 1883 141832 31983 2.83306 2.83306 -110.62 -2.83306 0 0 787024. 2723.27 0.26 0.03 0.09 -1 -1 0.26 0.0072717 0.00634376 98 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_065.v common 6.55 vpr 63.58 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33920 -1 -1 20 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65108 30 32 278 235 1 175 82 17 17 289 -1 unnamed_device 24.9 MiB 1.27 825 15390 5390 7718 2282 63.6 MiB 0.07 0.00 3.17368 -94.9673 -3.17368 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65700 32 32 353 285 1 228 87 17 17 289 -1 unnamed_device 25.4 MiB 1.59 1296 12951 3270 8242 1439 64.2 MiB 0.07 0.00 4.28447 -126.633 -4.28447 4.28447 0.73 0.000199314 0.000168965 0.0121192 0.00990213 36 2962 25 6.89349e+06 324158 648988. 2245.63 3.11 0.0805443 0.0655623 26050 158493 -1 2497 19 1721 2550 174264 39597 4.37865 4.37865 -145.12 -4.37865 0 0 828058. 2865.25 0.28 0.04 0.10 -1 -1 0.28 0.00995584 0.00875647 150 48 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_069.v common 7.34 vpr 63.68 MiB -1 -1 0.11 21128 1 0.03 -1 -1 33736 -1 -1 15 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65204 32 32 276 237 1 165 79 17 17 289 -1 unnamed_device 25.1 MiB 1.67 1009 13768 4744 7221 1803 63.7 MiB 0.07 0.00 3.46187 -104.417 -3.46187 3.46187 0.73 0.00012389 9.7358e-05 0.0132438 0.0103532 36 2038 19 6.89349e+06 211408 648988. 2245.63 3.02 0.0596369 0.0486112 26050 158493 -1 1782 18 808 1129 84510 18825 3.18905 3.18905 -116.93 -3.18905 0 0 828058. 2865.25 0.32 0.02 0.09 -1 -1 0.32 0.00742211 0.00651921 105 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_070.v common 5.81 vpr 63.98 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33920 -1 -1 20 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65516 31 32 319 272 1 203 83 17 17 289 -1 unnamed_device 25.2 MiB 1.66 1095 14303 4338 8053 1912 64.0 MiB 0.07 0.00 2.90565 -101.1 -2.90565 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65356 30 32 317 269 1 202 83 17 17 289 -1 unnamed_device 25.2 MiB 2.50 1106 14303 4989 7617 1697 63.8 MiB 0.08 0.00 3.67032 -114.671 -3.67032 3.67032 0.73 0.000134064 0.000106724 0.0138983 0.0111422 36 2591 22 6.89349e+06 295971 648988. 2245.63 3.29 0.0757076 0.0616961 26050 158493 -1 2269 22 1709 2372 203309 43533 3.69425 3.69425 -135.521 -3.69425 0 0 828058. 2865.25 0.29 0.04 0.11 -1 -1 0.29 0.0101852 0.00883348 130 58 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_074.v common 6.26 vpr 64.20 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33576 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65744 32 32 335 282 1 222 84 17 17 289 -1 unnamed_device 25.5 MiB 2.18 1177 12894 3709 7257 1928 64.2 MiB 0.07 0.00 3.16084 -111.784 -3.16084 3.16084 0.74 0.000131631 0.000103492 0.0121918 0.00963803 34 2927 39 6.89349e+06 281877 618332. 2139.56 1.36 0.0536155 0.0443355 25762 151098 -1 2388 22 1673 2297 177905 39495 3.10356 3.10356 -128.079 -3.10356 0 0 787024. 2723.27 0.28 0.04 0.10 -1 -1 0.28 0.0120596 0.0106852 138 62 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_075.v common 4.32 vpr 63.94 MiB -1 -1 0.12 21128 1 0.03 -1 -1 33908 -1 -1 31 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65472 31 32 293 230 1 175 94 17 17 289 -1 unnamed_device 25.2 MiB 0.63 978 9466 2274 6596 596 63.9 MiB 0.07 0.00 3.65542 -108.143 -3.65542 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66008 32 32 387 309 1 248 90 17 17 289 -1 unnamed_device 25.7 MiB 2.10 1238 14964 5109 7090 2765 64.5 MiB 0.10 0.00 3.66297 -118.37 -3.66297 3.66297 0.72 0.000162187 0.000129877 0.0161992 0.0131917 36 3523 26 6.89349e+06 366440 648988. 2245.63 2.96 0.0677324 0.0557994 26050 158493 -1 2695 27 2072 3079 333727 91097 3.6945 3.6945 -140.175 -3.6945 0 0 828058. 2865.25 0.28 0.07 0.11 -1 -1 0.28 0.0136342 0.0118822 164 62 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_079.v common 6.07 vpr 63.57 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33924 -1 -1 21 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65092 30 32 272 232 1 176 83 17 17 289 -1 unnamed_device 25.1 MiB 1.83 911 15923 5850 7722 2351 63.6 MiB 0.08 0.00 3.29223 -101.91 -3.29223 3.29223 0.73 0.000143125 0.000117605 0.0152534 0.0122758 34 2420 43 6.89349e+06 295971 618332. 2139.56 1.49 0.0529517 0.04345 25762 151098 -1 1981 17 1205 1654 140957 30527 3.01066 3.01066 -109.646 -3.01066 0 0 787024. 2723.27 0.29 0.03 0.13 -1 -1 0.29 0.00772738 0.0067899 112 29 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_080.v common 6.62 vpr 64.25 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33776 -1 -1 26 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65792 30 32 375 299 1 236 88 17 17 289 -1 unnamed_device 25.5 MiB 2.64 1161 7888 1777 5515 596 64.2 MiB 0.05 0.00 4.47157 -133.768 -4.47157 4.47157 0.71 0.000156377 0.000125667 0.00845041 0.00696759 34 2948 25 6.89349e+06 366440 618332. 2139.56 1.40 0.0567188 0.0469851 25762 151098 -1 2518 20 1916 2677 199739 45456 4.4898 4.4898 -155.015 -4.4898 0 0 787024. 2723.27 0.26 0.04 0.10 -1 -1 0.26 0.0100907 0.00871193 162 58 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_081.v common 7.18 vpr 64.03 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33540 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65568 32 32 340 270 1 204 87 17 17 289 -1 unnamed_device 25.4 MiB 1.27 1147 16407 4626 10160 1621 64.0 MiB 0.08 0.00 4.00245 -122.65 -4.00245 4.00245 0.71 0.000145766 0.00011615 0.0145059 0.0117049 38 2557 21 6.89349e+06 324158 678818. 2348.85 3.26 0.0853821 0.0707076 26626 170182 -1 2296 20 1383 2379 187424 40453 3.98826 3.98826 -136.636 -3.98826 0 0 902133. 3121.57 0.29 0.04 0.10 -1 -1 0.29 0.00968925 0.0085452 139 31 -1 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Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65656 30 32 377 310 1 239 88 17 17 289 -1 unnamed_device 25.5 MiB 2.29 1348 15688 5335 8200 2153 64.1 MiB 0.10 0.00 3.79562 -117.237 -3.79562 3.79562 0.70 0.000249005 0.000174059 0.0162969 0.0128033 36 3053 30 6.89349e+06 366440 648988. 2245.63 3.23 0.0883692 0.0716083 26050 158493 -1 2613 21 1854 2619 204627 44444 3.94859 3.94859 -134.581 -3.94859 0 0 828058. 2865.25 0.28 0.05 0.10 -1 -1 0.28 0.0104966 0.00911607 162 78 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_084.v common 7.39 vpr 64.21 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33704 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65752 32 32 365 294 1 230 87 17 17 289 -1 unnamed_device 25.7 MiB 2.94 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/home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65892 32 32 397 314 1 256 89 17 17 289 -1 unnamed_device 25.5 MiB 3.32 1398 11375 2859 7545 971 64.3 MiB 0.07 0.00 4.41647 -144.584 -4.41647 4.41647 0.75 0.00025061 0.000217406 0.0122121 0.00992598 36 3338 31 6.89349e+06 352346 648988. 2245.63 3.36 0.0937312 0.0772984 26050 158493 -1 2914 21 2202 3173 250492 55216 4.56208 4.56208 -167.454 -4.56208 0 0 828058. 2865.25 0.28 0.06 0.10 -1 -1 0.28 0.0133498 0.0115428 171 62 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_089.v common 7.72 vpr 63.52 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33416 -1 -1 18 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65044 32 32 269 231 1 172 82 17 17 289 -1 unnamed_device 24.8 MiB 2.56 979 9872 2425 6917 530 63.5 MiB 0.05 0.00 3.14102 -93.9187 -3.14102 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65412 32 32 356 289 1 224 87 17 17 289 -1 unnamed_device 25.2 MiB 1.96 1270 13911 4474 7794 1643 63.9 MiB 0.08 0.00 3.87394 -120.647 -3.87394 3.87394 0.69 0.00016043 0.000129669 0.0134179 0.0109087 34 3225 22 6.89349e+06 324158 618332. 2139.56 1.32 0.0501938 0.0416564 25762 151098 -1 2470 21 1656 2339 183113 41028 4.17879 4.17879 -143.996 -4.17879 0 0 787024. 2723.27 0.26 0.04 0.09 -1 -1 0.26 0.0107996 0.00949155 149 53 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_093.v common 6.28 vpr 64.28 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33792 -1 -1 36 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65824 32 32 349 260 1 204 100 17 17 289 -1 unnamed_device 25.7 MiB 0.71 1194 13788 3901 8608 1279 64.3 MiB 0.08 0.00 4.00841 -116.892 -4.00841 4.00841 0.74 0.000169425 0.000137063 0.0115389 0.0092139 34 2794 37 6.89349e+06 507378 618332. 2139.56 2.90 0.0790111 0.0648954 25762 151098 -1 2295 19 1470 2649 170474 42533 4.24374 4.24374 -137.851 -4.24374 0 0 787024. 2723.27 0.29 0.05 0.09 -1 -1 0.29 0.0119745 0.0104906 157 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_094.v common 5.53 vpr 63.99 MiB -1 -1 0.14 21432 1 0.03 -1 -1 33596 -1 -1 25 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65528 30 32 316 264 1 208 87 17 17 289 -1 unnamed_device 25.2 MiB 1.47 1122 10455 2697 6577 1181 64.0 MiB 0.06 0.00 2.95977 -92.591 -2.95977 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65908 31 32 365 296 1 233 87 17 17 289 -1 unnamed_device 25.8 MiB 2.52 1164 16407 5195 8680 2532 64.4 MiB 0.11 0.00 4.39737 -130.913 -4.39737 4.39737 0.88 0.000151699 0.000121378 0.0188905 0.014593 34 3195 28 6.89349e+06 338252 618332. 2139.56 2.06 0.0858077 0.0717846 25762 151098 -1 2542 22 2135 3206 276752 59252 4.63279 4.63279 -152.903 -4.63279 0 0 787024. 2723.27 0.34 0.07 0.12 -1 -1 0.34 0.0127764 0.0107356 155 60 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_098.v common 7.64 vpr 63.76 MiB -1 -1 0.16 21432 1 0.03 -1 -1 33760 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65288 32 32 331 280 1 221 85 17 17 289 -1 unnamed_device 25.2 MiB 2.40 1130 16267 5373 8664 2230 63.8 MiB 0.10 0.00 3.55759 -115.627 -3.55759 3.55759 0.89 0.000141331 0.000112641 0.0162859 0.013284 34 3069 26 6.89349e+06 295971 618332. 2139.56 1.99 0.0724189 0.0581846 25762 151098 -1 2371 21 1824 2508 206043 44470 3.6755 3.6755 -138.891 -3.6755 0 0 787024. 2723.27 0.36 0.04 0.12 -1 -1 0.36 0.00950953 0.00824913 137 62 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_099.v common 7.61 vpr 64.13 MiB -1 -1 0.17 21280 1 0.04 -1 -1 33796 -1 -1 21 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65672 32 32 326 263 1 203 85 17 17 289 -1 unnamed_device 25.4 MiB 2.52 1105 9757 2638 6469 650 64.1 MiB 0.07 0.00 4.09751 -119.337 -4.09751 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65672 32 32 350 275 1 215 86 17 17 289 -1 unnamed_device 25.4 MiB 2.55 1235 13505 4204 8032 1269 64.1 MiB 0.08 0.00 3.88598 -127.147 -3.88598 3.88598 0.72 0.00014204 0.000113459 0.0129567 0.0105231 34 3127 26 6.89349e+06 310065 618332. 2139.56 3.65 0.0853146 0.0701164 25762 151098 -1 2602 21 1931 3083 255119 55421 4.06316 4.06316 -148.039 -4.06316 0 0 787024. 2723.27 0.26 0.05 0.11 -1 -1 0.26 0.0104255 0.00913662 148 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_103.v common 9.57 vpr 64.29 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33684 -1 -1 26 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65836 32 32 386 307 1 246 90 17 17 289 -1 unnamed_device 25.7 MiB 2.62 1295 16572 5653 8388 2531 64.3 MiB 0.10 0.00 3.22388 -110.719 -3.22388 3.22388 0.71 0.000174193 0.000133448 0.0171231 0.0134703 34 3410 32 6.89349e+06 366440 618332. 2139.56 4.25 0.0996874 0.0817078 25762 151098 -1 2689 21 2060 2914 258163 56708 3.25976 3.25976 -126.023 -3.25976 0 0 787024. 2723.27 0.27 0.05 0.10 -1 -1 0.27 0.0111053 0.00963626 167 59 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_104.v common 5.02 vpr 63.52 MiB -1 -1 0.12 21280 1 0.03 -1 -1 33900 -1 -1 20 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65044 29 32 269 229 1 173 81 17 17 289 -1 unnamed_device 24.8 MiB 1.26 742 6906 1533 5032 341 63.5 MiB 0.05 0.00 3.27503 -98.9745 -3.27503 3.27503 0.74 0.000121876 9.6698e-05 0.0101748 0.00801694 34 1934 21 6.89349e+06 281877 618332. 2139.56 1.17 0.0448862 0.0368153 25762 151098 -1 1574 20 1263 1639 123208 27736 3.01351 3.01351 -107.073 -3.01351 0 0 787024. 2723.27 0.26 0.03 0.10 -1 -1 0.26 0.00798449 0.00696325 110 28 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_105.v common 5.74 vpr 63.65 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33896 -1 -1 20 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65176 32 32 310 266 1 200 84 17 17 289 -1 unnamed_device 25.1 MiB 1.29 1138 14541 4195 8946 1400 63.6 MiB 0.07 0.00 3.30699 -108.275 -3.30699 3.30699 0.74 0.000151004 0.00012023 0.0125879 0.010062 34 2798 39 6.89349e+06 281877 618332. 2139.56 1.71 0.0623088 0.0512559 25762 151098 -1 2349 20 1791 2420 211035 44633 3.6676 3.6676 -133.243 -3.6676 0 0 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v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65164 29 32 262 224 1 168 80 17 17 289 -1 unnamed_device 25.1 MiB 2.94 838 10744 2780 7362 602 63.6 MiB 0.05 0.00 3.32408 -94.3741 -3.32408 3.32408 0.75 0.000119443 9.4364e-05 0.00948125 0.00757454 34 2030 39 6.89349e+06 267783 618332. 2139.56 1.13 0.0499335 0.0410261 25762 151098 -1 1868 21 1104 1492 120777 27993 3.08741 3.08741 -106.803 -3.08741 0 0 787024. 2723.27 0.27 0.03 0.10 -1 -1 0.27 0.00843331 0.0072669 108 25 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_108.v common 7.87 vpr 63.89 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33692 -1 -1 18 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65420 32 32 278 238 1 182 82 17 17 289 -1 unnamed_device 25.2 MiB 1.95 881 7380 1704 5350 326 63.9 MiB 0.05 0.00 3.26703 -103.242 -3.26703 3.26703 0.79 0.000183349 0.000145547 0.00809826 0.00656899 36 2149 20 6.89349e+06 253689 648988. 2245.63 3.07 0.0607968 0.0502499 26050 158493 -1 1882 19 1224 1796 131643 30768 2.98716 2.98716 -114.599 -2.98716 0 0 828058. 2865.25 0.31 0.03 0.10 -1 -1 0.31 0.00879522 0.00779156 114 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_109.v common 8.05 vpr 64.39 MiB -1 -1 0.14 21432 1 0.04 -1 -1 33736 -1 -1 26 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65932 31 32 373 300 1 236 89 17 17 289 -1 unnamed_device 25.7 MiB 1.83 1257 15137 3735 9893 1509 64.4 MiB 0.09 0.00 3.60497 -121.488 -3.60497 3.60497 0.74 0.000166642 0.00013416 0.0156518 0.0127895 38 2807 20 6.89349e+06 366440 678818. 2348.85 3.44 0.0964991 0.0792452 26626 170182 -1 2413 22 2067 2907 205184 44807 3.66325 3.66325 -139.511 -3.66325 0 0 902133. 3121.57 0.31 0.05 0.10 -1 -1 0.31 0.0125631 0.0108333 160 60 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_110.v common 5.82 vpr 63.36 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33592 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64876 31 32 265 230 1 175 80 17 17 289 -1 unnamed_device 24.8 MiB 1.98 903 6444 1455 4706 283 63.4 MiB 0.05 0.00 2.80665 -91.4153 -2.80665 2.80665 0.72 0.000229079 0.000181712 0.00928078 0.00752617 34 2249 23 6.89349e+06 239595 618332. 2139.56 1.19 0.0467715 0.0384003 25762 151098 -1 1917 23 1278 1832 151389 34073 2.88941 2.88941 -109.208 -2.88941 0 0 787024. 2723.27 0.31 0.04 0.10 -1 -1 0.31 0.00884451 0.00756914 108 30 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_111.v common 7.84 vpr 63.99 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33660 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65524 32 32 349 286 1 221 86 17 17 289 -1 unnamed_device 25.4 MiB 1.94 1280 11426 3100 6962 1364 64.0 MiB 0.06 0.00 3.27699 -103.618 -3.27699 3.27699 0.72 0.000146709 0.000117308 0.0115427 0.00940068 36 2786 21 6.89349e+06 310065 648988. 2245.63 3.17 0.0816224 0.066358 26050 158493 -1 2500 18 1337 1927 150872 32725 3.2945 3.2945 -122.225 -3.2945 0 0 828058. 2865.25 0.29 0.04 0.10 -1 -1 0.29 0.0100552 0.00886358 146 54 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_112.v common 6.43 vpr 64.37 MiB -1 -1 0.15 21584 1 0.03 -1 -1 33788 -1 -1 26 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65916 31 32 396 325 1 259 89 17 17 289 -1 unnamed_device 25.7 MiB 1.96 1345 10979 3065 6829 1085 64.4 MiB 0.07 0.00 3.79948 -123.548 -3.79948 3.79948 0.73 0.000158269 0.000127209 0.0120465 0.00975405 36 3401 33 6.89349e+06 366440 648988. 2245.63 1.60 0.0658005 0.0540041 26050 158493 -1 2843 21 2291 3237 243158 53812 4.37939 4.37939 -158.375 -4.37939 0 0 828058. 2865.25 0.31 0.06 0.10 -1 -1 0.31 0.0126726 0.0111115 167 87 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_113.v common 8.30 vpr 63.86 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33740 -1 -1 18 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65388 32 32 303 262 1 200 82 17 17 289 -1 unnamed_device 25.4 MiB 2.43 1151 13788 3971 8046 1771 63.9 MiB 0.07 0.00 3.0513 -99.4729 -3.0513 3.0513 0.79 0.000132362 0.000104617 0.0126412 0.0101921 36 2453 24 6.89349e+06 253689 648988. 2245.63 3.16 0.0727665 0.0596974 26050 158493 -1 2103 22 1336 1794 130334 28798 3.05456 3.05456 -116.497 -3.05456 0 0 828058. 2865.25 0.28 0.04 0.10 -1 -1 0.28 0.00972108 0.00838546 124 54 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_114.v common 5.23 vpr 63.62 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33556 -1 -1 18 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65152 32 32 290 244 1 177 82 17 17 289 -1 unnamed_device 24.9 MiB 1.09 908 10584 3324 6600 660 63.6 MiB 0.06 0.00 3.24503 -103.315 -3.24503 3.24503 0.71 0.000121107 9.6257e-05 0.0110221 0.00882104 34 2388 49 6.89349e+06 253689 618332. 2139.56 1.57 0.0564339 0.0463511 25762 151098 -1 2060 18 1274 1916 163428 35760 3.13586 3.13586 -120.102 -3.13586 0 0 787024. 2723.27 0.26 0.03 0.10 -1 -1 0.26 0.00824369 0.00717435 115 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_115.v common 5.50 vpr 63.81 MiB -1 -1 0.13 21432 1 0.03 -1 -1 33928 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65340 32 32 318 257 1 198 86 17 17 289 -1 unnamed_device 25.2 MiB 1.68 1047 15017 4549 8338 2130 63.8 MiB 0.07 0.00 3.98738 -114.386 -3.98738 3.98738 0.72 0.000141094 0.000112278 0.0131266 0.0106523 34 2601 22 6.89349e+06 310065 618332. 2139.56 1.24 0.0541021 0.0447349 25762 151098 -1 2228 19 1399 1975 139535 32323 3.6624 3.6624 -129.216 -3.6624 0 0 787024. 2723.27 0.26 0.02 0.10 -1 -1 0.26 0.00573287 0.00500367 133 27 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_116.v common 5.98 vpr 64.16 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33712 -1 -1 25 29 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65700 29 32 324 268 1 207 86 17 17 289 -1 unnamed_device 25.4 MiB 1.90 1195 14261 4457 7929 1875 64.2 MiB 0.07 0.00 3.15468 -93.7917 -3.15468 3.15468 0.71 0.000134942 0.000107292 0.0121065 0.00969879 34 2609 31 6.89349e+06 352346 618332. 2139.56 1.44 0.054323 0.0444835 25762 151098 -1 2142 19 1342 1962 142935 32808 3.05881 3.05881 -108.148 -3.05881 0 0 787024. 2723.27 0.29 0.03 0.09 -1 -1 0.29 0.00995333 0.00884276 138 49 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_117.v common 6.29 vpr 64.17 MiB -1 -1 0.12 21584 1 0.03 -1 -1 33820 -1 -1 24 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65712 32 32 393 312 1 243 88 17 17 289 -1 unnamed_device 25.5 MiB 1.88 1186 11008 3319 7130 559 64.2 MiB 0.07 0.00 4.55604 -141.47 -4.55604 4.55604 0.72 0.000163714 0.000131027 0.0118065 0.00969026 34 3479 42 6.89349e+06 338252 618332. 2139.56 1.78 0.0561337 0.0464181 25762 151098 -1 2687 22 2084 3236 241555 56763 4.64369 4.64369 -166.687 -4.64369 0 0 787024. 2723.27 0.26 0.05 0.10 -1 -1 0.26 0.0113454 0.00985567 166 62 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_118.v common 5.58 vpr 63.65 MiB -1 -1 0.11 20976 1 0.03 -1 -1 33480 -1 -1 17 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65176 31 32 229 197 1 143 80 17 17 289 -1 unnamed_device 24.9 MiB 0.53 666 7820 1740 5697 383 63.6 MiB 0.04 0.00 2.85355 -85.9149 -2.85355 2.85355 0.79 0.000134015 0.000107241 0.00643717 0.00521085 34 1840 21 6.89349e+06 239595 618332. 2139.56 2.42 0.0518019 0.0424882 25762 151098 -1 1482 22 835 1316 92408 22363 2.46121 2.46121 -95.2093 -2.46121 0 0 787024. 2723.27 0.26 0.03 0.09 -1 -1 0.26 0.00843463 0.00720491 92 -1 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_119.v common 8.44 vpr 64.62 MiB -1 -1 0.14 21584 1 0.03 -1 -1 33484 -1 -1 27 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66168 32 32 412 334 1 269 91 17 17 289 -1 unnamed_device 26.0 MiB 1.87 1329 17431 6808 8233 2390 64.6 MiB 0.12 0.00 4.49353 -137.795 -4.49353 4.49353 0.73 0.000166515 0.000133706 0.0207642 0.0168839 38 3072 29 6.89349e+06 380534 678818. 2348.85 3.80 0.109145 0.0897917 26626 170182 -1 2354 20 1751 2324 152039 34925 4.87594 4.87594 -161.493 -4.87594 0 0 902133. 3121.57 0.30 0.04 0.11 -1 -1 0.30 0.0122113 0.0108563 175 87 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_120.v common 8.10 vpr 64.14 MiB -1 -1 0.12 21432 1 0.03 -1 -1 33628 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65676 32 32 376 318 1 259 87 17 17 289 -1 unnamed_device 25.4 MiB 2.16 1269 11031 2717 7767 547 64.1 MiB 0.07 0.00 3.86439 -134.808 -3.86439 3.86439 0.76 0.000171374 0.00013761 0.0107793 0.00882181 36 3139 25 6.89349e+06 324158 648988. 2245.63 3.16 0.0747857 0.0613692 26050 158493 -1 2544 23 2209 2777 216080 47253 4.42073 4.42073 -159.872 -4.42073 0 0 828058. 2865.25 0.29 0.07 0.12 -1 -1 0.29 0.014617 0.0124595 160 93 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_121.v common 6.52 vpr 64.04 MiB -1 -1 0.13 21280 1 0.03 -1 -1 33672 -1 -1 22 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65576 32 32 360 293 1 227 86 17 17 289 -1 unnamed_device 25.4 MiB 1.93 1166 15206 5684 7226 2296 64.0 MiB 0.08 0.00 3.22388 -101.128 -3.22388 3.22388 0.73 0.000154003 0.000123733 0.0150736 0.0122592 36 2674 24 6.89349e+06 310065 648988. 2245.63 1.85 0.0626634 0.0516729 26050 158493 -1 2237 21 1378 1934 155350 34406 2.90286 2.90286 -114.185 -2.90286 0 0 828058. 2865.25 0.29 0.04 0.10 -1 -1 0.29 0.0122117 0.010647 152 57 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_122.v common 8.65 vpr 64.15 MiB -1 -1 0.15 21736 1 0.03 -1 -1 33832 -1 -1 26 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65692 32 32 396 299 1 241 90 17 17 289 -1 unnamed_device 25.4 MiB 2.61 1383 9336 2204 6285 847 64.2 MiB 0.06 0.00 4.6371 -144.22 -4.6371 4.6371 0.71 0.000174068 0.00014166 0.00984552 0.00806615 36 3415 22 6.89349e+06 366440 648988. 2245.63 3.31 0.083757 0.0693247 26050 158493 -1 2843 21 2141 3459 279077 59867 4.81495 4.81495 -163.905 -4.81495 0 0 828058. 2865.25 0.27 0.05 0.10 -1 -1 0.27 0.0114137 0.009863 172 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_123.v common 4.73 vpr 63.62 MiB -1 -1 0.13 21128 1 0.03 -1 -1 33708 -1 -1 15 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65152 30 32 224 207 1 137 77 17 17 289 -1 unnamed_device 24.9 MiB 0.92 602 10672 2705 6484 1483 63.6 MiB 0.04 0.00 2.52876 -77.0601 -2.52876 2.52876 0.76 0.00010805 8.4996e-05 0.00853949 0.00677975 34 1607 25 6.89349e+06 211408 618332. 2139.56 1.08 0.0425772 0.0346003 25762 151098 -1 1345 20 835 1134 79419 18841 2.18191 2.18191 -86.9177 -2.18191 0 0 787024. 2723.27 0.30 0.03 0.10 -1 -1 0.30 0.00802815 0.00687277 82 29 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_124.v common 5.20 vpr 63.77 MiB -1 -1 0.14 21280 1 0.03 -1 -1 33848 -1 -1 20 30 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65296 30 32 286 239 1 176 82 17 17 289 -1 unnamed_device 25.2 MiB 1.31 1010 13788 4249 8036 1503 63.8 MiB 0.07 0.00 3.58297 -115.256 -3.58297 3.58297 0.76 0.000130841 0.000104922 0.0122294 0.00983123 34 2215 22 6.89349e+06 281877 618332. 2139.56 1.20 0.0533376 0.0436375 25762 151098 -1 1844 23 1412 2112 167628 37311 3.27235 3.27235 -122.41 -3.27235 0 0 787024. 2723.27 0.28 0.04 0.09 -1 -1 0.28 0.00911515 0.00787882 119 29 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_125.v common 6.17 vpr 63.66 MiB -1 -1 0.11 21432 1 0.03 -1 -1 33856 -1 -1 18 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65184 32 32 296 247 1 187 82 17 17 289 -1 unnamed_device 24.9 MiB 1.88 1089 11652 4110 5941 1601 63.7 MiB 0.06 0.00 3.40529 -113.776 -3.40529 3.40529 0.74 0.00015879 9.6528e-05 0.0103622 0.00829936 34 2893 29 6.89349e+06 253689 618332. 2139.56 1.59 0.0519913 0.0426346 25762 151098 -1 2425 20 1424 2509 214344 46947 3.514 3.514 -139.368 -3.514 0 0 787024. 2723.27 0.29 0.07 0.10 -1 -1 0.29 0.013024 0.0113263 120 31 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_126.v common 5.25 vpr 63.46 MiB -1 -1 0.12 20976 1 0.03 -1 -1 33812 -1 -1 21 25 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 64988 25 32 216 194 1 138 78 17 17 289 -1 unnamed_device 24.8 MiB 1.13 564 8046 3250 4003 793 63.5 MiB 0.03 0.00 2.878 -69.0669 -2.878 2.878 0.72 9.3049e-05 7.1766e-05 0.00639306 0.00504662 36 1537 26 6.89349e+06 295971 648988. 2245.63 1.50 0.0391481 0.0314865 26050 158493 -1 1209 20 834 1188 83699 21057 2.83416 2.83416 -79.6454 -2.83416 0 0 828058. 2865.25 0.30 0.03 0.11 -1 -1 0.30 0.00697793 0.00599265 92 19 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_127.v common 8.66 vpr 64.27 MiB -1 -1 0.14 21432 1 0.04 -1 -1 33544 -1 -1 23 32 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 65812 32 32 376 307 1 242 87 17 17 289 -1 unnamed_device 25.5 MiB 2.37 1390 11607 3572 7112 923 64.3 MiB 0.07 0.00 3.72115 -113.988 -3.72115 3.72115 0.75 0.000157384 0.000127002 0.0119423 0.00963081 36 3311 31 6.89349e+06 324158 648988. 2245.63 3.45 0.0889609 0.0725446 26050 158493 -1 2757 20 1765 2691 199609 43097 3.7286 3.7286 -132.806 -3.7286 0 0 828058. 2865.25 0.30 0.04 0.12 -1 -1 0.30 0.0114996 0.0101388 161 69 -1 -1 -1 -1 +fixed_k6_frac_uripple_N8_22nm.xml mult_128.v common 8.42 vpr 64.59 MiB -1 -1 0.16 21584 1 0.05 -1 -1 33856 -1 -1 29 31 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66140 31 32 409 331 1 264 92 17 17 289 -1 unnamed_device 26.0 MiB 2.31 1341 5681 1100 4115 466 64.6 MiB 0.05 0.00 3.75728 -122.156 -3.75728 3.75728 0.75 0.000217345 0.000175083 0.00899833 0.00755209 36 3126 26 6.89349e+06 408721 648988. 2245.63 3.29 0.0872148 0.0719835 26050 158493 -1 2629 23 2047 2817 203831 46635 4.30714 4.30714 -149.849 -4.30714 0 0 828058. 2865.25 0.28 0.05 0.12 -1 -1 0.28 0.0123342 0.010761 179 86 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores/config/golden_results.txt index 4ad620feddc..d48f389e7af 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/arithmetic_tasks/open_cores/config/golden_results.txt @@ -1,7 +1,7 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length - k6_N8_gate_boost_0.2V_22nm.xml Md5Core.v common 891.61 vpr 934.46 MiB -1 -1 27.14 326268 27 22.80 -1 -1 141788 -1 -1 5694 641 0 0 success 574ed3d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T03:32:29 gh-actions-runner-vtr-auto-spawned1 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 956888 641 128 52026 52154 1 24058 6463 90 90 8100 clb auto 346.1 MiB 248.45 312828 934.5 MiB 145.79 1.16 12.2664 -33975.2 -12.2664 12.2664 117.15 0.0882271 0.0767682 12.6953 10.5551 74 448391 32 2.50222e+08 6.86455e+07 3.72985e+07 4604.75 188.93 39.0877 33.1897 418547 17 104887 229635 18003954 3362218 13.234 13.234 -36422.7 -13.234 0 0 4.63728e+07 5725.03 37.97 10.39 4.55225 4.00545 41833 14777 -1 -1 -1 -1 - k6_N8_gate_boost_0.2V_22nm.xml cordic.v common 6.51 vpr 62.03 MiB -1 -1 0.71 29428 11 0.38 -1 -1 36688 -1 -1 49 54 0 0 success 574ed3d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T03:32:29 gh-actions-runner-vtr-auto-spawned1 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 63516 54 51 465 516 1 301 154 11 11 121 clb auto 24.0 MiB 0.16 2292 62.0 MiB 0.10 0.00 4.9508 -205.649 -4.9508 4.9508 0.34 0.000643118 0.000529344 0.0248522 0.0210447 48 5695 35 2.09946e+06 590695 317060. 2620.33 3.05 0.257101 0.22269 4871 21 2150 10679 707105 153170 5.36286 5.36286 -233.356 -5.36286 0 0 382250. 3159.09 0.16 0.22 0.0507321 0.0456471 355 355 -1 -1 -1 -1 - k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml Md5Core.v common 784.51 vpr 874.42 MiB -1 -1 17.97 221420 1 5.61 -1 -1 148452 -1 -1 5125 641 0 0 success 574ed3d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T03:32:29 gh-actions-runner-vtr-auto-spawned1 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 895404 641 128 55563 47815 1 19235 5894 85 85 7225 clb auto 354.8 MiB 76.08 237870 874.4 MiB 249.97 1.73 5.74411 -22836.7 -5.74411 5.74411 105.32 0.065045 0.055807 11.4486 9.41981 78 306321 28 2.22196e+08 6.43647e+07 3.44250e+07 4764.71 204.26 41.6029 35.4381 291043 18 68261 110489 10827436 1893374 4.92108 4.92108 -22366.4 -4.92108 0 0 4.31121e+07 5967.07 36.68 6.75 3.44589 3.01626 39986 2048 -1 -1 -1 -1 - k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml cordic.v common 10.52 vpr 62.59 MiB -1 -1 0.65 29192 4 0.23 -1 -1 36268 -1 -1 41 54 0 0 success 574ed3d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T03:32:29 gh-actions-runner-vtr-auto-spawned1 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64092 54 51 503 502 1 302 146 10 10 100 clb auto 24.6 MiB 2.19 2018 62.6 MiB 0.14 0.00 4.0367 -191.892 -4.0367 4.0367 0.27 0.000855179 0.000728856 0.0357914 0.0311147 48 4428 39 1.94278e+06 514878 254498. 2544.98 5.08 0.52382 0.461165 4152 21 1803 7688 462873 111112 4.65806 4.65806 -223.324 -4.65806 0 0 306731. 3067.31 0.12 0.19 0.0629149 0.0574304 310 279 -1 -1 -1 -1 - k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml Md5Core.v common 876.12 vpr 897.15 MiB -1 -1 17.32 222108 1 4.75 -1 -1 148404 -1 -1 5176 641 0 0 success 574ed3d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T03:32:29 gh-actions-runner-vtr-auto-spawned1 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 918684 641 128 55563 47815 1 19575 5945 86 86 7396 clb auto 363.3 MiB 204.88 229889 897.2 MiB 271.18 2.17 5.94805 -22791.4 -5.94805 5.94805 104.99 0.105912 0.0849653 12.2351 10.0443 70 304821 35 2.34635e+08 6.56264e+07 3.26175e+07 4410.15 145.85 37.4824 31.5982 285741 33 72065 105124 10431520 1973062 4.75157 4.75157 -22591.2 -4.75157 0 0 4.09886e+07 5542.00 34.60 11.75 7.95486 6.84428 40262 2048 -1 -1 -1 -1 - k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml cordic.v common 7.26 vpr 62.75 MiB -1 -1 0.65 29252 4 0.24 -1 -1 36368 -1 -1 39 54 0 0 success 574ed3d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T03:32:29 gh-actions-runner-vtr-auto-spawned1 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 64252 54 51 503 502 1 307 144 10 10 100 clb auto 24.9 MiB 1.63 2060 62.7 MiB 0.15 0.01 3.696 -183.234 -3.696 3.696 0.27 0.000674288 0.000558701 0.0315237 0.0269096 54 4491 34 1.94854e+06 494442 279084. 2790.84 2.75 0.310335 0.26989 3744 15 1595 5975 310629 72327 3.79249 3.79249 -198.025 -3.79249 0 0 343682. 3436.82 0.13 0.13 0.0431736 0.0397482 305 279 -1 -1 -1 -1 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time num_le num_luts num_add_blocks max_add_chain_length num_sub_blocks max_sub_chain_length +k6_N8_gate_boost_0.2V_22nm.xml Md5Core.v common 2000.68 vpr 956.79 MiB -1 -1 17.42 331396 27 13.12 -1 -1 142280 -1 -1 5694 641 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 979756 641 128 52026 52154 1 24058 6463 90 90 8100 clb auto 348.9 MiB 169.61 290617 7889388 3216319 4617001 56068 956.8 MiB 71.69 0.57 12.2664 -33472.3 -12.2664 12.2664 68.39 0.0344423 0.0288626 5.3039 4.40773 66 437390 36 2.50222e+08 6.86455e+07 3.39805e+07 4195.12 1578.31 29.5019 25.2421 844532 8713078 -1 399638 17 108140 236467 17661738 3381078 13.1078 13.1078 -35844 -13.1078 0 0 4.24114e+07 5235.97 21.48 5.61 5.92 -1 -1 21.48 2.18991 2.00001 41833 14777 -1 -1 -1 -1 +k6_N8_gate_boost_0.2V_22nm.xml cordic.v common 4.58 vpr 64.94 MiB -1 -1 0.47 29816 11 0.24 -1 -1 37192 -1 -1 47 54 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66496 54 51 461 512 1 307 152 10 10 100 clb auto 26.7 MiB 0.11 2307 12707 2333 9386 988 64.9 MiB 0.07 0.00 5.05372 -205.246 -5.05372 5.05372 0.20 0.000358774 0.000288108 0.0162239 0.0135244 56 4961 32 1.91864e+06 566585 285865. 2858.65 2.38 0.213322 0.181645 8974 66165 -1 4426 15 1807 7996 443693 104106 5.88369 5.88369 -236.55 -5.88369 0 0 351033. 3510.33 0.10 0.10 0.05 -1 -1 0.10 0.0253763 0.0232755 351 351 -1 -1 -1 -1 +k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml Md5Core.v common 1164.54 vpr 939.37 MiB -1 -1 11.62 222496 1 2.73 -1 -1 149260 -1 -1 5125 641 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 961912 641 128 55563 47815 1 19235 5894 85 85 7225 clb auto 358.0 MiB 54.80 223438 7988444 3280828 4557638 149978 939.4 MiB 136.71 1.01 6.0555 -22550.1 -6.0555 6.0555 63.48 0.0396973 0.0350382 4.67249 3.85771 70 298180 46 2.22196e+08 6.43647e+07 3.17086e+07 4388.74 823.77 25.5317 21.7992 791522 8230590 -1 280283 27 66931 108126 10851247 2030465 5.59508 5.59508 -22253.5 -5.59508 0 0 3.98484e+07 5515.35 19.65 4.02 5.49 -1 -1 19.65 2.07474 1.83174 39986 2048 -1 -1 -1 -1 +k6_N8_ripple_chain_gate_boost_0.2V_22nm.xml cordic.v common 5.45 vpr 65.63 MiB -1 -1 0.45 29032 4 0.16 -1 -1 36780 -1 -1 41 54 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 67208 54 51 503 502 1 302 146 10 10 100 clb auto 27.5 MiB 1.60 2106 13970 3091 9581 1298 65.6 MiB 0.10 0.00 3.86976 -191.654 -3.86976 3.86976 0.20 0.000417685 0.000348334 0.0188927 0.0158293 48 4607 42 1.94278e+06 514878 254498. 2544.98 1.72 0.150026 0.128709 8670 57387 -1 4202 18 1996 7708 461866 108094 3.79834 3.79834 -205.056 -3.79834 0 0 306731. 3067.31 0.11 0.10 0.04 -1 -1 0.11 0.0273745 0.0250788 310 279 -1 -1 -1 -1 +k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml Md5Core.v common 1511.70 vpr 910.85 MiB -1 -1 11.94 221580 1 2.80 -1 -1 149256 -1 -1 5176 641 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 932712 641 128 55563 47815 1 19575 5945 86 86 7396 clb auto 365.9 MiB 150.00 226719 8296073 3411836 4704174 180063 910.9 MiB 137.33 0.94 5.92905 -23024.9 -5.92905 5.92905 65.64 0.0306569 0.0228154 4.86906 3.98558 64 309795 45 2.34635e+08 6.56264e+07 3.02030e+07 4083.70 1072.87 26.7533 22.7803 786056 7778811 -1 285547 16 70439 103101 10007179 1824091 5.55648 5.55648 -22958.9 -5.55648 0 0 3.78329e+07 5115.32 18.32 3.24 5.00 -1 -1 18.32 1.48625 1.3322 40262 2048 -1 -1 -1 -1 +k6_N8_unbalanced_ripple_chain_gate_boost_0.2V_22nm.xml cordic.v common 6.61 vpr 65.20 MiB -1 -1 0.49 29032 4 0.17 -1 -1 36472 -1 -1 39 54 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 66768 54 51 503 502 1 307 144 10 10 100 clb auto 27.1 MiB 1.16 1982 12585 2661 8753 1171 65.2 MiB 0.09 0.00 3.696 -180.046 -3.696 3.696 0.21 0.000419255 0.000343912 0.0183089 0.015302 50 4319 26 1.94854e+06 494442 264954. 2649.54 3.23 0.208853 0.178045 8770 59529 -1 3895 17 1806 6597 383050 90634 3.60709 3.60709 -190.882 -3.60709 0 0 317040. 3170.40 0.10 0.09 0.04 -1 -1 0.10 0.030089 0.0280177 305 279 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/power_extended_arch_list/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/power_extended_arch_list/config/golden_results.txt index 01aee2c8841..a3200d2aefa 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/power_extended_arch_list/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test1/power_extended_arch_list/config/golden_results.txt @@ -1,31 +1,31 @@ arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc -k6_N10_I40_Fi6_L4_frac1_ff1_45nm.xml ch_intrinsics.v common 3.60 vpr 66.65 MiB -1 -1 0.29 20848 3 0.10 -1 -1 36796 -1 -1 68 99 1 0 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 68248 99 130 343 473 1 230 298 12 12 144 clb auto 28.0 MiB 0.08 575 71938 22962 36263 12713 66.6 MiB 0.19 0.00 1.865 -120.725 -1.865 1.865 0.35 0.000815861 0.000748755 0.0617856 0.0568042 48 1298 10 5.66058e+06 4.21279e+06 394078. 2736.65 0.90 0.214795 0.194146 13382 75762 -1 1209 12 404 645 32631 9803 2.02042 2.02042 -137.126 -2.02042 -0.563537 -0.200829 503207. 3494.49 0.15 0.04 0.08 -1 -1 0.15 0.0258055 0.0238079 0.009948 0.2516 0.08188 0.6665 -k6_N10_I40_Fi6_L4_frac1_ff1_45nm.xml diffeq1.v common 14.13 vpr 69.70 MiB -1 -1 0.45 25932 15 0.39 -1 -1 37716 -1 -1 38 162 0 5 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 71372 162 96 994 935 1 693 301 16 16 256 mult_36 auto 31.5 MiB 0.27 5403 85981 26951 52367 6663 69.7 MiB 0.55 0.01 21.1329 -1677.85 -21.1329 21.1329 0.70 0.00246832 0.00228744 0.233934 0.216378 48 12202 43 1.21132e+07 4.02797e+06 756778. 2956.16 7.65 1.12946 1.03662 25228 149258 -1 9996 17 3110 6320 1606287 397256 22.4645 22.4645 -1794.92 -22.4645 0 0 968034. 3781.38 0.33 0.44 0.16 -1 -1 0.33 0.117727 0.11029 0.007642 0.3669 0.0171 0.616 -k6_N10_I40_Fi6_L4_frac1_ff1_45nm.xml LU8PEEng.v common 600.92 vpr 464.61 MiB -1 -1 65.23 338648 122 76.78 -1 -1 83316 -1 -1 1377 114 45 8 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 475760 114 102 21867 21777 1 11713 1646 50 50 2500 memory auto 194.0 MiB 19.12 158027 1079900 387262 672407 20231 464.6 MiB 26.67 0.24 78.8362 -52334.1 -78.8362 78.8362 27.83 0.0501868 0.0433544 6.07162 5.06108 92 239808 35 1.47946e+08 1.02043e+08 1.52089e+07 6083.58 292.79 22.9131 19.2573 338772 3221652 -1 215840 20 45193 170020 34120371 7547042 79.2114 79.2114 -63324.9 -79.2114 -27.5943 -0.296573 1.93279e+07 7731.17 9.08 12.95 3.86 -1 -1 9.08 3.13819 2.76074 0.08144 0.428 0.01144 0.5606 -k6_N10_I40_Fi6_L4_frac1_ff2_45nm.xml ch_intrinsics.v common 3.74 vpr 66.20 MiB -1 -1 0.28 21136 3 0.10 -1 -1 37124 -1 -1 68 99 1 0 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 67784 99 130 343 473 1 232 298 12 12 144 clb auto 27.8 MiB 0.11 574 69948 22489 35398 12061 66.2 MiB 0.19 0.00 1.865 -123.177 -1.865 1.865 0.35 0.00076293 0.00070322 0.057574 0.052908 54 1285 10 5.66058e+06 4.21279e+06 434679. 3018.61 0.94 0.205654 0.185365 13954 85374 -1 1148 10 425 690 31206 8619 1.95525 1.95525 -135.363 -1.95525 -1.22707 -0.320482 565229. 3925.20 0.17 0.04 0.10 -1 -1 0.17 0.0215127 0.0198103 0.01168 0.2282 0.07635 0.6954 -k6_N10_I40_Fi6_L4_frac1_ff2_45nm.xml diffeq1.v common 12.97 vpr 69.81 MiB -1 -1 0.45 26044 15 0.40 -1 -1 37832 -1 -1 38 162 0 5 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 71488 162 96 994 935 1 693 301 16 16 256 mult_36 auto 31.8 MiB 0.38 5549 72877 19214 46632 7031 69.8 MiB 0.50 0.01 21.1195 -1704.09 -21.1195 21.1195 0.72 0.00285249 0.00265419 0.217117 0.201931 48 12685 31 1.21132e+07 4.02797e+06 756778. 2956.16 6.14 0.900467 0.829897 25228 149258 -1 10232 16 3305 6771 2350801 597324 22.6533 22.6533 -1813.43 -22.6533 0 0 968034. 3781.38 0.33 0.61 0.15 -1 -1 0.33 0.121135 0.113629 0.007906 0.3543 0.01641 0.6293 -k6_N10_I40_Fi6_L4_frac1_ff2_45nm.xml LU8PEEng.v common 681.66 vpr 465.20 MiB -1 -1 63.83 338012 122 80.42 -1 -1 82900 -1 -1 1266 114 45 8 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 476368 114 102 21867 21777 1 11313 1535 50 50 2500 memory auto 194.3 MiB 36.40 153774 983996 362572 600931 20493 465.2 MiB 25.42 0.21 78.6962 -51318.9 -78.6962 78.6962 27.98 0.0511208 0.0415951 6.197 5.12134 98 235687 31 1.47946e+08 9.60601e+07 1.60641e+07 6425.63 344.41 26.0738 21.7058 348768 3430976 -1 208276 21 43003 163786 53231941 14496011 80.3246 80.3246 -64952.4 -80.3246 -23.2381 -0.296573 2.03677e+07 8147.07 10.20 23.25 3.92 -1 -1 10.20 3.83421 3.26511 0.08388 0.4279 0.0113 0.5608 -k6_N10_I47_Fi7_L4_frac1_ff1_45nm.xml ch_intrinsics.v common 3.58 vpr 66.74 MiB -1 -1 0.29 20736 3 0.10 -1 -1 37008 -1 -1 68 99 1 0 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 68344 99 130 343 473 1 228 298 12 12 144 clb auto 28.1 MiB 0.12 564 73928 23247 37393 13288 66.7 MiB 0.19 0.00 1.696 -122.279 -1.696 1.696 0.35 0.000732008 0.000673213 0.0597764 0.0551337 48 1099 13 5.66058e+06 4.21279e+06 411630. 2858.54 0.87 0.208058 0.188144 13872 80872 -1 998 10 395 609 36422 11872 1.909 1.909 -133.315 -1.909 -0.67911 -0.298787 526257. 3654.56 0.16 0.04 0.09 -1 -1 0.16 0.021713 0.0201049 0.01042 0.2387 0.08301 0.6783 -k6_N10_I47_Fi7_L4_frac1_ff1_45nm.xml diffeq1.v common 13.79 vpr 69.92 MiB -1 -1 0.46 26104 15 0.40 -1 -1 37740 -1 -1 38 162 0 5 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 71596 162 96 994 935 1 696 301 16 16 256 mult_36 auto 31.7 MiB 0.98 5074 83965 23415 52823 7727 69.9 MiB 0.55 0.01 21.1448 -1773.98 -21.1448 21.1448 0.78 0.00278688 0.00257786 0.24095 0.223096 44 12552 40 1.21132e+07 4.02797e+06 727469. 2841.68 6.31 0.947639 0.871174 25696 150430 -1 9574 20 3014 5787 1693041 422086 22.6508 22.6508 -1874.75 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3.67 vpr 66.64 MiB -1 -1 0.31 21284 3 0.10 -1 -1 37164 -1 -1 68 99 1 0 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 68236 99 130 343 473 1 225 298 12 12 144 clb auto 28.2 MiB 0.13 547 72933 24263 35607 13063 66.6 MiB 0.19 0.00 1.696 -118.157 -1.696 1.696 0.37 0.000806382 0.00074675 0.0625901 0.0578156 38 1343 16 5.66058e+06 4.21279e+06 334530. 2323.13 0.82 0.226119 0.204681 13012 66834 -1 1180 13 428 629 29651 9921 1.79083 1.79083 -136.144 -1.79083 -1.33719 -0.298787 424691. 2949.24 0.14 0.04 0.07 -1 -1 0.14 0.0278926 0.025754 0.01219 0.202 0.0676 0.7304 -k6_N10_I47_Fi7_L4_frac1_ff2_45nm.xml diffeq1.v common 15.70 vpr 70.03 MiB -1 -1 0.46 25680 15 0.38 -1 -1 37632 -1 -1 38 162 0 5 success 33829c2-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.5.0 on Linux-5.10.35-v8 x86_64 2024-07-04T15:25:46 gh-actions-runner-vtr-auto-spawned151 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19.7928 -1466.69 -19.7928 19.7928 0.63 0.00111836 0.00100903 0.128655 0.117266 48 12532 40 1.21132e+07 3.97408e+06 756778. 2956.16 3.49 0.464878 0.42845 25228 149258 -1 10178 20 3513 6997 2045649 494435 22.4441 22.4441 -1652.21 -22.4441 0 0 968034. 3781.38 0.29 0.37 0.10 -1 -1 0.29 0.0870046 0.082626 0.007795 0.3604 0.01678 0.6228 +k6_N10_I40_Fi7_L4_frac1_ff1_45nm.xml LU8PEEng.v common 724.55 vpr 414.26 MiB -1 -1 46.06 352360 123 54.61 -1 -1 82616 -1 -1 1315 114 45 8 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 424204 114 102 21994 21904 1 12069 1584 50 50 2500 memory auto 193.2 MiB 196.82 159614 1044574 381518 642994 20062 413.2 MiB 19.00 0.15 68.6421 -47223 -68.6421 68.6421 21.10 0.0308981 0.0273964 3.05195 2.54503 100 236722 38 1.47946e+08 9.8701e+07 1.63173e+07 6526.93 314.00 12.122 10.4305 351264 3480436 -1 215262 20 45143 169928 39541885 9701756 79.9752 79.9752 -62096.7 -79.9752 -38.9397 -0.194417 2.05845e+07 8233.80 7.40 11.10 2.56 -1 -1 7.40 1.98283 1.82803 0.0843 0.4337 0.01149 0.5548 +k6_N10_I40_Fi7_L4_frac1_ff2_45nm.xml ch_intrinsics.v common 3.84 vpr 65.71 MiB -1 -1 0.24 21888 3 0.09 -1 -1 36900 -1 -1 68 99 1 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 67284 99 130 344 474 1 226 298 12 12 144 clb auto 27.2 MiB 0.08 632 71938 20846 37502 13590 65.7 MiB 0.18 0.00 1.6034 -108.429 -1.6034 1.6034 0.30 0.000646898 0.000590785 0.0422051 0.0374979 44 1440 13 5.66058e+06 4.21279e+06 360780. 2505.42 1.38 0.245606 0.223142 13094 71552 -1 1197 9 396 629 26743 7908 1.86775 1.86775 -133.179 -1.86775 -0.675154 -0.176172 470765. 3269.20 0.14 0.02 0.05 -1 -1 0.14 0.0157164 0.014797 0.01213 0.2283 0.06963 0.702 +k6_N10_I40_Fi7_L4_frac1_ff2_45nm.xml diffeq1.v common 9.24 vpr 69.11 MiB -1 -1 0.36 26992 15 0.34 -1 -1 38200 -1 -1 37 162 0 5 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 70768 162 96 1009 950 1 711 300 16 16 256 mult_36 auto 30.9 MiB 0.95 5448 85555 24088 54236 7231 69.1 MiB 0.35 0.01 19.7928 -1466.71 -19.7928 19.7928 0.60 0.00114968 0.00103435 0.109037 0.0985606 48 12218 33 1.21132e+07 3.97408e+06 756778. 2956.16 3.21 0.412915 0.380028 25228 149258 -1 9983 17 3489 7050 2009179 486893 22.2518 22.2518 -1667.14 -22.2518 0 0 968034. 3781.38 0.30 0.38 0.11 -1 -1 0.30 0.0770846 0.0729052 0.008103 0.3451 0.01627 0.6387 +k6_N10_I40_Fi7_L4_frac1_ff2_45nm.xml LU8PEEng.v common 539.78 vpr 427.43 MiB -1 -1 46.00 352908 123 54.81 -1 -1 82308 -1 -1 1230 114 45 8 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 437688 114 102 21994 21904 1 11404 1499 50 50 2500 memory auto 193.2 MiB 199.07 148265 936174 334678 580600 20896 427.4 MiB 16.71 0.14 67.3705 -45602.9 -67.3705 67.3705 22.11 0.0262519 0.0217101 2.9839 2.48135 96 231872 31 1.47946e+08 9.41199e+07 1.58254e+07 6330.17 129.56 11.3566 9.76661 343768 3324272 -1 204621 20 43790 167121 40980612 9804187 78.4841 78.4841 -59649.4 -78.4841 -24.4085 -0.340786 1.97871e+07 7914.84 6.51 10.30 2.32 -1 -1 6.51 1.89764 1.7394 0.08433 0.4145 0.01163 0.5739 +k6_N10_I40_Fi8_L4_frac1_ff1_45nm.xml ch_intrinsics.v common 4.03 vpr 65.44 MiB -1 -1 0.26 21888 3 0.11 -1 -1 37068 -1 -1 68 99 1 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 67008 99 130 344 474 1 224 298 12 12 144 clb auto 27.0 MiB 0.13 526 73928 22691 37616 13621 65.4 MiB 0.17 0.00 1.6694 -107.572 -1.6694 1.6694 0.28 0.000379056 0.000336395 0.0409351 0.0366263 54 1183 18 5.66058e+06 4.21279e+06 434679. 3018.61 1.50 0.248949 0.228278 13954 85374 -1 1005 7 367 591 27417 8444 1.83822 1.83822 -127.719 -1.83822 -1.04037 -0.320482 565229. 3925.20 0.15 0.02 0.07 -1 -1 0.15 0.0144011 0.0135842 0.01101 0.25 0.0861 0.6639 +k6_N10_I40_Fi8_L4_frac1_ff1_45nm.xml diffeq1.v common 12.94 vpr 69.13 MiB -1 -1 0.42 26680 15 0.36 -1 -1 38356 -1 -1 37 162 0 5 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 70792 162 96 1009 950 1 710 300 16 16 256 mult_36 auto 31.1 MiB 0.91 5457 89567 29818 52341 7408 69.1 MiB 0.41 0.01 19.624 -1409.39 -19.624 19.624 0.59 0.0011334 0.00102025 0.129308 0.116727 52 11951 23 1.21132e+07 3.97408e+06 805949. 3148.24 6.59 0.636816 0.583627 25992 162577 -1 9925 15 3201 6526 2023384 538028 22.3078 22.3078 -1672.5 -22.3078 0 0 1.06067e+06 4143.25 0.32 0.39 0.11 -1 -1 0.32 0.073809 0.0701951 0.008045 0.3633 0.01709 0.6197 +k6_N10_I40_Fi8_L4_frac1_ff1_45nm.xml LU8PEEng.v common 581.40 vpr 469.46 MiB -1 -1 46.33 352948 123 54.92 -1 -1 82460 -1 -1 1303 114 45 8 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 480724 114 102 21994 21904 1 12000 1572 50 50 2500 memory auto 191.2 MiB 201.12 158764 1015668 359616 637330 18722 425.4 MiB 18.19 0.15 67.94 -48281.3 -67.94 67.94 22.00 0.0232937 0.0191068 3.02343 2.51833 100 233609 25 1.47946e+08 9.80543e+07 1.63173e+07 6526.93 166.45 13.9215 11.9342 351264 3480436 -1 214153 20 45018 167851 32804800 7457308 79.8811 79.8811 -61867.5 -79.8811 -19.3617 -0.17368 2.05845e+07 8233.80 7.66 8.56 2.57 -1 -1 7.66 2.009 1.85538 0.08543 0.4276 0.01159 0.5608 +k6_N10_I40_Fi8_L4_frac1_ff2_45nm.xml ch_intrinsics.v common 3.88 vpr 65.66 MiB -1 -1 0.25 21888 3 0.09 -1 -1 36916 -1 -1 68 99 1 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 67240 99 130 344 474 1 224 298 12 12 144 clb auto 27.3 MiB 0.09 593 77908 25523 39088 13297 65.7 MiB 0.14 0.00 1.62489 -105.941 -1.62489 1.62489 0.30 0.000444019 0.000402401 0.0340832 0.0306423 48 1345 13 5.66058e+06 4.21279e+06 394078. 2736.65 1.39 0.174953 0.160251 13382 75762 -1 1288 10 391 629 42953 13657 1.99354 1.99354 -133.361 -1.99354 -0.759353 -0.298787 503207. 3494.49 0.14 0.03 0.06 -1 -1 0.14 0.0157226 0.0149043 0.01165 0.2379 0.07083 0.6912 +k6_N10_I40_Fi8_L4_frac1_ff2_45nm.xml diffeq1.v common 11.32 vpr 69.12 MiB -1 -1 0.42 26688 15 0.38 -1 -1 38204 -1 -1 37 162 0 5 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 70780 162 96 1009 950 1 710 300 16 16 256 mult_36 auto 31.0 MiB 1.07 5457 89567 29818 52341 7408 69.1 MiB 0.40 0.01 19.624 -1409.39 -19.624 19.624 0.62 0.00132904 0.00119444 0.122902 0.110565 50 12595 27 1.21132e+07 3.97408e+06 780512. 3048.87 4.72 0.500886 0.459886 25484 153448 -1 10006 18 3302 6775 2013806 526063 22.5442 22.5442 -1621.7 -22.5442 0 0 1.00276e+06 3917.05 0.29 0.38 0.12 -1 -1 0.29 0.0938259 0.0899111 0.0082 0.3443 0.01562 0.6401 +k6_N10_I40_Fi8_L4_frac1_ff2_45nm.xml LU8PEEng.v common 542.94 vpr 427.07 MiB -1 -1 45.08 352976 123 53.98 -1 -1 82156 -1 -1 1214 114 45 8 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 437320 114 102 21994 21904 1 11183 1483 50 50 2500 memory auto 192.8 MiB 219.40 147636 939766 330761 590390 18615 427.1 MiB 17.19 0.13 67.8897 -48716.4 -67.8897 67.8897 20.90 0.0246234 0.0209526 2.9854 2.48517 94 226580 40 1.47946e+08 9.32575e+07 1.55181e+07 6207.23 116.26 11.5688 9.93084 341268 3271592 -1 204044 21 42518 165070 36634651 8330855 80.5232 80.5232 -64812.8 -80.5232 -8.42689 -0.295467 1.95446e+07 7817.85 6.70 9.21 2.36 -1 -1 6.70 2.10023 1.93554 0.08471 0.4067 0.0116 0.5817 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop/config/golden_results.txt index 52645d47c66..87e9637f9ad 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test3/vtr_reg_qor_chain_depop/config/golden_results.txt @@ -1,22 +1,22 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml arm_core.v common 545.64 vpr 346.07 MiB -1 -1 29.90 123068 20 97.42 -1 -1 73164 -1 -1 678 133 25 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 354372 133 179 14247 14104 1 6984 1015 36 36 1296 memory auto 153.1 MiB 32.08 113413 185.4 MiB 21.76 0.15 19.9189 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1078381 -1 77019 16 14464 73262 5496259 1015970 0 0 5496259 1015970 73006 22458 0 0 210042 196832 0 0 368789 286982 0 0 76902 27413 0 0 2354010 242472 0 0 2413510 239813 0 0 73006 0 0 61110 436875 418289 2147399 294 1 15.511 15.511 -2652.93 -15.511 0 0 6.15199e+06 8438.94 3.18 3.27 1.33 -1 -1 3.18 1.40873 1.24341 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml boundtop.v common 29.96 vpr 74.69 MiB -1 -1 16.44 46876 3 1.03 -1 -1 40252 -1 -1 44 196 1 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 76484 196 193 1202 1347 1 609 434 15 15 225 io auto 36.5 MiB 0.68 3010 74.7 MiB 0.85 0.01 2.16087 -974.233 -2.16087 2.16087 0.93 0.00291436 0.00253728 0.269948 0.239355 46 6701 18 1.03862e+07 2.91934e+06 698613. 3104.95 5.36 1.17064 1.03678 24628 145134 -1 6132 13 1970 3512 338399 93046 0 0 338399 93046 3512 2632 0 0 15349 14348 0 0 20394 18565 0 0 3701 2853 0 0 148499 26988 0 0 146944 27660 0 0 3512 0 0 1559 5536 5491 37604 0 0 2.76282 2.76282 -1228.81 -2.76282 -0.125944 -0.0328952 899203. 3996.46 0.39 0.23 0.15 -1 -1 0.39 0.127692 0.116743 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ch_intrinsics.v common 5.16 vpr 69.41 MiB -1 -1 0.32 21140 3 0.09 -1 -1 37708 -1 -1 65 99 1 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 71080 99 130 343 473 1 224 295 12 12 144 clb auto 31.2 MiB 0.15 510 69.4 MiB 0.25 0.00 1.48078 -108.611 -1.48078 1.48078 0.47 0.000466184 0.000420489 0.0550261 0.049682 42 1415 11 5.66058e+06 4.05111e+06 373597. 2594.42 2.17 0.241108 0.219032 14140 74821 -1 1202 12 506 825 49045 16861 0 0 49045 16861 825 620 0 0 3184 2978 0 0 4918 4135 0 0 885 744 0 0 19369 4525 0 0 19864 3859 0 0 825 0 0 319 685 400 4081 0 0 2.02783 2.02783 -137.202 -2.02783 -1.25569 -0.298787 468675. 3254.69 0.17 0.05 0.08 -1 -1 0.17 0.0303242 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success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 72532 66 96 780 597 1 451 185 16 16 256 mult_36 auto 32.7 MiB 0.43 3373 70.8 MiB 0.37 0.01 11.5635 -690.79 -11.5635 11.5635 0.98 0.0013991 0.00126992 0.143864 0.130612 64 9288 43 1.21132e+07 2.95009e+06 1.08719e+06 4246.82 17.06 0.825223 0.746478 30692 221371 -1 7456 36 4915 10680 3626838 1068766 0 0 3626838 1068766 10680 8367 0 0 119161 117606 0 0 155051 125323 0 0 11344 9127 0 0 1696720 414975 0 0 1633882 393368 0 0 10680 0 0 5778 14544 14843 68687 0 0 13.1971 13.1971 -854.98 -13.1971 0 0 1.34733e+06 5263.00 0.57 0.93 0.24 -1 -1 0.57 0.137847 0.126881 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml LU8PEEng.v common 1137.42 vpr 605.38 MiB -1 -1 65.07 453864 98 159.27 -1 -1 115012 -1 -1 1800 114 45 8 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 619908 114 102 35713 31804 1 16705 2069 51 51 2601 clb auto 338.8 MiB 62.68 216212 562.0 MiB 109.37 0.92 65.1279 -53179 -65.1279 65.1279 51.20 0.115797 0.0993619 14.912 12.244 126 392450 38 1.52527e+08 1.2484e+08 2.24362e+07 8626.00 574.60 66.8865 54.2519 443726 5099711 -1 363207 24 79344 328232 54538222 11461906 0 0 54538222 11461906 319436 123796 0 0 1309584 1255331 0 0 2187384 1661743 0 0 337525 148871 0 0 25015668 4112075 0 0 25368625 4160090 0 0 319436 0 0 249736 1464608 1468056 8468955 9016 6358 76.0747 76.0747 -67722.1 -76.0747 -27.1496 -0.195295 2.82603e+07 10865.1 16.33 26.33 7.14 -1 -1 16.33 7.10841 6.15306 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml LU32PEEng.v common 5460.67 vpr 2.25 GiB -1 -1 204.09 1469716 97 1270.78 -1 -1 376704 -1 -1 6215 114 168 32 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 2356056 114 102 120062 107871 1 56756 6631 94 94 8836 clb auto 1096.8 MiB 161.65 1026245 1864.5 MiB 414.93 2.46 61.856 -342036 -61.856 61.856 127.26 0.214256 0.181937 34.0309 28.4655 164 1619287 39 5.40921e+08 4.39655e+08 9.81028e+07 11102.6 2921.96 150.146 126.472 1741328 23094485 -1 1509791 24 239982 1084153 347215008 92316822 0 0 347215008 92316822 1021771 355684 0 0 4690594 4489970 0 0 7624654 5795000 0 0 1077549 441474 0 0 165493958 40224130 0 0 167306482 41010564 0 0 1021771 0 0 815629 5697127 5782048 29953255 64454 297504 74.7282 74.7282 -492621 -74.7282 -43.8142 -0.29436 1.25175e+08 14166.5 45.64 106.84 19.07 -1 -1 45.64 14.2441 12.686 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mcml.v common 6514.10 vpr 2.35 GiB -1 -1 273.97 1238052 25 3629.32 -1 -1 372464 -1 -1 6040 36 159 27 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 2461804 36 356 184794 159441 1 63844 6618 93 93 8649 clb auto 1315.9 MiB 101.20 761761 1980.2 MiB 452.96 2.62 42.5926 -275094 -42.5926 42.5926 95.50 0.169429 0.134345 26.7855 22.0562 158 1103853 32 5.27943e+08 4.23316e+08 9.25072e+07 10695.7 1691.99 113.417 94.2878 1667048 21718160 -1 1046278 22 251197 612929 123566250 27262156 0 0 123566250 27262156 526934 313948 0 0 2698183 2576132 0 0 4050018 3326023 0 0 544113 350710 0 0 57911189 10164778 0 0 57835813 10530565 0 0 526934 0 0 279966 1659463 1658463 5585096 94831 756500 45.7759 45.7759 -340713 -45.7759 0 0 1.17788e+08 13618.7 40.92 35.94 17.19 -1 -1 40.92 11.3268 10.0706 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkDelayWorker32B.v common 183.79 vpr 376.73 MiB -1 -1 15.42 122092 5 7.48 -1 -1 48112 -1 -1 456 506 44 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 385768 506 553 3236 3734 1 2845 1559 50 50 2500 memory auto 61.4 MiB 5.87 16661 376.7 MiB 7.68 0.07 6.08946 -1918.26 -6.08946 6.08946 48.86 0.0180085 0.0161754 2.42886 2.134 38 26043 20 1.47946e+08 4.86882e+07 7.51727e+06 3006.91 67.78 11.2247 10.1645 284136 1605944 -1 24776 18 4890 6097 5082714 1206233 0 0 5082714 1206233 5818 5691 0 0 127018 125750 0 0 137709 132675 0 0 6258 5994 0 0 2367367 459975 0 0 2438544 476148 0 0 5818 0 0 932 6599 5267 11846 282 627 7.03549 7.03549 -2373.9 -7.03549 -1.12373 -0.213983 9.46795e+06 3787.18 5.38 2.42 1.63 -1 -1 5.38 0.997662 0.932421 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkPktMerge.v common 37.91 vpr 75.98 MiB -1 -1 1.32 28304 2 0.15 -1 -1 39160 -1 -1 27 311 15 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 77800 311 156 1015 1158 1 965 509 28 28 784 memory auto 36.7 MiB 0.79 8531 74.6 MiB 1.09 0.01 3.95535 -4203.47 -3.95535 3.95535 4.05 0.00313526 0.00254555 0.396748 0.345481 40 15122 15 4.25198e+07 9.67514e+06 2.32339e+06 2963.51 21.22 1.91402 1.69167 86072 485930 -1 14238 14 3030 3473 2777829 766783 0 0 2777829 766783 3473 3257 0 0 84812 84205 0 0 89366 87285 0 0 3569 3363 0 0 1319099 293134 0 0 1277510 295539 0 0 3473 0 0 443 3232 3126 13282 0 0 4.55303 4.55303 -5053.65 -4.55303 -15.3602 -0.340786 2.89875e+06 3697.39 1.72 1.46 0.39 -1 -1 1.72 0.246517 0.225111 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkSMAdapter4B.v common 87.47 vpr 86.68 MiB -1 -1 6.69 54540 5 2.92 -1 -1 41848 -1 -1 151 193 5 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 88764 193 205 2771 2705 1 1306 554 20 20 400 memory auto 49.4 MiB 2.07 10333 86.7 MiB 2.26 0.03 4.41661 -2584.71 -4.41661 4.41661 1.91 0.00677448 0.00580945 0.715977 0.613892 70 22640 44 2.07112e+07 1.0878e+07 1.91061e+06 4776.53 63.83 4.08251 3.49397 50878 398303 -1 18746 16 5242 14268 1664881 365488 0 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306760 0 0 36300 0 0 25965 167898 168626 881524 2607 272 9.04328 9.04328 -9965.8 -9.04328 0 0 6.98504e+06 10332.9 3.61 2.07 1.65 -1 -1 3.61 0.79898 0.729692 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml raygentop.v common 51.19 vpr 87.62 MiB -1 -1 4.10 44184 3 1.12 -1 -1 40264 -1 -1 112 236 1 6 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 89728 236 305 3195 3007 1 1538 660 19 19 361 io auto 50.2 MiB 2.00 12646 87.6 MiB 2.45 0.02 4.33653 -2645.65 -4.33653 4.33653 1.33 0.00405988 0.00366692 0.74619 0.661349 88 25126 23 1.72706e+07 8.96013e+06 2.08404e+06 5772.96 31.02 4.34992 3.82971 49918 442207 -1 23360 16 6285 16877 3437091 744040 0 0 3437091 744040 16092 9762 0 0 128757 125471 0 0 160801 146027 0 0 17477 11007 0 0 1566470 223155 0 0 1547494 228618 0 0 16092 0 0 10099 45915 44800 230552 842 41 4.76083 4.76083 -3149.62 -4.76083 -3.86567 -0.169679 2.59929e+06 7200.24 1.38 1.28 0.37 -1 -1 1.38 0.387934 0.357277 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml sha.v common 28.29 vpr 84.93 MiB -1 -1 2.59 46604 4 2.64 -1 -1 41212 -1 -1 117 38 0 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 86972 38 36 2744 2493 1 1026 191 15 15 225 clb auto 47.8 MiB 1.83 8867 84.9 MiB 1.04 0.02 9.32796 -2447.88 -9.32796 9.32796 1.01 0.0058094 0.00486326 0.427394 0.363152 78 18988 30 1.03862e+07 6.3056e+06 1.12226e+06 4987.81 13.46 2.96217 2.5002 29332 237424 -1 15470 18 4847 13872 883945 191798 0 0 883945 191798 11584 6211 0 0 41783 38412 0 0 70229 57971 0 0 11986 6787 0 0 375407 40931 0 0 372956 41486 0 0 11584 0 0 7012 55203 55214 285092 2680 227 10.8148 10.8148 -3186.58 -10.8148 0 0 1.41477e+06 6287.88 0.61 0.59 0.27 -1 -1 0.61 0.3587 0.319312 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml spree.v common 28.39 vpr 76.00 MiB -1 -1 2.95 34356 16 0.78 -1 -1 38304 -1 -1 46 45 3 1 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 77824 45 32 1193 1152 1 771 127 14 14 196 memory auto 38.5 MiB 1.24 6049 76.0 MiB 0.65 0.01 9.279 -6076.56 -9.279 9.279 0.80 0.00288547 0.00239332 0.291076 0.244835 90 13081 35 9.20055e+06 4.51912e+06 1.09403e+06 5581.78 17.44 1.81468 1.53341 26780 228147 -1 11860 14 3540 10244 2006820 500194 0 0 2006820 500194 10244 5702 0 0 69812 68133 0 0 91271 79384 0 0 10702 6685 0 0 913321 175447 0 0 911470 164843 0 0 10244 0 0 6849 25537 25219 171895 0 0 10.2605 10.2605 -7127.39 -10.2605 -14.2672 -0.317384 1.36167e+06 6947.29 0.59 0.65 0.24 -1 -1 0.59 0.147106 0.135394 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision0.v common 141.74 vpr 247.67 MiB -1 -1 9.78 102876 5 9.82 -1 -1 69436 -1 -1 673 169 0 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 253612 169 197 23321 21461 1 6785 1039 33 33 1089 clb auto 179.3 MiB 10.76 41251 213.2 MiB 10.82 0.10 3.08234 -13147 -3.08234 3.08234 5.55 0.0273427 0.023104 3.42361 2.83565 78 65470 35 6.0475e+07 3.62708e+07 5.97661e+06 5488.16 67.21 18.087 14.9138 148670 1295497 -1 61251 14 16594 29274 1699709 394274 0 0 1699709 394274 25875 19353 0 0 89056 80593 0 0 137119 118902 0 0 26797 20616 0 0 711313 77700 0 0 709549 77110 0 0 25875 0 0 9458 48935 54831 239069 3826 1927 3.87583 3.87583 -15634.2 -3.87583 0 0 7.53085e+06 6915.38 4.02 2.38 1.47 -1 -1 4.02 1.98836 1.77451 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision1.v common 356.60 vpr 298.27 MiB -1 -1 9.50 123468 3 17.20 -1 -1 79532 -1 -1 655 115 0 40 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 305432 115 145 22868 19305 1 9712 955 40 40 1600 mult_36 auto 175.4 MiB 10.12 82272 210.1 MiB 13.21 0.12 5.15059 -21406.4 -5.15059 5.15059 8.98 0.0283561 0.0236999 3.68002 3.10504 100 136709 35 9.16046e+07 5.11412e+07 1.10258e+07 6891.10 253.71 21.791 18.0567 242376 2436732 -1 123699 17 34263 54166 18393474 3828800 0 0 18393474 3828800 46677 38279 0 0 561638 549249 0 0 662523 619771 0 0 48054 39439 0 0 8579349 1288609 0 0 8495233 1293453 0 0 46677 0 0 12866 162410 159065 555314 8140 5217 5.48539 5.48539 -24969.7 -5.48539 0 0 1.38359e+07 8647.47 8.02 6.57 2.47 -1 -1 8.02 2.01249 1.77565 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision2.v common 1568.29 vpr 1.06 GiB -1 -1 13.62 197080 3 8.22 -1 -1 157328 -1 -1 1490 149 0 179 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 1107964 149 182 55416 37075 1 28670 2000 80 80 6400 mult_36 auto 361.6 MiB 28.98 291939 1082.0 MiB 70.87 0.42 12.5458 -48952.6 -12.5458 12.5458 137.07 0.0571067 0.050096 12.1912 10.3311 100 418048 35 3.90281e+08 1.51186e+08 4.58129e+07 7158.27 1169.23 65.0704 54.0002 988936 10231362 -1 389032 20 98976 121041 47809628 9731402 0 0 47809628 9731402 115777 103569 0 0 1169182 1140059 0 0 1411483 1297865 0 0 116899 105223 0 0 22494027 3480737 0 0 22502260 3603949 0 0 115777 0 0 16949 122925 119822 398678 5579 10350 13.8912 13.8912 -57858.9 -13.8912 0 0 5.74647e+07 8978.85 35.65 20.89 11.96 -1 -1 35.65 5.31911 4.69368 - k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision3.v common 3.09 vpr 68.77 MiB -1 -1 0.67 24964 4 0.19 -1 -1 36240 -1 -1 13 11 0 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev /home/vtr-verilog-to-routing 70420 11 2 303 283 2 70 26 7 7 49 clb auto 30.4 MiB 0.18 218 68.8 MiB 0.04 0.00 1.86682 -151.802 -1.86682 1.77386 0.09 0.000344302 0.000276027 0.0236224 0.0194743 26 512 13 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VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 73692 196 193 1201 1346 1 604 435 15 15 225 io auto 33.8 MiB 0.47 2981 150312 44495 93614 12203 72.0 MiB 0.47 0.01 2.05507 -979.869 -2.05507 2.05507 0.57 0.00161266 0.00148292 0.165224 0.151168 40 7176 44 1.03862e+07 2.97323e+06 618415. 2748.51 3.52 0.779086 0.725008 23732 127356 -1 6238 14 2121 3542 344117 91418 2.57674 2.57674 -1194.23 -2.57674 -0.478269 -0.152189 773047. 3435.76 0.25 0.14 0.09 -1 -1 0.25 0.0824519 0.078801 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml ch_intrinsics.v common 3.66 vpr 66.66 MiB -1 -1 0.24 21888 3 0.09 -1 -1 36920 -1 -1 65 99 1 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 68260 99 130 344 474 1 221 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success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 2253068 114 102 120350 108159 1 57393 6680 94 94 8836 clb auto 1099.3 MiB 142.33 1002377 7741412 3101845 4587037 52530 1910.5 MiB 279.40 2.10 61.1772 -294786 -61.1772 61.1772 110.76 0.150743 0.129744 22.1123 18.9696 164 1599216 47 5.40921e+08 4.42296e+08 9.81028e+07 11102.6 2935.70 80.2872 69.5089 1741328 23094485 -1 1497489 23 245053 1111111 345304904 91442091 72.177 72.177 -449510 -72.177 -38.9067 -0.292146 1.25175e+08 14166.5 51.93 126.42 20.24 -1 -1 51.93 14.3855 13.1443 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mcml.v common 4052.63 vpr 2.22 GiB -1 -1 164.66 1254260 25 2216.02 -1 -1 373144 -1 -1 6092 36 159 27 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 2323188 36 356 185159 159806 1 63968 6670 93 93 8649 clb auto 1312.7 MiB 122.70 764984 9043966 3452533 5377457 213976 2034.1 MiB 415.93 2.64 44.0249 -277627 -44.0249 44.0249 108.37 0.156207 0.128577 24.3516 20.2318 154 1118635 43 5.27943e+08 4.26118e+08 9.06356e+07 10479.3 795.63 98.3709 83.4586 1641104 21087044 -1 1050884 22 254701 613161 130623601 28909159 47.7077 47.7077 -351690 -47.7077 -0.240863 -0.0215478 1.14427e+08 13230.1 50.66 42.81 17.78 -1 -1 50.66 12.7798 11.6449 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml mkDelayWorker32B.v common 81.80 vpr 381.34 MiB -1 -1 8.92 121524 5 3.40 -1 -1 48636 -1 -1 465 506 44 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 390492 506 553 3236 3734 1 2854 1568 50 50 2500 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0.71 0.266539 0.248322 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml or1200.v common 154.07 vpr 112.54 MiB -1 -1 3.35 66424 8 3.17 -1 -1 44760 -1 -1 197 385 2 1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 115244 385 362 4415 4299 1 2339 947 26 26 676 io auto 60.2 MiB 2.89 28988 521523 209405 290824 21294 97.3 MiB 3.58 0.04 8.42241 -8911.15 -8.42241 8.42241 1.90 0.00690316 0.00633374 0.750406 0.678248 112 56033 38 3.69863e+07 1.21091e+07 5.00714e+06 7407.01 130.40 4.44196 4.09271 106992 1111850 -1 49084 16 11578 40007 5288009 1017433 9.38843 9.38843 -10181.8 -9.38843 0 0 6.33320e+06 9368.63 1.92 1.30 0.83 -1 -1 1.92 0.479412 0.461578 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml raygentop.v common 30.67 vpr 85.10 MiB -1 -1 2.53 45276 3 0.64 -1 -1 40988 -1 -1 111 236 1 6 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 87144 236 305 3199 3011 1 1531 659 19 19 361 io auto 47.6 MiB 1.39 12224 264331 92913 159695 11723 85.1 MiB 1.28 0.02 4.40121 -2674.93 -4.40121 4.40121 0.96 0.00318628 0.00288552 0.34631 0.311379 80 25950 44 1.72706e+07 8.90623e+06 1.90610e+06 5280.05 19.35 2.13825 1.95394 48118 405907 -1 22961 18 6262 17295 2780033 621184 4.77789 4.77789 -3156.13 -4.77789 -1.83131 -0.196402 2.39503e+06 6634.44 0.68 0.62 0.30 -1 -1 0.68 0.24386 0.231537 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml sha.v common 17.48 vpr 82.26 MiB -1 -1 1.70 47948 3 1.20 -1 -1 43316 -1 -1 115 38 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 84236 38 36 2739 2488 1 1004 189 15 15 225 clb auto 45.2 MiB 1.14 8356 37045 9649 24758 2638 82.3 MiB 0.55 0.01 9.28401 -2528.93 -9.28401 9.28401 0.56 0.00175184 0.00144902 0.173924 0.145902 70 18776 49 1.03862e+07 6.19781e+06 1.04071e+06 4625.39 9.14 1.24178 1.07119 28212 215244 -1 15278 27 5167 14875 913664 202424 11.1228 11.1228 -3189.18 -11.1228 0 0 1.29999e+06 5777.74 0.38 0.35 0.14 -1 -1 0.38 0.209582 0.192104 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml spree.v common 11.99 vpr 73.34 MiB -1 -1 2.03 35788 16 0.48 -1 -1 38724 -1 -1 46 45 3 1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 75100 45 32 1192 1151 1 782 127 14 14 196 memory auto 35.7 MiB 0.77 6226 27880 8859 15719 3302 73.3 MiB 0.36 0.00 9.20301 -5956.36 -9.20301 9.20301 0.47 0.00111759 0.000917258 0.129181 0.108048 88 13652 32 9.20055e+06 4.51912e+06 1.07466e+06 5482.98 5.14 0.554105 0.478437 26584 224627 -1 12292 13 3673 10311 2455365 598014 10.5235 10.5235 -7231.16 -10.5235 -14.7391 -0.317384 1.34088e+06 6841.21 0.42 0.47 0.17 -1 -1 0.42 0.10313 0.0972234 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision0.v common 72.70 vpr 233.89 MiB -1 -1 6.73 102884 5 4.96 -1 -1 70160 -1 -1 682 169 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 239500 169 197 23225 21365 1 6678 1048 33 33 1089 clb auto 176.4 MiB 7.14 40853 549111 176435 350699 21977 210.6 MiB 4.93 0.05 3.08163 -12979.4 -3.08163 3.08163 3.21 0.0144561 0.0118314 1.51886 1.26053 66 68359 29 6.0475e+07 3.67558e+07 5.30978e+06 4875.83 29.88 7.52762 6.45734 139966 1102889 -1 63046 18 17522 29961 1904789 430843 4.01414 4.01414 -15376.1 -4.01414 0 0 6.51388e+06 5981.53 2.19 1.26 0.69 -1 -1 2.19 1.14384 1.06893 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision1.v common 106.32 vpr 277.75 MiB -1 -1 5.67 125212 3 7.51 -1 -1 77896 -1 -1 650 115 0 40 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 284416 115 145 22864 19301 1 9740 950 40 40 1600 mult_36 auto 173.1 MiB 6.83 79459 505094 163866 316078 25150 211.3 MiB 6.13 0.07 5.4916 -21966.6 -5.4916 5.4916 5.36 0.0120955 0.0100814 1.64412 1.38057 98 135498 25 9.16046e+07 5.08717e+07 1.08598e+07 6787.37 50.76 6.70421 5.8006 240780 2401780 -1 120755 16 32923 51866 21019041 4322088 5.75602 5.75602 -25929.5 -5.75602 0 0 1.36941e+07 8558.84 4.59 4.18 1.69 -1 -1 4.59 1.13229 1.0594 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision2.v common 435.72 vpr 1.07 GiB -1 -1 8.47 198472 3 4.65 -1 -1 155908 -1 -1 1500 149 0 179 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 1120368 149 182 55415 37074 1 28661 2010 80 80 6400 mult_36 auto 356.6 MiB 18.61 288964 1701130 572744 1062078 66308 1094.1 MiB 30.13 0.23 12.2118 -49442.5 -12.2118 12.2118 77.26 0.032975 0.0275799 5.18024 4.47614 94 427916 46 3.90281e+08 1.51724e+08 4.36043e+07 6813.17 210.91 22.444 19.7811 963340 9615902 -1 403969 19 110729 132979 60616727 12419672 13.8032 13.8032 -59813.2 -13.8032 0 0 5.46467e+07 8538.54 21.96 13.00 6.92 -1 -1 21.96 2.69993 2.50975 +k6_frac_N10_frac_chain_depop50_mem32K_40nm.xml stereovision3.v common 2.16 vpr 65.91 MiB -1 -1 0.49 26296 4 0.14 -1 -1 36304 -1 -1 13 11 0 0 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 67496 11 2 303 283 2 70 26 7 7 49 clb auto 27.5 MiB 0.13 214 1964 572 1226 166 65.9 MiB 0.03 0.00 1.86682 -151.278 -1.86682 1.77432 0.06 0.00023271 0.000187802 0.0145243 0.0116567 28 568 19 1.07788e+06 700622 79600.7 1624.51 0.31 0.0757083 0.0623371 3864 14328 -1 429 11 257 502 15631 6445 2.07763 1.88327 -173.551 -2.07763 0 0 95067.4 1940.15 0.02 0.02 0.01 -1 -1 0.02 0.0157527 0.0148059 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test4/koios_medium/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test4/koios_medium/config/golden_results.txt index f5fb0192fb8..9e8e6d93e99 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test4/koios_medium/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_nightly_test4/koios_medium/config/golden_results.txt @@ -1,13 +1,13 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_total_timing_analysis_time crit_path_total_sta_time - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml tpu_like.small.os.v common 677.72 vpr 2.29 GiB -1 -1 19.40 195276 5 99.61 -1 -1 109760 -1 -1 492 355 32 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2400616 355 289 25429 18444 2 12313 1433 136 136 18496 dsp_top auto 208.3 MiB 14.61 359754 2344.4 MiB 16.75 0.18 5.12303 -82671.4 -5.12303 2.1842 6.09 0.0412666 0.0368158 6.35102 5.65512 -1 394367 16 5.92627e+08 8.53857e+07 4.08527e+08 22087.3 4.50 8.69097 7.85207 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml tpu_like.small.ws.v common 722.22 vpr 2.30 GiB -1 -1 23.09 242848 5 72.60 -1 -1 117236 -1 -1 686 357 58 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2415672 357 289 25686 20353 2 12799 1656 136 136 18496 dsp_top auto 233.3 MiB 98.40 226648 2359.1 MiB 20.07 0.17 8.31923 -74283.8 -8.31923 2.78336 6.05 0.0420585 0.0356747 6.53862 5.54952 -1 293644 13 5.92627e+08 9.4632e+07 4.08527e+08 22087.3 4.58 8.69976 7.55132 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml dla_like.small.v common 2800.18 vpr 1.75 GiB -1 -1 94.38 736748 6 754.09 -1 -1 389988 -1 -1 3895 206 132 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 1840088 206 13 165036 139551 1 69732 4358 88 88 7744 dsp_top auto 1052.4 MiB 1692.76 601396 1606.1 MiB 88.48 0.64 5.30279 -150931 -5.30279 5.30279 1.96 0.131322 0.104184 16.7561 13.7761 -1 876475 15 2.4541e+08 1.55281e+08 1.69370e+08 21871.2 14.42 24.7943 21.0377 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml bnn.v common 797.74 vpr 2.01 GiB -1 -1 84.28 729308 3 56.57 -1 -1 411036 -1 -1 6190 260 0 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 2106860 260 122 206251 154342 1 87361 6635 87 87 7569 clb auto 1300.8 MiB 202.79 910701 1723.3 MiB 174.17 1.12 6.77966 -140235 -6.77966 6.77966 1.97 0.198989 0.175034 29.926 24.7241 -1 1199797 17 2.37162e+08 1.88714e+08 1.65965e+08 21927.0 20.72 41.872 35.326 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml attention_layer.v common 778.08 vpr 1002.21 MiB -1 -1 34.70 314612 5 16.29 -1 -1 135008 -1 -1 1000 1052 194 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 1026264 1052 32 45971 36479 1 23765 2376 82 82 6724 dsp_top auto 311.2 MiB 549.16 240205 1002.2 MiB 29.44 0.19 5.44091 -87140.2 -5.44091 5.44091 1.55 0.049896 0.0424754 8.68648 7.24743 -1 380516 19 2.09174e+08 7.94825e+07 1.47429e+08 21925.8 7.09 11.8806 10.0846 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml conv_layer_hls.v common 494.69 vpr 1.34 GiB -1 -1 19.54 264520 3 15.16 -1 -1 56460 -1 -1 1739 1016 21 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 1406888 1016 2244 12841 14383 1 7131 5032 104 104 10816 io auto 138.0 MiB 74.83 73655 1373.9 MiB 27.72 0.28 4.66975 -16444.1 -4.66975 4.66975 5.72 0.0687639 0.0660952 9.48152 9.00606 -1 100883 14 3.44415e+08 5.44618e+07 2.37404e+08 21949.3 3.58 12.2466 11.6618 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml conv_layer.v common 261.70 vpr 539.64 MiB -1 -1 14.31 148624 4 106.09 -1 -1 82672 -1 -1 821 91 56 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 552588 91 65 33178 28065 2 12714 1075 56 56 3136 dsp_top auto 245.3 MiB 15.16 162218 539.6 MiB 20.95 0.16 4.63337 -55301.2 -4.63337 1.84791 1.03 0.064784 0.0563394 8.11436 6.88378 -1 232737 13 9.76016e+07 4.12774e+07 6.79229e+07 21659.1 6.42 11.3034 9.78771 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml eltwise_layer.v common 134.01 vpr 471.62 MiB -1 -1 5.54 84604 4 10.22 -1 -1 57240 -1 -1 358 152 72 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 482936 152 97 14484 12274 2 6814 726 56 56 3136 dsp_top auto 139.0 MiB 7.49 128840 471.6 MiB 10.79 0.08 3.7231 -22257.6 -3.7231 1.56771 1.07 0.0418396 0.0359169 5.57189 4.76335 -1 188991 14 9.76016e+07 3.18294e+07 6.79229e+07 21659.1 5.32 7.49194 6.52592 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml robot_rl.v common 161.71 vpr 468.34 MiB -1 -1 16.70 243012 5 9.37 -1 -1 77484 -1 -1 874 3 84 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 479580 3 384 24598 22966 1 12280 1363 52 52 2704 memory auto 216.5 MiB 18.36 105021 468.3 MiB 24.33 0.18 5.54985 -36353.1 -5.54985 5.54985 0.84 0.0529336 0.0457202 6.49893 5.4558 -1 173035 17 8.30642e+07 4.05203e+07 5.85728e+07 21661.5 5.88 9.68277 8.27364 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml reduction_layer.v common 112.24 vpr 312.18 MiB -1 -1 18.23 305628 6 11.33 -1 -1 74884 -1 -1 659 37 52 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 319672 37 17 16436 14191 1 8837 765 38 38 1444 memory auto 166.0 MiB 19.17 99898 301.3 MiB 12.00 0.15 5.43701 -40617.4 -5.43701 5.43701 0.38 0.0444985 0.0353751 3.86054 3.15721 -1 163885 16 4.31434e+07 2.55478e+07 3.09543e+07 21436.5 5.73 6.27904 5.31913 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 - k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml spmv.v common 281.23 vpr 940.78 MiB -1 -1 9.42 191424 6 15.99 -1 -1 69580 -1 -1 649 82 232 -1 success 327aa1d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 9.4.0 on Linux-5.10.35-v8 x86_64 2023-02-09T16:01:10 gh-actions-runner-vtr-auto-spawned87 /root/vtr-verilog-to-routing/vtr-verilog-to-routing 963360 82 17 16267 14363 1 9085 1012 84 84 7056 memory auto 154.7 MiB 20.89 173262 940.8 MiB 9.92 0.09 4.77582 -40195.5 -4.77582 4.77582 2.76 0.0348339 0.0273197 3.85139 3.13376 -1 231971 14 2.2198e+08 5.81696e+07 1.54484e+08 21894.0 5.04 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vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml tpu_like.small.os.v common 619.60 vpr 2.33 GiB -1 -1 13.39 196968 5 72.67 -1 -1 109604 -1 -1 496 355 32 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 2439252 355 289 25456 18471 2 12404 1437 136 136 18496 dsp_top auto 214.0 MiB 12.23 355505 1152489 467663 489673 195153 2382.1 MiB 22.48 0.22 5.68333 -83747.3 -5.68333 2.1842 6.98 0.0505978 0.046175 7.84344 7.09719 -1 385939 15 5.92627e+08 8.54973e+07 4.08527e+08 22087.3 4.41 10.6032 9.72523 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml tpu_like.small.ws.v common 662.30 vpr 2.34 GiB -1 -1 16.28 242356 5 50.41 -1 -1 116980 -1 -1 687 357 58 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 2456672 357 289 25618 20285 2 12726 1657 136 136 18496 dsp_top auto 238.1 MiB 62.99 206081 1520812 537522 740750 242540 2399.1 MiB 28.10 0.22 7.3529 -70878.9 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+k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml bnn.v common 673.61 vpr 2.02 GiB -1 -1 59.67 728992 3 36.85 -1 -1 417368 -1 -1 6187 260 0 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 2123212 260 122 206293 154384 1 87347 6632 87 87 7569 clb auto 1305.4 MiB 169.50 922485 7854164 3058750 4303825 491589 1741.7 MiB 173.10 1.21 6.93854 -143778 -6.93854 6.93854 2.22 0.1974 0.178302 23.7686 20.3 -1 1211007 17 2.37162e+08 1.88631e+08 1.65965e+08 21927.0 22.70 35.8566 31.4249 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml attention_layer.v common 769.78 vpr 1019.14 MiB -1 -1 25.31 316344 5 9.16 -1 -1 134712 -1 -1 995 1052 194 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 1043600 1052 32 45949 36457 1 23713 2371 82 82 6724 dsp_top auto 316.2 MiB 535.35 235206 2499245 888437 1481261 129547 1019.1 MiB 30.47 0.19 5.64881 -88843.7 -5.64881 5.64881 1.81 0.0461721 0.0396534 7.82698 6.6403 -1 373961 16 2.09174e+08 7.9343e+07 1.47429e+08 21925.8 6.61 10.7458 9.30974 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml conv_layer_hls.v common 386.70 vpr 1.36 GiB -1 -1 18.23 255132 3 10.00 -1 -1 61072 -1 -1 1742 1016 21 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 1430828 1016 2244 12839 14381 1 7127 5035 104 104 10816 io auto 140.6 MiB 67.37 74682 5871531 3028982 2055644 786905 1397.3 MiB 21.15 0.19 5.72079 -17485.3 -5.72079 5.72079 3.75 0.053385 0.0516384 7.65676 7.41028 -1 101137 17 3.44415e+08 5.45455e+07 2.37404e+08 21949.3 3.04 10.2052 9.90229 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml conv_layer.v common 167.72 vpr 548.32 MiB -1 -1 10.12 149124 4 57.67 -1 -1 82592 -1 -1 821 91 56 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 561480 91 65 33180 28067 2 12775 1075 56 56 3136 dsp_top auto 248.0 MiB 12.48 161649 617523 203048 388674 25801 548.3 MiB 12.44 0.10 4.71204 -49256.5 -4.71204 1.93601 0.74 0.0351018 0.0300777 4.47165 3.80648 -1 233134 14 9.76016e+07 4.12774e+07 6.79229e+07 21659.1 4.19 6.67861 5.86711 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml eltwise_layer.v common 96.94 vpr 480.44 MiB -1 -1 4.01 85204 4 6.23 -1 -1 56968 -1 -1 347 152 72 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 491968 152 97 14409 12199 2 6828 715 56 56 3136 dsp_top auto 141.6 MiB 8.20 133480 377843 120228 230660 26955 480.4 MiB 6.46 0.05 3.95733 -22810.1 -3.95733 1.56771 0.73 0.0220286 0.0187682 2.65044 2.28617 -1 195459 14 9.76016e+07 3.15225e+07 6.79229e+07 21659.1 3.44 3.88511 3.43833 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml robot_rl.v common 115.41 vpr 478.52 MiB -1 -1 12.99 239476 5 7.81 -1 -1 77052 -1 -1 876 3 84 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 490004 3 384 24647 23015 1 12352 1365 52 52 2704 memory auto 221.8 MiB 13.92 110684 818817 266813 480208 71796 478.5 MiB 14.39 0.12 5.75775 -36197.2 -5.75775 5.75775 0.58 0.0235431 0.0188135 2.93359 2.43328 -1 180370 18 8.30642e+07 4.05761e+07 5.85728e+07 21661.5 3.82 4.89173 4.24908 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml reduction_layer.v common 76.71 vpr 318.11 MiB -1 -1 13.06 307408 6 6.97 -1 -1 74924 -1 -1 735 37 52 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 325740 37 17 16391 14146 1 8955 841 38 38 1444 memory auto 169.5 MiB 12.70 101987 306377 77320 220137 8920 306.7 MiB 8.23 0.09 5.54334 -34945.2 -5.54334 5.54334 0.25 0.0173344 0.0141754 1.70924 1.42776 -1 167887 16 4.31434e+07 2.76685e+07 3.09543e+07 21436.5 3.61 3.17188 2.78308 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml spmv.v common 216.67 vpr 956.60 MiB -1 -1 7.64 195504 6 12.41 -1 -1 69980 -1 -1 643 82 232 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 979556 82 17 16311 14407 1 9023 1006 84 84 7056 memory auto 158.1 MiB 17.56 160557 509844 165549 329315 14980 956.6 MiB 6.62 0.06 4.90582 -39742 -4.90582 4.90582 1.96 0.0182862 0.0156519 2.06248 1.70904 -1 218320 13 2.2198e+08 5.80022e+07 1.54484e+08 21894.0 3.17 3.29314 2.85784 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 +k6FracN10LB_mem20K_complexDSP_customSB_22nm.xml softmax.v common 105.95 vpr 447.11 MiB -1 -1 9.76 285876 10 8.07 -1 -1 57872 -1 -1 504 402 0 -1 success v8.0.0-10476-g8192a19e5-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-06-20T15:31:36 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 457844 402 150 12958 11781 1 7836 1093 54 54 2916 dsp_top auto 134.6 MiB 11.32 80267 772129 261682 467759 42688 447.1 MiB 8.77 0.07 7.40003 -12898.4 -7.40003 7.40003 0.69 0.0144036 0.0128586 1.97847 1.71617 -1 130877 17 8.95105e+07 2.34537e+07 6.32721e+07 21698.2 2.33 3.04257 2.72326 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 diff --git a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt index e90dc4ebc2a..c6e28cffde3 100644 --- a/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt +++ b/vtr_flow/tasks/regression_tests/vtr_reg_strong/strong_power/config/golden_results.txt @@ -1,3 +1,3 @@ - arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops crit_path_total_internal_heap_pushes crit_path_total_internal_heap_pops crit_path_total_external_heap_pushes crit_path_total_external_heap_pops crit_path_total_external_SOURCE_pushes crit_path_total_external_SOURCE_pops crit_path_total_internal_SOURCE_pushes crit_path_total_internal_SOURCE_pops crit_path_total_external_SINK_pushes crit_path_total_external_SINK_pops crit_path_total_internal_SINK_pushes crit_path_total_internal_SINK_pops crit_path_total_external_IPIN_pushes crit_path_total_external_IPIN_pops crit_path_total_internal_IPIN_pushes crit_path_total_internal_IPIN_pops crit_path_total_external_OPIN_pushes crit_path_total_external_OPIN_pops crit_path_total_internal_OPIN_pushes crit_path_total_internal_OPIN_pops crit_path_total_external_CHANX_pushes crit_path_total_external_CHANX_pops crit_path_total_internal_CHANX_pushes crit_path_total_internal_CHANX_pops crit_path_total_external_CHANY_pushes crit_path_total_external_CHANY_pops crit_path_total_internal_CHANY_pushes crit_path_total_internal_CHANY_pops crit_path_rt_node_SOURCE_pushes crit_path_rt_node_SINK_pushes crit_path_rt_node_IPIN_pushes crit_path_rt_node_OPIN_pushes crit_path_rt_node_CHANX_pushes crit_path_rt_node_CHANY_pushes crit_path_adding_all_rt crit_path_adding_high_fanout_rt crit_path_total_number_of_adding_all_rt_from_calling_high_fanout_rt critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc - k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 2.56 vpr 68.86 MiB -1 -1 0.16 21164 3 0.04 -1 -1 36732 -1 -1 68 99 1 0 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev vtr-verilog-to-routing 70512 99 130 343 473 1 225 298 12 12 144 clb auto 30.0 MiB 0.09 599 68.9 MiB 0.14 0.00 1.62851 -108.153 -1.62851 1.62851 0.24 0.000299717 0.000270177 0.0273918 0.0247539 36 1433 28 5.66058e+06 4.21279e+06 305235. 2119.69 0.89 0.154527 0.142184 12238 58442 -1 1268 11 415 652 36110 11199 0 0 36110 11199 652 509 0 0 1962 1778 0 0 2299 1962 0 0 702 569 0 0 14627 3510 0 0 15868 2871 0 0 652 0 0 237 348 302 2469 0 0 1.99752 1.99752 -139.864 -1.99752 -0.305022 -0.0771249 378970. 2631.74 0.08 0.02 0.03 -1 -1 0.08 0.0122486 0.0116483 0.01106 0.2164 0.06499 0.7186 - k6_frac_N10_mem32K_40nm.xml diffeq1.v common 11.60 vpr 71.82 MiB -1 -1 0.27 26032 15 0.29 -1 -1 39268 -1 -1 36 162 0 5 success v8.0.0-8313-gbd73e8384d-dirty release IPO VTR_ASSERT_LEVEL=2 GNU 13.1.1 on Linux-6.1.31-2-MANJARO x86_64 2023-07-20T13:36:56 dev vtr-verilog-to-routing 73548 162 96 994 935 1 694 299 16 16 256 mult_36 auto 33.9 MiB 0.18 5116 71.8 MiB 0.31 0.00 20.0144 -1558.29 -20.0144 20.0144 0.52 0.000865507 0.000778261 0.0906443 0.0820495 58 11189 29 1.21132e+07 3.92018e+06 904549. 3533.39 6.75 0.600626 0.551765 27012 180273 -1 8988 16 2806 5411 1373904 390089 0 0 1373904 390089 5411 3482 0 0 66539 65294 0 0 69304 66706 0 0 5863 3940 0 0 620903 124434 0 0 605884 126233 0 0 5411 0 0 2632 7125 7046 41280 0 0 22.5339 22.5339 -1730.29 -22.5339 0 0 1.15318e+06 4504.63 0.26 0.22 0.11 -1 -1 0.26 0.0593905 0.0563493 0.007993 0.3665 0.01796 0.6156 +arch circuit script_params vtr_flow_elapsed_time vtr_max_mem_stage vtr_max_mem error odin_synth_time max_odin_mem parmys_synth_time max_parmys_mem abc_depth abc_synth_time abc_cec_time abc_sec_time max_abc_mem ace_time max_ace_mem num_clb num_io num_memories num_mult vpr_status vpr_revision vpr_build_info vpr_compiler vpr_compiled hostname rundir max_vpr_mem num_primary_inputs num_primary_outputs num_pre_packed_nets num_pre_packed_blocks num_netlist_clocks num_post_packed_nets num_post_packed_blocks device_width device_height device_grid_tiles device_limiting_resources device_name pack_mem pack_time placed_wirelength_est total_swap accepted_swap rejected_swap aborted_swap place_mem place_time place_quench_time placed_CPD_est placed_setup_TNS_est placed_setup_WNS_est placed_geomean_nonvirtual_intradomain_critical_path_delay_est place_delay_matrix_lookup_time place_quench_timing_analysis_time place_quench_sta_time place_total_timing_analysis_time place_total_sta_time min_chan_width routed_wirelength min_chan_width_route_success_iteration logic_block_area_total logic_block_area_used min_chan_width_routing_area_total min_chan_width_routing_area_per_tile min_chan_width_route_time min_chan_width_total_timing_analysis_time min_chan_width_total_sta_time crit_path_num_rr_graph_nodes crit_path_num_rr_graph_edges crit_path_collapsed_nodes crit_path_routed_wirelength crit_path_route_success_iteration crit_path_total_nets_routed crit_path_total_connections_routed crit_path_total_heap_pushes crit_path_total_heap_pops critical_path_delay geomean_nonvirtual_intradomain_critical_path_delay setup_TNS setup_WNS hold_TNS hold_WNS crit_path_routing_area_total crit_path_routing_area_per_tile router_lookahead_computation_time crit_path_route_time crit_path_create_rr_graph_time crit_path_create_intra_cluster_rr_graph_time crit_path_tile_lookahead_computation_time crit_path_router_lookahead_computation_time crit_path_total_timing_analysis_time crit_path_total_sta_time total_power routing_power_perc clock_power_perc tile_power_perc +k6_frac_N10_mem32K_40nm.xml ch_intrinsics.v common 3.81 vpr 66.11 MiB -1 -1 0.26 21888 3 0.09 -1 -1 36764 -1 -1 68 99 1 0 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 67692 99 130 344 474 1 223 298 12 12 144 clb auto 27.3 MiB 0.12 585 71938 22630 36940 12368 66.1 MiB 0.14 0.00 1.6034 -105.161 -1.6034 1.6034 0.29 0.00139437 0.00135258 0.0351572 0.0316889 50 1281 9 5.66058e+06 4.21279e+06 406292. 2821.48 1.38 0.208431 0.191734 13526 77840 -1 1197 13 384 639 38731 12079 1.94763 1.94763 -135.636 -1.94763 -0.246888 -0.0618635 520805. 3616.70 0.14 0.03 0.06 -1 -1 0.14 0.0186428 0.0176628 0.01175 0.2358 0.07065 0.6936 +k6_frac_N10_mem32K_40nm.xml diffeq1.v common 11.53 vpr 69.39 MiB -1 -1 0.37 26692 15 0.34 -1 -1 38048 -1 -1 36 162 0 5 success v8.0.0-10480-gb00638420 release IPO VTR_ASSERT_LEVEL=2 GNU 11.4.0 on Linux-6.5.0-41-generic x86_64 2024-07-09T01:24:04 amir-virtual-machine /home/amir/Projects/vtr-yosys42/vtr-verilog-to-routing/vtr_flow/scripts 71060 162 96 1009 950 1 702 299 16 16 256 mult_36 auto 31.3 MiB 0.25 5482 83216 24145 51990 7081 69.4 MiB 0.33 0.01 19.9021 -1505.63 -19.9021 19.9021 0.55 0.00116941 0.00106566 0.107758 0.0971761 48 12516 28 1.21132e+07 3.92018e+06 756778. 2956.16 6.27 0.595579 0.54881 25228 149258 -1 9859 18 3192 6328 1764441 435058 22.1605 22.1605 -1742.59 -22.1605 0 0 968034. 3781.38 0.29 0.35 0.10 -1 -1 0.29 0.0780723 0.07404 0.007937 0.3531 0.01667 0.6303 diff --git a/yosys/.gitcommit b/yosys/.gitcommit index 46b7856fbc8..6c5826ed776 100644 --- a/yosys/.gitcommit +++ b/yosys/.gitcommit @@ -1 +1 @@ -$Format:%h$ +dac5bd1983a diff --git a/yosys/.github/ISSUE_TEMPLATE/bug_report.yml b/yosys/.github/ISSUE_TEMPLATE/bug_report.yml index 27cfd09b7de..e4c776ed914 100644 --- a/yosys/.github/ISSUE_TEMPLATE/bug_report.yml +++ b/yosys/.github/ISSUE_TEMPLATE/bug_report.yml @@ -34,6 +34,7 @@ body: - macOS - Windows - BSD + - WebAssembly multiple: true validations: required: true @@ -42,7 +43,7 @@ body: attributes: value: > When providing steps to reproduce the issue, please ensure that the issue - is reproducible in the current git master of Yosys. Also ensure to + is reproducible in the current git main of Yosys. Also ensure to provide all necessary source files needed. diff --git a/yosys/.github/ISSUE_TEMPLATE/docs_report.yml b/yosys/.github/ISSUE_TEMPLATE/docs_report.yml new file mode 100644 index 00000000000..aa65c63b9c9 --- /dev/null +++ b/yosys/.github/ISSUE_TEMPLATE/docs_report.yml @@ -0,0 +1,55 @@ +name: Documentation Report +description: Report a problem with the Yosys documentation +labels: ["pending-verification"] +body: + - type: markdown + attributes: + value: > + + If you have a general question, please ask it in the [Discussions](https://github.com/YosysHQ/yosys/discussions) area + or join our [IRC Channel](https://web.libera.chat/#yosys) or [Community Slack](https://join.slack.com/t/yosyshq/shared_invite/zt-1aopkns2q-EiQ97BeQDt_pwvE41sGSuA). + + + If you have found a bug in Yosys, or in building the documentation, + please fill out the Bug Report issue form, this form is for problems + with the live documentation on [Read the + Docs](https://yosyshq.readthedocs.io/projects/yosys/). Please only + report problems that appear on the latest version of the documentation. + + + Please contact [YosysHQ GmbH](https://www.yosyshq.com/) if you need + commercial support for Yosys. + + - type: input + id: docs_url + attributes: + label: Link to page + description: "Please provide a link to the page where the problem was found." + placeholder: "e.g. https://yosyshq.readthedocs.io/projects/yosys/" + validations: + required: true + + - type: input + id: build_number + attributes: + label: Build number + description: "If possible, please provide the latest build number from https://readthedocs.org/projects/yosys/builds/." + placeholder: "e.g. Build #24078236" + validations: + required: false + + - type: textarea + id: problem + attributes: + label: Issue + description: "Please describe what is incorrect, invalid, or missing." + validations: + required: true + + - type: textarea + id: expected + attributes: + label: Expected + description: "If applicable, please describe what should appear instead." + validations: + required: false diff --git a/yosys/.github/PULL_REQUEST_TEMPLATE.md b/yosys/.github/PULL_REQUEST_TEMPLATE.md new file mode 100644 index 00000000000..82daf609d36 --- /dev/null +++ b/yosys/.github/PULL_REQUEST_TEMPLATE.md @@ -0,0 +1,5 @@ +_What are the reasons/motivation for this change?_ + +_Explain how this is achieved._ + +_If applicable, please suggest to reviewers how they can test the change._ diff --git a/yosys/.github/actions/setup-build-env/action.yml b/yosys/.github/actions/setup-build-env/action.yml new file mode 100644 index 00000000000..345b6db8ada --- /dev/null +++ b/yosys/.github/actions/setup-build-env/action.yml @@ -0,0 +1,33 @@ +name: Build environment setup +description: Configure build env for Yosys builds +runs: + using: composite + steps: + - name: Install Linux Dependencies + if: runner.os == 'Linux' + shell: bash + run: | + sudo apt-get update + sudo apt-get install gperf build-essential bison flex libreadline-dev gawk tcl-dev libffi-dev git graphviz xdot pkg-config python3 libboost-system-dev libboost-python-dev libboost-filesystem-dev zlib1g-dev + + - name: Install macOS Dependencies + if: runner.os == 'macOS' + shell: bash + run: | + HOMEBREW_NO_INSTALLED_DEPENDENTS_CHECK=1 brew install bison flex gawk libffi pkg-config bash autoconf + + - name: Linux runtime environment + if: runner.os == 'Linux' + shell: bash + run: | + echo "${{ github.workspace }}/.local/bin" >> $GITHUB_PATH + echo "procs=$(nproc)" >> $GITHUB_ENV + + - name: macOS runtime environment + if: runner.os == 'macOS' + shell: bash + run: | + echo "${{ github.workspace }}/.local/bin" >> $GITHUB_PATH + echo "$(brew --prefix bison)/bin" >> $GITHUB_PATH + echo "$(brew --prefix flex)/bin" >> $GITHUB_PATH + echo "procs=$(sysctl -n hw.ncpu)" >> $GITHUB_ENV diff --git a/yosys/.github/workflows/codeql.yml b/yosys/.github/workflows/codeql.yml index 2a046703bc0..24ae7c89883 100644 --- a/yosys/.github/workflows/codeql.yml +++ b/yosys/.github/workflows/codeql.yml @@ -14,10 +14,11 @@ jobs: run: sudo apt-get install bison flex libreadline-dev tcl-dev libffi-dev - name: Checkout repository - uses: actions/checkout@v3 - + uses: actions/checkout@v4 + with: + submodules: true - name: Initialize CodeQL - uses: github/codeql-action/init@v2 + uses: github/codeql-action/init@v3 with: languages: cpp queries: security-extended,security-and-quality @@ -26,4 +27,4 @@ jobs: run: make yosys -j6 - name: Perform CodeQL Analysis - uses: github/codeql-action/analyze@v2 + uses: github/codeql-action/analyze@v3 diff --git a/yosys/.github/workflows/emcc.yml b/yosys/.github/workflows/emcc.yml deleted file mode 100644 index 295d9554b81..00000000000 --- a/yosys/.github/workflows/emcc.yml +++ /dev/null @@ -1,18 +0,0 @@ -name: Emscripten Build - -on: [push, pull_request] - -jobs: - emcc: - runs-on: ubuntu-latest - steps: - - uses: mymindstorm/setup-emsdk@v11 - - uses: actions/checkout@v3 - - name: Build - run: | - make config-emcc - make YOSYS_VER=latest - - uses: actions/upload-artifact@v3 - with: - name: yosysjs - path: yosysjs-latest.zip diff --git a/yosys/.github/workflows/extra-builds.yml b/yosys/.github/workflows/extra-builds.yml new file mode 100644 index 00000000000..d7c6e13ff06 --- /dev/null +++ b/yosys/.github/workflows/extra-builds.yml @@ -0,0 +1,97 @@ +name: Test extra build flows + +on: [push, pull_request] + +jobs: + pre_job: + runs-on: ubuntu-latest + outputs: + should_skip: ${{ steps.skip_check.outputs.should_skip }} + steps: + - id: skip_check + uses: fkirc/skip-duplicate-actions@v5 + with: + paths_ignore: '["**/README.md", "docs/**", "guidelines/**"]' + # cancel previous builds if a new commit is pushed + cancel_others: 'true' + # only run on push *or* pull_request, not both + concurrent_skipping: 'same_content_newer' + + vs-prep: + name: Prepare Visual Studio build + runs-on: ubuntu-latest + needs: [pre_job] + if: needs.pre_job.outputs.should_skip != 'true' + steps: + - uses: actions/checkout@v4 + with: + submodules: true + - name: Build + run: make vcxsrc YOSYS_VER=latest + - uses: actions/upload-artifact@v4 + with: + name: vcxsrc + path: yosys-win32-vcxsrc-latest.zip + + vs-build: + name: Visual Studio build + runs-on: windows-2019 + needs: [vs-prep, pre_job] + if: needs.pre_job.outputs.should_skip != 'true' + steps: + - uses: actions/download-artifact@v4 + with: + name: vcxsrc + path: . + - name: unzip + run: unzip yosys-win32-vcxsrc-latest.zip + - name: setup-msbuild + uses: microsoft/setup-msbuild@v2 + - name: MSBuild + working-directory: yosys-win32-vcxsrc-latest + run: msbuild YosysVS.sln /p:PlatformToolset=v142 /p:Configuration=Release /p:WindowsTargetPlatformVersion=10.0.17763.0 + + wasi-build: + name: WASI build + needs: pre_job + if: needs.pre_job.outputs.should_skip != 'true' + runs-on: ubuntu-latest + steps: + - uses: actions/checkout@v4 + with: + submodules: true + - name: Build + run: | + WASI_SDK=wasi-sdk-19.0 + WASI_SDK_URL=https://github.com/WebAssembly/wasi-sdk/releases/download/wasi-sdk-19/wasi-sdk-19.0-linux.tar.gz + if ! [ -d ${WASI_SDK} ]; then curl -L ${WASI_SDK_URL} | tar xzf -; fi + + mkdir -p build + cat > build/Makefile.conf <> $GITHUB_ENV + + - name: Cache iverilog + id: cache-iverilog + uses: actions/cache@v4 + with: + path: .local/ + key: ${{ matrix.os }}-${{ env.IVERILOG_GIT }} + + - name: Build iverilog + if: steps.cache-iverilog.outputs.cache-hit != 'true' + shell: bash + run: | + mkdir -p ${{ github.workspace }}/.local/ + cd iverilog + autoconf + CC=gcc CXX=g++ ./configure --prefix=${{ github.workspace }}/.local + make -j$procs + make install + + - name: Download build artifact + uses: actions/download-artifact@v4 + with: + name: build-${{ matrix.os }} + + - name: Uncompress build + shell: bash + run: + tar -xvf build.tar + + - name: Log yosys-config output + run: | + ./yosys-config || true + + - name: Run tests + shell: bash + run: | + make -j$procs test TARGETS= EXTRA_TARGETS= CONFIG=$CC + + - name: Report errors + if: ${{ failure() }} + shell: bash + run: | + find tests/**/*.err -print -exec cat {} \; + + test-docs: + name: Run docs tests + runs-on: ${{ matrix.os }} + needs: [build-yosys, pre_docs_job] + if: needs.pre_docs_job.outputs.should_skip != 'true' + env: + CC: clang + strategy: + matrix: + os: [ubuntu-latest] + fail-fast: false + steps: + - name: Checkout Yosys + uses: actions/checkout@v4 + + - name: Setup environment + uses: ./.github/actions/setup-build-env + + - name: Download build artifact + uses: actions/download-artifact@v4 + with: + name: build-${{ matrix.os }} + + - name: Uncompress build + shell: bash + run: + tar -xvf build.tar + + - name: Log yosys-config output + run: | + ./yosys-config || true + + - name: Run tests + shell: bash + run: | + make -C docs test -j${{ env.procs }} diff --git a/yosys/.github/workflows/test-compile.yml b/yosys/.github/workflows/test-compile.yml new file mode 100644 index 00000000000..a892c91ceca --- /dev/null +++ b/yosys/.github/workflows/test-compile.yml @@ -0,0 +1,79 @@ +name: Compiler testing + +on: [push, pull_request] + +jobs: + pre_job: + runs-on: ubuntu-latest + outputs: + should_skip: ${{ steps.skip_check.outputs.should_skip }} + steps: + - id: skip_check + uses: fkirc/skip-duplicate-actions@v5 + with: + paths_ignore: '["**/README.md", "docs/**", "guidelines/**"]' + # cancel previous builds if a new commit is pushed + cancel_others: 'true' + # only run on push *or* pull_request, not both + concurrent_skipping: 'same_content_newer' + + test-compile: + runs-on: ${{ matrix.os }} + needs: pre_job + if: needs.pre_job.outputs.should_skip != 'true' + env: + CXXFLAGS: ${{ startsWith(matrix.compiler, 'gcc') && '-Wp,-D_GLIBCXX_ASSERTIONS' || ''}} + CC_SHORT: ${{ startsWith(matrix.compiler, 'gcc') && 'gcc' || 'clang' }} + strategy: + matrix: + os: + - ubuntu-latest + compiler: + # oldest supported + - 'clang-14' + - 'gcc-10' + # newest + - 'clang' + - 'gcc' + include: + # macOS + - os: macos-13 + compiler: 'clang' + # oldest clang not available on ubuntu-latest + - os: ubuntu-22.04 + compiler: 'clang-11' + fail-fast: false + steps: + - name: Checkout Yosys + uses: actions/checkout@v4 + with: + submodules: true + + - name: Setup environment + uses: ./.github/actions/setup-build-env + + - name: Setup Cpp + uses: aminya/setup-cpp@v1 + with: + compiler: ${{ matrix.compiler }} + + - name: Tool versions + shell: bash + run: | + $CC --version + $CXX --version + + # minimum standard + - name: Build C++17 + shell: bash + run: | + make config-$CC_SHORT + make -j$procs CXXSTD=c++17 compile-only + + # maximum standard, only on newest compilers + - name: Build C++20 + if: ${{ matrix.compiler == 'clang' || matrix.compiler == 'gcc'}} + shell: bash + run: | + make config-$CC_SHORT + make -j$procs CXXSTD=c++20 compile-only diff --git a/yosys/.github/workflows/test-linux.yml b/yosys/.github/workflows/test-linux.yml deleted file mode 100644 index eee556794af..00000000000 --- a/yosys/.github/workflows/test-linux.yml +++ /dev/null @@ -1,116 +0,0 @@ -name: Build and run tests (Linux) - -on: [push, pull_request] - -jobs: - test-linux: - runs-on: ${{ matrix.os.id }} - strategy: - matrix: - os: - - { id: ubuntu-20.04, name: focal } - compiler: - - 'clang-12' - - 'gcc-11' - cpp_std: - - 'c++11' - - 'c++14' - - 'c++17' - - 'c++20' - include: - # Limit the older compilers to C++11 mode - - os: { id: ubuntu-20.04, name: focal } - compiler: 'clang-11' - cpp_std: 'c++11' - - os: { id: ubuntu-20.04, name: focal } - compiler: 'gcc-10' - cpp_std: 'c++11' - fail-fast: false - steps: - - name: Install Dependencies - shell: bash - run: | - sudo apt-get update - sudo apt-get install gperf build-essential bison flex libreadline-dev gawk tcl-dev libffi-dev git graphviz xdot pkg-config python python3 libboost-system-dev libboost-python-dev libboost-filesystem-dev zlib1g-dev - - - name: Setup GCC - if: startsWith(matrix.compiler, 'gcc') - shell: bash - run: | - CXX=${CC/#gcc/g++} - sudo apt-add-repository ppa:ubuntu-toolchain-r/test - sudo apt-get update - sudo apt-get install $CC $CXX - echo "CC=$CC" >> $GITHUB_ENV - echo "CXX=$CXX" >> $GITHUB_ENV - env: - CC: ${{ matrix.compiler }} - - - name: Setup Clang - if: startsWith(matrix.compiler, 'clang') - shell: bash - run: | - wget https://apt.llvm.org/llvm-snapshot.gpg.key - sudo apt-key add llvm-snapshot.gpg.key - rm llvm-snapshot.gpg.key - sudo apt-add-repository "deb https://apt.llvm.org/${{ matrix.os.name }}/ llvm-toolchain-${{ matrix.os.name }} main" - sudo apt-get update - CXX=${CC/#clang/clang++} - sudo apt-get install $CC $CXX - echo "CC=$CC" >> $GITHUB_ENV - echo "CXX=$CXX" >> $GITHUB_ENV - env: - CC: ${{ matrix.compiler }} - - - name: Runtime environment - shell: bash - env: - WORKSPACE: ${{ github.workspace }} - run: | - echo "GITHUB_WORKSPACE=`pwd`" >> $GITHUB_ENV - echo "$GITHUB_WORKSPACE/.local/bin" >> $GITHUB_PATH - echo "procs=$(nproc)" >> $GITHUB_ENV - - - name: Tool versions - shell: bash - run: | - $CC --version - $CXX --version - - - name: Checkout Yosys - uses: actions/checkout@v3 - - - name: Get iverilog - shell: bash - run: | - git clone https://github.com/steveicarus/iverilog.git - - - name: Cache iverilog - id: cache-iverilog - uses: actions/cache@v3 - with: - path: .local/ - key: ${{ matrix.os.id }}-${{ hashFiles('iverilog/.git/refs/heads/master') }} - - - name: Build iverilog - if: steps.cache-iverilog.outputs.cache-hit != 'true' - shell: bash - run: | - mkdir -p $GITHUB_WORKSPACE/.local/ - cd iverilog - autoconf - CC=gcc CXX=g++ ./configure --prefix=$GITHUB_WORKSPACE/.local - make -j${{ env.procs }} - make install - - - name: Build yosys - shell: bash - run: | - make config-${CC%%-*} - make -j${{ env.procs }} CCXXSTD=${{ matrix.cpp_std }} CC=$CC CXX=$CC LD=$CC - - - name: Run tests - if: (matrix.cpp_std == 'c++11') && (matrix.compiler == 'gcc-11') - shell: bash - run: | - make -j${{ env.procs }} test CXXSTD=${{ matrix.cpp_std }} CC=$CC CXX=$CC LD=$CC diff --git a/yosys/.github/workflows/test-macos.yml b/yosys/.github/workflows/test-macos.yml deleted file mode 100644 index 04845723467..00000000000 --- a/yosys/.github/workflows/test-macos.yml +++ /dev/null @@ -1,73 +0,0 @@ -name: Build and run tests (macOS) - -on: [push, pull_request] - -jobs: - test-macos: - runs-on: ${{ matrix.os.id }} - strategy: - matrix: - os: - - { id: macos-11, name: 'Big Sur' } - cpp_std: - - 'c++11' - - 'c++17' - fail-fast: false - steps: - - name: Install Dependencies - run: | - brew install bison flex gawk libffi pkg-config bash - - - name: Runtime environment - shell: bash - env: - WORKSPACE: ${{ github.workspace }} - run: | - echo "GITHUB_WORKSPACE=`pwd`" >> $GITHUB_ENV - echo "$GITHUB_WORKSPACE/.local/bin" >> $GITHUB_PATH - echo "$(brew --prefix bison)/bin" >> $GITHUB_PATH - echo "$(brew --prefix flex)/bin" >> $GITHUB_PATH - echo "procs=$(sysctl -n hw.ncpu)" >> $GITHUB_ENV - - - name: Tool versions - shell: bash - run: | - cc --version - - - name: Checkout Yosys - uses: actions/checkout@v3 - - - name: Get iverilog - shell: bash - run: | - git clone https://github.com/steveicarus/iverilog.git - - - name: Cache iverilog - id: cache-iverilog - uses: actions/cache@v3 - with: - path: .local/ - key: ${{ matrix.os.id }}-${{ hashFiles('iverilog/.git/refs/heads/master') }} - - - name: Build iverilog - if: steps.cache-iverilog.outputs.cache-hit != 'true' - shell: bash - run: | - mkdir -p $GITHUB_WORKSPACE/.local/ - cd iverilog - autoconf - CC=gcc CXX=g++ ./configure --prefix=$GITHUB_WORKSPACE/.local/ - make -j${{ env.procs }} - make install - - - name: Build yosys - shell: bash - run: | - make config-clang - make -j${{ env.procs }} CXXSTD=${{ matrix.cpp_std }} CC=cc CXX=cc LD=cc - - - name: Run tests - if: matrix.cpp_std == 'c++11' - shell: bash - run: | - make -j${{ env.procs }} test CXXSTD=${{ matrix.cpp_std }} CC=cc CXX=cc LD=cc diff --git a/yosys/.github/workflows/test-verific.yml b/yosys/.github/workflows/test-verific.yml new file mode 100644 index 00000000000..54d9487acfb --- /dev/null +++ b/yosys/.github/workflows/test-verific.yml @@ -0,0 +1,95 @@ +name: Build and run tests with Verific (Linux) + +on: [push, pull_request] + +jobs: + pre_job: + runs-on: ubuntu-latest + outputs: + should_skip: ${{ steps.skip_check.outputs.should_skip }} + steps: + - id: skip_check + uses: fkirc/skip-duplicate-actions@v5 + with: + paths_ignore: '["**/README.md"]' + # don't cancel previous builds + cancel_others: 'true' + # only run on push *or* pull_request, not both + concurrent_skipping: 'same_content_newer' + # we have special actions when running on main, so this should be off + skip_after_successful_duplicate: 'false' + + test-verific: + needs: pre_job + if: needs.pre_job.outputs.should_skip != 'true' + runs-on: [self-hosted, linux, x64] + steps: + - name: Checkout Yosys + uses: actions/checkout@v4 + with: + persist-credentials: false + submodules: true + - name: Runtime environment + run: | + echo "procs=$(nproc)" >> $GITHUB_ENV + + - name: Build Yosys + run: | + make config-clang + echo "ENABLE_VERIFIC := 1" >> Makefile.conf + echo "ENABLE_VERIFIC_EDIF := 1" >> Makefile.conf + echo "ENABLE_VERIFIC_LIBERTY := 1" >> Makefile.conf + echo "ENABLE_CCACHE := 1" >> Makefile.conf + make -j${{ env.procs }} + + - name: Install Yosys + run: | + make install DESTDIR=${GITHUB_WORKSPACE}/.local PREFIX= + + - name: Checkout Documentation + if: ${{ github.ref == 'refs/heads/main' }} + uses: actions/checkout@v4 + with: + path: 'yosys-cmd-ref' + repository: 'YosysHQ-Docs/yosys-cmd-ref' + fetch-depth: 0 + token: ${{ secrets.CI_DOCS_UPDATE_PAT }} + persist-credentials: true + + - name: Update documentation + if: ${{ github.ref == 'refs/heads/main' }} + run: | + make docs + rm -rf docs/build + cd yosys-cmd-ref + rm -rf * + git checkout README.md + cp -R ../docs/* . + rm -rf util/__pycache__ + git add -A . + git diff-index --quiet HEAD || git commit -m "Update" + git push + + - name: Checkout SBY + uses: actions/checkout@v4 + with: + repository: 'YosysHQ/sby' + path: 'sby' + + - name: Build SBY + run: | + make -C sby install DESTDIR=${GITHUB_WORKSPACE}/.local PREFIX= + + - name: Run Yosys tests + run: | + make -j${{ env.procs }} test + + - name: Run Verific specific Yosys tests + run: | + make -C tests/sva + cd tests/svtypes && bash run-test.sh + + - name: Run SBY tests + if: ${{ github.ref == 'refs/heads/main' }} + run: | + make -C sby run_ci diff --git a/yosys/.github/workflows/update-flake-lock.yml b/yosys/.github/workflows/update-flake-lock.yml new file mode 100644 index 00000000000..c7aa6ecab70 --- /dev/null +++ b/yosys/.github/workflows/update-flake-lock.yml @@ -0,0 +1,22 @@ +name: update-flake-lock +on: + workflow_dispatch: # allows manual triggering + schedule: + - cron: '0 0 * * 0' # runs weekly on Sunday at 00:00 + +jobs: + lockfile: + runs-on: ubuntu-latest + steps: + - name: Checkout repository + uses: actions/checkout@v4 + - name: Install Nix + uses: DeterminateSystems/nix-installer-action@main + - name: Update flake.lock + uses: DeterminateSystems/update-flake-lock@main + with: + token: ${{CI_CREATE_PR_TOKEN}} + pr-title: "Update flake.lock" # Title of PR to be created + pr-labels: | # Labels to be set on the PR + dependencies + automated diff --git a/yosys/.github/workflows/version.yml b/yosys/.github/workflows/version.yml index c2a1756e9c6..f73c68bdf12 100644 --- a/yosys/.github/workflows/version.yml +++ b/yosys/.github/workflows/version.yml @@ -10,9 +10,10 @@ jobs: runs-on: ubuntu-latest steps: - name: Checkout - uses: actions/checkout@v3 + uses: actions/checkout@v4 with: fetch-depth: 0 + submodules: true - name: Take last commit id: log run: echo "message=$(git log --no-merges -1 --oneline)" >> $GITHUB_OUTPUT diff --git a/yosys/.github/workflows/vs.yml b/yosys/.github/workflows/vs.yml deleted file mode 100644 index 428770e7200..00000000000 --- a/yosys/.github/workflows/vs.yml +++ /dev/null @@ -1,31 +0,0 @@ -name: Visual Studio Build - -on: [push, pull_request] - -jobs: - yosys-vcxsrc: - runs-on: ubuntu-latest - steps: - - uses: actions/checkout@v3 - - name: Build - run: make vcxsrc YOSYS_VER=latest - - uses: actions/upload-artifact@v3 - with: - name: vcxsrc - path: yosys-win32-vcxsrc-latest.zip - - build: - runs-on: windows-2019 - needs: yosys-vcxsrc - steps: - - uses: actions/download-artifact@v3 - with: - name: vcxsrc - path: . - - name: unzip - run: unzip yosys-win32-vcxsrc-latest.zip - - name: setup-msbuild - uses: microsoft/setup-msbuild@v1 - - name: MSBuild - working-directory: yosys-win32-vcxsrc-latest - run: msbuild YosysVS.sln /p:PlatformToolset=v142 /p:Configuration=Release /p:WindowsTargetPlatformVersion=10.0.17763.0 diff --git a/yosys/.gitignore b/yosys/.gitignore index 49b886e7e43..e82343e8947 100644 --- a/yosys/.gitignore +++ b/yosys/.gitignore @@ -1,9 +1,11 @@ *.o *.d +*.dwo .*.swp *.gch *.gcda *.gcno +*~ __pycache__ /.cproject /.project @@ -16,7 +18,6 @@ __pycache__ /coverage.info /coverage_html /Makefile.conf -/abc /viz.js /yosys /yosys.exe @@ -44,3 +45,4 @@ __pycache__ /tests/unit/bintest/ /tests/unit/objtest/ /tests/ystests +/result \ No newline at end of file diff --git a/yosys/.gitmodules b/yosys/.gitmodules new file mode 100644 index 00000000000..d88d4b1e5e9 --- /dev/null +++ b/yosys/.gitmodules @@ -0,0 +1,3 @@ +[submodule "abc"] + path = abc + url = https://github.com/YosysHQ/abc diff --git a/yosys/CHANGELOG b/yosys/CHANGELOG index 585605abcdd..d8e13b041e5 100644 --- a/yosys/CHANGELOG +++ b/yosys/CHANGELOG @@ -2,6 +2,177 @@ List of major changes and improvements between releases ======================================================= +Yosys 0.42 .. Yosys 0.43-dev +-------------------------- + +Yosys 0.41 .. Yosys 0.42 +-------------------------- + * New commands and options + - Added "box_derive" pass to derive box modules. + - Added option "assert-mod-count" to "select" pass. + - Added option "-header","-push" and "-pop" to "log" pass. + * Intel support + - Dropped Quartus support in "synth_intel_alm" pass. + +Yosys 0.40 .. Yosys 0.41 +-------------------------- + * New commands and options + - Added "cellmatch" pass for picking out standard cells automatically. + + * Various + - Extended the experimental incremental JSON API to allow arbitrary + smtlib subexpressions. + - Added support for using ABCs library merging when providing multiple + liberty files. + + * Verific support + - Expose library name as module attribute. + +Yosys 0.39 .. Yosys 0.40 +-------------------------- + * New commands and options + - Added option "-vhdl2019" to "read" and "verific" pass. + + * Various + - Major documentation overhaul. + - Added port statistics to "stat" command. + - Added new formatting features to cxxrtl backend. + + * Verific support + - Added better support for VHDL constants import. + - Added support for VHDL 2009. + +Yosys 0.38 .. Yosys 0.39 +-------------------------- + * New commands and options + - Added option "-extra-map" to "synth" pass. + - Added option "-dont_use" to "dfflibmap" pass. + - Added option "-href" to "show" command. + - Added option "-noscopeinfo" to "flatten" pass. + - Added option "-scopename" to "flatten" pass. + + * SystemVerilog + - Added support for packed multidimensional arrays. + + * Various + - Added "$scopeinfo" cells to preserve information about + the hierarchy during flattening. + - Added sequential area output to "stat -liberty". + - Added ability to record/replay diagnostics in cxxrtl backend. + + * Verific support + - Added attributes to module instantiation. + +Yosys 0.37 .. Yosys 0.38 +-------------------------- + * New commands and options + - Added option "-tech" to "opt_lut" pass. + - Added option "-nokeep_prints" to "hierarchy" pass. + - Added option "-nolower" to "async2sync" and "clk2fflogic" pass. + - Added option "-lower" to "chformal" pass. + + * Various + - Added $check cell to represent assertions with messages. + - Allow capturing $print cell output in CXXRTL. + - Added API to overwrite existing pass from plugin. + - Follow the XDG Base Directory Specification for storing history files. + - Without a known top module, derive all deferred modules (hierarchy pass). + - Detect and error out on combinational loops in write_aiger. + + * Verific support + - Added option "-no-split-complex-ports" to "verific -import". + +Yosys 0.36 .. Yosys 0.37 +-------------------------- + * New commands and options + - Added option "-nodisplay" to read_verilog. + + * SystemVerilog + - Correct hierarchical path names for structs and unions. + + * Various + - Print hierarchy for failed assertions in "sim" pass. + - Add "--present-only" option to "yosys-witness" to omit unused signals. + - Implement a generic record/replay interface for CXXRTL. + - Improved readability of emitted code with "write_verilog". + +Yosys 0.35 .. Yosys 0.36 +-------------------------- + * New commands and options + - Added option "--" to pass arguments down to tcl when using -c option. + - Added ability on MacOS and Windows to pass options after arguments on cli. + - Added option "-cmp2softlogic" to synth_lattice. + - Added option "-lowpower" to "booth" pass. + + * QuickLogic support + - Added "K6N10f" support. + - Added "-nodsp", "-nocarry", "-nobram" and "-bramtypes" options to + "synth_quicklogic" pass. + - Added "ql_bram_merge" pass to merge 18K BRAM cells into TDP36K. + - Added "ql_bram_types" pass to change TDP36K depending on configuration. + - Added "ql_dsp_io_regs" pass to update QL_DSP2 depending on configuration. + - Added "ql_dsp_macc" pass to infer multiplier-accumulator DSP cells. + - Added "ql_dsp_simd" pass to merge DSP pairs to operate in SIMD mode. + + * ECP5,iCE40 and Gowin support + - Enabled abc9 by default, added "-noabc9" option to disable. + + * MachXO3 support + - Quality of results improvements. + - Enabled "booth" pass by default for it in "synth_lattice". + + * Various + - Improved "peepopt" by adding shiftadd pattern support. + - Added "--incremental" mode to smtbmc. + +Yosys 0.34 .. Yosys 0.35 +-------------------------- + * Various + - Improvements on "peepopt" shiftmul matcher. + - Improvements on "ram_style" attributes handling. + + * Verific support + - Improved static elaboration for VHDL and mixed HDL designs. + - Expose "hdlname" attribute with original module name. + - Expose "architecture" attribute with VHDL architecture name. + +Yosys 0.33 .. Yosys 0.34 +-------------------------- + * New commands and options + - Added option "-assert" to "sim" pass. + - Added option "-noinitstate" to "sim" pass. + - Added option "-dont_use" to "abc" pass. + - Added "dft_tag" pass to create tagging logic for data flow tracking. + - Added "future" pass to resolve future sampled value functions. + - Added "booth" pass to map $mul cells to Booth multipliers. + - Added option "-booth" to "synth" pass. + + * SystemVerilog + - Added support for assignments within expressions, e.g., `x[y++] = z;` or + `x = (y *= 2) - 1;`. + + * Verific support + - "src" attribute contain full location info. + - module parameters are kept after import. + - accurate access order semantics in memory inference. + - better "bind" support for mixed language projects. + + * Various + - "show" command displays dot instead of box for wire aliases. + +Yosys 0.32 .. Yosys 0.33 +-------------------------- + * Various + - Added "$print" cell, produced by "$display" and "$write" + Verilog tasks. + - Added "$print" cell handling in CXXRTL. + + * Lattice FPGA support + - Added generic "synth_lattice" pass (for now MachXO2/XO3/XO3D) + - Removed "synth_machxo2" pass + - Pass "ecp5_gsr" renamed to "lattice_gsr" + - "synth_machxo2" equivalent is "synth_lattice -family xo2" + Yosys 0.31 .. Yosys 0.32 -------------------------- * Verific support diff --git a/yosys/CODEOWNERS b/yosys/CODEOWNERS index a33a9a68ccb..879bb8dee21 100644 --- a/yosys/CODEOWNERS +++ b/yosys/CODEOWNERS @@ -10,6 +10,7 @@ # PATH (can use glob) USERNAME(S) +CODEOWNERS @nakengelhardt passes/cmds/scratchpad.cc @nakengelhardt frontends/rpc/ @whitequark backends/cxxrtl/ @whitequark @@ -18,7 +19,8 @@ passes/techmap/flowmap.cc @whitequark passes/opt/opt_lut.cc @whitequark passes/techmap/abc9*.cc @eddiehung @Ravenslofty backends/aiger/xaiger.cc @eddiehung - +docs/ @KrystalDelusion +.github/workflows/*.yml @mmicko ## External Contributors # Only users with write permission to the repository get review diff --git a/yosys/Makefile b/yosys/Makefile index 630d65367b9..313de44d56d 100644 --- a/yosys/Makefile +++ b/yosys/Makefile @@ -1,8 +1,8 @@ -CONFIG := clang +CONFIG := none +# CONFIG := clang # CONFIG := gcc # CONFIG := afl-gcc -# CONFIG := emcc # CONFIG := wasi # CONFIG := mxe # CONFIG := msys2-32 @@ -17,10 +17,12 @@ ENABLE_READLINE := 1 ENABLE_EDITLINE := 0 ENABLE_GHDL := 0 ENABLE_VERIFIC := 0 +ENABLE_VERIFIC_SYSTEMVERILOG := 1 +ENABLE_VERIFIC_VHDL := 1 +ENABLE_VERIFIC_HIER_TREE := 1 +ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS := 1 ENABLE_VERIFIC_EDIF := 0 ENABLE_VERIFIC_LIBERTY := 0 -DISABLE_VERIFIC_EXTENSIONS := 0 -DISABLE_VERIFIC_VHDL := 0 ENABLE_COVER := 1 ENABLE_LIBYOSYS := 0 ENABLE_ZLIB := 1 @@ -90,16 +92,16 @@ all: top-all YOSYS_SRC := $(dir $(firstword $(MAKEFILE_LIST))) VPATH := $(YOSYS_SRC) -CXXSTD ?= c++11 +CXXSTD ?= c++17 CXXFLAGS := $(CXXFLAGS) -Wall -Wextra -ggdb -I. -I"$(YOSYS_SRC)" -MD -MP -D_YOSYS_ -fPIC -I$(PREFIX)/include -LDLIBS := $(LDLIBS) -lstdc++ -lm -PLUGIN_LDFLAGS := -PLUGIN_LDLIBS := -EXE_LDFLAGS := +LIBS := $(LIBS) -lstdc++ -lm +PLUGIN_LINKFLAGS := +PLUGIN_LIBS := +EXE_LINKFLAGS := ifeq ($(OS), MINGW) -EXE_LDFLAGS := -Wl,--export-all-symbols -Wl,--out-implib,libyosys_exe.a -PLUGIN_LDFLAGS += -L"$(LIBDIR)" -PLUGIN_LDLIBS := -lyosys_exe +EXE_LINKFLAGS := -Wl,--export-all-symbols -Wl,--out-implib,libyosys_exe.a +PLUGIN_LINKFLAGS += -L"$(LIBDIR)" +PLUGIN_LIBS := -lyosys_exe endif PKG_CONFIG ?= pkg-config @@ -109,7 +111,7 @@ STRIP ?= strip AWK ?= awk ifeq ($(OS), Darwin) -PLUGIN_LDFLAGS += -undefined dynamic_lookup +PLUGIN_LINKFLAGS += -undefined dynamic_lookup # homebrew search paths ifneq ($(shell :; command -v brew),) @@ -117,10 +119,10 @@ BREW_PREFIX := $(shell brew --prefix)/opt $(info $$BREW_PREFIX is [${BREW_PREFIX}]) ifeq ($(ENABLE_PYOSYS),1) CXXFLAGS += -I$(BREW_PREFIX)/boost/include/boost -LDFLAGS += -L$(BREW_PREFIX)/boost/lib +LINKFLAGS += -L$(BREW_PREFIX)/boost/lib endif CXXFLAGS += -I$(BREW_PREFIX)/readline/include -LDFLAGS += -L$(BREW_PREFIX)/readline/lib +LINKFLAGS += -L$(BREW_PREFIX)/readline/lib PKG_CONFIG_PATH := $(BREW_PREFIX)/libffi/lib/pkgconfig:$(PKG_CONFIG_PATH) PKG_CONFIG_PATH := $(BREW_PREFIX)/tcl-tk/lib/pkgconfig:$(PKG_CONFIG_PATH) export PATH := $(BREW_PREFIX)/bison/bin:$(BREW_PREFIX)/gettext/bin:$(BREW_PREFIX)/flex/bin:$(PATH) @@ -129,19 +131,19 @@ export PATH := $(BREW_PREFIX)/bison/bin:$(BREW_PREFIX)/gettext/bin:$(BREW_PREFIX else ifneq ($(shell :; command -v port),) PORT_PREFIX := $(patsubst %/bin/port,%,$(shell :; command -v port)) CXXFLAGS += -I$(PORT_PREFIX)/include -LDFLAGS += -L$(PORT_PREFIX)/lib +LINKFLAGS += -L$(PORT_PREFIX)/lib PKG_CONFIG_PATH := $(PORT_PREFIX)/lib/pkgconfig:$(PKG_CONFIG_PATH) export PATH := $(PORT_PREFIX)/bin:$(PATH) endif else -LDFLAGS += -rdynamic +LINKFLAGS += -rdynamic ifneq ($(OS), OpenBSD) -LDLIBS += -lrt +LIBS += -lrt endif endif -YOSYS_VER := 0.32 +YOSYS_VER := 0.42+40 # Note: We arrange for .gitcommit to contain the (short) commit hash in # tarballs generated with git-archive(1) using .gitattributes. The git repo @@ -149,8 +151,7 @@ YOSYS_VER := 0.32 # back to calling git directly. TARBALL_GIT_REV := $(shell cat $(YOSYS_SRC)/.gitcommit) ifeq ($(TARBALL_GIT_REV),$$Format:%h$$) -#GIT_REV := $(shell GIT_DIR=$(YOSYS_SRC)/.git git rev-parse --short=9 HEAD || echo UNKNOWN) -GIT_REV := $(shell echo UNKNOWN) +GIT_REV := $(shell GIT_DIR=$(YOSYS_SRC)/.git git rev-parse --short=9 HEAD || echo UNKNOWN) else GIT_REV := $(TARBALL_GIT_REV) endif @@ -158,17 +159,8 @@ endif OBJS = kernel/version_$(GIT_REV).o bumpversion: -# sed -i "/^YOSYS_VER := / s/+[0-9][0-9]*$$/+`git log --oneline f3c6b41.. | wc -l`/;" Makefile - -# set 'ABCREV = default' to use abc/ as it is -# -# Note: If you do ABC development, make sure that 'abc' in this directory -# is just a symlink to your actual ABC working directory, as 'make mrproper' -# will remove the 'abc' directory and you do not want to accidentally -# delete your work on ABC.. -ABCREV = bb64142 -ABCPULL = 1 -ABCURL ?= https://github.com/YosysHQ/abc + sed -i "/^YOSYS_VER := / s/+[0-9][0-9]*$$/+`git log --oneline 9b6afcf.. | wc -l`/;" Makefile + ABCMKARGS = CC="$(CXX)" CXX="$(CXX)" ABC_USE_LIBSTDCXX=1 ABC_USE_NAMESPACE=abc VERBOSE=$(Q) # set ABCEXTERNAL = to use an external ABC instance @@ -216,41 +208,38 @@ ABC_ARCHFLAGS += "-DABC_NO_RLIMIT" endif ifeq ($(CONFIG),clang) -CXX = clang -LD = clang++ +CXX = clang++ CXXFLAGS += -std=$(CXXSTD) -Os -ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H -Wno-c++11-narrowing $(ABC_ARCHFLAGS)" +ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H $(ABC_ARCHFLAGS)" ifneq ($(SANITIZER),) $(info [Clang Sanitizer] $(SANITIZER)) CXXFLAGS += -g -O1 -fno-omit-frame-pointer -fno-optimize-sibling-calls -fsanitize=$(SANITIZER) -LDFLAGS += -g -fsanitize=$(SANITIZER) +LINKFLAGS += -g -fsanitize=$(SANITIZER) ifneq ($(findstring address,$(SANITIZER)),) ENABLE_COVER := 0 endif ifneq ($(findstring memory,$(SANITIZER)),) CXXFLAGS += -fPIE -fsanitize-memory-track-origins -LDFLAGS += -fPIE -fsanitize-memory-track-origins +LINKFLAGS += -fPIE -fsanitize-memory-track-origins endif ifneq ($(findstring cfi,$(SANITIZER)),) CXXFLAGS += -flto -LDFLAGS += -flto +LINKFLAGS += -flto endif endif else ifeq ($(CONFIG),gcc) -CXX = gcc -LD = gcc +CXX = g++ CXXFLAGS += -std=$(CXXSTD) -Os ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H $(ABC_ARCHFLAGS)" else ifeq ($(CONFIG),gcc-static) -LD = $(CXX) -LDFLAGS := $(filter-out -rdynamic,$(LDFLAGS)) -static -LDLIBS := $(filter-out -lrt,$(LDLIBS)) +LINKFLAGS := $(filter-out -rdynamic,$(LINKFLAGS)) -static +LIBS := $(filter-out -lrt,$(LIBS)) CXXFLAGS := $(filter-out -fPIC,$(CXXFLAGS)) CXXFLAGS += -std=$(CXXSTD) -Os -ABCMKARGS = CC="$(CC)" CXX="$(CXX)" LD="$(LD)" ABC_USE_LIBSTDCXX=1 LIBS="-lm -lpthread -static" OPTFLAGS="-O" \ +ABCMKARGS = CC="$(CC)" CXX="$(CXX)" LD="$(CXX)" ABC_USE_LIBSTDCXX=1 LIBS="-lm -lpthread -static" OPTFLAGS="-O" \ ARCHFLAGS="-DABC_USE_STDINT_H -DABC_NO_DYNAMIC_LINKING=1 -Wno-unused-but-set-variable $(ARCHFLAGS)" ABC_USE_NO_READLINE=1 ifeq ($(DISABLE_ABC_THREADS),1) ABCMKARGS += "ABC_USE_NO_PTHREADS=1" @@ -258,75 +247,31 @@ endif else ifeq ($(CONFIG),afl-gcc) CXX = AFL_QUIET=1 AFL_HARDEN=1 afl-gcc -LD = AFL_QUIET=1 AFL_HARDEN=1 afl-gcc CXXFLAGS += -std=$(CXXSTD) -Os ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H" else ifeq ($(CONFIG),cygwin) -CXX = gcc -LD = gcc +CXX = g++ CXXFLAGS += -std=gnu++11 -Os ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H" -else ifeq ($(CONFIG),emcc) -CXX = emcc -LD = emcc -CXXFLAGS := -std=$(CXXSTD) $(filter-out -fPIC -ggdb,$(CXXFLAGS)) -ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H -DABC_MEMALIGN=8 -Wno-c++11-narrowing" -EMCC_CXXFLAGS := -Os -Wno-warn-absolute-paths -EMCC_LDFLAGS := --memory-init-file 0 --embed-file share -EMCC_LDFLAGS += -s NO_EXIT_RUNTIME=1 -EMCC_LDFLAGS += -s EXPORTED_FUNCTIONS="['_main','_run','_prompt','_errmsg','_memset']" -EMCC_LDFLAGS += -s TOTAL_MEMORY=134217728 -EMCC_LDFLAGS += -s EXPORTED_RUNTIME_METHODS='["ccall", "cwrap"]' -# https://github.com/kripken/emscripten/blob/master/src/settings.js -CXXFLAGS += $(EMCC_CXXFLAGS) -LDFLAGS += $(EMCC_LDFLAGS) -LDLIBS = -EXE = .js - -DISABLE_SPAWN := 1 - -TARGETS := $(filter-out $(PROGRAM_PREFIX)yosys-config,$(TARGETS)) -EXTRA_TARGETS += yosysjs-$(YOSYS_VER).zip - -ifeq ($(ENABLE_ABC),1) -LINK_ABC := 1 -DISABLE_ABC_THREADS := 1 -endif - -viz.js: - wget -O viz.js.part https://github.com/mdaines/viz.js/releases/download/0.0.3/viz.js - mv viz.js.part viz.js - -yosysjs-$(YOSYS_VER).zip: yosys.js viz.js misc/yosysjs/* - rm -rf yosysjs-$(YOSYS_VER) yosysjs-$(YOSYS_VER).zip - mkdir -p yosysjs-$(YOSYS_VER) - cp viz.js misc/yosysjs/* yosys.js yosys.wasm yosysjs-$(YOSYS_VER)/ - zip -r yosysjs-$(YOSYS_VER).zip yosysjs-$(YOSYS_VER) - -yosys.html: misc/yosys.html - $(P) cp misc/yosys.html yosys.html - else ifeq ($(CONFIG),wasi) ifeq ($(WASI_SDK),) -CXX = clang -LD = clang++ +CXX = clang++ AR = llvm-ar RANLIB = llvm-ranlib WASIFLAGS := -target wasm32-wasi --sysroot $(WASI_SYSROOT) $(WASIFLAGS) else -CXX = $(WASI_SDK)/bin/clang -LD = $(WASI_SDK)/bin/clang++ +CXX = $(WASI_SDK)/bin/clang++ AR = $(WASI_SDK)/bin/ar RANLIB = $(WASI_SDK)/bin/ranlib WASIFLAGS := --sysroot $(WASI_SDK)/share/wasi-sysroot $(WASIFLAGS) endif -CXXFLAGS := $(WASIFLAGS) -std=$(CXXSTD) -Os $(filter-out -fPIC,$(CXXFLAGS)) -LDFLAGS := $(WASIFLAGS) -Wl,-z,stack-size=1048576 $(filter-out -rdynamic,$(LDFLAGS)) -LDLIBS := $(filter-out -lrt,$(LDLIBS)) +CXXFLAGS := $(WASIFLAGS) -std=$(CXXSTD) -Os -D_WASI_EMULATED_PROCESS_CLOCKS $(filter-out -fPIC,$(CXXFLAGS)) +LINKFLAGS := $(WASIFLAGS) -Wl,-z,stack-size=1048576 $(filter-out -rdynamic,$(LINKFLAGS)) +LIBS := -lwasi-emulated-process-clocks $(filter-out -lrt,$(LIBS)) ABCMKARGS += AR="$(AR)" RANLIB="$(RANLIB)" -ABCMKARGS += ARCHFLAGS="$(WASIFLAGS) -DABC_USE_STDINT_H -DABC_NO_DYNAMIC_LINKING -DABC_NO_RLIMIT -Wno-c++11-narrowing" +ABCMKARGS += ARCHFLAGS="$(WASIFLAGS) -D_WASI_EMULATED_PROCESS_CLOCKS -DABC_USE_STDINT_H -DABC_NO_DYNAMIC_LINKING -DABC_NO_RLIMIT" ABCMKARGS += OPTFLAGS="-Os" EXE = .wasm @@ -340,40 +285,41 @@ endif else ifeq ($(CONFIG),mxe) PKG_CONFIG = /usr/local/src/mxe/usr/bin/i686-w64-mingw32.static-pkg-config CXX = /usr/local/src/mxe/usr/bin/i686-w64-mingw32.static-g++ -LD = /usr/local/src/mxe/usr/bin/i686-w64-mingw32.static-g++ CXXFLAGS += -std=$(CXXSTD) -Os -D_POSIX_SOURCE -DYOSYS_MXE_HACKS -Wno-attributes CXXFLAGS := $(filter-out -fPIC,$(CXXFLAGS)) -LDFLAGS := $(filter-out -rdynamic,$(LDFLAGS)) -s -LDLIBS := $(filter-out -lrt,$(LDLIBS)) +LINKFLAGS := $(filter-out -rdynamic,$(LINKFLAGS)) -s +LIBS := $(filter-out -lrt,$(LIBS)) ABCMKARGS += ARCHFLAGS="-DWIN32_NO_DLL -DHAVE_STRUCT_TIMESPEC -fpermissive -w" # TODO: Try to solve pthread linking issue in more appropriate way -ABCMKARGS += LIBS="lib/x86/pthreadVC2.lib -s" LDFLAGS="-Wl,--allow-multiple-definition" ABC_USE_NO_READLINE=1 CC="/usr/local/src/mxe/usr/bin/i686-w64-mingw32.static-gcc" +ABCMKARGS += LIBS="lib/x86/pthreadVC2.lib -s" LINKFLAGS="-Wl,--allow-multiple-definition" ABC_USE_NO_READLINE=1 CC="/usr/local/src/mxe/usr/bin/i686-w64-mingw32.static-gcc" EXE = .exe else ifeq ($(CONFIG),msys2-32) CXX = i686-w64-mingw32-g++ -LD = i686-w64-mingw32-g++ CXXFLAGS += -std=$(CXXSTD) -Os -D_POSIX_SOURCE -DYOSYS_WIN32_UNIX_DIR CXXFLAGS := $(filter-out -fPIC,$(CXXFLAGS)) -LDFLAGS := $(filter-out -rdynamic,$(LDFLAGS)) -s -LDLIBS := $(filter-out -lrt,$(LDLIBS)) +LINKFLAGS := $(filter-out -rdynamic,$(LINKFLAGS)) -s +LIBS := $(filter-out -lrt,$(LIBS)) ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H -DWIN32_NO_DLL -DHAVE_STRUCT_TIMESPEC -fpermissive -w" -ABCMKARGS += LIBS="-lpthread -s" ABC_USE_NO_READLINE=0 CC="i686-w64-mingw32-gcc" CXX="$(CXX)" +ABCMKARGS += LIBS="-lpthread -lshlwapi -s" ABC_USE_NO_READLINE=0 CC="i686-w64-mingw32-gcc" CXX="$(CXX)" EXE = .exe else ifeq ($(CONFIG),msys2-64) CXX = x86_64-w64-mingw32-g++ -LD = x86_64-w64-mingw32-g++ CXXFLAGS += -std=$(CXXSTD) -Os -D_POSIX_SOURCE -DYOSYS_WIN32_UNIX_DIR CXXFLAGS := $(filter-out -fPIC,$(CXXFLAGS)) -LDFLAGS := $(filter-out -rdynamic,$(LDFLAGS)) -s -LDLIBS := $(filter-out -lrt,$(LDLIBS)) +LINKFLAGS := $(filter-out -rdynamic,$(LINKFLAGS)) -s +LIBS := $(filter-out -lrt,$(LIBS)) ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H -DWIN32_NO_DLL -DHAVE_STRUCT_TIMESPEC -fpermissive -w" -ABCMKARGS += LIBS="-lpthread -s" ABC_USE_NO_READLINE=0 CC="x86_64-w64-mingw32-gcc" CXX="$(CXX)" +ABCMKARGS += LIBS="-lpthread -lshlwapi -s" ABC_USE_NO_READLINE=0 CC="x86_64-w64-mingw32-gcc" CXX="$(CXX)" EXE = .exe -else ifneq ($(CONFIG),none) -$(error Invalid CONFIG setting '$(CONFIG)'. Valid values: clang, gcc, emcc, mxe, msys2-32, msys2-64) +else ifeq ($(CONFIG),none) +CXXFLAGS += -std=$(CXXSTD) -Os +ABCMKARGS += ARCHFLAGS="-DABC_USE_STDINT_H $(ABC_ARCHFLAGS)" + +else +$(error Invalid CONFIG setting '$(CONFIG)'. Valid values: clang, gcc, mxe, msys2-32, msys2-64, none) endif ifeq ($(ENABLE_LIBYOSYS),1) @@ -394,9 +340,9 @@ ifeq ($(BOOST_PYTHON_LIB),) $(error BOOST_PYTHON_LIB could not be detected. Please define manually) endif -LDLIBS += $(shell $(PYTHON_CONFIG) --libs) $(BOOST_PYTHON_LIB) -lboost_system -lboost_filesystem -# python-config --ldflags includes LDLIBS for some reason -LDFLAGS += $(filter-out -l%,$(shell $(PYTHON_CONFIG) --ldflags)) +LIBS += $(shell $(PYTHON_CONFIG) --libs) $(BOOST_PYTHON_LIB) -lboost_system -lboost_filesystem +# python-config --ldflags includes LIBS for some reason +LINKFLAGS += $(filter-out -l%,$(shell $(PYTHON_CONFIG) --ldflags)) CXXFLAGS += $(shell $(PYTHON_CONFIG) --includes) -DWITH_PYTHON PY_WRAPPER_FILE = kernel/python_wrappers @@ -410,22 +356,22 @@ CXXFLAGS += -DYOSYS_ENABLE_READLINE ifeq ($(OS), $(filter $(OS),FreeBSD OpenBSD NetBSD)) CXXFLAGS += -I/usr/local/include endif -LDLIBS += -lreadline +LIBS += -lreadline ifeq ($(LINK_CURSES),1) -LDLIBS += -lcurses +LIBS += -lcurses ABCMKARGS += "ABC_READLINE_LIBRARIES=-lcurses -lreadline" endif ifeq ($(LINK_TERMCAP),1) -LDLIBS += -ltermcap +LIBS += -ltermcap ABCMKARGS += "ABC_READLINE_LIBRARIES=-lreadline -ltermcap" endif ifeq ($(CONFIG),mxe) -LDLIBS += -ltermcap +LIBS += -ltermcap endif else ifeq ($(ENABLE_EDITLINE),1) CXXFLAGS += -DYOSYS_ENABLE_EDITLINE -LDLIBS += -ledit -ltinfo -lbsd +LIBS += -ledit -ltinfo -lbsd else ABCMKARGS += "ABC_USE_NO_READLINE=1" endif @@ -444,9 +390,9 @@ CXXFLAGS += $(shell PKG_CONFIG_PATH=$(PKG_CONFIG_PATH) $(PKG_CONFIG) --silence-e ifeq ($(OS), MINGW) CXXFLAGS += -Ilibs/dlfcn-win32 endif -LDLIBS += $(shell PKG_CONFIG_PATH=$(PKG_CONFIG_PATH) $(PKG_CONFIG) --silence-errors --libs libffi || echo -lffi) +LIBS += $(shell PKG_CONFIG_PATH=$(PKG_CONFIG_PATH) $(PKG_CONFIG) --silence-errors --libs libffi || echo -lffi) ifneq ($(OS), $(filter $(OS),FreeBSD OpenBSD NetBSD MINGW)) -LDLIBS += -ldl +LIBS += -ldl endif endif @@ -456,7 +402,7 @@ endif ifeq ($(ENABLE_ZLIB),1) CXXFLAGS += -DYOSYS_ENABLE_ZLIB -LDLIBS += -lz +LIBS += -lz endif @@ -473,21 +419,21 @@ endif ifeq ($(CONFIG),mxe) CXXFLAGS += -DYOSYS_ENABLE_TCL -LDLIBS += -ltcl86 -lwsock32 -lws2_32 -lnetapi32 -lz -luserenv +LIBS += -ltcl86 -lwsock32 -lws2_32 -lnetapi32 -lz -luserenv else CXXFLAGS += $(shell PKG_CONFIG_PATH=$(PKG_CONFIG_PATH) $(PKG_CONFIG) --silence-errors --cflags tcl || echo -I$(TCL_INCLUDE)) -DYOSYS_ENABLE_TCL -LDLIBS += $(shell PKG_CONFIG_PATH=$(PKG_CONFIG_PATH) $(PKG_CONFIG) --silence-errors --libs tcl || echo $(TCL_LIBS)) +LIBS += $(shell PKG_CONFIG_PATH=$(PKG_CONFIG_PATH) $(PKG_CONFIG) --silence-errors --libs tcl || echo $(TCL_LIBS)) endif endif ifeq ($(ENABLE_GCOV),1) CXXFLAGS += --coverage -LDFLAGS += --coverage +LINKFLAGS += --coverage endif ifeq ($(ENABLE_GPROF),1) CXXFLAGS += -pg -LDFLAGS += -pg +LINKFLAGS += -pg endif ifeq ($(ENABLE_NDEBUG),1) @@ -507,11 +453,11 @@ CXXFLAGS += -DYOSYS_ENABLE_ABC ifeq ($(LINK_ABC),1) CXXFLAGS += -DYOSYS_LINK_ABC ifeq ($(DISABLE_ABC_THREADS),0) -LDLIBS += -lpthread +LIBS += -lpthread endif else ifeq ($(ABCEXTERNAL),) -TARGETS += $(PROGRAM_PREFIX)yosys-abc$(EXE) +TARGETS := $(PROGRAM_PREFIX)yosys-abc$(EXE) $(TARGETS) endif endif endif @@ -521,14 +467,30 @@ GHDL_PREFIX ?= $(PREFIX) GHDL_INCLUDE_DIR ?= $(GHDL_PREFIX)/include GHDL_LIB_DIR ?= $(GHDL_PREFIX)/lib CXXFLAGS += -I$(GHDL_INCLUDE_DIR) -DYOSYS_ENABLE_GHDL -LDLIBS += $(GHDL_LIB_DIR)/libghdl.a $(file <$(GHDL_LIB_DIR)/libghdl.link) +LIBS += $(GHDL_LIB_DIR)/libghdl.a $(file <$(GHDL_LIB_DIR)/libghdl.link) endif -LDLIBS_VERIFIC = +LIBS_VERIFIC = ifeq ($(ENABLE_VERIFIC),1) VERIFIC_DIR ?= /usr/local/src/verific_lib -VERIFIC_COMPONENTS ?= verilog database util containers hier_tree -ifneq ($(DISABLE_VERIFIC_VHDL),1) +VERIFIC_COMPONENTS ?= database util containers +ifeq ($(ENABLE_VERIFIC_HIER_TREE),1) +VERIFIC_COMPONENTS += hier_tree +CXXFLAGS += -DVERIFIC_HIER_TREE_SUPPORT +else +ifneq ($(wildcard $(VERIFIC_DIR)/hier_tree),) +VERIFIC_COMPONENTS += hier_tree +endif +endif +ifeq ($(ENABLE_VERIFIC_SYSTEMVERILOG),1) +VERIFIC_COMPONENTS += verilog +CXXFLAGS += -DVERIFIC_SYSTEMVERILOG_SUPPORT +else +ifneq ($(wildcard $(VERIFIC_DIR)/verilog),) +VERIFIC_COMPONENTS += verilog +endif +endif +ifeq ($(ENABLE_VERIFIC_VHDL),1) VERIFIC_COMPONENTS += vhdl CXXFLAGS += -DVERIFIC_VHDL_SUPPORT else @@ -544,15 +506,19 @@ ifeq ($(ENABLE_VERIFIC_LIBERTY),1) VERIFIC_COMPONENTS += synlib CXXFLAGS += -DVERIFIC_LIBERTY_SUPPORT endif -ifneq ($(DISABLE_VERIFIC_EXTENSIONS),1) +ifeq ($(ENABLE_VERIFIC_YOSYSHQ_EXTENSIONS),1) VERIFIC_COMPONENTS += extensions CXXFLAGS += -DYOSYSHQ_VERIFIC_EXTENSIONS +else +ifneq ($(wildcard $(VERIFIC_DIR)/extensions),) +VERIFIC_COMPONENTS += extensions +endif endif CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -DYOSYS_ENABLE_VERIFIC ifeq ($(OS), Darwin) -LDLIBS_VERIFIC += $(foreach comp,$(patsubst %,$(VERIFIC_DIR)/%/*-mac.a,$(VERIFIC_COMPONENTS)),-Wl,-force_load $(comp)) -lz +LIBS_VERIFIC += $(foreach comp,$(patsubst %,$(VERIFIC_DIR)/%/*-mac.a,$(VERIFIC_COMPONENTS)),-Wl,-force_load $(comp)) -lz else -LDLIBS_VERIFIC += -Wl,--whole-archive $(patsubst %,$(VERIFIC_DIR)/%/*-linux.a,$(VERIFIC_COMPONENTS)) -Wl,--no-whole-archive -lz +LIBS_VERIFIC += -Wl,--whole-archive $(patsubst %,$(VERIFIC_DIR)/%/*-linux.a,$(VERIFIC_COMPONENTS)) -Wl,--no-whole-archive -lz endif endif @@ -607,31 +573,37 @@ Q = S = endif -$(eval $(call add_include_file,kernel/yosys.h)) -$(eval $(call add_include_file,kernel/hashlib.h)) -$(eval $(call add_include_file,kernel/log.h)) -$(eval $(call add_include_file,kernel/rtlil.h)) $(eval $(call add_include_file,kernel/binding.h)) -$(eval $(call add_include_file,kernel/register.h)) $(eval $(call add_include_file,kernel/cellaigs.h)) -$(eval $(call add_include_file,kernel/celltypes.h)) $(eval $(call add_include_file,kernel/celledges.h)) +$(eval $(call add_include_file,kernel/celltypes.h)) $(eval $(call add_include_file,kernel/consteval.h)) $(eval $(call add_include_file,kernel/constids.inc)) -$(eval $(call add_include_file,kernel/sigtools.h)) -$(eval $(call add_include_file,kernel/modtools.h)) -$(eval $(call add_include_file,kernel/macc.h)) -$(eval $(call add_include_file,kernel/utils.h)) -$(eval $(call add_include_file,kernel/satgen.h)) -$(eval $(call add_include_file,kernel/qcsat.h)) +$(eval $(call add_include_file,kernel/cost.h)) $(eval $(call add_include_file,kernel/ff.h)) $(eval $(call add_include_file,kernel/ffinit.h)) +$(eval $(call add_include_file,kernel/ffmerge.h)) +$(eval $(call add_include_file,kernel/fmt.h)) ifeq ($(ENABLE_ZLIB),1) $(eval $(call add_include_file,kernel/fstdata.h)) endif +$(eval $(call add_include_file,kernel/hashlib.h)) +$(eval $(call add_include_file,kernel/json.h)) +$(eval $(call add_include_file,kernel/log.h)) +$(eval $(call add_include_file,kernel/macc.h)) +$(eval $(call add_include_file,kernel/modtools.h)) $(eval $(call add_include_file,kernel/mem.h)) +$(eval $(call add_include_file,kernel/qcsat.h)) +$(eval $(call add_include_file,kernel/register.h)) +$(eval $(call add_include_file,kernel/rtlil.h)) +$(eval $(call add_include_file,kernel/satgen.h)) +$(eval $(call add_include_file,kernel/scopeinfo.h)) +$(eval $(call add_include_file,kernel/sigtools.h)) +$(eval $(call add_include_file,kernel/timinginfo.h)) +$(eval $(call add_include_file,kernel/utils.h)) +$(eval $(call add_include_file,kernel/yosys.h)) +$(eval $(call add_include_file,kernel/yosys_common.h)) $(eval $(call add_include_file,kernel/yw.h)) -$(eval $(call add_include_file,kernel/json.h)) $(eval $(call add_include_file,libs/ezsat/ezsat.h)) $(eval $(call add_include_file,libs/ezsat/ezminisat.h)) ifeq ($(ENABLE_ZLIB),1) @@ -644,21 +616,10 @@ $(eval $(call add_include_file,frontends/ast/ast.h)) $(eval $(call add_include_file,frontends/ast/ast_binding.h)) $(eval $(call add_include_file,frontends/blif/blifparse.h)) $(eval $(call add_include_file,backends/rtlil/rtlil_backend.h)) -$(eval $(call add_include_file,backends/cxxrtl/cxxrtl.h)) -$(eval $(call add_include_file,backends/cxxrtl/cxxrtl_vcd.h)) -$(eval $(call add_include_file,backends/cxxrtl/cxxrtl_capi.cc)) -$(eval $(call add_include_file,backends/cxxrtl/cxxrtl_capi.h)) -$(eval $(call add_include_file,backends/cxxrtl/cxxrtl_vcd_capi.cc)) -$(eval $(call add_include_file,backends/cxxrtl/cxxrtl_vcd_capi.h)) OBJS += kernel/driver.o kernel/register.o kernel/rtlil.o kernel/log.o kernel/calc.o kernel/yosys.o OBJS += kernel/binding.o -ifeq ($(ENABLE_ABC),1) -ifneq ($(ABCEXTERNAL),) -kernel/yosys.o: CXXFLAGS += -DABCEXTERNAL='"$(ABCEXTERNAL)"' -endif -endif -OBJS += kernel/cellaigs.o kernel/celledges.o kernel/satgen.o kernel/qcsat.o kernel/mem.o kernel/ffmerge.o kernel/ff.o kernel/yw.o kernel/json.o +OBJS += kernel/cellaigs.o kernel/celledges.o kernel/satgen.o kernel/scopeinfo.o kernel/qcsat.o kernel/mem.o kernel/ffmerge.o kernel/ff.o kernel/yw.o kernel/json.o kernel/fmt.o ifeq ($(ENABLE_ZLIB),1) OBJS += kernel/fstdata.o endif @@ -670,18 +631,19 @@ endif kernel/log.o: CXXFLAGS += -DYOSYS_SRC='"$(YOSYS_SRC)"' kernel/yosys.o: CXXFLAGS += -DYOSYS_DATDIR='"$(DATDIR)"' -DYOSYS_PROGRAM_PREFIX='"$(PROGRAM_PREFIX)"' +ifeq ($(ENABLE_ABC),1) +ifneq ($(ABCEXTERNAL),) +kernel/yosys.o: CXXFLAGS += -DABCEXTERNAL='"$(ABCEXTERNAL)"' +endif +endif OBJS += libs/bigint/BigIntegerAlgorithms.o libs/bigint/BigInteger.o libs/bigint/BigIntegerUtils.o OBJS += libs/bigint/BigUnsigned.o libs/bigint/BigUnsignedInABase.o OBJS += libs/sha1/sha1.o -ifneq ($(SMALL),1) - OBJS += libs/json11/json11.o -OBJS += libs/subcircuit/subcircuit.o - OBJS += libs/ezsat/ezsat.o OBJS += libs/ezsat/ezminisat.o @@ -696,6 +658,10 @@ OBJS += libs/fst/fastlz.o OBJS += libs/fst/lz4.o endif +ifneq ($(SMALL),1) + +OBJS += libs/subcircuit/subcircuit.o + include $(YOSYS_SRC)/frontends/*/Makefile.inc include $(YOSYS_SRC)/passes/*/Makefile.inc include $(YOSYS_SRC)/backends/*/Makefile.inc @@ -704,6 +670,9 @@ include $(YOSYS_SRC)/techlibs/*/Makefile.inc else include $(YOSYS_SRC)/frontends/verilog/Makefile.inc +ifeq ($(ENABLE_VERIFIC),1) +include $(YOSYS_SRC)/frontends/verific/Makefile.inc +endif include $(YOSYS_SRC)/frontends/rtlil/Makefile.inc include $(YOSYS_SRC)/frontends/ast/Makefile.inc include $(YOSYS_SRC)/frontends/blif/Makefile.inc @@ -740,18 +709,20 @@ top-all: $(TARGETS) $(EXTRA_TARGETS) @echo " Build successful." @echo "" -ifeq ($(CONFIG),emcc) -yosys.js: $(filter-out yosysjs-$(YOSYS_VER).zip,$(EXTRA_TARGETS)) -endif +.PHONY: compile-only +compile-only: $(OBJS) $(GENFILES) $(EXTRA_TARGETS) + @echo "" + @echo " Compile successful." + @echo "" $(PROGRAM_PREFIX)yosys$(EXE): $(OBJS) - $(P) $(LD) -o $(PROGRAM_PREFIX)yosys$(EXE) $(EXE_LDFLAGS) $(LDFLAGS) $(OBJS) $(LDLIBS) $(LDLIBS_VERIFIC) + $(P) $(CXX) -o $(PROGRAM_PREFIX)yosys$(EXE) $(EXE_LINKFLAGS) $(LINKFLAGS) $(OBJS) $(LIBS) $(LIBS_VERIFIC) libyosys.so: $(filter-out kernel/driver.o,$(OBJS)) ifeq ($(OS), Darwin) - $(P) $(LD) -o libyosys.so -shared -Wl,-install_name,$(LIBDIR)/libyosys.so $(LDFLAGS) $^ $(LDLIBS) $(LDLIBS_VERIFIC) + $(P) $(CXX) -o libyosys.so -shared -Wl,-install_name,$(LIBDIR)/libyosys.so $(LINKFLAGS) $^ $(LIBS) $(LIBS_VERIFIC) else - $(P) $(LD) -o libyosys.so -shared -Wl,-soname,$(LIBDIR)/libyosys.so $(LDFLAGS) $^ $(LDLIBS) $(LDLIBS_VERIFIC) + $(P) $(CXX) -o libyosys.so -shared -Wl,-soname,$(LIBDIR)/libyosys.so $(LINKFLAGS) $^ $(LIBS) $(LIBS_VERIFIC) endif %.o: %.cc @@ -760,7 +731,7 @@ endif %.pyh: %.h $(Q) mkdir -p $(dir $@) - $(P) cat $< | grep -E -v "#[ ]*(include|error)" | $(LD) $(CXXFLAGS) -x c++ -o $@ -E -P - + $(P) cat $< | grep -E -v "#[ ]*(include|error)" | $(CXX) $(CXXFLAGS) -x c++ -o $@ -E -P - ifeq ($(ENABLE_PYOSYS),1) $(PY_WRAPPER_FILE).cc: misc/$(PY_GEN_SCRIPT).py $(PY_WRAP_INCLUDES) @@ -781,53 +752,52 @@ kernel/version_$(GIT_REV).cc: $(YOSYS_SRC)/Makefile ifeq ($(ENABLE_VERIFIC),1) CXXFLAGS_NOVERIFIC = $(foreach v,$(CXXFLAGS),$(if $(findstring $(VERIFIC_DIR),$(v)),,$(v))) -LDLIBS_NOVERIFIC = $(foreach v,$(LDLIBS),$(if $(findstring $(VERIFIC_DIR),$(v)),,$(v))) +LIBS_NOVERIFIC = $(foreach v,$(LIBS),$(if $(findstring $(VERIFIC_DIR),$(v)),,$(v))) else CXXFLAGS_NOVERIFIC = $(CXXFLAGS) -LDLIBS_NOVERIFIC = $(LDLIBS) +LIBS_NOVERIFIC = $(LIBS) endif -$(PROGRAM_PREFIX)yosys-config: misc/yosys-config.in +$(PROGRAM_PREFIX)yosys-config: misc/yosys-config.in $(YOSYS_SRC)/Makefile $(P) $(SED) -e 's#@CXXFLAGS@#$(subst -Ilibs/dlfcn-win32,,$(subst -I. -I"$(YOSYS_SRC)",-I"$(DATDIR)/include",$(strip $(CXXFLAGS_NOVERIFIC))))#;' \ - -e 's#@CXX@#$(strip $(CXX))#;' -e 's#@LDFLAGS@#$(strip $(LDFLAGS) $(PLUGIN_LDFLAGS))#;' -e 's#@LDLIBS@#$(strip $(LDLIBS_NOVERIFIC) $(PLUGIN_LDLIBS))#;' \ + -e 's#@CXX@#$(strip $(CXX))#;' -e 's#@LINKFLAGS@#$(strip $(LINKFLAGS) $(PLUGIN_LINKFLAGS))#;' -e 's#@LIBS@#$(strip $(LIBS_NOVERIFIC) $(PLUGIN_LIBS))#;' \ -e 's#@BINDIR@#$(strip $(BINDIR))#;' -e 's#@DATDIR@#$(strip $(DATDIR))#;' < $< > $(PROGRAM_PREFIX)yosys-config $(Q) chmod +x $(PROGRAM_PREFIX)yosys-config -abc/abc-$(ABCREV)$(EXE) abc/libabc-$(ABCREV).a: - $(P) -ifneq ($(ABCREV),default) - $(Q) if test -d abc/.hg; then \ - echo 'REEBE: NOP qverpgbel vf n ut jbexvat pbcl! Erzbir nop/ naq er-eha "znxr".' | tr 'A-Za-z' 'N-ZA-Mn-za-m'; false; \ - fi - $(Q) if test -d abc && test -d abc/.git && ! git -C abc diff-index --quiet HEAD; then \ - echo 'REEBE: NOP pbagnvaf ybpny zbqvsvpngvbaf! Frg NOPERI=qrsnhyg va Lbflf Znxrsvyr!' | tr 'A-Za-z' 'N-ZA-Mn-za-m'; false; \ +.PHONY: check-git-abc + +check-git-abc: + @if [ ! -d "$(YOSYS_SRC)/abc" ]; then \ + echo "Error: The 'abc' directory does not exist."; \ + echo "Initialize the submodule: Run 'git submodule update --init' to set up 'abc' as a submodule."; \ + exit 1; \ + elif git -C "$(YOSYS_SRC)" submodule status abc 2>/dev/null | grep -q '^ '; then \ + exit 0; \ + elif [ -f "$(YOSYS_SRC)/abc/.gitcommit" ] && ! grep -q '\$$Format:%h\$$' "$(YOSYS_SRC)/abc/.gitcommit"; then \ + echo "'abc' comes from a tarball. Continuing."; \ + exit 0; \ + elif [ -f "$(YOSYS_SRC)/abc/.gitcommit" ] && grep -q '\$$Format:%h\$$' "$(YOSYS_SRC)/abc/.gitcommit"; then \ + echo "Error: 'abc' is not configured as a git submodule."; \ + echo "To resolve this:"; \ + echo "1. Back up your changes: Save any modifications from the 'abc' directory to another location."; \ + echo "2. Remove the existing 'abc' directory: Delete the 'abc' directory and all its contents."; \ + echo "3. Initialize the submodule: Run 'git submodule update --init' to set up 'abc' as a submodule."; \ + echo "4. Reapply your changes: Move your saved changes back to the 'abc' directory, if necessary."; \ + exit 1; \ + else \ + echo "Initialize the submodule: Run 'git submodule update --init' to set up 'abc' as a submodule."; \ + exit 1; \ fi - $(Q) if test -d abc && ! test -d abc/.git && ! test "`cat abc/.gitcommit | cut -c1-7`" = "$(ABCREV)"; then \ - echo 'REEBE: Qbjaybnqrq NOP irefvbaf qbrf abg zngpu! Qbjaybnq sebz:' | tr 'A-Za-z' 'N-ZA-Mn-za-m'; echo $(ABCURL)/archive/$(ABCREV).tar.gz; false; \ - fi -# set a variable so the test fails if git fails to run - when comparing outputs directly, empty string would match empty string - $(Q) if test -d abc && ! test -d abc/.git && test "`cat abc/.gitcommit | cut -c1-7`" = "$(ABCREV)"; then \ - echo "Compiling local copy of ABC"; \ - elif ! (cd abc 2> /dev/null && rev="`git rev-parse $(ABCREV)`" && test "`git rev-parse HEAD`" = "$$rev"); then \ - test $(ABCPULL) -ne 0 || { echo 'REEBE: NOP abg hc gb qngr naq NOPCHYY frg gb 0 va Znxrsvyr!' | tr 'A-Za-z' 'N-ZA-Mn-za-m'; exit 1; }; \ - echo "Pulling ABC from $(ABCURL):"; set -x; \ - test -d abc || git clone $(ABCURL) abc; \ - cd abc && $(MAKE) DEP= clean && git fetch $(ABCURL) && git checkout $(ABCREV); \ - fi -endif - $(Q) rm -f abc/abc-[0-9a-f]* - $(Q) $(MAKE) -C abc $(S) $(ABCMKARGS) $(if $(filter %.a,$@),PROG="abc-$(ABCREV)",PROG="abc-$(ABCREV)$(EXE)") MSG_PREFIX="$(eval P_OFFSET = 5)$(call P_SHOW)$(eval P_OFFSET = 10) ABC: " $(if $(filter %.a,$@),libabc-$(ABCREV).a) -ifeq ($(ABCREV),default) -.PHONY: abc/abc-$(ABCREV)$(EXE) -.PHONY: abc/libabc-$(ABCREV).a -endif +abc/abc$(EXE) abc/libabc.a: check-git-abc + $(P) + $(Q) mkdir -p abc && $(MAKE) -C $(PROGRAM_PREFIX)abc -f "$(realpath $(YOSYS_SRC)/abc/Makefile)" ABCSRC="$(realpath $(YOSYS_SRC)/abc/)" $(S) $(ABCMKARGS) $(if $(filter %.a,$@),PROG="abc",PROG="abc$(EXE)") MSG_PREFIX="$(eval P_OFFSET = 5)$(call P_SHOW)$(eval P_OFFSET = 10) ABC: " $(if $(filter %.a,$@),libabc.a) -$(PROGRAM_PREFIX)yosys-abc$(EXE): abc/abc-$(ABCREV)$(EXE) - $(P) cp abc/abc-$(ABCREV)$(EXE) $(PROGRAM_PREFIX)yosys-abc$(EXE) +$(PROGRAM_PREFIX)yosys-abc$(EXE): abc/abc$(EXE) + $(P) cp $< $(PROGRAM_PREFIX)yosys-abc$(EXE) -$(PROGRAM_PREFIX)yosys-libabc.a: abc/libabc-$(ABCREV).a - $(P) cp abc/libabc-$(ABCREV).a $(PROGRAM_PREFIX)yosys-libabc.a +$(PROGRAM_PREFIX)yosys-libabc.a: abc/libabc.a + $(P) cp $< $(PROGRAM_PREFIX)yosys-libabc.a ifneq ($(SEED),) SEEDOPT="-S $(SEED)" @@ -841,9 +811,22 @@ else ABCOPT="" endif +# When YOSYS_NOVERIFIC is set as a make variable, also export it to the +# enviornment, so that `YOSYS_NOVERIFIC=1 make test` _and_ +# `make test YOSYS_NOVERIFIC=1` will run with verific disabled. +ifeq ($(YOSYS_NOVERIFIC),1) +export YOSYS_NOVERIFIC +endif + test: $(TARGETS) $(EXTRA_TARGETS) ifeq ($(ENABLE_VERIFIC),1) +ifeq ($(YOSYS_NOVERIFIC),1) + @echo + @echo "Running tests without verific support due to YOSYS_NOVERIFIC=1" + @echo +else +cd tests/verific && bash run-test.sh $(SEEDOPT) +endif endif +cd tests/simple && bash run-test.sh $(SEEDOPT) +cd tests/simple_abc9 && bash run-test.sh $(SEEDOPT) @@ -877,12 +860,15 @@ endif +cd tests/arch/gowin && bash run-test.sh $(SEEDOPT) +cd tests/arch/intel_alm && bash run-test.sh $(SEEDOPT) +cd tests/arch/nexus && bash run-test.sh $(SEEDOPT) - +cd tests/arch/quicklogic && bash run-test.sh $(SEEDOPT) + +cd tests/arch/quicklogic/pp3 && bash run-test.sh $(SEEDOPT) + +cd tests/arch/quicklogic/qlf_k6n10f && bash run-test.sh $(SEEDOPT) +cd tests/arch/gatemate && bash run-test.sh $(SEEDOPT) +cd tests/rpc && bash run-test.sh +cd tests/memfile && bash run-test.sh +cd tests/verilog && bash run-test.sh +cd tests/xprop && bash run-test.sh $(SEEDOPT) + +cd tests/fmt && bash run-test.sh + +cd tests/cxxrtl && bash run-test.sh @echo "" @echo " Passed \"make test\"." @echo "" @@ -912,7 +898,7 @@ ystests: $(TARGETS) $(EXTRA_TARGETS) # Unit test unit-test: libyosys.so @$(MAKE) -C $(UNITESTPATH) CXX="$(CXX)" CPPFLAGS="$(CPPFLAGS)" \ - CXXFLAGS="$(CXXFLAGS)" LDLIBS="$(LDLIBS)" ROOTPATH="$(CURDIR)" + CXXFLAGS="$(CXXFLAGS)" LIBS="$(LIBS)" ROOTPATH="$(CURDIR)" clean-unit-test: @$(MAKE) -C $(UNITESTPATH) clean @@ -965,17 +951,47 @@ docs/source/cmd/abc.rst: $(TARGETS) $(EXTRA_TARGETS) mkdir -p docs/source/cmd ./$(PROGRAM_PREFIX)yosys -p 'help -write-rst-command-reference-manual' -PHONY: docs/gen_images docs/guidelines +PHONY: docs/gen_examples docs/gen_images docs/guidelines docs/usage docs/reqs +docs/gen_examples: + $(Q) $(MAKE) -C docs examples + docs/gen_images: - $(Q) $(MAKE) -C docs/images all + $(Q) $(MAKE) -C docs images DOCS_GUIDELINE_FILES := GettingStarted CodingStyle -docs/guidelines: - $(Q) mkdir -p docs/source/temp - $(Q) cp -f $(addprefix guidelines/,$(DOCS_GUIDELINE_FILES)) docs/source/temp +docs/guidelines docs/source/generated: + $(Q) mkdir -p docs/source/generated + $(Q) cp -f $(addprefix guidelines/,$(DOCS_GUIDELINE_FILES)) docs/source/generated + +# some commands return an error and print the usage text to stderr +define DOC_USAGE_STDERR +docs/source/generated/$(1): $(PROGRAM_PREFIX)$(1) docs/source/generated + -$(Q) ./$$< --help 2> $$@ +endef +DOCS_USAGE_STDERR := yosys-config yosys-filterlib + +# The in-tree ABC (yosys-abc) is only built when ABCEXTERNAL is not set. +ifeq ($(ABCEXTERNAL),) +DOCS_USAGE_STDERR += yosys-abc +endif + +$(foreach usage,$(DOCS_USAGE_STDERR),$(eval $(call DOC_USAGE_STDERR,$(usage)))) + +# others print to stdout +define DOC_USAGE_STDOUT +docs/source/generated/$(1): $(PROGRAM_PREFIX)$(1) docs/source/generated + $(Q) ./$$< --help > $$@ +endef +DOCS_USAGE_STDOUT := yosys yosys-smtbmc yosys-witness +$(foreach usage,$(DOCS_USAGE_STDOUT),$(eval $(call DOC_USAGE_STDOUT,$(usage)))) + +docs/usage: $(addprefix docs/source/generated/,$(DOCS_USAGE_STDOUT) $(DOCS_USAGE_STDERR)) + +docs/reqs: + $(Q) $(MAKE) -C docs reqs DOC_TARGET ?= html -docs: docs/source/cmd/abc.rst docs/gen_images docs/guidelines +docs: docs/source/cmd/abc.rst docs/gen_examples docs/gen_images docs/guidelines docs/usage docs/reqs $(Q) $(MAKE) -C docs $(DOC_TARGET) clean: @@ -993,8 +1009,8 @@ clean: rm -rf vloghtb/Makefile vloghtb/refdat vloghtb/rtl vloghtb/scripts vloghtb/spec vloghtb/check_yosys vloghtb/vloghammer_tb.tar.bz2 vloghtb/temp vloghtb/log_test_* rm -f tests/svinterfaces/*.log_stdout tests/svinterfaces/*.log_stderr tests/svinterfaces/dut_result.txt tests/svinterfaces/reference_result.txt tests/svinterfaces/a.out tests/svinterfaces/*_syn.v tests/svinterfaces/*.diff rm -f tests/tools/cmp_tbdata - $(MAKE) -C docs clean - $(MAKE) -C docs/images clean + -$(MAKE) -C docs clean + -$(MAKE) -C docs/images clean rm -rf docs/source/cmd docs/util/__pycache__ clean-abc: @@ -1011,16 +1027,17 @@ coverage: genhtml coverage.info --output-directory coverage_html qtcreator: + echo "$(CXXFLAGS)" | grep -o '\-D[^ ]*' | tr ' ' '\n' | sed 's/-D/#define /' | sed 's/=/ /'> qtcreator.config { for file in $(basename $(OBJS)); do \ for prefix in cc y l; do if [ -f $${file}.$${prefix} ]; then echo $$file.$${prefix}; fi; done \ done; find backends frontends kernel libs passes -type f \( -name '*.h' -o -name '*.hh' \); } > qtcreator.files { echo .; find backends frontends kernel libs passes -type f \( -name '*.h' -o -name '*.hh' \) -printf '%h\n' | sort -u; } > qtcreator.includes - touch qtcreator.config qtcreator.creator + touch qtcreator.creator vcxsrc: $(GENFILES) $(EXTRA_TARGETS) rm -rf yosys-win32-vcxsrc-$(YOSYS_VER){,.zip} set -e; for f in `ls $(filter %.cc %.cpp,$(GENFILES)) $(addsuffix .cc,$(basename $(OBJS))) $(addsuffix .cpp,$(basename $(OBJS))) 2> /dev/null`; do \ - echo "Analyse: $$f" >&2; cpp -std=c++11 -MM -I. -D_YOSYS_ $$f; done | sed 's,.*:,,; s,//*,/,g; s,/[^/]*/\.\./,/,g; y, \\,\n\n,;' | grep '^[^/]' | sort -u | grep -v kernel/version_ > srcfiles.txt + echo "Analyse: $$f" >&2; cpp -std=c++17 -MM -I. -D_YOSYS_ $$f; done | sed 's,.*:,,; s,//*,/,g; s,/[^/]*/\.\./,/,g; y, \\,\n\n,;' | grep '^[^/]' | sort -u | grep -v kernel/version_ > srcfiles.txt bash misc/create_vcxsrc.sh yosys-win32-vcxsrc $(YOSYS_VER) $(GIT_REV) echo "namespace Yosys { extern const char *yosys_version_str; const char *yosys_version_str=\"Yosys (Version Information Unavailable)\"; }" > kernel/version.cc zip yosys-win32-vcxsrc-$(YOSYS_VER)/genfiles.zip $(GENFILES) kernel/version.cc @@ -1058,14 +1075,6 @@ config-gcc-static: clean config-afl-gcc: clean echo 'CONFIG := afl-gcc' > Makefile.conf -config-emcc: clean - echo 'CONFIG := emcc' > Makefile.conf - echo 'ENABLE_TCL := 0' >> Makefile.conf - echo 'ENABLE_ABC := 0' >> Makefile.conf - echo 'ENABLE_PLUGINS := 0' >> Makefile.conf - echo 'ENABLE_READLINE := 0' >> Makefile.conf - echo 'ENABLE_ZLIB := 0' >> Makefile.conf - config-wasi: clean echo 'CONFIG := wasi' > Makefile.conf echo 'ENABLE_TCL := 0' >> Makefile.conf @@ -1107,8 +1116,8 @@ echo-yosys-ver: echo-git-rev: @echo "$(GIT_REV)" -echo-abc-rev: - @echo "$(ABCREV)" +echo-cxx: + @echo "$(CXX)" -include libs/*/*.d -include frontends/*/*.d diff --git a/yosys/README.md b/yosys/README.md index 5e5a8ec3e12..bb1c4d443e4 100644 --- a/yosys/README.md +++ b/yosys/README.md @@ -1,7 +1,7 @@ ``` yosys -- Yosys Open SYnthesis Suite -Copyright (C) 2012 - 2020 Claire Xenia Wolf +Copyright (C) 2012 - 2024 Claire Xenia Wolf Permission to use, copy, modify, and/or distribute this software for any purpose with or without fee is hereby granted, provided that the above @@ -71,7 +71,7 @@ Many Linux distributions also provide Yosys binaries, some more up to date than Building from Source ==================== -You need a C++ compiler with C++11 support (up-to-date CLANG or GCC is +You need a C++ compiler with C++17 support (up-to-date CLANG or GCC is recommended) and some standard tools such as GNU Flex, GNU Bison, and GNU Make. TCL, readline and libffi are optional (see ``ENABLE_*`` settings in Makefile). Xdot (graphviz) is used by the ``show`` command in yosys to display schematics. @@ -105,11 +105,17 @@ For Cygwin use the following command to install all prerequisites, or select the setup-x86_64.exe -q --packages=bison,flex,gcc-core,gcc-g++,git,libffi-devel,libreadline-devel,make,pkg-config,python3,tcl-devel,boost-build,zlib-devel -To configure the build system to use a specific compiler, use one of +The environment variable `CXX` can be used to control the C++ compiler used, or +run one of the following: $ make config-clang $ make config-gcc +Note that these will result in `make` ignoring the `CXX` environment variable, +unless `CXX` is assigned in the call to make, e.g. + + $ make CXX=$CXX + For other compilers and build configurations it might be necessary to make some changes to the config section of the Makefile. @@ -587,11 +593,19 @@ from SystemVerilog: - enums are supported (including inside packages) - but are currently not strongly typed -- packed structs and unions are supported. +- packed structs and unions are supported + - arrays of packed structs/unions are currently not supported + - structure literals are currently not supported + +- multidimensional arrays are supported + - array assignment of unpacked arrays is currently not supported + - array literals are currently not supported - SystemVerilog interfaces (SVIs) are supported. Modports for specifying whether ports are inputs or outputs are supported. +- Assignments within expressions are supported. + Building the documentation ========================== @@ -602,10 +616,12 @@ Simply visit https://yosys.readthedocs.io/en/latest/ instead. In addition to those packages listed above for building Yosys from source, the following are used for building the website: - $ sudo apt-get install pdf2svg faketime + $ sudo apt install pdf2svg faketime PDFLaTeX, included with most LaTeX distributions, is also needed during the -build process for the website. +build process for the website. Or, run the following: + + $ sudo apt install texlive-latex-base texlive-latex-extra latexmk The Python package, Sphinx, is needed along with those listed in `docs/source/requirements.txt`: diff --git a/yosys/backends/aiger/aiger.cc b/yosys/backends/aiger/aiger.cc index bb804f230fb..f2cb5d9bcc7 100644 --- a/yosys/backends/aiger/aiger.cc +++ b/yosys/backends/aiger/aiger.cc @@ -54,6 +54,8 @@ struct AigerWriter vector> aig_gates; vector aig_latchin, aig_latchinit, aig_outputs; + vector bit2aig_stack; + size_t next_loop_check = 1024; int aig_m = 0, aig_i = 0, aig_l = 0, aig_o = 0, aig_a = 0; int aig_b = 0, aig_c = 0, aig_j = 0, aig_f = 0; @@ -65,6 +67,8 @@ struct AigerWriter int initstate_ff = 0; dict ywmap_clocks; + vector ywmap_asserts; + vector ywmap_assumes; int mkgate(int a0, int a1) { @@ -81,6 +85,23 @@ struct AigerWriter return it->second; } + if (bit2aig_stack.size() == next_loop_check) { + for (size_t i = 0; i < next_loop_check; ++i) + { + SigBit report_bit = bit2aig_stack[i]; + if (report_bit != bit) + continue; + for (size_t j = i; j < next_loop_check; ++j) { + report_bit = bit2aig_stack[j]; + if (report_bit.is_wire() && report_bit.wire->name.isPublic()) + break; + } + log_error("Found combinational logic loop while processing signal %s.\n", log_signal(report_bit)); + } + next_loop_check *= 2; + } + bit2aig_stack.push_back(bit); + // NB: Cannot use iterator returned from aig_map.insert() // since this function is called recursively @@ -101,6 +122,8 @@ struct AigerWriter a = initstate_ff; } + bit2aig_stack.pop_back(); + if (bit == State::Sx || bit == State::Sz) log_error("Design contains 'x' or 'z' bits. Use 'setundef' to replace those constants.\n"); @@ -248,6 +271,7 @@ struct AigerWriter unused_bits.erase(A); unused_bits.erase(EN); asserts.push_back(make_pair(A, EN)); + ywmap_asserts.push_back(cell); continue; } @@ -258,6 +282,7 @@ struct AigerWriter unused_bits.erase(A); unused_bits.erase(EN); assumes.push_back(make_pair(A, EN)); + ywmap_assumes.push_back(cell); continue; } @@ -299,6 +324,9 @@ struct AigerWriter continue; } + if (cell->type == ID($scopeinfo)) + continue; + log_error("Unsupported cell type: %s (%s)\n", log_id(cell->type), log_id(cell)); } @@ -828,6 +856,19 @@ struct AigerWriter for (auto &it : init_lines) json.value(it.second); json.end_array(); + + json.name("asserts"); + json.begin_array(); + for (Cell *cell : ywmap_asserts) + json.value(witness_path(cell)); + json.end_array(); + + json.name("assumes"); + json.begin_array(); + for (Cell *cell : ywmap_assumes) + json.value(witness_path(cell)); + json.end_array(); + json.end_object(); } diff --git a/yosys/backends/blif/blif.cc b/yosys/backends/blif/blif.cc index 8e2c088c484..788b7f951f2 100644 --- a/yosys/backends/blif/blif.cc +++ b/yosys/backends/blif/blif.cc @@ -226,6 +226,9 @@ struct BlifDumper for (auto cell : module->cells()) { + if (cell->type == ID($scopeinfo)) + continue; + if (config->unbuf_types.count(cell->type)) { auto portnames = config->unbuf_types.at(cell->type); f << stringf(".names %s %s\n1 1\n", diff --git a/yosys/backends/btor/test_cells.sh b/yosys/backends/btor/test_cells.sh index 0a011932d22..f8bd797825e 100755 --- a/yosys/backends/btor/test_cells.sh +++ b/yosys/backends/btor/test_cells.sh @@ -1,4 +1,4 @@ -#!/bin/bash +#!/usr/bin/env bash set -ex diff --git a/yosys/backends/cxxrtl/Makefile.inc b/yosys/backends/cxxrtl/Makefile.inc index aaa304502e0..dd77d2ad360 100644 --- a/yosys/backends/cxxrtl/Makefile.inc +++ b/yosys/backends/cxxrtl/Makefile.inc @@ -1,2 +1,11 @@ OBJS += backends/cxxrtl/cxxrtl_backend.o + +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/cxxrtl.h)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc)) +$(eval $(call add_include_file,backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h)) diff --git a/yosys/backends/cxxrtl/cxxrtl_backend.cc b/yosys/backends/cxxrtl/cxxrtl_backend.cc index 1b13985ab4e..8dc14863d60 100644 --- a/yosys/backends/cxxrtl/cxxrtl_backend.cc +++ b/yosys/backends/cxxrtl/cxxrtl_backend.cc @@ -24,6 +24,8 @@ #include "kernel/celltypes.h" #include "kernel/mem.h" #include "kernel/log.h" +#include "kernel/fmt.h" +#include "kernel/scopeinfo.h" USING_YOSYS_NAMESPACE PRIVATE_NAMESPACE_BEGIN @@ -217,7 +219,7 @@ bool is_internal_cell(RTLIL::IdString type) bool is_effectful_cell(RTLIL::IdString type) { - return type.isPublic(); + return type.in(ID($print), ID($check)); } bool is_cxxrtl_blackbox_cell(const RTLIL::Cell *cell) @@ -281,6 +283,7 @@ struct FlowGraph { CONNECT, CELL_SYNC, CELL_EVAL, + EFFECT_SYNC, PROCESS_SYNC, PROCESS_CASE, MEM_RDPORT, @@ -290,6 +293,7 @@ struct FlowGraph { Type type; RTLIL::SigSig connect = {}; const RTLIL::Cell *cell = nullptr; + std::vector cells; const RTLIL::Process *process = nullptr; const Mem *mem = nullptr; int portidx; @@ -477,6 +481,15 @@ struct FlowGraph { return node; } + Node *add_effect_sync_node(std::vector cells) + { + Node *node = new Node; + node->type = Node::Type::EFFECT_SYNC; + node->cells = cells; + nodes.push_back(node); + return node; + } + // Processes void add_case_rule_defs_uses(Node *node, const RTLIL::CaseRule *case_) { @@ -593,22 +606,30 @@ std::vector split_by(const std::string &str, const std::string &sep return result; } -std::string escape_cxx_string(const std::string &input) +std::string escape_c_string(const std::string &input) { - std::string output = "\""; + std::string output; + output.push_back('"'); for (auto c : input) { if (::isprint(c)) { if (c == '\\') output.push_back('\\'); output.push_back(c); } else { - char l = c & 0xf, h = (c >> 4) & 0xf; - output.append("\\x"); - output.push_back((h < 10 ? '0' + h : 'a' + h - 10)); - output.push_back((l < 10 ? '0' + l : 'a' + l - 10)); + char l = c & 0x3, m = (c >> 3) & 0x3, h = (c >> 6) & 0x3; + output.append("\\"); + output.push_back('0' + h); + output.push_back('0' + m); + output.push_back('0' + l); } } output.push_back('"'); + return output; +} + +std::string escape_cxx_string(const std::string &input) +{ + std::string output = escape_c_string(input); if (output.find('\0') != std::string::npos) { output.insert(0, "std::string {"); output.append(stringf(", %zu}", input.size())); @@ -616,6 +637,20 @@ std::string escape_cxx_string(const std::string &input) return output; } +std::string basename(const std::string &filepath) +{ +#ifdef _WIN32 + const std::string dir_seps = "\\/"; +#else + const std::string dir_seps = "/"; +#endif + size_t sep_pos = filepath.find_last_of(dir_seps); + if (sep_pos != std::string::npos) + return filepath.substr(sep_pos + 1); + else + return filepath; +} + template std::string get_hdl_name(T *object) { @@ -681,6 +716,7 @@ struct CxxrtlWorker { bool split_intf = false; std::string intf_filename; std::string design_ns = "cxxrtl_design"; + std::string print_output = "std::cout"; std::ostream *impl_f = nullptr; std::ostream *intf_f = nullptr; @@ -1102,7 +1138,7 @@ struct CxxrtlWorker { f << indent << "// cell " << cell->name.str() << " syncs\n"; for (auto conn : cell->connections()) if (cell->output(conn.first)) - if (is_cxxrtl_sync_port(cell, conn.first)) { + if (is_cxxrtl_sync_port(cell, conn.first) && !conn.second.empty()) { f << indent; dump_sigspec_lhs(conn.second, for_debug); f << " = " << mangle(cell) << access << mangle_wire_name(conn.first) << ".curr;\n"; @@ -1189,6 +1225,144 @@ struct CxxrtlWorker { } } + void dump_print(const RTLIL::Cell *cell) + { + Fmt fmt; + fmt.parse_rtlil(cell); + + f << indent << "if ("; + dump_sigspec_rhs(cell->getPort(ID::EN)); + f << " == value<1>{1u}) {\n"; + inc_indent(); + dict fmt_args; + f << indent << "struct : public lazy_fmt {\n"; + inc_indent(); + f << indent << "std::string operator() () const override {\n"; + inc_indent(); + fmt.emit_cxxrtl(f, indent, [&](const RTLIL::SigSpec &sig) { + if (sig.size() == 0) + f << "value<0>()"; + else { + std::string arg_name = "arg" + std::to_string(fmt_args.size()); + fmt_args[arg_name] = sig; + f << arg_name; + } + }, "performer"); + dec_indent(); + f << indent << "}\n"; + f << indent << "struct performer *performer;\n"; + for (auto arg : fmt_args) + f << indent << "value<" << arg.second.size() << "> " << arg.first << ";\n"; + dec_indent(); + f << indent << "} formatter;\n"; + f << indent << "formatter.performer = performer;\n"; + for (auto arg : fmt_args) { + f << indent << "formatter." << arg.first << " = "; + dump_sigspec_rhs(arg.second); + f << ";\n"; + } + f << indent << "if (performer) {\n"; + inc_indent(); + f << indent << "static const metadata_map attributes = "; + dump_metadata_map(cell->attributes); + f << ";\n"; + f << indent << "performer->on_print(formatter, attributes);\n"; + dec_indent(); + f << indent << "} else {\n"; + inc_indent(); + f << indent << print_output << " << formatter();\n"; + dec_indent(); + f << indent << "}\n"; + dec_indent(); + f << indent << "}\n"; + } + + void dump_effect(const RTLIL::Cell *cell) + { + Fmt fmt; + fmt.parse_rtlil(cell); + + f << indent << "if ("; + dump_sigspec_rhs(cell->getPort(ID::EN)); + f << ") {\n"; + inc_indent(); + dict fmt_args; + f << indent << "struct : public lazy_fmt {\n"; + inc_indent(); + f << indent << "std::string operator() () const override {\n"; + inc_indent(); + fmt.emit_cxxrtl(f, indent, [&](const RTLIL::SigSpec &sig) { + if (sig.size() == 0) + f << "value<0>()"; + else { + std::string arg_name = "arg" + std::to_string(fmt_args.size()); + fmt_args[arg_name] = sig; + f << arg_name; + } + }, "performer"); + dec_indent(); + f << indent << "}\n"; + f << indent << "struct performer *performer;\n"; + for (auto arg : fmt_args) + f << indent << "value<" << arg.second.size() << "> " << arg.first << ";\n"; + dec_indent(); + f << indent << "} formatter;\n"; + f << indent << "formatter.performer = performer;\n"; + for (auto arg : fmt_args) { + f << indent << "formatter." << arg.first << " = "; + dump_sigspec_rhs(arg.second); + f << ";\n"; + } + if (cell->hasPort(ID::A)) { + f << indent << "bool condition = (bool)"; + dump_sigspec_rhs(cell->getPort(ID::A)); + f << ";\n"; + } + f << indent << "if (performer) {\n"; + inc_indent(); + f << indent << "static const metadata_map attributes = "; + dump_metadata_map(cell->attributes); + f << ";\n"; + if (cell->type == ID($print)) { + f << indent << "performer->on_print(formatter, attributes);\n"; + } else if (cell->type == ID($check)) { + std::string flavor = cell->getParam(ID::FLAVOR).decode_string(); + f << indent << "performer->on_check("; + if (flavor == "assert") + f << "flavor::ASSERT"; + else if (flavor == "assume") + f << "flavor::ASSUME"; + else if (flavor == "live") + f << "flavor::ASSERT_EVENTUALLY"; + else if (flavor == "fair") + f << "flavor::ASSUME_EVENTUALLY"; + else if (flavor == "cover") + f << "flavor::COVER"; + else log_assert(false); + f << ", condition, formatter, attributes);\n"; + } else log_assert(false); + dec_indent(); + f << indent << "} else {\n"; + inc_indent(); + if (cell->type == ID($print)) { + f << indent << print_output << " << formatter();\n"; + } else if (cell->type == ID($check)) { + std::string flavor = cell->getParam(ID::FLAVOR).decode_string(); + if (flavor == "assert" || flavor == "assume") { + f << indent << "if (!condition) {\n"; + inc_indent(); + f << indent << "std::cerr << formatter();\n"; + dec_indent(); + f << indent << "}\n"; + f << indent << "CXXRTL_ASSERT(condition && \"Check failed\");\n"; + } + } else log_assert(false); + dec_indent(); + f << indent << "}\n"; + dec_indent(); + f << indent << "}\n"; + } + void dump_cell_eval(const RTLIL::Cell *cell, bool for_debug = false) { std::vector inlined_cells; @@ -1202,6 +1376,38 @@ struct CxxrtlWorker { f << " = "; dump_cell_expr(cell, for_debug); f << ";\n"; + // Effectful cells + } else if (is_effectful_cell(cell->type)) { + log_assert(!for_debug); + + // Sync effectful cells are grouped into EFFECT_SYNC nodes in the FlowGraph. + log_assert(!cell->getParam(ID::TRG_ENABLE).as_bool() || (cell->getParam(ID::TRG_ENABLE).as_bool() && cell->getParam(ID::TRG_WIDTH).as_int() == 0)); + + if (!cell->getParam(ID::TRG_ENABLE).as_bool()) { // async effectful cell + f << indent << "auto " << mangle(cell) << "_next = "; + dump_sigspec_rhs(cell->getPort(ID::EN)); + f << ".concat("; + if (cell->type == ID($print)) + dump_sigspec_rhs(cell->getPort(ID::ARGS)); + else if (cell->type == ID($check)) + dump_sigspec_rhs(cell->getPort(ID::A)); + else log_assert(false); + f << ").val();\n"; + + f << indent << "if (" << mangle(cell) << " != " << mangle(cell) << "_next) {\n"; + inc_indent(); + dump_effect(cell); + f << indent << mangle(cell) << " = " << mangle(cell) << "_next;\n"; + dec_indent(); + f << indent << "}\n"; + } else { // initial effectful cell + f << indent << "if (!" << mangle(cell) << ") {\n"; + inc_indent(); + dump_effect(cell); + f << indent << mangle(cell) << " = value<1>{1u};\n"; + dec_indent(); + f << indent << "}\n"; + } // Flip-flops } else if (is_ff_cell(cell->type)) { log_assert(!for_debug); @@ -1298,7 +1504,7 @@ struct CxxrtlWorker { f << indent; dump_sigspec_lhs(cell->getPort(ID::Q)); f << " = "; - dump_sigspec_lhs(cell->getPort(ID::Q)); + dump_sigspec_rhs(cell->getPort(ID::Q)); f << ".update("; dump_const(RTLIL::Const(RTLIL::S1, cell->getParam(ID::WIDTH).as_int())); f << ", "; @@ -1310,7 +1516,7 @@ struct CxxrtlWorker { f << indent; dump_sigspec_lhs(cell->getPort(ID::Q)); f << " = "; - dump_sigspec_lhs(cell->getPort(ID::Q)); + dump_sigspec_rhs(cell->getPort(ID::Q)); f << ".update("; dump_const(RTLIL::Const(RTLIL::S0, cell->getParam(ID::WIDTH).as_int())); f << ", "; @@ -1321,8 +1527,9 @@ struct CxxrtlWorker { } else if (is_internal_cell(cell->type)) { log_cmd_error("Unsupported internal cell `%s'.\n", cell->type.c_str()); // User cells + } else if (for_debug) { + // Outlines are called on demand when computing the value of a debug item. Nothing to do here. } else { - log_assert(!for_debug); log_assert(cell->known()); bool buffered_inputs = false; const char *access = is_cxxrtl_blackbox_cell(cell) ? "->" : "."; @@ -1382,11 +1589,11 @@ struct CxxrtlWorker { }; if (buffered_inputs) { // If we have any buffered inputs, there's no chance of converging immediately. - f << indent << mangle(cell) << access << "eval();\n"; + f << indent << mangle(cell) << access << "eval(performer);\n"; f << indent << "converged = false;\n"; assign_from_outputs(/*cell_converged=*/false); } else { - f << indent << "if (" << mangle(cell) << access << "eval()) {\n"; + f << indent << "if (" << mangle(cell) << access << "eval(performer)) {\n"; inc_indent(); assign_from_outputs(/*cell_converged=*/true); dec_indent(); @@ -1580,6 +1787,47 @@ struct CxxrtlWorker { } } + void dump_cell_effect_sync(std::vector &cells) + { + log_assert(!cells.empty()); + const auto &trg = cells[0]->getPort(ID::TRG); + const auto &trg_polarity = cells[0]->getParam(ID::TRG_POLARITY); + + f << indent << "if ("; + for (int i = 0; i < trg.size(); i++) { + RTLIL::SigBit trg_bit = trg[i]; + trg_bit = sigmaps[trg_bit.wire->module](trg_bit); + log_assert(trg_bit.wire); + + if (i != 0) + f << " || "; + + if (trg_polarity[i] == State::S1) + f << "posedge_"; + else + f << "negedge_"; + f << mangle(trg_bit); + } + f << ") {\n"; + inc_indent(); + std::sort(cells.begin(), cells.end(), [](const RTLIL::Cell *a, const RTLIL::Cell *b) { + return a->getParam(ID::PRIORITY).as_int() > b->getParam(ID::PRIORITY).as_int(); + }); + for (auto cell : cells) { + log_assert(cell->getParam(ID::TRG_ENABLE).as_bool()); + log_assert(cell->getPort(ID::TRG) == trg); + log_assert(cell->getParam(ID::TRG_POLARITY) == trg_polarity); + + std::vector inlined_cells; + collect_cell_eval(cell, /*for_debug=*/false, inlined_cells); + dump_inlined_cells(inlined_cells); + dump_effect(cell); + } + dec_indent(); + + f << indent << "}\n"; + } + void dump_mem_rdport(const Mem *mem, int portidx, bool for_debug = false) { auto &port = mem->rd_ports[portidx]; @@ -1899,6 +2147,10 @@ struct CxxrtlWorker { } } for (auto cell : module->cells()) { + // Async and initial effectful cells have additional state, which must be reset as well. + if (is_effectful_cell(cell->type)) + if (!cell->getParam(ID::TRG_ENABLE).as_bool() || cell->getParam(ID::TRG_WIDTH).as_int() == 0) + f << indent << mangle(cell) << " = {};\n"; if (is_internal_cell(cell->type)) continue; f << indent << mangle(cell); @@ -1946,6 +2198,9 @@ struct CxxrtlWorker { case FlowGraph::Node::Type::CELL_EVAL: dump_cell_eval(node.cell); break; + case FlowGraph::Node::Type::EFFECT_SYNC: + dump_cell_effect_sync(node.cells); + break; case FlowGraph::Node::Type::PROCESS_CASE: dump_process_case(node.process); break; @@ -2009,27 +2264,116 @@ struct CxxrtlWorker { if (wire_type.type == WireType::MEMBER && edge_wires[wire]) f << indent << "prev_" << mangle(wire) << " = " << mangle(wire) << ";\n"; if (wire_type.is_buffered()) - f << indent << "if (" << mangle(wire) << ".commit()) changed = true;\n"; + f << indent << "if (" << mangle(wire) << ".commit(observer)) changed = true;\n"; } if (!module->get_bool_attribute(ID(cxxrtl_blackbox))) { for (auto &mem : mod_memories[module]) { if (!writable_memories.count({module, mem.memid})) continue; - f << indent << "if (" << mangle(&mem) << ".commit()) changed = true;\n"; + f << indent << "if (" << mangle(&mem) << ".commit(observer)) changed = true;\n"; } for (auto cell : module->cells()) { if (is_internal_cell(cell->type)) continue; const char *access = is_cxxrtl_blackbox_cell(cell) ? "->" : "."; - f << indent << "if (" << mangle(cell) << access << "commit()) changed = true;\n"; + f << indent << "if (" << mangle(cell) << access << "commit(observer)) changed = true;\n"; } } f << indent << "return changed;\n"; dec_indent(); } + void dump_serialized_metadata(const dict &metadata_map) { + // Creating thousands metadata_map objects using initializer lists in a single function results in one of: + // 1. Megabytes of stack usage (with __attribute__((optnone))). + // 2. Minutes of compile time (without __attribute__((optnone))). + // So, don't create them. + std::string data; + auto put_u64 = [&](uint64_t value) { + for (size_t count = 0; count < 8; count++) { + data += (char)(value >> 56); + value <<= 8; + } + }; + for (auto metadata_item : metadata_map) { + if (!metadata_item.first.isPublic()) + continue; + if (metadata_item.second.size() > 64 && (metadata_item.second.flags & RTLIL::CONST_FLAG_STRING) == 0) { + f << indent << "/* attribute " << metadata_item.first.str().substr(1) << " is over 64 bits wide */\n"; + continue; + } + data += metadata_item.first.str().substr(1) + '\0'; + // In Yosys, a real is a type of string. + if (metadata_item.second.flags & RTLIL::CONST_FLAG_REAL) { + double dvalue = std::stod(metadata_item.second.decode_string()); + uint64_t uvalue; + static_assert(sizeof(dvalue) == sizeof(uvalue), "double must be 64 bits in size"); + memcpy(&uvalue, &dvalue, sizeof(uvalue)); + data += 'd'; + put_u64(uvalue); + } else if (metadata_item.second.flags & RTLIL::CONST_FLAG_STRING) { + data += 's'; + data += metadata_item.second.decode_string(); + data += '\0'; + } else if (metadata_item.second.flags & RTLIL::CONST_FLAG_SIGNED) { + data += 'i'; + put_u64((uint64_t)metadata_item.second.as_int(/*is_signed=*/true)); + } else { + data += 'u'; + put_u64(metadata_item.second.as_int(/*is_signed=*/false)); + } + } + f << escape_c_string(data); + } + + void dump_metadata_map(const dict &metadata_map) { + if (metadata_map.empty()) { + f << "metadata_map()"; + } else { + f << "metadata_map({\n"; + inc_indent(); + for (auto metadata_item : metadata_map) { + if (!metadata_item.first.isPublic()) + continue; + if (metadata_item.second.size() > 64 && (metadata_item.second.flags & RTLIL::CONST_FLAG_STRING) == 0) { + f << indent << "/* attribute " << metadata_item.first.str().substr(1) << " is over 64 bits wide */\n"; + continue; + } + f << indent << "{ " << escape_cxx_string(metadata_item.first.str().substr(1)) << ", "; + // In Yosys, a real is a type of string. + if (metadata_item.second.flags & RTLIL::CONST_FLAG_REAL) { + f << std::showpoint << std::stod(metadata_item.second.decode_string()) << std::noshowpoint; + } else if (metadata_item.second.flags & RTLIL::CONST_FLAG_STRING) { + f << escape_cxx_string(metadata_item.second.decode_string()); + } else if (metadata_item.second.flags & RTLIL::CONST_FLAG_SIGNED) { + f << "INT64_C(" << metadata_item.second.as_int(/*is_signed=*/true) << ")"; + } else { + f << "UINT64_C(" << metadata_item.second.as_int(/*is_signed=*/false) << ")"; + } + f << " },\n"; + } + dec_indent(); + f << indent << "})"; + } + } + + void dump_debug_attrs(const RTLIL::AttrObject *object, bool serialize = true) + { + dict attributes = object->attributes; + // Inherently necessary to get access to the object, so a waste of space to emit. + attributes.erase(ID::hdlname); + // Internal Yosys attribute that should be removed but isn't. + attributes.erase(ID::module_not_derived); + if (serialize) { + dump_serialized_metadata(attributes); + } else { + dump_metadata_map(attributes); + } + } + void dump_debug_info_method(RTLIL::Module *module) { + size_t count_scopes = 0; size_t count_public_wires = 0; size_t count_member_wires = 0; size_t count_undriven = 0; @@ -2042,139 +2386,195 @@ struct CxxrtlWorker { size_t count_skipped_wires = 0; inc_indent(); f << indent << "assert(path.empty() || path[path.size() - 1] == ' ');\n"; - for (auto wire : module->wires()) { - const auto &debug_wire_type = debug_wire_types[wire]; - if (!wire->name.isPublic()) - continue; - count_public_wires++; - switch (debug_wire_type.type) { - case WireType::BUFFERED: - case WireType::MEMBER: { - // Member wire - std::vector flags; - - if (wire->port_input && wire->port_output) - flags.push_back("INOUT"); - else if (wire->port_output) - flags.push_back("OUTPUT"); - else if (wire->port_input) - flags.push_back("INPUT"); - - bool has_driven_sync = false; - bool has_driven_comb = false; - bool has_undriven = false; - if (!module->get_bool_attribute(ID(cxxrtl_blackbox))) { - for (auto bit : SigSpec(wire)) - if (!bit_has_state.count(bit)) - has_undriven = true; - else if (bit_has_state[bit]) - has_driven_sync = true; - else - has_driven_comb = true; - } else if (wire->port_output) { - switch (cxxrtl_port_type(module, wire->name)) { - case CxxrtlPortType::SYNC: - has_driven_sync = true; - break; - case CxxrtlPortType::COMB: - has_driven_comb = true; - break; - case CxxrtlPortType::UNKNOWN: - has_driven_sync = has_driven_comb = true; - break; - } - } else { - has_undriven = true; - } - if (has_undriven) - flags.push_back("UNDRIVEN"); - if (!has_driven_sync && !has_driven_comb && has_undriven) - count_undriven++; - if (has_driven_sync) - flags.push_back("DRIVEN_SYNC"); - if (has_driven_sync && !has_driven_comb && !has_undriven) - count_driven_sync++; - if (has_driven_comb) - flags.push_back("DRIVEN_COMB"); - if (!has_driven_sync && has_driven_comb && !has_undriven) - count_driven_comb++; - if (has_driven_sync + has_driven_comb + has_undriven > 1) - count_mixed_driver++; - - f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(wire)); - f << ", debug_item(" << mangle(wire) << ", " << wire->start_offset; - bool first = true; - for (auto flag : flags) { - if (first) { - first = false; - f << ", "; + f << indent << "if (scopes) {\n"; + inc_indent(); + // The module is responsible for adding its own scope. + f << indent << "scopes->add(path.empty() ? path : path.substr(0, path.size() - 1), "; + f << escape_cxx_string(get_hdl_name(module)) << ", "; + dump_debug_attrs(module, /*serialize=*/false); + f << ", std::move(cell_attrs));\n"; + count_scopes++; + // If there were any submodules that were flattened, the module is also responsible for adding them. + for (auto cell : module->cells()) { + if (cell->type != ID($scopeinfo)) continue; + if (cell->getParam(ID::TYPE).decode_string() == "module") { + auto module_attrs = scopeinfo_attributes(cell, ScopeinfoAttrs::Module); + auto cell_attrs = scopeinfo_attributes(cell, ScopeinfoAttrs::Cell); + cell_attrs.erase(ID::module_not_derived); + f << indent << "scopes->add(path, " << escape_cxx_string(get_hdl_name(cell)) << ", "; + f << escape_cxx_string(cell->get_string_attribute(ID(module))) << ", "; + dump_serialized_metadata(module_attrs); + f << ", "; + dump_serialized_metadata(cell_attrs); + f << ");\n"; + } else log_assert(false && "Unknown $scopeinfo type"); + count_scopes++; + } + dec_indent(); + f << indent << "}\n"; + f << indent << "if (items) {\n"; + inc_indent(); + for (auto wire : module->wires()) { + const auto &debug_wire_type = debug_wire_types[wire]; + if (!wire->name.isPublic()) + continue; + count_public_wires++; + switch (debug_wire_type.type) { + case WireType::BUFFERED: + case WireType::MEMBER: { + // Member wire + std::vector flags; + + if (wire->port_input && wire->port_output) + flags.push_back("INOUT"); + else if (wire->port_output) + flags.push_back("OUTPUT"); + else if (wire->port_input) + flags.push_back("INPUT"); + + bool has_driven_sync = false; + bool has_driven_comb = false; + bool has_undriven = false; + if (!module->get_bool_attribute(ID(cxxrtl_blackbox))) { + for (auto bit : SigSpec(wire)) + if (!bit_has_state.count(bit)) + has_undriven = true; + else if (bit_has_state[bit]) + has_driven_sync = true; + else + has_driven_comb = true; + } else if (wire->port_output) { + switch (cxxrtl_port_type(module, wire->name)) { + case CxxrtlPortType::SYNC: + has_driven_sync = true; + break; + case CxxrtlPortType::COMB: + has_driven_comb = true; + break; + case CxxrtlPortType::UNKNOWN: + has_driven_sync = has_driven_comb = true; + break; + } } else { - f << "|"; + has_undriven = true; + } + if (has_undriven) + flags.push_back("UNDRIVEN"); + if (!has_driven_sync && !has_driven_comb && has_undriven) + count_undriven++; + if (has_driven_sync) + flags.push_back("DRIVEN_SYNC"); + if (has_driven_sync && !has_driven_comb && !has_undriven) + count_driven_sync++; + if (has_driven_comb) + flags.push_back("DRIVEN_COMB"); + if (!has_driven_sync && has_driven_comb && !has_undriven) + count_driven_comb++; + if (has_driven_sync + has_driven_comb + has_undriven > 1) + count_mixed_driver++; + + f << indent << "items->add(path, " << escape_cxx_string(get_hdl_name(wire)) << ", "; + dump_debug_attrs(wire); + f << ", " << mangle(wire); + if (wire->start_offset != 0 || !flags.empty()) { + f << ", " << wire->start_offset; + bool first = true; + for (auto flag : flags) { + if (first) { + first = false; + f << ", "; + } else { + f << "|"; + } + f << "debug_item::" << flag; + } } - f << "debug_item::" << flag; + f << ");\n"; + count_member_wires++; + break; + } + case WireType::ALIAS: { + // Alias of a member wire + const RTLIL::Wire *aliasee = debug_wire_type.sig_subst.as_wire(); + f << indent << "items->add(path, " << escape_cxx_string(get_hdl_name(wire)) << ", "; + dump_debug_attrs(aliasee); + f << ", "; + // If the aliasee is an outline, then the alias must be an outline, too; otherwise downstream + // tooling has no way to find out about the outline. + if (debug_wire_types[aliasee].is_outline()) + f << "debug_eval_outline"; + else + f << "debug_alias()"; + f << ", " << mangle(aliasee); + if (wire->start_offset != 0) + f << ", " << wire->start_offset; + f << ");\n"; + count_alias_wires++; + break; + } + case WireType::CONST: { + // Wire tied to a constant + f << indent << "static const value<" << wire->width << "> const_" << mangle(wire) << " = "; + dump_const(debug_wire_type.sig_subst.as_const()); + f << ";\n"; + f << indent << "items->add(path, " << escape_cxx_string(get_hdl_name(wire)) << ", "; + dump_debug_attrs(wire); + f << ", const_" << mangle(wire); + if (wire->start_offset != 0) + f << ", " << wire->start_offset; + f << ");\n"; + count_const_wires++; + break; + } + case WireType::OUTLINE: { + // Localized or inlined, but rematerializable wire + f << indent << "items->add(path, " << escape_cxx_string(get_hdl_name(wire)) << ", "; + dump_debug_attrs(wire); + f << ", debug_eval_outline, " << mangle(wire); + if (wire->start_offset != 0) + f << ", " << wire->start_offset; + f << ");\n"; + count_inline_wires++; + break; + } + default: { + // Localized or inlined wire with no debug information + count_skipped_wires++; + break; } - f << "));\n"; - count_member_wires++; - break; - } - case WireType::ALIAS: { - // Alias of a member wire - const RTLIL::Wire *aliasee = debug_wire_type.sig_subst.as_wire(); - f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(wire)); - f << ", debug_item("; - // If the aliasee is an outline, then the alias must be an outline, too; otherwise downstream - // tooling has no way to find out about the outline. - if (debug_wire_types[aliasee].is_outline()) - f << "debug_eval_outline"; - else - f << "debug_alias()"; - f << ", " << mangle(aliasee) << ", " << wire->start_offset << "));\n"; - count_alias_wires++; - break; - } - case WireType::CONST: { - // Wire tied to a constant - f << indent << "static const value<" << wire->width << "> const_" << mangle(wire) << " = "; - dump_const(debug_wire_type.sig_subst.as_const()); - f << ";\n"; - f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(wire)); - f << ", debug_item(const_" << mangle(wire) << ", " << wire->start_offset << "));\n"; - count_const_wires++; - break; - } - case WireType::OUTLINE: { - // Localized or inlined, but rematerializable wire - f << indent << "items.add(path + " << escape_cxx_string(get_hdl_name(wire)); - f << ", debug_item(debug_eval_outline, " << mangle(wire) << ", " << wire->start_offset << "));\n"; - count_inline_wires++; - break; } - default: { - // Localized or inlined wire with no debug information - count_skipped_wires++; - break; + } + if (!module->get_bool_attribute(ID(cxxrtl_blackbox))) { + for (auto &mem : mod_memories[module]) { + if (!mem.memid.isPublic()) + continue; + f << indent << "items->add(path, " << escape_cxx_string(mem.packed ? get_hdl_name(mem.cell) : get_hdl_name(mem.mem)) << ", "; + if (mem.packed) { + dump_debug_attrs(mem.cell); + } else { + dump_debug_attrs(mem.mem); + } + f << ", " << mangle(&mem) << ", "; + f << mem.start_offset << ");\n"; } } - } + dec_indent(); + f << indent << "}\n"; if (!module->get_bool_attribute(ID(cxxrtl_blackbox))) { - for (auto &mem : mod_memories[module]) { - if (!mem.memid.isPublic()) - continue; - f << indent << "items.add(path + " << escape_cxx_string(mem.packed ? get_hdl_name(mem.cell) : get_hdl_name(mem.mem)); - f << ", debug_item(" << mangle(&mem) << ", "; - f << mem.start_offset << "));\n"; - } for (auto cell : module->cells()) { if (is_internal_cell(cell->type)) continue; const char *access = is_cxxrtl_blackbox_cell(cell) ? "->" : "."; - f << indent << mangle(cell) << access << "debug_info(items, "; - f << "path + " << escape_cxx_string(get_hdl_name(cell) + ' ') << ");\n"; + f << indent << mangle(cell) << access; + f << "debug_info(items, scopes, path + " << escape_cxx_string(get_hdl_name(cell) + ' ') << ", "; + dump_debug_attrs(cell, /*serialize=*/false); + f << ");\n"; } } dec_indent(); log_debug("Debug information statistics for module `%s':\n", log_id(module)); + log_debug(" Scopes: %zu", count_scopes); log_debug(" Public wires: %zu, of which:\n", count_public_wires); log_debug(" Member wires: %zu, of which:\n", count_member_wires); log_debug(" Undriven: %zu (incl. inputs)\n", count_undriven); @@ -2190,33 +2590,6 @@ struct CxxrtlWorker { } } - void dump_metadata_map(const dict &metadata_map) - { - if (metadata_map.empty()) { - f << "metadata_map()"; - return; - } - f << "metadata_map({\n"; - inc_indent(); - for (auto metadata_item : metadata_map) { - if (!metadata_item.first.begins_with("\\")) - continue; - f << indent << "{ " << escape_cxx_string(metadata_item.first.str().substr(1)) << ", "; - if (metadata_item.second.flags & RTLIL::CONST_FLAG_REAL) { - f << std::showpoint << std::stod(metadata_item.second.decode_string()) << std::noshowpoint; - } else if (metadata_item.second.flags & RTLIL::CONST_FLAG_STRING) { - f << escape_cxx_string(metadata_item.second.decode_string()); - } else { - f << metadata_item.second.as_int(/*is_signed=*/metadata_item.second.flags & RTLIL::CONST_FLAG_SIGNED); - if (!(metadata_item.second.flags & RTLIL::CONST_FLAG_SIGNED)) - f << "u"; - } - f << " },\n"; - } - dec_indent(); - f << indent << "})"; - } - void dump_module_intf(RTLIL::Module *module) { dump_attrs(module); @@ -2234,20 +2607,27 @@ struct CxxrtlWorker { dump_reset_method(module); f << indent << "}\n"; f << "\n"; - f << indent << "bool eval() override {\n"; + // No default argument, to prevent unintentional `return bb_foo::eval();` calls that drop performer. + f << indent << "bool eval(performer *performer) override {\n"; dump_eval_method(module); f << indent << "}\n"; f << "\n"; - f << indent << "bool commit() override {\n"; + f << indent << "virtual bool commit(observer &observer) {\n"; dump_commit_method(module); f << indent << "}\n"; f << "\n"; + f << indent << "bool commit() override {\n"; + f << indent << indent << "observer observer;\n"; + f << indent << indent << "return commit(observer);\n"; + f << indent << "}\n"; if (debug_info) { - f << indent << "void debug_info(debug_items &items, std::string path = \"\") override {\n"; + f << "\n"; + f << indent << "void debug_info(debug_items *items, debug_scopes *scopes, " + << "std::string path, metadata_map &&cell_attrs = {}) override {\n"; dump_debug_info_method(module); f << indent << "}\n"; - f << "\n"; } + f << "\n"; f << indent << "static std::unique_ptr<" << mangle(module); f << template_params(module, /*is_decl=*/false) << "> "; f << "create(std::string name, metadata_map parameters, metadata_map attributes);\n"; @@ -2291,6 +2671,15 @@ struct CxxrtlWorker { f << "\n"; bool has_cells = false; for (auto cell : module->cells()) { + // Async and initial effectful cells have additional state, which requires storage. + if (is_effectful_cell(cell->type)) { + if (cell->getParam(ID::TRG_ENABLE).as_bool() && cell->getParam(ID::TRG_WIDTH).as_int() == 0) + f << indent << "value<1> " << mangle(cell) << ";\n"; // async initial cell + if (!cell->getParam(ID::TRG_ENABLE).as_bool() && cell->type == ID($print)) + f << indent << "value<" << (1 + cell->getParam(ID::ARGS_WIDTH).as_int()) << "> " << mangle(cell) << ";\n"; // {EN, ARGS} + if (!cell->getParam(ID::TRG_ENABLE).as_bool() && cell->type == ID($check)) + f << indent << "value<2> " << mangle(cell) << ";\n"; // {EN, A} + } if (is_internal_cell(cell->type)) continue; dump_attrs(cell); @@ -2319,8 +2708,18 @@ struct CxxrtlWorker { f << indent << "};\n"; f << "\n"; f << indent << "void reset() override;\n"; - f << indent << "bool eval() override;\n"; - f << indent << "bool commit() override;\n"; + f << "\n"; + f << indent << "bool eval(performer *performer = nullptr) override;\n"; + f << "\n"; + f << indent << "template\n"; + f << indent << "bool commit(ObserverT &observer) {\n"; + dump_commit_method(module); + f << indent << "}\n"; + f << "\n"; + f << indent << "bool commit() override {\n"; + f << indent << indent << "observer observer;\n"; + f << indent << indent << "return commit<>(observer);\n"; + f << indent << "}\n"; if (debug_info) { if (debug_eval) { f << "\n"; @@ -2333,7 +2732,8 @@ struct CxxrtlWorker { } } f << "\n"; - f << indent << "void debug_info(debug_items &items, std::string path = \"\") override;\n"; + f << indent << "void debug_info(debug_items *items, debug_scopes *scopes, " + << "std::string path, metadata_map &&cell_attrs = {}) override;\n"; } dec_indent(); f << indent << "}; // struct " << mangle(module) << "\n"; @@ -2349,27 +2749,24 @@ struct CxxrtlWorker { dump_reset_method(module); f << indent << "}\n"; f << "\n"; - f << indent << "bool " << mangle(module) << "::eval() {\n"; + f << indent << "bool " << mangle(module) << "::eval(performer *performer) {\n"; dump_eval_method(module); f << indent << "}\n"; - f << "\n"; - f << indent << "bool " << mangle(module) << "::commit() {\n"; - dump_commit_method(module); - f << indent << "}\n"; - f << "\n"; if (debug_info) { if (debug_eval) { + f << "\n"; f << indent << "void " << mangle(module) << "::debug_eval() {\n"; dump_debug_eval_method(module); f << indent << "}\n"; - f << "\n"; } + f << "\n"; f << indent << "CXXRTL_EXTREMELY_COLD\n"; - f << indent << "void " << mangle(module) << "::debug_info(debug_items &items, std::string path) {\n"; + f << indent << "void " << mangle(module) << "::debug_info(debug_items *items, debug_scopes *scopes, " + << "std::string path, metadata_map &&cell_attrs) {\n"; dump_debug_info_method(module); f << indent << "}\n"; - f << "\n"; } + f << "\n"; } void dump_design(RTLIL::Design *design) @@ -2409,7 +2806,7 @@ struct CxxrtlWorker { f << "#define " << include_guard << "\n"; f << "\n"; if (top_module != nullptr && debug_info) { - f << "#include \n"; + f << "#include \n"; f << "\n"; f << "#ifdef __cplusplus\n"; f << "extern \"C\" {\n"; @@ -2427,7 +2824,7 @@ struct CxxrtlWorker { } f << "#ifdef __cplusplus\n"; f << "\n"; - f << "#include \n"; + f << "#include \n"; f << "\n"; f << "using namespace cxxrtl;\n"; f << "\n"; @@ -2444,17 +2841,17 @@ struct CxxrtlWorker { } if (split_intf) - f << "#include \"" << intf_filename << "\"\n"; + f << "#include \"" << basename(intf_filename) << "\"\n"; else - f << "#include \n"; + f << "#include \n"; f << "\n"; f << "#if defined(CXXRTL_INCLUDE_CAPI_IMPL) || \\\n"; f << " defined(CXXRTL_INCLUDE_VCD_CAPI_IMPL)\n"; - f << "#include \n"; + f << "#include \n"; f << "#endif\n"; f << "\n"; f << "#if defined(CXXRTL_INCLUDE_VCD_CAPI_IMPL)\n"; - f << "#include \n"; + f << "#include \n"; f << "#endif\n"; f << "\n"; f << "using namespace cxxrtl_yosys;\n"; @@ -2601,6 +2998,16 @@ struct CxxrtlWorker { register_edge_signal(sigmap, cell->getPort(ID::CLK), cell->parameters[ID::CLK_POLARITY].as_bool() ? RTLIL::STp : RTLIL::STn); } + + // Effectful cells may be triggered on posedge/negedge events. + if (is_effectful_cell(cell->type) && cell->getParam(ID::TRG_ENABLE).as_bool()) { + for (size_t i = 0; i < (size_t)cell->getParam(ID::TRG_WIDTH).as_int(); i++) { + RTLIL::SigBit trg = cell->getPort(ID::TRG).extract(i, 1); + if (is_valid_clock(trg)) + register_edge_signal(sigmap, trg, + cell->parameters[ID::TRG_POLARITY][i] == RTLIL::S1 ? RTLIL::STp : RTLIL::STn); + } + } } for (auto &mem : memories) { @@ -2734,8 +3141,12 @@ struct CxxrtlWorker { // Discover nodes reachable from primary outputs (i.e. members) and collect reachable wire users. pool worklist; for (auto node : flow.nodes) { - if (node->type == FlowGraph::Node::Type::CELL_EVAL && is_effectful_cell(node->cell->type)) - worklist.insert(node); // node has effects + if (node->type == FlowGraph::Node::Type::CELL_EVAL && !is_internal_cell(node->cell->type)) + worklist.insert(node); // node evaluates a submodule + else if (node->type == FlowGraph::Node::Type::CELL_EVAL && is_effectful_cell(node->cell->type)) + worklist.insert(node); // node has async effects + else if (node->type == FlowGraph::Node::Type::EFFECT_SYNC) + worklist.insert(node); // node has sync effects else if (node->type == FlowGraph::Node::Type::MEM_WRPORTS) worklist.insert(node); // node is memory write else if (node->type == FlowGraph::Node::Type::PROCESS_SYNC && is_memwr_process(node->process)) @@ -2792,9 +3203,23 @@ struct CxxrtlWorker { } // Emit reachable nodes in eval(). + // Accumulate sync effectful cells per trigger condition. + dict, std::vector> effect_sync_cells; for (auto node : node_order) - if (live_nodes[node]) - schedule[module].push_back(*node); + if (live_nodes[node]) { + if (node->type == FlowGraph::Node::Type::CELL_EVAL && + is_effectful_cell(node->cell->type) && + node->cell->getParam(ID::TRG_ENABLE).as_bool() && + node->cell->getParam(ID::TRG_WIDTH).as_int() != 0) + effect_sync_cells[make_pair(node->cell->getPort(ID::TRG), node->cell->getParam(ID::TRG_POLARITY))].push_back(node->cell); + else + schedule[module].push_back(*node); + } + + for (auto &it : effect_sync_cells) { + auto node = flow.add_effect_sync_node(it.second); + schedule[module].push_back(*node); + } // For maximum performance, the state of the simulation (which is the same as the set of its double buffered // wires, since using a singly buffered wire for any kind of state introduces a race condition) should contain @@ -2838,6 +3263,7 @@ struct CxxrtlWorker { debug_wire_type = wire_type; // wire is a member if (!debug_alias) continue; + if (wire->port_input || wire->port_output) continue; // preserve input/output metadata in flags const RTLIL::Wire *it = wire; while (flow.is_inlinable(it)) { log_assert(flow.wire_comb_defs[it].size() == 1); @@ -3098,7 +3524,8 @@ struct CxxrtlBackend : public Backend { log(" value<8> p_i_data;\n"); log(" wire<8> p_o_data;\n"); log("\n"); - log(" bool eval() override;\n"); + log(" bool eval(performer *performer) override;\n"); + log(" virtual bool commit(observer &observer);\n"); log(" bool commit() override;\n"); log("\n"); log(" static std::unique_ptr\n"); @@ -3111,11 +3538,11 @@ struct CxxrtlBackend : public Backend { log(" namespace cxxrtl_design {\n"); log("\n"); log(" struct stderr_debug : public bb_p_debug {\n"); - log(" bool eval() override {\n"); + log(" bool eval(performer *performer) override {\n"); log(" if (posedge_p_clk() && p_en)\n"); log(" fprintf(stderr, \"debug: %%02x\\n\", p_i_data.data[0]);\n"); log(" p_o_data.next = p_i_data;\n"); - log(" return bb_p_debug::eval();\n"); + log(" return bb_p_debug::eval(performer);\n"); log(" }\n"); log(" };\n"); log("\n"); @@ -3213,6 +3640,11 @@ struct CxxrtlBackend : public Backend { log(" place the generated code into namespace . if not specified,\n"); log(" \"cxxrtl_design\" is used.\n"); log("\n"); + log(" -print-output \n"); + log(" $print cells in the generated code direct their output to .\n"); + log(" must be one of \"std::cout\", \"std::cerr\". if not specified,\n"); + log(" \"std::cout\" is used. explicitly provided performer overrides this.\n"); + log("\n"); log(" -nohierarchy\n"); log(" use design hierarchy as-is. in most designs, a top module should be\n"); log(" present as it is exposed through the C API and has unbuffered outputs\n"); @@ -3351,6 +3783,14 @@ struct CxxrtlBackend : public Backend { worker.design_ns = args[++argidx]; continue; } + if (args[argidx] == "-print-output" && argidx+1 < args.size()) { + worker.print_output = args[++argidx]; + if (!(worker.print_output == "std::cout" || worker.print_output == "std::cerr")) { + log_cmd_error("Invalid output stream \"%s\".\n", worker.print_output.c_str()); + worker.print_output = "std::cout"; + } + continue; + } break; } extra_args(f, filename, args, argidx); diff --git a/yosys/backends/cxxrtl/runtime/README.txt b/yosys/backends/cxxrtl/runtime/README.txt new file mode 100644 index 00000000000..9ae7051cdcc --- /dev/null +++ b/yosys/backends/cxxrtl/runtime/README.txt @@ -0,0 +1,18 @@ +This directory contains the runtime components of CXXRTL and should be placed on the include path +when building the simulation using the `-I${YOSYS}/backends/cxxrtl/runtime` option. These components +are not used in the Yosys binary; they are only built as a part of the simulation binary. + +The interfaces declared in `cxxrtl_capi*.h` contain the stable C API. These interfaces will not be +changed in backward-incompatible ways unless no other option is available, and any breaking changes +will be made in a way that causes the downstream code to fail in a visible way. The ABI of these +interfaces is considered stable as well, and it will not use features complicating its use via +libraries such as libffi or ctypes. + +The implementations in `cxxrtl_capi*.cc` are considered private; they are still placed in the include +path to enable build-system-less builds (where the CXXRTL runtime component is included in the C++ +file of the simulation toplevel). + +The interfaces declared in `cxxrtl*.h` (without `capi`) are unstable and may change without notice. + +For clarity, all of the files in this directory and its subdirectories have unique names regardless +of the directory where they are placed. \ No newline at end of file diff --git a/yosys/backends/cxxrtl/cxxrtl_capi.cc b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc similarity index 58% rename from yosys/backends/cxxrtl/cxxrtl_capi.cc rename to yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc index 227173ba87f..34801c2d118 100644 --- a/yosys/backends/cxxrtl/cxxrtl_capi.cc +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc @@ -16,10 +16,10 @@ * */ -// This file is a part of the CXXRTL C API. It should be used together with `cxxrtl_capi.h`. +// This file is a part of the CXXRTL C API. It should be used together with `cxxrtl/capi/cxxrtl_capi.h`. -#include -#include +#include +#include struct _cxxrtl_handle { std::unique_ptr module; @@ -35,19 +35,19 @@ cxxrtl_handle cxxrtl_create(cxxrtl_toplevel design) { return cxxrtl_create_at(design, ""); } -cxxrtl_handle cxxrtl_create_at(cxxrtl_toplevel design, const char *root) { - std::string path = root; - if (!path.empty()) { +cxxrtl_handle cxxrtl_create_at(cxxrtl_toplevel design, const char *top_path_) { + std::string top_path = top_path_; + if (!top_path.empty()) { // module::debug_info() accepts either an empty path, or a path ending in space to simplify // the logic in generated code. While this is sketchy at best to expose in the C++ API, this // would be a lot worse in the C API, so don't expose it here. - assert(path.back() != ' '); - path += ' '; + assert(top_path.back() != ' '); + top_path += ' '; } cxxrtl_handle handle = new _cxxrtl_handle; handle->module = std::move(design->module); - handle->module->debug_info(handle->objects, path); + handle->module->debug_info(&handle->objects, nullptr, top_path); delete design; return handle; } @@ -90,3 +90,46 @@ void cxxrtl_enum(cxxrtl_handle handle, void *data, void cxxrtl_outline_eval(cxxrtl_outline outline) { outline->eval(); } + +int cxxrtl_attr_type(cxxrtl_attr_set attrs_, const char *name) { + auto attrs = (cxxrtl::metadata_map*)attrs_; + if (!attrs->count(name)) + return CXXRTL_ATTR_NONE; + switch (attrs->at(name).value_type) { + case cxxrtl::metadata::UINT: + return CXXRTL_ATTR_UNSIGNED_INT; + case cxxrtl::metadata::SINT: + return CXXRTL_ATTR_SIGNED_INT; + case cxxrtl::metadata::STRING: + return CXXRTL_ATTR_STRING; + case cxxrtl::metadata::DOUBLE: + return CXXRTL_ATTR_DOUBLE; + default: + // Present unsupported attribute type the same way as no attribute at all. + return CXXRTL_ATTR_NONE; + } +} + +uint64_t cxxrtl_attr_get_unsigned_int(cxxrtl_attr_set attrs_, const char *name) { + auto &attrs = *(cxxrtl::metadata_map*)attrs_; + assert(attrs.count(name) && attrs.at(name).value_type == cxxrtl::metadata::UINT); + return attrs[name].as_uint(); +} + +int64_t cxxrtl_attr_get_signed_int(cxxrtl_attr_set attrs_, const char *name) { + auto &attrs = *(cxxrtl::metadata_map*)attrs_; + assert(attrs.count(name) && attrs.at(name).value_type == cxxrtl::metadata::SINT); + return attrs[name].as_sint(); +} + +const char *cxxrtl_attr_get_string(cxxrtl_attr_set attrs_, const char *name) { + auto &attrs = *(cxxrtl::metadata_map*)attrs_; + assert(attrs.count(name) && attrs.at(name).value_type == cxxrtl::metadata::STRING); + return attrs[name].as_string().c_str(); +} + +double cxxrtl_attr_get_double(cxxrtl_attr_set attrs_, const char *name) { + auto &attrs = *(cxxrtl::metadata_map*)attrs_; + assert(attrs.count(name) && attrs.at(name).value_type == cxxrtl::metadata::DOUBLE); + return attrs[name].as_double(); +} diff --git a/yosys/backends/cxxrtl/cxxrtl_capi.h b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h similarity index 80% rename from yosys/backends/cxxrtl/cxxrtl_capi.h rename to yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h index 2df2b7287f4..ae42733ad7f 100644 --- a/yosys/backends/cxxrtl/cxxrtl_capi.h +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h @@ -55,8 +55,8 @@ cxxrtl_handle cxxrtl_create(cxxrtl_toplevel design); // Create a design handle at a given hierarchy position from a design toplevel. // // This operation is similar to `cxxrtl_create`, except the full hierarchical name of every object -// is prepended with `root`. -cxxrtl_handle cxxrtl_create_at(cxxrtl_toplevel design, const char *root); +// is prepended with `top_path`. +cxxrtl_handle cxxrtl_create_at(cxxrtl_toplevel design, const char *top_path); // Release all resources used by a design and its handle. void cxxrtl_destroy(cxxrtl_handle handle); @@ -240,6 +240,11 @@ struct cxxrtl_object { // through wires, the bits are double buffered. To avoid race conditions, user code should // always read from `curr` and write to `next`. The `curr` pointer is always valid; for objects // that cannot be modified, or cannot be modified in a race-free way, `next` is NULL. + // + // In case where `width == 0`, `curr` is a non-NULL pointer unique for the wire. That is, + // there is a 1-to-1 correspondence between simulation objects and `curr` pointers, regardless + // of whether they have storage or not. (Aliases' `curr` pointer equals that of some other + // simulated object.) uint32_t *curr; uint32_t *next; @@ -249,6 +254,15 @@ struct cxxrtl_object { // this field to NULL. struct _cxxrtl_outline *outline; + // Opaque reference to an attribute set. + // + // See the documentation of `cxxrtl_attr_set` for details. When creating a `cxxrtl_object`, set + // this field to NULL. + // + // The lifetime of the pointers returned by `cxxrtl_attr_*` family of functions is the same as + // the lifetime of this structure. + struct _cxxrtl_attr_set *attrs; + // More description fields may be added in the future, but the existing ones will never change. }; @@ -304,6 +318,62 @@ typedef struct _cxxrtl_outline *cxxrtl_outline; // re-evaluated, otherwise the bits read from that object are meaningless. void cxxrtl_outline_eval(cxxrtl_outline outline); +// Opaque reference to an attribute set. +// +// An attribute set is a map between attribute names (always strings) and values (which may have +// several different types). To find out the type of an attribute, use `cxxrtl_attr_type`, and +// to retrieve the value of an attribute, use `cxxrtl_attr_as_string`. +typedef struct _cxxrtl_attr_set *cxxrtl_attr_set; + +// Type of an attribute. +enum cxxrtl_attr_type { + // Attribute is not present. + CXXRTL_ATTR_NONE = 0, + + // Attribute has an unsigned integer value. + CXXRTL_ATTR_UNSIGNED_INT = 1, + + // Attribute has an unsigned integer value. + CXXRTL_ATTR_SIGNED_INT = 2, + + // Attribute has a string value. + CXXRTL_ATTR_STRING = 3, + + // Attribute has a double precision floating point value. + CXXRTL_ATTR_DOUBLE = 4, + + // More attribute types may be defined in the future, but the existing values will never change. +}; + +// Determine the presence and type of an attribute in an attribute set. +// +// This function returns one of the possible `cxxrtl_attr_type` values. +int cxxrtl_attr_type(cxxrtl_attr_set attrs, const char *name); + +// Retrieve an unsigned integer valued attribute from an attribute set. +// +// This function asserts that `cxxrtl_attr_type(attrs, name) == CXXRTL_ATTR_UNSIGNED_INT`. +// If assertions are disabled, returns 0 if the attribute is missing or has an incorrect type. +uint64_t cxxrtl_attr_get_unsigned_int(cxxrtl_attr_set attrs, const char *name); + +// Retrieve a signed integer valued attribute from an attribute set. +// +// This function asserts that `cxxrtl_attr_type(attrs, name) == CXXRTL_ATTR_SIGNED_INT`. +// If assertions are disabled, returns 0 if the attribute is missing or has an incorrect type. +int64_t cxxrtl_attr_get_signed_int(cxxrtl_attr_set attrs, const char *name); + +// Retrieve a string valued attribute from an attribute set. The returned string is zero-terminated. +// +// This function asserts that `cxxrtl_attr_type(attrs, name) == CXXRTL_ATTR_STRING`. If assertions +// are disabled, returns NULL if the attribute is missing or has an incorrect type. +const char *cxxrtl_attr_get_string(cxxrtl_attr_set attrs, const char *name); + +// Retrieve a double precision floating point valued attribute from an attribute set. +// +// This function asserts that `cxxrtl_attr_type(attrs, name) == CXXRTL_ATTR_DOUBLE`. If assertions +// are disabled, returns NULL if the attribute is missing or has an incorrect type. +double cxxrtl_attr_get_double(cxxrtl_attr_set attrs, const char *name); + #ifdef __cplusplus } #endif diff --git a/yosys/backends/cxxrtl/cxxrtl_vcd_capi.cc b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc similarity index 95% rename from yosys/backends/cxxrtl/cxxrtl_vcd_capi.cc rename to yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc index 52a9198b869..0949a9363eb 100644 --- a/yosys/backends/cxxrtl/cxxrtl_vcd_capi.cc +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc @@ -16,10 +16,10 @@ * */ -// This file is a part of the CXXRTL C API. It should be used together with `cxxrtl_vcd_capi.h`. +// This file is a part of the CXXRTL C API. It should be used together with `cxxrtl/capi/cxxrtl_capi_vcd.h`. -#include -#include +#include +#include extern const cxxrtl::debug_items &cxxrtl_debug_items_from_handle(cxxrtl_handle handle); diff --git a/yosys/backends/cxxrtl/cxxrtl_vcd_capi.h b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h similarity index 97% rename from yosys/backends/cxxrtl/cxxrtl_vcd_capi.h rename to yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h index d55afe2230e..844f3cb8c83 100644 --- a/yosys/backends/cxxrtl/cxxrtl_vcd_capi.h +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h @@ -16,8 +16,8 @@ * */ -#ifndef CXXRTL_VCD_CAPI_H -#define CXXRTL_VCD_CAPI_H +#ifndef CXXRTL_CAPI_VCD_H +#define CXXRTL_CAPI_VCD_H // This file is a part of the CXXRTL C API. It should be used together with `cxxrtl_vcd_capi.cc`. // @@ -27,7 +27,7 @@ #include #include -#include +#include #ifdef __cplusplus extern "C" { diff --git a/yosys/backends/cxxrtl/cxxrtl.h b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h similarity index 71% rename from yosys/backends/cxxrtl/cxxrtl.h rename to yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h index 5d0596f0d61..d1d6bd8dc68 100644 --- a/yosys/backends/cxxrtl/cxxrtl.h +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h @@ -28,6 +28,7 @@ #include #include +#include #include #include #include @@ -38,8 +39,10 @@ #include #include #include +#include -#include +// `cxxrtl::debug_item` has to inherit from `cxxrtl_object` to satisfy strict aliasing requirements. +#include #ifndef __has_attribute # define __has_attribute(x) 0 @@ -144,7 +147,7 @@ struct value : public expr_base> { // These functions ensure that a conversion is never out of range, and should be always used, if at all // possible, instead of direct manipulation of the `data` member. For very large types, .slice() and // .concat() can be used to split them into more manageable parts. - template + template::value, int>::type = 0> CXXRTL_ALWAYS_INLINE IntegerT get() const { static_assert(std::numeric_limits::is_integer && !std::numeric_limits::is_signed, @@ -157,15 +160,32 @@ struct value : public expr_base> { return result; } - template + template::value, int>::type = 0> CXXRTL_ALWAYS_INLINE - void set(IntegerT other) { + IntegerT get() const { + auto unsigned_result = get::type>(); + IntegerT result; + memcpy(&result, &unsigned_result, sizeof(IntegerT)); + return result; + } + + template::value, int>::type = 0> + CXXRTL_ALWAYS_INLINE + void set(IntegerT value) { static_assert(std::numeric_limits::is_integer && !std::numeric_limits::is_signed, "set() requires T to be an unsigned integral type"); static_assert(std::numeric_limits::digits >= Bits, "set() requires the value to be at least as wide as T is"); for (size_t n = 0; n < chunks; n++) - data[n] = (other >> (n * chunk::bits)) & chunk::mask; + data[n] = (value >> (n * chunk::bits)) & chunk::mask; + } + + template::value, int>::type = 0> + CXXRTL_ALWAYS_INLINE + void set(IntegerT value) { + typename std::make_unsigned::type unsigned_value; + memcpy(&unsigned_value, &value, sizeof(IntegerT)); + set(unsigned_value); } // Operations with compile-time parameters. @@ -418,6 +438,7 @@ struct value : public expr_base> { carry = (shift_bits == 0) ? 0 : data[n] >> (chunk::bits - shift_bits); } + result.data[result.chunks - 1] &= result.msb_mask; return result; } @@ -428,12 +449,12 @@ struct value : public expr_base> { // Detect shifts definitely large than Bits early. for (size_t n = 1; n < amount.chunks; n++) if (amount.data[n] != 0) - return {}; + return (Signed && is_neg()) ? value().bit_not() : value(); // Past this point we can use the least significant chunk as the shift size. size_t shift_chunks = amount.data[0] / chunk::bits; size_t shift_bits = amount.data[0] % chunk::bits; if (shift_chunks >= chunks) - return {}; + return (Signed && is_neg()) ? value().bit_not() : value(); value result; chunk::type carry = 0; for (size_t n = 0; n < chunks - shift_chunks; n++) { @@ -442,12 +463,13 @@ struct value : public expr_base> { : data[chunks - 1 - n] << (chunk::bits - shift_bits); } if (Signed && is_neg()) { - size_t top_chunk_idx = (Bits - shift_bits) / chunk::bits; - size_t top_chunk_bits = (Bits - shift_bits) % chunk::bits; + size_t top_chunk_idx = amount.data[0] > Bits ? 0 : (Bits - amount.data[0]) / chunk::bits; + size_t top_chunk_bits = amount.data[0] > Bits ? 0 : (Bits - amount.data[0]) % chunk::bits; for (size_t n = top_chunk_idx + 1; n < chunks; n++) result.data[n] = chunk::mask; - if (shift_bits != 0) + if (amount.data[0] != 0) result.data[top_chunk_idx] |= chunk::mask << top_chunk_bits; + result.data[result.chunks - 1] &= result.msb_mask; } return result; } @@ -472,6 +494,7 @@ struct value : public expr_base> { carry = (shift_bits == 0) ? 0 : data[result.chunks + shift_chunks - 1 - n] << (chunk::bits - shift_bits); } + result.data[result.chunks - 1] &= result.msb_mask; return result; } @@ -507,12 +530,14 @@ struct value : public expr_base> { size_t count = 0; for (size_t n = 0; n < chunks; n++) { chunk::type x = data[chunks - 1 - n]; - if (x == 0) { - count += (n == 0 ? Bits % chunk::bits : chunk::bits); - } else { - // This loop implements the find first set idiom as recognized by LLVM. - for (; x != 0; count++) + // First add to `count` as if the chunk is zero + constexpr size_t msb_chunk_bits = Bits % chunk::bits != 0 ? Bits % chunk::bits : chunk::bits; + count += (n == 0 ? msb_chunk_bits : chunk::bits); + // If the chunk isn't zero, correct the `count` value and return + if (x != 0) { + for (; x != 0; count--) x >>= 1; + break; } } return count; @@ -541,7 +566,7 @@ struct value : public expr_base> { } value neg() const { - return value { 0u }.sub(*this); + return value().sub(*this); } bool ucmp(const value &other) const { @@ -575,6 +600,38 @@ struct value : public expr_base> { result.data[result.chunks - 1] &= result.msb_mask; return result; } + + std::pair, value> udivmod(value divisor) const { + value quotient; + value dividend = *this; + if (dividend.ucmp(divisor)) + return {/*quotient=*/value{0u}, /*remainder=*/dividend}; + int64_t divisor_shift = divisor.ctlz() - dividend.ctlz(); + assert(divisor_shift >= 0); + divisor = divisor.shl(value{(chunk::type) divisor_shift}); + for (size_t step = 0; step <= divisor_shift; step++) { + quotient = quotient.shl(value{1u}); + if (!dividend.ucmp(divisor)) { + dividend = dividend.sub(divisor); + quotient.set_bit(0, true); + } + divisor = divisor.shr(value{1u}); + } + return {quotient, /*remainder=*/dividend}; + } + + std::pair, value> sdivmod(const value &other) const { + value quotient; + value remainder; + value dividend = sext(); + value divisor = other.template sext(); + if (is_neg()) dividend = dividend.neg(); + if (other.is_neg()) divisor = divisor.neg(); + std::tie(quotient, remainder) = dividend.udivmod(divisor); + if (is_neg() != other.is_neg()) quotient = quotient.neg(); + if (is_neg()) remainder = remainder.neg(); + return {quotient.template trunc(), remainder.template trunc()}; + } }; // Expression template for a slice, usable as lvalue or rvalue, and composable with other expression templates here. @@ -741,8 +798,13 @@ struct wire { next.template set(other); } - bool commit() { + // This method intentionally takes a mandatory argument (to make it more difficult to misuse in + // black box implementations, leading to missed observer events). It is generic over its argument + // to allow the `on_update` method to be non-virtual. + template + bool commit(ObserverT &observer) { if (curr != next) { + observer.on_update(curr.chunks, curr.data, next.data); curr = next; return true; } @@ -816,12 +878,17 @@ struct memory { write { index, val, mask, priority }); } - bool commit() { + // See the note for `wire::commit()`. + template + bool commit(ObserverT &observer) { bool changed = false; for (const write &entry : write_queue) { value elem = data[entry.index]; elem = elem.update(entry.val, entry.mask); - changed |= (data[entry.index] != elem); + if (data[entry.index] != elem) { + observer.on_update(value::chunks, data[0].data, elem.data, entry.index); + changed |= true; + } data[entry.index] = elem; } write_queue.clear(); @@ -840,14 +907,14 @@ struct metadata { // In debug mode, using the wrong .as_*() function will assert. // In release mode, using the wrong .as_*() function will safely return a default value. - const unsigned uint_value = 0; - const signed sint_value = 0; + const uint64_t uint_value = 0; + const int64_t sint_value = 0; const std::string string_value = ""; const double double_value = 0.0; metadata() : value_type(MISSING) {} - metadata(unsigned value) : value_type(UINT), uint_value(value) {} - metadata(signed value) : value_type(SINT), sint_value(value) {} + metadata(uint64_t value) : value_type(UINT), uint_value(value) {} + metadata(int64_t value) : value_type(SINT), sint_value(value) {} metadata(const std::string &value) : value_type(STRING), string_value(value) {} metadata(const char *value) : value_type(STRING), string_value(value) {} metadata(double value) : value_type(DOUBLE), double_value(value) {} @@ -855,12 +922,12 @@ struct metadata { metadata(const metadata &) = default; metadata &operator=(const metadata &) = delete; - unsigned as_uint() const { + uint64_t as_uint() const { assert(value_type == UINT); return uint_value; } - signed as_sint() const { + int64_t as_sint() const { assert(value_type == SINT); return sint_value; } @@ -874,10 +941,322 @@ struct metadata { assert(value_type == DOUBLE); return double_value; } + + // Internal CXXRTL use only. + static std::map deserialize(const char *ptr) { + std::map result; + std::string name; + // Grammar: + // string ::= [^\0]+ \0 + // metadata ::= [uid] .{8} | s + // map ::= ( )* \0 + for (;;) { + if (*ptr) { + name += *ptr++; + } else if (!name.empty()) { + ptr++; + auto get_u64 = [&]() { + uint64_t result = 0; + for (size_t count = 0; count < 8; count++) + result = (result << 8) | *ptr++; + return result; + }; + char type = *ptr++; + if (type == 'u') { + uint64_t value = get_u64(); + result.emplace(name, value); + } else if (type == 'i') { + int64_t value = (int64_t)get_u64(); + result.emplace(name, value); + } else if (type == 'd') { + double dvalue; + uint64_t uvalue = get_u64(); + static_assert(sizeof(dvalue) == sizeof(uvalue), "double must be 64 bits in size"); + memcpy(&dvalue, &uvalue, sizeof(dvalue)); + result.emplace(name, dvalue); + } else if (type == 's') { + std::string value; + while (*ptr) + value += *ptr++; + ptr++; + result.emplace(name, value); + } else { + assert(false && "Unknown type specifier"); + return result; + } + name.clear(); + } else { + return result; + } + } + } }; typedef std::map metadata_map; +struct performer; + +// An object that allows formatting a string lazily. +struct lazy_fmt { + virtual std::string operator() () const = 0; +}; + +// Flavor of a `$check` cell. +enum class flavor { + // Corresponds to a `$assert` cell in other flows, and a Verilog `assert ()` statement. + ASSERT, + // Corresponds to a `$assume` cell in other flows, and a Verilog `assume ()` statement. + ASSUME, + // Corresponds to a `$live` cell in other flows, and a Verilog `assert (eventually)` statement. + ASSERT_EVENTUALLY, + // Corresponds to a `$fair` cell in other flows, and a Verilog `assume (eventually)` statement. + ASSUME_EVENTUALLY, + // Corresponds to a `$cover` cell in other flows, and a Verilog `cover ()` statement. + COVER, +}; + +// An object that can be passed to a `eval()` method in order to act on side effects. The default behavior implemented +// below is the same as the behavior of `eval(nullptr)`, except that `-print-output` option of `write_cxxrtl` is not +// taken into account. +struct performer { + // Called by generated formatting code to evaluate a Verilog `$time` expression. + virtual int64_t vlog_time() const { return 0; } + + // Called by generated formatting code to evaluate a Verilog `$realtime` expression. + virtual double vlog_realtime() const { return vlog_time(); } + + // Called when a `$print` cell is triggered. + virtual void on_print(const lazy_fmt &formatter, const metadata_map &attributes) { + std::cout << formatter(); + } + + // Called when a `$check` cell is triggered. + virtual void on_check(flavor type, bool condition, const lazy_fmt &formatter, const metadata_map &attributes) { + if (type == flavor::ASSERT || type == flavor::ASSUME) { + if (!condition) + std::cerr << formatter(); + CXXRTL_ASSERT(condition && "Check failed"); + } + } +}; + +// An object that can be passed to a `commit()` method in order to produce a replay log of every state change in +// the simulation. Unlike `performer`, `observer` does not use virtual calls as their overhead is unacceptable, and +// a comparatively heavyweight template-based solution is justified. +struct observer { + // Called when the `commit()` method for a wire is about to update the `chunks` chunks at `base` with `chunks` chunks + // at `value` that have a different bit pattern. It is guaranteed that `chunks` is equal to the wire chunk count and + // `base` points to the first chunk. + void on_update(size_t chunks, const chunk_t *base, const chunk_t *value) {} + + // Called when the `commit()` method for a memory is about to update the `chunks` chunks at `&base[chunks * index]` + // with `chunks` chunks at `value` that have a different bit pattern. It is guaranteed that `chunks` is equal to + // the memory element chunk count and `base` points to the first chunk of the first element of the memory. + void on_update(size_t chunks, const chunk_t *base, const chunk_t *value, size_t index) {} +}; + +// Must be kept in sync with `struct FmtPart` in kernel/fmt.h! +// Default member initializers would make this a non-aggregate-type in C++11, so they are commented out. +struct fmt_part { + enum { + LITERAL = 0, + INTEGER = 1, + STRING = 2, + UNICHAR = 3, + VLOG_TIME = 4, + } type; + + // LITERAL type + std::string str; + + // INTEGER/STRING/UNICHAR types + // + value val; + + // INTEGER/STRING/VLOG_TIME types + enum { + RIGHT = 0, + LEFT = 1, + NUMERIC = 2, + } justify; // = RIGHT; + char padding; // = '\0'; + size_t width; // = 0; + + // INTEGER type + unsigned base; // = 10; + bool signed_; // = false; + enum { + MINUS = 0, + PLUS_MINUS = 1, + SPACE_MINUS = 2, + } sign; // = MINUS; + bool hex_upper; // = false; + bool show_base; // = false; + bool group; // = false; + + // VLOG_TIME type + bool realtime; // = false; + // + int64_t itime; + // + double ftime; + + // Format the part as a string. + // + // The values of `vlog_time` and `vlog_realtime` are used for Verilog `$time` and `$realtime`, correspondingly. + template + std::string render(value val, performer *performer = nullptr) + { + // We might want to replace some of these bit() calls with direct + // chunk access if it turns out to be slow enough to matter. + std::string buf; + std::string prefix; + switch (type) { + case LITERAL: + return str; + + case STRING: { + buf.reserve(Bits/8); + for (int i = 0; i < Bits; i += 8) { + char ch = 0; + for (int j = 0; j < 8 && i + j < int(Bits); j++) + if (val.bit(i + j)) + ch |= 1 << j; + if (ch != 0) + buf.append({ch}); + } + std::reverse(buf.begin(), buf.end()); + break; + } + + case UNICHAR: { + uint32_t codepoint = val.template get(); + if (codepoint >= 0x10000) + buf += (char)(0xf0 | (codepoint >> 18)); + else if (codepoint >= 0x800) + buf += (char)(0xe0 | (codepoint >> 12)); + else if (codepoint >= 0x80) + buf += (char)(0xc0 | (codepoint >> 6)); + else + buf += (char)codepoint; + if (codepoint >= 0x10000) + buf += (char)(0x80 | ((codepoint >> 12) & 0x3f)); + if (codepoint >= 0x800) + buf += (char)(0x80 | ((codepoint >> 6) & 0x3f)); + if (codepoint >= 0x80) + buf += (char)(0x80 | ((codepoint >> 0) & 0x3f)); + break; + } + + case INTEGER: { + bool negative = signed_ && val.is_neg(); + if (negative) { + prefix = "-"; + val = val.neg(); + } else { + switch (sign) { + case MINUS: break; + case PLUS_MINUS: prefix = "+"; break; + case SPACE_MINUS: prefix = " "; break; + } + } + + size_t val_width = Bits; + if (base != 10) { + val_width = 1; + for (size_t index = 0; index < Bits; index++) + if (val.bit(index)) + val_width = index + 1; + } + + if (base == 2) { + if (show_base) + prefix += "0b"; + for (size_t index = 0; index < val_width; index++) { + if (group && index > 0 && index % 4 == 0) + buf += '_'; + buf += (val.bit(index) ? '1' : '0'); + } + } else if (base == 8 || base == 16) { + if (show_base) + prefix += (base == 16) ? (hex_upper ? "0X" : "0x") : "0o"; + size_t step = (base == 16) ? 4 : 3; + for (size_t index = 0; index < val_width; index += step) { + if (group && index > 0 && index % (4 * step) == 0) + buf += '_'; + uint8_t value = val.bit(index) | (val.bit(index + 1) << 1) | (val.bit(index + 2) << 2); + if (step == 4) + value |= val.bit(index + 3) << 3; + buf += (hex_upper ? "0123456789ABCDEF" : "0123456789abcdef")[value]; + } + } else if (base == 10) { + if (show_base) + prefix += "0d"; + if (val.is_zero()) + buf += '0'; + value<(Bits > 4 ? Bits : 4)> xval = val.template zext<(Bits > 4 ? Bits : 4)>(); + size_t index = 0; + while (!xval.is_zero()) { + if (group && index > 0 && index % 3 == 0) + buf += '_'; + value<(Bits > 4 ? Bits : 4)> quotient, remainder; + if (Bits >= 4) + std::tie(quotient, remainder) = xval.udivmod(value<(Bits > 4 ? Bits : 4)>{10u}); + else + std::tie(quotient, remainder) = std::make_pair(value<(Bits > 4 ? Bits : 4)>{0u}, xval); + buf += '0' + remainder.template trunc<4>().template get(); + xval = quotient; + index++; + } + } else assert(false && "Unsupported base for fmt_part"); + if (justify == NUMERIC && group && padding == '0') { + int group_size = base == 10 ? 3 : 4; + while (prefix.size() + buf.size() < width) { + if (buf.size() % (group_size + 1) == group_size) + buf += '_'; + buf += '0'; + } + } + std::reverse(buf.begin(), buf.end()); + break; + } + + case VLOG_TIME: { + if (performer) { + buf = realtime ? std::to_string(performer->vlog_realtime()) : std::to_string(performer->vlog_time()); + } else { + buf = realtime ? std::to_string(0.0) : std::to_string(0); + } + break; + } + } + + std::string str; + assert(width == 0 || padding != '\0'); + if (prefix.size() + buf.size() < width) { + size_t pad_width = width - prefix.size() - buf.size(); + switch (justify) { + case LEFT: + str += prefix; + str += buf; + str += std::string(pad_width, padding); + break; + case RIGHT: + str += std::string(pad_width, padding); + str += prefix; + str += buf; + break; + case NUMERIC: + str += prefix; + str += std::string(pad_width, padding); + str += buf; + break; + } + } else { + str += prefix; + str += buf; + } + return str; + } +}; + // Tag class to disambiguate values/wires and their aliases. struct debug_alias {}; @@ -889,6 +1268,9 @@ using debug_outline = ::_cxxrtl_outline; // // To avoid violating strict aliasing rules, this structure has to be a subclass of the one used // in the C API, or it would not be possible to cast between the pointers to these. +// +// The `attrs` member cannot be owned by this structure because a `cxxrtl_object` can be created +// from external C code. struct debug_item : ::cxxrtl_object { // Object types. enum : uint32_t { @@ -913,7 +1295,7 @@ struct debug_item : ::cxxrtl_object { template debug_item(value &item, size_t lsb_offset = 0, uint32_t flags_ = 0) { - static_assert(sizeof(item) == value::chunks * sizeof(chunk_t), + static_assert(Bits == 0 || sizeof(item) == value::chunks * sizeof(chunk_t), "value is not compatible with C layout"); type = VALUE; flags = flags_; @@ -924,11 +1306,12 @@ struct debug_item : ::cxxrtl_object { curr = item.data; next = item.data; outline = nullptr; + attrs = nullptr; } template debug_item(const value &item, size_t lsb_offset = 0) { - static_assert(sizeof(item) == value::chunks * sizeof(chunk_t), + static_assert(Bits == 0 || sizeof(item) == value::chunks * sizeof(chunk_t), "value is not compatible with C layout"); type = VALUE; flags = DRIVEN_COMB; @@ -939,12 +1322,14 @@ struct debug_item : ::cxxrtl_object { curr = const_cast(item.data); next = nullptr; outline = nullptr; + attrs = nullptr; } template debug_item(wire &item, size_t lsb_offset = 0, uint32_t flags_ = 0) { - static_assert(sizeof(item.curr) == value::chunks * sizeof(chunk_t) && - sizeof(item.next) == value::chunks * sizeof(chunk_t), + static_assert(Bits == 0 || + (sizeof(item.curr) == value::chunks * sizeof(chunk_t) && + sizeof(item.next) == value::chunks * sizeof(chunk_t)), "wire is not compatible with C layout"); type = WIRE; flags = flags_; @@ -955,11 +1340,12 @@ struct debug_item : ::cxxrtl_object { curr = item.curr.data; next = item.next.data; outline = nullptr; + attrs = nullptr; } template debug_item(memory &item, size_t zero_offset = 0) { - static_assert(sizeof(item.data[0]) == value::chunks * sizeof(chunk_t), + static_assert(Width == 0 || sizeof(item.data[0]) == value::chunks * sizeof(chunk_t), "memory is not compatible with C layout"); type = MEMORY; flags = 0; @@ -970,11 +1356,12 @@ struct debug_item : ::cxxrtl_object { curr = item.data ? item.data[0].data : nullptr; next = nullptr; outline = nullptr; + attrs = nullptr; } template debug_item(debug_alias, const value &item, size_t lsb_offset = 0) { - static_assert(sizeof(item) == value::chunks * sizeof(chunk_t), + static_assert(Bits == 0 || sizeof(item) == value::chunks * sizeof(chunk_t), "value is not compatible with C layout"); type = ALIAS; flags = DRIVEN_COMB; @@ -985,12 +1372,14 @@ struct debug_item : ::cxxrtl_object { curr = const_cast(item.data); next = nullptr; outline = nullptr; + attrs = nullptr; } template debug_item(debug_alias, const wire &item, size_t lsb_offset = 0) { - static_assert(sizeof(item.curr) == value::chunks * sizeof(chunk_t) && - sizeof(item.next) == value::chunks * sizeof(chunk_t), + static_assert(Bits == 0 || + (sizeof(item.curr) == value::chunks * sizeof(chunk_t) && + sizeof(item.next) == value::chunks * sizeof(chunk_t)), "wire is not compatible with C layout"); type = ALIAS; flags = DRIVEN_COMB; @@ -1001,11 +1390,12 @@ struct debug_item : ::cxxrtl_object { curr = const_cast(item.curr.data); next = nullptr; outline = nullptr; + attrs = nullptr; } template debug_item(debug_outline &group, const value &item, size_t lsb_offset = 0) { - static_assert(sizeof(item) == value::chunks * sizeof(chunk_t), + static_assert(Bits == 0 || sizeof(item) == value::chunks * sizeof(chunk_t), "value is not compatible with C layout"); type = OUTLINE; flags = DRIVEN_COMB; @@ -1016,6 +1406,7 @@ struct debug_item : ::cxxrtl_object { curr = const_cast(item.data); next = nullptr; outline = &group; + attrs = nullptr; } template @@ -1036,11 +1427,38 @@ struct debug_item : ::cxxrtl_object { }; static_assert(std::is_standard_layout::value, "debug_item is not compatible with C layout"); +} // namespace cxxrtl + +typedef struct _cxxrtl_attr_set { + cxxrtl::metadata_map map; +} *cxxrtl_attr_set; + +namespace cxxrtl { + +// Representation of an attribute set in the C++ interface. +using debug_attrs = ::_cxxrtl_attr_set; + struct debug_items { + // Debug items may be composed of multiple parts, but the attributes are shared between all of them. + // There are additional invariants, not all of which are not checked by this code: + // - Memories and non-memories cannot be mixed together. + // - Bit indices (considering `lsb_at` and `width`) must not overlap. + // - Row indices (considering `depth` and `zero_at`) must be the same. + // - The `INPUT` and `OUTPUT` flags must be the same for all parts. + // Other than that, the parts can be quite different, e.g. it is OK to mix a value, a wire, an alias, + // and an outline, in the debug information for a single name in four parts. std::map> table; - - void add(const std::string &name, debug_item &&item) { - std::vector &parts = table[name]; + std::map> attrs_table; + + void add(const std::string &path, debug_item &&item, metadata_map &&item_attrs = {}) { + assert((path.empty() || path[path.size() - 1] != ' ') && path.find(" ") == std::string::npos); + std::unique_ptr &attrs = attrs_table[path]; + if (attrs.get() == nullptr) + attrs = std::unique_ptr(new debug_attrs); + for (auto attr : item_attrs) + attrs->map.insert(attr); + item.attrs = attrs.get(); + std::vector &parts = table[path]; parts.emplace_back(item); std::sort(parts.begin(), parts.end(), [](const debug_item &a, const debug_item &b) { @@ -1048,31 +1466,82 @@ struct debug_items { }); } - size_t count(const std::string &name) const { - if (table.count(name) == 0) + // This overload exists to reduce excessive stack slot allocation in `CXXRTL_EXTREMELY_COLD void debug_info()`. + template + void add(const std::string &base_path, const char *path, const char *serialized_item_attrs, T&&... args) { + add(base_path + path, debug_item(std::forward(args)...), metadata::deserialize(serialized_item_attrs)); + } + + size_t count(const std::string &path) const { + if (table.count(path) == 0) return 0; - return table.at(name).size(); + return table.at(path).size(); } - const std::vector &parts_at(const std::string &name) const { - return table.at(name); + const std::vector &at(const std::string &path) const { + return table.at(path); } - const debug_item &at(const std::string &name) const { - const std::vector &parts = table.at(name); + // Like `at()`, but operates only on single-part debug items. + const debug_item &operator [](const std::string &path) const { + const std::vector &parts = table.at(path); assert(parts.size() == 1); return parts.at(0); } - const debug_item &operator [](const std::string &name) const { - return at(name); + bool is_memory(const std::string &path) const { + return at(path).at(0).type == debug_item::MEMORY; + } + + const metadata_map &attrs(const std::string &path) const { + return attrs_table.at(path)->map; } }; -// Tag class to disambiguate the default constructor used by the toplevel module that calls reset(), +// Only `module` scopes are defined. The type is implicit, since Yosys does not currently support +// any other scope types. +struct debug_scope { + std::string module_name; + std::unique_ptr module_attrs; + std::unique_ptr cell_attrs; +}; + +struct debug_scopes { + std::map table; + + void add(const std::string &path, const std::string &module_name, metadata_map &&module_attrs, metadata_map &&cell_attrs) { + assert((path.empty() || path[path.size() - 1] != ' ') && path.find(" ") == std::string::npos); + assert(table.count(path) == 0); + debug_scope &scope = table[path]; + scope.module_name = module_name; + scope.module_attrs = std::unique_ptr(new debug_attrs { module_attrs }); + scope.cell_attrs = std::unique_ptr(new debug_attrs { cell_attrs }); + } + + // This overload exists to reduce excessive stack slot allocation in `CXXRTL_EXTREMELY_COLD void debug_info()`. + void add(const std::string &base_path, const char *path, const char *module_name, const char *serialized_module_attrs, const char *serialized_cell_attrs) { + add(base_path + path, module_name, metadata::deserialize(serialized_module_attrs), metadata::deserialize(serialized_cell_attrs)); + } + + size_t contains(const std::string &path) const { + return table.count(path); + } + + const debug_scope &operator [](const std::string &path) const { + return table.at(path); + } +}; + +// Tag class to disambiguate the default constructor used by the toplevel module that calls `reset()`, // and the constructor of interior modules that should not call it. struct interior {}; +// The core API of the `module` class consists of only four virtual methods: `reset()`, `eval()`, +// `commit`, and `debug_info()`. (The virtual destructor is made necessary by C++.) Every other method +// is a convenience method, and exists solely to simplify some common pattern for C++ API consumers. +// No behavior may be added to such convenience methods that other parts of CXXRTL can rely on, since +// there is no guarantee they will be called (and, for example, other CXXRTL libraries will often call +// the `eval()` and `commit()` directly instead, as well as being exposed in the C API). struct module { module() {} virtual ~module() {} @@ -1088,21 +1557,35 @@ struct module { virtual void reset() = 0; - virtual bool eval() = 0; + // The `eval()` callback object, `performer`, is included in the virtual call signature since + // the generated code has broadly identical performance properties. + virtual bool eval(performer *performer = nullptr) = 0; + + // The `commit()` callback object, `observer`, is not included in the virtual call signature since + // the generated code is severely pessimized by it. To observe commit events, the non-virtual + // `commit(observer *)` overload must be called directly on a `module` subclass. virtual bool commit() = 0; - size_t step() { + size_t step(performer *performer = nullptr) { size_t deltas = 0; bool converged = false; do { - converged = eval(); + converged = eval(performer); deltas++; } while (commit() && !converged); return deltas; } - virtual void debug_info(debug_items &items, std::string path = "") { - (void)items, (void)path; + virtual void debug_info(debug_items *items, debug_scopes *scopes, std::string path, metadata_map &&cell_attrs = {}) { + (void)items, (void)scopes, (void)path, (void)cell_attrs; + } + + // Compatibility method. +#if __has_attribute(deprecated) + __attribute__((deprecated("Use `debug_info(&items, /*scopes=*/nullptr, path);` instead."))) +#endif + void debug_info(debug_items &items, std::string path) { + debug_info(&items, /*scopes=*/nullptr, path); } }; @@ -1520,35 +2003,23 @@ CXXRTL_ALWAYS_INLINE std::pair, value> divmod_uu(const value &a, const value &b) { constexpr size_t Bits = max(BitsY, max(BitsA, BitsB)); value quotient; + value remainder; value dividend = a.template zext(); value divisor = b.template zext(); - if (dividend.ucmp(divisor)) - return {/*quotient=*/value { 0u }, /*remainder=*/dividend.template trunc()}; - uint32_t divisor_shift = dividend.ctlz() - divisor.ctlz(); - divisor = divisor.shl(value<32> { divisor_shift }); - for (size_t step = 0; step <= divisor_shift; step++) { - quotient = quotient.shl(value<1> { 1u }); - if (!dividend.ucmp(divisor)) { - dividend = dividend.sub(divisor); - quotient.set_bit(0, true); - } - divisor = divisor.shr(value<1> { 1u }); - } - return {quotient.template trunc(), /*remainder=*/dividend.template trunc()}; + std::tie(quotient, remainder) = dividend.udivmod(divisor); + return {quotient.template trunc(), remainder.template trunc()}; } template CXXRTL_ALWAYS_INLINE std::pair, value> divmod_ss(const value &a, const value &b) { - value ua = a.template sext(); - value ub = b.template sext(); - if (ua.is_neg()) ua = ua.neg(); - if (ub.is_neg()) ub = ub.neg(); - value y, r; - std::tie(y, r) = divmod_uu(ua, ub); - if (a.is_neg() != b.is_neg()) y = y.neg(); - if (a.is_neg()) r = r.neg(); - return {y, r}; + constexpr size_t Bits = max(BitsY, max(BitsA, BitsB)); + value quotient; + value remainder; + value dividend = a.template sext(); + value divisor = b.template sext(); + std::tie(quotient, remainder) = dividend.sdivmod(divisor); + return {quotient.template trunc(), remainder.template trunc()}; } template diff --git a/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h new file mode 100644 index 00000000000..9aa3e105d2c --- /dev/null +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h @@ -0,0 +1,873 @@ +/* + * yosys -- Yosys Open SYnthesis Suite + * + * Copyright (C) 2023 Catherine + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#ifndef CXXRTL_REPLAY_H +#define CXXRTL_REPLAY_H + +#if !defined(WIN32) +#include +#define O_BINARY 0 +#else +#include +#endif + +#include +#include +#include +#include +#include + +#include +#include + +// Theory of operation +// =================== +// +// Log format +// ---------- +// +// The replay log is a simple data format based on a sequence of 32-bit words. The following BNF-like grammar describes +// enough detail to understand the overall structure of the log data and be able to read hex dumps. For a greater +// degree of detail see the source code. The format is considered fully internal to CXXRTL and is subject to change +// without notice. +// +// ::= + +// ::= 0x52585843 0x00004c54 +// ::= * +// ::= ( | )* +// ::= 0xc0000000 ... +// ::= 0xc0000001 ... +// ::= 0x0??????? + | 0x1??????? + | 0x2??????? | 0x3??????? +// , ::= 0x???????? +// ::= | | | +// ::= 0xc0000010 +// ::= 0xc0000011 +// ::= 0xc0000012 +// ::= 0xc0000013 +// ::= 0xFFFFFFFF +// +// The replay log contains sample data, however, it does not cover the entire design. Rather, it only contains sample +// data for the subset of debug items containing _design state_: inputs and registers/latches. This keeps its size to +// a minimum, and recording speed to a maximum. The player samples any missing data by setting the design state items +// to the same values they had during recording, and re-evaluating the design. +// +// Packets for diagnostics (prints, breakpoints, assertions, and assumptions) are used solely for diagnostics emitted +// by the C++ testbench driving the simulation, and are not recorded while evaluating the design. (Diagnostics emitted +// by the RTL can be reconstructed at replay time, so recording them would be a waste of space.) +// +// Limits +// ------ +// +// The log may contain: +// +// * Up to 2**28-1 debug items containing design state. +// * Up to 2**32 chunks per debug item. +// * Up to 2**32 rows per memory. +// * Up to 2**32 samples. +// +// Of these limits, the last two are most likely to be eventually exceeded by practical recordings. However, other +// performance considerations will likely limit the size of such practical recordings first, so the log data format +// will undergo a breaking change at that point. +// +// Operations +// ---------- +// +// As suggested by the name "replay log", this format is designed for recording (writing) once and playing (reading) +// many times afterwards, such that reading the format can be done linearly and quickly. The log format is designed to +// support three primary read operations: +// +// 1. Initialization +// 2. Rewinding (to time T) +// 3. Replaying (for N samples) +// +// During initialization, the player establishes the mapping between debug item names and their 28-bit identifiers in +// the log. It is done once. +// +// During rewinding, the player begins reading at the latest non-incremental sample that still lies before the requested +// sample time. It continues reading incremental samples after that point until it reaches the requested sample time. +// This process is very cheap as the design is not evaluated; it is essentially a (convoluted) memory copy operation. +// +// During replaying, the player evaluates the design at the current time, which causes all debug items to assume +// the values they had before recording. This process is expensive. Once done, the player advances to the next state +// by reading the next (complete or incremental) sample, as above. Since a range of samples is replayed, this process +// is repeated several times in a row. +// +// In principle, when replaying, the player could only read the state of the inputs and the time delta and use a normal +// eval/commit loop to progress the simulation, which is fully deterministic so its calculated design state should be +// exactly the same as the recorded design state. In practice, it is both faster and more reliable (in presence of e.g. +// user-defined black boxes) to read the recorded values instead of calculating them. +// +// Note: The operations described above are conceptual and do not correspond exactly to methods on `cxxrtl::player`. +// The `cxxrtl::player::replay()` method does not evaluate the design. This is so that delta cycles could be ignored +// if they are not of interest while replaying. + +namespace cxxrtl { + +// A single diagnostic that can be manipulated as an object (including being written to and read from a file). +// This differs from the base CXXRTL interface, where diagnostics can only be emitted via a procedure call, and are +// not materialized as objects. +struct diagnostic { + // The `BREAK` flavor corresponds to a breakpoint, which is a diagnostic type that can currently only be emitted + // by the C++ testbench code. + enum flavor { + BREAK = 0, + PRINT = 1, + ASSERT = 2, + ASSUME = 3, + }; + + flavor type; + std::string message; + std::string location; // same format as the `src` attribute of `$print` or `$check` cell + + diagnostic() + : type(BREAK) {} + + diagnostic(flavor type, const std::string &message, const std::string &location) + : type(type), message(message), location(location) {} + + diagnostic(flavor type, const std::string &message, const char *file, unsigned line) + : type(type), message(message), location(std::string(file) + ':' + std::to_string(line)) {} +}; + +// A spool stores CXXRTL design state changes in a file. +class spool { +public: + // Unique pointer to a specific sample within a replay log. (Timestamps are not unique.) + typedef uint32_t pointer_t; + + // Numeric identifier assigned to a debug item within a replay log. Range limited to [1, MAXIMUM_IDENT]. + typedef uint32_t ident_t; + + static constexpr uint16_t VERSION = 0x0400; + + static constexpr uint64_t HEADER_MAGIC = 0x00004c5452585843; + static constexpr uint64_t VERSION_MASK = 0xffff000000000000; + + static constexpr uint32_t PACKET_DEFINE = 0xc0000000; + + static constexpr uint32_t PACKET_SAMPLE = 0xc0000001; + enum sample_flag : uint32_t { + EMPTY = 0, + INCREMENTAL = 1, + }; + + static constexpr uint32_t MAXIMUM_IDENT = 0x0fffffff; + static constexpr uint32_t CHANGE_MASK = 0x30000000; + + static constexpr uint32_t PACKET_CHANGE = 0x00000000/* | ident */; + static constexpr uint32_t PACKET_CHANGEI = 0x10000000/* | ident */; + static constexpr uint32_t PACKET_CHANGEL = 0x20000000/* | ident */; + static constexpr uint32_t PACKET_CHANGEH = 0x30000000/* | ident */; + + static constexpr uint32_t PACKET_DIAGNOSTIC = 0xc0000010/* | diagnostic::flavor */; + static constexpr uint32_t DIAGNOSTIC_MASK = 0x0000000f; + + static constexpr uint32_t PACKET_END = 0xffffffff; + + // Writing spools. + + class writer { + int fd; + size_t position; + std::vector buffer; + + // These functions aren't overloaded because of implicit numeric conversions. + + void emit_word(uint32_t word) { + if (position + 1 == buffer.size()) + flush(); + buffer[position++] = word; + } + + void emit_dword(uint64_t dword) { + emit_word(dword >> 0); + emit_word(dword >> 32); + } + + void emit_ident(ident_t ident) { + assert(ident <= MAXIMUM_IDENT); + emit_word(ident); + } + + void emit_size(size_t size) { + assert(size <= std::numeric_limits::max()); + emit_word(size); + } + + // Same implementation as `emit_size()`, different declared intent. + void emit_index(size_t index) { + assert(index <= std::numeric_limits::max()); + emit_word(index); + } + + void emit_string(std::string str) { + // Align to a word boundary, and add at least one terminating \0. + str.resize(str.size() + (sizeof(uint32_t) - (str.size() + sizeof(uint32_t)) % sizeof(uint32_t))); + for (size_t index = 0; index < str.size(); index += sizeof(uint32_t)) { + uint32_t word; + memcpy(&word, &str[index], sizeof(uint32_t)); + emit_word(word); + } + } + + void emit_time(const time ×tamp) { + const value &raw_timestamp(timestamp); + emit_word(raw_timestamp.data[0]); + emit_word(raw_timestamp.data[1]); + emit_word(raw_timestamp.data[2]); + } + + public: + // Creates a writer, and transfers ownership of `fd`, which must be open for appending. + // + // The buffer size is currently fixed to a "reasonably large" size, determined empirically by measuring writer + // performance on a representative design; large but not so large it would e.g. cause address space exhaustion + // on 32-bit platforms. + writer(spool &spool) : fd(spool.take_write()), position(0), buffer(32 * 1024 * 1024) { + assert(fd != -1); +#if !defined(WIN32) + int result = ftruncate(fd, 0); +#else + int result = _chsize_s(fd, 0); +#endif + assert(result == 0); + } + + writer(writer &&moved) : fd(moved.fd), position(moved.position), buffer(moved.buffer) { + moved.fd = -1; + moved.position = 0; + } + + writer(const writer &) = delete; + writer &operator=(const writer &) = delete; + + // Both write() calls and fwrite() calls are too expensive to perform implicitly. The API consumer must determine + // the optimal time to flush the writer and do that explicitly for best performance. + void flush() { + assert(fd != -1); + size_t data_size = position * sizeof(uint32_t); + size_t data_written = write(fd, buffer.data(), data_size); + assert(data_size == data_written); + position = 0; + } + + ~writer() { + if (fd != -1) { + flush(); + close(fd); + } + } + + void write_magic() { + // `CXXRTL` followed by version in binary. This header will read backwards on big-endian machines, which allows + // detection of this case, both visually and programmatically. + emit_dword(((uint64_t)VERSION << 48) | HEADER_MAGIC); + } + + void write_define(ident_t ident, const std::string &name, size_t part_index, size_t chunks, size_t depth) { + emit_word(PACKET_DEFINE); + emit_ident(ident); + emit_string(name); + emit_index(part_index); + emit_size(chunks); + emit_size(depth); + } + + void write_sample(bool incremental, pointer_t pointer, const time ×tamp) { + uint32_t flags = (incremental ? sample_flag::INCREMENTAL : 0); + emit_word(PACKET_SAMPLE); + emit_word(flags); + emit_word(pointer); + emit_time(timestamp); + } + + void write_change(ident_t ident, size_t chunks, const chunk_t *data) { + assert(ident <= MAXIMUM_IDENT); + + if (chunks == 1 && *data == 0) { + emit_word(PACKET_CHANGEL | ident); + } else if (chunks == 1 && *data == 1) { + emit_word(PACKET_CHANGEH | ident); + } else { + emit_word(PACKET_CHANGE | ident); + for (size_t offset = 0; offset < chunks; offset++) + emit_word(data[offset]); + } + } + + void write_change(ident_t ident, size_t chunks, const chunk_t *data, size_t index) { + assert(ident <= MAXIMUM_IDENT); + + emit_word(PACKET_CHANGEI | ident); + emit_index(index); + for (size_t offset = 0; offset < chunks; offset++) + emit_word(data[offset]); + } + + void write_diagnostic(const diagnostic &diagnostic) { + emit_word(PACKET_DIAGNOSTIC | diagnostic.type); + emit_string(diagnostic.message); + emit_string(diagnostic.location); + } + + void write_end() { + emit_word(PACKET_END); + } + }; + + // Reading spools. + + class reader { + FILE *f; + + uint32_t absorb_word() { + // If we're at end of file, `fread` will not write to `word`, and `PACKET_END` will be returned. + uint32_t word = PACKET_END; + fread(&word, sizeof(word), 1, f); + return word; + } + + uint64_t absorb_dword() { + uint32_t lo = absorb_word(); + uint32_t hi = absorb_word(); + return ((uint64_t)hi << 32) | lo; + } + + ident_t absorb_ident() { + ident_t ident = absorb_word(); + assert(ident <= MAXIMUM_IDENT); + return ident; + } + + size_t absorb_size() { + return absorb_word(); + } + + size_t absorb_index() { + return absorb_word(); + } + + std::string absorb_string() { + std::string str; + do { + size_t end = str.size(); + str.resize(end + 4); + uint32_t word = absorb_word(); + memcpy(&str[end], &word, sizeof(uint32_t)); + } while (str.back() != '\0'); + // Strings have no embedded zeroes besides the terminating one(s). + return str.substr(0, str.find('\0')); + } + + time absorb_time() { + value raw_timestamp; + raw_timestamp.data[0] = absorb_word(); + raw_timestamp.data[1] = absorb_word(); + raw_timestamp.data[2] = absorb_word(); + return time(raw_timestamp); + } + + public: + typedef uint64_t pos_t; + + // Creates a reader, and transfers ownership of `fd`, which must be open for reading. + reader(spool &spool) : f(fdopen(spool.take_read(), "r")) { + assert(f != nullptr); + } + + reader(reader &&moved) : f(moved.f) { + moved.f = nullptr; + } + + reader(const reader &) = delete; + reader &operator=(const reader &) = delete; + + ~reader() { + if (f != nullptr) + fclose(f); + } + + pos_t position() { + return ftell(f); + } + + void rewind(pos_t position) { + fseek(f, position, SEEK_SET); + } + + void read_magic() { + uint64_t magic = absorb_dword(); + assert((magic & ~VERSION_MASK) == HEADER_MAGIC); + assert((magic >> 48) == VERSION); + } + + bool read_define(ident_t &ident, std::string &name, size_t &part_index, size_t &chunks, size_t &depth) { + uint32_t header = absorb_word(); + if (header == PACKET_END) + return false; + assert(header == PACKET_DEFINE); + ident = absorb_ident(); + name = absorb_string(); + part_index = absorb_index(); + chunks = absorb_size(); + depth = absorb_size(); + return true; + } + + bool read_sample(bool &incremental, pointer_t &pointer, time ×tamp) { + uint32_t header = absorb_word(); + if (header == PACKET_END) + return false; + assert(header == PACKET_SAMPLE); + uint32_t flags = absorb_word(); + incremental = (flags & sample_flag::INCREMENTAL); + pointer = absorb_word(); + timestamp = absorb_time(); + return true; + } + + bool read_header(uint32_t &header) { + header = absorb_word(); + return header != PACKET_END; + } + + // This method must be separate from `read_change_data` because `chunks` and `depth` can only be looked up + // if `ident` is known. + bool read_change_ident(uint32_t header, ident_t &ident) { + if ((header & ~(CHANGE_MASK | MAXIMUM_IDENT)) != 0) + return false; // some other packet + ident = header & MAXIMUM_IDENT; + return true; + } + + void read_change_data(uint32_t header, size_t chunks, size_t depth, chunk_t *data) { + uint32_t index = 0; + switch (header & CHANGE_MASK) { + case PACKET_CHANGEL: + *data = 0; + return; + case PACKET_CHANGEH: + *data = 1; + return; + case PACKET_CHANGE: + break; + case PACKET_CHANGEI: + index = absorb_word(); + assert(index < depth); + break; + default: + assert(false && "Unrecognized change packet"); + } + for (size_t offset = 0; offset < chunks; offset++) + data[chunks * index + offset] = absorb_word(); + } + + bool read_diagnostic(uint32_t header, diagnostic &diagnostic) { + if ((header & ~DIAGNOSTIC_MASK) != PACKET_DIAGNOSTIC) + return false; // some other packet + uint32_t type = header & DIAGNOSTIC_MASK; + assert(type == diagnostic::BREAK || type == diagnostic::PRINT || + type == diagnostic::ASSERT || type == diagnostic::ASSUME); + diagnostic.type = (diagnostic::flavor)type; + diagnostic.message = absorb_string(); + diagnostic.location = absorb_string(); + return true; + } + }; + + // Opening spools. For certain uses of the record/replay mechanism, two distinct open files (two open files, i.e. + // two distinct file pointers, and not just file descriptors, which share the file pointer if duplicated) are used, + // for a reader and writer thread. This class manages the lifetime of the descriptors for these files. When only + // one of them is used, the other is closed harmlessly when the spool is destroyed. +private: + std::atomic writefd; + std::atomic readfd; + +public: + spool(const std::string &filename) + : writefd(open(filename.c_str(), O_CREAT|O_BINARY|O_WRONLY|O_APPEND, 0644)), + readfd(open(filename.c_str(), O_BINARY|O_RDONLY)) { + assert(writefd.load() != -1 && readfd.load() != -1); + } + + spool(spool &&moved) : writefd(moved.writefd.exchange(-1)), readfd(moved.readfd.exchange(-1)) {} + + spool(const spool &) = delete; + spool &operator=(const spool &) = delete; + + ~spool() { + int fd; + if ((fd = writefd.exchange(-1)) != -1) + close(fd); + if ((fd = readfd.exchange(-1)) != -1) + close(fd); + } + + // Atomically acquire a write file descriptor for the spool. Can be called once, and will return -1 the next time + // it is called. Thread-safe. + int take_write() { + return writefd.exchange(-1); + } + + // Atomically acquire a read file descriptor for the spool. Can be called once, and will return -1 the next time + // it is called. Thread-safe. + int take_read() { + return readfd.exchange(-1); + } +}; + +// A CXXRTL recorder samples design state, producing complete or incremental updates, and writes them to a spool. +class recorder { + struct variable { + spool::ident_t ident; /* <= spool::MAXIMUM_IDENT */ + size_t chunks; + size_t depth; /* == 1 for wires */ + chunk_t *curr; + bool memory; + }; + + spool::writer writer; + std::vector variables; + std::vector inputs; // values of inputs must be recorded explicitly, as their changes are not observed + std::unordered_map ident_lookup; + bool streaming = false; // whether variable definitions have been written + spool::pointer_t pointer = 0; + time timestamp; + +public: + template + recorder(Args &&...args) : writer(std::forward(args)...) {} + + void start(module &module, std::string top_path = "") { + debug_items items; + module.debug_info(&items, /*scopes=*/nullptr, top_path); + start(items); + } + + void start(const debug_items &items) { + assert(!streaming); + + writer.write_magic(); + for (auto item : items.table) + for (size_t part_index = 0; part_index < item.second.size(); part_index++) { + auto &part = item.second[part_index]; + if ((part.flags & debug_item::INPUT) || (part.flags & debug_item::DRIVEN_SYNC) || + (part.type == debug_item::MEMORY)) { + variable var; + var.ident = variables.size() + 1; + var.chunks = (part.width + sizeof(chunk_t) * 8 - 1) / (sizeof(chunk_t) * 8); + var.depth = part.depth; + var.curr = part.curr; + var.memory = (part.type == debug_item::MEMORY); + ident_lookup[var.curr] = var.ident; + + assert(variables.size() < spool::MAXIMUM_IDENT); + if (part.flags & debug_item::INPUT) + inputs.push_back(variables.size()); + variables.push_back(var); + + writer.write_define(var.ident, item.first, part_index, var.chunks, var.depth); + } + } + writer.write_end(); + streaming = true; + } + + const time &latest_time() { + return timestamp; + } + + const time &advance_time(const time &delta) { + assert(!delta.is_negative()); + timestamp += delta; + return timestamp; + } + + void record_complete() { + assert(streaming); + + writer.write_sample(/*incremental=*/false, pointer++, timestamp); + for (auto var : variables) { + assert(var.ident != 0); + if (!var.memory) + writer.write_change(var.ident, var.chunks, var.curr); + else + for (size_t index = 0; index < var.depth; index++) + writer.write_change(var.ident, var.chunks, &var.curr[var.chunks * index], index); + } + writer.write_end(); + } + + // This function is generic over ModuleT to encourage observer callbacks to be inlined into the commit function. + template + bool record_incremental(ModuleT &module) { + assert(streaming); + + struct : observer { + std::unordered_map *ident_lookup; + spool::writer *writer; + + CXXRTL_ALWAYS_INLINE + void on_update(size_t chunks, const chunk_t *base, const chunk_t *value) { + writer->write_change(ident_lookup->at(base), chunks, value); + } + + CXXRTL_ALWAYS_INLINE + void on_update(size_t chunks, const chunk_t *base, const chunk_t *value, size_t index) { + writer->write_change(ident_lookup->at(base), chunks, value, index); + } + } record_observer; + record_observer.ident_lookup = &ident_lookup; + record_observer.writer = &writer; + + writer.write_sample(/*incremental=*/true, pointer++, timestamp); + for (auto input_index : inputs) { + variable &var = variables.at(input_index); + assert(!var.memory); + writer.write_change(var.ident, var.chunks, var.curr); + } + bool changed = module.commit(record_observer); + writer.write_end(); + return changed; + } + + void record_diagnostic(const diagnostic &diagnostic) { + assert(streaming); + + // Emit an incremental delta cycle per diagnostic to simplify the logic of the recorder. This is inefficient, but + // diagnostics should be rare enough that this inefficiency does not matter. If it turns out to be an issue, this + // code should be changed to accumulate diagnostics to a buffer that is flushed in `record_{complete,incremental}` + // and also in `advance_time` before the timestamp is changed. (Right now `advance_time` never writes to the spool.) + writer.write_sample(/*incremental=*/true, pointer++, timestamp); + writer.write_diagnostic(diagnostic); + writer.write_end(); + } + + void flush() { + writer.flush(); + } +}; + +// A CXXRTL player reads samples from a spool, and changes the design state accordingly. To start reading samples, +// a spool must have been initialized: the recorder must have been started and an initial complete sample must have +// been written. +class player { + struct variable { + size_t chunks; + size_t depth; /* == 1 for wires */ + chunk_t *curr; + }; + + spool::reader reader; + std::unordered_map variables; + bool streaming = false; // whether variable definitions have been read + bool initialized = false; // whether a sample has ever been read + spool::pointer_t pointer = 0; + time timestamp; + + std::map> index_by_pointer; + std::map> index_by_timestamp; + + bool peek_sample(spool::pointer_t &pointer, time ×tamp) { + bool incremental; + auto position = reader.position(); + bool success = reader.read_sample(incremental, pointer, timestamp); + reader.rewind(position); + return success; + } + +public: + template + player(Args &&...args) : reader(std::forward(args)...) {} + + // The `top_path` must match the one given to the recorder. + void start(module &module, std::string top_path = "") { + debug_items items; + module.debug_info(&items, /*scopes=*/nullptr, top_path); + start(items); + } + + void start(const debug_items &items) { + assert(!streaming); + + reader.read_magic(); + while (true) { + spool::ident_t ident; + std::string name; + size_t part_index; + size_t chunks; + size_t depth; + if (!reader.read_define(ident, name, part_index, chunks, depth)) + break; + assert(variables.count(ident) == 0); + assert(items.count(name) != 0); + assert(part_index < items.count(name)); + + const debug_item &part = items.at(name).at(part_index); + assert(chunks == (part.width + sizeof(chunk_t) * 8 - 1) / (sizeof(chunk_t) * 8)); + assert(depth == part.depth); + + variable &var = variables[ident]; + var.chunks = chunks; + var.depth = depth; + var.curr = part.curr; + } + assert(variables.size() > 0); + streaming = true; + + // Establish the initial state of the design. + std::vector diagnostics; + initialized = replay(&diagnostics); + assert(initialized && diagnostics.empty()); + } + + // Returns the pointer of the current sample. + spool::pointer_t current_pointer() { + assert(initialized); + return pointer; + } + + // Returns the time of the current sample. + const time ¤t_time() { + assert(initialized); + return timestamp; + } + + // Returns `true` if there is a next sample to read, and sets `pointer` to its pointer if there is. + bool get_next_pointer(spool::pointer_t &pointer) { + assert(streaming); + time timestamp; + return peek_sample(pointer, timestamp); + } + + // Returns `true` if there is a next sample to read, and sets `timestamp` to its time if there is. + bool get_next_time(time ×tamp) { + assert(streaming); + uint32_t pointer; + return peek_sample(pointer, timestamp); + } + + // If this function returns `true`, then `current_pointer() == at_pointer`, and the module contains values that + // correspond to this pointer in the replay log. To obtain a valid pointer, call `current_pointer()`; while pointers + // are monotonically increasing for each consecutive sample, using arithmetic operations to create a new pointer is + // not allowed. The `diagnostics` argument, if not `nullptr`, receives the diagnostics recorded in this sample. + bool rewind_to(spool::pointer_t at_pointer, std::vector *diagnostics) { + assert(initialized); + + // The pointers in the replay log start from one that is greater than `at_pointer`. In this case the pointer will + // never be reached. + assert(index_by_pointer.size() > 0); + if (at_pointer < index_by_pointer.rbegin()->first) + return false; + + // Find the last complete sample whose pointer is less than or equal to `at_pointer`. Note that the comparison + // function used here is `std::greater`, inverting the direction of `lower_bound`. + auto position_it = index_by_pointer.lower_bound(at_pointer); + assert(position_it != index_by_pointer.end()); + reader.rewind(position_it->second); + + // Replay samples until eventually arriving to `at_pointer` or encountering end of file. + while(replay(diagnostics)) { + if (pointer == at_pointer) + return true; + + if (diagnostics) + diagnostics->clear(); + } + return false; + } + + // If this function returns `true`, then `current_time() <= at_or_before_timestamp`, and the module contains values + // that correspond to `current_time()` in the replay log. If `current_time() == at_or_before_timestamp` and there + // are several consecutive samples with the same time, the module contains values that correspond to the first of + // these samples. The `diagnostics` argument, if not `nullptr`, receives the diagnostics recorded in this sample. + bool rewind_to_or_before(const time &at_or_before_timestamp, std::vector *diagnostics) { + assert(initialized); + + // The timestamps in the replay log start from one that is greater than `at_or_before_timestamp`. In this case + // the timestamp will never be reached. Otherwise, this function will always succeed. + assert(index_by_timestamp.size() > 0); + if (at_or_before_timestamp < index_by_timestamp.rbegin()->first) + return false; + + // Find the last complete sample whose timestamp is less than or equal to `at_or_before_timestamp`. Note that + // the comparison function used here is `std::greater`, inverting the direction of `lower_bound`. + auto position_it = index_by_timestamp.lower_bound(at_or_before_timestamp); + assert(position_it != index_by_timestamp.end()); + reader.rewind(position_it->second); + + // Replay samples until eventually arriving to or past `at_or_before_timestamp` or encountering end of file. + while (replay(diagnostics)) { + if (timestamp == at_or_before_timestamp) + break; + + time next_timestamp; + if (!get_next_time(next_timestamp)) + break; + if (next_timestamp > at_or_before_timestamp) + break; + + if (diagnostics) + diagnostics->clear(); + } + return true; + } + + // If this function returns `true`, then `current_pointer()` and `current_time()` are updated for the next sample + // and the module now contains values that correspond to that sample. If it returns `false`, there was no next sample + // to read. The `diagnostics` argument, if not `nullptr`, receives the diagnostics recorded in the next sample. + bool replay(std::vector *diagnostics) { + assert(streaming); + + bool incremental; + auto position = reader.position(); + if (!reader.read_sample(incremental, pointer, timestamp)) + return false; + + // The very first sample that is read must be a complete sample. This is required for the rewind functions to work. + assert(initialized || !incremental); + + // It is possible (though not very useful) to have several complete samples with the same timestamp in a row. + // Ensure that we associate the timestamp with the position of the first such complete sample. (This condition + // works because the player never jumps over a sample.) + if (!incremental && !index_by_pointer.count(pointer)) { + assert(!index_by_timestamp.count(timestamp)); + index_by_pointer[pointer] = position; + index_by_timestamp[timestamp] = position; + } + + uint32_t header; + while (reader.read_header(header)) { + spool::ident_t ident; + diagnostic diag; + if (reader.read_change_ident(header, ident)) { + variable &var = variables.at(ident); + reader.read_change_data(header, var.chunks, var.depth, var.curr); + } else if (reader.read_diagnostic(header, diag)) { + if (diagnostics) + diagnostics->push_back(diag); + } else assert(false && "Unrecognized packet header"); + } + return true; + } +}; + +} + +#endif diff --git a/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h new file mode 100644 index 00000000000..f37c2b65640 --- /dev/null +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h @@ -0,0 +1,231 @@ +/* + * yosys -- Yosys Open SYnthesis Suite + * + * Copyright (C) 2023 Catherine + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#ifndef CXXRTL_TIME_H +#define CXXRTL_TIME_H + +#include +#include + +#include + +namespace cxxrtl { + +// A timestamp or a difference in time, stored as a 96-bit number of femtoseconds (10e-15 s). The range and resolution +// of this format can represent any VCD timestamp within approx. ±1255321.2 years, without the need for a timescale. +class time { +public: + static constexpr size_t bits = 96; // 3 chunks + +private: + static constexpr size_t resolution_digits = 15; + + static_assert(sizeof(chunk_t) == 4, "a chunk is expected to be 32-bit"); + static constexpr value resolution = value { + chunk_t(1000000000000000ull & 0xffffffffull), chunk_t(1000000000000000ull >> 32), 0u + }; + + // Signed number of femtoseconds from the beginning of time. + value raw; + +public: + constexpr time() {} + + explicit constexpr time(const value &raw) : raw(raw) {} + explicit operator const value &() const { return raw; } + + static constexpr time maximum() { + return time(value { 0xffffffffu, 0xffffffffu, 0x7fffffffu }); + } + + time(int64_t secs, int64_t femtos) { + value<64> secs_val; + secs_val.set(secs); + value<64> femtos_val; + femtos_val.set(femtos); + raw = secs_val.sext().mul(resolution).add(femtos_val.sext()); + } + + bool is_zero() const { + return raw.is_zero(); + } + + // Extracts the sign of the value. + bool is_negative() const { + return raw.is_neg(); + } + + // Extracts the number of whole seconds. Negative if the value is negative. + int64_t secs() const { + return raw.sdivmod(resolution).first.trunc<64>().get(); + } + + // Extracts the number of femtoseconds in the fractional second. Negative if the value is negative. + int64_t femtos() const { + return raw.sdivmod(resolution).second.trunc<64>().get(); + } + + bool operator==(const time &other) const { + return raw == other.raw; + } + + bool operator!=(const time &other) const { + return raw != other.raw; + } + + bool operator>(const time &other) const { + return other.raw.scmp(raw); + } + + bool operator>=(const time &other) const { + return !raw.scmp(other.raw); + } + + bool operator<(const time &other) const { + return raw.scmp(other.raw); + } + + bool operator<=(const time &other) const { + return !other.raw.scmp(raw); + } + + time operator+(const time &other) const { + return time(raw.add(other.raw)); + } + + time &operator+=(const time &other) { + *this = *this + other; + return *this; + } + + time operator-() const { + return time(raw.neg()); + } + + time operator-(const time &other) const { + return *this + (-other); + } + + time &operator-=(const time &other) { + *this = *this - other; + return *this; + } + + operator std::string() const { + char buf[48]; // x=2**95; len(f"-{x/1_000_000_000_000_000}.{x^1_000_000_000_000_000}") == 48 + int64_t secs = this->secs(); + int64_t femtos = this->femtos(); + snprintf(buf, sizeof(buf), "%s%" PRIi64 ".%015" PRIi64, + is_negative() ? "-" : "", secs >= 0 ? secs : -secs, femtos >= 0 ? femtos : -femtos); + return buf; + } + +#if __cplusplus >= 201603L + [[nodiscard("ignoring parse errors")]] +#endif + bool parse(const std::string &str) { + enum { + parse_sign_opt, + parse_integral, + parse_fractional, + } state = parse_sign_opt; + bool negative = false; + int64_t integral = 0; + int64_t fractional = 0; + size_t frac_digits = 0; + for (auto chr : str) { + switch (state) { + case parse_sign_opt: + state = parse_integral; + if (chr == '+' || chr == '-') { + negative = (chr == '-'); + break; + } + /* fallthrough */ + case parse_integral: + if (chr >= '0' && chr <= '9') { + integral *= 10; + integral += chr - '0'; + } else if (chr == '.') { + state = parse_fractional; + } else { + return false; + } + break; + case parse_fractional: + if (chr >= '0' && chr <= '9' && frac_digits < resolution_digits) { + fractional *= 10; + fractional += chr - '0'; + frac_digits++; + } else { + return false; + } + break; + } + } + if (frac_digits == 0) + return false; + while (frac_digits++ < resolution_digits) + fractional *= 10; + *this = negative ? -time { integral, fractional} : time { integral, fractional }; + return true; + } +}; + +// Out-of-line definition required until C++17. +constexpr value time::resolution; + +std::ostream &operator<<(std::ostream &os, const time &val) { + os << (std::string)val; + return os; +} + +// These literals are (confusingly) compatible with the ones from `std::chrono`: the `std::chrono` literals do not +// have an underscore (e.g. 1ms) and the `cxxrtl::time` literals do (e.g. 1_ms). This syntactic difference is +// a requirement of the C++ standard. Despite being compatible the literals should not be mixed in the same namespace. +namespace time_literals { + +time operator""_s(unsigned long long seconds) { + return time { (int64_t)seconds, 0 }; +} + +time operator""_ms(unsigned long long milliseconds) { + return time { 0, (int64_t)milliseconds * 1000000000000 }; +} + +time operator""_us(unsigned long long microseconds) { + return time { 0, (int64_t)microseconds * 1000000000 }; +} + +time operator""_ns(unsigned long long nanoseconds) { + return time { 0, (int64_t)nanoseconds * 1000000 }; +} + +time operator""_ps(unsigned long long picoseconds) { + return time { 0, (int64_t)picoseconds * 1000 }; +} + +time operator""_fs(unsigned long long femtoseconds) { + return time { 0, (int64_t)femtoseconds }; +} + +}; + +}; + +#endif diff --git a/yosys/backends/cxxrtl/cxxrtl_vcd.h b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h similarity index 99% rename from yosys/backends/cxxrtl/cxxrtl_vcd.h rename to yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h index b76922bbd8a..cb2ccf5fc26 100644 --- a/yosys/backends/cxxrtl/cxxrtl_vcd.h +++ b/yosys/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h @@ -19,7 +19,7 @@ #ifndef CXXRTL_VCD_H #define CXXRTL_VCD_H -#include +#include namespace cxxrtl { diff --git a/yosys/backends/edif/edif.cc b/yosys/backends/edif/edif.cc index 00fd7f54e39..553eb23d645 100644 --- a/yosys/backends/edif/edif.cc +++ b/yosys/backends/edif/edif.cc @@ -213,6 +213,9 @@ struct EdifBackend : public Backend { for (auto cell : module->cells()) { + if (cell->type == ID($scopeinfo)) + continue; + if (design->module(cell->type) == nullptr || design->module(cell->type)->get_blackbox_attribute()) { lib_cell_ports[cell->type]; for (auto p : cell->connections()) diff --git a/yosys/backends/firrtl/firrtl.cc b/yosys/backends/firrtl/firrtl.cc index fc1d628915c..dc76dbeecf5 100644 --- a/yosys/backends/firrtl/firrtl.cc +++ b/yosys/backends/firrtl/firrtl.cc @@ -980,6 +980,9 @@ struct FirrtlWorker register_reverse_wire_map(y_id, cell->getPort(ID::Y)); continue; } + + if (cell->type == ID($scopeinfo)) + continue; log_error("Cell type not supported: %s (%s.%s)\n", log_id(cell->type), log_id(module), log_id(cell)); } diff --git a/yosys/backends/firrtl/test.sh b/yosys/backends/firrtl/test.sh index fe7e3a32912..dd675e91712 100644 --- a/yosys/backends/firrtl/test.sh +++ b/yosys/backends/firrtl/test.sh @@ -1,4 +1,4 @@ -#!/bin/bash +#!/usr/bin/env bash set -ex cd ../../ diff --git a/yosys/backends/jny/jny.cc b/yosys/backends/jny/jny.cc index 9989feed599..1c163dba52e 100644 --- a/yosys/backends/jny/jny.cc +++ b/yosys/backends/jny/jny.cc @@ -124,7 +124,7 @@ struct JnyWriter design->sort(); f << "{\n"; - f << " \"$schema\": \"https://raw.githubusercontent.com/YosysHQ/yosys/master/misc/jny.schema.json\",\n"; + f << " \"$schema\": \"https://raw.githubusercontent.com/YosysHQ/yosys/main/misc/jny.schema.json\",\n"; f << stringf(" \"generator\": \"%s\",\n", escape_string(yosys_version_str).c_str()); f << " \"version\": \"0.0.1\",\n"; f << " \"invocation\": \"" << escape_string(invk) << "\",\n"; @@ -426,7 +426,7 @@ struct JnyBackend : public Backend { log(" Don't include property information in the netlist output.\n"); log("\n"); log("The JSON schema for JNY output files is located in the \"jny.schema.json\" file\n"); - log("which is located at \"https://raw.githubusercontent.com/YosysHQ/yosys/master/misc/jny.schema.json\"\n"); + log("which is located at \"https://raw.githubusercontent.com/YosysHQ/yosys/main/misc/jny.schema.json\"\n"); log("\n"); } diff --git a/yosys/backends/json/json.cc b/yosys/backends/json/json.cc index fd2c922fd5d..2f442c494f7 100644 --- a/yosys/backends/json/json.cc +++ b/yosys/backends/json/json.cc @@ -192,6 +192,10 @@ struct JsonWriter for (auto c : module->cells()) { if (use_selection && !module->selected(c)) continue; + // Eventually we will want to emit $scopeinfo, but currently this + // will break JSON netlist consumers like nextpnr + if (c->type == ID($scopeinfo)) + continue; f << stringf("%s\n", first ? "" : ","); f << stringf(" %s: {\n", get_name(c->name).c_str()); f << stringf(" \"hide_name\": %s,\n", c->name[0] == '$' ? "1" : "0"); diff --git a/yosys/backends/simplec/test00.sh b/yosys/backends/simplec/test00.sh index ede75727378..9895a97e46b 100644 --- a/yosys/backends/simplec/test00.sh +++ b/yosys/backends/simplec/test00.sh @@ -1,4 +1,4 @@ -#!/bin/bash +#!/usr/bin/env bash set -ex ../../yosys -p 'synth -top test; write_simplec -verbose -i8 test00_uut.c' test00_uut.v clang -o test00_tb test00_tb.c diff --git a/yosys/backends/smt2/smt2.cc b/yosys/backends/smt2/smt2.cc index 5e63e62370d..c702d5e7e54 100644 --- a/yosys/backends/smt2/smt2.cc +++ b/yosys/backends/smt2/smt2.cc @@ -1117,7 +1117,18 @@ struct Smt2Worker string name_a = get_bool(cell->getPort(ID::A)); string name_en = get_bool(cell->getPort(ID::EN)); - if (cell->name[0] == '$' && cell->attributes.count(ID::src)) + bool private_name = cell->name[0] == '$'; + + if (!private_name && cell->has_attribute(ID::hdlname)) { + for (auto const &part : cell->get_hdlname_attribute()) { + if (part == "_witness_") { + private_name = true; + break; + } + } + } + + if (private_name && cell->attributes.count(ID::src)) decls.push_back(stringf("; yosys-smt2-%s %d %s %s\n", cell->type.c_str() + 1, id, get_id(cell), cell->attributes.at(ID::src).decode_string().c_str())); else decls.push_back(stringf("; yosys-smt2-%s %d %s\n", cell->type.c_str() + 1, id, get_id(cell))); diff --git a/yosys/backends/smt2/smtbmc.py b/yosys/backends/smt2/smtbmc.py index 02e15a1b502..c3bdcebbe96 100644 --- a/yosys/backends/smt2/smtbmc.py +++ b/yosys/backends/smt2/smtbmc.py @@ -17,7 +17,7 @@ # OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. # -import os, sys, getopt, re, bisect +import os, sys, getopt, re, bisect, json ##yosys-sys-path## from smtio import SmtIo, SmtOpts, MkVcd from ywio import ReadWitness, WriteWitness, WitnessValues @@ -56,6 +56,9 @@ keep_going = False check_witness = False detect_loops = False +incremental = None +track_assumes = False +minimize_assumes = False so = SmtOpts() @@ -185,6 +188,17 @@ def help(): check if states are unique in temporal induction counter examples (this feature is experimental and incomplete) + --incremental + run in incremental mode (experimental) + + --track-assumes + track individual assumptions and report a subset of used + assumptions that are sufficient for the reported outcome. This + can be used to debug PREUNSAT failures as well as to find a + smaller set of sufficient assumptions. + + --minimize-assumes + when using --track-assumes, solve for a minimal set of sufficient assumptions. """ + so.helpmsg()) def usage(): @@ -196,7 +210,8 @@ def usage(): opts, args = getopt.getopt(sys.argv[1:], so.shortopts + "t:higcm:", so.longopts + ["help", "final-only", "assume-skipped=", "smtc=", "cex=", "aig=", "aig-noheader", "yw=", "btorwit=", "presat", "dump-vcd=", "dump-yw=", "dump-vlogtb=", "vlogtb-top=", "dump-smtc=", "dump-all", "noinfo", "append=", - "smtc-init", "smtc-top=", "noinit", "binary", "keep-going", "check-witness", "detect-loops"]) + "smtc-init", "smtc-top=", "noinit", "binary", "keep-going", "check-witness", "detect-loops", "incremental", + "track-assumes", "minimize-assumes"]) except: usage() @@ -282,6 +297,13 @@ def usage(): check_witness = True elif o == "--detect-loops": detect_loops = True + elif o == "--incremental": + from smtbmc_incremental import Incremental + incremental = Incremental() + elif o == "--track-assumes": + track_assumes = True + elif o == "--minimize-assumes": + minimize_assumes = True elif so.handle(o, a): pass else: @@ -290,7 +312,7 @@ def usage(): if len(args) != 1: usage() -if sum([tempind, gentrace, covermode]) > 1: +if sum([tempind, gentrace, covermode, incremental is not None]) > 1: usage() constr_final_start = None @@ -440,12 +462,17 @@ def replace_netref(match): smt = SmtIo(opts=so) +if track_assumes: + smt.smt2_options[':produce-unsat-assumptions'] = 'true' + if noinfo and vcdfile is None and vlogtbfile is None and outconstr is None: smt.produce_models = False def print_msg(msg): - print("%s %s" % (smt.timestamp(), msg)) - sys.stdout.flush() + if incremental: + incremental.print_msg(msg) + else: + print("%s %s" % (smt.timestamp(), msg), flush=True) print_msg("Solver: %s" % (so.solver)) @@ -640,15 +667,14 @@ def print_msg(msg): num_steps = max(num_steps, step+2) step += 1 -if inywfile is not None: - if not got_topt: - skip_steps = 0 - num_steps = 0 +ywfile_hierwitness_cache = None - with open(inywfile, "r") as f: - inyw = ReadWitness(f) +def ywfile_hierwitness(): + global ywfile_hierwitness_cache + if ywfile_hierwitness_cache is None: + ywfile_hierwitness = smt.hierwitness(topmod, allregs=True, blackbox=True) - inits, seqs, clocks, mems = smt.hierwitness(topmod, allregs=True, blackbox=True) + inits, seqs, clocks, mems = ywfile_hierwitness smt_wires = defaultdict(list) smt_mems = defaultdict(list) @@ -659,90 +685,165 @@ def print_msg(msg): for mem in mems: smt_mems[mem["path"]].append(mem) - addr_re = re.compile(r'\\\[[0-9]+\]$') - bits_re = re.compile(r'[01?]*$') + ywfile_hierwitness_cache = inits, seqs, clocks, mems, smt_wires, smt_mems - for t, step in inyw.steps(): - present_signals, missing = step.present_signals(inyw.sigmap) - for sig in present_signals: - bits = step[sig] - if not bits_re.match(bits): - raise ValueError("unsupported bit value in Yosys witness file") + return ywfile_hierwitness_cache - sig_end = sig.offset + len(bits) - if sig.path in smt_wires: - for wire in smt_wires[sig.path]: - width, offset = wire["width"], wire["offset"] +def_bits_re = re.compile(r'([01]+)') - smt_bool = smt.net_width(topmod, wire["smtpath"]) == 1 +def smt_extract_mask(smt_expr, mask): + chunks = [] + def_bits = '' - offset = max(offset, 0) + mask_index_order = mask[::-1] - end = width + offset - common_offset = max(sig.offset, offset) - common_end = min(sig_end, end) - if common_end <= common_offset: - continue + for matched in def_bits_re.finditer(mask_index_order): + chunks.append(matched.span()) + def_bits += matched[0] - smt_expr = smt.witness_net_expr(topmod, f"s{t}", wire) + if not chunks: + return - if not smt_bool: - slice_high = common_end - offset - 1 - slice_low = common_offset - offset - smt_expr = "((_ extract %d %d) %s)" % (slice_high, slice_low, smt_expr) + if len(chunks) == 1: + start, end = chunks[0] + if start == 0 and end == len(mask_index_order): + combined_chunks = smt_expr + else: + combined_chunks = '((_ extract %d %d) %s)' % (end - 1, start, smt_expr) + else: + combined_chunks = '(let ((x %s)) (concat %s))' % (smt_expr, ' '.join( + '((_ extract %d %d) x)' % (end - 1, start) + for start, end in reversed(chunks) + )) - bit_slice = bits[len(bits) - (common_end - sig.offset):len(bits) - (common_offset - sig.offset)] + return combined_chunks, ''.join(mask_index_order[start:end] for start, end in chunks)[::-1] - if bit_slice.count("?") == len(bit_slice): - continue +def smt_concat(exprs): + if not isinstance(exprs, (tuple, list)): + exprs = tuple(exprs) + if not exprs: + return "" + if len(exprs) == 1: + return exprs[1] + return "(concat %s)" % ' '.join(exprs) - if smt_bool: - assert width == 1 - smt_constr = "(= %s %s)" % (smt_expr, "true" if bit_slice == "1" else "false") - else: - if "?" in bit_slice: - mask = bit_slice.replace("0", "1").replace("?", "0") - bit_slice = bit_slice.replace("?", "0") - smt_expr = "(bvand %s #b%s)" % (smt_expr, mask) +def ywfile_signal(sig, step, mask=None): + assert sig.width > 0 - smt_constr = "(= %s #b%s)" % (smt_expr, bit_slice) + inits, seqs, clocks, mems, smt_wires, smt_mems = ywfile_hierwitness() + sig_end = sig.offset + sig.width - constr_assumes[t].append((inywfile, smt_constr)) + output = [] - if sig.memory_path: - if sig.memory_path in smt_mems: - for mem in smt_mems[sig.memory_path]: - width, size, bv = mem["width"], mem["size"], mem["statebv"] + if sig.path in smt_wires: + for wire in smt_wires[sig.path]: + width, offset = wire["width"], wire["offset"] - smt_expr = smt.net_expr(topmod, f"s{t}", mem["smtpath"]) + smt_bool = smt.net_width(topmod, wire["smtpath"]) == 1 - if bv: - word_low = sig.memory_addr * width - word_high = word_low + width - 1 - smt_expr = "((_ extract %d %d) %s)" % (word_high, word_low, smt_expr) - else: - addr_width = (size - 1).bit_length() - addr_bits = f"{sig.memory_addr:0{addr_width}b}" - smt_expr = "(select %s #b%s )" % (smt_expr, addr_bits) + offset = max(offset, 0) - if len(bits) < width: - slice_high = sig.offset + len(bits) - 1 - smt_expr = "((_ extract %d %d) %s)" % (slice_high, sig.offset, smt_expr) + end = width + offset + common_offset = max(sig.offset, offset) + common_end = min(sig_end, end) + if common_end <= common_offset: + continue - bit_slice = bits + smt_expr = smt.witness_net_expr(topmod, f"s{step}", wire) - if "?" in bit_slice: - mask = bit_slice.replace("0", "1").replace("?", "0") - bit_slice = bit_slice.replace("?", "0") - smt_expr = "(bvand %s #b%s)" % (smt_expr, mask) + if not smt_bool: + slice_high = common_end - offset - 1 + slice_low = common_offset - offset + smt_expr = "((_ extract %d %d) %s)" % (slice_high, slice_low, smt_expr) + else: + smt_expr = "(ite %s #b1 #b0)" % smt_expr - smt_constr = "(= %s #b%s)" % (smt_expr, bit_slice) - constr_assumes[t].append((inywfile, smt_constr)) + output.append(((common_offset - sig.offset), (common_end - sig.offset), smt_expr)) - if not got_topt: - if not check_witness: - skip_steps = max(skip_steps, t) - num_steps = max(num_steps, t+1) + if sig.memory_path: + if sig.memory_path in smt_mems: + for mem in smt_mems[sig.memory_path]: + width, size, bv = mem["width"], mem["size"], mem["statebv"] + + smt_expr = smt.net_expr(topmod, f"s{step}", mem["smtpath"]) + + if bv: + word_low = sig.memory_addr * width + word_high = word_low + width - 1 + smt_expr = "((_ extract %d %d) %s)" % (word_high, word_low, smt_expr) + else: + addr_width = (size - 1).bit_length() + addr_bits = f"{sig.memory_addr:0{addr_width}b}" + smt_expr = "(select %s #b%s )" % (smt_expr, addr_bits) + + if sig.width < width: + slice_high = sig.offset + sig.width - 1 + smt_expr = "((_ extract %d %d) %s)" % (slice_high, sig.offset, smt_expr) + + output.append((0, sig.width, smt_expr)) + + output.sort() + + output = [chunk for chunk in output if chunk[0] != chunk[1]] + + pos = 0 + + for start, end, smt_expr in output: + assert start == pos + pos = end + + assert pos == sig.width + + if len(output) == 1: + return output[0][-1] + return smt_concat(smt_expr for start, end, smt_expr in reversed(output)) + +def ywfile_constraints(inywfile, constr_assumes, map_steps=None, skip_x=False): + global ywfile_hierwitness_cache + if map_steps is None: + map_steps = {} + + with open(inywfile, "r") as f: + inyw = ReadWitness(f) + + inits, seqs, clocks, mems, smt_wires, smt_mems = ywfile_hierwitness() + + bits_re = re.compile(r'[01?]*$') + max_t = -1 + + for t, step in inyw.steps(): + present_signals, missing = step.present_signals(inyw.sigmap) + for sig in present_signals: + bits = step[sig] + if skip_x: + bits = bits.replace('x', '?') + if not bits_re.match(bits): + raise ValueError("unsupported bit value in Yosys witness file") + + if bits.count('?') == len(bits): + continue + + smt_expr = ywfile_signal(sig, map_steps.get(t, t)) + + smt_expr, bits = smt_extract_mask(smt_expr, bits) + + smt_constr = "(= %s #b%s)" % (smt_expr, bits) + constr_assumes[t].append((inywfile, smt_constr)) + + max_t = t + return max_t + +if inywfile is not None: + if not got_topt: + skip_steps = 0 + num_steps = 0 + + max_t = ywfile_constraints(inywfile, constr_assumes) + + if not got_topt: + if not check_witness: + skip_steps = max(skip_steps, max_t) + num_steps = max(num_steps, max_t+1) if btorwitfile is not None: with open(btorwitfile, "r") as f: @@ -841,7 +942,7 @@ def print_msg(msg): skip_steps = step num_steps = step+1 -def collect_mem_trace_data(steps_start, steps_stop, vcd=None): +def collect_mem_trace_data(steps, vcd=None): mem_trace_data = dict() for mempath in sorted(smt.hiermems(topmod)): @@ -849,16 +950,16 @@ def collect_mem_trace_data(steps_start, steps_stop, vcd=None): expr_id = list() expr_list = list() - for i in range(steps_start, steps_stop): + for seq, i in enumerate(steps): for j in range(rports): - expr_id.append(('R', i-steps_start, j, 'A')) - expr_id.append(('R', i-steps_start, j, 'D')) + expr_id.append(('R', seq, j, 'A')) + expr_id.append(('R', seq, j, 'D')) expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "R%dA" % j)) expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "R%dD" % j)) for j in range(wports): - expr_id.append(('W', i-steps_start, j, 'A')) - expr_id.append(('W', i-steps_start, j, 'D')) - expr_id.append(('W', i-steps_start, j, 'M')) + expr_id.append(('W', seq, j, 'A')) + expr_id.append(('W', seq, j, 'D')) + expr_id.append(('W', seq, j, 'M')) expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "W%dA" % j)) expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "W%dD" % j)) expr_list.append(smt.mem_expr(topmod, "s%d" % i, mempath, "W%dM" % j)) @@ -943,14 +1044,14 @@ def collect_mem_trace_data(steps_start, steps_stop, vcd=None): netpath[-1] += "<%0*x>" % ((len(addr)+3) // 4, int_addr) vcd.add_net([topmod] + netpath, width) - for i in range(steps_start, steps_stop): + for seq, i in enumerate(steps): if i not in mem_trace_data: mem_trace_data[i] = list() - mem_trace_data[i].append((netpath, int_addr, "".join(tdata[i-steps_start]))) + mem_trace_data[i].append((netpath, int_addr, "".join(tdata[seq]))) return mem_trace_data -def write_vcd_trace(steps_start, steps_stop, index): +def write_vcd_trace(steps, index, seq_time=False): filename = vcdfile.replace("%", index) print_msg("Writing trace to VCD file: %s" % (filename)) @@ -971,10 +1072,10 @@ def write_vcd_trace(steps_start, steps_stop, index): vcd.add_clock([topmod] + netpath, edge) path_list.append(netpath) - mem_trace_data = collect_mem_trace_data(steps_start, steps_stop, vcd) + mem_trace_data = collect_mem_trace_data(steps, vcd) - for i in range(steps_start, steps_stop): - vcd.set_time(i) + for seq, i in enumerate(steps): + vcd.set_time(seq if seq_time else i) value_list = smt.get_net_bin_list(topmod, path_list, "s%d" % i) for path, value in zip(path_list, value_list): vcd.set_net([topmod] + path, value) @@ -982,7 +1083,14 @@ def write_vcd_trace(steps_start, steps_stop, index): for path, addr, value in mem_trace_data[i]: vcd.set_net([topmod] + path, value) - vcd.set_time(steps_stop) + if seq_time: + end_time = len(steps) + elif steps: + end_time = steps[-1] + 1 + else: + end_time = 0 + + vcd.set_time(end_time) def detect_state_loop(steps_start, steps_stop): print_msg(f"Checking for loops in found induction counter example") @@ -1027,7 +1135,7 @@ def escape_identifier(identifier): -def write_vlogtb_trace(steps_start, steps_stop, index): +def write_vlogtb_trace(steps, index): filename = vlogtbfile.replace("%", index) print_msg("Writing trace to Verilog testbench: %s" % (filename)) @@ -1092,7 +1200,7 @@ def write_vlogtb_trace(steps_start, steps_stop, index): print(" initial begin", file=f) regs = sorted(smt.hiernets(vlogtb_topmod, regs_only=True)) - regvals = smt.get_net_bin_list(vlogtb_topmod, regs, vlogtb_state.replace("@@step_idx@@", str(steps_start))) + regvals = smt.get_net_bin_list(vlogtb_topmod, regs, vlogtb_state.replace("@@step_idx@@", str(steps[0]))) print("`ifndef VERILATOR", file=f) print(" #1;", file=f) @@ -1107,7 +1215,7 @@ def write_vlogtb_trace(steps_start, steps_stop, index): anyconsts = sorted(smt.hieranyconsts(vlogtb_topmod)) for info in anyconsts: if info[3] is not None: - modstate = smt.net_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(steps_start)), info[0]) + modstate = smt.net_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(steps[0])), info[0]) value = smt.bv2bin(smt.get("(|%s| %s)" % (info[1], modstate))) print(" UUT.%s = %d'b%s;" % (".".join(escape_identifier(info[0] + [info[3]])), len(value), value), file=f); @@ -1117,7 +1225,7 @@ def write_vlogtb_trace(steps_start, steps_stop, index): addr_expr_list = list() data_expr_list = list() - for i in range(steps_start, steps_stop): + for i in steps: for j in range(rports): addr_expr_list.append(smt.mem_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(i)), mempath, "R%dA" % j)) data_expr_list.append(smt.mem_expr(vlogtb_topmod, vlogtb_state.replace("@@step_idx@@", str(i)), mempath, "R%dD" % j)) @@ -1138,7 +1246,7 @@ def write_vlogtb_trace(steps_start, steps_stop, index): print("", file=f) anyseqs = sorted(smt.hieranyseqs(vlogtb_topmod)) - for i in range(steps_start, steps_stop): + for i in steps: pi_names = [[name] for name, _ in primary_inputs if name not in clock_inputs] pi_values = smt.get_net_bin_list(vlogtb_topmod, pi_names, vlogtb_state.replace("@@step_idx@@", str(i))) @@ -1170,14 +1278,14 @@ def write_vlogtb_trace(steps_start, steps_stop, index): print(" end", file=f) print(" always @(posedge clock) begin", file=f) - print(" genclock <= cycle < %d;" % (steps_stop-1), file=f) + print(" genclock <= cycle < %d;" % (steps[-1]), file=f) print(" cycle <= cycle + 1;", file=f) print(" end", file=f) print("endmodule", file=f) -def write_constr_trace(steps_start, steps_stop, index): +def write_constr_trace(steps, index): filename = outconstr.replace("%", index) print_msg("Writing trace to constraints file: %s" % (filename)) @@ -1194,7 +1302,7 @@ def write_constr_trace(steps_start, steps_stop, index): constr_prefix = smtctop[1] + "." if smtcinit: - steps_start = steps_stop - 1 + steps = [steps[-1]] with open(filename, "w") as f: primary_inputs = list() @@ -1203,13 +1311,13 @@ def write_constr_trace(steps_start, steps_stop, index): width = smt.modinfo[constr_topmod].wsize[name] primary_inputs.append((name, width)) - if steps_start == 0 or smtcinit: + if steps[0] == 0 or smtcinit: print("initial", file=f) else: - print("state %d" % steps_start, file=f) + print("state %d" % steps[0], file=f) regnames = sorted(smt.hiernets(constr_topmod, regs_only=True)) - regvals = smt.get_net_list(constr_topmod, regnames, constr_state.replace("@@step_idx@@", str(steps_start))) + regvals = smt.get_net_list(constr_topmod, regnames, constr_state.replace("@@step_idx@@", str(steps[0]))) for name, val in zip(regnames, regvals): print("assume (= [%s%s] %s)" % (constr_prefix, ".".join(name), val), file=f) @@ -1220,7 +1328,7 @@ def write_constr_trace(steps_start, steps_stop, index): addr_expr_list = list() data_expr_list = list() - for i in range(steps_start, steps_stop): + for i in steps: for j in range(rports): addr_expr_list.append(smt.mem_expr(constr_topmod, constr_state.replace("@@step_idx@@", str(i)), mempath, "R%dA" % j)) data_expr_list.append(smt.mem_expr(constr_topmod, constr_state.replace("@@step_idx@@", str(i)), mempath, "R%dD" % j)) @@ -1236,7 +1344,7 @@ def write_constr_trace(steps_start, steps_stop, index): for addr, data in addr_data.items(): print("assume (= (select [%s%s] %s) %s)" % (constr_prefix, ".".join(mempath), addr, data), file=f) - for k in range(steps_start, steps_stop): + for k in steps: if not smtcinit: print("", file=f) print("state %d" % k, file=f) @@ -1247,11 +1355,14 @@ def write_constr_trace(steps_start, steps_stop, index): for name, val in zip(pi_names, pi_values): print("assume (= [%s%s] %s)" % (constr_prefix, ".".join(name), val), file=f) -def write_yw_trace(steps_start, steps_stop, index, allregs=False): - filename = outywfile.replace("%", index) - print_msg("Writing trace to Yosys witness file: %s" % (filename)) +def write_yw_trace(steps, index, allregs=False, filename=None): + if filename is None: + if outywfile is None: + return + filename = outywfile.replace("%", index) + print_msg("Writing trace to Yosys witness file: %s" % (filename)) - mem_trace_data = collect_mem_trace_data(steps_start, steps_stop) + mem_trace_data = collect_mem_trace_data(steps) with open(filename, "w") as f: inits, seqs, clocks, mems = smt.hierwitness(topmod, allregs) @@ -1295,18 +1406,28 @@ def write_yw_trace(steps_start, steps_stop, index, allregs=False): sig = yw.add_sig(word_path, overlap_start, overlap_end - overlap_start, True) mem_init_values.append((sig, overlap_bits.replace("x", "?"))) - for k in range(steps_start, steps_stop): + exprs = [] + all_sigs = [] + + for i, k in enumerate(steps): step_values = WitnessValues() - if k == steps_start: + if not i: for sig, value in mem_init_values: step_values[sig] = value sigs = inits + seqs else: sigs = seqs + exprs.extend(smt.witness_net_expr(topmod, f"s{k}", sig) for sig in sigs) + + all_sigs.append((step_values, sigs)) + + bvs = iter(smt.get_list(exprs)) + + for (step_values, sigs) in all_sigs: for sig in sigs: - value = smt.bv2bin(smt.get(smt.witness_net_expr(topmod, f"s{k}", sig))) + value = smt.bv2bin(next(bvs)) step_values[sig["sig"]] = value yw.step(step_values) @@ -1314,17 +1435,24 @@ def write_yw_trace(steps_start, steps_stop, index, allregs=False): def write_trace(steps_start, steps_stop, index, allregs=False): + if steps_stop is None: + steps = steps_start + seq_time = True + else: + steps = list(range(steps_start, steps_stop)) + seq_time = False + if vcdfile is not None: - write_vcd_trace(steps_start, steps_stop, index) + write_vcd_trace(steps, index, seq_time=seq_time) if vlogtbfile is not None: - write_vlogtb_trace(steps_start, steps_stop, index) + write_vlogtb_trace(steps, index) if outconstr is not None: - write_constr_trace(steps_start, steps_stop, index) + write_constr_trace(steps, index) if outywfile is not None: - write_yw_trace(steps_start, steps_stop, index, allregs) + write_yw_trace(steps, index, allregs) def print_failed_asserts_worker(mod, state, path, extrainfo, infomap, infokey=()): @@ -1442,6 +1570,44 @@ def get_active_assert_map(step, active): return assert_map +assume_enables = {} + +def declare_assume_enables(): + def recurse(mod, path, key_base=()): + for expr, desc in smt.modinfo[mod].assumes.items(): + enable = f"|assume_enable {len(assume_enables)}|" + smt.smt2_assumptions[(expr, key_base)] = enable + smt.write(f"(declare-const {enable} Bool)") + assume_enables[(expr, key_base)] = (enable, path, desc) + + for cell, submod in smt.modinfo[mod].cells.items(): + recurse(submod, f"{path}.{cell}", (mod, cell, key_base)) + + recurse(topmod, topmod) + +if track_assumes: + declare_assume_enables() + +def smt_assert_design_assumes(step): + if not track_assumes: + smt_assert_consequent("(|%s_u| s%d)" % (topmod, step)) + return + + if not assume_enables: + return + + def expr_for_assume(assume_key, base=None): + expr, key_base = assume_key + expr_prefix = f"(|{expr}| " + expr_suffix = ")" + while key_base: + mod, cell, key_base = key_base + expr_prefix += f"(|{mod}_h {cell}| " + expr_suffix += ")" + return f"{expr_prefix} s{step}{expr_suffix}" + + for assume_key, (enable, path, desc) in assume_enables.items(): + smt_assert_consequent(f"(=> {enable} {expr_for_assume(assume_key)})") states = list() asserts_antecedent_cache = [list()] @@ -1596,7 +1762,18 @@ def smt_check_sat(expected=["sat", "unsat"]): smt_forall_assert() return smt.check_sat(expected=expected) -if tempind: +def report_tracked_assumptions(msg): + if track_assumes: + print_msg(msg) + for key in smt.get_unsat_assumptions(minimize=minimize_assumes): + enable, path, descr = assume_enables[key] + print_msg(f" In {path}: {descr}") + + +if incremental: + incremental.mainloop() + +elif tempind: retstatus = "FAILED" skip_counter = step_size for step in range(num_steps, -1, -1): @@ -1605,7 +1782,7 @@ def smt_check_sat(expected=["sat", "unsat"]): break smt_state(step) - smt_assert_consequent("(|%s_u| s%d)" % (topmod, step)) + smt_assert_design_assumes(step) smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step)) smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step)) smt_assert_consequent(get_constr_expr(constr_assumes, step)) @@ -1648,6 +1825,7 @@ def smt_check_sat(expected=["sat", "unsat"]): else: print_msg("Temporal induction successful.") + report_tracked_assumptions("Used assumptions:") retstatus = "PASSED" break @@ -1673,7 +1851,7 @@ def smt_check_sat(expected=["sat", "unsat"]): while step < num_steps: smt_state(step) - smt_assert_consequent("(|%s_u| s%d)" % (topmod, step)) + smt_assert_design_assumes(step) smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step)) smt_assert_consequent(get_constr_expr(constr_assumes, step)) @@ -1694,6 +1872,7 @@ def smt_check_sat(expected=["sat", "unsat"]): smt_assert("(distinct (covers_%d s%d) #b%s)" % (coveridx, step, "0" * len(cover_desc))) if smt_check_sat() == "unsat": + report_tracked_assumptions("Used assumptions:") smt_pop() break @@ -1702,13 +1881,14 @@ def smt_check_sat(expected=["sat", "unsat"]): print_msg("Appending additional step %d." % i) smt_state(i) smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, i)) - smt_assert_consequent("(|%s_u| s%d)" % (topmod, i)) + smt_assert_design_assumes(i) smt_assert_antecedent("(|%s_h| s%d)" % (topmod, i)) smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, i-1, i)) smt_assert_consequent(get_constr_expr(constr_assumes, i)) print_msg("Re-solving with appended steps..") if smt_check_sat() == "unsat": print("%s Cannot appended steps without violating assumptions!" % smt.timestamp()) + report_tracked_assumptions("Conflicting assumptions:") found_failed_assert = True retstatus = "FAILED" break @@ -1764,7 +1944,7 @@ def smt_check_sat(expected=["sat", "unsat"]): retstatus = "PASSED" while step < num_steps: smt_state(step) - smt_assert_consequent("(|%s_u| s%d)" % (topmod, step)) + smt_assert_design_assumes(step) smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step)) smt_assert_consequent(get_constr_expr(constr_assumes, step)) @@ -1794,7 +1974,7 @@ def smt_check_sat(expected=["sat", "unsat"]): if step+i < num_steps: smt_state(step+i) smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, step+i)) - smt_assert_consequent("(|%s_u| s%d)" % (topmod, step+i)) + smt_assert_design_assumes(step + i) smt_assert_antecedent("(|%s_h| s%d)" % (topmod, step+i)) smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, step+i-1, step+i)) smt_assert_consequent(get_constr_expr(constr_assumes, step+i)) @@ -1808,7 +1988,8 @@ def smt_check_sat(expected=["sat", "unsat"]): print_msg("Checking assumptions in steps %d to %d.." % (step, last_check_step)) if smt_check_sat() == "unsat": - print("%s Assumptions are unsatisfiable!" % smt.timestamp()) + print_msg("Assumptions are unsatisfiable!") + report_tracked_assumptions("Conficting assumptions:") retstatus = "PREUNSAT" break @@ -1861,13 +2042,14 @@ def smt_check_sat(expected=["sat", "unsat"]): print_msg("Appending additional step %d." % i) smt_state(i) smt_assert_antecedent("(not (|%s_is| s%d))" % (topmod, i)) - smt_assert_consequent("(|%s_u| s%d)" % (topmod, i)) + smt_assert_design_assumes(i) smt_assert_antecedent("(|%s_h| s%d)" % (topmod, i)) smt_assert_antecedent("(|%s_t| s%d s%d)" % (topmod, i-1, i)) smt_assert_consequent(get_constr_expr(constr_assumes, i)) print_msg("Re-solving with appended steps..") if smt_check_sat() == "unsat": - print("%s Cannot append steps without violating assumptions!" % smt.timestamp()) + print_msg("Cannot append steps without violating assumptions!") + report_tracked_assumptions("Conflicting assumptions:") retstatus = "FAILED" break print_anyconsts(step) @@ -1954,5 +2136,6 @@ def smt_check_sat(expected=["sat", "unsat"]): smt.write("(exit)") smt.wait() -print_msg("Status: %s" % retstatus) -sys.exit(0 if retstatus == "PASSED" else 1) +if not incremental: + print_msg("Status: %s" % retstatus) + sys.exit(0 if retstatus == "PASSED" else 1) diff --git a/yosys/backends/smt2/smtbmc_incremental.py b/yosys/backends/smt2/smtbmc_incremental.py new file mode 100644 index 00000000000..0bd280b4a48 --- /dev/null +++ b/yosys/backends/smt2/smtbmc_incremental.py @@ -0,0 +1,616 @@ +from collections import defaultdict +import json +import typing +import ywio + +if typing.TYPE_CHECKING: + import smtbmc +else: + import sys + + smtbmc = sys.modules["__main__"] + + +class InteractiveError(Exception): + pass + + +def mkkey(data): + if isinstance(data, list): + return tuple(map(mkkey, data)) + elif isinstance(data, dict): + raise InteractiveError(f"JSON objects found in assumption key: {data!r}") + return data + + +class Incremental: + def __init__(self): + self.traceidx = 0 + + self.state_set = set() + self.map_cache = {} + + self._cached_hierwitness = {} + self._witness_index = None + + self._yw_constraints = {} + self._define_sorts = {} + + def setup(self): + generic_assert_map = smtbmc.get_assert_map( + smtbmc.topmod, "state", smtbmc.topmod + ) + self.inv_generic_assert_map = { + tuple(data[1:]): key for key, data in generic_assert_map.items() + } + assert len(self.inv_generic_assert_map) == len(generic_assert_map) + + def print_json(self, **kwargs): + print(json.dumps(kwargs), flush=True) + + def print_msg(self, msg): + self.print_json(msg=msg) + + def get_cached_assert(self, step, name): + try: + assert_map = self.map_cache[step] + except KeyError: + assert_map = self.map_cache[step] = smtbmc.get_assert_map( + smtbmc.topmod, f"s{step}", smtbmc.topmod + ) + return assert_map[self.inv_generic_assert_map[name]][0] + + def arg_step(self, cmd, declare=False, name="step", optional=False): + step = cmd.get(name, None) + if step is None and optional: + return None + if not isinstance(step, int): + if optional: + raise InteractiveError(f"{name} must be an integer") + else: + raise InteractiveError(f"integer {name} argument required") + if declare and step in self.state_set: + raise InteractiveError(f"step {step} already declared") + if not declare and step not in self.state_set: + raise InteractiveError(f"step {step} not declared") + return step + + def expr_arg_len(self, expr, min_len, max_len=-1): + if max_len == -1: + max_len = min_len + arg_len = len(expr) - 1 + + if min_len is not None and arg_len < min_len: + if min_len == max_len: + raise InteractiveError( + f"{json.dumps(expr[0])} expression must have " + f"{min_len} argument{'s' if min_len != 1 else ''}" + ) + else: + raise InteractiveError( + f"{json.dumps(expr[0])} expression must have at least " + f"{min_len} argument{'s' if min_len != 1 else ''}" + ) + if max_len is not None and arg_len > max_len: + raise InteractiveError( + f"{json.dumps(expr[0])} expression can have at most " + f"{min_len} argument{'s' if max_len != 1 else ''}" + ) + + def expr_step(self, expr, smt_out): + self.expr_arg_len(expr, 1) + step = expr[1] + if step not in self.state_set: + raise InteractiveError(f"step {step} not declared") + smt_out.append(f"s{step}") + return "module", smtbmc.topmod + + def expr_cell(self, expr, smt_out): + self.expr_arg_len(expr, 2) + position = len(smt_out) + smt_out.append(None) + arg_sort = self.expr(expr[2], smt_out, required_sort=["module", None]) + smt_out.append(")") + module = arg_sort[1] + cell = expr[1] + submod = smtbmc.smt.modinfo[module].cells.get(cell) + if submod is None: + raise InteractiveError(f"module {module!r} has no cell {cell!r}") + smt_out[position] = f"(|{module}_h {cell}| " + return ("module", submod) + + def expr_mod_constraint(self, expr, smt_out): + suffix = expr[0][3:] + self.expr_arg_len(expr, 1, 2 if suffix in ["_a", "_u", "_c"] else 1) + position = len(smt_out) + smt_out.append(None) + arg_sort = self.expr(expr[-1], smt_out, required_sort=["module", None]) + module = arg_sort[1] + if len(expr) == 3: + smt_out[position] = f"(|{module}{suffix} {expr[1]}| " + else: + smt_out[position] = f"(|{module}{suffix}| " + smt_out.append(")") + return "Bool" + + def expr_mod_constraint2(self, expr, smt_out): + self.expr_arg_len(expr, 2) + + position = len(smt_out) + smt_out.append(None) + arg_sort = self.expr(expr[1], smt_out, required_sort=["module", None]) + smt_out.append(" ") + self.expr(expr[2], smt_out, required_sort=arg_sort) + module = arg_sort[1] + suffix = expr[0][3:] + smt_out[position] = f"(|{module}{suffix}| " + smt_out.append(")") + return "Bool" + + def expr_not(self, expr, smt_out): + self.expr_arg_len(expr, 1) + + smt_out.append("(not ") + self.expr(expr[1], smt_out, required_sort="Bool") + smt_out.append(")") + return "Bool" + + def expr_eq(self, expr, smt_out): + self.expr_arg_len(expr, 2) + + smt_out.append("(= ") + arg_sort = self.expr(expr[1], smt_out) + if ( + smtbmc.smt.unroll + and isinstance(arg_sort, (list, tuple)) + and arg_sort[0] == "module" + ): + raise InteractiveError("state equality not supported in unroll mode") + + smt_out.append(" ") + self.expr(expr[2], smt_out, required_sort=arg_sort) + smt_out.append(")") + return "Bool" + + def expr_andor(self, expr, smt_out): + if len(expr) == 1: + smt_out.push({"and": "true", "or": "false"}[expr[0]]) + elif len(expr) == 2: + self.expr(expr[1], smt_out, required_sort="Bool") + else: + sep = f"({expr[0]} " + for arg in expr[1:]: + smt_out.append(sep) + sep = " " + self.expr(arg, smt_out, required_sort="Bool") + smt_out.append(")") + return "Bool" + + def expr_bv_binop(self, expr, smt_out): + self.expr_arg_len(expr, 2) + + smt_out.append(f"({expr[0]} ") + arg_sort = self.expr(expr[1], smt_out, required_sort=("BitVec", None)) + smt_out.append(" ") + self.expr(expr[2], smt_out, required_sort=arg_sort) + smt_out.append(")") + return arg_sort + + def expr_extract(self, expr, smt_out): + self.expr_arg_len(expr, 3) + + hi = expr[1] + lo = expr[2] + + smt_out.append(f"((_ extract {hi} {lo}) ") + + arg_sort = self.expr(expr[3], smt_out, required_sort=("BitVec", None)) + smt_out.append(")") + + if not (isinstance(hi, int) and 0 <= hi < arg_sort[1]): + raise InteractiveError( + f"high bit index must be 0 <= index < {arg_sort[1]}, is {hi!r}" + ) + if not (isinstance(lo, int) and 0 <= lo <= hi): + raise InteractiveError( + f"low bit index must be 0 <= index < {hi}, is {lo!r}" + ) + + return "BitVec", hi - lo + 1 + + def expr_bv(self, expr, smt_out): + self.expr_arg_len(expr, 1) + + arg = expr[1] + if not isinstance(arg, str) or arg.count("0") + arg.count("1") != len(arg): + raise InteractiveError("bv argument must contain only 0 or 1 bits") + + smt_out.append("#b" + arg) + + return "BitVec", len(arg) + + def expr_yw(self, expr, smt_out): + self.expr_arg_len(expr, 1, 2) + if len(expr) == 2: + name = None + step = expr[1] + elif len(expr) == 3: + name = expr[1] + step = expr[2] + + if step not in self.state_set: + raise InteractiveError(f"step {step} not declared") + + if name not in self._yw_constraints: + raise InteractiveError(f"no yw file loaded as name {name!r}") + + constraints = self._yw_constraints[name].get(step, []) + + if len(constraints) == 0: + smt_out.append("true") + elif len(constraints) == 1: + smt_out.append(constraints[0]) + else: + sep = "(and " + for constraint in constraints: + smt_out.append(sep) + sep = " " + smt_out.append(constraint) + smt_out.append(")") + + return "Bool" + + def expr_yw_sig(self, expr, smt_out): + self.expr_arg_len(expr, 3, 4) + + step = expr[1] + path = expr[2] + offset = expr[3] + width = expr[4] if len(expr) == 5 else 1 + + if not isinstance(offset, int) or offset < 0: + raise InteractiveError( + f"offset must be a non-negative integer, got {json.dumps(offset)}" + ) + + if not isinstance(width, int) or width <= 0: + raise InteractiveError( + f"width must be a positive integer, got {json.dumps(width)}" + ) + + if not isinstance(path, list) or not all(isinstance(s, str) for s in path): + raise InteractiveError( + f"path must be a string list, got {json.dumps(path)}" + ) + + if step not in self.state_set: + raise InteractiveError(f"step {step} not declared") + + smt_expr = smtbmc.ywfile_signal( + ywio.WitnessSig(path=path, offset=offset, width=width), step + ) + + smt_out.append(smt_expr) + + return "BitVec", width + + def expr_smtlib(self, expr, smt_out): + self.expr_arg_len(expr, 2) + + smtlib_expr = expr[1] + sort = expr[2] + + if not isinstance(smtlib_expr, str): + raise InteractiveError( + "raw SMT-LIB expression has to be a string, " + f"got {json.dumps(smtlib_expr)}" + ) + + if ( + isinstance(sort, list) + and len(sort) == 2 + and sort[0] == "BitVec" + and (sort[1] is None or isinstance(sort[1], int)) + ): + sort = tuple(sort) + elif not isinstance(sort, str): + raise InteractiveError(f"unsupported raw SMT-LIB sort {json.dumps(sort)}") + + smt_out.append(smtlib_expr) + return sort + + def expr_label(self, expr, smt_out): + if len(expr) != 3: + raise InteractiveError( + f'expected ["!", label, sub_expr], got {json.dumps(expr)}' + ) + label = expr[1] + subexpr = expr[2] + + if not isinstance(label, str): + raise InteractiveError("expression label has to be a string") + + smt_out.append("(! ") + sort = self.expr(subexpr, smt_out) + smt_out.append(" :named ") + smt_out.append(label) + smt_out.append(")") + + return sort + + def expr_def(self, expr, smt_out): + self.expr_arg_len(expr, 1) + sort = self._define_sorts.get(expr[1]) + if sort is None: + raise InteractiveError(f"unknown definition {json.dumps(expr)}") + smt_out.append(expr[1]) + return sort + + expr_handlers = { + "step": expr_step, + "cell": expr_cell, + "mod_h": expr_mod_constraint, + "mod_is": expr_mod_constraint, + "mod_i": expr_mod_constraint, + "mod_a": expr_mod_constraint, + "mod_u": expr_mod_constraint, + "mod_t": expr_mod_constraint2, + "not": expr_not, + "and": expr_andor, + "or": expr_andor, + "bv": expr_bv, + "bvand": expr_bv_binop, + "bvor": expr_bv_binop, + "bvxor": expr_bv_binop, + "extract": expr_extract, + "def": expr_def, + "=": expr_eq, + "yw": expr_yw, + "yw_sig": expr_yw_sig, + "smtlib": expr_smtlib, + "!": expr_label, + } + + def expr(self, expr, smt_out, required_sort=None): + if not isinstance(expr, (list, tuple)) or not expr: + raise InteractiveError( + f"expression must be a non-empty JSON array, found: {json.dumps(expr)}" + ) + name = expr[0] + + handler = self.expr_handlers.get(name) + if handler: + sort = handler(self, expr, smt_out) + + if required_sort is not None: + if isinstance(required_sort, (list, tuple)): + if ( + not isinstance(sort, (list, tuple)) + or len(sort) != len(required_sort) + or any( + r is not None and r != s + for r, s in zip(required_sort, sort) + ) + ): + raise InteractiveError( + f"required sort {json.dumps(required_sort)} " + f"found sort {json.dumps(sort)}" + ) + return sort + raise InteractiveError(f"unknown expression {json.dumps(expr[0])}") + + def expr_smt(self, expr, required_sort): + return self.expr_smt_and_sort(expr, required_sort)[0] + + def expr_smt_and_sort(self, expr, required_sort=None): + smt_out = [] + output_sort = self.expr(expr, smt_out, required_sort=required_sort) + out = "".join(smt_out) + return out, output_sort + + def cmd_new_step(self, cmd): + step = self.arg_step(cmd, declare=True) + self.state_set.add(step) + smtbmc.smt_state(step) + + def cmd_assert(self, cmd): + name = cmd.get("cmd") + + assert_fn = { + "assert_antecedent": smtbmc.smt_assert_antecedent, + "assert_consequent": smtbmc.smt_assert_consequent, + "assert": smtbmc.smt_assert, + }[name] + + assert_fn(self.expr_smt(cmd.get("expr"), "Bool")) + + def cmd_assert_design_assumes(self, cmd): + step = self.arg_step(cmd) + smtbmc.smt_assert_design_assumes(step) + + def cmd_get_design_assume(self, cmd): + key = mkkey(cmd.get("key")) + return smtbmc.assume_enables.get(key) + + def cmd_update_assumptions(self, cmd): + expr = cmd.get("expr") + key = cmd.get("key") + + key = mkkey(key) + + result = smtbmc.smt.smt2_assumptions.pop(key, None) + if expr is not None: + expr = self.expr_smt(expr, "Bool") + smtbmc.smt.smt2_assumptions[key] = expr + return result + + def cmd_get_unsat_assumptions(self, cmd): + return smtbmc.smt.get_unsat_assumptions(minimize=bool(cmd.get("minimize"))) + + def cmd_push(self, cmd): + smtbmc.smt_push() + + def cmd_pop(self, cmd): + smtbmc.smt_pop() + + def cmd_check(self, cmd): + return smtbmc.smt_check_sat() + + def cmd_smtlib(self, cmd): + command = cmd.get("command") + response = cmd.get("response", False) + if not isinstance(command, str): + raise InteractiveError( + f"raw SMT-LIB command must be a string, found {json.dumps(command)}" + ) + smtbmc.smt.write(command) + if response: + return smtbmc.smt.read() + + def cmd_define(self, cmd): + expr = cmd.get("expr") + if expr is None: + raise InteractiveError("'define' copmmand requires 'expr' parameter") + + expr, sort = self.expr_smt_and_sort(expr) + + if isinstance(sort, tuple) and sort[0] == "module": + raise InteractiveError("'define' does not support module sorts") + + define_name = f"|inc def {len(self._define_sorts)}|" + + self._define_sorts[define_name] = sort + + if isinstance(sort, tuple): + sort = f"(_ {' '.join(map(str, sort))})" + + smtbmc.smt.write(f"(define-const {define_name} {sort} {expr})") + + return {"name": define_name} + + def cmd_design_hierwitness(self, cmd=None): + allregs = (cmd is None) or bool(cmd.get("allreges", False)) + if self._cached_hierwitness[allregs] is not None: + return self._cached_hierwitness[allregs] + inits, seqs, clocks, mems = smtbmc.smt.hierwitness(smtbmc.topmod, allregs) + self._cached_hierwitness[allregs] = result = dict( + inits=inits, seqs=seqs, clocks=clocks, mems=mems + ) + return result + + def cmd_write_yw_trace(self, cmd): + steps = cmd.get("steps") + allregs = bool(cmd.get("allregs", False)) + + if steps is None: + steps = sorted(self.state_set) + + path = cmd.get("path") + + smtbmc.write_yw_trace(steps, self.traceidx, allregs=allregs, filename=path) + + if path is None: + self.traceidx += 1 + + def cmd_read_yw_trace(self, cmd): + steps = cmd.get("steps") + path = cmd.get("path") + name = cmd.get("name") + skip_x = cmd.get("skip_x", False) + if path is None: + raise InteractiveError("path required") + + constraints = defaultdict(list) + + if steps is None: + steps = sorted(self.state_set) + + map_steps = {i: int(j) for i, j in enumerate(steps)} + + last_step = smtbmc.ywfile_constraints( + path, constraints, map_steps=map_steps, skip_x=skip_x + ) + + self._yw_constraints[name] = { + map_steps.get(i, i): [smtexpr for cexfile, smtexpr in constraint_list] + for i, constraint_list in constraints.items() + } + + return dict(last_step=last_step) + + def cmd_modinfo(self, cmd): + fields = cmd.get("fields", []) + + mod = cmd.get("mod") + if mod is None: + mod = smtbmc.topmod + modinfo = smtbmc.smt.modinfo.get(mod) + if modinfo is None: + return None + + result = dict(name=mod) + for field in fields: + result[field] = getattr(modinfo, field, None) + return result + + def cmd_ping(self, cmd): + return cmd + + cmd_handlers = { + "new_step": cmd_new_step, + "assert": cmd_assert, + "assert_antecedent": cmd_assert, + "assert_consequent": cmd_assert, + "assert_design_assumes": cmd_assert_design_assumes, + "get_design_assume": cmd_get_design_assume, + "update_assumptions": cmd_update_assumptions, + "get_unsat_assumptions": cmd_get_unsat_assumptions, + "push": cmd_push, + "pop": cmd_pop, + "check": cmd_check, + "smtlib": cmd_smtlib, + "define": cmd_define, + "design_hierwitness": cmd_design_hierwitness, + "write_yw_trace": cmd_write_yw_trace, + "read_yw_trace": cmd_read_yw_trace, + "modinfo": cmd_modinfo, + "ping": cmd_ping, + } + + def handle_command(self, cmd): + if not isinstance(cmd, dict) or "cmd" not in cmd: + raise InteractiveError('object with "cmd" key required') + + name = cmd.get("cmd", None) + + handler = self.cmd_handlers.get(name) + if handler: + return handler(self, cmd) + else: + raise InteractiveError(f"unknown command: {name}") + + def mainloop(self): + self.setup() + while True: + try: + cmd = input().strip() + if not cmd or cmd.startswith("#") or cmd.startswith("//"): + continue + try: + cmd = json.loads(cmd) + except json.decoder.JSONDecodeError as e: + self.print_json(err=f"invalid JSON: {e}") + continue + except EOFError: + break + + try: + result = self.handle_command(cmd) + except InteractiveError as e: + self.print_json(err=str(e)) + continue + except Exception as e: + self.print_json(err=f"internal error: {e}") + raise + else: + self.print_json(ok=result) diff --git a/yosys/backends/smt2/smtio.py b/yosys/backends/smt2/smtio.py index 0ec7f08f4dc..5fc3ab5a424 100644 --- a/yosys/backends/smt2/smtio.py +++ b/yosys/backends/smt2/smtio.py @@ -79,6 +79,20 @@ def except_hook(exctype, value, traceback): sys.excepthook = except_hook +def recursion_helper(iteration, *request): + stack = [iteration(*request)] + + while stack: + top = stack.pop() + try: + request = next(top) + except StopIteration: + continue + + stack.append(top) + stack.append(iteration(*request)) + + hex_dict = { "0": "0000", "1": "0001", "2": "0010", "3": "0011", "4": "0100", "5": "0101", "6": "0110", "7": "0111", @@ -100,6 +114,7 @@ def __init__(self): self.clocks = dict() self.cells = dict() self.asserts = dict() + self.assumes = dict() self.covers = dict() self.maximize = set() self.minimize = set() @@ -127,6 +142,7 @@ def __init__(self, opts=None): self.recheck = False self.smt2cache = [list()] self.smt2_options = dict() + self.smt2_assumptions = dict() self.p = None self.p_index = solvers_index solvers_index += 1 @@ -144,6 +160,7 @@ def __init__(self, opts=None): self.noincr = opts.noincr self.info_stmts = opts.info_stmts self.nocomments = opts.nocomments + self.smt2_options.update(opts.smt2_options) else: self.solver = "yices" @@ -298,10 +315,22 @@ def replace_in_stmt(self, stmt, pat, repl): return stmt def unroll_stmt(self, stmt): + result = [] + recursion_helper(self._unroll_stmt_into, stmt, result) + return result.pop() + + def _unroll_stmt_into(self, stmt, output, depth=128): if not isinstance(stmt, list): - return stmt + output.append(stmt) + return - stmt = [self.unroll_stmt(s) for s in stmt] + new_stmt = [] + for s in stmt: + if depth: + yield from self._unroll_stmt_into(s, new_stmt, depth - 1) + else: + yield s, new_stmt + stmt = new_stmt if len(stmt) >= 2 and not isinstance(stmt[0], list) and stmt[0] in self.unroll_decls: assert stmt[1] in self.unroll_objs @@ -330,12 +359,19 @@ def unroll_stmt(self, stmt): decl[2] = list() if len(decl) > 0: - decl = self.unroll_stmt(decl) + tmp = [] + if depth: + yield from self._unroll_stmt_into(decl, tmp, depth - 1) + else: + yield decl, tmp + + decl = tmp.pop() self.write(self.unparse(decl), unroll=False) - return self.unroll_cache[key] + output.append(self.unroll_cache[key]) + return - return stmt + output.append(stmt) def p_thread_main(self): while True: @@ -569,6 +605,12 @@ def info(self, stmt): else: self.modinfo[self.curmod].covers["%s_c %s" % (self.curmod, fields[2])] = fields[3] + if fields[1] == "yosys-smt2-assume": + if len(fields) > 4: + self.modinfo[self.curmod].assumes["%s_u %s" % (self.curmod, fields[2])] = f'{fields[4]} ({fields[3]})' + else: + self.modinfo[self.curmod].assumes["%s_u %s" % (self.curmod, fields[2])] = fields[3] + if fields[1] == "yosys-smt2-maximize": self.modinfo[self.curmod].maximize.add(fields[2]) @@ -752,8 +794,13 @@ def read(self): return stmt def check_sat(self, expected=["sat", "unsat", "unknown", "timeout", "interrupted"]): + if self.smt2_assumptions: + assume_exprs = " ".join(self.smt2_assumptions.values()) + check_stmt = f"(check-sat-assuming ({assume_exprs}))" + else: + check_stmt = "(check-sat)" if self.debug_print: - print("> (check-sat)") + print(f"> {check_stmt}") if self.debug_file and not self.nocomments: print("; running check-sat..", file=self.debug_file) self.debug_file.flush() @@ -767,7 +814,7 @@ def check_sat(self, expected=["sat", "unsat", "unknown", "timeout", "interrupted for cache_stmt in cache_ctx: self.p_write(cache_stmt + "\n", False) - self.p_write("(check-sat)\n", True) + self.p_write(f"{check_stmt}\n", True) if self.timeinfo: i = 0 @@ -835,7 +882,7 @@ def check_sat(self, expected=["sat", "unsat", "unknown", "timeout", "interrupted if self.debug_file: print("(set-info :status %s)" % result, file=self.debug_file) - print("(check-sat)", file=self.debug_file) + print(check_stmt, file=self.debug_file) self.debug_file.flush() if result not in expected: @@ -912,6 +959,55 @@ def bv2bin(self, v): def bv2int(self, v): return int(self.bv2bin(v), 2) + def get_raw_unsat_assumptions(self): + if not self.smt2_assumptions: + return [] + self.write("(get-unsat-assumptions)") + exprs = set(self.unparse(part) for part in self.parse(self.read())) + unsat_assumptions = [] + for key, value in self.smt2_assumptions.items(): + # normalize expression + value = self.unparse(self.parse(value)) + if value in exprs: + exprs.remove(value) + unsat_assumptions.append(key) + return unsat_assumptions + + def get_unsat_assumptions(self, minimize=False): + if not minimize: + return self.get_raw_unsat_assumptions() + orig_assumptions = self.smt2_assumptions + + self.smt2_assumptions = dict(orig_assumptions) + + required_assumptions = {} + + while True: + candidate_assumptions = {} + for key in self.get_raw_unsat_assumptions(): + if key not in required_assumptions: + candidate_assumptions[key] = self.smt2_assumptions[key] + + while candidate_assumptions: + + candidate_key, candidate_assume = candidate_assumptions.popitem() + + self.smt2_assumptions = {} + for key, assume in candidate_assumptions.items(): + self.smt2_assumptions[key] = assume + for key, assume in required_assumptions.items(): + self.smt2_assumptions[key] = assume + result = self.check_sat() + + if result == 'unsat': + candidate_assumptions = None + else: + required_assumptions[candidate_key] = candidate_assume + + if candidate_assumptions is not None: + self.smt2_assumptions = orig_assumptions + return list(required_assumptions) + def get(self, expr): self.write("(get-value (%s))" % (expr)) return self.parse(self.read())[0][1] @@ -920,7 +1016,7 @@ def get_list(self, expr_list): if len(expr_list) == 0: return [] self.write("(get-value (%s))" % " ".join(expr_list)) - return [n[1] for n in self.parse(self.read())] + return [n[1] for n in self.parse(self.read()) if n] def get_path(self, mod, path): assert mod in self.modinfo @@ -1058,7 +1154,7 @@ def wait(self): class SmtOpts: def __init__(self): self.shortopts = "s:S:v" - self.longopts = ["unroll", "noincr", "noprogress", "timeout=", "dump-smt2=", "logic=", "dummy=", "info=", "nocomments"] + self.longopts = ["unroll", "noincr", "noprogress", "timeout=", "dump-smt2=", "logic=", "dummy=", "info=", "nocomments", "smt2-option="] self.solver = "yices" self.solver_opts = list() self.debug_print = False @@ -1071,6 +1167,7 @@ def __init__(self): self.logic = None self.info_stmts = list() self.nocomments = False + self.smt2_options = {} def handle(self, o, a): if o == "-s": @@ -1097,6 +1194,13 @@ def handle(self, o, a): self.info_stmts.append(a) elif o == "--nocomments": self.nocomments = True + elif o == "--smt2-option": + args = a.split('=', 1) + if len(args) != 2: + print("--smt2-option expects an