f4pga and surelog upgrade

verilog-to-routing · Sep 9, 2023 · c44006e · c44006e
1 parent cb8c7de
commit c44006e
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/libs/EXTERNAL/CMakeLists.txt b/libs/EXTERNAL/CMakeLists.txt
@@ -30,7 +30,7 @@ if (${WITH_PARMYS})
                 PREFIX "surelog"
 
                 GIT_REPOSITORY https://github.com/chipsalliance/Surelog.git
-                GIT_TAG v1.71
+                GIT_TAG v1.74
                 GIT_PROGRESS TRUE
 
                 # setting source, build and install directories
@@ -61,7 +61,7 @@ if (${WITH_PARMYS})
                 PREFIX "f4pga-plugins"
 
                 GIT_REPOSITORY https://github.com/chipsalliance/yosys-f4pga-plugins.git
-                GIT_TAG v1.20230808
+                GIT_TAG v1.20230906
                 GIT_PROGRESS TRUE
 
                 # setting source, build and install directories