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practica 1 #81

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25 changes: 25 additions & 0 deletions Laboratorios/Lab1/Manzano Nava/README.md
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# **Manejo de Rasp**
En esta práctica vimos como cargar el sistema operativo de Rapbian en Raspberry y como utilizar la Raspberry por **SSH**, **VNC** , **UART**, **PC DE ESCRITORIO**

## **ESCRITORIO**
![ Iimagen como PC](https://github.com/Eriick08/embebidos-20-1/blob/master/Laboratorios/Lab1/Manzano%20Nava/pc)

## **SSH**
![ Iimagen con ssh](https://github.com/Eriick08/embebidos-20-1/blob/master/Laboratorios/Lab1/Manzano%20Nava/UART.png)


## **VNC**
![ Iimagen con vnc](/SSH.jpg)


## **UART**
![ Iimagen con uart](/UART.png)

### **Nombres**:
Manzano Nava Erick.
Mejía Mendoza Diana Laura
Rubio Morin Raymundo.

**Equipo 12**


Binary file added Laboratorios/Lab1/Manzano Nava/SSH.jpg
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Binary file added Laboratorios/Lab1/Manzano Nava/UART.png
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Binary file added Laboratorios/Lab1/Manzano Nava/VNC.jpg
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23 changes: 23 additions & 0 deletions Laboratorios/Lab1/Manzano Nava/fuse.log
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Running: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib secureip -o C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb_isim_beh.exe -prj C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb_beh.prj work.pilatb
ISim P.20131013 (signature 0x7708f090)
Number of CPUs detected in this system: 2
Turning on mult-threading, number of parallel sub-compilation jobs: 4
Determining compilation order of HDL files
Parsing VHDL file "C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/Pila.vhd" into library work
Parsing VHDL file "C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb.vhd" into library work
Starting static elaboration
Completed static elaboration
Compiling package standard
Compiling package textio
Compiling package std_logic_1164
Compiling package std_logic_arith
Compiling package std_logic_unsigned
Compiling package std_logic_textio
Compiling architecture behavioral of entity Pila [pila_default]
Compiling architecture behavior of entity pilatb
Time Resolution for simulation is 1ps.
Waiting for 4 sub-compilation(s) to finish...
Compiled 9 VHDL Units
Built simulation executable C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb_isim_beh.exe
Fuse Memory Usage: 33560 KB
Fuse CPU Usage: 811 ms
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1 change: 1 addition & 0 deletions practicas/prac1.UsoRasp/README.md
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28 changes: 28 additions & 0 deletions practicas/prac1.UsoRasp/equipo 12/README.md
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# **Practica 1**
En esta práctica vimos como cargar el sistema operativo de Rapbian en Raspberry y como utilizar la Raspberry por **SSH**, **VNC** , **UART** y **PC DE ESCRITORIO**

## **ESCRITORIO**
![ Iimagen como PC](https://github.com/Eriick08/embebidos-20-1/blob/master/practicas/prac1.UsoRasp/equipo%2012/pc)

## **SSH**
![ Iimagen con ssh](https://github.com/Eriick08/embebidos-20-1/blob/master/practicas/prac1.UsoRasp/equipo%2012/SSH.jpg)


## **VNC**
![ Iimagen con vnc](https://github.com/Eriick08/embebidos-20-1/blob/master/practicas/prac1.UsoRasp/equipo%2012/VNC.jpg)


## **UART**
![ Iimagen con uart](https://github.com/Eriick08/embebidos-20-1/blob/master/practicas/prac1.UsoRasp/equipo%2012/UART.png)

### **Nombres**:
Manzano Nava Erick.

Mejía Mendoza Diana Laura.

Rubio Morin Raymundo.


**Equipo 12**


Binary file added practicas/prac1.UsoRasp/equipo 12/SSH.jpg
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Binary file added practicas/prac1.UsoRasp/equipo 12/UART.png
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Binary file added practicas/prac1.UsoRasp/equipo 12/VNC.jpg
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23 changes: 23 additions & 0 deletions practicas/prac1.UsoRasp/equipo 12/fuse.log
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Running: C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64\unwrapped\fuse.exe -intstyle ise -incremental -lib secureip -o C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb_isim_beh.exe -prj C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb_beh.prj work.pilatb
ISim P.20131013 (signature 0x7708f090)
Number of CPUs detected in this system: 2
Turning on mult-threading, number of parallel sub-compilation jobs: 4
Determining compilation order of HDL files
Parsing VHDL file "C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/Pila.vhd" into library work
Parsing VHDL file "C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb.vhd" into library work
Starting static elaboration
Completed static elaboration
Compiling package standard
Compiling package textio
Compiling package std_logic_1164
Compiling package std_logic_arith
Compiling package std_logic_unsigned
Compiling package std_logic_textio
Compiling architecture behavioral of entity Pila [pila_default]
Compiling architecture behavior of entity pilatb
Time Resolution for simulation is 1ps.
Waiting for 4 sub-compilation(s) to finish...
Compiled 9 VHDL Units
Built simulation executable C:/Users/Brandon/Documents/Arqiutectura computadoras/Pila/pilatb_isim_beh.exe
Fuse Memory Usage: 33560 KB
Fuse CPU Usage: 811 ms
Binary file added practicas/prac1.UsoRasp/equipo 12/pc
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